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Code Issues Releases Activity

graphics/mesa-dri: revert r512573 and limit to llvm80 after r512440

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Mesa 18.3 doesn't support LLVM 9. While some fixes were backported
there're probably more issues. Apparently, Gnome shows black screen.
As the port is unlikely to be ready for future LLVM_DEFAULT bumps
without a version update just limit to previously tested value.

PR:		239682
Requested by:	imp
This commit is contained in:
Jan Beich 2019-10-04 20:08:27 +00:00
parent 64bde4a115
commit 13f6aa2bdd
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=513776
11 changed files with 6 additions and 237 deletions
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2
graphics/libosmesa/Makefile
View File

@ -3,7 +3,7 @@
PORTNAME= libosmesa
PORTVERSION= ${MESAVERSION}
PORTREVISION= 4
PORTREVISION= 5
CATEGORIES= graphics
COMMENT= Off-Screen Mesa implementation of the OpenGL API

2
graphics/mesa-dri/Makefile
View File

@ -3,7 +3,7 @@
PORTNAME= mesa-dri
PORTVERSION= ${MESAVERSION}
PORTREVISION= 6
PORTREVISION= 7
CATEGORIES= graphics
COMMENT= OpenGL hardware acceleration drivers for DRI2+

4
graphics/mesa-dri/Makefile.common
View File

@ -74,6 +74,10 @@ INSTALL_TARGET= install-strip
.include <bsd.port.pre.mk>
.if ${LLVM_DEFAULT:S,-devel,990,} >= 90
LLVM_DEFAULT= 80
.endif
.if ${ARCH} == aarch64 || ${ARCH} == amd64 || ${ARCH:Marm*} || ${ARCH} == i386 || ${ARCH:Mmips*} || ${ARCH:Mpowerpc*}
BUILD_DEPENDS+= llvm${LLVM_DEFAULT}>=3.9.0_4:devel/llvm${LLVM_DEFAULT}
.if ${COMPONENT} != libs

23
graphics/mesa-dri/files/patch-0a7e767
View File

@ -1,23 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/0a7e767e5869
--- src/amd/vulkan/radv_shader.c.orig 2019-01-17 11:26:22 UTC
+++ src/amd/vulkan/radv_shader.c
@@ -548,9 +548,15 @@ static void radv_init_llvm_target()
*
* "mesa" is the prefix for error messages.
*/
- const char *argv[3] = { "mesa", "-simplifycfg-sink-common=false",
- "-amdgpu-skip-threshold=1" };
- LLVMParseCommandLineOptions(3, argv, NULL);
+ if (HAVE_LLVM >= 0x0800) {
+ const char *argv[2] = { "mesa", "-simplifycfg-sink-common=false" };
+ LLVMParseCommandLineOptions(2, argv, NULL);
+
+ } else {
+ const char *argv[3] = { "mesa", "-simplifycfg-sink-common=false",
+ "-amdgpu-skip-threshold=1" };
+ LLVMParseCommandLineOptions(3, argv, NULL);
+ }
}
static once_flag radv_init_llvm_target_once_flag = ONCE_FLAG_INIT;

16
graphics/mesa-dri/files/patch-39d0c68
View File

@ -1,16 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/39d0c68321df
--- src/amd/common/ac_llvm_build.c.orig 2019-01-17 11:26:22 UTC
+++ src/amd/common/ac_llvm_build.c
@@ -401,8 +401,9 @@ ac_build_optimization_barrier(struct ac_llvm_context *
LLVMValueRef
ac_build_shader_clock(struct ac_llvm_context *ctx)
{
- LLVMValueRef tmp = ac_build_intrinsic(ctx, "llvm.readcyclecounter",
- ctx->i64, NULL, 0, 0);
+ const char *intr = HAVE_LLVM >= 0x0900 && ctx->chip_class >= VI ?
+ "llvm.amdgcn.s.memrealtime" : "llvm.readcyclecounter";
+ LLVMValueRef tmp = ac_build_intrinsic(ctx, intr, ctx->i64, NULL, 0, 0);
return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
}

13
graphics/mesa-dri/files/patch-3e249b8
View File

@ -1,13 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/3e249b853ebb
--- src/amd/common/ac_llvm_util.c.orig 2019-01-17 11:26:22 UTC
+++ src/amd/common/ac_llvm_util.c
@@ -136,7 +136,7 @@ const char *ac_get_llvm_processor_name(enum radeon_fam
case CHIP_VEGA20:
return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902";
case CHIP_RAVEN2:
- return "gfx902"; /* TODO: use gfx909 when it's available */
+ return HAVE_LLVM >= 0x0800 ? "gfx909" : "gfx902";
default:
return "";
}

94
graphics/mesa-dri/files/patch-648dc52
View File

@ -1,94 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/648dc52367c6
--- src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c.orig 2019-01-17 11:26:22 UTC
+++ src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -698,17 +698,25 @@ static void store_emit(
}
if (target == TGSI_TEXTURE_BUFFER) {
- LLVMValueRef buf_args[] = {
+ LLVMValueRef buf_args[6] = {
value,
args.resource,
vindex,
ctx->i32_0, /* voffset */
- LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0),
- LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0),
};
+ if (HAVE_LLVM >= 0x0800) {
+ buf_args[4] = ctx->i32_0; /* soffset */
+ buf_args[5] = LLVMConstInt(ctx->i1, args.cache_policy, 0);
+ } else {
+ buf_args[4] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0);
+ buf_args[5] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0);
+ }
+
emit_data->output[emit_data->chan] = ac_build_intrinsic(
- &ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32",
+ &ctx->ac,
+ HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.struct.buffer.store.format.v4f32" :
+ "llvm.amdgcn.buffer.store.format.v4f32",
ctx->voidt, buf_args, 6,
ac_get_store_intr_attribs(writeonly_memory));
} else {
@@ -830,8 +838,35 @@ static void atomic_emit(
vindex = args.coords[0]; /* for buffers only */
}
- if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
+ if (HAVE_LLVM >= 0x0800 &&
+ inst->Src[0].Register.File != TGSI_FILE_BUFFER &&
inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
+ LLVMValueRef buf_args[7];
+ unsigned num_args = 0;
+
+ buf_args[num_args++] = args.data[0];
+ if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
+ buf_args[num_args++] = args.data[1];
+
+ buf_args[num_args++] = args.resource;
+ buf_args[num_args++] = vindex;
+ buf_args[num_args++] = voffset;
+ buf_args[num_args++] = ctx->i32_0; /* soffset */
+ buf_args[num_args++] = LLVMConstInt(ctx->i32, args.cache_policy & ac_slc, 0);
+
+ char intrinsic_name[64];
+ snprintf(intrinsic_name, sizeof(intrinsic_name),
+ "llvm.amdgcn.struct.buffer.atomic.%s", action->intr_name);
+ emit_data->output[emit_data->chan] =
+ ac_to_float(&ctx->ac,
+ ac_build_intrinsic(&ctx->ac, intrinsic_name,
+ ctx->i32, buf_args, num_args, 0));
+ return;
+ }
+
+ if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
+ (HAVE_LLVM < 0x0800 &&
+ inst->Memory.Texture == TGSI_TEXTURE_BUFFER)) {
LLVMValueRef buf_args[7];
unsigned num_args = 0;
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 45 ++++++++++++++++++++---
src/gallium/drivers/radeonsi/si_state.c | 7 +---
2 files changed, 42 insertions(+), 10 deletions(-)
--- src/gallium/drivers/radeonsi/si_state.c.orig 2019-01-17 11:26:22 UTC
+++ src/gallium/drivers/radeonsi/si_state.c
@@ -3613,14 +3613,11 @@ si_make_buffer_descriptor(struct si_screen *screen, st
* - For VMEM and inst.IDXEN == 0 or STRIDE == 0, it's in byte units.
* - For VMEM and inst.IDXEN == 1 and STRIDE != 0, it's in units of STRIDE.
*/
- if (screen->info.chip_class >= GFX9)
- /* When vindex == 0, LLVM sets IDXEN = 0, thus changing units
+ if (screen->info.chip_class >= GFX9 && HAVE_LLVM < 0x0800)
+ /* When vindex == 0, LLVM < 8.0 sets IDXEN = 0, thus changing units
* from STRIDE to bytes. This works around it by setting
* NUM_RECORDS to at least the size of one element, so that
* the first element is readable when IDXEN == 0.
- *
- * TODO: Fix this in LLVM, but do we need a new intrinsic where
- * IDXEN is enforced?
*/
num_records = num_records ? MAX2(num_records, stride) : 0;
else if (screen->info.chip_class == VI)

13
graphics/mesa-dri/files/patch-b5012a0
View File

@ -1,13 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/b5012a05185c
--- src/amd/common/ac_llvm_build.c.orig 2019-01-17 11:26:22 UTC
+++ src/amd/common/ac_llvm_build.c
@@ -424,7 +424,7 @@ ac_build_ballot(struct ac_llvm_context *ctx,
args[0] = ac_to_integer(ctx, args[0]);
return ac_build_intrinsic(ctx,
- "llvm.amdgcn.icmp.i32",
+ HAVE_LLVM >= 0x900 ? "llvm.amdgcn.icmp.i64.i32" : "llvm.amdgcn.icmp.i32",
ctx->i64, args, 3,
AC_FUNC_ATTR_NOUNWIND |
AC_FUNC_ATTR_READNONE |

46
graphics/mesa-dri/files/patch-dded2ed
View File

@ -1,46 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/dded2edf8bed
--- src/gallium/auxiliary/gallivm/lp_bld_arit.c.orig 2019-01-17 11:26:22 UTC
+++ src/gallium/auxiliary/gallivm/lp_bld_arit.c
@@ -555,6 +555,12 @@ lp_build_add(struct lp_build_context *bld,
return bld->one;
if (!type.floating && !type.fixed) {
+ if (HAVE_LLVM >= 0x0900) {
+ char intrin[32];
+ intrinsic = type.sign ? "llvm.sadd.sat" : "llvm.uadd.sat";
+ lp_format_intrinsic(intrin, sizeof intrin, intrinsic, bld->vec_type);
+ return lp_build_intrinsic_binary(builder, intrin, bld->vec_type, a, b);
+ }
if (type.width * type.length == 128) {
if (util_cpu_caps.has_sse2) {
if (type.width == 8)
@@ -625,6 +631,7 @@ lp_build_add(struct lp_build_context *bld,
* NOTE: cmp/select does sext/trunc of the mask. Does not seem to
* interfere with llvm's ability to recognize the pattern but seems
* a bit brittle.
+ * NOTE: llvm 9+ always uses (non arch specific) intrinsic.
*/
LLVMValueRef overflowed = lp_build_cmp(bld, PIPE_FUNC_GREATER, a, res);
res = lp_build_select(bld, overflowed,
@@ -876,6 +883,12 @@ lp_build_sub(struct lp_build_context *bld,
return bld->zero;
if (!type.floating && !type.fixed) {
+ if (HAVE_LLVM >= 0x0900) {
+ char intrin[32];
+ intrinsic = type.sign ? "llvm.ssub.sat" : "llvm.usub.sat";
+ lp_format_intrinsic(intrin, sizeof intrin, intrinsic, bld->vec_type);
+ return lp_build_intrinsic_binary(builder, intrin, bld->vec_type, a, b);
+ }
if (type.width * type.length == 128) {
if (util_cpu_caps.has_sse2) {
if (type.width == 8)
@@ -925,6 +938,7 @@ lp_build_sub(struct lp_build_context *bld,
* NOTE: cmp/select does sext/trunc of the mask. Does not seem to
* interfere with llvm's ability to recognize the pattern but seems
* a bit brittle.
+ * NOTE: llvm 9+ always uses (non arch specific) intrinsic.
*/
LLVMValueRef no_ov = lp_build_cmp(bld, PIPE_FUNC_GREATER, a, b);
a = lp_build_select(bld, no_ov, a, b);

24
graphics/mesa-dri/files/patch-e4803ab
View File

@ -1,24 +0,0 @@
https://gitlab.freedesktop.org/mesa/mesa/commit/e4803ab7d2b6
--- src/amd/common/ac_llvm_build.c.orig 2019-01-17 11:26:22 UTC
+++ src/amd/common/ac_llvm_build.c
@@ -1191,11 +1191,15 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
offset = LLVMBuildAdd(ctx->builder, offset,
LLVMConstInt(ctx->i32, 4, 0), "");
}
- LLVMValueRef args[2] = {rsrc, offset};
- result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
- ctx->f32, args, 2,
+ const char *intrname =
+ HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.s.buffer.load.f32"
+ : "llvm.SI.load.const.v4i32";
+ unsigned num_args = HAVE_LLVM >= 0x0800 ? 3 : 2;
+ LLVMValueRef args[3] = {rsrc, offset, ctx->i32_0};
+ result[i] = ac_build_intrinsic(ctx, intrname,
+ ctx->f32, args, num_args,
AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ (HAVE_LLVM < 0x0800 ? AC_FUNC_ATTR_LEGACY : 0));
}
if (num_channels == 1)
return result[0];

6
lang/clover/Makefile
View File

@ -17,12 +17,6 @@ ONLY_FOR_ARCHS= i386 amd64
ONLY_FOR_ARCHS_REASON= Clover needs a GPU supported by the Radeon KMS driver
.include <bsd.port.options.mk>
# Keep in sync with devel/libclc
.if ${LLVM_DEFAULT:S,-devel,990,} >= 90
LLVM_DEFAULT= 80
.endif
.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
CONFIGURE_ARGS+= --enable-opencl --enable-opencl-icd --disable-dri \