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Add support for the JMicron JMB361, 365 and 366 chips.
HW and documentation kindly provided by JMicron.
This commit is contained in:
parent
124902face
commit
0118b48b7e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=156683
@ -2068,8 +2068,11 @@ ata_jmicron_ident(device_t dev)
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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struct ata_chip_id *idx;
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static struct ata_chip_id ids[] =
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{{ ATA_JMB360, 0, 0, 0, ATA_SA300, "JMB360" },
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{ ATA_JMB363, 0, 1, 0, ATA_SA300, "JMB363" },
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{{ ATA_JMB360, 0, 1, 0, ATA_SA300, "JMB360" },
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{ ATA_JMB361, 0, 1, 1, ATA_SA300, "JMB361" },
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{ ATA_JMB363, 0, 2, 1, ATA_SA300, "JMB363" },
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{ ATA_JMB365, 0, 1, 2, ATA_SA300, "JMB365" },
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{ ATA_JMB366, 0, 2, 2, ATA_SA300, "JMB366" },
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{ 0, 0, 0, 0, 0, 0}};
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char buffer[64];
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@ -2094,6 +2097,7 @@ ata_jmicron_chipinit(device_t dev)
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/* set controller configuration to a setup we support */
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pci_write_config(dev, 0x40, 0x80c0a131, 4);
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pci_write_config(dev, 0x80, 0x01200000, 4);
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ctlr->allocate = ata_jmicron_allocate;
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ctlr->reset = ata_jmicron_reset;
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@ -2118,10 +2122,6 @@ ata_jmicron_chipinit(device_t dev)
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ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
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ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_AE);
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/* get the number of HW channels */
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ctlr->channels =
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(ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_NPMASK) + 1;
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/* clear interrupts */
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ATA_OUTL(ctlr->r_res2, ATA_AHCI_IS, ATA_INL(ctlr->r_res2, ATA_AHCI_IS));
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@ -2134,21 +2134,22 @@ ata_jmicron_chipinit(device_t dev)
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pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
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}
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/* add in PATA channel(s) */
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ctlr->channels += ctlr->chip->cfg1;
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/* set the number of HW channels */
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ctlr->channels = ctlr->chip->cfg1 + ctlr->chip->cfg2;
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return 0;
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}
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static int
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ata_jmicron_allocate(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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int error;
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if (ch->unit >= 2) {
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ch->unit -= 2;
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if (ch->unit >= ctlr->chip->cfg1) {
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ch->unit -= ctlr->chip->cfg1;
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error = ata_pci_allocate(dev);
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ch->unit += 2;
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ch->unit += ctlr->chip->cfg1;
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}
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else
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error = ata_ahci_allocate(dev);
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@ -2158,9 +2159,10 @@ ata_jmicron_allocate(device_t dev)
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static void
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ata_jmicron_reset(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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if (ch->unit >= 2)
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if (ch->unit >= ctlr->chip->cfg1)
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ata_generic_reset(dev);
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else
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ata_ahci_reset(dev);
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@ -2169,9 +2171,10 @@ ata_jmicron_reset(device_t dev)
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static void
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ata_jmicron_dmainit(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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if (ch->unit >= 2)
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if (ch->unit >= ctlr->chip->cfg1)
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ata_pci_dmainit(dev);
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else
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ata_ahci_dmainit(dev);
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@ -2180,9 +2183,10 @@ ata_jmicron_dmainit(device_t dev)
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static void
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ata_jmicron_setmode(device_t dev, int mode)
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{
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struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(dev));
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if (ch->unit >= 2) {
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if (ch->unit >= ctlr->chip->cfg1) {
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struct ata_device *atadev = device_get_softc(dev);
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/* check for 80pin cable present */
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@ -161,7 +161,10 @@ struct ata_connect_task {
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#define ATA_JMICRON_ID 0x197b
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#define ATA_JMB360 0x2360197b
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#define ATA_JMB361 0x2361197b
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#define ATA_JMB363 0x2363197b
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#define ATA_JMB365 0x2365197b
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#define ATA_JMB366 0x2366197b
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#define ATA_MARVELL_ID 0x11ab
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#define ATA_M88SX5040 0x504011ab
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