From 3abf5d76f2edee77981540feac63b2c0edfdbed7 Mon Sep 17 00:00:00 2001 From: Kirk McKusick Date: Tue, 10 Oct 2017 16:17:03 +0000 Subject: [PATCH 001/219] Growfs got missed in r323923 that added a check hash to cylinder groups. This makes the needed changes to add/update cylinder group check hashes when a filesystem is expanded. Reported by: kib and Warner Losh (imp) Reviewed by: kib Tested by: Peter Holm (pho) --- sbin/growfs/Makefile | 2 +- sbin/growfs/growfs.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/sbin/growfs/Makefile b/sbin/growfs/Makefile index 01a209849789..8aeb9d77509e 100644 --- a/sbin/growfs/Makefile +++ b/sbin/growfs/Makefile @@ -20,7 +20,7 @@ CFLAGS+= -DFS_DEBUG NO_WCAST_ALIGN= yes .endif -LIBADD= util +LIBADD= ufs util HAS_TESTS= SUBDIR.${MK_TESTS}+= tests diff --git a/sbin/growfs/growfs.c b/sbin/growfs/growfs.c index 0aa4d4586e6f..44fb39ba0948 100644 --- a/sbin/growfs/growfs.c +++ b/sbin/growfs/growfs.c @@ -78,6 +78,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "debug.h" @@ -121,6 +122,7 @@ static void updcsloc(time_t, int, int, unsigned int); static void frag_adjust(ufs2_daddr_t, int); static void updclst(int); static void mount_reload(const struct statfs *stfs); +static void cgckhash(struct cg *); /* * Here we actually start growing the file system. We basically read the @@ -480,6 +482,7 @@ initcg(int cylno, time_t modtime, int fso, unsigned int Nflag) sblock.fs_cstotal.cs_nifree += acg.cg_cs.cs_nifree; *cs = acg.cg_cs; + cgckhash(&acg); memcpy(iobuf, &acg, sblock.fs_cgsize); memset(iobuf + sblock.fs_cgsize, '\0', sblock.fs_bsize * 3 - sblock.fs_cgsize); @@ -771,6 +774,7 @@ updjcg(int cylno, time_t modtime, int fsi, int fso, unsigned int Nflag) /* * Write the updated "joining" cylinder group back to disk. */ + cgckhash(&acg); wtfs(fsbtodb(&sblock, cgtod(&sblock, cylno)), (size_t)sblock.fs_cgsize, (void *)&acg, fso, Nflag); DBG_PRINT0("jcg written\n"); @@ -1739,3 +1743,17 @@ mount_reload(const struct statfs *stfs) *errmsg != '\0' ? ": " : "", errmsg); } } + +/* + * Calculate the check-hash of the cylinder group. + */ +static void +cgckhash(cgp) + struct cg *cgp; +{ + + if ((sblock.fs_metackhash & CK_CYLGRP) == 0) + return; + cgp->cg_ckhash = 0; + cgp->cg_ckhash = calculate_crc32c(~0L, (void *)cgp, sblock.fs_cgsize); +} From 307a8f2c21d3818b7c81d358d6cc9c4d85910656 Mon Sep 17 00:00:00 2001 From: Sean Bruno Date: Tue, 10 Oct 2017 19:14:40 +0000 Subject: [PATCH 002/219] Hard link if_igb.ko to if_em.ko. Use a LINK directive to ensure that this is more friendly to the tree. Tested this with loader.conf:if_igb_load="YES" and it does the right thing. Submitted by: Ian Lepore --- sys/modules/em/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sys/modules/em/Makefile b/sys/modules/em/Makefile index e9968046eea7..b9caaa2d3cc1 100644 --- a/sys/modules/em/Makefile +++ b/sys/modules/em/Makefile @@ -22,7 +22,6 @@ CFLAGS += -I${SRCTOP}/sys/dev/e1000 # DEVICE_POLLING for a non-interrupt-driven method #CFLAGS += -DDEVICE_POLLING -afterinstall: - cd ${DESTDIR}${KMODDIR} && ln -sf if_em.ko if_igb.ko +LINKS= ${KMODDIR}/${KMOD}.ko ${KMODDIR}/if_igb.ko .include From 11738fb0f6d1333b20acb035cf0f49fd59e5988f Mon Sep 17 00:00:00 2001 From: Jung-uk Kim Date: Tue, 10 Oct 2017 19:20:38 +0000 Subject: [PATCH 003/219] Do not check whether AcpiOsGetTimer() is called during boot. From ACPICA 20170929, AcpiOsGetTimer() should be available early because While() loop timeout mechanism was reimplemented with it. Unfortunately, it means AcpiLoadTables() may cause panic when a While() loop is executed. After having lengthy discussions with ACPICA developers, I have concluded that dummy timecounter is good enough for the purpose and it is the least intrusive solution for now. Also, they reminded me the ACPI specification implies OS timer function should be available before loading tables. --- sys/dev/acpica/Osd/OsdSchedule.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sys/dev/acpica/Osd/OsdSchedule.c b/sys/dev/acpica/Osd/OsdSchedule.c index 8e3810279114..8330c373f5b5 100644 --- a/sys/dev/acpica/Osd/OsdSchedule.c +++ b/sys/dev/acpica/Osd/OsdSchedule.c @@ -274,9 +274,6 @@ AcpiOsGetTimer(void) struct bintime bt; UINT64 t; - /* XXX During early boot there is no (decent) timer available yet. */ - KASSERT(cold == 0, ("acpi: timer op not yet supported during boot")); - binuptime(&bt); t = (uint64_t)bt.sec * 10000000; t += ((uint64_t)10000000 * (uint32_t)(bt.frac >> 32)) >> 32; From 6e71b3c3edd15b1a66f4dccb91e545a098c3c822 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 10 Oct 2017 20:08:30 +0000 Subject: [PATCH 004/219] uart: detect 256-byte FIFOs Submitted by: Zakary Nafziger Sponsored by: The FreeBSD Foundation --- sys/dev/uart/uart_dev_ns8250.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c index dbb013c3e955..7072f4e6f9e4 100644 --- a/sys/dev/uart/uart_dev_ns8250.c +++ b/sys/dev/uart/uart_dev_ns8250.c @@ -873,7 +873,7 @@ ns8250_bus_probe(struct uart_softc *sc) count = 0; goto describe; } - } while ((lsr & LSR_OE) == 0 && count < 130); + } while ((lsr & LSR_OE) == 0 && count < 260); count--; uart_setreg(bas, REG_MCR, mcr); @@ -894,6 +894,9 @@ ns8250_bus_probe(struct uart_softc *sc) } else if (count >= 112 && count <= 128) { sc->sc_rxfifosz = 128; device_set_desc(sc->sc_dev, "16950 or compatible"); + } else if (count >= 224 && count <= 256) { + sc->sc_rxfifosz = 256; + device_set_desc(sc->sc_dev, "16x50 with 256 byte FIFO"); } else { sc->sc_rxfifosz = 16; device_set_desc(sc->sc_dev, From 143ed053e901b8827101deec8a7342d8b574f7fe Mon Sep 17 00:00:00 2001 From: David C Somayajulu Date: Tue, 10 Oct 2017 20:45:45 +0000 Subject: [PATCH 005/219] Revert Commit r324290 Add sanity checks in ql_hw_send() qla_send() to ensure that empty slots in Tx Ring map to empty slot in Tx_buf array before Transmits. If the checks fail further Transmission on that Tx Ring is prevented. --- sys/dev/qlxgbe/ql_hw.c | 10 ---------- sys/dev/qlxgbe/ql_os.c | 11 ----------- 2 files changed, 21 deletions(-) diff --git a/sys/dev/qlxgbe/ql_hw.c b/sys/dev/qlxgbe/ql_hw.c index e6efba6e62af..03bb9260f3c2 100644 --- a/sys/dev/qlxgbe/ql_hw.c +++ b/sys/dev/qlxgbe/ql_hw.c @@ -2374,16 +2374,6 @@ ql_hw_send(qla_host_t *ha, bus_dma_segment_t *segs, int nsegs, } } - for (i = 0; i < num_tx_cmds; i++) { - if (NULL != ha->tx_ring[txr_idx].tx_buf[(tx_idx+i)].m_head) { - QL_ASSERT(ha, 0, \ - ("%s: txr_idx = %d tx_idx = %d mbuf = %p\n",\ - __func__, txr_idx, (tx_idx+i),\ - ha->tx_ring[txr_idx].tx_buf[(tx_idx+i)].m_head)); - return (EINVAL); - } - } - tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[tx_idx]; if (!(mp->m_pkthdr.csum_flags & CSUM_TSO)) { diff --git a/sys/dev/qlxgbe/ql_os.c b/sys/dev/qlxgbe/ql_os.c index bd17252b3c4c..c4391a1b9871 100644 --- a/sys/dev/qlxgbe/ql_os.c +++ b/sys/dev/qlxgbe/ql_os.c @@ -1232,17 +1232,6 @@ qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; - - if (NULL != ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head) { - QL_ASSERT(ha, 0, ("%s: txr_idx = %d tx_idx = %d mbuf = %p\n",\ - __func__, txr_idx, tx_idx,\ - ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head)); - if (m_head) - m_freem(m_head); - *m_headp = NULL; - return (ret); - } - map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, From 63918d384862a07aaff3cd773b8194ddc2390c3a Mon Sep 17 00:00:00 2001 From: Rick Macklem Date: Tue, 10 Oct 2017 21:05:40 +0000 Subject: [PATCH 006/219] Fix forced dismount when a pNFS mount is hung on a DS. When a "pnfs" NFSv4.1 mount is hung because of an unresponsive DS, a forced dismount wouldn't work, because the RPC socket for the DS was not being closed. This patch fixes this. This will only affect "pnfs" mounts where the pNFS server's DS is unresponsive (crashed or network partitioned or...). Found during testing of the pNFS server. MFC after: 2 weeks --- sys/fs/nfs/nfs_commonkrpc.c | 20 ++++++++++++++++++++ sys/fs/nfs/nfsclstate.h | 1 + 2 files changed, 21 insertions(+) diff --git a/sys/fs/nfs/nfs_commonkrpc.c b/sys/fs/nfs/nfs_commonkrpc.c index 8faf192ddb9f..ec912767dc34 100644 --- a/sys/fs/nfs/nfs_commonkrpc.c +++ b/sys/fs/nfs/nfs_commonkrpc.c @@ -1121,9 +1121,29 @@ newnfs_request(struct nfsrv_descript *nd, struct nfsmount *nmp, int newnfs_nmcancelreqs(struct nfsmount *nmp) { + struct nfsclds *dsp; + struct __rpc_client *cl; if (nmp->nm_sockreq.nr_client != NULL) CLNT_CLOSE(nmp->nm_sockreq.nr_client); +lookformore: + NFSLOCKMNT(nmp); + TAILQ_FOREACH(dsp, &nmp->nm_sess, nfsclds_list) { + NFSLOCKDS(dsp); + if (dsp != TAILQ_FIRST(&nmp->nm_sess) && + (dsp->nfsclds_flags & NFSCLDS_CLOSED) == 0 && + dsp->nfsclds_sockp != NULL && + dsp->nfsclds_sockp->nr_client != NULL) { + dsp->nfsclds_flags |= NFSCLDS_CLOSED; + cl = dsp->nfsclds_sockp->nr_client; + NFSUNLOCKDS(dsp); + NFSUNLOCKMNT(nmp); + CLNT_CLOSE(cl); + goto lookformore; + } + NFSUNLOCKDS(dsp); + } + NFSUNLOCKMNT(nmp); return (0); } diff --git a/sys/fs/nfs/nfsclstate.h b/sys/fs/nfs/nfsclstate.h index e46a76be73c1..ceef870b9c7c 100644 --- a/sys/fs/nfs/nfsclstate.h +++ b/sys/fs/nfs/nfsclstate.h @@ -91,6 +91,7 @@ struct nfsclds { #define NFSCLDS_HASWRITEVERF 0x0001 #define NFSCLDS_MDS 0x0002 #define NFSCLDS_DS 0x0004 +#define NFSCLDS_CLOSED 0x0008 struct nfsclclient { LIST_ENTRY(nfsclclient) nfsc_list; From 4887fa36354b4cdb0609d960bc1bc63d5bc68125 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 10 Oct 2017 21:16:07 +0000 Subject: [PATCH 007/219] growfs: ANSIfy cgckhash() The build was broken on GCC-using architectures with: growfs.c: In function 'cgckhash': growfs.c:1753: warning: old-style function definition Sponsored by: The FreeBSD Foundation --- sbin/growfs/growfs.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sbin/growfs/growfs.c b/sbin/growfs/growfs.c index 44fb39ba0948..2e8271b39d5d 100644 --- a/sbin/growfs/growfs.c +++ b/sbin/growfs/growfs.c @@ -1748,8 +1748,7 @@ mount_reload(const struct statfs *stfs) * Calculate the check-hash of the cylinder group. */ static void -cgckhash(cgp) - struct cg *cgp; +cgckhash(struct cg *cgp) { if ((sblock.fs_metackhash & CK_CYLGRP) == 0) From 1f9916ed08c56e708dc0518ecc3189c17bf71a5f Mon Sep 17 00:00:00 2001 From: Sean Bruno Date: Tue, 10 Oct 2017 22:21:05 +0000 Subject: [PATCH 008/219] match sendfile() error handling to send(). Sendfile() should match the error checking order of send() which is currently: SBS_CANTSENDMORE so_error SS_ISCONNECTED Submitted by: Jason Eggleston Reviewed by: glebius MFC after: 2 weeks Sponsored by: Limelight Networks Differential Revision: https://reviews.freebsd.org/D12633 --- sys/kern/kern_sendfile.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sys/kern/kern_sendfile.c b/sys/kern/kern_sendfile.c index 1c8442b95b24..4c216017d303 100644 --- a/sys/kern/kern_sendfile.c +++ b/sys/kern/kern_sendfile.c @@ -507,8 +507,6 @@ sendfile_getsock(struct thread *td, int s, struct file **sock_fp, *so = (*sock_fp)->f_data; if ((*so)->so_type != SOCK_STREAM) return (EINVAL); - if (((*so)->so_state & SS_ISCONNECTED) == 0) - return (ENOTCONN); return (0); } @@ -617,6 +615,12 @@ vn_sendfile(struct file *fp, int sockfd, struct uio *hdr_uio, SOCKBUF_UNLOCK(&so->so_snd); goto done; } + if ((so->so_state & SS_ISCONNECTED) == 0) { + SOCKBUF_UNLOCK(&so->so_snd); + error = ENOTCONN; + goto done; + } + space = sbspace(&so->so_snd); if (space < rem && (space <= 0 || From e3127092786bf8c765bb45dd6c2d2ab35e456c4a Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 10 Oct 2017 23:54:25 +0000 Subject: [PATCH 009/219] sysctl.9: document CTLFLAG_CAPRD and CTLFLAG_CAPWR Reported by: Shawn Webb MFC after: 1 week Sponsored by: The FreeBSD Foundation --- share/man/man9/sysctl.9 | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/share/man/man9/sysctl.9 b/share/man/man9/sysctl.9 index dbb61f59f2c0..558c65a248fe 100644 --- a/share/man/man9/sysctl.9 +++ b/share/man/man9/sysctl.9 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd December 13, 2016 +.Dd October 10, 2017 .Dt SYSCTL 9 .Os .Sh NAME @@ -668,6 +668,10 @@ Additionally, any of the following optional flags may also be specified: .Bl -tag -width ".Dv CTLFLAG_ANYBODY" .It Dv CTLFLAG_ANYBODY Any user or process can write to this sysctl. +.It Dv CTLFLAG_CAPRD +A process in capability mode can read from this sysctl. +.It Dv CTLFLAG_CAPWR +A process in capability mode can write to this sysctl. .It Dv CTLFLAG_SECURE This sysctl can be written to only if the effective securelevel of the process is \[<=] 0. From 7a174c3469a2fbde3ef227c35b9cd44be3078a2c Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Wed, 11 Oct 2017 02:39:20 +0000 Subject: [PATCH 010/219] Do exception offset computations in 64 bits, not 32. This fixes clang-built binaries on a gcc powerpc64 world. Gets us one step closer to a clang-built world. The same change was made in later upstream binutils. Submitted by: rdivacky MFC after: 2 weeks --- contrib/binutils/bfd/elf-eh-frame.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/contrib/binutils/bfd/elf-eh-frame.c b/contrib/binutils/bfd/elf-eh-frame.c index 092c2c57ec34..baa998676cdd 100644 --- a/contrib/binutils/bfd/elf-eh-frame.c +++ b/contrib/binutils/bfd/elf-eh-frame.c @@ -1344,7 +1344,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd, val = read_value (abfd, buf, per_width, get_DW_EH_PE_signed (per_encoding)); - val += ent->offset - ent->new_offset; + val += (bfd_vma)ent->offset - ent->new_offset; val -= extra_string + extra_data; write_value (abfd, buf, val, per_width); action &= ~4; @@ -1400,7 +1400,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd, } break; case DW_EH_PE_pcrel: - value += ent->offset - ent->new_offset; + value += (bfd_vma)ent->offset - ent->new_offset; address += sec->output_section->vma + ent->offset + 8; break; } @@ -1428,7 +1428,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd, if (value) { if ((ent->lsda_encoding & 0xf0) == DW_EH_PE_pcrel) - value += ent->offset - ent->new_offset; + value += (bfd_vma)ent->offset - ent->new_offset; else if (ent->cie_inf->need_lsda_relative) value -= (sec->output_section->vma + ent->new_offset + 8 + ent->lsda_offset); From 8e4db4e4a1bd09c767efc1eaae41caa9ca7e322f Mon Sep 17 00:00:00 2001 From: Kurt Lidl Date: Wed, 11 Oct 2017 03:50:44 +0000 Subject: [PATCH 011/219] Don't use a non-zero argument for __builtin_frame_address Mirror the change made for powerpc64 in r323687. With this change, gcc 6.4.0 can successfully compile and link a kernel that runs on sparc64. MFC after: 2 weeks --- sys/sparc64/sparc64/stack_machdep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/sparc64/sparc64/stack_machdep.c b/sys/sparc64/sparc64/stack_machdep.c index 329368d78051..451aead4e631 100644 --- a/sys/sparc64/sparc64/stack_machdep.c +++ b/sys/sparc64/sparc64/stack_machdep.c @@ -93,5 +93,5 @@ void stack_save(struct stack *st) { - stack_capture(st, (struct frame *)__builtin_frame_address(1)); + stack_capture(st, (struct frame *)__builtin_frame_address(0)); } From 6f12c42e8b962495208915ba4b972b0cc4d87c5d Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Wed, 11 Oct 2017 05:15:49 +0000 Subject: [PATCH 012/219] hyperv/hn: Workaround erroneous hash type observed on WS2016 for VF. The background was described in r324489. MFC after: 3 days Sponsored by: Microsoft --- sys/dev/hyperv/netvsc/hn_rndis.c | 13 ++++++++++--- sys/dev/hyperv/netvsc/if_hn.c | 20 ++++++++++++++++---- sys/dev/hyperv/netvsc/ndis.h | 11 ++++++++++- 3 files changed, 36 insertions(+), 8 deletions(-) diff --git a/sys/dev/hyperv/netvsc/hn_rndis.c b/sys/dev/hyperv/netvsc/hn_rndis.c index 64609bb5dcfd..b9bf683fe811 100644 --- a/sys/dev/hyperv/netvsc/hn_rndis.c +++ b/sys/dev/hyperv/netvsc/hn_rndis.c @@ -521,6 +521,10 @@ hn_rndis_query_rsscaps(struct hn_softc *sc, int *rxr_cnt0) /* Commit! */ sc->hn_rss_ind_size = indsz; sc->hn_rss_hcap = hash_func | hash_types; + if (sc->hn_caps & HN_CAP_UDPHASH) { + /* UDP 4-tuple hash is unconditionally enabled. */ + sc->hn_rss_hcap |= NDIS_HASH_UDP_IPV4_X; + } *rxr_cnt0 = rxr_cnt; return (0); } @@ -760,8 +764,10 @@ hn_rndis_conf_rss(struct hn_softc *sc, uint16_t flags) ("NDIS 6.20+ is required, NDIS version 0x%08x", sc->hn_ndis_ver)); /* XXX only one can be specified through, popcnt? */ - KASSERT((sc->hn_rss_hash & NDIS_HASH_FUNCTION_MASK), ("no hash func")); - KASSERT((sc->hn_rss_hash & NDIS_HASH_TYPE_MASK), ("no hash types")); + KASSERT((sc->hn_rss_hash & NDIS_HASH_FUNCTION_MASK), + ("no hash func %08x", sc->hn_rss_hash)); + KASSERT((sc->hn_rss_hash & NDIS_HASH_STD), + ("no standard hash types %08x", sc->hn_rss_hash)); KASSERT(sc->hn_rss_ind_size > 0, ("no indirect table size")); if (bootverbose) { @@ -780,7 +786,8 @@ hn_rndis_conf_rss(struct hn_softc *sc, uint16_t flags) prm->ndis_hdr.ndis_rev = NDIS_RSS_PARAMS_REV_2; prm->ndis_hdr.ndis_size = rss_size; prm->ndis_flags = flags; - prm->ndis_hash = sc->hn_rss_hash; + prm->ndis_hash = sc->hn_rss_hash & + (NDIS_HASH_FUNCTION_MASK | NDIS_HASH_STD); prm->ndis_indsize = sizeof(rss->rss_ind[0]) * sc->hn_rss_ind_size; prm->ndis_indoffset = __offsetof(struct ndis_rssprm_toeplitz, rss_ind[0]); diff --git a/sys/dev/hyperv/netvsc/if_hn.c b/sys/dev/hyperv/netvsc/if_hn.c index 03c0aefafe8a..9ae5102df9a2 100644 --- a/sys/dev/hyperv/netvsc/if_hn.c +++ b/sys/dev/hyperv/netvsc/if_hn.c @@ -1424,6 +1424,8 @@ hn_rss_type_fromndis(uint32_t rss_hash) types |= RSS_TYPE_TCP_IPV6; if (rss_hash & NDIS_HASH_TCP_IPV6_EX) types |= RSS_TYPE_TCP_IPV6_EX; + if (rss_hash & NDIS_HASH_UDP_IPV4_X) + types |= RSS_TYPE_UDP_IPV4; return (types); } @@ -1432,9 +1434,8 @@ hn_rss_type_tondis(uint32_t types) { uint32_t rss_hash = 0; - KASSERT((types & - (RSS_TYPE_UDP_IPV4 | RSS_TYPE_UDP_IPV6 | RSS_TYPE_UDP_IPV6_EX)) == 0, - ("UDP4, UDP6 and UDP6EX are not supported")); + KASSERT((types & (RSS_TYPE_UDP_IPV6 | RSS_TYPE_UDP_IPV6_EX)) == 0, + ("UDP6 and UDP6EX are not supported")); if (types & RSS_TYPE_IPV4) rss_hash |= NDIS_HASH_IPV4; @@ -1448,6 +1449,8 @@ hn_rss_type_tondis(uint32_t types) rss_hash |= NDIS_HASH_TCP_IPV6; if (types & RSS_TYPE_TCP_IPV6_EX) rss_hash |= NDIS_HASH_TCP_IPV6_EX; + if (types & RSS_TYPE_UDP_IPV4) + rss_hash |= NDIS_HASH_UDP_IPV4_X; return (rss_hash); } @@ -1546,6 +1549,13 @@ hn_vf_rss_fixup(struct hn_softc *sc, bool reconf) * NOTE: * We don't disable the hash type, but stop delivery the hash * value/type through mbufs on RX path. + * + * XXX If HN_CAP_UDPHASH is set in hn_caps, then UDP 4-tuple + * hash is delivered with type of TCP_IPV4. This means if + * UDP_IPV4 is enabled, then TCP_IPV4 should be forced, at + * least to hn_mbuf_hash. However, given that _all_ of the + * NICs implement TCP_IPV4, this will _not_ impose any issues + * here. */ if ((my_types & RSS_TYPE_IPV4) && (diff_types & ifrh.ifrh_types & @@ -3582,7 +3592,9 @@ hn_rxpkt(struct hn_rx_ring *rxr, const void *data, int dlen, &l3proto, &l4proto); } if (l3proto == ETHERTYPE_IP) { - if (l4proto == IPPROTO_UDP) { + if (l4proto == IPPROTO_UDP && + (rxr->hn_mbuf_hash & + NDIS_HASH_UDP_IPV4_X)) { hash_type = M_HASHTYPE_RSS_UDP_IPV4; do_lro = 0; diff --git a/sys/dev/hyperv/netvsc/ndis.h b/sys/dev/hyperv/netvsc/ndis.h index 42f3c25401db..4e34b51ca30f 100644 --- a/sys/dev/hyperv/netvsc/ndis.h +++ b/sys/dev/hyperv/netvsc/ndis.h @@ -56,8 +56,17 @@ #define NDIS_HASH_IPV6_EX 0x00000800 #define NDIS_HASH_TCP_IPV6 0x00001000 #define NDIS_HASH_TCP_IPV6_EX 0x00002000 +#define NDIS_HASH_UDP_IPV4_X 0x00004000 /* XXX non-standard */ #define NDIS_HASH_ALL (NDIS_HASH_IPV4 | \ + NDIS_HASH_TCP_IPV4 | \ + NDIS_HASH_IPV6 | \ + NDIS_HASH_IPV6_EX | \ + NDIS_HASH_TCP_IPV6 | \ + NDIS_HASH_TCP_IPV6_EX |\ + NDIS_HASH_UDP_IPV4_X) + +#define NDIS_HASH_STD (NDIS_HASH_IPV4 | \ NDIS_HASH_TCP_IPV4 | \ NDIS_HASH_IPV6 | \ NDIS_HASH_IPV6_EX | \ @@ -66,7 +75,7 @@ /* Hash description for use with printf(9) %b identifier. */ #define NDIS_HASH_BITS \ - "\20\1TOEPLITZ\11IP4\12TCP4\13IP6\14IP6EX\15TCP6\16TCP6EX" + "\20\1TOEPLITZ\11IP4\12TCP4\13IP6\14IP6EX\15TCP6\16TCP6EX\17UDP4_X" #define NDIS_HASH_KEYSIZE_TOEPLITZ 40 #define NDIS_HASH_INDCNT 128 From 78e46963b60ece0d41c3eaa6050e52f029415269 Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Wed, 11 Oct 2017 05:28:51 +0000 Subject: [PATCH 013/219] hyperv/hn: Enable transparent VF by default. MFC after: 3 days Sponsored by: Microsoft --- sys/dev/hyperv/netvsc/if_hn.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/hyperv/netvsc/if_hn.c b/sys/dev/hyperv/netvsc/if_hn.c index 9ae5102df9a2..9700c9191086 100644 --- a/sys/dev/hyperv/netvsc/if_hn.c +++ b/sys/dev/hyperv/netvsc/if_hn.c @@ -584,7 +584,7 @@ SYSCTL_PROC(_hw_hn, OID_AUTO, vfmap, CTLFLAG_RD | CTLTYPE_STRING, 0, 0, hn_vfmap_sysctl, "A", "VF mapping"); /* Transparent VF */ -static int hn_xpnt_vf = 0; +static int hn_xpnt_vf = 1; SYSCTL_INT(_hw_hn, OID_AUTO, vf_transparent, CTLFLAG_RDTUN, &hn_xpnt_vf, 0, "Transparent VF mod"); From 9fed8bbef4f06ae21cee1c9c4429ef541a738c84 Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Wed, 11 Oct 2017 05:55:52 +0000 Subject: [PATCH 014/219] ixgbe: Remove never defined UDP_IPV4_EX Reviewed by: sbruno Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D12454 --- sys/dev/ixgbe/if_ix.c | 3 --- sys/dev/ixgbe/if_ixv.c | 3 --- sys/dev/ixgbe/ixgbe_rss.h | 1 - 3 files changed, 7 deletions(-) diff --git a/sys/dev/ixgbe/if_ix.c b/sys/dev/ixgbe/if_ix.c index 0902a7ff99a1..5500e57b5229 100644 --- a/sys/dev/ixgbe/if_ix.c +++ b/sys/dev/ixgbe/if_ix.c @@ -469,9 +469,6 @@ ixgbe_initialize_rss_mapping(struct adapter *adapter) mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; - if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) - device_printf(adapter->dev, "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, but not supported\n", - __func__); if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) diff --git a/sys/dev/ixgbe/if_ixv.c b/sys/dev/ixgbe/if_ixv.c index 5e3a3fe03b34..58425a485e8a 100644 --- a/sys/dev/ixgbe/if_ixv.c +++ b/sys/dev/ixgbe/if_ixv.c @@ -1403,9 +1403,6 @@ ixv_initialize_rss_mapping(struct adapter *adapter) __func__); if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; - if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) - device_printf(adapter->dev, "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, but not supported\n", - __func__); if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) diff --git a/sys/dev/ixgbe/ixgbe_rss.h b/sys/dev/ixgbe/ixgbe_rss.h index e22560b99457..7e7620be63f4 100644 --- a/sys/dev/ixgbe/ixgbe_rss.h +++ b/sys/dev/ixgbe/ixgbe_rss.h @@ -49,7 +49,6 @@ #define RSS_HASHTYPE_RSS_IPV6_EX (1 << 5) #define RSS_HASHTYPE_RSS_TCP_IPV6_EX (1 << 6) #define RSS_HASHTYPE_RSS_UDP_IPV4 (1 << 7) -#define RSS_HASHTYPE_RSS_UDP_IPV4_EX (1 << 8) #define RSS_HASHTYPE_RSS_UDP_IPV6 (1 << 9) #define RSS_HASHTYPE_RSS_UDP_IPV6_EX (1 << 10) From 2832cbe7d24814610fbdb020ff9863539a472172 Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Wed, 11 Oct 2017 06:08:01 +0000 Subject: [PATCH 015/219] rss: Remove never defined UDP_IPV4_EX Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D12455 --- sys/net/rss_config.c | 1 - sys/net/rss_config.h | 1 - 2 files changed, 2 deletions(-) diff --git a/sys/net/rss_config.c b/sys/net/rss_config.c index 9597614c210c..0fc62c740a06 100644 --- a/sys/net/rss_config.c +++ b/sys/net/rss_config.c @@ -489,7 +489,6 @@ rss_gethashconfig(void) | RSS_HASHTYPE_RSS_TCP_IPV6_EX #if 0 | RSS_HASHTYPE_RSS_UDP_IPV4 - | RSS_HASHTYPE_RSS_UDP_IPV4_EX | RSS_HASHTYPE_RSS_UDP_IPV6 | RSS_HASHTYPE_RSS_UDP_IPV6_EX #endif diff --git a/sys/net/rss_config.h b/sys/net/rss_config.h index 2ab32a43f58b..202dbef50e72 100644 --- a/sys/net/rss_config.h +++ b/sys/net/rss_config.h @@ -66,7 +66,6 @@ #define RSS_HASHTYPE_RSS_IPV6_EX (1 << 5) /* IPv6 2-tuple + ext hdrs */ #define RSS_HASHTYPE_RSS_TCP_IPV6_EX (1 << 6) /* TCPv6 4-tiple + ext hdrs */ #define RSS_HASHTYPE_RSS_UDP_IPV4 (1 << 7) /* IPv4 UDP 4-tuple */ -#define RSS_HASHTYPE_RSS_UDP_IPV4_EX (1 << 8) /* IPv4 UDP 4-tuple + ext hdrs */ #define RSS_HASHTYPE_RSS_UDP_IPV6 (1 << 9) /* IPv6 UDP 4-tuple */ #define RSS_HASHTYPE_RSS_UDP_IPV6_EX (1 << 10) /* IPv6 UDP 4-tuple + ext hdrs */ From 70e3b262d1128f0e62d736cfaa7a70cc5080f6aa Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Wed, 11 Oct 2017 11:03:11 +0000 Subject: [PATCH 016/219] The th_bintime, th_microtime and th_nanotime members of the timehand all cache the last system time (uptime + boottime). Only the format differs. Do not re-calculate the bintime and simply use the value used to calculate the microtime and nanotime. Group all the updates under the relevant comment. Remove obsoleted XXX part. Submitted by: Sebastian Huber MFC after: 1 week --- sys/kern/kern_tc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sys/kern/kern_tc.c b/sys/kern/kern_tc.c index 088fcb41cfa4..e060f485053d 100644 --- a/sys/kern/kern_tc.c +++ b/sys/kern/kern_tc.c @@ -1413,10 +1413,8 @@ tc_windup(struct bintime *new_boottimebin) if (bt.sec != t) th->th_boottime.sec += bt.sec - t; } - th->th_bintime = th->th_offset; - bintime_add(&th->th_bintime, &th->th_boottime); /* Update the UTC timestamps used by the get*() functions. */ - /* XXX shouldn't do this here. Should force non-`get' versions. */ + th->th_bintime = bt; bintime2timeval(&bt, &th->th_microtime); bintime2timespec(&bt, &th->th_nanotime); From 00d78afd17deaa2a40b02c4273decdc51e896d42 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Wed, 11 Oct 2017 14:34:06 +0000 Subject: [PATCH 017/219] OptionalObsoleteFiles: remove diff from MK_GNU_DIFF=no block diff (and man page) are not from GNU, as of r317209, and should not be deleted if WITHOUT_GNU_DIFF is set. (WITHOUT_GNU_DIFF still controls whether diff3 is built.) Sponsored by: The FreeBSD Foundation --- tools/build/mk/OptionalObsoleteFiles.inc | 2 -- 1 file changed, 2 deletions(-) diff --git a/tools/build/mk/OptionalObsoleteFiles.inc b/tools/build/mk/OptionalObsoleteFiles.inc index c1b46f435063..e8c4bedebc06 100644 --- a/tools/build/mk/OptionalObsoleteFiles.inc +++ b/tools/build/mk/OptionalObsoleteFiles.inc @@ -2480,9 +2480,7 @@ OLD_FILES+=usr/share/man/man8/gpioctl.8.gz .endif .if ${MK_GNU_DIFF} == no -OLD_FILES+=usr/bin/diff OLD_FILES+=usr/bin/diff3 -OLD_FILES+=usr/share/man/man1/diff.1.gz OLD_FILES+=usr/share/man/man1/diff3.1.gz OLD_FILES+=usr/share/man/man7/diff.7.gz .endif From 578ec783ff5d0ced002222ce6238ca0758ee64cd Mon Sep 17 00:00:00 2001 From: Baptiste Daroussin Date: Wed, 11 Oct 2017 14:41:11 +0000 Subject: [PATCH 018/219] Do not try to remove diff.7 optionaly has it is always removed since GNU diff(1) has been replaced with BSD diff(1) --- tools/build/mk/OptionalObsoleteFiles.inc | 1 - 1 file changed, 1 deletion(-) diff --git a/tools/build/mk/OptionalObsoleteFiles.inc b/tools/build/mk/OptionalObsoleteFiles.inc index e8c4bedebc06..82c4b7370fc4 100644 --- a/tools/build/mk/OptionalObsoleteFiles.inc +++ b/tools/build/mk/OptionalObsoleteFiles.inc @@ -2482,7 +2482,6 @@ OLD_FILES+=usr/share/man/man8/gpioctl.8.gz .if ${MK_GNU_DIFF} == no OLD_FILES+=usr/bin/diff3 OLD_FILES+=usr/share/man/man1/diff3.1.gz -OLD_FILES+=usr/share/man/man7/diff.7.gz .endif .if ${MK_GNU_GREP} == no From a7b8be82f09ef1536c55b8963facf0fb5a04c757 Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Wed, 11 Oct 2017 14:59:04 +0000 Subject: [PATCH 019/219] hwpmc(4): Force sufficiently wide type for left shift Ordinary input to this macro comes from pe_code, which is uint16_t. Coverity points out that shifting such a value discards the result of a 24 bit shift, which is not what we want. A follow-up to r324291. CID: 1381676 Sponsored by: Dell EMC Isilon --- sys/dev/hwpmc/hwpmc_amd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/hwpmc/hwpmc_amd.h b/sys/dev/hwpmc/hwpmc_amd.h index 133fbd7114df..7f93333cc854 100644 --- a/sys/dev/hwpmc/hwpmc_amd.h +++ b/sys/dev/hwpmc/hwpmc_amd.h @@ -67,7 +67,7 @@ #define AMD_PMC_EVENTMASK 0xF000000FF #define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK) -#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((x) & 0xF00) << 24)) +#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint32_t)(x) & 0xF00) << 24)) #define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \ AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \ AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK) From 1356a2e6fa2dd0cba0e7e25df3815b51d7ee988e Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Wed, 11 Oct 2017 15:13:40 +0000 Subject: [PATCH 020/219] hwpmc(4): Actually use a sufficiently wide type jhibbits@ points out that left shifting bits 8-11 24 bits won't fit in a 32-bit integer either. Corrects r324533. Submitted by: jhibbits Sponsored by: Dell EMC Isilon --- sys/dev/hwpmc/hwpmc_amd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/hwpmc/hwpmc_amd.h b/sys/dev/hwpmc/hwpmc_amd.h index 7f93333cc854..8b0b29f0e981 100644 --- a/sys/dev/hwpmc/hwpmc_amd.h +++ b/sys/dev/hwpmc/hwpmc_amd.h @@ -67,7 +67,7 @@ #define AMD_PMC_EVENTMASK 0xF000000FF #define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK) -#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint32_t)(x) & 0xF00) << 24)) +#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint64_t)(x) & 0xF00) << 24)) #define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \ AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \ AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK) From c6acf96aac649c34f9455db5eef042522ae19745 Mon Sep 17 00:00:00 2001 From: David C Somayajulu Date: Wed, 11 Oct 2017 18:25:05 +0000 Subject: [PATCH 021/219] Add sanity checks in ql_hw_send() qla_send() to ensure that empty slots in Tx Ring map to empty slot in Tx_buf array before Transmits. If the checks fail further Transmission on that Tx Ring is prevented. MFC after:5 days --- sys/dev/qlxgbe/ql_hw.c | 14 ++++++++++++++ sys/dev/qlxgbe/ql_os.c | 11 +++++++++++ 2 files changed, 25 insertions(+) diff --git a/sys/dev/qlxgbe/ql_hw.c b/sys/dev/qlxgbe/ql_hw.c index 03bb9260f3c2..5bd8c9397ff4 100644 --- a/sys/dev/qlxgbe/ql_hw.c +++ b/sys/dev/qlxgbe/ql_hw.c @@ -2374,6 +2374,20 @@ ql_hw_send(qla_host_t *ha, bus_dma_segment_t *segs, int nsegs, } } + for (i = 0; i < num_tx_cmds; i++) { + int j; + + j = (tx_idx+i) & (NUM_TX_DESCRIPTORS - 1); + + if (NULL != ha->tx_ring[txr_idx].tx_buf[j].m_head) { + QL_ASSERT(ha, 0, \ + ("%s [%d]: txr_idx = %d tx_idx = %d mbuf = %p\n",\ + __func__, __LINE__, txr_idx, j,\ + ha->tx_ring[txr_idx].tx_buf[j].m_head)); + return (EINVAL); + } + } + tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[tx_idx]; if (!(mp->m_pkthdr.csum_flags & CSUM_TSO)) { diff --git a/sys/dev/qlxgbe/ql_os.c b/sys/dev/qlxgbe/ql_os.c index c4391a1b9871..039bbfe74eb7 100644 --- a/sys/dev/qlxgbe/ql_os.c +++ b/sys/dev/qlxgbe/ql_os.c @@ -1232,6 +1232,17 @@ qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; + + if (NULL != ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head) { + QL_ASSERT(ha, 0, ("%s [%d]: txr_idx = %d tx_idx = %d "\ + "mbuf = %p\n", __func__, __LINE__, txr_idx, tx_idx,\ + ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head)); + if (m_head) + m_freem(m_head); + *m_headp = NULL; + return (ret); + } + map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, From 2be6126d2a9dbef60cac2eeec635b084d8ed64e4 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Wed, 11 Oct 2017 19:26:39 +0000 Subject: [PATCH 022/219] libunwind: use upstream patch to disable executable stacks arm uses '@' as a comment character, and cannot use @progbits in the .section directive. Apply the upstream noexec stach change which avoids this issue. Obtained from: LLVM r277868 --- .../libunwind/src/UnwindRegistersRestore.S | 3 ++- .../projects/libunwind/src/UnwindRegistersSave.S | 3 ++- contrib/llvm/projects/libunwind/src/assembly.h | 15 +++++++++++++++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S b/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S index 923ddacbaea6..2330fc2adb5f 100644 --- a/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S +++ b/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S @@ -528,4 +528,5 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv) #endif - .section .note.GNU-stack,"",@progbits +NO_EXEC_STACK_DIRECTIVE + diff --git a/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S b/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S index 0839c446f196..9b66a7657fe4 100644 --- a/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S +++ b/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S @@ -470,4 +470,5 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext) #endif - .section .note.GNU-stack,"",@progbits +NO_EXEC_STACK_DIRECTIVE + diff --git a/contrib/llvm/projects/libunwind/src/assembly.h b/contrib/llvm/projects/libunwind/src/assembly.h index f46a24d0eed9..06b29b364fb5 100644 --- a/contrib/llvm/projects/libunwind/src/assembly.h +++ b/contrib/llvm/projects/libunwind/src/assembly.h @@ -35,19 +35,34 @@ #define SYMBOL_NAME(name) GLUE(__USER_LABEL_PREFIX__, name) #if defined(__APPLE__) + #define SYMBOL_IS_FUNC(name) +#define NO_EXEC_STACK_DIRECTIVE + #elif defined(__ELF__) + #if defined(__arm__) #define SYMBOL_IS_FUNC(name) .type name,%function #else #define SYMBOL_IS_FUNC(name) .type name,@function #endif + +#if defined(__GNU__) || defined(__ANDROID__) || defined(__FreeBSD__) +#define NO_EXEC_STACK_DIRECTIVE .section .note.GNU-stack,"",%progbits #else +#define NO_EXEC_STACK_DIRECTIVE +#endif + +#else + #define SYMBOL_IS_FUNC(name) \ .def name SEPARATOR \ .scl 2 SEPARATOR \ .type 32 SEPARATOR \ .endef + +#define NO_EXEC_STACK_DIRECTIVE + #endif #define DEFINE_LIBUNWIND_FUNCTION(name) \ From d7d2f0d4d10ddcc2f27b4f014eea2fd13948e516 Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Wed, 11 Oct 2017 20:04:30 +0000 Subject: [PATCH 023/219] crypto(9): Print flags in more useful hex Sponsored by: Dell EMC Isilon --- sys/opencrypto/crypto.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/opencrypto/crypto.c b/sys/opencrypto/crypto.c index 413a652a3d2e..617d751111f0 100644 --- a/sys/opencrypto/crypto.c +++ b/sys/opencrypto/crypto.c @@ -572,7 +572,7 @@ crypto_get_driverid(device_t dev, int flags) crypto_drivers[i].cc_dev = dev; crypto_drivers[i].cc_flags = flags; if (bootverbose) - printf("crypto: assign %s driver id %u, flags %u\n", + printf("crypto: assign %s driver id %u, flags 0x%x\n", device_get_nameunit(dev), i, flags); CRYPTO_DRIVER_UNLOCK(); From ab142b3f492cfa96b77b48a8b51442d9c95c8c4f Mon Sep 17 00:00:00 2001 From: David C Somayajulu Date: Wed, 11 Oct 2017 20:22:01 +0000 Subject: [PATCH 024/219] Added support driver state capture/retrieval MFC after:5 days --- sys/dev/qlxgbe/ql_def.h | 1 - sys/dev/qlxgbe/ql_glbl.h | 4 + sys/dev/qlxgbe/ql_hw.h | 3 + sys/dev/qlxgbe/ql_ioctl.c | 228 ++++++++++++++++++++++++++++++++++++++ sys/dev/qlxgbe/ql_ioctl.h | 72 ++++++++++++ sys/dev/qlxgbe/ql_os.c | 2 + sys/dev/qlxgbe/ql_ver.h | 2 +- 7 files changed, 310 insertions(+), 2 deletions(-) diff --git a/sys/dev/qlxgbe/ql_def.h b/sys/dev/qlxgbe/ql_def.h index d768dbd4212a..8d864ab75ba7 100644 --- a/sys/dev/qlxgbe/ql_def.h +++ b/sys/dev/qlxgbe/ql_def.h @@ -201,7 +201,6 @@ struct qla_host { qla_rx_buf_t *rxb_free; uint32_t rxb_free_count; - volatile uint32_t posting; /* stats */ uint32_t err_m_getcl; diff --git a/sys/dev/qlxgbe/ql_glbl.h b/sys/dev/qlxgbe/ql_glbl.h index 2af8b97ad5ad..f8c7c8b165c1 100644 --- a/sys/dev/qlxgbe/ql_glbl.h +++ b/sys/dev/qlxgbe/ql_glbl.h @@ -112,4 +112,8 @@ extern unsigned int ql83xx_resetseq_len; extern unsigned char ql83xx_minidump[]; extern unsigned int ql83xx_minidump_len; +extern void ql_alloc_drvr_state_buffer(qla_host_t *ha); +extern void ql_free_drvr_state_buffer(qla_host_t *ha); +extern void ql_capture_drvr_state(qla_host_t *ha); + #endif /* #ifndef_QL_GLBL_H_ */ diff --git a/sys/dev/qlxgbe/ql_hw.h b/sys/dev/qlxgbe/ql_hw.h index 84260087f16f..e8f53c86407d 100644 --- a/sys/dev/qlxgbe/ql_hw.h +++ b/sys/dev/qlxgbe/ql_hw.h @@ -1703,6 +1703,9 @@ typedef struct _qla_hw { uint32_t mdump_buffer_size; void *mdump_template; uint32_t mdump_template_size; + + /* driver state related */ + void *drvr_state; } qla_hw_t; #define QL_UPDATE_RDS_PRODUCER_INDEX(ha, prod_reg, val) \ diff --git a/sys/dev/qlxgbe/ql_ioctl.c b/sys/dev/qlxgbe/ql_ioctl.c index 8284cc72306c..7675d54823c4 100644 --- a/sys/dev/qlxgbe/ql_ioctl.c +++ b/sys/dev/qlxgbe/ql_ioctl.c @@ -39,7 +39,11 @@ __FBSDID("$FreeBSD$"); #include "ql_inline.h" #include "ql_glbl.h" #include "ql_ioctl.h" +#include "ql_ver.h" +#include "ql_dbg.h" +static int ql_drvr_state(qla_host_t *ha, qla_driver_state_t *drvr_state); +static uint32_t ql_drvr_state_size(qla_host_t *ha); static int ql_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td); @@ -279,6 +283,10 @@ ql_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, rval = ENXIO; break; + case QLA_RD_DRVR_STATE: + rval = ql_drvr_state(ha, (qla_driver_state_t *)data); + break; + case QLA_RD_PCI_IDS: pci_ids = (qla_rd_pci_ids_t *)data; pci_ids->ven_id = pci_get_vendor(pci_dev); @@ -295,3 +303,223 @@ ql_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, return rval; } + +static int +ql_drvr_state(qla_host_t *ha, qla_driver_state_t *state) +{ + int rval = 0; + uint32_t drvr_state_size; + qla_drvr_state_hdr_t *hdr; + + drvr_state_size = ql_drvr_state_size(ha); + + if (state->buffer == NULL) { + state->size = drvr_state_size; + return (0); + } + + if (state->size < drvr_state_size) + return (ENXIO); + + if (ha->hw.drvr_state == NULL) + return (ENOMEM); + + hdr = ha->hw.drvr_state; + + if (!hdr->drvr_version_major) + ql_capture_drvr_state(ha); + + rval = copyout(ha->hw.drvr_state, state->buffer, drvr_state_size); + + bzero(ha->hw.drvr_state, drvr_state_size); + + return (rval); +} + +static uint32_t +ql_drvr_state_size(qla_host_t *ha) +{ + uint32_t drvr_state_size; + uint32_t size; + + size = sizeof (qla_drvr_state_hdr_t); + drvr_state_size = QL_ALIGN(size, 64); + + size = ha->hw.num_tx_rings * (sizeof (qla_drvr_state_tx_t)); + drvr_state_size += QL_ALIGN(size, 64); + + size = ha->hw.num_rds_rings * (sizeof (qla_drvr_state_rx_t)); + drvr_state_size += QL_ALIGN(size, 64); + + size = ha->hw.num_sds_rings * (sizeof (qla_drvr_state_sds_t)); + drvr_state_size += QL_ALIGN(size, 64); + + size = sizeof(q80_tx_cmd_t) * NUM_TX_DESCRIPTORS * ha->hw.num_tx_rings; + drvr_state_size += QL_ALIGN(size, 64); + + size = sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS * ha->hw.num_rds_rings; + drvr_state_size += QL_ALIGN(size, 64); + + size = sizeof(q80_stat_desc_t) * NUM_STATUS_DESCRIPTORS * + ha->hw.num_sds_rings; + drvr_state_size += QL_ALIGN(size, 64); + + return (drvr_state_size); +} + +static void +ql_get_tx_state(qla_host_t *ha, qla_drvr_state_tx_t *tx_state) +{ + int i; + + for (i = 0; i < ha->hw.num_tx_rings; i++) { + tx_state->base_p_addr = ha->hw.tx_cntxt[i].tx_ring_paddr; + tx_state->cons_p_addr = ha->hw.tx_cntxt[i].tx_cons_paddr; + tx_state->tx_prod_reg = ha->hw.tx_cntxt[i].tx_prod_reg; + tx_state->tx_cntxt_id = ha->hw.tx_cntxt[i].tx_cntxt_id; + tx_state->txr_free = ha->hw.tx_cntxt[i].txr_free; + tx_state->txr_next = ha->hw.tx_cntxt[i].txr_next; + tx_state->txr_comp = ha->hw.tx_cntxt[i].txr_comp; + tx_state++; + } + return; +} + +static void +ql_get_rx_state(qla_host_t *ha, qla_drvr_state_rx_t *rx_state) +{ + int i; + + for (i = 0; i < ha->hw.num_rds_rings; i++) { + rx_state->prod_std = ha->hw.rds[i].prod_std; + rx_state->rx_next = ha->hw.rds[i].rx_next; + rx_state++; + } + return; +} + +static void +ql_get_sds_state(qla_host_t *ha, qla_drvr_state_sds_t *sds_state) +{ + int i; + + for (i = 0; i < ha->hw.num_sds_rings; i++) { + sds_state->sdsr_next = ha->hw.sds[i].sdsr_next; + sds_state->sds_consumer = ha->hw.sds[i].sds_consumer; + sds_state++; + } + return; +} + +void +ql_capture_drvr_state(qla_host_t *ha) +{ + uint8_t *state_buffer; + uint8_t *ptr; + uint32_t drvr_state_size; + qla_drvr_state_hdr_t *hdr; + uint32_t size; + int i; + + drvr_state_size = ql_drvr_state_size(ha); + + state_buffer = ha->hw.drvr_state; + + if (state_buffer == NULL) + return; + + bzero(state_buffer, drvr_state_size); + + hdr = (qla_drvr_state_hdr_t *)state_buffer; + + hdr->drvr_version_major = QLA_VERSION_MAJOR; + hdr->drvr_version_minor = QLA_VERSION_MINOR; + hdr->drvr_version_build = QLA_VERSION_BUILD; + + bcopy(ha->hw.mac_addr, hdr->mac_addr, ETHER_ADDR_LEN); + + hdr->link_speed = ha->hw.link_speed; + hdr->cable_length = ha->hw.cable_length; + hdr->cable_oui = ha->hw.cable_oui; + hdr->link_up = ha->hw.link_up; + hdr->module_type = ha->hw.module_type; + hdr->link_faults = ha->hw.link_faults; + hdr->rcv_intr_coalesce = ha->hw.rcv_intr_coalesce; + hdr->xmt_intr_coalesce = ha->hw.xmt_intr_coalesce; + + size = sizeof (qla_drvr_state_hdr_t); + hdr->tx_state_offset = QL_ALIGN(size, 64); + + ptr = state_buffer + hdr->tx_state_offset; + + ql_get_tx_state(ha, (qla_drvr_state_tx_t *)ptr); + + size = ha->hw.num_tx_rings * (sizeof (qla_drvr_state_tx_t)); + hdr->rx_state_offset = hdr->tx_state_offset + QL_ALIGN(size, 64); + ptr = state_buffer + hdr->rx_state_offset; + + ql_get_rx_state(ha, (qla_drvr_state_rx_t *)ptr); + + size = ha->hw.num_rds_rings * (sizeof (qla_drvr_state_rx_t)); + hdr->sds_state_offset = hdr->rx_state_offset + QL_ALIGN(size, 64); + ptr = state_buffer + hdr->sds_state_offset; + + ql_get_sds_state(ha, (qla_drvr_state_sds_t *)ptr); + + size = ha->hw.num_sds_rings * (sizeof (qla_drvr_state_sds_t)); + hdr->txr_offset = hdr->sds_state_offset + QL_ALIGN(size, 64); + ptr = state_buffer + hdr->txr_offset; + + hdr->num_tx_rings = ha->hw.num_tx_rings; + hdr->txr_size = sizeof(q80_tx_cmd_t) * NUM_TX_DESCRIPTORS; + hdr->txr_entries = NUM_TX_DESCRIPTORS; + + size = hdr->num_tx_rings * hdr->txr_size; + bcopy(ha->hw.dma_buf.tx_ring.dma_b, ptr, size); + + hdr->rxr_offset = hdr->txr_offset + QL_ALIGN(size, 64); + ptr = state_buffer + hdr->rxr_offset; + + hdr->rxr_size = sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS; + hdr->rxr_entries = NUM_RX_DESCRIPTORS; + hdr->num_rx_rings = ha->hw.num_rds_rings; + + for (i = 0; i < ha->hw.num_rds_rings; i++) { + bcopy(ha->hw.dma_buf.rds_ring[i].dma_b, ptr, hdr->rxr_size); + ptr += hdr->rxr_size; + } + + size = hdr->rxr_size * hdr->num_rx_rings; + hdr->sds_offset = hdr->rxr_offset + QL_ALIGN(size, 64); + hdr->sds_ring_size = sizeof(q80_stat_desc_t) * NUM_STATUS_DESCRIPTORS; + hdr->sds_entries = NUM_STATUS_DESCRIPTORS; + hdr->num_sds_rings = ha->hw.num_sds_rings; + + ptr = state_buffer + hdr->sds_offset; + for (i = 0; i < ha->hw.num_sds_rings; i++) { + bcopy(ha->hw.dma_buf.sds_ring[i].dma_b, ptr, hdr->sds_ring_size); + ptr += hdr->sds_ring_size; + } + return; +} + +void +ql_alloc_drvr_state_buffer(qla_host_t *ha) +{ + uint32_t drvr_state_size; + + drvr_state_size = ql_drvr_state_size(ha); + + ha->hw.drvr_state = malloc(drvr_state_size, M_QLA83XXBUF, M_NOWAIT); + + return; +} + +void +ql_free_drvr_state_buffer(qla_host_t *ha) +{ + if (ha->hw.drvr_state != NULL) + free(ha->hw.drvr_state, M_QLA83XXBUF); + return; +} + diff --git a/sys/dev/qlxgbe/ql_ioctl.h b/sys/dev/qlxgbe/ql_ioctl.h index 8787af4e611c..f985958a74e6 100644 --- a/sys/dev/qlxgbe/ql_ioctl.h +++ b/sys/dev/qlxgbe/ql_ioctl.h @@ -93,6 +93,72 @@ struct qla_rd_fw_dump { }; typedef struct qla_rd_fw_dump qla_rd_fw_dump_t; +struct qla_drvr_state_tx { + uint64_t base_p_addr; + uint64_t cons_p_addr; + uint32_t tx_prod_reg; + uint32_t tx_cntxt_id; + uint32_t txr_free; + uint32_t txr_next; + uint32_t txr_comp; +}; +typedef struct qla_drvr_state_tx qla_drvr_state_tx_t; + +struct qla_drvr_state_sds { + uint32_t sdsr_next; /* next entry in SDS ring to process */ + uint32_t sds_consumer; +}; +typedef struct qla_drvr_state_sds qla_drvr_state_sds_t; + +struct qla_drvr_state_rx { + uint32_t prod_std; + uint32_t rx_next; /* next standard rcv ring to arm fw */; +}; +typedef struct qla_drvr_state_rx qla_drvr_state_rx_t; + +struct qla_drvr_state_hdr { + uint32_t drvr_version_major; + uint32_t drvr_version_minor; + uint32_t drvr_version_build; + + uint8_t mac_addr[ETHER_ADDR_LEN]; + uint16_t link_speed; + uint16_t cable_length; + uint32_t cable_oui; + uint8_t link_up; + uint8_t module_type; + uint8_t link_faults; + uint32_t rcv_intr_coalesce; + uint32_t xmt_intr_coalesce; + + uint32_t tx_state_offset;/* size = sizeof (qla_drvr_state_tx_t) * num_tx_rings */ + uint32_t rx_state_offset;/* size = sizeof (qla_drvr_state_rx_t) * num_rx_rings */ + uint32_t sds_state_offset;/* size = sizeof (qla_drvr_state_sds_t) * num_sds_rings */ + + uint32_t num_tx_rings; /* number of tx rings */ + uint32_t txr_size; /* size of each tx ring in bytes */ + uint32_t txr_entries; /* number of descriptors in each tx ring */ + uint32_t txr_offset; /* start of tx ring [0 - #rings] content */ + + uint32_t num_rx_rings; /* number of rx rings */ + uint32_t rxr_size; /* size of each rx ring in bytes */ + uint32_t rxr_entries; /* number of descriptors in each rx ring */ + uint32_t rxr_offset; /* start of rx ring [0 - #rings] content */ + + uint32_t num_sds_rings; /* number of sds rings */ + uint32_t sds_ring_size; /* size of each sds ring in bytes */ + uint32_t sds_entries; /* number of descriptors in each sds ring */ + uint32_t sds_offset; /* start of sds ring [0 - #rings] content */ +}; + +typedef struct qla_drvr_state_hdr qla_drvr_state_hdr_t; + +struct qla_driver_state { + uint32_t size; + void *buffer; +}; +typedef struct qla_driver_state qla_driver_state_t; + /* * Read/Write Register */ @@ -133,4 +199,10 @@ typedef struct qla_rd_fw_dump qla_rd_fw_dump_t; */ #define QLA_RD_FW_DUMP _IOWR('q', 8, qla_rd_fw_dump_t) +/* + * Read Driver State + */ +#define QLA_RD_DRVR_STATE _IOWR('q', 9, qla_driver_state_t) + + #endif /* #ifndef _QL_IOCTL_H_ */ diff --git a/sys/dev/qlxgbe/ql_os.c b/sys/dev/qlxgbe/ql_os.c index 039bbfe74eb7..fb94f3994bdf 100644 --- a/sys/dev/qlxgbe/ql_os.c +++ b/sys/dev/qlxgbe/ql_os.c @@ -492,6 +492,7 @@ qla_pci_attach(device_t dev) device_printf(dev, "%s: ql_minidump_init failed\n", __func__); goto qla_pci_attach_err; } + ql_alloc_drvr_state_buffer(ha); /* create the o.s ethernet interface */ qla_init_ifnet(dev, ha); @@ -645,6 +646,7 @@ qla_release(qla_host_t *ha) if (ha->ifp != NULL) ether_ifdetach(ha->ifp); + ql_free_drvr_state_buffer(ha); ql_free_dma(ha); qla_free_parent_dma_tag(ha); diff --git a/sys/dev/qlxgbe/ql_ver.h b/sys/dev/qlxgbe/ql_ver.h index e6c06ed299dd..24a9d30d1901 100644 --- a/sys/dev/qlxgbe/ql_ver.h +++ b/sys/dev/qlxgbe/ql_ver.h @@ -36,6 +36,6 @@ #define QLA_VERSION_MAJOR 3 #define QLA_VERSION_MINOR 10 -#define QLA_VERSION_BUILD 34 +#define QLA_VERSION_BUILD 35 #endif /* #ifndef _QL_VER_H_ */ From 3bdf4c4274647c155aab95a305aa391dfc07022b Mon Sep 17 00:00:00 2001 From: Gleb Smirnoff Date: Wed, 11 Oct 2017 20:36:09 +0000 Subject: [PATCH 025/219] Declare more TCP globals in tcp_var.h, so that alternative TCP stacks can use them. Gather all TCP tunables in tcp_var.h in one place and alphabetically sort them, to ease maintainance of the list. Don't copy and paste declarations in tcp_stacks/fastpath.c. --- sys/netinet/tcp_input.c | 7 -- sys/netinet/tcp_output.c | 4 -- sys/netinet/tcp_sack.c | 3 - sys/netinet/tcp_stacks/fastpath.c | 15 ----- sys/netinet/tcp_var.h | 107 +++++++++++++++++++----------- 5 files changed, 67 insertions(+), 69 deletions(-) diff --git a/sys/netinet/tcp_input.c b/sys/netinet/tcp_input.c index 28b9b0de7cc5..6961d24a2342 100644 --- a/sys/netinet/tcp_input.c +++ b/sys/netinet/tcp_input.c @@ -145,7 +145,6 @@ SYSCTL_INT(_net_inet_tcp, OID_AUTO, delayed_ack, CTLFLAG_VNET | CTLFLAG_RW, "Delay ACK to try and piggyback it onto a data packet"); VNET_DEFINE(int, drop_synfin) = 0; -#define V_drop_synfin VNET(drop_synfin) SYSCTL_INT(_net_inet_tcp, OID_AUTO, drop_synfin, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(drop_synfin), 0, "Drop TCP packets with SYN+FIN set"); @@ -156,7 +155,6 @@ SYSCTL_INT(_net_inet_tcp, OID_AUTO, rfc6675_pipe, CTLFLAG_VNET | CTLFLAG_RW, "Use calculated pipe/in-flight bytes per RFC 6675"); VNET_DEFINE(int, tcp_do_rfc3042) = 1; -#define V_tcp_do_rfc3042 VNET(tcp_do_rfc3042) SYSCTL_INT(_net_inet_tcp, OID_AUTO, rfc3042, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_do_rfc3042), 0, "Enable RFC 3042 (Limited Transmit)"); @@ -194,13 +192,11 @@ SYSCTL_INT(_net_inet_tcp_ecn, OID_AUTO, maxretries, CTLFLAG_VNET | CTLFLAG_RW, "Max retries before giving up on ECN"); VNET_DEFINE(int, tcp_insecure_syn) = 0; -#define V_tcp_insecure_syn VNET(tcp_insecure_syn) SYSCTL_INT(_net_inet_tcp, OID_AUTO, insecure_syn, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_insecure_syn), 0, "Follow RFC793 instead of RFC5961 criteria for accepting SYN packets"); VNET_DEFINE(int, tcp_insecure_rst) = 0; -#define V_tcp_insecure_rst VNET(tcp_insecure_rst) SYSCTL_INT(_net_inet_tcp, OID_AUTO, insecure_rst, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_insecure_rst), 0, "Follow RFC793 instead of RFC5961 criteria for accepting RST packets"); @@ -211,19 +207,16 @@ SYSCTL_INT(_net_inet_tcp, TCPCTL_RECVSPACE, recvspace, CTLFLAG_VNET | CTLFLAG_RW &VNET_NAME(tcp_recvspace), 0, "Initial receive socket buffer size"); VNET_DEFINE(int, tcp_do_autorcvbuf) = 1; -#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf) SYSCTL_INT(_net_inet_tcp, OID_AUTO, recvbuf_auto, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_do_autorcvbuf), 0, "Enable automatic receive buffer sizing"); VNET_DEFINE(int, tcp_autorcvbuf_inc) = 16*1024; -#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc) SYSCTL_INT(_net_inet_tcp, OID_AUTO, recvbuf_inc, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_autorcvbuf_inc), 0, "Incrementor step size of automatic receive buffer"); VNET_DEFINE(int, tcp_autorcvbuf_max) = 2*1024*1024; -#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max) SYSCTL_INT(_net_inet_tcp, OID_AUTO, recvbuf_max, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_autorcvbuf_max), 0, "Max size of automatic receive buffer"); diff --git a/sys/netinet/tcp_output.c b/sys/netinet/tcp_output.c index 2c9898469d71..2afd3e7e0940 100644 --- a/sys/netinet/tcp_output.c +++ b/sys/netinet/tcp_output.c @@ -102,7 +102,6 @@ SYSCTL_INT(_net_inet_tcp, OID_AUTO, path_mtu_discovery, CTLFLAG_VNET | CTLFLAG_R "Enable Path MTU Discovery"); VNET_DEFINE(int, tcp_do_tso) = 1; -#define V_tcp_do_tso VNET(tcp_do_tso) SYSCTL_INT(_net_inet_tcp, OID_AUTO, tso, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_do_tso), 0, "Enable TCP Segmentation Offload"); @@ -113,19 +112,16 @@ SYSCTL_INT(_net_inet_tcp, TCPCTL_SENDSPACE, sendspace, CTLFLAG_VNET | CTLFLAG_RW &VNET_NAME(tcp_sendspace), 0, "Initial send socket buffer size"); VNET_DEFINE(int, tcp_do_autosndbuf) = 1; -#define V_tcp_do_autosndbuf VNET(tcp_do_autosndbuf) SYSCTL_INT(_net_inet_tcp, OID_AUTO, sendbuf_auto, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_do_autosndbuf), 0, "Enable automatic send buffer sizing"); VNET_DEFINE(int, tcp_autosndbuf_inc) = 8*1024; -#define V_tcp_autosndbuf_inc VNET(tcp_autosndbuf_inc) SYSCTL_INT(_net_inet_tcp, OID_AUTO, sendbuf_inc, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_autosndbuf_inc), 0, "Incrementor step size of automatic send buffer"); VNET_DEFINE(int, tcp_autosndbuf_max) = 2*1024*1024; -#define V_tcp_autosndbuf_max VNET(tcp_autosndbuf_max) SYSCTL_INT(_net_inet_tcp, OID_AUTO, sendbuf_max, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_autosndbuf_max), 0, "Max size of automatic send buffer"); diff --git a/sys/netinet/tcp_sack.c b/sys/netinet/tcp_sack.c index d96e19ea1e1a..6a750fcd0496 100644 --- a/sys/netinet/tcp_sack.c +++ b/sys/netinet/tcp_sack.c @@ -133,19 +133,16 @@ SYSCTL_INT(_net_inet_tcp_sack, OID_AUTO, enable, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_do_sack), 0, "Enable/Disable TCP SACK support"); VNET_DEFINE(int, tcp_sack_maxholes) = 128; -#define V_tcp_sack_maxholes VNET(tcp_sack_maxholes) SYSCTL_INT(_net_inet_tcp_sack, OID_AUTO, maxholes, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_sack_maxholes), 0, "Maximum number of TCP SACK holes allowed per connection"); VNET_DEFINE(int, tcp_sack_globalmaxholes) = 65536; -#define V_tcp_sack_globalmaxholes VNET(tcp_sack_globalmaxholes) SYSCTL_INT(_net_inet_tcp_sack, OID_AUTO, globalmaxholes, CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(tcp_sack_globalmaxholes), 0, "Global maximum number of TCP SACK holes"); VNET_DEFINE(int, tcp_sack_globalholes) = 0; -#define V_tcp_sack_globalholes VNET(tcp_sack_globalholes) SYSCTL_INT(_net_inet_tcp_sack, OID_AUTO, globalholes, CTLFLAG_VNET | CTLFLAG_RD, &VNET_NAME(tcp_sack_globalholes), 0, "Global number of TCP SACK holes currently allocated"); diff --git a/sys/netinet/tcp_stacks/fastpath.c b/sys/netinet/tcp_stacks/fastpath.c index 42a5d9525678..92db0d551fee 100644 --- a/sys/netinet/tcp_stacks/fastpath.c +++ b/sys/netinet/tcp_stacks/fastpath.c @@ -120,21 +120,6 @@ __FBSDID("$FreeBSD$"); #include -VNET_DECLARE(int, tcp_autorcvbuf_inc); -#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc) -VNET_DECLARE(int, tcp_autorcvbuf_max); -#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max) -VNET_DECLARE(int, tcp_do_rfc3042); -#define V_tcp_do_rfc3042 VNET(tcp_do_rfc3042) -VNET_DECLARE(int, tcp_do_autorcvbuf); -#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf) -VNET_DECLARE(int, tcp_insecure_rst); -#define V_tcp_insecure_rst VNET(tcp_insecure_rst) -VNET_DECLARE(int, tcp_insecure_syn); -#define V_tcp_insecure_syn VNET(tcp_insecure_syn) -VNET_DECLARE(int, drop_synfin); -#define V_drop_synfin VNET(drop_synfin) - static void tcp_do_segment_fastslow(struct mbuf *, struct tcphdr *, struct socket *, struct tcpcb *, int, int, uint8_t, int); diff --git a/sys/netinet/tcp_var.h b/sys/netinet/tcp_var.h index 967a51398630..1210a32eb2b4 100644 --- a/sys/netinet/tcp_var.h +++ b/sys/netinet/tcp_var.h @@ -201,12 +201,6 @@ struct tcpcb { #endif /* _KERNEL || _WANT_TCPCB */ #ifdef _KERNEL -/* - * Kernel variables for tcp. - */ -VNET_DECLARE(int, tcp_do_rfc1323); -#define V_tcp_do_rfc1323 VNET(tcp_do_rfc1323) - struct tcptemp { u_char tt_ipgen[40]; /* the size must be of max ip header, now IPv6 */ struct tcphdr tt_t; @@ -701,50 +695,83 @@ SYSCTL_DECL(_net_inet_tcp_sack); MALLOC_DECLARE(M_TCPLOG); #endif -VNET_DECLARE(struct inpcbhead, tcb); /* queue of active tcpcb's */ -VNET_DECLARE(struct inpcbinfo, tcbinfo); extern int tcp_log_in_vain; -VNET_DECLARE(int, tcp_mssdflt); /* XXX */ -VNET_DECLARE(int, tcp_minmss); -VNET_DECLARE(int, tcp_delack_enabled); -VNET_DECLARE(int, tcp_do_rfc3390); -VNET_DECLARE(int, tcp_initcwnd_segments); -VNET_DECLARE(int, tcp_sendspace); -VNET_DECLARE(int, tcp_recvspace); + +/* + * Global TCP tunables shared between different stacks. + * Please keep the list sorted. + */ +VNET_DECLARE(int, drop_synfin); VNET_DECLARE(int, path_mtu_discovery); -VNET_DECLARE(int, tcp_do_rfc3465); VNET_DECLARE(int, tcp_abc_l_var); -#define V_tcb VNET(tcb) -#define V_tcbinfo VNET(tcbinfo) -#define V_tcp_mssdflt VNET(tcp_mssdflt) -#define V_tcp_minmss VNET(tcp_minmss) -#define V_tcp_delack_enabled VNET(tcp_delack_enabled) -#define V_tcp_do_rfc3390 VNET(tcp_do_rfc3390) -#define V_tcp_initcwnd_segments VNET(tcp_initcwnd_segments) -#define V_tcp_sendspace VNET(tcp_sendspace) -#define V_tcp_recvspace VNET(tcp_recvspace) -#define V_path_mtu_discovery VNET(path_mtu_discovery) -#define V_tcp_do_rfc3465 VNET(tcp_do_rfc3465) -#define V_tcp_abc_l_var VNET(tcp_abc_l_var) - -VNET_DECLARE(int, tcp_do_sack); /* SACK enabled/disabled */ -VNET_DECLARE(int, tcp_sc_rst_sock_fail); /* RST on sock alloc failure */ -#define V_tcp_do_sack VNET(tcp_do_sack) -#define V_tcp_sc_rst_sock_fail VNET(tcp_sc_rst_sock_fail) - -VNET_DECLARE(int, tcp_do_ecn); /* TCP ECN enabled/disabled */ +VNET_DECLARE(int, tcp_autorcvbuf_inc); +VNET_DECLARE(int, tcp_autorcvbuf_max); +VNET_DECLARE(int, tcp_autosndbuf_inc); +VNET_DECLARE(int, tcp_autosndbuf_max); +VNET_DECLARE(int, tcp_delack_enabled); +VNET_DECLARE(int, tcp_do_autorcvbuf); +VNET_DECLARE(int, tcp_do_autosndbuf); +VNET_DECLARE(int, tcp_do_ecn); +VNET_DECLARE(int, tcp_do_rfc1323); +VNET_DECLARE(int, tcp_do_rfc3042); +VNET_DECLARE(int, tcp_do_rfc3390); +VNET_DECLARE(int, tcp_do_rfc3465); +VNET_DECLARE(int, tcp_do_rfc6675_pipe); +VNET_DECLARE(int, tcp_do_sack); +VNET_DECLARE(int, tcp_do_tso); VNET_DECLARE(int, tcp_ecn_maxretries); -#define V_tcp_do_ecn VNET(tcp_do_ecn) -#define V_tcp_ecn_maxretries VNET(tcp_ecn_maxretries) +VNET_DECLARE(int, tcp_initcwnd_segments); +VNET_DECLARE(int, tcp_insecure_rst); +VNET_DECLARE(int, tcp_insecure_syn); +VNET_DECLARE(int, tcp_minmss); +VNET_DECLARE(int, tcp_mssdflt); +VNET_DECLARE(int, tcp_recvspace); +VNET_DECLARE(int, tcp_sack_globalholes); +VNET_DECLARE(int, tcp_sack_globalmaxholes); +VNET_DECLARE(int, tcp_sack_maxholes); +VNET_DECLARE(int, tcp_sc_rst_sock_fail); +VNET_DECLARE(int, tcp_sendspace); +VNET_DECLARE(struct inpcbhead, tcb); +VNET_DECLARE(struct inpcbinfo, tcbinfo); + +#define V_drop_synfin VNET(drop_synfin) +#define V_path_mtu_discovery VNET(path_mtu_discovery) +#define V_tcb VNET(tcb) +#define V_tcbinfo VNET(tcbinfo) +#define V_tcp_abc_l_var VNET(tcp_abc_l_var) +#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc) +#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max) +#define V_tcp_autosndbuf_inc VNET(tcp_autosndbuf_inc) +#define V_tcp_autosndbuf_max VNET(tcp_autosndbuf_max) +#define V_tcp_delack_enabled VNET(tcp_delack_enabled) +#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf) +#define V_tcp_do_autosndbuf VNET(tcp_do_autosndbuf) +#define V_tcp_do_ecn VNET(tcp_do_ecn) +#define V_tcp_do_rfc1323 VNET(tcp_do_rfc1323) +#define V_tcp_do_rfc3042 VNET(tcp_do_rfc3042) +#define V_tcp_do_rfc3390 VNET(tcp_do_rfc3390) +#define V_tcp_do_rfc3465 VNET(tcp_do_rfc3465) +#define V_tcp_do_rfc6675_pipe VNET(tcp_do_rfc6675_pipe) +#define V_tcp_do_sack VNET(tcp_do_sack) +#define V_tcp_do_tso VNET(tcp_do_tso) +#define V_tcp_ecn_maxretries VNET(tcp_ecn_maxretries) +#define V_tcp_initcwnd_segments VNET(tcp_initcwnd_segments) +#define V_tcp_insecure_rst VNET(tcp_insecure_rst) +#define V_tcp_insecure_syn VNET(tcp_insecure_syn) +#define V_tcp_minmss VNET(tcp_minmss) +#define V_tcp_mssdflt VNET(tcp_mssdflt) +#define V_tcp_recvspace VNET(tcp_recvspace) +#define V_tcp_sack_globalholes VNET(tcp_sack_globalholes) +#define V_tcp_sack_globalmaxholes VNET(tcp_sack_globalmaxholes) +#define V_tcp_sack_maxholes VNET(tcp_sack_maxholes) +#define V_tcp_sc_rst_sock_fail VNET(tcp_sc_rst_sock_fail) +#define V_tcp_sendspace VNET(tcp_sendspace) #ifdef TCP_HHOOK VNET_DECLARE(struct hhook_head *, tcp_hhh[HHOOK_TCP_LAST + 1]); #define V_tcp_hhh VNET(tcp_hhh) #endif -VNET_DECLARE(int, tcp_do_rfc6675_pipe); -#define V_tcp_do_rfc6675_pipe VNET(tcp_do_rfc6675_pipe) - int tcp_addoptions(struct tcpopt *, u_char *); int tcp_ccalgounload(struct cc_algo *unload_algo); struct tcpcb * From 333dcaa4981d495bc1606a3bdf7445be56a451d5 Mon Sep 17 00:00:00 2001 From: Matt Joras Date: Wed, 11 Oct 2017 21:53:50 +0000 Subject: [PATCH 026/219] Add clearing function for unr(9). Previously before you could call unrhdr_delete you needed to individually free every allocated unit. It is useful to be able to tear down the unr without having to go through this process, as it is significantly faster than freeing the individual units. Reviewed by: cem, lidl Approved by: rstone (mentor) Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12591 --- share/man/man9/Makefile | 1 + share/man/man9/unr.9 | 15 +++++++++++++-- sys/kern/subr_unit.c | 21 +++++++++++++++++++++ sys/sys/systm.h | 1 + 4 files changed, 36 insertions(+), 2 deletions(-) diff --git a/share/man/man9/Makefile b/share/man/man9/Makefile index bcfcb52b0152..1540bfa9d4dd 100644 --- a/share/man/man9/Makefile +++ b/share/man/man9/Makefile @@ -414,6 +414,7 @@ MAN= accept_filter.9 \ MLINKS= unr.9 alloc_unr.9 \ unr.9 alloc_unrl.9 \ unr.9 alloc_unr_specific.9 \ + unr.9 clear_unrhdr.9 \ unr.9 delete_unrhdr.9 \ unr.9 free_unr.9 \ unr.9 new_unrhdr.9 diff --git a/share/man/man9/unr.9 b/share/man/man9/unr.9 index d8b9d9585352..fe1299d40e5d 100644 --- a/share/man/man9/unr.9 +++ b/share/man/man9/unr.9 @@ -24,11 +24,12 @@ .\" .\" $FreeBSD$ .\" -.Dd July 5, 2010 +.Dd October 4, 2017 .Dt UNR 9 .Os .Sh NAME .Nm new_unrhdr , +.Nm clear_unrhdr , .Nm delete_unrhdr , .Nm alloc_unr , .Nm alloc_unr_specific , @@ -39,6 +40,8 @@ .Ft "struct unrhdr *" .Fn new_unrhdr "int low" "int high" "struct mtx *mutex" .Ft void +.Fn clear_unrhdr "struct unrhdr *uh" +.Ft void .Fn delete_unrhdr "struct unrhdr *uh" .Ft int .Fn alloc_unr "struct unrhdr *uh" @@ -70,8 +73,16 @@ is not .Dv NULL , it is used for locking when allocating and freeing units. Otherwise, internal mutex is used. +.It Fn clear_unrhdr uh +Clear all units from the specified unit number allocator entity. +This function resets the entity as if it were just initialized with +.Fn new_unrhdr . .It Fn delete_unrhdr uh -Destroy specified unit number allocator entity. +Delete specified unit number allocator entity. +This function frees the memory associated with the entity, it does not free +any units. +To free all units use +.Fn clear_unrhdr . .It Fn alloc_unr uh Return a new unit number. The lowest free number is always allocated. diff --git a/sys/kern/subr_unit.c b/sys/kern/subr_unit.c index 3d510775b9ef..c2110d72169f 100644 --- a/sys/kern/subr_unit.c +++ b/sys/kern/subr_unit.c @@ -366,6 +366,27 @@ delete_unrhdr(struct unrhdr *uh) Free(uh); } +void +clear_unrhdr(struct unrhdr *uh) +{ + struct unr *up, *uq; + + KASSERT(TAILQ_EMPTY(&uh->ppfree), + ("unrhdr has postponed item for free")); + up = TAILQ_FIRST(&uh->head); + while (up != NULL) { + uq = TAILQ_NEXT(up, list); + if (up->ptr != uh) { + Free(up->ptr); + } + Free(up); + up = uq; + } + TAILQ_INIT(&uh->head); + uh->busy = 0; + uh->alloc = 0; +} + static __inline int is_bitmap(struct unrhdr *uh, struct unr *up) { diff --git a/sys/sys/systm.h b/sys/sys/systm.h index ddebe0a68431..4fa3e6bb3444 100644 --- a/sys/sys/systm.h +++ b/sys/sys/systm.h @@ -450,6 +450,7 @@ struct unrhdr; struct unrhdr *new_unrhdr(int low, int high, struct mtx *mutex); void init_unrhdr(struct unrhdr *uh, int low, int high, struct mtx *mutex); void delete_unrhdr(struct unrhdr *uh); +void clear_unrhdr(struct unrhdr *uh); void clean_unrhdr(struct unrhdr *uh); void clean_unrhdrl(struct unrhdr *uh); int alloc_unr(struct unrhdr *uh); From 9aaf913e1325a8f324bb75be92c6824d01eb9e5a Mon Sep 17 00:00:00 2001 From: Matt Joras Date: Wed, 11 Oct 2017 21:53:53 +0000 Subject: [PATCH 027/219] When unmounting a tmpfs, do not call free_unr. tmpfs uses unr(9) to allocate inodes. Previously when unmounting it would individually free the units when it freed each vnode. This is unnecessary as we can use the newly-added unrhdr_clear function to clear out the unr in onde go. This measurably reduces the time to unmount a tmpfs with many files. Reviewed by: cem, lidl Approved by: rstone (mentor) Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12591 --- sys/fs/tmpfs/tmpfs_subr.c | 8 +++++++- sys/fs/tmpfs/tmpfs_vfsops.c | 2 ++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/sys/fs/tmpfs/tmpfs_subr.c b/sys/fs/tmpfs/tmpfs_subr.c index 10acd4b17167..8180a2cd2a4c 100644 --- a/sys/fs/tmpfs/tmpfs_subr.c +++ b/sys/fs/tmpfs/tmpfs_subr.c @@ -362,7 +362,13 @@ tmpfs_free_node_locked(struct tmpfs_mount *tmp, struct tmpfs_node *node, panic("tmpfs_free_node: type %p %d", node, (int)node->tn_type); } - free_unr(tmp->tm_ino_unr, node->tn_id); + /* + * If we are unmounting there is no need for going through the overhead + * of freeing the inodes from the unr individually, so free them all in + * one go later. + */ + if (!detach) + free_unr(tmp->tm_ino_unr, node->tn_id); uma_zfree(tmp->tm_node_pool, node); TMPFS_LOCK(tmp); tmpfs_free_tmp(tmp); diff --git a/sys/fs/tmpfs/tmpfs_vfsops.c b/sys/fs/tmpfs/tmpfs_vfsops.c index 4b336ba150dd..b606c6659b93 100644 --- a/sys/fs/tmpfs/tmpfs_vfsops.c +++ b/sys/fs/tmpfs/tmpfs_vfsops.c @@ -317,6 +317,8 @@ tmpfs_unmount(struct mount *mp, int mntflags) TMPFS_NODE_UNLOCK(node); } + clear_unrhdr(tmp->tm_ino_unr); + mp->mnt_data = NULL; tmpfs_free_tmp(tmp); vfs_write_resume(mp, VR_START_WRITE); From 92b25dcd615a84b272a7d127492f50ab11ef0134 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Thu, 12 Oct 2017 13:59:23 +0000 Subject: [PATCH 028/219] xinstall: plug an infinite loop in directory creation If stat continues to fail with ENOENT and mkdir with EEXIST the code wont finish. In particular this can show up when the target path follows through a symlink to a non-existent directory. Reported by: ae MFC after: 1 week --- usr.bin/xinstall/xinstall.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usr.bin/xinstall/xinstall.c b/usr.bin/xinstall/xinstall.c index 44ab194f9fbb..16eba7768d89 100644 --- a/usr.bin/xinstall/xinstall.c +++ b/usr.bin/xinstall/xinstall.c @@ -1292,17 +1292,19 @@ install_dir(char *path) { char *p; struct stat sb; - int ch; + int ch, tried_mkdir; for (p = path;; ++p) if (!*p || (p != path && *p == '/')) { + tried_mkdir = 0; ch = *p; *p = '\0'; again: if (stat(path, &sb) < 0) { - if (errno != ENOENT) + if (errno != ENOENT || tried_mkdir) err(EX_OSERR, "stat %s", path); if (mkdir(path, 0755) < 0) { + tried_mkdir = 1; if (errno == EEXIST) goto again; err(EX_OSERR, "mkdir %s", path); From 14c25c2ac67813766485de9de293530f79651edc Mon Sep 17 00:00:00 2001 From: "Bjoern A. Zeeb" Date: Thu, 12 Oct 2017 14:32:45 +0000 Subject: [PATCH 029/219] Previously there was a VIRT kernel to which I had added these options. With that gone they need to go into GENERIC now. Makes FreeBSD/arm usable on gem5 by default. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D12566 --- sys/arm/conf/GENERIC | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/arm/conf/GENERIC b/sys/arm/conf/GENERIC index abf16fda7ebd..c272e6e6f551 100644 --- a/sys/arm/conf/GENERIC +++ b/sys/arm/conf/GENERIC @@ -99,6 +99,7 @@ device ahci # AHCI-compatible SATA controllers # PCI options NEW_PCIB device pci +device pci_host_generic # PCI NICs device re # RealTek 8139C+/8169/8169S/8110S @@ -106,6 +107,7 @@ device re # RealTek 8139C+/8169/8169S/8110S # VirtIO device virtio device virtio_mmio +device virtio_pci device virtio_blk device vtnet From 93f4c41f2807d5cbc4050afa47cd72b5ae282a6a Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:53:25 +0000 Subject: [PATCH 030/219] Add $FreeBSD$ to ancient sources that it's missing from. Sponsored by: Netflix --- lib/libstand/bootparam.h | 1 + lib/libstand/tftp.h | 1 + 2 files changed, 2 insertions(+) diff --git a/lib/libstand/bootparam.h b/lib/libstand/bootparam.h index 6f0c773a0759..9c9f50ea434d 100644 --- a/lib/libstand/bootparam.h +++ b/lib/libstand/bootparam.h @@ -1,4 +1,5 @@ /* $NetBSD: bootparam.h,v 1.3 1998/01/05 19:19:41 perry Exp $ */ +/* $FreeBSD$ */ int bp_whoami(int sock); int bp_getfile(int sock, char *key, struct in_addr *addrp, char *path); diff --git a/lib/libstand/tftp.h b/lib/libstand/tftp.h index cbbbbd782129..c56fb81aafaa 100644 --- a/lib/libstand/tftp.h +++ b/lib/libstand/tftp.h @@ -30,6 +30,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * + * $FreeBSD$ */ From 4eb1313ff2ab43011d091b7560cd688c7838e142 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:56:28 +0000 Subject: [PATCH 031/219] Move lib/libstand to sys/boot/libsa Move the sources to sys/boot. Make adjustments related to the move. Kill LIBSTAND_SRC since it's no longer needed. Sponsored by: Netflix --- lib/libstand/Makefile | 163 ------------------ sys/boot/libsa/Makefile | 159 ++++++++++++++++- .../boot/libsa}/Makefile.depend | 0 {lib/libstand => sys/boot/libsa}/__main.c | 0 .../boot/libsa}/amd64/_setjmp.S | 0 {lib/libstand => sys/boot/libsa}/arp.c | 0 {lib/libstand => sys/boot/libsa}/assert.c | 0 {lib/libstand => sys/boot/libsa}/bcd.c | 0 {lib/libstand => sys/boot/libsa}/bootp.c | 0 {lib/libstand => sys/boot/libsa}/bootp.h | 0 {lib/libstand => sys/boot/libsa}/bootparam.c | 0 {lib/libstand => sys/boot/libsa}/bootparam.h | 0 {lib/libstand => sys/boot/libsa}/bzipfs.c | 0 {lib/libstand => sys/boot/libsa}/cd9660.c | 0 {lib/libstand => sys/boot/libsa}/close.c | 0 {lib/libstand => sys/boot/libsa}/closeall.c | 0 {lib/libstand => sys/boot/libsa}/dev.c | 0 {lib/libstand => sys/boot/libsa}/dosfs.c | 0 {lib/libstand => sys/boot/libsa}/dosfs.h | 0 .../libstand => sys/boot/libsa}/environment.c | 0 {lib/libstand => sys/boot/libsa}/ether.c | 0 {lib/libstand => sys/boot/libsa}/ext2fs.c | 0 {lib/libstand => sys/boot/libsa}/fstat.c | 0 {lib/libstand => sys/boot/libsa}/getopt.c | 0 {lib/libstand => sys/boot/libsa}/gets.c | 0 {lib/libstand => sys/boot/libsa}/globals.c | 0 {lib/libstand => sys/boot/libsa}/gzipfs.c | 0 .../boot/libsa}/i386/_setjmp.S | 0 {lib/libstand => sys/boot/libsa}/in_cksum.c | 0 {lib/libstand => sys/boot/libsa}/inet_ntoa.c | 0 {lib/libstand => sys/boot/libsa}/ioctl.c | 0 {lib/libstand => sys/boot/libsa}/iodesc.h | 0 {lib/libstand => sys/boot/libsa}/ip.c | 0 {lib/libstand => sys/boot/libsa}/libstand.3 | 0 {lib/libstand => sys/boot/libsa}/lseek.c | 0 .../boot/libsa}/mips/_setjmp.S | 0 {lib/libstand => sys/boot/libsa}/nandfs.c | 0 {lib/libstand => sys/boot/libsa}/net.c | 0 {lib/libstand => sys/boot/libsa}/net.h | 0 {lib/libstand => sys/boot/libsa}/netif.c | 0 {lib/libstand => sys/boot/libsa}/netif.h | 0 {lib/libstand => sys/boot/libsa}/nfs.c | 0 {lib/libstand => sys/boot/libsa}/nfsv2.h | 0 {lib/libstand => sys/boot/libsa}/nullfs.c | 0 {lib/libstand => sys/boot/libsa}/open.c | 0 {lib/libstand => sys/boot/libsa}/pager.c | 0 {lib/libstand => sys/boot/libsa}/pkgfs.c | 0 .../boot/libsa}/powerpc/_setjmp.S | 0 .../boot/libsa}/powerpc/syncicache.c | 0 {lib/libstand => sys/boot/libsa}/printf.c | 0 {lib/libstand => sys/boot/libsa}/qdivrem.c | 0 {lib/libstand => sys/boot/libsa}/quad.h | 0 {lib/libstand => sys/boot/libsa}/random.c | 0 {lib/libstand => sys/boot/libsa}/rarp.c | 0 {lib/libstand => sys/boot/libsa}/read.c | 0 {lib/libstand => sys/boot/libsa}/readdir.c | 0 {lib/libstand => sys/boot/libsa}/rpc.c | 0 {lib/libstand => sys/boot/libsa}/rpc.h | 0 {lib/libstand => sys/boot/libsa}/rpcv2.h | 0 {lib/libstand => sys/boot/libsa}/saioctl.h | 0 {lib/libstand => sys/boot/libsa}/sbrk.c | 0 .../boot/libsa}/sparc64/_setjmp.S | 0 {lib/libstand => sys/boot/libsa}/splitfs.c | 0 {lib/libstand => sys/boot/libsa}/stand.h | 0 {lib/libstand => sys/boot/libsa}/stat.c | 0 {lib/libstand => sys/boot/libsa}/strcasecmp.c | 0 {lib/libstand => sys/boot/libsa}/strdup.c | 0 {lib/libstand => sys/boot/libsa}/strerror.c | 0 {lib/libstand => sys/boot/libsa}/strtol.c | 0 {lib/libstand => sys/boot/libsa}/strtoul.c | 0 {lib/libstand => sys/boot/libsa}/tftp.c | 0 {lib/libstand => sys/boot/libsa}/tftp.h | 0 {lib/libstand => sys/boot/libsa}/twiddle.c | 0 {lib/libstand => sys/boot/libsa}/udp.c | 0 {lib/libstand => sys/boot/libsa}/ufs.c | 0 .../boot/libsa}/uuid_from_string.c | 0 .../boot/libsa}/uuid_to_string.c | 0 {lib/libstand => sys/boot/libsa}/write.c | 0 {lib/libstand => sys/boot/libsa}/zalloc.c | 0 .../libstand => sys/boot/libsa}/zalloc_defs.h | 0 .../boot/libsa}/zalloc_malloc.c | 0 {lib/libstand => sys/boot/libsa}/zalloc_mem.h | 0 .../boot/libsa}/zalloc_protos.h | 0 sys/boot/libstand32/Makefile | 2 - sys/boot/userboot/libstand/Makefile | 9 +- 85 files changed, 155 insertions(+), 178 deletions(-) delete mode 100644 lib/libstand/Makefile rename {lib/libstand => sys/boot/libsa}/Makefile.depend (100%) rename {lib/libstand => sys/boot/libsa}/__main.c (100%) rename {lib/libstand => sys/boot/libsa}/amd64/_setjmp.S (100%) rename {lib/libstand => sys/boot/libsa}/arp.c (100%) rename {lib/libstand => sys/boot/libsa}/assert.c (100%) rename {lib/libstand => sys/boot/libsa}/bcd.c (100%) rename {lib/libstand => sys/boot/libsa}/bootp.c (100%) rename {lib/libstand => sys/boot/libsa}/bootp.h (100%) rename {lib/libstand => sys/boot/libsa}/bootparam.c (100%) rename {lib/libstand => sys/boot/libsa}/bootparam.h (100%) rename {lib/libstand => sys/boot/libsa}/bzipfs.c (100%) rename {lib/libstand => sys/boot/libsa}/cd9660.c (100%) rename {lib/libstand => sys/boot/libsa}/close.c (100%) rename {lib/libstand => sys/boot/libsa}/closeall.c (100%) rename {lib/libstand => sys/boot/libsa}/dev.c (100%) rename {lib/libstand => sys/boot/libsa}/dosfs.c (100%) rename {lib/libstand => sys/boot/libsa}/dosfs.h (100%) rename {lib/libstand => sys/boot/libsa}/environment.c (100%) rename {lib/libstand => sys/boot/libsa}/ether.c (100%) rename {lib/libstand => sys/boot/libsa}/ext2fs.c (100%) rename {lib/libstand => sys/boot/libsa}/fstat.c (100%) rename {lib/libstand => sys/boot/libsa}/getopt.c (100%) rename {lib/libstand => sys/boot/libsa}/gets.c (100%) rename {lib/libstand => sys/boot/libsa}/globals.c (100%) rename {lib/libstand => sys/boot/libsa}/gzipfs.c (100%) rename {lib/libstand => sys/boot/libsa}/i386/_setjmp.S (100%) rename {lib/libstand => sys/boot/libsa}/in_cksum.c (100%) rename {lib/libstand => sys/boot/libsa}/inet_ntoa.c (100%) rename {lib/libstand => sys/boot/libsa}/ioctl.c (100%) rename {lib/libstand => sys/boot/libsa}/iodesc.h (100%) rename {lib/libstand => sys/boot/libsa}/ip.c (100%) rename {lib/libstand => sys/boot/libsa}/libstand.3 (100%) rename {lib/libstand => sys/boot/libsa}/lseek.c (100%) rename {lib/libstand => sys/boot/libsa}/mips/_setjmp.S (100%) rename {lib/libstand => sys/boot/libsa}/nandfs.c (100%) rename {lib/libstand => sys/boot/libsa}/net.c (100%) rename {lib/libstand => sys/boot/libsa}/net.h (100%) rename {lib/libstand => sys/boot/libsa}/netif.c (100%) rename {lib/libstand => sys/boot/libsa}/netif.h (100%) rename {lib/libstand => sys/boot/libsa}/nfs.c (100%) rename {lib/libstand => sys/boot/libsa}/nfsv2.h (100%) rename {lib/libstand => sys/boot/libsa}/nullfs.c (100%) rename {lib/libstand => sys/boot/libsa}/open.c (100%) rename {lib/libstand => sys/boot/libsa}/pager.c (100%) rename {lib/libstand => sys/boot/libsa}/pkgfs.c (100%) rename {lib/libstand => sys/boot/libsa}/powerpc/_setjmp.S (100%) rename {lib/libstand => sys/boot/libsa}/powerpc/syncicache.c (100%) rename {lib/libstand => sys/boot/libsa}/printf.c (100%) rename {lib/libstand => sys/boot/libsa}/qdivrem.c (100%) rename {lib/libstand => sys/boot/libsa}/quad.h (100%) rename {lib/libstand => sys/boot/libsa}/random.c (100%) rename {lib/libstand => sys/boot/libsa}/rarp.c (100%) rename {lib/libstand => sys/boot/libsa}/read.c (100%) rename {lib/libstand => sys/boot/libsa}/readdir.c (100%) rename {lib/libstand => sys/boot/libsa}/rpc.c (100%) rename {lib/libstand => sys/boot/libsa}/rpc.h (100%) rename {lib/libstand => sys/boot/libsa}/rpcv2.h (100%) rename {lib/libstand => sys/boot/libsa}/saioctl.h (100%) rename {lib/libstand => sys/boot/libsa}/sbrk.c (100%) rename {lib/libstand => sys/boot/libsa}/sparc64/_setjmp.S (100%) rename {lib/libstand => sys/boot/libsa}/splitfs.c (100%) rename {lib/libstand => sys/boot/libsa}/stand.h (100%) rename {lib/libstand => sys/boot/libsa}/stat.c (100%) rename {lib/libstand => sys/boot/libsa}/strcasecmp.c (100%) rename {lib/libstand => sys/boot/libsa}/strdup.c (100%) rename {lib/libstand => sys/boot/libsa}/strerror.c (100%) rename {lib/libstand => sys/boot/libsa}/strtol.c (100%) rename {lib/libstand => sys/boot/libsa}/strtoul.c (100%) rename {lib/libstand => sys/boot/libsa}/tftp.c (100%) rename {lib/libstand => sys/boot/libsa}/tftp.h (100%) rename {lib/libstand => sys/boot/libsa}/twiddle.c (100%) rename {lib/libstand => sys/boot/libsa}/udp.c (100%) rename {lib/libstand => sys/boot/libsa}/ufs.c (100%) rename {lib/libstand => sys/boot/libsa}/uuid_from_string.c (100%) rename {lib/libstand => sys/boot/libsa}/uuid_to_string.c (100%) rename {lib/libstand => sys/boot/libsa}/write.c (100%) rename {lib/libstand => sys/boot/libsa}/zalloc.c (100%) rename {lib/libstand => sys/boot/libsa}/zalloc_defs.h (100%) rename {lib/libstand => sys/boot/libsa}/zalloc_malloc.c (100%) rename {lib/libstand => sys/boot/libsa}/zalloc_mem.h (100%) rename {lib/libstand => sys/boot/libsa}/zalloc_protos.h (100%) diff --git a/lib/libstand/Makefile b/lib/libstand/Makefile deleted file mode 100644 index 3654ec351fa1..000000000000 --- a/lib/libstand/Makefile +++ /dev/null @@ -1,163 +0,0 @@ -# $FreeBSD$ -# Originally from $NetBSD: Makefile,v 1.21 1997/10/26 22:08:38 lukem Exp $ -# -# Notes: -# - We don't use the libc strerror/sys_errlist because the string table is -# quite large. -# - -PACKAGE=lib${LIB} -MK_PROFILE= no -MK_SSP= no - -.include - -LIBSTAND_SRC?= ${.CURDIR} -LIBSTAND_CPUARCH?=${MACHINE_CPUARCH} -LIBC_SRC= ${LIBSTAND_SRC}/../libc - -LIB= stand -NO_PIC= -INCS?= stand.h -MAN?= libstand.3 - -WARNS?= 0 - -CFLAGS+= -I${LIBSTAND_SRC} - -# standalone components and stuff we have modified locally -SRCS+= gzguts.h zutil.h __main.c assert.c bcd.c environment.c getopt.c gets.c \ - globals.c pager.c printf.c strdup.c strerror.c strtol.c strtoul.c random.c \ - sbrk.c twiddle.c zalloc.c zalloc_malloc.c - -# private (pruned) versions of libc string functions -SRCS+= strcasecmp.c - -.PATH: ${LIBC_SRC}/net - -SRCS+= ntoh.c - -# string functions from libc -.PATH: ${LIBC_SRC}/string -SRCS+= bcmp.c bcopy.c bzero.c ffs.c fls.c \ - memccpy.c memchr.c memcmp.c memcpy.c memmove.c memset.c \ - qdivrem.c strcat.c strchr.c strcmp.c strcpy.c stpcpy.c stpncpy.c \ - strcspn.c strlcat.c strlcpy.c strlen.c strncat.c strncmp.c strncpy.c \ - strpbrk.c strrchr.c strsep.c strspn.c strstr.c strtok.c swab.c -.if ${MACHINE_CPUARCH} == "arm" -.PATH: ${LIBC_SRC}/arm/gen - -# Do not generate movt/movw, because the relocation fixup for them does not -# translate to the -Bsymbolic -pie format required by self_reloc() in loader(8). -# Also, the fpu is not available in a standalone environment. -.if ${COMPILER_VERSION} < 30800 -CFLAGS.clang+= -mllvm -arm-use-movt=0 -.else -CFLAGS.clang+= -mno-movt -.endif -CFLAGS.clang+= -mfpu=none - -# Compiler support functions -.PATH: ${LIBSTAND_SRC}/../../contrib/compiler-rt/lib/builtins/ -# __clzsi2 and ctzsi2 for various builtin functions -SRCS+= clzsi2.c ctzsi2.c -# Divide and modulus functions called by the compiler -SRCS+= divmoddi4.c divmodsi4.c divdi3.c divsi3.c moddi3.c modsi3.c -SRCS+= udivmoddi4.c udivmodsi4.c udivdi3.c udivsi3.c umoddi3.c umodsi3.c - -.PATH: ${LIBSTAND_SRC}/../../contrib/compiler-rt/lib/builtins/arm/ -SRCS+= aeabi_idivmod.S aeabi_ldivmod.S aeabi_uidivmod.S aeabi_uldivmod.S -SRCS+= aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S -.endif - -.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" -.PATH: ${LIBC_SRC}/${MACHINE_CPUARCH}/gen -.endif - -.if ${MACHINE_CPUARCH} == "powerpc" -.PATH: ${LIBC_SRC}/quad -SRCS+= ashldi3.c ashrdi3.c -SRCS+= syncicache.c -.endif - -# uuid functions from libc -.PATH: ${LIBC_SRC}/uuid -SRCS+= uuid_create_nil.c uuid_equal.c uuid_from_string.c uuid_is_nil.c uuid_to_string.c - -# _setjmp/_longjmp -.PATH: ${LIBSTAND_SRC}/${LIBSTAND_CPUARCH} -SRCS+= _setjmp.S - -# decompression functionality from libbz2 -# NOTE: to actually test this functionality after libbz2 upgrade compile -# loader(8) with LOADER_BZIP2_SUPPORT defined -.PATH: ${LIBSTAND_SRC}/../../contrib/bzip2 -CFLAGS+= -DBZ_NO_STDIO -DBZ_NO_COMPRESS -SRCS+= libstand_bzlib_private.h - -.for file in bzlib.c crctable.c decompress.c huffman.c randtable.c -SRCS+= _${file} -CLEANFILES+= _${file} - -_${file}: ${file} - sed "s|bzlib_private\.h|libstand_bzlib_private.h|" \ - ${.ALLSRC} > ${.TARGET} -.endfor - -CLEANFILES+= libstand_bzlib_private.h -libstand_bzlib_private.h: bzlib_private.h - sed -e 's||"stand.h"|' \ - ${.ALLSRC} > ${.TARGET} - -# decompression functionality from zlib -.PATH: ${LIBSTAND_SRC}/../../contrib/zlib -CFLAGS+=-DHAVE_MEMCPY -I${LIBSTAND_SRC}/../../contrib/zlib -SRCS+= adler32.c crc32.c libstand_zutil.h libstand_gzguts.h - -.for file in infback.c inffast.c inflate.c inftrees.c zutil.c -SRCS+= _${file} -CLEANFILES+= _${file} - -_${file}: ${file} - sed -e "s|zutil\.h|libstand_zutil.h|" \ - -e "s|gzguts\.h|libstand_gzguts.h|" \ - ${.ALLSRC} > ${.TARGET} -.endfor - -# depend on stand.h being able to be included multiple times -.for file in zutil.h gzguts.h -CLEANFILES+= libstand_${file} -libstand_${file}: ${file} - sed -e 's||"stand.h"|' \ - -e 's||"stand.h"|' \ - -e 's||"stand.h"|' \ - -e 's||"stand.h"|' \ - -e 's||"stand.h"|' \ - ${.ALLSRC} > ${.TARGET} -.endfor - -# io routines -SRCS+= closeall.c dev.c ioctl.c nullfs.c stat.c \ - fstat.c close.c lseek.c open.c read.c write.c readdir.c - -# network routines -SRCS+= arp.c ether.c ip.c inet_ntoa.c in_cksum.c net.c udp.c netif.c rpc.c - -# network info services: -SRCS+= bootp.c rarp.c bootparam.c - -# boot filesystems -SRCS+= ufs.c nfs.c cd9660.c tftp.c gzipfs.c bzipfs.c -SRCS+= dosfs.c ext2fs.c -SRCS+= splitfs.c -SRCS+= pkgfs.c -.if ${MK_NAND} != "no" -SRCS+= nandfs.c -.endif - -# explicit_bzero -.PATH: ${SRCTOP}/sys/libkern -SRCS+= explicit_bzero.c - -.include -.include diff --git a/sys/boot/libsa/Makefile b/sys/boot/libsa/Makefile index 5b7397936c10..83238e8215f7 100644 --- a/sys/boot/libsa/Makefile +++ b/sys/boot/libsa/Makefile @@ -1,14 +1,161 @@ # $FreeBSD$ +# Originally from $NetBSD: Makefile,v 1.21 1997/10/26 22:08:38 lukem Exp $ +# +# Notes: +# - We don't use the libc strerror/sys_errlist because the string table is +# quite large. +# + +MK_PROFILE= no +MK_SSP= no .include .include "../Makefile.inc" -LIBSTAND_SRC= ${SASRC} -LIBC_SRC= ${SRCTOP}/lib/libc INTERNALLIB= -INCS= -MAN= -.PATH: ${SASRC} +LIBSTAND_CPUARCH?=${MACHINE_CPUARCH} +LIBC_SRC= ${SRCTOP}/lib/libc -.include "${SASRC}/Makefile" +LIB?= stand +NO_PIC= +WARNS?= 0 + +CFLAGS+= -I${SASRC} + +# standalone components and stuff we have modified locally +SRCS+= gzguts.h zutil.h __main.c assert.c bcd.c environment.c getopt.c gets.c \ + globals.c pager.c printf.c strdup.c strerror.c strtol.c strtoul.c random.c \ + sbrk.c twiddle.c zalloc.c zalloc_malloc.c + +# private (pruned) versions of libc string functions +SRCS+= strcasecmp.c + +.PATH: ${LIBC_SRC}/net + +SRCS+= ntoh.c + +# string functions from libc +.PATH: ${LIBC_SRC}/string +SRCS+= bcmp.c bcopy.c bzero.c ffs.c fls.c \ + memccpy.c memchr.c memcmp.c memcpy.c memmove.c memset.c \ + qdivrem.c strcat.c strchr.c strcmp.c strcpy.c stpcpy.c stpncpy.c \ + strcspn.c strlcat.c strlcpy.c strlen.c strncat.c strncmp.c strncpy.c \ + strpbrk.c strrchr.c strsep.c strspn.c strstr.c strtok.c swab.c +.if ${MACHINE_CPUARCH} == "arm" +.PATH: ${LIBC_SRC}/arm/gen + +# Do not generate movt/movw, because the relocation fixup for them does not +# translate to the -Bsymbolic -pie format required by self_reloc() in loader(8). +# Also, the fpu is not available in a standalone environment. +.if ${COMPILER_VERSION} < 30800 +CFLAGS.clang+= -mllvm -arm-use-movt=0 +.else +CFLAGS.clang+= -mno-movt +.endif +CFLAGS.clang+= -mfpu=none + +# Compiler support functions +.PATH: ${SRCTOP}/contrib/compiler-rt/lib/builtins/ +# __clzsi2 and ctzsi2 for various builtin functions +SRCS+= clzsi2.c ctzsi2.c +# Divide and modulus functions called by the compiler +SRCS+= divmoddi4.c divmodsi4.c divdi3.c divsi3.c moddi3.c modsi3.c +SRCS+= udivmoddi4.c udivmodsi4.c udivdi3.c udivsi3.c umoddi3.c umodsi3.c + +.PATH: ${SRCTOP}/contrib/compiler-rt/lib/builtins/arm/ +SRCS+= aeabi_idivmod.S aeabi_ldivmod.S aeabi_uidivmod.S aeabi_uldivmod.S +SRCS+= aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S +.endif + +.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" +.PATH: ${LIBC_SRC}/${MACHINE_CPUARCH}/gen +.endif + +.if ${MACHINE_CPUARCH} == "powerpc" +.PATH: ${LIBC_SRC}/quad +SRCS+= ashldi3.c ashrdi3.c +SRCS+= syncicache.c +.endif + +# uuid functions from libc +.PATH: ${LIBC_SRC}/uuid +SRCS+= uuid_create_nil.c uuid_equal.c uuid_from_string.c uuid_is_nil.c uuid_to_string.c + +# _setjmp/_longjmp +.PATH: ${SASRC}/${LIBSTAND_CPUARCH} +SRCS+= _setjmp.S + +# decompression functionality from libbz2 +# NOTE: to actually test this functionality after libbz2 upgrade compile +# loader(8) with LOADER_BZIP2_SUPPORT defined +.PATH: ${SRCTOP}/contrib/bzip2 +CFLAGS+= -DBZ_NO_STDIO -DBZ_NO_COMPRESS +SRCS+= libstand_bzlib_private.h + +.for file in bzlib.c crctable.c decompress.c huffman.c randtable.c +SRCS+= _${file} +CLEANFILES+= _${file} + +_${file}: ${file} + sed "s|bzlib_private\.h|libstand_bzlib_private.h|" \ + ${.ALLSRC} > ${.TARGET} +.endfor + +CLEANFILES+= libstand_bzlib_private.h +libstand_bzlib_private.h: bzlib_private.h + sed -e 's||"stand.h"|' \ + ${.ALLSRC} > ${.TARGET} + +# decompression functionality from zlib +.PATH: ${SRCTOP}/contrib/zlib +CFLAGS+=-DHAVE_MEMCPY -I${SRCTOP}/contrib/zlib +SRCS+= adler32.c crc32.c libstand_zutil.h libstand_gzguts.h + +.for file in infback.c inffast.c inflate.c inftrees.c zutil.c +SRCS+= _${file} +CLEANFILES+= _${file} + +_${file}: ${file} + sed -e "s|zutil\.h|libstand_zutil.h|" \ + -e "s|gzguts\.h|libstand_gzguts.h|" \ + ${.ALLSRC} > ${.TARGET} +.endfor + +# depend on stand.h being able to be included multiple times +.for file in zutil.h gzguts.h +CLEANFILES+= libstand_${file} +libstand_${file}: ${file} + sed -e 's||"stand.h"|' \ + -e 's||"stand.h"|' \ + -e 's||"stand.h"|' \ + -e 's||"stand.h"|' \ + -e 's||"stand.h"|' \ + ${.ALLSRC} > ${.TARGET} +.endfor + +# io routines +SRCS+= closeall.c dev.c ioctl.c nullfs.c stat.c \ + fstat.c close.c lseek.c open.c read.c write.c readdir.c + +# network routines +SRCS+= arp.c ether.c ip.c inet_ntoa.c in_cksum.c net.c udp.c netif.c rpc.c + +# network info services: +SRCS+= bootp.c rarp.c bootparam.c + +# boot filesystems +SRCS+= ufs.c nfs.c cd9660.c tftp.c gzipfs.c bzipfs.c +SRCS+= dosfs.c ext2fs.c +SRCS+= splitfs.c +SRCS+= pkgfs.c +.if ${MK_NAND} != "no" +SRCS+= nandfs.c +.endif + +# explicit_bzero +.PATH: ${SRCTOP}/sys/libkern +SRCS+= explicit_bzero.c + +.include +.include diff --git a/lib/libstand/Makefile.depend b/sys/boot/libsa/Makefile.depend similarity index 100% rename from lib/libstand/Makefile.depend rename to sys/boot/libsa/Makefile.depend diff --git a/lib/libstand/__main.c b/sys/boot/libsa/__main.c similarity index 100% rename from lib/libstand/__main.c rename to sys/boot/libsa/__main.c diff --git a/lib/libstand/amd64/_setjmp.S b/sys/boot/libsa/amd64/_setjmp.S similarity index 100% rename from lib/libstand/amd64/_setjmp.S rename to sys/boot/libsa/amd64/_setjmp.S diff --git a/lib/libstand/arp.c b/sys/boot/libsa/arp.c similarity index 100% rename from lib/libstand/arp.c rename to sys/boot/libsa/arp.c diff --git a/lib/libstand/assert.c b/sys/boot/libsa/assert.c similarity index 100% rename from lib/libstand/assert.c rename to sys/boot/libsa/assert.c diff --git a/lib/libstand/bcd.c b/sys/boot/libsa/bcd.c similarity index 100% rename from lib/libstand/bcd.c rename to sys/boot/libsa/bcd.c diff --git a/lib/libstand/bootp.c b/sys/boot/libsa/bootp.c similarity index 100% rename from lib/libstand/bootp.c rename to sys/boot/libsa/bootp.c diff --git a/lib/libstand/bootp.h b/sys/boot/libsa/bootp.h similarity index 100% rename from lib/libstand/bootp.h rename to sys/boot/libsa/bootp.h diff --git a/lib/libstand/bootparam.c b/sys/boot/libsa/bootparam.c similarity index 100% rename from lib/libstand/bootparam.c rename to sys/boot/libsa/bootparam.c diff --git a/lib/libstand/bootparam.h b/sys/boot/libsa/bootparam.h similarity index 100% rename from lib/libstand/bootparam.h rename to sys/boot/libsa/bootparam.h diff --git a/lib/libstand/bzipfs.c b/sys/boot/libsa/bzipfs.c similarity index 100% rename from lib/libstand/bzipfs.c rename to sys/boot/libsa/bzipfs.c diff --git a/lib/libstand/cd9660.c b/sys/boot/libsa/cd9660.c similarity index 100% rename from lib/libstand/cd9660.c rename to sys/boot/libsa/cd9660.c diff --git a/lib/libstand/close.c b/sys/boot/libsa/close.c similarity index 100% rename from lib/libstand/close.c rename to sys/boot/libsa/close.c diff --git a/lib/libstand/closeall.c b/sys/boot/libsa/closeall.c similarity index 100% rename from lib/libstand/closeall.c rename to sys/boot/libsa/closeall.c diff --git a/lib/libstand/dev.c b/sys/boot/libsa/dev.c similarity index 100% rename from lib/libstand/dev.c rename to sys/boot/libsa/dev.c diff --git a/lib/libstand/dosfs.c b/sys/boot/libsa/dosfs.c similarity index 100% rename from lib/libstand/dosfs.c rename to sys/boot/libsa/dosfs.c diff --git a/lib/libstand/dosfs.h b/sys/boot/libsa/dosfs.h similarity index 100% rename from lib/libstand/dosfs.h rename to sys/boot/libsa/dosfs.h diff --git a/lib/libstand/environment.c b/sys/boot/libsa/environment.c similarity index 100% rename from lib/libstand/environment.c rename to sys/boot/libsa/environment.c diff --git a/lib/libstand/ether.c b/sys/boot/libsa/ether.c similarity index 100% rename from lib/libstand/ether.c rename to sys/boot/libsa/ether.c diff --git a/lib/libstand/ext2fs.c b/sys/boot/libsa/ext2fs.c similarity index 100% rename from lib/libstand/ext2fs.c rename to sys/boot/libsa/ext2fs.c diff --git a/lib/libstand/fstat.c b/sys/boot/libsa/fstat.c similarity index 100% rename from lib/libstand/fstat.c rename to sys/boot/libsa/fstat.c diff --git a/lib/libstand/getopt.c b/sys/boot/libsa/getopt.c similarity index 100% rename from lib/libstand/getopt.c rename to sys/boot/libsa/getopt.c diff --git a/lib/libstand/gets.c b/sys/boot/libsa/gets.c similarity index 100% rename from lib/libstand/gets.c rename to sys/boot/libsa/gets.c diff --git a/lib/libstand/globals.c b/sys/boot/libsa/globals.c similarity index 100% rename from lib/libstand/globals.c rename to sys/boot/libsa/globals.c diff --git a/lib/libstand/gzipfs.c b/sys/boot/libsa/gzipfs.c similarity index 100% rename from lib/libstand/gzipfs.c rename to sys/boot/libsa/gzipfs.c diff --git a/lib/libstand/i386/_setjmp.S b/sys/boot/libsa/i386/_setjmp.S similarity index 100% rename from lib/libstand/i386/_setjmp.S rename to sys/boot/libsa/i386/_setjmp.S diff --git a/lib/libstand/in_cksum.c b/sys/boot/libsa/in_cksum.c similarity index 100% rename from lib/libstand/in_cksum.c rename to sys/boot/libsa/in_cksum.c diff --git a/lib/libstand/inet_ntoa.c b/sys/boot/libsa/inet_ntoa.c similarity index 100% rename from lib/libstand/inet_ntoa.c rename to sys/boot/libsa/inet_ntoa.c diff --git a/lib/libstand/ioctl.c b/sys/boot/libsa/ioctl.c similarity index 100% rename from lib/libstand/ioctl.c rename to sys/boot/libsa/ioctl.c diff --git a/lib/libstand/iodesc.h b/sys/boot/libsa/iodesc.h similarity index 100% rename from lib/libstand/iodesc.h rename to sys/boot/libsa/iodesc.h diff --git a/lib/libstand/ip.c b/sys/boot/libsa/ip.c similarity index 100% rename from lib/libstand/ip.c rename to sys/boot/libsa/ip.c diff --git a/lib/libstand/libstand.3 b/sys/boot/libsa/libstand.3 similarity index 100% rename from lib/libstand/libstand.3 rename to sys/boot/libsa/libstand.3 diff --git a/lib/libstand/lseek.c b/sys/boot/libsa/lseek.c similarity index 100% rename from lib/libstand/lseek.c rename to sys/boot/libsa/lseek.c diff --git a/lib/libstand/mips/_setjmp.S b/sys/boot/libsa/mips/_setjmp.S similarity index 100% rename from lib/libstand/mips/_setjmp.S rename to sys/boot/libsa/mips/_setjmp.S diff --git a/lib/libstand/nandfs.c b/sys/boot/libsa/nandfs.c similarity index 100% rename from lib/libstand/nandfs.c rename to sys/boot/libsa/nandfs.c diff --git a/lib/libstand/net.c b/sys/boot/libsa/net.c similarity index 100% rename from lib/libstand/net.c rename to sys/boot/libsa/net.c diff --git a/lib/libstand/net.h b/sys/boot/libsa/net.h similarity index 100% rename from lib/libstand/net.h rename to sys/boot/libsa/net.h diff --git a/lib/libstand/netif.c b/sys/boot/libsa/netif.c similarity index 100% rename from lib/libstand/netif.c rename to sys/boot/libsa/netif.c diff --git a/lib/libstand/netif.h b/sys/boot/libsa/netif.h similarity index 100% rename from lib/libstand/netif.h rename to sys/boot/libsa/netif.h diff --git a/lib/libstand/nfs.c b/sys/boot/libsa/nfs.c similarity index 100% rename from lib/libstand/nfs.c rename to sys/boot/libsa/nfs.c diff --git a/lib/libstand/nfsv2.h b/sys/boot/libsa/nfsv2.h similarity index 100% rename from lib/libstand/nfsv2.h rename to sys/boot/libsa/nfsv2.h diff --git a/lib/libstand/nullfs.c b/sys/boot/libsa/nullfs.c similarity index 100% rename from lib/libstand/nullfs.c rename to sys/boot/libsa/nullfs.c diff --git a/lib/libstand/open.c b/sys/boot/libsa/open.c similarity index 100% rename from lib/libstand/open.c rename to sys/boot/libsa/open.c diff --git a/lib/libstand/pager.c b/sys/boot/libsa/pager.c similarity index 100% rename from lib/libstand/pager.c rename to sys/boot/libsa/pager.c diff --git a/lib/libstand/pkgfs.c b/sys/boot/libsa/pkgfs.c similarity index 100% rename from lib/libstand/pkgfs.c rename to sys/boot/libsa/pkgfs.c diff --git a/lib/libstand/powerpc/_setjmp.S b/sys/boot/libsa/powerpc/_setjmp.S similarity index 100% rename from lib/libstand/powerpc/_setjmp.S rename to sys/boot/libsa/powerpc/_setjmp.S diff --git a/lib/libstand/powerpc/syncicache.c b/sys/boot/libsa/powerpc/syncicache.c similarity index 100% rename from lib/libstand/powerpc/syncicache.c rename to sys/boot/libsa/powerpc/syncicache.c diff --git a/lib/libstand/printf.c b/sys/boot/libsa/printf.c similarity index 100% rename from lib/libstand/printf.c rename to sys/boot/libsa/printf.c diff --git a/lib/libstand/qdivrem.c b/sys/boot/libsa/qdivrem.c similarity index 100% rename from lib/libstand/qdivrem.c rename to sys/boot/libsa/qdivrem.c diff --git a/lib/libstand/quad.h b/sys/boot/libsa/quad.h similarity index 100% rename from lib/libstand/quad.h rename to sys/boot/libsa/quad.h diff --git a/lib/libstand/random.c b/sys/boot/libsa/random.c similarity index 100% rename from lib/libstand/random.c rename to sys/boot/libsa/random.c diff --git a/lib/libstand/rarp.c b/sys/boot/libsa/rarp.c similarity index 100% rename from lib/libstand/rarp.c rename to sys/boot/libsa/rarp.c diff --git a/lib/libstand/read.c b/sys/boot/libsa/read.c similarity index 100% rename from lib/libstand/read.c rename to sys/boot/libsa/read.c diff --git a/lib/libstand/readdir.c b/sys/boot/libsa/readdir.c similarity index 100% rename from lib/libstand/readdir.c rename to sys/boot/libsa/readdir.c diff --git a/lib/libstand/rpc.c b/sys/boot/libsa/rpc.c similarity index 100% rename from lib/libstand/rpc.c rename to sys/boot/libsa/rpc.c diff --git a/lib/libstand/rpc.h b/sys/boot/libsa/rpc.h similarity index 100% rename from lib/libstand/rpc.h rename to sys/boot/libsa/rpc.h diff --git a/lib/libstand/rpcv2.h b/sys/boot/libsa/rpcv2.h similarity index 100% rename from lib/libstand/rpcv2.h rename to sys/boot/libsa/rpcv2.h diff --git a/lib/libstand/saioctl.h b/sys/boot/libsa/saioctl.h similarity index 100% rename from lib/libstand/saioctl.h rename to sys/boot/libsa/saioctl.h diff --git a/lib/libstand/sbrk.c b/sys/boot/libsa/sbrk.c similarity index 100% rename from lib/libstand/sbrk.c rename to sys/boot/libsa/sbrk.c diff --git a/lib/libstand/sparc64/_setjmp.S b/sys/boot/libsa/sparc64/_setjmp.S similarity index 100% rename from lib/libstand/sparc64/_setjmp.S rename to sys/boot/libsa/sparc64/_setjmp.S diff --git a/lib/libstand/splitfs.c b/sys/boot/libsa/splitfs.c similarity index 100% rename from lib/libstand/splitfs.c rename to sys/boot/libsa/splitfs.c diff --git a/lib/libstand/stand.h b/sys/boot/libsa/stand.h similarity index 100% rename from lib/libstand/stand.h rename to sys/boot/libsa/stand.h diff --git a/lib/libstand/stat.c b/sys/boot/libsa/stat.c similarity index 100% rename from lib/libstand/stat.c rename to sys/boot/libsa/stat.c diff --git a/lib/libstand/strcasecmp.c b/sys/boot/libsa/strcasecmp.c similarity index 100% rename from lib/libstand/strcasecmp.c rename to sys/boot/libsa/strcasecmp.c diff --git a/lib/libstand/strdup.c b/sys/boot/libsa/strdup.c similarity index 100% rename from lib/libstand/strdup.c rename to sys/boot/libsa/strdup.c diff --git a/lib/libstand/strerror.c b/sys/boot/libsa/strerror.c similarity index 100% rename from lib/libstand/strerror.c rename to sys/boot/libsa/strerror.c diff --git a/lib/libstand/strtol.c b/sys/boot/libsa/strtol.c similarity index 100% rename from lib/libstand/strtol.c rename to sys/boot/libsa/strtol.c diff --git a/lib/libstand/strtoul.c b/sys/boot/libsa/strtoul.c similarity index 100% rename from lib/libstand/strtoul.c rename to sys/boot/libsa/strtoul.c diff --git a/lib/libstand/tftp.c b/sys/boot/libsa/tftp.c similarity index 100% rename from lib/libstand/tftp.c rename to sys/boot/libsa/tftp.c diff --git a/lib/libstand/tftp.h b/sys/boot/libsa/tftp.h similarity index 100% rename from lib/libstand/tftp.h rename to sys/boot/libsa/tftp.h diff --git a/lib/libstand/twiddle.c b/sys/boot/libsa/twiddle.c similarity index 100% rename from lib/libstand/twiddle.c rename to sys/boot/libsa/twiddle.c diff --git a/lib/libstand/udp.c b/sys/boot/libsa/udp.c similarity index 100% rename from lib/libstand/udp.c rename to sys/boot/libsa/udp.c diff --git a/lib/libstand/ufs.c b/sys/boot/libsa/ufs.c similarity index 100% rename from lib/libstand/ufs.c rename to sys/boot/libsa/ufs.c diff --git a/lib/libstand/uuid_from_string.c b/sys/boot/libsa/uuid_from_string.c similarity index 100% rename from lib/libstand/uuid_from_string.c rename to sys/boot/libsa/uuid_from_string.c diff --git a/lib/libstand/uuid_to_string.c b/sys/boot/libsa/uuid_to_string.c similarity index 100% rename from lib/libstand/uuid_to_string.c rename to sys/boot/libsa/uuid_to_string.c diff --git a/lib/libstand/write.c b/sys/boot/libsa/write.c similarity index 100% rename from lib/libstand/write.c rename to sys/boot/libsa/write.c diff --git a/lib/libstand/zalloc.c b/sys/boot/libsa/zalloc.c similarity index 100% rename from lib/libstand/zalloc.c rename to sys/boot/libsa/zalloc.c diff --git a/lib/libstand/zalloc_defs.h b/sys/boot/libsa/zalloc_defs.h similarity index 100% rename from lib/libstand/zalloc_defs.h rename to sys/boot/libsa/zalloc_defs.h diff --git a/lib/libstand/zalloc_malloc.c b/sys/boot/libsa/zalloc_malloc.c similarity index 100% rename from lib/libstand/zalloc_malloc.c rename to sys/boot/libsa/zalloc_malloc.c diff --git a/lib/libstand/zalloc_mem.h b/sys/boot/libsa/zalloc_mem.h similarity index 100% rename from lib/libstand/zalloc_mem.h rename to sys/boot/libsa/zalloc_mem.h diff --git a/lib/libstand/zalloc_protos.h b/sys/boot/libsa/zalloc_protos.h similarity index 100% rename from lib/libstand/zalloc_protos.h rename to sys/boot/libsa/zalloc_protos.h diff --git a/sys/boot/libstand32/Makefile b/sys/boot/libstand32/Makefile index ace4189ee29b..a2013cf77480 100644 --- a/sys/boot/libstand32/Makefile +++ b/sys/boot/libstand32/Makefile @@ -9,8 +9,6 @@ LIBSTAND_CPUARCH=i386 .else LIBSTAND_CPUARCH=${MACHINE_CPUARCH} .endif -LIBSTAND_SRC= ${SASRC} -LIBC_SRC= ${SRCTOP}/lib/libc INTERNALLIB= INCS= MAN= diff --git a/sys/boot/userboot/libstand/Makefile b/sys/boot/userboot/libstand/Makefile index 74ae890bbc81..c5c79862cce9 100644 --- a/sys/boot/userboot/libstand/Makefile +++ b/sys/boot/userboot/libstand/Makefile @@ -3,11 +3,6 @@ .include .include "../Makefile.inc" -LIBSTAND_SRC= ${SASRC} +.PATH: ${SASRC} -INTERNALLIB= -INCS= -MAN= -.PATH: ${LIBSTAND_SRC} - -.include "${LIBSTAND_SRC}/Makefile" +.include "${SASRC}/Makefile" From 3006b7c8a97ec2d017b15f0f33ee1d4d6a9d9eee Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:56:42 +0000 Subject: [PATCH 032/219] Kill the userboot copy of libstand. It's not needed (it's now identical to libsa, and seems to have been for some time). Sponsored by: Netflix --- sys/boot/Makefile.inc | 2 -- sys/boot/userboot/Makefile | 2 +- sys/boot/userboot/libstand/Makefile | 8 -------- sys/boot/userboot/libstand/Makefile.depend | 15 --------------- sys/boot/userboot/userboot/Makefile | 4 ++-- 5 files changed, 3 insertions(+), 28 deletions(-) delete mode 100644 sys/boot/userboot/libstand/Makefile delete mode 100644 sys/boot/userboot/libstand/Makefile.depend diff --git a/sys/boot/Makefile.inc b/sys/boot/Makefile.inc index 79a2c9ea75bd..346ca9c2076f 100644 --- a/sys/boot/Makefile.inc +++ b/sys/boot/Makefile.inc @@ -10,8 +10,6 @@ SASRC=${SRCTOP}/lib/libstand LIBSA=${OBJTOP}/sys/boot/libsa/libstand.a # Standalone library compiled for 32-bit version of the processor LIBSA32=${OBJTOP}/sys/boot/libstand32/libstand.a -# Standalone library compiled for userboot -LIBSAU=${OBJTOP}/sys/boot/userboot/libstand/libstand.a CFLAGS+=-I${SASRC} diff --git a/sys/boot/userboot/Makefile b/sys/boot/userboot/Makefile index ebacf6454773..453a14542617 100644 --- a/sys/boot/userboot/Makefile +++ b/sys/boot/userboot/Makefile @@ -2,7 +2,7 @@ .include -SUBDIR= ficl libstand test zfs userboot +SUBDIR= ficl test zfs userboot .include diff --git a/sys/boot/userboot/libstand/Makefile b/sys/boot/userboot/libstand/Makefile deleted file mode 100644 index c5c79862cce9..000000000000 --- a/sys/boot/userboot/libstand/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# $FreeBSD$ - -.include -.include "../Makefile.inc" - -.PATH: ${SASRC} - -.include "${SASRC}/Makefile" diff --git a/sys/boot/userboot/libstand/Makefile.depend b/sys/boot/userboot/libstand/Makefile.depend deleted file mode 100644 index 1d86fce1441d..000000000000 --- a/sys/boot/userboot/libstand/Makefile.depend +++ /dev/null @@ -1,15 +0,0 @@ -# $FreeBSD$ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - include \ - include/arpa \ - include/xlocale \ - lib/libbz2 \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/sys/boot/userboot/userboot/Makefile b/sys/boot/userboot/userboot/Makefile index 2a3e513f514c..3f5dcace6162 100644 --- a/sys/boot/userboot/userboot/Makefile +++ b/sys/boot/userboot/userboot/Makefile @@ -58,7 +58,7 @@ LIBZFSBOOT= ${.OBJDIR}/../zfs/libzfsboot.a .include "${.CURDIR}/../../common/Makefile.inc" CFLAGS+= -I${.CURDIR}/../../common CFLAGS+= -I. -DPADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSAU} -LDADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSAU} +DPADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSA} +LDADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSA} .include From 917587f435942c4515652096d0f3d202580d51b0 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:56:48 +0000 Subject: [PATCH 033/219] Rename libstand.a to libsa.a and libstand32.a to libsa32.a Sponsored by: Netflix --- sys/boot/Makefile.amd64 | 2 +- sys/boot/Makefile.i386 | 2 +- sys/boot/Makefile.inc | 8 ++++---- sys/boot/Makefile.powerpc | 2 +- sys/boot/libsa/Makefile | 2 +- sys/boot/{libstand32 => libsa32}/Makefile | 6 ++---- sys/boot/{libstand32 => libsa32}/Makefile.depend | 0 7 files changed, 10 insertions(+), 12 deletions(-) rename sys/boot/{libstand32 => libsa32}/Makefile (95%) rename sys/boot/{libstand32 => libsa32}/Makefile.depend (100%) diff --git a/sys/boot/Makefile.amd64 b/sys/boot/Makefile.amd64 index 5e730bd6c62f..1061a9d17552 100644 --- a/sys/boot/Makefile.amd64 +++ b/sys/boot/Makefile.amd64 @@ -1,7 +1,7 @@ # $FreeBSD$ SUBDIR+= efi -SUBDIR+= libstand32 +SUBDIR+= libsa32 SUBDIR+= zfs SUBDIR+= userboot diff --git a/sys/boot/Makefile.i386 b/sys/boot/Makefile.i386 index 7c1990558ea7..a414f4b8c39d 100644 --- a/sys/boot/Makefile.i386 +++ b/sys/boot/Makefile.i386 @@ -1,7 +1,7 @@ # $FreeBSD$ SUBDIR+= efi -SUBDIR+= libstand32 +SUBDIR+= libsa32 SUBDIR+= zfs .if !defined(LOADER_NO_GELI_SUPPORT) diff --git a/sys/boot/Makefile.inc b/sys/boot/Makefile.inc index 346ca9c2076f..eaa62df8fec3 100644 --- a/sys/boot/Makefile.inc +++ b/sys/boot/Makefile.inc @@ -5,11 +5,11 @@ .if !defined(__BOOT_MAKEFILE_INC__) __BOOT_MAKEFILE_INC__=${MFILE} -SASRC=${SRCTOP}/lib/libstand -# Normal standalone library -LIBSA=${OBJTOP}/sys/boot/libsa/libstand.a +SASRC=${SRCTOP}/sys/boot/libsa +# Normal Standalone library +LIBSA=${OBJTOP}/sys/boot/libsa/libsa.a # Standalone library compiled for 32-bit version of the processor -LIBSA32=${OBJTOP}/sys/boot/libstand32/libstand.a +LIBSA32=${OBJTOP}/sys/boot/libsa32/libsa32.a CFLAGS+=-I${SASRC} diff --git a/sys/boot/Makefile.powerpc b/sys/boot/Makefile.powerpc index 6d76e7094511..a1347d218ecd 100644 --- a/sys/boot/Makefile.powerpc +++ b/sys/boot/Makefile.powerpc @@ -4,6 +4,6 @@ SUBDIR+= fdt .endif -SUBDIR+= libstand32 +SUBDIR+= libsa32 SUBDIR+= ofw SUBDIR+= uboot diff --git a/sys/boot/libsa/Makefile b/sys/boot/libsa/Makefile index 83238e8215f7..2e9c304ac232 100644 --- a/sys/boot/libsa/Makefile +++ b/sys/boot/libsa/Makefile @@ -17,7 +17,7 @@ INTERNALLIB= LIBSTAND_CPUARCH?=${MACHINE_CPUARCH} LIBC_SRC= ${SRCTOP}/lib/libc -LIB?= stand +LIB?= sa NO_PIC= WARNS?= 0 diff --git a/sys/boot/libstand32/Makefile b/sys/boot/libsa32/Makefile similarity index 95% rename from sys/boot/libstand32/Makefile rename to sys/boot/libsa32/Makefile index a2013cf77480..69c0374fdb37 100644 --- a/sys/boot/libstand32/Makefile +++ b/sys/boot/libsa32/Makefile @@ -4,20 +4,18 @@ .include "../Makefile.inc" +LIB=sa32 .if ${MACHINE_CPUARCH} == "amd64" LIBSTAND_CPUARCH=i386 .else LIBSTAND_CPUARCH=${MACHINE_CPUARCH} .endif -INTERNALLIB= -INCS= -MAN= -.PATH: ${SASRC} .if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "powerpc64" CFLAGS+= -m32 -I. .endif +.PATH: ${SASRC} .include "${SASRC}/Makefile" .if ${MACHINE_CPUARCH} == "amd64" diff --git a/sys/boot/libstand32/Makefile.depend b/sys/boot/libsa32/Makefile.depend similarity index 100% rename from sys/boot/libstand32/Makefile.depend rename to sys/boot/libsa32/Makefile.depend From 6f0970a4c6ac3982af738ab44330a35dd4f8bd30 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:56:54 +0000 Subject: [PATCH 034/219] Move crc32.c, util.c and gpt.c over to libsa. Sponsored by: Netflix --- sys/boot/common/Makefile.inc | 3 ++- sys/boot/i386/gptboot/Makefile | 6 ++++-- sys/boot/i386/gptzfsboot/Makefile | 6 +++--- sys/boot/i386/zfsboot/Makefile | 4 +++- sys/boot/{common => libsa}/crc32.c | 0 sys/boot/{common => libsa}/crc32.h | 0 sys/boot/{common => libsa}/gpt.c | 0 sys/boot/{common => libsa}/gpt.h | 0 sys/boot/{common => libsa}/util.c | 0 sys/boot/{common => libsa}/util.h | 0 sys/boot/uboot/lib/Makefile | 2 +- 11 files changed, 13 insertions(+), 8 deletions(-) rename sys/boot/{common => libsa}/crc32.c (100%) rename sys/boot/{common => libsa}/crc32.h (100%) rename sys/boot/{common => libsa}/gpt.c (100%) rename sys/boot/{common => libsa}/gpt.h (100%) rename sys/boot/{common => libsa}/util.c (100%) rename sys/boot/{common => libsa}/util.h (100%) diff --git a/sys/boot/common/Makefile.inc b/sys/boot/common/Makefile.inc index d43ea445158d..3f9d925d0ef0 100644 --- a/sys/boot/common/Makefile.inc +++ b/sys/boot/common/Makefile.inc @@ -1,5 +1,7 @@ # $FreeBSD$ +.PATH: ${SRCTOP}/sys/boot/common ${SRCTOP}/sys/boot/libsa + SRCS+= boot.c commands.c console.c devopen.c interp.c SRCS+= interp_backslash.c interp_parse.c ls.c misc.c SRCS+= module.c panic.c @@ -30,7 +32,6 @@ SRCS+= dev_net.c SRCS+= disk.c part.c CFLAGS+= -DLOADER_DISK_SUPPORT .if !defined(LOADER_NO_GPT_SUPPORT) -SRCS+= crc32.c CFLAGS+= -DLOADER_GPT_SUPPORT .endif .if !defined(LOADER_NO_MBR_SUPPORT) diff --git a/sys/boot/i386/gptboot/Makefile b/sys/boot/i386/gptboot/Makefile index 62dc02e3f188..e7f2c8391cda 100644 --- a/sys/boot/i386/gptboot/Makefile +++ b/sys/boot/i386/gptboot/Makefile @@ -1,6 +1,8 @@ # $FreeBSD$ -.PATH: ${.CURDIR}/../boot2 ${.CURDIR}/../common ${.CURDIR}/../../common +.include "../Makefile.inc" + +.PATH: ${.CURDIR}/../boot2 ${.CURDIR}/../common ${SASRC} FILES= gptboot MAN= gptboot.8 @@ -20,7 +22,7 @@ GPTBOOT_UFS?= UFS1_AND_UFS2 #GPTBOOT_UFS?= UFS2_ONLY #GPTBOOT_UFS?= UFS1_ONLY -CFLAGS= -DBOOTPROG=\"gptboot\" \ +CFLAGS+=-DBOOTPROG=\"gptboot\" \ -O1 \ -DGPT \ -D${GPTBOOT_UFS} \ diff --git a/sys/boot/i386/gptzfsboot/Makefile b/sys/boot/i386/gptzfsboot/Makefile index 5fb0eef58d24..a81ad2e15005 100644 --- a/sys/boot/i386/gptzfsboot/Makefile +++ b/sys/boot/i386/gptzfsboot/Makefile @@ -1,10 +1,10 @@ # $FreeBSD$ -.include +.include "../Makefile.inc" .PATH: ${.CURDIR}/../boot2 ${.CURDIR}/../gptboot \ ${.CURDIR}/../zfsboot ${.CURDIR}/../common \ - ${.CURDIR}/../../common ${.CURDIR}/../../../crypto/skein + ${.CURDIR}/../../../crypto/skein ${SASRC} FILES= gptzfsboot MAN= gptzfsboot.8 @@ -19,7 +19,7 @@ REL1= 0x700 ORG1= 0x7c00 ORG2= 0x0 -CFLAGS= -DBOOTPROG=\"gptzfsboot\" \ +CFLAGS+=-DBOOTPROG=\"gptzfsboot\" \ -O1 \ -DGPT -DZFS -DBOOT2 \ -DSIOPRT=${BOOT_COMCONSOLE_PORT} \ diff --git a/sys/boot/i386/zfsboot/Makefile b/sys/boot/i386/zfsboot/Makefile index 2f4417223a61..ae4ec19d5b1e 100644 --- a/sys/boot/i386/zfsboot/Makefile +++ b/sys/boot/i386/zfsboot/Makefile @@ -1,7 +1,9 @@ # $FreeBSD$ +.include "../Makefile.inc" + .PATH: ${.CURDIR}/../boot2 ${.CURDIR}/../common \ - ${.CURDIR}/../../common ${.CURDIR}/../../../crypto/skein + ${.CURDIR}/../../../crypto/skein ${SASRC} FILES= zfsboot MAN= zfsboot.8 diff --git a/sys/boot/common/crc32.c b/sys/boot/libsa/crc32.c similarity index 100% rename from sys/boot/common/crc32.c rename to sys/boot/libsa/crc32.c diff --git a/sys/boot/common/crc32.h b/sys/boot/libsa/crc32.h similarity index 100% rename from sys/boot/common/crc32.h rename to sys/boot/libsa/crc32.h diff --git a/sys/boot/common/gpt.c b/sys/boot/libsa/gpt.c similarity index 100% rename from sys/boot/common/gpt.c rename to sys/boot/libsa/gpt.c diff --git a/sys/boot/common/gpt.h b/sys/boot/libsa/gpt.h similarity index 100% rename from sys/boot/common/gpt.h rename to sys/boot/libsa/gpt.h diff --git a/sys/boot/common/util.c b/sys/boot/libsa/util.c similarity index 100% rename from sys/boot/common/util.c rename to sys/boot/libsa/util.c diff --git a/sys/boot/common/util.h b/sys/boot/libsa/util.h similarity index 100% rename from sys/boot/common/util.h rename to sys/boot/libsa/util.h diff --git a/sys/boot/uboot/lib/Makefile b/sys/boot/uboot/lib/Makefile index ba3d570927f2..c80c859b3ec3 100644 --- a/sys/boot/uboot/lib/Makefile +++ b/sys/boot/uboot/lib/Makefile @@ -8,7 +8,7 @@ LIB= uboot INTERNALLIB= WARNS?= 2 -SRCS= crc32.c console.c copy.c devicename.c elf_freebsd.c glue.c +SRCS= console.c copy.c devicename.c elf_freebsd.c glue.c SRCS+= module.c net.c reboot.c time.c CFLAGS+= -ffreestanding -msoft-float From cd955ec800c72245c48af837ac507e8137b3c9fe Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:57:00 +0000 Subject: [PATCH 035/219] Honor CFLAGS modifications in Makefile.inc by using += here. There's no hyper-small space constraints, so there's no reason to tightly control it. Sponsored by: Netflix --- sys/boot/i386/zfsboot/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/boot/i386/zfsboot/Makefile b/sys/boot/i386/zfsboot/Makefile index ae4ec19d5b1e..304263342466 100644 --- a/sys/boot/i386/zfsboot/Makefile +++ b/sys/boot/i386/zfsboot/Makefile @@ -18,7 +18,7 @@ REL1= 0x700 ORG1= 0x7c00 ORG2= 0x2000 -CFLAGS= -DBOOTPROG=\"zfsboot\" \ +CFLAGS+=-DBOOTPROG=\"zfsboot\" \ -O1 \ -DZFS -DBOOT2 \ -DSIOPRT=${BOOT_COMCONSOLE_PORT} \ From 9576e1ee54c081885977d53ef7b96674323dc8ff Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 14:57:05 +0000 Subject: [PATCH 036/219] Move ufsread.c Move ufsread.c from sys/boot/common (which used to be all the common files for /boot/loader, but grew to be all the common files for sys/boot, but that's now sys/boot/libsa's job) to sys/boot/libsa. Sponsored by: Netflix --- sys/boot/efi/boot1/Makefile | 4 ++-- sys/boot/i386/gptboot/Makefile | 2 +- sys/boot/{common => libsa}/ufsread.c | 0 sys/boot/powerpc/boot1.chrp/Makefile | 5 +++-- sys/boot/sparc64/boot1/Makefile | 4 +++- 5 files changed, 9 insertions(+), 6 deletions(-) rename sys/boot/{common => libsa}/ufsread.c (100%) diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index 883d6d39d1d8..1907dc222d18 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -2,7 +2,7 @@ MAN= -.include +.include "../Makefile.inc" MK_SSP= no @@ -120,7 +120,7 @@ boot1.efi: ${PROG} -j .rela.dyn -j .reloc -j .eh_frame \ --output-target=${EFI_TARGET} ${.ALLSRC} ${.TARGET} -boot1.o: ${.CURDIR}/../../common/ufsread.c +boot1.o: ${SASRC}/ufsread.c # The following inserts our objects into a template FAT file system # created by generate-fat.sh diff --git a/sys/boot/i386/gptboot/Makefile b/sys/boot/i386/gptboot/Makefile index e7f2c8391cda..e85c54654eca 100644 --- a/sys/boot/i386/gptboot/Makefile +++ b/sys/boot/i386/gptboot/Makefile @@ -78,7 +78,7 @@ gptboot.bin: gptboot.out gptboot.out: ${BTXCRT} gptboot.o sio.o crc32.o drv.o cons.o util.o ${OPENCRYPTO_XTS} ${LD} ${LD_FLAGS} -Ttext ${ORG2} -o ${.TARGET} ${.ALLSRC} ${LIBGELIBOOT} ${LIBSA32} -gptboot.o: ${.CURDIR}/../../common/ufsread.c +gptboot.o: ${SASRC}/ufsread.c .if ${MACHINE_CPUARCH} == "amd64" beforedepend gptboot.o: machine diff --git a/sys/boot/common/ufsread.c b/sys/boot/libsa/ufsread.c similarity index 100% rename from sys/boot/common/ufsread.c rename to sys/boot/libsa/ufsread.c diff --git a/sys/boot/powerpc/boot1.chrp/Makefile b/sys/boot/powerpc/boot1.chrp/Makefile index a642f6c4b958..1caacd8b5840 100644 --- a/sys/boot/powerpc/boot1.chrp/Makefile +++ b/sys/boot/powerpc/boot1.chrp/Makefile @@ -17,7 +17,8 @@ CFLAGS= -ffreestanding -msoft-float \ -D_STANDALONE LDFLAGS=-nostdlib -static -Wl,-N -.include "${.CURDIR}/../Makefile.inc" +.include "../Makefile.inc" + .PATH: ${.CURDIR}/../../../libkern ${.CURDIR}/../../../../lib/libc/powerpc/gen ${.CURDIR} # The following inserts out objects into a template HFS @@ -36,7 +37,7 @@ boot1.hfs: boot1.elf bootinfo.txt CLEANFILES= boot1.hfs -boot1.o: ${.CURDIR}/../../common/ufsread.c +boot1.o: ${SASRC}/ufsread.c .include diff --git a/sys/boot/sparc64/boot1/Makefile b/sys/boot/sparc64/boot1/Makefile index 3453b286308e..8804ed6dd63b 100644 --- a/sys/boot/sparc64/boot1/Makefile +++ b/sys/boot/sparc64/boot1/Makefile @@ -1,5 +1,7 @@ # $FreeBSD$ +.include "../Makefile.inc" + PROG= boot1.elf INTERNALPROG= MAN= @@ -25,6 +27,6 @@ ${FILES}: boot1.aout boot1.aout: boot1.elf elf2aout -o ${.TARGET} ${.ALLSRC} -boot1.o: ${.CURDIR}/../../common/ufsread.c +boot1.o: ${SASRC}/ufsread.c .include From 1461c26d38fb9eb8583e4fd60cbea795330e3e99 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 15:16:16 +0000 Subject: [PATCH 037/219] Rename exit to efi_exit to avoid clashing with libsa exit definition Rename exit to efi_exit. It doesn't have the proper signature and conflicts with standard definition. Provide the standard definition as well. Sponsored by: Netflix --- sys/boot/efi/include/efilib.h | 2 +- sys/boot/efi/loader/arch/i386/exec.c | 6 ------ sys/boot/efi/loader/efi_main.c | 15 +++++++++++---- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/sys/boot/efi/include/efilib.h b/sys/boot/efi/include/efilib.h index 72752c575ac1..eaaae613dca0 100644 --- a/sys/boot/efi/include/efilib.h +++ b/sys/boot/efi/include/efilib.h @@ -95,7 +95,7 @@ void efi_time_fini(void); EFI_STATUS efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE* Xsystab); EFI_STATUS main(int argc, CHAR16 *argv[]); -void exit(EFI_STATUS status) __dead2; +void efi_exit(EFI_STATUS status) __dead2; void delay(int usecs); /* EFI environment initialization. */ diff --git a/sys/boot/efi/loader/arch/i386/exec.c b/sys/boot/efi/loader/arch/i386/exec.c index 12a367cda5c2..579f5593b24b 100644 --- a/sys/boot/efi/loader/arch/i386/exec.c +++ b/sys/boot/efi/loader/arch/i386/exec.c @@ -36,12 +36,6 @@ __FBSDID("$FreeBSD$"); uint32_t __base; struct __v86 __v86; -/* XXX - Needed a definition here to implicitly define exit(); do not remove. */ -static void -exit(int x) -{ -} - void __v86int() { diff --git a/sys/boot/efi/loader/efi_main.c b/sys/boot/efi/loader/efi_main.c index 045ee9bc2f7a..e424d89666ec 100644 --- a/sys/boot/efi/loader/efi_main.c +++ b/sys/boot/efi/loader/efi_main.c @@ -36,13 +36,20 @@ static EFI_PHYSICAL_ADDRESS heap; static UINTN heapsize; void -exit(EFI_STATUS exit_code) +efi_exit(EFI_STATUS exit_code) { BS->FreePages(heap, EFI_SIZE_TO_PAGES(heapsize)); BS->Exit(IH, exit_code, 0, NULL); } +void +exit(int status) +{ + + efi_exit(EFI_LOAD_ERROR); +} + static CHAR16 * arg_skipsep(CHAR16 *argp) { @@ -92,11 +99,11 @@ efi_main(EFI_HANDLE image_handle, EFI_SYSTEM_TABLE *system_table) setheap((void *)(uintptr_t)heap, (void *)(uintptr_t)(heap + heapsize)); - /* Use exit() from here on... */ + /* Use efi_exit() from here on... */ status = BS->HandleProtocol(IH, &image_protocol, (VOID**)&img); if (status != EFI_SUCCESS) - exit(status); + efi_exit(status); /* * Pre-process the (optional) load options. If the option string @@ -176,6 +183,6 @@ efi_main(EFI_HANDLE image_handle, EFI_SYSTEM_TABLE *system_table) argv[argc] = NULL; status = main(argc, argv); - exit(status); + efi_exit(status); return (status); } From a37f4eb6598d02187a9feace978f26c80753895d Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 15:16:22 +0000 Subject: [PATCH 038/219] Define prototype for exit and ensure references Define a prototype for exit in stand.h. Provide a reference to exit in a few conf.c files to ensure that its definition gets pulled in early. Since exit() is a MD routine, it isn't defined in libsa. However, libsa tends to be listed last and will soon have panic() in it which calls exit(). The reference to exit early ensures that the MD exit is available to satisfy linking for static libraries. --- sys/boot/arm/uboot/conf.c | 3 +++ sys/boot/libsa/stand.h | 1 + sys/boot/mips/uboot/conf.c | 3 +++ sys/boot/powerpc/ofw/conf.c | 3 +++ sys/boot/powerpc/uboot/conf.c | 3 +++ 5 files changed, 13 insertions(+) diff --git a/sys/boot/arm/uboot/conf.c b/sys/boot/arm/uboot/conf.c index 03dc64125e43..777a7b20340c 100644 --- a/sys/boot/arm/uboot/conf.c +++ b/sys/boot/arm/uboot/conf.c @@ -36,6 +36,9 @@ __FBSDID("$FreeBSD$"); #include "dev_net.h" #endif +/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ +void (*exitfn)(int) = exit; + struct devsw *devsw[] = { #if defined(LOADER_DISK_SUPPORT) || defined(LOADER_CD9660_SUPPORT) &uboot_storage, diff --git a/sys/boot/libsa/stand.h b/sys/boot/libsa/stand.h index 8973a32d0bc9..bddfa76657d6 100644 --- a/sys/boot/libsa/stand.h +++ b/sys/boot/libsa/stand.h @@ -376,6 +376,7 @@ extern int null_readdir(struct open_file *f, struct dirent *d); * Machine dependent functions and data, must be provided or stubbed by * the consumer */ +extern void exit(int); extern int getchar(void); extern int ischar(void); extern void putchar(int); diff --git a/sys/boot/mips/uboot/conf.c b/sys/boot/mips/uboot/conf.c index 30c92610f724..3579b6a56753 100644 --- a/sys/boot/mips/uboot/conf.c +++ b/sys/boot/mips/uboot/conf.c @@ -36,6 +36,9 @@ __FBSDID("$FreeBSD$"); #include "dev_net.h" #endif +/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ +void (*exitfn)(int) = exit; + struct devsw *devsw[] = { #if defined(LOADER_DISK_SUPPORT) || defined(LOADER_CD9660_SUPPORT) &uboot_storage, diff --git a/sys/boot/powerpc/ofw/conf.c b/sys/boot/powerpc/ofw/conf.c index 5666f4accae2..7cad372cef04 100644 --- a/sys/boot/powerpc/ofw/conf.c +++ b/sys/boot/powerpc/ofw/conf.c @@ -36,6 +36,9 @@ __FBSDID("$FreeBSD$"); #include "dev_net.h" #endif +/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ +void (*exitfn)(int) = exit; + /* * We could use linker sets for some or all of these, but * then we would have to control what ended up linked into diff --git a/sys/boot/powerpc/uboot/conf.c b/sys/boot/powerpc/uboot/conf.c index 35305371ce6b..561238d1ccf7 100644 --- a/sys/boot/powerpc/uboot/conf.c +++ b/sys/boot/powerpc/uboot/conf.c @@ -35,6 +35,9 @@ __FBSDID("$FreeBSD$"); #include "dev_net.h" #endif +/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ +void (*exitfn)(int) = exit; + /* * We could use linker sets for some or all of these, but * then we would have to control what ended up linked into From 042ea0aa161fe2a696f2e873905e9f7e556abfc5 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Thu, 12 Oct 2017 15:16:27 +0000 Subject: [PATCH 039/219] Move panic back into libsa. It's documented in libstand(3) to belong there. Sponsored by: Netflix --- sys/boot/common/Makefile.inc | 2 +- sys/boot/libsa/Makefile | 4 ++-- sys/boot/{common => libsa}/panic.c | 0 3 files changed, 3 insertions(+), 3 deletions(-) rename sys/boot/{common => libsa}/panic.c (100%) diff --git a/sys/boot/common/Makefile.inc b/sys/boot/common/Makefile.inc index 3f9d925d0ef0..59bd6497e0a2 100644 --- a/sys/boot/common/Makefile.inc +++ b/sys/boot/common/Makefile.inc @@ -4,7 +4,7 @@ SRCS+= boot.c commands.c console.c devopen.c interp.c SRCS+= interp_backslash.c interp_parse.c ls.c misc.c -SRCS+= module.c panic.c +SRCS+= module.c .if ${MACHINE} == "i386" || ${MACHINE_CPUARCH} == "amd64" SRCS+= load_elf32.c load_elf32_obj.c reloc_elf32.c diff --git a/sys/boot/libsa/Makefile b/sys/boot/libsa/Makefile index 2e9c304ac232..cdd4a86a5ad2 100644 --- a/sys/boot/libsa/Makefile +++ b/sys/boot/libsa/Makefile @@ -25,8 +25,8 @@ CFLAGS+= -I${SASRC} # standalone components and stuff we have modified locally SRCS+= gzguts.h zutil.h __main.c assert.c bcd.c environment.c getopt.c gets.c \ - globals.c pager.c printf.c strdup.c strerror.c strtol.c strtoul.c random.c \ - sbrk.c twiddle.c zalloc.c zalloc_malloc.c + globals.c pager.c panic.c printf.c strdup.c strerror.c strtol.c strtoul.c \ + random.c sbrk.c twiddle.c zalloc.c zalloc_malloc.c # private (pruned) versions of libc string functions SRCS+= strcasecmp.c diff --git a/sys/boot/common/panic.c b/sys/boot/libsa/panic.c similarity index 100% rename from sys/boot/common/panic.c rename to sys/boot/libsa/panic.c From 5532aa9bb4147869a6444abf6b5de0355ea26716 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 12 Oct 2017 15:45:53 +0000 Subject: [PATCH 040/219] allow posix_fallocate in capability mode posix_fallocate is logically equivalent to writing zero blocks to the desired file size and there is no reason to prevent calling it in capability mode. posix_fallocate already checked for the CAP_WRITE right, so we merely need to list it in capabilities.conf. Reviewed by: allanjude MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12640 --- lib/libc/sys/posix_fallocate.2 | 6 +++++- sys/kern/capabilities.conf | 1 + sys/kern/vfs_syscalls.c | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/lib/libc/sys/posix_fallocate.2 b/lib/libc/sys/posix_fallocate.2 index 0fe635541334..1bc59caf7239 100644 --- a/lib/libc/sys/posix_fallocate.2 +++ b/lib/libc/sys/posix_fallocate.2 @@ -28,7 +28,7 @@ .\" @(#)open.2 8.2 (Berkeley) 11/16/93 .\" $FreeBSD$ .\" -.Dd January 23, 2014 +.Dd October 12, 2017 .Dt POSIX_FALLOCATE 2 .Os .Sh NAME @@ -118,6 +118,10 @@ argument does not refer to a regular file. .It Bq Er ENOSPC There is insufficient free space remaining on the file system storage media. +.It Bq Er ENOTCAPABLE +The file descriptor +.Fa fd +has insufficient rights. .It Bq Er ESPIPE The .Fa fd diff --git a/sys/kern/capabilities.conf b/sys/kern/capabilities.conf index e2aa04638cc9..61a8817af810 100644 --- a/sys/kern/capabilities.conf +++ b/sys/kern/capabilities.conf @@ -488,6 +488,7 @@ poll ## ## Allow I/O-related file descriptors, subject to capability rights. ## +posix_fallocate pread preadv diff --git a/sys/kern/vfs_syscalls.c b/sys/kern/vfs_syscalls.c index b4408e3ac919..dac26f115427 100644 --- a/sys/kern/vfs_syscalls.c +++ b/sys/kern/vfs_syscalls.c @@ -4400,7 +4400,7 @@ kern_posix_fallocate(struct thread *td, int fd, off_t offset, off_t len) if (offset > OFF_MAX - len) return (EFBIG); AUDIT_ARG_FD(fd); - error = fget(td, fd, cap_rights_init(&rights, CAP_WRITE), &fp); + error = fget(td, fd, cap_rights_init(&rights, CAP_PWRITE), &fp); if (error != 0) return (error); AUDIT_ARG_FILE(td->td_proc, fp); From 05e47051a2db7d9fd37b9f37ad278f9ebd68a388 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 12 Oct 2017 15:48:37 +0000 Subject: [PATCH 041/219] regen init_sysent.c r324560 --- sys/kern/init_sysent.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/kern/init_sysent.c b/sys/kern/init_sysent.c index 125587d50574..58eedb2a058a 100644 --- a/sys/kern/init_sysent.c +++ b/sys/kern/init_sysent.c @@ -581,7 +581,7 @@ struct sysent sysent[] = { { AS(rctl_get_limits_args), (sy_call_t *)sys_rctl_get_limits, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 527 = rctl_get_limits */ { AS(rctl_add_rule_args), (sy_call_t *)sys_rctl_add_rule, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 528 = rctl_add_rule */ { AS(rctl_remove_rule_args), (sy_call_t *)sys_rctl_remove_rule, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 529 = rctl_remove_rule */ - { AS(posix_fallocate_args), (sy_call_t *)sys_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 530 = posix_fallocate */ + { AS(posix_fallocate_args), (sy_call_t *)sys_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 530 = posix_fallocate */ { AS(posix_fadvise_args), (sy_call_t *)sys_posix_fadvise, AUE_POSIX_FADVISE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 531 = posix_fadvise */ { AS(wait6_args), (sy_call_t *)sys_wait6, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 532 = wait6 */ { AS(cap_rights_limit_args), (sy_call_t *)sys_cap_rights_limit, AUE_CAP_RIGHTS_LIMIT, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 533 = cap_rights_limit */ From 8d94da2899516001d2f6f04b7f4522376815b10f Mon Sep 17 00:00:00 2001 From: "Bjoern A. Zeeb" Date: Thu, 12 Oct 2017 15:53:54 +0000 Subject: [PATCH 042/219] Add rev16 instruction to the disassembler. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D12645 --- sys/arm/arm/disassem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sys/arm/arm/disassem.c b/sys/arm/arm/disassem.c index 81dbe1096f2d..3aa94e893fae 100644 --- a/sys/arm/arm/disassem.c +++ b/sys/arm/arm/disassem.c @@ -131,6 +131,7 @@ static const struct arm32_insn arm32_i[] = { { 0x0c500000, 0x04400000, "strb", "daW" }, { 0x0c500000, 0x04500000, "ldrb", "daW" }, #if __ARM_ARCH >= 6 + { 0x0fff0ff0, 0x06bf0fb0, "rev16", "dm" }, { 0xffffffff, 0xf57ff01f, "clrex", "c" }, { 0x0ff00ff0, 0x01800f90, "strex", "dmo" }, { 0x0ff00fff, 0x01900f9f, "ldrex", "do" }, From 449ed68efbe231fd21407cf901a2ef966e78b644 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Thu, 12 Oct 2017 18:00:29 +0000 Subject: [PATCH 043/219] a10_ehci: Remove the passby code It doesn't seems to be needed anymore and this make ehci working again on the Pine64. Thanks to jmcneill@ for the help. Tested on: Pine64 (A64), OrangePi One (H3), BananapiM2 (A31s) --- sys/arm/allwinner/a10_ehci.c | 25 +------------------------ 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/sys/arm/allwinner/a10_ehci.c b/sys/arm/allwinner/a10_ehci.c index 15c14c0eb761..64da9b5fe516 100644 --- a/sys/arm/allwinner/a10_ehci.c +++ b/sys/arm/allwinner/a10_ehci.c @@ -65,17 +65,10 @@ __FBSDID("$FreeBSD$"); #define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller" -#define SW_USB_PMU_IRQ_ENABLE 0x800 - #define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4)) #define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5)) #define SW_SDRAM_BP_HPCR_ACCESS (1 << 0) -#define SW_ULPI_BYPASS (1 << 0) -#define SW_AHB_INCRX_ALIGN (1 << 8) -#define SW_AHB_INCR4 (1 << 9) -#define SW_AHB_INCR8 (1 << 10) - #define USB_CONF(d) \ (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data @@ -124,7 +117,7 @@ static struct ofw_compat_data compat_data[] = { { "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf }, { "allwinner,sun8i-a83t-ehci", (uintptr_t)&a31_ehci_conf }, { "allwinner,sun8i-h3-ehci", (uintptr_t)&a31_ehci_conf }, - /* { "allwinner,sun50i-a64-ehci", (uintptr_t)&a31_ehci_conf }, */ + { "allwinner,sun50i-a64-ehci", (uintptr_t)&a31_ehci_conf }, { NULL, (uintptr_t)NULL } }; @@ -254,14 +247,6 @@ a10_ehci_attach(device_t self) } } - /* Enable passby */ - reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); - reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */ - reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */ - reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */ - reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */ - A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); - /* Configure port */ if (conf->sdram_init) { reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2); @@ -333,14 +318,6 @@ a10_ehci_detach(device_t self) A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value); } - /* Disable passby */ - reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); - reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */ - reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */ - reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */ - reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */ - A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); - /* Disable clock */ TAILQ_FOREACH_SAFE(clk, &aw_sc->clk_list, next, clk_tmp) { err = clk_disable(clk->clk); From bfb763bd24ffaf4c1f08679a20c6fd4712d37da2 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 12 Oct 2017 18:30:54 +0000 Subject: [PATCH 044/219] allow posix_fallocate in 32-bit compat capability mode Reported by: kib MFC after: 2 weeks MFC with: r324560 Sponsored by: The FreeBSD Foundation --- sys/compat/freebsd32/capabilities.conf | 1 + 1 file changed, 1 insertion(+) diff --git a/sys/compat/freebsd32/capabilities.conf b/sys/compat/freebsd32/capabilities.conf index 4458227fd7bf..d5681b7740f3 100644 --- a/sys/compat/freebsd32/capabilities.conf +++ b/sys/compat/freebsd32/capabilities.conf @@ -200,6 +200,7 @@ pdkill freebsd32_pipe pipe2 poll +freebsd32_posix_fallocate freebsd32_pread freebsd32_preadv profil From cf62459c35785ea7d4b67230dabc4335afe52204 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 12 Oct 2017 18:31:28 +0000 Subject: [PATCH 045/219] regen freebsd32_sysent.c after r324564 (freebsd32_posix_fallocate) --- sys/compat/freebsd32/freebsd32_sysent.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/compat/freebsd32/freebsd32_sysent.c b/sys/compat/freebsd32/freebsd32_sysent.c index ee7d6c763d0b..4891616428f3 100644 --- a/sys/compat/freebsd32/freebsd32_sysent.c +++ b/sys/compat/freebsd32/freebsd32_sysent.c @@ -602,11 +602,11 @@ struct sysent freebsd32_sysent[] = { { AS(rctl_add_rule_args), (sy_call_t *)sys_rctl_add_rule, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 528 = rctl_add_rule */ { AS(rctl_remove_rule_args), (sy_call_t *)sys_rctl_remove_rule, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 529 = rctl_remove_rule */ #ifdef PAD64_REQUIRED - { AS(freebsd32_posix_fallocate_args), (sy_call_t *)freebsd32_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 530 = freebsd32_posix_fallocate */ + { AS(freebsd32_posix_fallocate_args), (sy_call_t *)freebsd32_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 530 = freebsd32_posix_fallocate */ { AS(freebsd32_posix_fadvise_args), (sy_call_t *)freebsd32_posix_fadvise, AUE_POSIX_FADVISE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 531 = freebsd32_posix_fadvise */ { AS(freebsd32_wait6_args), (sy_call_t *)freebsd32_wait6, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 532 = freebsd32_wait6 */ #else - { AS(freebsd32_posix_fallocate_args), (sy_call_t *)freebsd32_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 530 = freebsd32_posix_fallocate */ + { AS(freebsd32_posix_fallocate_args), (sy_call_t *)freebsd32_posix_fallocate, AUE_POSIX_FALLOCATE, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 530 = freebsd32_posix_fallocate */ { AS(freebsd32_posix_fadvise_args), (sy_call_t *)freebsd32_posix_fadvise, AUE_POSIX_FADVISE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 531 = freebsd32_posix_fadvise */ { AS(freebsd32_wait6_args), (sy_call_t *)freebsd32_wait6, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 532 = freebsd32_wait6 */ #endif From 96437391210db70d468bfcde6ac058a4e113eee7 Mon Sep 17 00:00:00 2001 From: Bryan Drewery Date: Thu, 12 Oct 2017 19:58:21 +0000 Subject: [PATCH 046/219] Fix shadowed variable hidden by WARNS changing to 3 in r313006. Sponsored by: Dell EMC Isilon MFC after: 1 week --- tests/sys/kern/ptrace_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/sys/kern/ptrace_test.c b/tests/sys/kern/ptrace_test.c index 5097678ad357..7f0b9655b14c 100644 --- a/tests/sys/kern/ptrace_test.c +++ b/tests/sys/kern/ptrace_test.c @@ -3084,7 +3084,7 @@ ATF_TC_BODY(ptrace__PT_ATTACH_with_SBDRY_thread, tc) ATF_REQUIRE((child = fork()) != -1); if (child == 0) { pthread_t t[2]; - int error, cfd; + int cfd; error = pthread_barrier_wait(&barrier); if (error != 0 && error != PTHREAD_BARRIER_SERIAL_THREAD) From 977401bd3be1bd2d8b78e2a80c5c5366a8dcff1a Mon Sep 17 00:00:00 2001 From: Glen Barber Date: Thu, 12 Oct 2017 20:31:10 +0000 Subject: [PATCH 047/219] Add arm/armv7 checks to env_check(). Sponsored by: The FreeBSD Foundation --- release/release.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/release/release.sh b/release/release.sh index e8e671b91c22..177c885b885c 100755 --- a/release/release.sh +++ b/release/release.sh @@ -148,7 +148,7 @@ env_check() { WITH_COMPRESSED_IMAGES= NODOC=yes case ${EMBEDDED_TARGET}:${EMBEDDED_TARGET_ARCH} in - arm:armv6|arm64:aarch64) + arm:armv6|arm:armv7|arm64:aarch64) chroot_build_release_cmd="chroot_arm_build_release" ;; *) From b49e9abcf44cafaf5cfad7029c9a6adbb28346e8 Mon Sep 17 00:00:00 2001 From: Alan Somers Date: Thu, 12 Oct 2017 21:25:11 +0000 Subject: [PATCH 048/219] Optimize zpool_read_all_labels with AIO Read all labels in parallel instead of sequentially MFC after: 3 weeks X-MFC-With: 322854 Sponsored by: Spectra Logic Corp Differential Revision: https://reviews.freebsd.org/D12495 --- .../lib/libzfs/common/libzfs_import.c | 41 +++++++++++++++---- 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/cddl/contrib/opensolaris/lib/libzfs/common/libzfs_import.c b/cddl/contrib/opensolaris/lib/libzfs/common/libzfs_import.c index 906db5da38fc..215ff4214656 100644 --- a/cddl/contrib/opensolaris/lib/libzfs/common/libzfs_import.c +++ b/cddl/contrib/opensolaris/lib/libzfs/common/libzfs_import.c @@ -42,6 +42,7 @@ * using our derived config, and record the results. */ +#include #include #include #include @@ -919,13 +920,17 @@ zpool_read_label(int fd, nvlist_t **config) * Given a file descriptor, read the label information and return an nvlist * describing the configuration, if there is one. * returns the number of valid labels found + * If a label is found, returns it via config. The caller is responsible for + * freeing it. */ int zpool_read_all_labels(int fd, nvlist_t **config) { struct stat64 statbuf; + struct aiocb aiocbs[VDEV_LABELS]; + struct aiocb *aiocbps[VDEV_LABELS]; int l; - vdev_label_t *label; + vdev_label_t *labels; uint64_t state, txg, size; int nlabels = 0; @@ -935,19 +940,39 @@ zpool_read_all_labels(int fd, nvlist_t **config) return (0); size = P2ALIGN_TYPED(statbuf.st_size, sizeof (vdev_label_t), uint64_t); - if ((label = malloc(sizeof (vdev_label_t))) == NULL) + if ((labels = calloc(VDEV_LABELS, sizeof (vdev_label_t))) == NULL) return (0); + memset(aiocbs, 0, sizeof(aiocbs)); + for (l = 0; l < VDEV_LABELS; l++) { + aiocbs[l].aio_fildes = fd; + aiocbs[l].aio_offset = label_offset(size, l); + aiocbs[l].aio_buf = &labels[l]; + aiocbs[l].aio_nbytes = sizeof(vdev_label_t); + aiocbs[l].aio_lio_opcode = LIO_READ; + aiocbps[l] = &aiocbs[l]; + } + + if (lio_listio(LIO_WAIT, aiocbps, VDEV_LABELS, NULL) != 0) { + if (errno == EAGAIN || errno == EINTR || errno == EIO) { + for (l = 0; l < VDEV_LABELS; l++) { + errno = 0; + int r = aio_error(&aiocbs[l]); + if (r != EINVAL) + (void)aio_return(&aiocbs[l]); + } + } + return (0); + } + for (l = 0; l < VDEV_LABELS; l++) { nvlist_t *temp = NULL; - /* TODO: use aio_read so we can read al 4 labels in parallel */ - if (pread64(fd, label, sizeof (vdev_label_t), - label_offset(size, l)) != sizeof (vdev_label_t)) + if (aio_return(&aiocbs[l]) != sizeof(vdev_label_t)) continue; - if (nvlist_unpack(label->vl_vdev_phys.vp_nvlist, - sizeof (label->vl_vdev_phys.vp_nvlist), &temp, 0) != 0) + if (nvlist_unpack(labels[l].vl_vdev_phys.vp_nvlist, + sizeof (labels[l].vl_vdev_phys.vp_nvlist), &temp, 0) != 0) continue; if (nvlist_lookup_uint64(temp, ZPOOL_CONFIG_POOL_STATE, @@ -970,7 +995,7 @@ zpool_read_all_labels(int fd, nvlist_t **config) nlabels++; } - free(label); + free(labels); return (nlabels); } From 3b5aa97c104993d5b3db33fbfd79692bf034f905 Mon Sep 17 00:00:00 2001 From: Gleb Smirnoff Date: Thu, 12 Oct 2017 21:26:52 +0000 Subject: [PATCH 049/219] Fix build after r324446. --- sys/dev/dpaa/if_dtsec_rm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/dpaa/if_dtsec_rm.c b/sys/dev/dpaa/if_dtsec_rm.c index f2580d5f5a03..806eb17d3864 100644 --- a/sys/dev/dpaa/if_dtsec_rm.c +++ b/sys/dev/dpaa/if_dtsec_rm.c @@ -347,7 +347,7 @@ dtsec_rm_fqr_mext_free(struct mbuf *m) if (bman_count(sc->sc_rx_pool) <= DTSEC_RM_POOL_RX_MAX_SIZE) bman_put_buffer(sc->sc_rx_pool, buffer); else - dtsec_rm_pool_rx_put_buffer(arg, buffer, NULL); + dtsec_rm_pool_rx_put_buffer(sc, buffer, NULL); } static e_RxStoreResponse From 48f95a360ed15bd208c90b54c5e3711a917f11d8 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Thu, 12 Oct 2017 21:56:58 +0000 Subject: [PATCH 050/219] [net80211] begin handling multiple hardware decap'ed A-MSDU in the RX path. The duplicate detection code currently expects A-MSDU frames to be encaped - they're decap'ed /after/ duplicate detection. However for ath10k (and iwm hardware later on) the firmware supports doing A-MSDU decap in hardware - which shows up as multiple frames with the same sequence number and IV. This is the first part of decap handling - if we see a stretch of A-MSDU frames from the driver with the MORE bit set, then don't treat them as duplicates. This isn't 100% complete as crypto sequence number handling and "A-MSDU in A-MPDU" needs handling, but it's a start. This should be a glorified no-op for everyone. Please tell me if it isn't. --- sys/net80211/ieee80211_input.h | 47 +++++++++++++++++++++++++++++++++- sys/net80211/ieee80211_ioctl.h | 6 ++++- 2 files changed, 51 insertions(+), 2 deletions(-) diff --git a/sys/net80211/ieee80211_input.h b/sys/net80211/ieee80211_input.h index cff07c68e9ca..192138fa28db 100644 --- a/sys/net80211/ieee80211_input.h +++ b/sys/net80211/ieee80211_input.h @@ -131,6 +131,38 @@ ishtinfooui(const uint8_t *frm) return frm[1] > 3 && le32dec(frm+2) == ((BCM_OUI_HTINFO<<24)|BCM_OUI); } +static __inline int +ieee80211_check_rxseq_amsdu(const struct ieee80211_rx_stats *rxs) +{ + + return (!! (rxs->c_pktflags & IEEE80211_RX_F_AMSDU)); +} + +/* + * Return 1 if the rxseq check should increment the sequence + * number. Return 0 if it's part of an AMSDU batch and it isn't + * the final frame in the decap'ed burst. + */ +static __inline int +ieee80211_check_rxseq_amsdu_more(const struct ieee80211_rx_stats *rxs) +{ + /* No state? ok */ + if (rxs == NULL) + return (1); + + /* State but no AMSDU set? ok */ + if ((rxs->c_pktflags & IEEE80211_RX_F_AMSDU) == 0) + return (1); + + /* State, AMSDU set, then _MORE means "don't inc yet" */ + if (rxs->c_pktflags & IEEE80211_RX_F_AMSDU_MORE) { + return (0); + } + + /* Both are set, so return ok */ + return (1); +} + /* * Check the current frame sequence number against the current TID * state and return whether it's in sequence or should be dropped. @@ -238,7 +270,20 @@ ieee80211_check_rxseq(struct ieee80211_node *ni, struct ieee80211_frame *wh, goto fail; ok: - ni->ni_rxseqs[tid] = rxseq; + /* + * Only bump the sequence number if it's the last frame + * in a batch. That way frames in the rest of the batch + * get included, and the last frame in the batch kicks + * it next. + */ + if (ieee80211_check_rxseq_amsdu_more(rxs)) { + ni->ni_rxseqs[tid] = rxseq; + if (ieee80211_check_rxseq_amsdu(rxs)) + IEEE80211_NODE_STAT(ni, rx_amsdu_more_end); + } else { + /* .. still waiting */ + IEEE80211_NODE_STAT(ni, rx_amsdu_more); + } return 1; diff --git a/sys/net80211/ieee80211_ioctl.h b/sys/net80211/ieee80211_ioctl.h index 7d472bc64c8d..a565593e780d 100644 --- a/sys/net80211/ieee80211_ioctl.h +++ b/sys/net80211/ieee80211_ioctl.h @@ -84,7 +84,11 @@ struct ieee80211_nodestats { uint32_t ns_tx_deauth_code; /* last deauth reason */ uint32_t ns_tx_disassoc; /* disassociations */ uint32_t ns_tx_disassoc_code; /* last disassociation reason */ - uint32_t ns_spare[8]; + + /* Hardware A-MSDU decode */ + uint32_t ns_rx_amsdu_more; /* RX decap A-MSDU, more coming from A-MSDU */ + uint32_t ns_rx_amsdu_more_end; /* RX decap A-MSDU (or any other frame), no more coming */ + uint32_t ns_spare[6]; }; /* From 565312d18481400add6fc7b7bcc08c90f23583a0 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Thu, 12 Oct 2017 21:58:51 +0000 Subject: [PATCH 051/219] [ath] Begin using the replacement EDCA functions. As part of ath10k and other chipset support, the EDCA stuff has to be moved to potentially be per-VAP. For hardware that doesn't support it (ie, everything that we currently support) it can just fetch the "current" global EDCA parameters for the NIC. This is one of those parameters that is linked to the currently active channel context / VAP in Linux mac80211 parlance. Tested: * ath(4), STA and AP modes --- sys/dev/ath/if_ath.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index 87e97109db76..1b0f47f71390 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -4049,10 +4049,14 @@ ath_txq_update(struct ath_softc *sc, int ac) #define ATH_EXPONENT_TO_VALUE(v) ((1<sc_ic; struct ath_txq *txq = sc->sc_ac2q[ac]; - struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac]; + struct chanAccParams chp; + struct wmeParams *wmep; struct ath_hal *ah = sc->sc_ah; HAL_TXQ_INFO qi; + ieee80211_wme_ic_getparams(ic, &chp); + wmep = &chp.cap_wmeParams[ac]; + ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi); #ifdef IEEE80211_SUPPORT_TDMA if (sc->sc_tdma) { From 79caf56e9767005fecebc38ef00570304ed26e1f Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Fri, 13 Oct 2017 06:49:07 +0000 Subject: [PATCH 052/219] [net80211] don't try to follow a NULL rxs pointer down the sink. It's smelly, and we already checked earlier whether we needed to. --- sys/net80211/ieee80211_input.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/net80211/ieee80211_input.h b/sys/net80211/ieee80211_input.h index 192138fa28db..9bdf7790d590 100644 --- a/sys/net80211/ieee80211_input.h +++ b/sys/net80211/ieee80211_input.h @@ -278,7 +278,7 @@ ieee80211_check_rxseq(struct ieee80211_node *ni, struct ieee80211_frame *wh, */ if (ieee80211_check_rxseq_amsdu_more(rxs)) { ni->ni_rxseqs[tid] = rxseq; - if (ieee80211_check_rxseq_amsdu(rxs)) + if ((rxs != NULL) && ieee80211_check_rxseq_amsdu(rxs)) IEEE80211_NODE_STAT(ni, rx_amsdu_more_end); } else { /* .. still waiting */ From 668f9cbec09474a392225f0d2ab2c63f9c114958 Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Fri, 13 Oct 2017 09:21:41 +0000 Subject: [PATCH 053/219] i2c(8): clean up and clarify read operation The code went to a lot of trouble to issue either a start+stop condition or a repeated start condition only to follow it with a stop condition and a read(2) call that issues a new start condition. So, fix the read in I2C_MODE_REPEATED_START mode by using I2CREAD ioctl within the running transaction. This obviously requires that the slave address has the read bit set which was not required before. Another problem was with width parameter of zero and I2C_MODE_REPEATED_START mode. In that case we issued a repeated start without any preceding start. While here, remove the redundant (unused) argument to I2CSTOP throughout the program. Also, clarify the meaning of -w option, especially "-w 0", in the manual page. Reviewed by: no one Differential Revision: https://reviews.freebsd.org/D12331 --- usr.sbin/i2c/i2c.8 | 10 ++++++++++ usr.sbin/i2c/i2c.c | 47 ++++++++++++++++++++++------------------------ 2 files changed, 32 insertions(+), 25 deletions(-) diff --git a/usr.sbin/i2c/i2c.8 b/usr.sbin/i2c/i2c.8 index 27f7621156b6..03f0c125c24a 100644 --- a/usr.sbin/i2c/i2c.8 +++ b/usr.sbin/i2c/i2c.8 @@ -83,6 +83,10 @@ using selected addresses 'a:b:c'. This option is available only when "-s" is used. .It Fl o Ar offset offset within the device for data transfer (hex). +The default is zero. +Use +.Dq -w 0 +to disable writing of the offset to the slave. .It Fl r reset the controller. .It Fl s @@ -91,6 +95,12 @@ scan the bus for devices. be verbose. .It Fl w Ar 0|8|16 device addressing width (in bits). +This is used to determine how to pass +.Ar offset +specified with +.Fl o +to the slave. +Zero means that the offset is ignored and not passed to the slave at all. .El .Sh WARNINGS Great care must be taken when manipulating slave I2C devices with the diff --git a/usr.sbin/i2c/i2c.c b/usr.sbin/i2c/i2c.c index 29e7aedaba5e..8ab58219b794 100644 --- a/usr.sbin/i2c/i2c.c +++ b/usr.sbin/i2c/i2c.c @@ -212,15 +212,14 @@ scan_bus(struct iiccmd cmd, char *dev, int skip, char *skip_addr) use_read_xfer = 1; goto start_over; } - cmd.slave = i << 1; - cmd.last = 1; - ioctl(fd, I2CSTOP, &cmd); + ioctl(fd, I2CSTOP); } if (error == 0) { ++num_found; printf("%02x ", i); } } + /* * If we found nothing, maybe START is not supported and returns a * generic error code such as EIO or ENXIO, so try again using reads. @@ -355,7 +354,7 @@ i2c_write(char *dev, struct options i2c_opt, char *i2c_buf) } } - error = ioctl(fd, I2CSTOP, &cmd); + error = ioctl(fd, I2CSTOP); if (error == -1) { err_msg = "ioctl: error sending stop condition"; goto err2; @@ -439,8 +438,7 @@ i2c_write(char *dev, struct options i2c_opt, char *i2c_buf) } break; } - cmd.slave = i2c_opt.addr; - error = ioctl(fd, I2CSTOP, &cmd); + error = ioctl(fd, I2CSTOP); if (error == -1) { err_msg = "ioctl: error sending stop condition"; goto err2; @@ -450,8 +448,7 @@ i2c_write(char *dev, struct options i2c_opt, char *i2c_buf) return (0); err1: - cmd.slave = i2c_opt.addr; - error = ioctl(fd, I2CSTOP, &cmd); + error = ioctl(fd, I2CSTOP); if (error == -1) fprintf(stderr, "error sending stop condition\n"); err2: @@ -466,7 +463,7 @@ static int i2c_read(char *dev, struct options i2c_opt, char *i2c_buf) { struct iiccmd cmd; - int i, fd, error, bufsize; + int fd, error, bufsize; char *err_msg, data = 0, *buf; fd = open(dev, O_RDWR); @@ -503,23 +500,22 @@ i2c_read(char *dev, struct options i2c_opt, char *i2c_buf) } if (i2c_opt.mode == I2C_MODE_STOP_START) { - cmd.slave = i2c_opt.addr; - error = ioctl(fd, I2CSTOP, &cmd); + error = ioctl(fd, I2CSTOP); if (error == -1) { err_msg = "error sending stop condition"; goto err2; } } } - cmd.slave = i2c_opt.addr; + cmd.slave = i2c_opt.addr | 1; cmd.count = 1; cmd.last = 0; cmd.buf = &data; - if (i2c_opt.mode == I2C_MODE_STOP_START) { + if (i2c_opt.mode == I2C_MODE_STOP_START || i2c_opt.width == 0) { error = ioctl(fd, I2CSTART, &cmd); if (error == -1) { err_msg = "ioctl: error sending start condition"; - goto err1; + goto err2; } } else if (i2c_opt.mode == I2C_MODE_REPEATED_START) { error = ioctl(fd, I2CRPTSTART, &cmd); @@ -529,26 +525,27 @@ i2c_read(char *dev, struct options i2c_opt, char *i2c_buf) goto err1; } } - error = ioctl(fd, I2CSTOP, &cmd); + + cmd.count = i2c_opt.count; + cmd.buf = i2c_buf; + cmd.last = 1; + error = ioctl(fd, I2CREAD, &cmd); if (error == -1) { - err_msg = "error sending stop condition"; - goto err2; + err_msg = "ioctl: error while reading"; + goto err1; } - for (i = 0; i < i2c_opt.count; i++) { - error = read(fd, &i2c_buf[i], 1); - if (error == -1) { - err_msg = "ioctl: error while reading"; - goto err1; - } + error = ioctl(fd, I2CSTOP); + if (error == -1) { + err_msg = "error sending stop condtion\n"; + goto err2; } close(fd); return (0); err1: - cmd.slave = i2c_opt.addr; - error = ioctl(fd, I2CSTOP, &cmd); + error = ioctl(fd, I2CSTOP); if (error == -1) fprintf(stderr, "error sending stop condition\n"); err2: From f92e3400bc07ce541ea33b725f475f38eb47940d Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Fri, 13 Oct 2017 09:42:05 +0000 Subject: [PATCH 054/219] remove process and jail directory machinations from dounmount The manipulations done by mountcheckdirs() are not that useful during the unmount, they can bring about unexpected security consequences. Thic change effectively reverts the change in r73241. The change also allows to simplify the handling of rootvnode global variable. Discussed with: mckusick, mjg, kib Reviewed by: trasz MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D12366 --- sys/kern/vfs_mount.c | 33 +++++---------------------------- 1 file changed, 5 insertions(+), 28 deletions(-) diff --git a/sys/kern/vfs_mount.c b/sys/kern/vfs_mount.c index b0c296178737..5141de78c605 100644 --- a/sys/kern/vfs_mount.c +++ b/sys/kern/vfs_mount.c @@ -1262,7 +1262,7 @@ dounmount_cleanup(struct mount *mp, struct vnode *coveredvp, int mntkflags) int dounmount(struct mount *mp, int flags, struct thread *td) { - struct vnode *coveredvp, *fsrootvp; + struct vnode *coveredvp; int error; uint64_t async_flag; int mnt_gen_r; @@ -1364,22 +1364,6 @@ dounmount(struct mount *mp, int flags, struct thread *td) MNT_IUNLOCK(mp); cache_purgevfs(mp, false); /* remove cache entries for this file sys */ vfs_deallocate_syncvnode(mp); - /* - * For forced unmounts, move process cdir/rdir refs on the fs root - * vnode to the covered vnode. For non-forced unmounts we want - * such references to cause an EBUSY error. - */ - if ((flags & MNT_FORCE) && - VFS_ROOT(mp, LK_EXCLUSIVE, &fsrootvp) == 0) { - if (mp->mnt_vnodecovered != NULL && - (mp->mnt_flag & MNT_IGNORE) == 0) - mountcheckdirs(fsrootvp, mp->mnt_vnodecovered); - if (fsrootvp == rootvnode) { - vrele(rootvnode); - rootvnode = NULL; - } - vput(fsrootvp); - } if ((mp->mnt_flag & MNT_RDONLY) != 0 || (flags & MNT_FORCE) != 0 || (error = VFS_SYNC(mp, MNT_WAIT)) == 0) error = VFS_UNMOUNT(mp, flags); @@ -1391,17 +1375,6 @@ dounmount(struct mount *mp, int flags, struct thread *td) * it doesn't exist anymore. */ if (error && error != ENXIO) { - if ((flags & MNT_FORCE) && - VFS_ROOT(mp, LK_EXCLUSIVE, &fsrootvp) == 0) { - if (mp->mnt_vnodecovered != NULL && - (mp->mnt_flag & MNT_IGNORE) == 0) - mountcheckdirs(mp->mnt_vnodecovered, fsrootvp); - if (rootvnode == NULL) { - rootvnode = fsrootvp; - vref(rootvnode); - } - vput(fsrootvp); - } MNT_ILOCK(mp); mp->mnt_kern_flag &= ~MNTK_NOINSMNTQ; if ((mp->mnt_flag & MNT_RDONLY) == 0) { @@ -1432,6 +1405,10 @@ dounmount(struct mount *mp, int flags, struct thread *td) VOP_UNLOCK(coveredvp, 0); } vfs_event_signal(NULL, VQ_UNMOUNT, 0); + if (rootvnode != NULL && mp == rootvnode->v_mount) { + vrele(rootvnode); + rootvnode = NULL; + } if (mp == rootdevmp) rootdevmp = NULL; vfs_mount_destroy(mp); From 092f8ba32f014bea28f338f818338d74590c078e Mon Sep 17 00:00:00 2001 From: "Andrey V. Elsukov" Date: Fri, 13 Oct 2017 11:01:33 +0000 Subject: [PATCH 055/219] Return 'errno' value from the table_do_modify_record(), it is expected by table_modify_record(). This makes quiet operations with tables really quiet. PR: 222953 MFC after: 1 week --- sbin/ipfw/tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sbin/ipfw/tables.c b/sbin/ipfw/tables.c index 9aad4d959c7a..89bc36375d87 100644 --- a/sbin/ipfw/tables.c +++ b/sbin/ipfw/tables.c @@ -885,6 +885,8 @@ table_do_modify_record(int cmd, ipfw_obj_header *oh, sz += sizeof(*oh); error = do_get3(cmd, &oh->opheader, &sz); + if (error != 0) + error = errno; tent = (ipfw_obj_tentry *)(ctlv + 1); /* Copy result back to provided buffer */ memcpy(tent_base, ctlv + 1, sizeof(*tent) * count); From ff0a1379527f1c877aa3f7997c155e53e416757e Mon Sep 17 00:00:00 2001 From: "Andrey V. Elsukov" Date: Fri, 13 Oct 2017 11:11:53 +0000 Subject: [PATCH 056/219] Fix regression in handling O_FORWARD_IP opcode after r279948. To properly handle 'fwd tablearg,port' opcode, copy sin_port value from sockaddr_in structure stored in the opcode into corresponding hopstore field. PR: 222953 MFC after: 1 week --- sys/netpfil/ipfw/ip_fw2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/netpfil/ipfw/ip_fw2.c b/sys/netpfil/ipfw/ip_fw2.c index 77cee3a8284a..ce813d3fc938 100644 --- a/sys/netpfil/ipfw/ip_fw2.c +++ b/sys/netpfil/ipfw/ip_fw2.c @@ -2442,6 +2442,7 @@ do { \ sa6->sin6_len = sizeof(*sa6); sa6->sin6_addr = TARG_VAL( chain, tablearg, nh6); + sa6->sin6_port = sa->sin_port; /* * Set sin6_scope_id only for * link-local unicast addresses. @@ -2455,6 +2456,8 @@ do { \ } else #endif { + args->hopstore.sin_port = + sa->sin_port; sa = args->next_hop = &args->hopstore; sa->sin_family = AF_INET; From fe7f211c0e795f254e827a916602d87a71baf1e1 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Fri, 13 Oct 2017 13:47:55 +0000 Subject: [PATCH 057/219] truss: mention 'H' in usage r295930 introduced the 'H' option to display thread IDs, but did not add the option to usage(). PR: 222837 Submitted by: Oliver Kiddle MFC after: 1 week --- usr.bin/truss/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/usr.bin/truss/main.c b/usr.bin/truss/main.c index 84fd37e2a4d8..052546a032c0 100644 --- a/usr.bin/truss/main.c +++ b/usr.bin/truss/main.c @@ -57,8 +57,8 @@ static void usage(void) { fprintf(stderr, "%s\n%s\n", - "usage: truss [-cfaedDS] [-o file] [-s strsize] -p pid", - " truss [-cfaedDS] [-o file] [-s strsize] command [args]"); + "usage: truss [-cfaedDHS] [-o file] [-s strsize] -p pid", + " truss [-cfaedDHS] [-o file] [-s strsize] command [args]"); exit(1); } From 6e309d75d22d31b987dd5a28b6a758b043cfadff Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Fri, 13 Oct 2017 13:53:19 +0000 Subject: [PATCH 058/219] ANSIfy vm_kern.c PR: 222673 Submitted by: ota@j.email.ne.jp MFC after: 1 week --- sys/vm/vm_kern.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/sys/vm/vm_kern.c b/sys/vm/vm_kern.c index 65fb65decb1c..3f609b0339d2 100644 --- a/sys/vm/vm_kern.c +++ b/sys/vm/vm_kern.c @@ -122,8 +122,7 @@ SYSCTL_ULONG(_vm, OID_AUTO, max_kernel_address, CTLFLAG_RD, * a mapping on demand through vm_fault() will result in a panic. */ vm_offset_t -kva_alloc(size) - vm_size_t size; +kva_alloc(vm_size_t size) { vm_offset_t addr; @@ -144,9 +143,7 @@ kva_alloc(size) * This routine may not block on kernel maps. */ void -kva_free(addr, size) - vm_offset_t addr; - vm_size_t size; +kva_free(vm_offset_t addr, vm_size_t size) { size = round_page(size); @@ -433,9 +430,7 @@ kmem_free(struct vmem *vmem, vm_offset_t addr, vm_size_t size) * This routine may block. */ vm_offset_t -kmap_alloc_wait(map, size) - vm_map_t map; - vm_size_t size; +kmap_alloc_wait(vm_map_t map, vm_size_t size) { vm_offset_t addr; @@ -473,10 +468,7 @@ kmap_alloc_wait(map, size) * waiting for memory in that map. */ void -kmap_free_wakeup(map, addr, size) - vm_map_t map; - vm_offset_t addr; - vm_size_t size; +kmap_free_wakeup(vm_map_t map, vm_offset_t addr, vm_size_t size) { vm_map_lock(map); @@ -520,8 +512,7 @@ kmem_init_zero_region(void) * `start' as allocated, and the range between `start' and `end' as free. */ void -kmem_init(start, end) - vm_offset_t start, end; +kmem_init(vm_offset_t start, vm_offset_t end) { vm_map_t m; From 627ac5b4e3befe4830fe8abda5d649bf278f4f84 Mon Sep 17 00:00:00 2001 From: Hans Petter Selasky Date: Fri, 13 Oct 2017 14:14:46 +0000 Subject: [PATCH 059/219] Don't call selrecord() outside the select system call in the LinuxKPI, because then td->td_sel is NULL and this will result in a segfault inside selrecord(). This happens when only using kqueue() to poll for read and write events. If select() and kqueue() is mixed there won't be a segfault. Reported by: Johannes Lundberg MFC after: 1 week Sponsored by: Mellanox Technologies --- sys/compat/linuxkpi/common/src/linux_compat.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/sys/compat/linuxkpi/common/src/linux_compat.c b/sys/compat/linuxkpi/common/src/linux_compat.c index ca57bfae1c09..7aede5e8c97d 100644 --- a/sys/compat/linuxkpi/common/src/linux_compat.c +++ b/sys/compat/linuxkpi/common/src/linux_compat.c @@ -1021,6 +1021,8 @@ linux_dev_write(struct cdev *dev, struct uio *uio, int ioflag) return (error); } +#define LINUX_POLL_TABLE_NORMAL ((poll_table *)1) + static int linux_dev_poll(struct cdev *dev, int events, struct thread *td) { @@ -1037,7 +1039,7 @@ linux_dev_poll(struct cdev *dev, int events, struct thread *td) filp->f_flags = file->f_flag; linux_set_current(td); if (filp->f_op->poll != NULL) - revents = filp->f_op->poll(filp, NULL) & events; + revents = filp->f_op->poll(filp, LINUX_POLL_TABLE_NORMAL) & events; else revents = 0; @@ -1094,7 +1096,9 @@ linux_poll_wait(struct linux_file *filp, wait_queue_head_t *wqh, poll_table *p) [LINUX_FWQ_STATE_READY] = LINUX_FWQ_STATE_QUEUED, }; - selrecord(curthread, &filp->f_selinfo); + /* check if we are called inside the select system call */ + if (p == LINUX_POLL_TABLE_NORMAL) + selrecord(curthread, &filp->f_selinfo); switch (linux_poll_wakeup_state(&filp->f_wait_queue.state, state)) { case LINUX_FWQ_STATE_INIT: @@ -1438,10 +1442,9 @@ linux_file_poll(struct file *file, int events, struct ucred *active_cred, filp = (struct linux_file *)file->f_data; filp->f_flags = file->f_flag; linux_set_current(td); - if (filp->f_op->poll != NULL) { - selrecord(td, &filp->f_selinfo); - revents = filp->f_op->poll(filp, NULL) & events; - } else + if (filp->f_op->poll != NULL) + revents = filp->f_op->poll(filp, LINUX_POLL_TABLE_NORMAL) & events; + else revents = 0; return (revents); From 07ff05c2ae86015be0c22e032ddb198319c33e7c Mon Sep 17 00:00:00 2001 From: Ruslan Bukin Date: Fri, 13 Oct 2017 15:02:29 +0000 Subject: [PATCH 060/219] o Support for Kabylake CPU PMCs (fall down to PMC_CPU_INTEL_SKYLAKE). o Fix bugs in events descriptions for Skylake, Skylake Xeon and Haswell. Reviewed by: kib Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D12654 --- sys/dev/hwpmc/hwpmc_core.c | 25 +++++++++++++------------ sys/dev/hwpmc/hwpmc_intel.c | 4 ++++ sys/dev/hwpmc/pmc_events.h | 2 +- 3 files changed, 18 insertions(+), 13 deletions(-) diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index 459f9542d41b..7f8b1adb6841 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -720,8 +720,8 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2), IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA), - IAPDESCR(0DH_01H, 0x0D, 0x80, IAP_F_FM | IAP_F_SLX), - IAPDESCR(0DH_03H, 0x0D, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | + IAPDESCR(0DH_01H, 0x0D, 0x01, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW | IAP_F_IB | IAP_F_IBX | IAP_F_HWX | IAP_F_BW | IAP_F_BWX), IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(0DH_80H, 0x0D, 0x80, IAP_F_FM | IAP_F_SL | IAP_F_SLX), @@ -1142,7 +1142,7 @@ static struct iap_event_descr iap_events[] = { IAP_F_BW | IAP_F_BWX ), IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | - IAP_F_BW | IAP_F_BWX), + IAP_F_BW | IAP_F_BWX | IAP_F_SL), IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC), @@ -1425,11 +1425,11 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL | IAP_F_SLX), - IAPDESCR(A6H_02H, 0xA3, 0x02, IAP_F_FM | IAP_F_SL | IAP_F_SLX), - IAPDESCR(A6H_04H, 0xA3, 0x04, IAP_F_FM | IAP_F_SL | IAP_F_SLX), - IAPDESCR(A6H_08H, 0xA3, 0x08, IAP_F_FM | IAP_F_SL | IAP_F_SLX), - IAPDESCR(A6H_10H, 0xA3, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX), - IAPDESCR(A6H_40H, 0xA3, 0x40, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(A6H_02H, 0xA6, 0x02, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(A6H_04H, 0xA6, 0x04, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(A6H_08H, 0xA6, 0x08, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(A6H_10H, 0xA6, 0x10, IAP_F_FM | IAP_F_SL | IAP_F_SLX), + IAPDESCR(A6H_40H, 0xA6, 0x40, IAP_F_FM | IAP_F_SL | IAP_F_SLX), IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM ), @@ -1446,7 +1446,7 @@ static struct iap_event_descr iap_events[] = { IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_BW | IAP_F_BWX | - IAP_F_SLX), + IAP_F_SL | IAP_F_SLX), IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_SL), IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | @@ -1486,7 +1486,8 @@ static struct iap_event_descr iap_events[] = { IAP_F_BW | IAP_F_BWX | IAP_F_SL | IAP_F_SLX), IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SLX), + IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SL | + IAP_F_SLX), IAPDESCR(B1H_1FH, 0xB1, 0x1F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_20H, 0xB1, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_3FH, 0xB1, 0x3F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1495,7 +1496,7 @@ static struct iap_event_descr iap_events[] = { IAP_F_WM), IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB | IAP_F_SBX | IAP_F_SLX), + IAP_F_SB | IAP_F_SBX | IAP_F_SL | IAP_F_SLX), IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_WM | IAP_F_I7O), @@ -1656,7 +1657,7 @@ static struct iap_event_descr iap_events[] = { IAP_F_SL | IAP_F_SLX), IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX | IAP_F_BW | - IAP_F_BWX | IAP_F_SLX), + IAP_F_BWX | IAP_F_SL | IAP_F_SLX), IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_SL | IAP_F_SLX), IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index d6fdd970d816..b7027f9113dc 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -179,8 +179,12 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_IVYBRIDGE_XEON; nclasses = 3; break; + /* Skylake */ case 0x4e: case 0x5e: + /* Kabylake */ + case 0x8E: /* Per Intel document 325462-063US July 2017. */ + case 0x9E: /* Per Intel document 325462-063US July 2017. */ cputype = PMC_CPU_INTEL_SKYLAKE; nclasses = 3; break; diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index f0bc43f703ed..e8f5454c1158 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -2030,7 +2030,7 @@ __PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_D8H) \ __PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ __PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ __PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_F7H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ __PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ __PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_EFH) \ __PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ From 33bfd7db54289ac04176fbae2eccd491bb493dd7 Mon Sep 17 00:00:00 2001 From: Glen Barber Date: Fri, 13 Oct 2017 15:16:57 +0000 Subject: [PATCH 061/219] Increase the arm/armv6 and arm/armv7 images from 2.5GB to 3GB, since the RPI2 (at least) does not fit in 2.5GB. While here, add a missing BOARDNAME to RPI2.conf. Sponsored by: The FreeBSD Foundation --- release/arm/BANANAPI.conf | 2 +- release/arm/BEAGLEBONE.conf | 2 +- release/arm/CUBIEBOARD.conf | 2 +- release/arm/CUBIEBOARD2.conf | 2 +- release/arm/CUBOX-HUMMINGBOARD.conf | 2 +- release/arm/GUMSTIX.conf | 2 +- release/arm/PANDABOARD.conf | 2 +- release/arm/RPI-B.conf | 2 +- release/arm/RPI2.conf | 3 ++- release/arm/WANDBOARD.conf | 2 +- 10 files changed, 11 insertions(+), 10 deletions(-) diff --git a/release/arm/BANANAPI.conf b/release/arm/BANANAPI.conf index 873cedeb9ef1..19f4e70e872e 100644 --- a/release/arm/BANANAPI.conf +++ b/release/arm/BANANAPI.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-bananapi" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x42000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="32m -b 1m" FAT_TYPE="16" diff --git a/release/arm/BEAGLEBONE.conf b/release/arm/BEAGLEBONE.conf index 5cc27f674603..61445c389cf1 100644 --- a/release/arm/BEAGLEBONE.conf +++ b/release/arm/BEAGLEBONE.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-beaglebone" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="2m" FAT_TYPE="12" diff --git a/release/arm/CUBIEBOARD.conf b/release/arm/CUBIEBOARD.conf index 8b4523688faa..f4befc65a5f0 100644 --- a/release/arm/CUBIEBOARD.conf +++ b/release/arm/CUBIEBOARD.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-cubieboard" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x42000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="32m -b 1m" FAT_TYPE="16" diff --git a/release/arm/CUBIEBOARD2.conf b/release/arm/CUBIEBOARD2.conf index ff80dc37c052..b68c40cb9f2f 100644 --- a/release/arm/CUBIEBOARD2.conf +++ b/release/arm/CUBIEBOARD2.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-cubieboard2" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x42000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="32m -b 1m" FAT_TYPE="16" diff --git a/release/arm/CUBOX-HUMMINGBOARD.conf b/release/arm/CUBOX-HUMMINGBOARD.conf index 289ecd20e220..da659ec29732 100644 --- a/release/arm/CUBOX-HUMMINGBOARD.conf +++ b/release/arm/CUBOX-HUMMINGBOARD.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-cubox-hummingboard" KERNEL="IMX6" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x12000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="50m -b 16384" FAT_TYPE="16" diff --git a/release/arm/GUMSTIX.conf b/release/arm/GUMSTIX.conf index 196d5411f361..5e979b130dd0 100644 --- a/release/arm/GUMSTIX.conf +++ b/release/arm/GUMSTIX.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv6" EMBEDDEDPORTS="sysutils/u-boot-duovero" KERNEL="GUMSTIX" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="2m" FAT_TYPE="12" diff --git a/release/arm/PANDABOARD.conf b/release/arm/PANDABOARD.conf index 35a88f8868d6..41e8d003b225 100644 --- a/release/arm/PANDABOARD.conf +++ b/release/arm/PANDABOARD.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-pandaboard" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="2m" FAT_TYPE="12" diff --git a/release/arm/RPI-B.conf b/release/arm/RPI-B.conf index 8b8e48e08ae7..84217f4838aa 100644 --- a/release/arm/RPI-B.conf +++ b/release/arm/RPI-B.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv6" EMBEDDEDPORTS="sysutils/u-boot-rpi" KERNEL="RPI-B" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x2000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="17m" FAT_TYPE="16" diff --git a/release/arm/RPI2.conf b/release/arm/RPI2.conf index e9324550df4f..67cbcf286701 100644 --- a/release/arm/RPI2.conf +++ b/release/arm/RPI2.conf @@ -9,12 +9,13 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-rpi2" KERNEL="GENERIC" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x2000000" -IMAGE_SIZE="2560M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="50m" FAT_TYPE="16" MD_ARGS="-x 63 -y 255" NODOC=1 +export BOARDNAME="RPI2" arm_install_uboot() { UBOOT_DIR="/usr/local/share/u-boot/u-boot-rpi2" diff --git a/release/arm/WANDBOARD.conf b/release/arm/WANDBOARD.conf index 75ad6a26216a..9766be967180 100644 --- a/release/arm/WANDBOARD.conf +++ b/release/arm/WANDBOARD.conf @@ -9,7 +9,7 @@ EMBEDDED_TARGET_ARCH="armv7" EMBEDDEDPORTS="sysutils/u-boot-wandboard" KERNEL="IMX6" WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x12000000" -IMAGE_SIZE="1536M" +IMAGE_SIZE="3072M" PART_SCHEME="MBR" FAT_SIZE="50m -b 16384" FAT_TYPE="16" From 53faf5a7d4718fdae70ec6878842c7f4241590f5 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 13 Oct 2017 16:23:05 +0000 Subject: [PATCH 062/219] Evaluate the real size of the sblk_zone. Submitted by: ota@j.email.ne.jp PR: 221356 Reviewed by: alc, markj MFC after: 1 week Differential revision: https://reviews.freebsd.org/D12660 --- sys/vm/swap_pager.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sys/vm/swap_pager.c b/sys/vm/swap_pager.c index c8f5b5258522..bd84332d8123 100644 --- a/sys/vm/swap_pager.c +++ b/sys/vm/swap_pager.c @@ -541,6 +541,14 @@ swap_pager_swap_init(void) */ n -= ((n + 2) / 3); } while (n > 0); + + /* + * Often uma_zone_reserve_kva() cannot reserve exactly the + * requested size. Account for the difference when + * calculating swap_maxpages. + */ + n = uma_zone_get_max(swblk_zone); + if (n2 != n) printf("Swap blk zone entries reduced from %lu to %lu.\n", n2, n); From 41bf90bb78aa568eab1b44ddfc69ca9df9c5d831 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 13 Oct 2017 16:31:50 +0000 Subject: [PATCH 063/219] Address two problems with sendfile(..., SF_NOCACHE) and apply one "optimization". First, sendfile(..., SF_NOCACHE) frees pages without checking whether those pages are mapped. This can leave the system with mappings to free or repurposed pages. Second, a page can be busied between the time of the current busy test and acquiring the object lock. Essentially, the test performed before the object lock is acquired can only be regarded as an optimization to short-circuit further work on the page. It cannot, however, be relied upon to prove that it is safe to free the page. Third, when sendfile(..., SF_NOCACHE) was originally implemented, vm_page_deactivate_noreuse() did not yet exist. Use vm_page_deactivate_noreuse() instead of vm_page_deactivate(), because it comes closer to freeing the page. In collaboration with: glebius Discussed with: gallatin, kib, markj X-MFC after: r324448 --- sys/kern/kern_sendfile.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/sys/kern/kern_sendfile.c b/sys/kern/kern_sendfile.c index 4c216017d303..039913508e78 100644 --- a/sys/kern/kern_sendfile.c +++ b/sys/kern/kern_sendfile.c @@ -143,10 +143,23 @@ sendfile_free_page(vm_page_t pg, bool nocache) vm_page_free(pg); else if (nocache) { if (!vm_page_xbusied(pg) && VM_OBJECT_TRYWLOCK(obj)) { - vm_page_free(pg); + bool freed; + + /* Only free unmapped pages. */ + if (obj->ref_count == 0 || + !pmap_page_is_mapped(pg)) + /* + * The busy test before the object is + * locked cannot be relied upon. + */ + freed = vm_page_try_to_free(pg); + else + freed = false; VM_OBJECT_WUNLOCK(obj); + if (!freed) + vm_page_deactivate_noreuse(pg); } else - vm_page_deactivate(pg); + vm_page_deactivate_noreuse(pg); } } vm_page_unlock(pg); From b5bf5debb9bff14ea5b83d0753f7e9aad57150e8 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Fri, 13 Oct 2017 17:15:17 +0000 Subject: [PATCH 064/219] ObsoleteFiles.inc: correct year on libstand removal --- ObsoleteFiles.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc index 69d7de4c6ca0..44a7e8a32866 100644 --- a/ObsoleteFiles.inc +++ b/ObsoleteFiles.inc @@ -38,7 +38,7 @@ # xargs -n1 | sort | uniq -d; # done -# 20161010: Remove libstand +# 20171010: Remove libstand OLD_FILES+=usr/lib/libstand.a OLD_FILES+=usr/lib/libstand_p.a OLD_FILES+=usr/include/stand.h From 3949741e5c74e9dfd7be18debebf32c2d368f522 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Fri, 13 Oct 2017 18:23:08 +0000 Subject: [PATCH 065/219] Remove additional groff leftovers (r319664) --- targets/pseudo/userland/gnu/Makefile.depend | 47 --------------------- 1 file changed, 47 deletions(-) diff --git a/targets/pseudo/userland/gnu/Makefile.depend b/targets/pseudo/userland/gnu/Makefile.depend index cb9bda628cfc..117dea8efc20 100644 --- a/targets/pseudo/userland/gnu/Makefile.depend +++ b/targets/pseudo/userland/gnu/Makefile.depend @@ -43,53 +43,6 @@ DIRDEPS = \ gnu/usr.bin/gperf/doc \ gnu/usr.bin/grep \ gnu/usr.bin/grep/doc \ - gnu/usr.bin/groff/contrib/mm \ - gnu/usr.bin/groff/doc \ - gnu/usr.bin/groff/font/devX100 \ - gnu/usr.bin/groff/font/devX100-12 \ - gnu/usr.bin/groff/font/devX75 \ - gnu/usr.bin/groff/font/devX75-12 \ - gnu/usr.bin/groff/font/devascii \ - gnu/usr.bin/groff/font/devcp1047 \ - gnu/usr.bin/groff/font/devdvi \ - gnu/usr.bin/groff/font/devhtml \ - gnu/usr.bin/groff/font/devkoi8-r \ - gnu/usr.bin/groff/font/devlatin1 \ - gnu/usr.bin/groff/font/devlbp \ - gnu/usr.bin/groff/font/devlj4 \ - gnu/usr.bin/groff/font/devps \ - gnu/usr.bin/groff/font/devutf8 \ - gnu/usr.bin/groff/man \ - gnu/usr.bin/groff/src/devices/grodvi \ - gnu/usr.bin/groff/src/devices/grohtml \ - gnu/usr.bin/groff/src/devices/grolbp \ - gnu/usr.bin/groff/src/devices/grolj4 \ - gnu/usr.bin/groff/src/devices/grops \ - gnu/usr.bin/groff/src/devices/grotty \ - gnu/usr.bin/groff/src/libs/libbib \ - gnu/usr.bin/groff/src/libs/libdriver \ - gnu/usr.bin/groff/src/libs/libgroff \ - gnu/usr.bin/groff/src/preproc/eqn \ - gnu/usr.bin/groff/src/preproc/grn \ - gnu/usr.bin/groff/src/preproc/html \ - gnu/usr.bin/groff/src/preproc/pic \ - gnu/usr.bin/groff/src/preproc/refer \ - gnu/usr.bin/groff/src/preproc/soelim \ - gnu/usr.bin/groff/src/preproc/tbl \ - gnu/usr.bin/groff/src/roff/groff \ - gnu/usr.bin/groff/src/roff/grog \ - gnu/usr.bin/groff/src/roff/nroff \ - gnu/usr.bin/groff/src/roff/psroff \ - gnu/usr.bin/groff/src/roff/troff \ - gnu/usr.bin/groff/src/utils/addftinfo \ - gnu/usr.bin/groff/src/utils/afmtodit \ - gnu/usr.bin/groff/src/utils/hpftodit \ - gnu/usr.bin/groff/src/utils/indxbib \ - gnu/usr.bin/groff/src/utils/lkbib \ - gnu/usr.bin/groff/src/utils/lookbib \ - gnu/usr.bin/groff/src/utils/pfbtops \ - gnu/usr.bin/groff/src/utils/tfmtodit \ - gnu/usr.bin/groff/tmac \ gnu/usr.bin/rcs/ci \ gnu/usr.bin/rcs/co \ gnu/usr.bin/rcs/ident \ From 7f22b1ffe45d214340231057fa319e13fe74b673 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Fri, 13 Oct 2017 18:30:32 +0000 Subject: [PATCH 066/219] clean up remnants of removed GPL software send-pr r267486 texinfo r276551 ranlib r286332 sdiff r298823 rcs r307351 diff r317209 --- targets/pseudo/userland/gnu/Makefile.depend | 23 --------------------- 1 file changed, 23 deletions(-) diff --git a/targets/pseudo/userland/gnu/Makefile.depend b/targets/pseudo/userland/gnu/Makefile.depend index 117dea8efc20..5929ca4612c1 100644 --- a/targets/pseudo/userland/gnu/Makefile.depend +++ b/targets/pseudo/userland/gnu/Makefile.depend @@ -28,10 +28,7 @@ DIRDEPS = \ gnu/usr.bin/binutils/libiberty \ gnu/usr.bin/binutils/libopcodes \ gnu/usr.bin/binutils/objdump \ - gnu/usr.bin/binutils/ranlib \ gnu/usr.bin/dialog \ - gnu/usr.bin/diff \ - gnu/usr.bin/diff/doc \ gnu/usr.bin/diff3 \ gnu/usr.bin/gdb/doc \ gnu/usr.bin/gdb/gdb \ @@ -43,26 +40,6 @@ DIRDEPS = \ gnu/usr.bin/gperf/doc \ gnu/usr.bin/grep \ gnu/usr.bin/grep/doc \ - gnu/usr.bin/rcs/ci \ - gnu/usr.bin/rcs/co \ - gnu/usr.bin/rcs/ident \ - gnu/usr.bin/rcs/lib \ - gnu/usr.bin/rcs/merge \ - gnu/usr.bin/rcs/rcs \ - gnu/usr.bin/rcs/rcsclean \ - gnu/usr.bin/rcs/rcsdiff \ - gnu/usr.bin/rcs/rcsfreeze \ - gnu/usr.bin/rcs/rcsmerge \ - gnu/usr.bin/rcs/rlog \ - gnu/usr.bin/sdiff \ - gnu/usr.bin/send-pr/doc \ - gnu/usr.bin/texinfo/doc \ - gnu/usr.bin/texinfo/info \ - gnu/usr.bin/texinfo/infokey \ - gnu/usr.bin/texinfo/install-info \ - gnu/usr.bin/texinfo/libtxi \ - gnu/usr.bin/texinfo/makeinfo \ - gnu/usr.bin/texinfo/texindex \ .if ${MK_GPL_DTC} != "no" DIRDEPS+= gnu/usr.bin/dtc From 9db0f8e76f43309abf991fee85d8fd062ba2f975 Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Fri, 13 Oct 2017 19:27:33 +0000 Subject: [PATCH 067/219] Make the PHOLD in linux_wait_event_common() unconditional. After some in-progress work is committed, this would otherwise be the only instance of #if(n)def NO_SWAPPING in the tree. Moreover, the requisite opt_vm.h include was missing, so the PHOLD/PRELE calls were always being compiled in anyway. MFC after: 1 week --- sys/compat/linuxkpi/common/src/linux_schedule.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/sys/compat/linuxkpi/common/src/linux_schedule.c b/sys/compat/linuxkpi/common/src/linux_schedule.c index f438c314781d..97afc8c4867f 100644 --- a/sys/compat/linuxkpi/common/src/linux_schedule.c +++ b/sys/compat/linuxkpi/common/src/linux_schedule.c @@ -232,9 +232,7 @@ linux_wait_event_common(wait_queue_head_t *wqh, wait_queue_t *wq, int timeout, * Our wait queue entry is on the stack - make sure it doesn't * get swapped out while we sleep. */ -#ifndef NO_SWAPPING PHOLD(task->task_thread->td_proc); -#endif sleepq_lock(task); if (atomic_load_acq_int(&task->state) != TASK_WAKING) { ret = linux_add_to_sleepqueue(task, "wevent", timeout, state); @@ -242,9 +240,7 @@ linux_wait_event_common(wait_queue_head_t *wqh, wait_queue_t *wq, int timeout, sleepq_release(task); ret = linux_signal_pending_state(state, task) ? -ERESTARTSYS : 0; } -#ifndef NO_SWAPPING PRELE(task->task_thread->td_proc); -#endif PICKUP_GIANT(); From 3b07bb2a643c9ce50a4673c9b09eaa32c0345e3e Mon Sep 17 00:00:00 2001 From: Kristof Provost Date: Fri, 13 Oct 2017 19:41:35 +0000 Subject: [PATCH 068/219] Support the D-Link DWM-222 LTE Dongle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Submitted by: Daniel Hänschke --- sys/dev/usb/serial/u3g.c | 2 ++ sys/dev/usb/usbdevs | 2 ++ 2 files changed, 4 insertions(+) diff --git a/sys/dev/usb/serial/u3g.c b/sys/dev/usb/serial/u3g.c index 9a57d5c697e0..75bb6e863093 100644 --- a/sys/dev/usb/serial/u3g.c +++ b/sys/dev/usb/serial/u3g.c @@ -236,6 +236,8 @@ static const STRUCT_USB_HOST_ID u3g_devs[] = { U3G_DEV(DLINK, DWR510, 0), U3G_DEV(DLINK, DWM157_CD, U3GINIT_SCSIEJECT), U3G_DEV(DLINK, DWM157, 0), + U3G_DEV(DLINK, DWM222_CD, U3GINIT_SCSIEJECT), + U3G_DEV(DLINK, DWM222, 0), U3G_DEV(DLINK3, DWM652, 0), U3G_DEV(HP, EV2200, 0), U3G_DEV(HP, HS2300, 0), diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs index 8b80fae4ee26..f9d0b49dfc54 100644 --- a/sys/dev/usb/usbdevs +++ b/sys/dev/usb/usbdevs @@ -1673,8 +1673,10 @@ product DLINK DSB650TX2 0x4102 10/100 Ethernet product DLINK DUB1312 0x4a00 10/100/1000 Ethernet product DLINK DWM157 0x7d02 DWM-157 product DLINK DWR510 0x7e12 DWR-510 +product DLINK DWM222 0x7e35 DWM-222 product DLINK DWM157_CD 0xa707 DWM-157 CD-ROM Mode product DLINK DWR510_CD 0xa805 DWR-510 CD-ROM Mode +product DLINK DWM222_CD 0xab00 DWM-222 CD-ROM Mode product DLINK DSB650 0xabc1 10/100 Ethernet product DLINK DUBH7 0xf103 DUB-H7 USB 2.0 7-Port Hub product DLINK2 RTL8192SU_1 0x3300 RTL8192SU From 96842052d3426f18063073c446259193bda7adab Mon Sep 17 00:00:00 2001 From: Kristof Provost Date: Fri, 13 Oct 2017 20:29:35 +0000 Subject: [PATCH 069/219] Regenerate usb.conf --- etc/devd/usb.conf | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/etc/devd/usb.conf b/etc/devd/usb.conf index 4b842a8baf1b..dc39a30f77dd 100644 --- a/etc/devd/usb.conf +++ b/etc/devd/usb.conf @@ -4741,6 +4741,14 @@ nomatch 32 { action "kldload -n if_axe"; }; +nomatch 32 { + match "bus" "uhub[0-9]+"; + match "mode" "host"; + match "vendor" "0x17ef"; + match "product" "0x7205"; + action "kldload -n if_ure"; +}; + nomatch 32 { match "bus" "uhub[0-9]+"; match "mode" "host"; @@ -5097,7 +5105,7 @@ nomatch 32 { match "bus" "uhub[0-9]+"; match "mode" "host"; match "vendor" "0x2001"; - match "product" "(0x7d02|0x7e12|0xa707|0xa805)"; + match "product" "(0x7d02|0x7e12|0x7e35|0xa707|0xa805|0xab00)"; action "kldload -n u3g"; }; @@ -5905,5 +5913,5 @@ nomatch 32 { action "kldload -n umass"; }; -# 2754 USB entries processed +# 2757 USB entries processed From 30a33cefae59195f655dfdc40781ff7a8ca8e046 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 13 Oct 2017 20:31:56 +0000 Subject: [PATCH 070/219] mtx: change MTX_UNOWNED from 4 to 0 The value is spread all over the kernel and zeroing a register is cheaper/shorter than setting it up to an arbitrary value. Reduces amd64 GENERIC-NODEBUG .text size by 0.4%. MFC after: 1 week --- sys/sys/mutex.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/sys/sys/mutex.h b/sys/sys/mutex.h index 6f73e1fd52c0..359b1199714c 100644 --- a/sys/sys/mutex.h +++ b/sys/sys/mutex.h @@ -65,15 +65,11 @@ * State bits kept in mutex->mtx_lock, for the DEFAULT lock type. None of this, * with the exception of MTX_UNOWNED, applies to spin locks. */ +#define MTX_UNOWNED 0x00000000 /* Cookie for free mutex */ #define MTX_RECURSED 0x00000001 /* lock recursed (for MTX_DEF only) */ #define MTX_CONTESTED 0x00000002 /* lock contested (for MTX_DEF only) */ -#define MTX_UNOWNED 0x00000004 /* Cookie for free mutex */ -#define MTX_FLAGMASK (MTX_RECURSED | MTX_CONTESTED | MTX_UNOWNED) - -/* - * Value stored in mutex->mtx_lock to denote a destroyed mutex. - */ -#define MTX_DESTROYED (MTX_CONTESTED | MTX_UNOWNED) +#define MTX_DESTROYED 0x00000004 /* lock destroyed */ +#define MTX_FLAGMASK (MTX_RECURSED | MTX_CONTESTED | MTX_DESTROYED) /* * Prototypes From 1dbf52e7d9ee86ea5c5263cd2891eb2d88ffe27f Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 13 Oct 2017 21:54:34 +0000 Subject: [PATCH 071/219] Reduce traffic on vm_cnt.v_free_count The variable is modified with the highly contended page free queue lock. It unnecessarily shares a cacheline with purely read-only fields and is re-read after the lock is dropped in the page allocation code making the hold time longer. Pad the variable just like the others and store the value as found with the lock held instead of re-reading. Provides a modest 1%-ish speed up in concurrent page faults. Reviewed by: kib, markj Differential Revision: https://reviews.freebsd.org/D12665 --- sys/sys/vmmeter.h | 6 +++--- sys/vm/vm_page.c | 13 +++++++------ sys/vm/vm_phys.h | 4 ++-- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/sys/sys/vmmeter.h b/sys/sys/vmmeter.h index bc536f71e7b5..c36a0addb3b2 100644 --- a/sys/sys/vmmeter.h +++ b/sys/sys/vmmeter.h @@ -131,7 +131,6 @@ struct vmmeter { u_int v_free_reserved; /* (c) pages reserved for deadlock */ u_int v_free_target; /* (c) pages desired free */ u_int v_free_min; /* (c) pages desired free */ - u_int v_free_count; /* (f) pages free */ u_int v_inactive_target; /* (c) pages desired inactive */ u_int v_pageout_free_min; /* (c) min pages reserved for kernel */ u_int v_interrupt_free_min; /* (c) reserved pages for int code */ @@ -141,6 +140,7 @@ struct vmmeter { u_int v_inactive_count VMMETER_ALIGNED; /* (a) pages inactive */ u_int v_laundry_count VMMETER_ALIGNED; /* (a) pages eligible for laundering */ + u_int v_free_count VMMETER_ALIGNED; /* (a) pages free */ }; #endif /* _KERNEL || _WANT_VMMETER */ @@ -208,10 +208,10 @@ vm_paging_target(void) * Returns TRUE if the pagedaemon needs to be woken up. */ static inline int -vm_paging_needed(void) +vm_paging_needed(u_int free_count) { - return (vm_cnt.v_free_count < vm_pageout_wakeup_thresh); + return (free_count < vm_pageout_wakeup_thresh); } /* diff --git a/sys/vm/vm_page.c b/sys/vm/vm_page.c index 18e83635d2e2..31553bdc380a 100644 --- a/sys/vm/vm_page.c +++ b/sys/vm/vm_page.c @@ -1588,6 +1588,7 @@ vm_page_alloc_after(vm_object_t object, vm_pindex_t pindex, int req, { vm_page_t m; int flags, req_class; + u_int free_count; KASSERT((object != NULL) == ((req & VM_ALLOC_NOOBJ) == 0) && (object != NULL || (req & VM_ALLOC_SBUSY) == 0) && @@ -1655,7 +1656,7 @@ vm_page_alloc_after(vm_object_t object, vm_pindex_t pindex, int req, * At this point we had better have found a good page. */ KASSERT(m != NULL, ("missing page")); - vm_phys_freecnt_adj(m, -1); + free_count = vm_phys_freecnt_adj(m, -1); mtx_unlock(&vm_page_queue_free_mtx); vm_page_alloc_check(m); @@ -1713,7 +1714,7 @@ vm_page_alloc_after(vm_object_t object, vm_pindex_t pindex, int req, * Don't wakeup too often - wakeup the pageout daemon when * we would be nearly out of memory. */ - if (vm_paging_needed()) + if (vm_paging_needed(free_count)) pagedaemon_wakeup(); return (m); @@ -1899,7 +1900,7 @@ vm_page_alloc_contig(vm_object_t object, vm_pindex_t pindex, int req, pmap_page_set_memattr(m, memattr); pindex++; } - if (vm_paging_needed()) + if (vm_paging_needed(vm_cnt.v_free_count)) pagedaemon_wakeup(); return (m_ret); } @@ -1948,7 +1949,7 @@ vm_page_t vm_page_alloc_freelist(int flind, int req) { vm_page_t m; - u_int flags; + u_int flags, free_count; int req_class; req_class = req & VM_ALLOC_CLASS_MASK; @@ -1980,7 +1981,7 @@ vm_page_alloc_freelist(int flind, int req) mtx_unlock(&vm_page_queue_free_mtx); return (NULL); } - vm_phys_freecnt_adj(m, -1); + free_count = vm_phys_freecnt_adj(m, -1); mtx_unlock(&vm_page_queue_free_mtx); vm_page_alloc_check(m); @@ -2002,7 +2003,7 @@ vm_page_alloc_freelist(int flind, int req) } /* Unmanaged pages don't use "act_count". */ m->oflags = VPO_UNMANAGED; - if (vm_paging_needed()) + if (vm_paging_needed(free_count)) pagedaemon_wakeup(); return (m); } diff --git a/sys/vm/vm_phys.h b/sys/vm/vm_phys.h index ef0a95e4933f..4a08be7a42d1 100644 --- a/sys/vm/vm_phys.h +++ b/sys/vm/vm_phys.h @@ -112,13 +112,13 @@ vm_phys_domain(vm_page_t m) #endif } -static inline void +static inline u_int vm_phys_freecnt_adj(vm_page_t m, int adj) { mtx_assert(&vm_page_queue_free_mtx, MA_OWNED); - vm_cnt.v_free_count += adj; vm_phys_domain(m)->vmd_free_count += adj; + return (vm_cnt.v_free_count += adj); } #endif /* _KERNEL */ From e280ce465bf80a7babf15518e776fc274f0f3b30 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Sat, 14 Oct 2017 00:47:30 +0000 Subject: [PATCH 072/219] mtx: fix up owner_mtx after r324609 Now that MTX_UNOWNED is 0 the test was alwayas false. --- sys/kern/kern_mutex.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c index 2941f8ba949c..5d2146b7909c 100644 --- a/sys/kern/kern_mutex.c +++ b/sys/kern/kern_mutex.c @@ -217,7 +217,7 @@ owner_mtx(const struct lock_object *lock, struct thread **owner) m = (const struct mtx *)lock; x = m->mtx_lock; *owner = (struct thread *)(x & ~MTX_FLAGMASK); - return (x != MTX_UNOWNED); + return (*owner != NULL); } #endif From bf3341233e14616b4f7d3c9ecca0d80a1c131724 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Sat, 14 Oct 2017 04:27:58 +0000 Subject: [PATCH 073/219] Fix wrong v_free_count annotation - (f) instead of (a) Reported by: alc --- sys/sys/vmmeter.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/sys/vmmeter.h b/sys/sys/vmmeter.h index c36a0addb3b2..62106ee7e989 100644 --- a/sys/sys/vmmeter.h +++ b/sys/sys/vmmeter.h @@ -140,7 +140,7 @@ struct vmmeter { u_int v_inactive_count VMMETER_ALIGNED; /* (a) pages inactive */ u_int v_laundry_count VMMETER_ALIGNED; /* (a) pages eligible for laundering */ - u_int v_free_count VMMETER_ALIGNED; /* (a) pages free */ + u_int v_free_count VMMETER_ALIGNED; /* (f) pages free */ }; #endif /* _KERNEL || _WANT_VMMETER */ From 8c8e10b763684442d614bc0eb978fd90789cd2a6 Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Sat, 14 Oct 2017 10:02:59 +0000 Subject: [PATCH 074/219] Code cleanup, not functional change. This avoids taking a pointer of a packed structure which allows simpler compilation of the userland stack. MFC after: 1 week --- sys/netinet/sctp_constants.h | 4 ---- sys/netinet/sctp_indata.c | 3 --- sys/netinet/sctp_input.c | 19 ++++++++++++------- sys/netinet/sctp_output.c | 5 ++++- sys/netinet/sctputil.c | 17 +++-------------- sys/netinet/sctputil.h | 2 +- 6 files changed, 20 insertions(+), 30 deletions(-) diff --git a/sys/netinet/sctp_constants.h b/sys/netinet/sctp_constants.h index 56772b34ce0b..fb678e964571 100644 --- a/sys/netinet/sctp_constants.h +++ b/sys/netinet/sctp_constants.h @@ -97,10 +97,6 @@ __FBSDID("$FreeBSD$"); */ #define SCTP_DEFAULT_VRF_SIZE 4 -/* constants for rto calc */ -#define sctp_align_safe_nocopy 0 -#define sctp_align_unsafe_makecopy 1 - /* JRS - Values defined for the HTCP algorithm */ #define ALPHA_BASE (1<<7) /* 1.0 with shift << 7 */ #define BETA_MIN (1<<6) /* 0.5 with shift << 7 */ diff --git a/sys/netinet/sctp_indata.c b/sys/netinet/sctp_indata.c index cd54522d634b..49f2f9053cd2 100644 --- a/sys/netinet/sctp_indata.c +++ b/sys/netinet/sctp_indata.c @@ -3058,7 +3058,6 @@ sctp_process_segment_range(struct sctp_tcb *stcb, struct sctp_tmit_chunk **p_tp1 &stcb->asoc, tp1->whoTo, &tp1->sent_rcv_time, - sctp_align_safe_nocopy, SCTP_RTT_FROM_DATA); *rto_ok = 0; } @@ -4030,7 +4029,6 @@ sctp_express_handle_sack(struct sctp_tcb *stcb, uint32_t cumack, sctp_calculate_rto(stcb, asoc, tp1->whoTo, &tp1->sent_rcv_time, - sctp_align_safe_nocopy, SCTP_RTT_FROM_DATA); rto_ok = 0; } @@ -4636,7 +4634,6 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, sctp_calculate_rto(stcb, asoc, tp1->whoTo, &tp1->sent_rcv_time, - sctp_align_safe_nocopy, SCTP_RTT_FROM_DATA); rto_ok = 0; } diff --git a/sys/netinet/sctp_input.c b/sys/netinet/sctp_input.c index acbed39eb16a..2d3be9819b4f 100644 --- a/sys/netinet/sctp_input.c +++ b/sys/netinet/sctp_input.c @@ -517,7 +517,7 @@ sctp_process_init_ack(struct mbuf *m, int iphlen, int offset, asoc->primary_destination, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); /* calculate the RTO */ - net->RTO = sctp_calculate_rto(stcb, asoc, net, &asoc->time_entered, sctp_align_safe_nocopy, + net->RTO = sctp_calculate_rto(stcb, asoc, net, &asoc->time_entered, SCTP_RTT_FROM_NON_DATA); retval = sctp_send_cookie_echo(m, offset, stcb, net); if (retval < 0) { @@ -639,7 +639,7 @@ sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, tv.tv_sec = cp->heartbeat.hb_info.time_value_1; tv.tv_usec = cp->heartbeat.hb_info.time_value_2; /* Now lets do a RTO with this */ - r_net->RTO = sctp_calculate_rto(stcb, &stcb->asoc, r_net, &tv, sctp_align_safe_nocopy, + r_net->RTO = sctp_calculate_rto(stcb, &stcb->asoc, r_net, &tv, SCTP_RTT_FROM_NON_DATA); if (!(r_net->dest_state & SCTP_ADDR_REACHABLE)) { r_net->dest_state |= SCTP_ADDR_REACHABLE; @@ -1487,6 +1487,7 @@ sctp_process_cookie_existing(struct mbuf *m, int iphlen, int offset, struct sctp_init_ack_chunk *initack_cp, initack_buf; struct sctp_nets *net; struct mbuf *op_err; + struct timeval old; int init_offset, initack_offset, i; int retval; int spec_flag = 0; @@ -1647,10 +1648,11 @@ sctp_process_cookie_existing(struct mbuf *m, int iphlen, int offset, * since we did not send a HB make sure we don't * double things */ + old.tv_sec = cookie->time_entered.tv_sec; + old.tv_usec = cookie->time_entered.tv_usec; net->hb_responded = 1; net->RTO = sctp_calculate_rto(stcb, asoc, net, - &cookie->time_entered, - sctp_align_unsafe_makecopy, + &old, SCTP_RTT_FROM_NON_DATA); if (stcb->asoc.sctp_autoclose_ticks && @@ -2367,10 +2369,13 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, } (void)SCTP_GETTIME_TIMEVAL(&stcb->asoc.time_entered); if ((netp != NULL) && (*netp != NULL)) { + struct timeval old; + /* calculate the RTT and set the encaps port */ + old.tv_sec = cookie->time_entered.tv_sec; + old.tv_usec = cookie->time_entered.tv_usec; (*netp)->RTO = sctp_calculate_rto(stcb, asoc, *netp, - &cookie->time_entered, sctp_align_unsafe_makecopy, - SCTP_RTT_FROM_NON_DATA); + &old, SCTP_RTT_FROM_NON_DATA); } /* respond with a COOKIE-ACK */ sctp_send_cookie_ack(stcb); @@ -2936,7 +2941,7 @@ sctp_handle_cookie_ack(struct sctp_cookie_ack_chunk *cp SCTP_UNUSED, SCTP_STAT_INCR_GAUGE32(sctps_currestab); if (asoc->overall_error_count == 0) { net->RTO = sctp_calculate_rto(stcb, asoc, net, - &asoc->time_entered, sctp_align_safe_nocopy, + &asoc->time_entered, SCTP_RTT_FROM_NON_DATA); } (void)SCTP_GETTIME_TIMEVAL(&asoc->time_entered); diff --git a/sys/netinet/sctp_output.c b/sys/netinet/sctp_output.c index 3511ad859dbc..fbccccb43885 100644 --- a/sys/netinet/sctp_output.c +++ b/sys/netinet/sctp_output.c @@ -5501,6 +5501,7 @@ sctp_send_initiate_ack(struct sctp_inpcb *inp, struct sctp_tcb *stcb, struct sctp_paramhdr *ph; union sctp_sockstore *over_addr; struct sctp_scoping scp; + struct timeval now; #ifdef INET struct sockaddr_in *dst4 = (struct sockaddr_in *)dst; struct sockaddr_in *src4 = (struct sockaddr_in *)src; @@ -5601,7 +5602,9 @@ sctp_send_initiate_ack(struct sctp_inpcb *inp, struct sctp_tcb *stcb, memset(&stc, 0, sizeof(struct sctp_state_cookie)); /* the time I built cookie */ - (void)SCTP_GETTIME_TIMEVAL(&stc.time_entered); + (void)SCTP_GETTIME_TIMEVAL(&now); + stc.time_entered.tv_sec = now.tv_sec; + stc.time_entered.tv_usec = now.tv_usec; /* populate any tie tags */ if (asoc != NULL) { diff --git a/sys/netinet/sctputil.c b/sys/netinet/sctputil.c index c7bb60eb1be4..ccc0b69e7e3b 100644 --- a/sys/netinet/sctputil.c +++ b/sys/netinet/sctputil.c @@ -2422,8 +2422,8 @@ uint32_t sctp_calculate_rto(struct sctp_tcb *stcb, struct sctp_association *asoc, struct sctp_nets *net, - struct timeval *told, - int safe, int rtt_from_sack) + struct timeval *old, + int rtt_from_sack) { /*- * given an association and the starting time of the current RTT @@ -2432,19 +2432,8 @@ sctp_calculate_rto(struct sctp_tcb *stcb, int32_t rtt; /* RTT in ms */ uint32_t new_rto; int first_measure = 0; - struct timeval now, then, *old; + struct timeval now; - /* Copy it out for sparc64 */ - if (safe == sctp_align_unsafe_makecopy) { - old = &then; - memcpy(&then, told, sizeof(struct timeval)); - } else if (safe == sctp_align_safe_nocopy) { - old = told; - } else { - /* error */ - SCTP_PRINTF("Huh, bad rto calc call\n"); - return (0); - } /************************/ /* 1. calculate new RTT */ /************************/ diff --git a/sys/netinet/sctputil.h b/sys/netinet/sctputil.h index 97b336549ec2..598f9f367e17 100644 --- a/sys/netinet/sctputil.h +++ b/sys/netinet/sctputil.h @@ -135,7 +135,7 @@ void uint32_t sctp_calculate_rto(struct sctp_tcb *, struct sctp_association *, - struct sctp_nets *, struct timeval *, int, int); + struct sctp_nets *, struct timeval *, int); uint32_t sctp_calculate_len(struct mbuf *); From 2a243b9539a45b392a515569cab2091844cf2bdf Mon Sep 17 00:00:00 2001 From: Brooks Davis Date: Sat, 14 Oct 2017 18:38:36 +0000 Subject: [PATCH 075/219] Switch procstat from subcommand flags to verbs - Use an enumerated value instead of separate flags for commands - Look for a verb if no command flag is set - Lookup the "xocontainer" value based on the command - Document the new command verbs in the man-page Submitted by: kdrakehp@zoho.com Differential Revision: https://reviews.freebsd.org/D10916 --- usr.bin/procstat/procstat.1 | 174 ++++++--- usr.bin/procstat/procstat.c | 489 ++++++++++++++++-------- usr.bin/procstat/procstat.h | 21 +- usr.bin/procstat/procstat_args.c | 4 +- usr.bin/procstat/procstat_auxv.c | 2 +- usr.bin/procstat/procstat_basic.c | 4 +- usr.bin/procstat/procstat_bin.c | 2 +- usr.bin/procstat/procstat_cred.c | 2 +- usr.bin/procstat/procstat_cs.c | 2 +- usr.bin/procstat/procstat_files.c | 13 +- usr.bin/procstat/procstat_kstack.c | 10 +- usr.bin/procstat/procstat_ptlwpinfo.c | 4 +- usr.bin/procstat/procstat_rlimit.c | 2 +- usr.bin/procstat/procstat_rusage.c | 12 +- usr.bin/procstat/procstat_sigs.c | 8 +- usr.bin/procstat/procstat_threads.c | 2 +- usr.bin/procstat/procstat_vm.c | 2 +- usr.bin/procstat/tests/procstat_test.sh | 19 +- 18 files changed, 529 insertions(+), 243 deletions(-) diff --git a/usr.bin/procstat/procstat.1 b/usr.bin/procstat/procstat.1 index cbd8061d1188..14b0e1eba17b 100644 --- a/usr.bin/procstat/procstat.1 +++ b/usr.bin/procstat/procstat.1 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd October 3, 2017 +.Dd October 14, 2017 .Dt PROCSTAT 1 .Os .Sh NAME @@ -34,14 +34,75 @@ .Sh SYNOPSIS .Nm .Op Fl -libxo -.Op Fl CHhn +.Op Fl h .Op Fl M Ar core .Op Fl N Ar system .Op Fl w Ar interval -.Op Fl b | c | e | f | i | j | k | l | L | r | s | S | t | v | x -.Op Fl a | Ar pid | Ar core ... +.Ar command +.Op Ar pid ... | Ar core ... +.Nm +.Op Fl -libxo +.Fl a +.Op Fl h +.Op Fl M Ar core +.Op Fl N Ar system +.Op Fl w Ar interval +.Ar command +.Nm +.Op Fl -libxo +.Op Fl h +.Op Fl M Ar core +.Op Fl N Ar system +.Op Fl w Ar interval +.Oo +.Fl b | +.Fl c | +.Fl e | +.Fl f Oo Fl C Oc | +.Fl i Oo Fl n Oc | +.Fl j Oo Fl n Oc | +.Fl k Oo Fl k Oc | +.Fl l | +.Fl r Oo Fl H Oc | +.Fl s | +.Fl S | +.Fl t | +.Fl v | +.Fl x +.Oc +.Op Ar pid ... | Ar core ... +.Nm +.Op Fl -libxo +.Fl a +.Op Fl h +.Op Fl M Ar core +.Op Fl N Ar system +.Op Fl w Ar interval +.Oo +.Fl b | +.Fl c | +.Fl e | +.Fl f Oo Fl C Oc | +.Fl i Oo Fl n Oc | +.Fl j Oo Fl n Oc | +.Fl k Oo Fl k Oc | +.Fl l | +.Fl r Oo Fl H Oc | +.Fl s | +.Fl S | +.Fl t | +.Fl v | +.Fl x +.Oc +.Nm +.Op Fl -libxo +.Fl L +.Op Fl h +.Op Fl M Ar core +.Op Fl N Ar system +.Op Fl w Ar interval +.Ar core ... .Sh DESCRIPTION -The .Nm utility displays detailed information about the processes identified by the .Ar pid @@ -51,49 +112,89 @@ flag is used, all processes. It can also display information extracted from a process core file, if the core file is specified as the argument. .Pp -By default, basic process statistics are printed; one of the following -options may be specified in order to select more detailed process information -for printing: -.Bl -tag -width indent -.It Fl -libxo -Generate output via +If the +.Fl -libxo +flag is specified the output is generated via .Xr libxo 3 in a selection of different human and machine readable formats. See .Xr xo_parse_args 3 for details on command line arguments. -.It Fl b +.Pp +The following commands are available: +.Bl -tag -width indent +.It Ar basic +Print basic process statistics (this is the default). +.It Ar binary | Fl b Display binary information for the process. -.It Fl c +.Pp +Substring commands are accepted. +.It Ar argument(s) | Fl c Display command line arguments for the process. -.It Fl e +.Pp +Substring commands are accepted. +.It Ar environment | Fl e Display environment variables for the process. -.It Fl f +.Pp +Substring commands are accepted. +.It Ar file(s) | Ar fd(s) | Fl f Display file descriptor information for the process. -.It Fl i +.Pp +If the +.Fl C +subcommand flag is used then additional capability information is printed. +.It Ar signal(s) | Fl i Display signal pending and disposition information for the process. -.It Fl j +.Pp +If the +.Fl n +subcommand option is used, the signal numbers are shown instead of signal +names. +.Pp +Substring commands are accepted. +.It Ar tsignal(s) | Fl j Display signal pending and blocked information for the process's threads. -.It Fl k +.Pp +If the +.Fl n +subcommand option is used, the signal numbers are shown instead of signal +names. +.Pp +Substring commands are accepted. +.It Ar kstack | Fl k Display the stacks of kernel threads in the process, excluding stacks of threads currently running on a CPU and threads with stacks swapped to disk. -If the flag is repeated, function offsets as well as function names are -printed. -.It Fl l +.Pp +If the +.Fl v +subcommand option is used (or the command flag is repeated), function +offsets as well as function names are printed. +.It Ar rlimit | Fl l Display resource limits for the process. -.It Fl L +.It Ar ptlwpinfo | Fl L Display LWP info for the process pertaining to its signal driven exit. -.It Fl r +.It Ar rusage | Fl r Display resource usage information for the process. -.It Fl s +.Pp +If the +.Fl v +.Pq or Fl H +subcommand flag +is used then per-thread statistics are printed, rather than per-process +statistics. +The second field in the table will list the thread ID to which the row of +information corresponds. +.It Ar credential(s) | Fl s Display security credential information for the process. -.It Fl S +.Pp +Substring commands are accepted. +.It Ar cpuset | Ar cs | Fl S Display the cpuset information for the thread. -.It Fl t +.It Ar thread(s) | Fl t Display thread information for the process. -.It Fl v +.It Ar vm | Fl v Display virtual memory mappings for the process. -.It Fl x +.It Ar auxv | Fl x Display ELF auxiliary vector for the process. .El .Pp @@ -111,23 +212,6 @@ If the .Fl w flag is not specified, the output will not repeat. .Pp -The -.Fl C -flag requests the printing of additional capability information in the file -descriptor view. -.Pp -The -.Fl H -flag may be used to request per-thread statistics rather than per-process -statistics for some options. -For those options, the second field in the table will list the thread ID -to which the row of information corresponds. -The -.Fl H -flag is implied for the -.Fl S -mode. -.Pp Information for VM, file descriptor, and cpuset options is available only to the owner of a process or the superuser. A cpuset value displayed as -1 means that the information is either invalid diff --git a/usr.bin/procstat/procstat.c b/usr.bin/procstat/procstat.c index 375664119821..7ab9ba458aea 100644 --- a/usr.bin/procstat/procstat.c +++ b/usr.bin/procstat/procstat.c @@ -42,37 +42,111 @@ #include "procstat.h" -static int aflag, bflag, cflag, eflag, fflag, iflag, jflag, kflag; -static int lflag, Lflag, rflag, sflag, tflag, vflag, xflag, Sflag; -int hflag, nflag, Cflag, Hflag; +enum { + PS_CMP_NORMAL = 0x00, + PS_CMP_PLURAL = 0x01, + PS_CMP_SUBSTR = 0x02 +}; + +struct procstat_cmd { + const char *command; + const char *xocontainer; + const char *usage; + void (*cmd)(struct procstat *, struct kinfo_proc *); + void (*opt)(int, char * const *); + int cmp; +}; + +int procstat_opts = 0; + +static void cmdopt_none(int argc, char * const argv[]); +static void cmdopt_verbose(int argc, char * const argv[]); +static void cmdopt_signals(int argc, char * const argv[]); +static void cmdopt_rusage(int argc, char * const argv[]); +static void cmdopt_files(int argc, char * const argv[]); +static void cmdopt_cpuset(int argc, char * const argv[]); + +static const struct procstat_cmd cmd_table[] = { + { "argument", "arguments", NULL, &procstat_args, &cmdopt_none, + PS_CMP_PLURAL | PS_CMP_SUBSTR }, + { "auxv", "auxv", NULL, &procstat_auxv, &cmdopt_none, PS_CMP_NORMAL }, + { "basic", "basic", NULL, &procstat_basic, &cmdopt_none, + PS_CMP_NORMAL }, + { "binary", "binary", NULL, &procstat_bin, &cmdopt_none, + PS_CMP_SUBSTR }, + { "cpuset", "cs", NULL, &procstat_cs, &cmdopt_cpuset, PS_CMP_NORMAL }, + { "cs", "cs", NULL, &procstat_cs, &cmdopt_cpuset, PS_CMP_NORMAL }, + { "credential", "credentials", NULL, &procstat_cred, &cmdopt_none, + PS_CMP_PLURAL | PS_CMP_SUBSTR }, + { "environment", "environment", NULL, &procstat_env, &cmdopt_none, + PS_CMP_SUBSTR }, + { "fd", "files", "[-C]", &procstat_files, &cmdopt_files, + PS_CMP_PLURAL }, + { "file", "files", "[-C]", &procstat_files, &cmdopt_files, + PS_CMP_PLURAL }, + { "kstack", "kstack", "[-v]", &procstat_kstack, &cmdopt_verbose, + PS_CMP_NORMAL }, + { "ptlwpinfo", "ptlwpinfo", NULL, &procstat_ptlwpinfo, &cmdopt_none, + PS_CMP_NORMAL }, + { "rlimit", "rlimit", NULL, &procstat_rlimit, &cmdopt_none, + PS_CMP_NORMAL }, + { "rusage", "rusage", "[-Ht]", &procstat_rusage, &cmdopt_rusage, + PS_CMP_NORMAL }, + { "signal", "signals", "[-n]", &procstat_sigs, &cmdopt_signals, + PS_CMP_PLURAL | PS_CMP_SUBSTR }, + { "thread", "threads", NULL, &procstat_threads, &cmdopt_none, + PS_CMP_PLURAL }, + { "tsignal", "thread_signals", "[-n]", &procstat_threads_sigs, + &cmdopt_signals, PS_CMP_PLURAL | PS_CMP_SUBSTR }, + { "vm", "vm", NULL, &procstat_vm, &cmdopt_none, PS_CMP_NORMAL } +}; static void usage(void) { + size_t i, l; + int multi; - xo_error( - "usage: procstat [--libxo] [-Hhn] [-M core] " - "[-N system] [-w interval]\n" - " [-S | -b | -c | -e | -i | -j | -k | -kk | " - "-l | -r | -s | \n" - " -t | -v | -x]\n" - " [-a | pid ... | core ...]\n" - " procstat [--libxo] -Cf [-hn] [-M core] " - "[-N system] [-a | pid ... | core ...]\n" - " [-S | -b | -c | -e | -i | -j | -k | -kk | " - "-l | -r | -s | \n" - " procstat [--libxo] -L [-hn] [-M core] " - "[-N system] [-w interval]\n" - " [-S | -b | -c | -e | -i | -j | -k | -kk | " - "-l | -r | -s | \n" - " -t | -v | -x]\n" - " [core ...]\n"); + xo_error("usage: procstat [--libxo] [-h] [-M core] [-N system]" + " [-w interval] command\n" + " [pid ... | core ...]\n" + " procstat [--libxo] -a [-h] [-M core] [-N system] " + " [-w interval] command\n" + " procstat [--libxo] [-h] [-M core] [-N system]" + " [-w interval]\n" + " [-S | -b | -c | -e | -f [-C] | -i [-n] | " + "-j [-n] | -k [-k] |\n" + " -l | -r [-H] | -s | -t | -v | -x] " + "[pid ... | core ...]\n" + " procstat [--libxo] -a [-h] [-M core] [-N system]" + " [-w interval]\n" + " [-S | -b | -c | -e | -f [-C] | -i [-n] | " + "-j [-n] | -k [-k] |\n" + " -l | -r [-H] | -s | -t | -v | -x]\n" + " procstat [--libxo] -L [-h] [-M core] [-N system] core ...\n" + "Available commands:\n"); + for (i = 0, l = nitems(cmd_table); i < l; i++) { + multi = i + 1 < l && cmd_table[i].cmd == cmd_table[i + 1].cmd; + xo_error(" %s%s%s", multi ? "[" : "", + cmd_table[i].command, (cmd_table[i].cmp & PS_CMP_PLURAL) ? + "(s)" : ""); + for (; i + 1 < l && cmd_table[i].cmd == cmd_table[i + 1].cmd; + i++) + xo_error(" | %s%s", cmd_table[i + 1].command, + (cmd_table[i].cmp & PS_CMP_PLURAL) ? "(s)" : ""); + if (multi) + xo_error("]"); + if (cmd_table[i].usage != NULL) + xo_error(" %s", cmd_table[i].usage); + xo_error("\n"); + } xo_finish(); exit(EX_USAGE); } static void -procstat(struct procstat *prstat, struct kinfo_proc *kipp) +procstat(const struct procstat_cmd *cmd, struct procstat *prstat, + struct kinfo_proc *kipp) { char *pidstr = NULL; @@ -80,40 +154,7 @@ procstat(struct procstat *prstat, struct kinfo_proc *kipp) if (pidstr == NULL) xo_errc(1, ENOMEM, "Failed to allocate memory in procstat()"); xo_open_container(pidstr); - - if (bflag) - procstat_bin(prstat, kipp); - else if (cflag) - procstat_args(prstat, kipp); - else if (eflag) - procstat_env(prstat, kipp); - else if (fflag) - procstat_files(prstat, kipp); - else if (iflag) - procstat_sigs(prstat, kipp); - else if (jflag) - procstat_threads_sigs(prstat, kipp); - else if (kflag) - procstat_kstack(prstat, kipp, kflag); - else if (lflag) - procstat_rlimit(prstat, kipp); - else if (Lflag) - procstat_ptlwpinfo(prstat); - else if (rflag) - procstat_rusage(prstat, kipp); - else if (sflag) - procstat_cred(prstat, kipp); - else if (tflag) - procstat_threads(prstat, kipp); - else if (vflag) - procstat_vm(prstat, kipp); - else if (xflag) - procstat_auxv(prstat, kipp); - else if (Sflag) - procstat_cs(prstat, kipp); - else - procstat_basic(kipp); - + cmd->cmd(prstat, kipp); xo_close_container(pidstr); free(pidstr); } @@ -157,122 +198,158 @@ kinfo_proc_thread_name(const struct kinfo_proc *kipp) return (name); } +static const struct procstat_cmd * +getcmd(const char *str) +{ + const struct procstat_cmd *cmd; + size_t i, l; + int cmp, s; + + if (str == NULL) + return (NULL); + cmd = NULL; + if ((l = strlen(str)) == 0) + return (getcmd("basic")); + s = l > 1 && strcasecmp(str + l - 1, "s") == 0; + for (i = 0; i < nitems(cmd_table); i++) { + /* + * After the first match substring matches are disabled, + * allowing subsequent full matches to take precedence. + */ + if (cmd == NULL && (cmd_table[i].cmp & PS_CMP_SUBSTR)) + cmp = strncasecmp(str, cmd_table[i].command, l - + ((cmd_table[i].cmp & PS_CMP_PLURAL) && s ? 1 : 0)); + else if ((cmd_table[i].cmp & PS_CMP_PLURAL) && s && + l == strlen(cmd_table[i].command) + 1) + cmp = strncasecmp(str, cmd_table[i].command, l - 1); + else + cmp = strcasecmp(str, cmd_table[i].command); + if (cmp == 0) + cmd = &cmd_table[i]; + } + return (cmd); +} + int main(int argc, char *argv[]) { - int ch, interval, tmp; + int ch, interval; int i; struct kinfo_proc *p; + const struct procstat_cmd *cmd; struct procstat *prstat, *cprstat; long l; pid_t pid; char *dummy; char *nlistf, *memf; - const char *xocontainer; + int aflag; int cnt; interval = 0; + cmd = NULL; memf = nlistf = NULL; + aflag = 0; argc = xo_parse_args(argc, argv); - xocontainer = "basic"; while ((ch = getopt(argc, argv, "abCcefHhijkLlM:N:nrSstvw:x")) != -1) { switch (ch) { + case 'a': + aflag++; + break; + case 'b': + if (cmd != NULL) + usage(); + cmd = getcmd("binary"); + break; case 'C': - Cflag++; + procstat_opts |= PS_OPT_CAPABILITIES; + break; + case 'c': + if (cmd != NULL) + usage(); + cmd = getcmd("arguments"); + break; + case 'e': + if (cmd != NULL) + usage(); + cmd = getcmd("environment"); + break; + case 'f': + if (cmd != NULL) + usage(); + cmd = getcmd("files"); break; - case 'H': - Hflag++; + procstat_opts |= PS_OPT_PERTHREAD; + break; + case 'h': + procstat_opts |= PS_OPT_NOHEADER; + break; + case 'i': + if (cmd != NULL) + usage(); + cmd = getcmd("signals"); + break; + case 'j': + if (cmd != NULL) + usage(); + cmd = getcmd("tsignals"); + break; + case 'k': + if (cmd->cmd == procstat_kstack) { + if ((procstat_opts & PS_OPT_VERBOSE) != 0) + usage(); + procstat_opts |= PS_OPT_VERBOSE; + } else { + if (cmd != NULL) + usage(); + cmd = getcmd("kstack"); + } + break; + case 'L': + if (cmd != NULL) + usage(); + cmd = getcmd("ptlwpinfo"); + break; + case 'l': + if (cmd != NULL) + usage(); + cmd = getcmd("rlimit"); break; - case 'M': memf = optarg; break; case 'N': nlistf = optarg; break; - case 'S': - Sflag++; - xocontainer = "cs"; - break; - case 'a': - aflag++; - break; - - case 'b': - bflag++; - xocontainer = "binary"; - break; - - case 'c': - cflag++; - xocontainer = "arguments"; - break; - - case 'e': - eflag++; - xocontainer = "environment"; - break; - - case 'f': - fflag++; - xocontainer = "files"; - break; - - case 'i': - iflag++; - xocontainer = "signals"; - break; - - case 'j': - jflag++; - xocontainer = "thread_signals"; - break; - - case 'k': - kflag++; - xocontainer = "kstack"; - break; - - case 'l': - lflag++; - xocontainer = "rlimit"; - break; - - case 'L': - Lflag++; - xocontainer = "ptlwpinfo"; - break; - case 'n': - nflag++; + procstat_opts |= PS_OPT_SIGNUM; break; - - case 'h': - hflag++; - break; - case 'r': - rflag++; - xocontainer = "rusage"; + if (cmd != NULL) + usage(); + cmd = getcmd("rusage"); + break; + case 'S': + if (cmd != NULL) + usage(); + cmd = getcmd("cpuset"); break; - case 's': - sflag++; - xocontainer = "credentials"; + if (cmd != NULL) + usage(); + cmd = getcmd("credentials"); break; - case 't': - tflag++; - xocontainer = "threads"; + if (cmd != NULL) + usage(); + cmd = getcmd("threads"); break; - case 'v': - vflag++; - xocontainer = "vm"; + if (cmd != NULL) + usage(); + cmd = getcmd("vm"); break; - case 'w': l = strtol(optarg, &dummy, 10); if (*dummy != '\0') @@ -281,12 +358,11 @@ main(int argc, char *argv[]) usage(); interval = l; break; - case 'x': - xflag++; - xocontainer = "auxv"; + if (cmd != NULL) + usage(); + cmd = getcmd("auxv"); break; - case '?': default: usage(); @@ -296,24 +372,31 @@ main(int argc, char *argv[]) argc -= optind; argv += optind; - /* We require that either 0 or 1 mode flags be set. */ - tmp = bflag + cflag + eflag + fflag + iflag + jflag + (kflag ? 1 : 0) + - lflag + rflag + sflag + tflag + vflag + xflag + Sflag; - if (!(tmp == 0 || tmp == 1)) - usage(); - - /* We allow -k to be specified up to twice, but not more. */ - if (kflag > 2) - usage(); + if (cmd == NULL && argv[0] != NULL && (cmd = getcmd(argv[0])) != NULL) { + if ((procstat_opts & PS_SUBCOMMAND_OPTS) != 0) + usage(); + if (cmd->opt != NULL) { + optreset = 1; + optind = 1; + cmd->opt(argc, argv); + argc -= optind; + argv += optind; + } else { + argc -= 1; + argv += 1; + } + } else { + if (cmd == NULL) + cmd = getcmd("basic"); + if (cmd->cmd != procstat_files && + (procstat_opts & PS_OPT_CAPABILITIES) != 0) + usage(); + } /* Must specify either the -a flag or a list of pids. */ if (!(aflag == 1 && argc == 0) && !(aflag == 0 && argc > 0)) usage(); - /* Only allow -C with -f. */ - if (Cflag && !fflag) - usage(); - if (memf != NULL) prstat = procstat_open_kvm(nlistf, memf); else @@ -323,7 +406,7 @@ main(int argc, char *argv[]) do { xo_set_version(PROCSTAT_XO_VERSION); xo_open_container("procstat"); - xo_open_container(xocontainer); + xo_open_container(cmd->xocontainer); if (aflag) { p = procstat_getprocs(prstat, KERN_PROC_PROC, 0, &cnt); @@ -331,10 +414,10 @@ main(int argc, char *argv[]) xo_errx(1, "procstat_getprocs()"); kinfo_proc_sort(p, cnt); for (i = 0; i < cnt; i++) { - procstat(prstat, &p[i]); + procstat(cmd, prstat, &p[i]); /* Suppress header after first process. */ - hflag = 1; + procstat_opts |= PS_OPT_NOHEADER; xo_flush(); } procstat_freeprocs(prstat, p); @@ -351,7 +434,7 @@ main(int argc, char *argv[]) if (p == NULL) xo_errx(1, "procstat_getprocs()"); if (cnt != 0) - procstat(prstat, p); + procstat(cmd, prstat, p); procstat_freeprocs(prstat, p); } else { cprstat = procstat_open_core(argv[i]); @@ -364,15 +447,15 @@ main(int argc, char *argv[]) if (p == NULL) xo_errx(1, "procstat_getprocs()"); if (cnt != 0) - procstat(cprstat, p); + procstat(cmd, cprstat, p); procstat_freeprocs(cprstat, p); procstat_close(cprstat); } /* Suppress header after first process. */ - hflag = 1; + procstat_opts |= PS_OPT_NOHEADER; } - xo_close_container(xocontainer); + xo_close_container(cmd->xocontainer); xo_close_container("procstat"); xo_finish(); if (interval) @@ -383,3 +466,95 @@ main(int argc, char *argv[]) exit(0); } + +void +cmdopt_none(int argc, char * const argv[]) +{ + int ch; + + while ((ch = getopt(argc, argv, "")) != -1) { + switch (ch) { + case '?': + default: + usage(); + } + } +} + +void +cmdopt_verbose(int argc, char * const argv[]) +{ + int ch; + + while ((ch = getopt(argc, argv, "v")) != -1) { + switch (ch) { + case 'v': + procstat_opts |= PS_OPT_VERBOSE; + break; + case '?': + default: + usage(); + } + } +} + +void +cmdopt_signals(int argc, char * const argv[]) +{ + int ch; + + while ((ch = getopt(argc, argv, "n")) != -1) { + switch (ch) { + case 'n': + procstat_opts |= PS_OPT_SIGNUM; + break; + case '?': + default: + usage(); + } + } +} + +void +cmdopt_rusage(int argc, char * const argv[]) +{ + int ch; + + while ((ch = getopt(argc, argv, "Ht")) != -1) { + switch (ch) { + case 'H': + /* FALLTHROUGH */ + case 't': + procstat_opts |= PS_OPT_PERTHREAD; + break; + case '?': + default: + usage(); + } + } +} + +void +cmdopt_files(int argc, char * const argv[]) +{ + int ch; + + while ((ch = getopt(argc, argv, "C")) != -1) { + switch (ch) { + case 'C': + procstat_opts |= PS_OPT_CAPABILITIES; + break; + case '?': + default: + usage(); + } + } +} + +void +cmdopt_cpuset(int argc, char * const argv[]) +{ + + procstat_opts |= PS_OPT_PERTHREAD; + cmdopt_none(argc, argv); +} diff --git a/usr.bin/procstat/procstat.h b/usr.bin/procstat/procstat.h index dd35c9c796c7..c75018fc0908 100644 --- a/usr.bin/procstat/procstat.h +++ b/usr.bin/procstat/procstat.h @@ -35,7 +35,19 @@ #define PROCSTAT_XO_VERSION "1" -extern int hflag, nflag, Cflag, Hflag; +enum { + PS_OPT_CAPABILITIES = 0x01, + PS_OPT_NOHEADER = 0x02, + PS_OPT_PERTHREAD = 0x04, + PS_OPT_SIGNUM = 0x08, + PS_OPT_VERBOSE = 0x10 +}; + +#define PS_SUBCOMMAND_OPTS \ + (PS_OPT_CAPABILITIES | PS_OPT_SIGNUM | \ + PS_OPT_PERTHREAD | PS_OPT_VERBOSE) + +extern int procstat_opts; struct kinfo_proc; void kinfo_proc_sort(struct kinfo_proc *kipp, int count); @@ -43,15 +55,14 @@ const char * kinfo_proc_thread_name(const struct kinfo_proc *kipp); void procstat_args(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_auxv(struct procstat *prstat, struct kinfo_proc *kipp); -void procstat_basic(struct kinfo_proc *kipp); +void procstat_basic(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_bin(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_cred(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_cs(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_env(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_files(struct procstat *prstat, struct kinfo_proc *kipp); -void procstat_kstack(struct procstat *prstat, struct kinfo_proc *kipp, - int kflag); -void procstat_ptlwpinfo(struct procstat *prstat); +void procstat_kstack(struct procstat *prstat, struct kinfo_proc *kipp); +void procstat_ptlwpinfo(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_rlimit(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_rusage(struct procstat *prstat, struct kinfo_proc *kipp); void procstat_sigs(struct procstat *prstat, struct kinfo_proc *kipp); diff --git a/usr.bin/procstat/procstat_args.c b/usr.bin/procstat/procstat_args.c index fd5f3d3b0738..b64364bd8d81 100644 --- a/usr.bin/procstat/procstat_args.c +++ b/usr.bin/procstat/procstat_args.c @@ -47,7 +47,7 @@ procstat_args(struct procstat *procstat, struct kinfo_proc *kipp) int i; char **args; - if (!hflag) { + if ((procstat_opts & PS_OPT_NOHEADER) == 0) { xo_emit("{T:/%5s %-16s %-53s}\n", "PID", "COMM", "ARGS"); } @@ -74,7 +74,7 @@ procstat_env(struct procstat *procstat, struct kinfo_proc *kipp) int i; char **envs; - if (!hflag) { + if ((procstat_opts & PS_OPT_NOHEADER) == 0) { xo_emit("{T:/%5s %-16s %-53s}\n", "PID", "COMM", "ENVIRONMENT"); } diff --git a/usr.bin/procstat/procstat_auxv.c b/usr.bin/procstat/procstat_auxv.c index f4a2265d762a..0c930cae9140 100644 --- a/usr.bin/procstat/procstat_auxv.c +++ b/usr.bin/procstat/procstat_auxv.c @@ -51,7 +51,7 @@ procstat_auxv(struct procstat *procstat, struct kinfo_proc *kipp) u_int count, i; static char prefix[256]; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %-16s %-16s %-16s}\n", "PID", "COMM", "AUXV", "VALUE"); diff --git a/usr.bin/procstat/procstat_basic.c b/usr.bin/procstat/procstat_basic.c index 75bb7a8d9ef1..b5675248f88e 100644 --- a/usr.bin/procstat/procstat_basic.c +++ b/usr.bin/procstat/procstat_basic.c @@ -39,10 +39,10 @@ #include "procstat.h" void -procstat_basic(struct kinfo_proc *kipp) +procstat_basic(struct procstat *procstat __unused, struct kinfo_proc *kipp) { - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %5s %5s %5s %5s %3s %-8s %-9s %-13s %-12s}\n", "PID", "PPID", "PGID", "SID", "TSID", "THR", "LOGIN", "WCHAN", "EMUL", "COMM"); diff --git a/usr.bin/procstat/procstat_bin.c b/usr.bin/procstat/procstat_bin.c index 8b2b8a14be8b..800775f3efe7 100644 --- a/usr.bin/procstat/procstat_bin.c +++ b/usr.bin/procstat/procstat_bin.c @@ -46,7 +46,7 @@ procstat_bin(struct procstat *prstat, struct kinfo_proc *kipp) int osrel; static char pathname[PATH_MAX]; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %-16s %8s %s}\n", "PID", "COMM", "OSREL", "PATH"); diff --git a/usr.bin/procstat/procstat_cred.c b/usr.bin/procstat/procstat_cred.c index 940c952a8324..dbc0831233d3 100644 --- a/usr.bin/procstat/procstat_cred.c +++ b/usr.bin/procstat/procstat_cred.c @@ -48,7 +48,7 @@ procstat_cred(struct procstat *procstat, struct kinfo_proc *kipp) unsigned int i, ngroups; gid_t *groups; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %-16s %5s %5s %5s %5s %5s %5s %5s %5s %-15s}\n", "PID", "COMM", "EUID", "RUID", "SVUID", "EGID", "RGID", "SVGID", "UMASK", "FLAGS", "GROUPS"); diff --git a/usr.bin/procstat/procstat_cs.c b/usr.bin/procstat/procstat_cs.c index 8af912edb749..7b8a61645be4 100644 --- a/usr.bin/procstat/procstat_cs.c +++ b/usr.bin/procstat/procstat_cs.c @@ -52,7 +52,7 @@ procstat_cs(struct procstat *procstat, struct kinfo_proc *kipp) unsigned int count, i; int once, twice, lastcpu, cpu; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %6s %-19s %-19s %2s %4s %-7s}\n", "PID", "TID", "COMM", "TDNAME", "CPU", "CSID", "CPU MASK"); diff --git a/usr.bin/procstat/procstat_files.c b/usr.bin/procstat/procstat_files.c index dcfa6619ea7d..25ae8ae26d58 100644 --- a/usr.bin/procstat/procstat_files.c +++ b/usr.bin/procstat/procstat_files.c @@ -303,7 +303,8 @@ procstat_files(struct procstat *procstat, struct kinfo_proc *kipp) */ capwidth = 0; head = procstat_getfiles(procstat, kipp, 0); - if (head != NULL && Cflag) { + if (head != NULL && + (procstat_opts & PS_OPT_CAPABILITIES) != 0) { STAILQ_FOREACH(fst, head, next) { width = width_capability(&fst->fs_cap_rights); if (width > capwidth) @@ -313,8 +314,8 @@ procstat_files(struct procstat *procstat, struct kinfo_proc *kipp) capwidth = strlen("CAPABILITIES"); } - if (!hflag) { - if (Cflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) { + if ((procstat_opts & PS_OPT_CAPABILITIES) != 0) xo_emit("{T:/%5s %-16s %5s %1s %-8s %-*s " "%-3s %-12s}\n", "PID", "COMM", "FD", "T", "FLAGS", capwidth, "CAPABILITIES", "PRO", @@ -417,7 +418,7 @@ procstat_files(struct procstat *procstat, struct kinfo_proc *kipp) break; } xo_emit("{d:fd_type/%1s/%s} ", str); - if (!Cflag) { + if ((procstat_opts & PS_OPT_CAPABILITIES) == 0) { str = "-"; if (fst->fs_type == PS_FST_TYPE_VNODE) { error = procstat_get_vnode_info(procstat, fst, @@ -514,7 +515,7 @@ procstat_files(struct procstat *procstat, struct kinfo_proc *kipp) xo_emit("{elq:fd_flags/lock_held}"); xo_close_list("fd_flags"); - if (!Cflag) { + if ((procstat_opts & PS_OPT_CAPABILITIES) == 0) { if (fst->fs_ref_count > -1) xo_emit("{:ref_count/%3d/%d} ", fst->fs_ref_count); @@ -526,7 +527,7 @@ procstat_files(struct procstat *procstat, struct kinfo_proc *kipp) else xo_emit("{q:offset/%7c/%c} ", '-'); } - if (Cflag) { + if ((procstat_opts & PS_OPT_CAPABILITIES) != 0) { print_capability(&fst->fs_cap_rights, capwidth); xo_emit(" "); } diff --git a/usr.bin/procstat/procstat_kstack.c b/usr.bin/procstat/procstat_kstack.c index 374f9d085692..225d939b22c4 100644 --- a/usr.bin/procstat/procstat_kstack.c +++ b/usr.bin/procstat/procstat_kstack.c @@ -162,7 +162,7 @@ kinfo_kstack_sort(struct kinfo_kstack *kkstp, int count) void -procstat_kstack(struct procstat *procstat, struct kinfo_proc *kipp, int kflag) +procstat_kstack(struct procstat *procstat, struct kinfo_proc *kipp) { struct kinfo_kstack *kkstp, *kkstp_free; struct kinfo_proc *kip, *kip_free; @@ -170,7 +170,7 @@ procstat_kstack(struct procstat *procstat, struct kinfo_proc *kipp, int kflag) unsigned int i, j; unsigned int kip_count, kstk_count; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %6s %-19s %-19s %-29s}\n", "PID", "TID", "COMM", "TDNAME", "KSTACK"); @@ -234,9 +234,11 @@ procstat_kstack(struct procstat *procstat, struct kinfo_proc *kipp, int kflag) * entries, but for a more compact view, we convert carriage * returns to spaces. */ - kstack_cleanup(kkstp->kkst_trace, trace, kflag); + kstack_cleanup(kkstp->kkst_trace, trace, + (procstat_opts & PS_OPT_VERBOSE) != 0 ? 2 : 1); xo_open_list("trace"); - kstack_cleanup_encoded(kkstp->kkst_trace, encoded_trace, kflag); + kstack_cleanup_encoded(kkstp->kkst_trace, encoded_trace, + (procstat_opts & PS_OPT_VERBOSE) != 0 ? 2 : 1); xo_close_list("trace"); xo_emit("{d:trace/%-29s}\n", trace); } diff --git a/usr.bin/procstat/procstat_ptlwpinfo.c b/usr.bin/procstat/procstat_ptlwpinfo.c index 20ab95889e6c..f95bdab28b2d 100644 --- a/usr.bin/procstat/procstat_ptlwpinfo.c +++ b/usr.bin/procstat/procstat_ptlwpinfo.c @@ -36,7 +36,7 @@ #include "procstat.h" void -procstat_ptlwpinfo(struct procstat *prstat) +procstat_ptlwpinfo(struct procstat *prstat, struct kinfo_proc *kipp __unused) { struct ptrace_lwpinfo *pl; unsigned int count, i; @@ -45,7 +45,7 @@ procstat_ptlwpinfo(struct procstat *prstat) if (pl == NULL) return; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit( "{T:/%6s %7s %5s %5s %5s %6s %5s} {[:/%d}{T:/%s}{]:} {T:/%s}\n", "LWPID", "EVENT", "SIGNO", "CODE", "ERRNO", "PID", "UID", diff --git a/usr.bin/procstat/procstat_rlimit.c b/usr.bin/procstat/procstat_rlimit.c index 5088c59767e9..dc0d486dbb2e 100644 --- a/usr.bin/procstat/procstat_rlimit.c +++ b/usr.bin/procstat/procstat_rlimit.c @@ -94,7 +94,7 @@ procstat_rlimit(struct procstat *prstat, struct kinfo_proc *kipp) struct rlimit rlimit; int i; - if (!hflag) { + if ((procstat_opts & PS_OPT_NOHEADER) == 0) { xo_emit("{T:/%5s %-16s %-16s %16s %16s}\n", "PID", "COMM", "RLIMIT", "SOFT ", "HARD "); } diff --git a/usr.bin/procstat/procstat_rusage.c b/usr.bin/procstat/procstat_rusage.c index e14ae2470fef..3d8c76370c0c 100644 --- a/usr.bin/procstat/procstat_rusage.c +++ b/usr.bin/procstat/procstat_rusage.c @@ -106,7 +106,7 @@ print_prefix(struct kinfo_proc *kipp) { xo_emit("{d:process_id/%5d/%d} ", kipp->ki_pid); - if (Hflag) + if ((procstat_opts & PS_OPT_PERTHREAD) != 0) xo_emit("{d:thread_id/%6d/%d} ", kipp->ki_tid); xo_emit("{d:command/%-16s/%s} ", kipp->ki_comm); } @@ -125,7 +125,7 @@ print_rusage(struct kinfo_proc *kipp) xo_emit("{d:resource/%-14s} {d:usage/%29s}{P: }\n", "system time", format_time(&kipp->ki_rusage.ru_stime)); - if (Hflag) { + if ((procstat_opts & PS_OPT_PERTHREAD) != 0) { asprintf(&threadid, "%d", kipp->ki_tid); if (threadid == NULL) xo_errc(1, ENOMEM, @@ -154,7 +154,7 @@ print_rusage(struct kinfo_proc *kipp) rusage_info[i].ri_scale)); lp++; } - if (Hflag) { + if ((procstat_opts & PS_OPT_PERTHREAD) != 0) { xo_close_container(threadid); free(threadid); } @@ -166,15 +166,15 @@ procstat_rusage(struct procstat *procstat, struct kinfo_proc *kipp) struct kinfo_proc *kip; unsigned int count, i; - if (!hflag) { + if ((procstat_opts & PS_OPT_NOHEADER) == 0) { xo_emit("{d:ta/%5s} ", "PID"); - if (Hflag) + if ((procstat_opts & PS_OPT_PERTHREAD) != 0) xo_emit("{d:tb/%6s} ", "TID"); xo_emit("{d:tc/%-16s %-32s %14s}\n", "COMM", "RESOURCE", "VALUE "); } - if (!Hflag) { + if ((procstat_opts & PS_OPT_PERTHREAD) == 0) { print_rusage(kipp); return; } diff --git a/usr.bin/procstat/procstat_sigs.c b/usr.bin/procstat/procstat_sigs.c index 7bc73ec43471..59759b2b7899 100644 --- a/usr.bin/procstat/procstat_sigs.c +++ b/usr.bin/procstat/procstat_sigs.c @@ -48,7 +48,7 @@ procstat_print_signame(int sig) char name[12]; int i; - if (!nflag && sig < sys_nsig) { + if ((procstat_opts & PS_OPT_SIGNUM) == 0 && sig < sys_nsig) { strlcpy(name, sys_signame[sig], sizeof(name)); for (i = 0; name[i] != 0; i++) name[i] = toupper(name[i]); @@ -67,7 +67,7 @@ procstat_close_signame(int sig) char name[12]; int i; - if (!nflag && sig < sys_nsig) { + if ((procstat_opts & PS_OPT_SIGNUM) == 0 && sig < sys_nsig) { strlcpy(name, sys_signame[sig], sizeof(name)); for (i = 0; name[i] != 0; i++) name[i] = toupper(name[i]); @@ -110,7 +110,7 @@ procstat_sigs(struct procstat *prstat __unused, struct kinfo_proc *kipp) { int j; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %-16s %-7s %4s}\n", "PID", "COMM", "SIG", "FLAGS"); @@ -139,7 +139,7 @@ procstat_threads_sigs(struct procstat *procstat, struct kinfo_proc *kipp) unsigned int count, i; char *threadid; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %6s %-16s %-7s %4s}\n", "PID", "TID", "COMM", "SIG", "FLAGS"); diff --git a/usr.bin/procstat/procstat_threads.c b/usr.bin/procstat/procstat_threads.c index 40e1b4b15bae..a09f7e83584b 100644 --- a/usr.bin/procstat/procstat_threads.c +++ b/usr.bin/procstat/procstat_threads.c @@ -48,7 +48,7 @@ procstat_threads(struct procstat *procstat, struct kinfo_proc *kipp) const char *str; char *threadid; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %6s %-19s %-19s %2s %4s %-7s %-9s}\n", "PID", "TID", "COMM", "TDNAME", "CPU", "PRI", "STATE", "WCHAN"); diff --git a/usr.bin/procstat/procstat_vm.c b/usr.bin/procstat/procstat_vm.c index 8c641e55aad5..9f38c6432651 100644 --- a/usr.bin/procstat/procstat_vm.c +++ b/usr.bin/procstat/procstat_vm.c @@ -50,7 +50,7 @@ procstat_vm(struct procstat *procstat, struct kinfo_proc *kipp) const char *str, *lstr; ptrwidth = 2*sizeof(void *) + 2; - if (!hflag) + if ((procstat_opts & PS_OPT_NOHEADER) == 0) xo_emit("{T:/%5s %*s %*s %3s %4s %4s %3s %3s %-4s %-2s %-s}\n", "PID", ptrwidth, "START", ptrwidth, "END", "PRT", "RES", "PRES", "REF", "SHD", "FLAG", "TP", "PATH"); diff --git a/usr.bin/procstat/tests/procstat_test.sh b/usr.bin/procstat/tests/procstat_test.sh index a939f4f26cd7..06fa1f995522 100755 --- a/usr.bin/procstat/tests/procstat_test.sh +++ b/usr.bin/procstat/tests/procstat_test.sh @@ -63,8 +63,11 @@ binary_info_body() header_re=$(printf "$line_format" "PID" "COMM" "OSREL" "PATH") line_re=$(printf "$line_format" $PROG_PID $PROG_COMM "[[:digit:]]+" "$PROG_PATH") - atf_check -o save:procstat.out procstat -b $PROG_PID + atf_check -o save:procstat.out procstat binary $PROG_PID + atf_check -o match:"$header_re" head -n 1 procstat.out + atf_check -o match:"$line_re" tail -n 1 procstat.out + atf_check -o save:procstat.out procstat -b $PROG_PID atf_check -o match:"$header_re" head -n 1 procstat.out atf_check -o match:"$line_re" tail -n 1 procstat.out } @@ -84,6 +87,10 @@ command_line_arguments_body() header_re=$(printf "$line_format" "PID" "COMM" "ARGS") line_re=$(printf "$line_format" $PROG_PID "$PROG_COMM" "$PROG_PATH $arguments") + atf_check -o save:procstat.out procstat arguments $PROG_PID + atf_check -o match:"$header_re" head -n 1 procstat.out + atf_check -o match:"$line_re" tail -n 1 procstat.out + atf_check -o save:procstat.out procstat -c $PROG_PID atf_check -o match:"$header_re" head -n 1 procstat.out atf_check -o match:"$line_re" tail -n 1 procstat.out @@ -105,8 +112,11 @@ environment_body() header_re=$(printf "$line_format" "PID" "COMM" "ENVIRONMENT") line_re=$(printf "$line_format" $PROG_PID $PROG_COMM ".*$var.*") - atf_check -o save:procstat.out procstat -e $PROG_PID + atf_check -o save:procstat.out procstat environment $PROG_PID + atf_check -o match:"$header_re" head -n 1 procstat.out + atf_check -o match:"$line_re" tail -n 1 procstat.out + atf_check -o save:procstat.out procstat -e $PROG_PID atf_check -o match:"$header_re" head -n 1 procstat.out atf_check -o match:"$line_re" tail -n 1 procstat.out } @@ -125,8 +135,11 @@ file_descriptor_body() # XXX: write a more sensible feature test line_re=$(printf "$line_format" $PROG_PID $PROG_COMM ".+" ".+" ".+" ".+" ".+" ".+" ".+" ".+") - atf_check -o save:procstat.out procstat -f $PROG_PID + atf_check -o save:procstat.out procstat files $PROG_PID + atf_check -o match:"$header_re" head -n 1 procstat.out + atf_check -o match:"$line_re" awk 'NR > 1' procstat.out + atf_check -o save:procstat.out procstat -f $PROG_PID atf_check -o match:"$header_re" head -n 1 procstat.out atf_check -o match:"$line_re" awk 'NR > 1' procstat.out } From 04660064b8c9a9b50ccd49aba5d27bebb023289b Mon Sep 17 00:00:00 2001 From: Fedor Uporov Date: Sat, 14 Oct 2017 19:02:52 +0000 Subject: [PATCH 076/219] Add extended attributes support to fuse kernel module. Author: kem Reviewed by: cem, pfg (mentor) Approved by: pfg (mentor) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D12485 --- sys/fs/fuse/fuse_ipc.c | 17 +- sys/fs/fuse/fuse_vnops.c | 386 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 393 insertions(+), 10 deletions(-) diff --git a/sys/fs/fuse/fuse_ipc.c b/sys/fs/fuse/fuse_ipc.c index a22147e7eea3..376dab6b8ecd 100644 --- a/sys/fs/fuse/fuse_ipc.c +++ b/sys/fs/fuse/fuse_ipc.c @@ -636,23 +636,20 @@ fuse_body_audit(struct fuse_ticket *ftick, size_t blen) break; case FUSE_SETXATTR: - panic("FUSE_SETXATTR implementor has forgotten to define a" - " response body format check"); + err = (blen == 0) ? 0 : EINVAL; break; case FUSE_GETXATTR: - panic("FUSE_GETXATTR implementor has forgotten to define a" - " response body format check"); - break; - case FUSE_LISTXATTR: - panic("FUSE_LISTXATTR implementor has forgotten to define a" - " response body format check"); + /* + * These can have varying response lengths, and 0 length + * isn't necessarily invalid. + */ + err = 0; break; case FUSE_REMOVEXATTR: - panic("FUSE_REMOVEXATTR implementor has forgotten to define a" - " response body format check"); + err = (blen == 0) ? 0 : EINVAL; break; case FUSE_FLUSH: diff --git a/sys/fs/fuse/fuse_vnops.c b/sys/fs/fuse/fuse_vnops.c index 0a12e192d36c..a70ff10bf2c1 100644 --- a/sys/fs/fuse/fuse_vnops.c +++ b/sys/fs/fuse/fuse_vnops.c @@ -73,6 +73,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -112,10 +113,13 @@ __FBSDID("$FreeBSD$"); static vop_access_t fuse_vnop_access; static vop_close_t fuse_vnop_close; static vop_create_t fuse_vnop_create; +static vop_deleteextattr_t fuse_vnop_deleteextattr; static vop_fsync_t fuse_vnop_fsync; static vop_getattr_t fuse_vnop_getattr; +static vop_getextattr_t fuse_vnop_getextattr; static vop_inactive_t fuse_vnop_inactive; static vop_link_t fuse_vnop_link; +static vop_listextattr_t fuse_vnop_listextattr; static vop_lookup_t fuse_vnop_lookup; static vop_mkdir_t fuse_vnop_mkdir; static vop_mknod_t fuse_vnop_mknod; @@ -128,6 +132,7 @@ static vop_remove_t fuse_vnop_remove; static vop_rename_t fuse_vnop_rename; static vop_rmdir_t fuse_vnop_rmdir; static vop_setattr_t fuse_vnop_setattr; +static vop_setextattr_t fuse_vnop_setextattr; static vop_strategy_t fuse_vnop_strategy; static vop_symlink_t fuse_vnop_symlink; static vop_write_t fuse_vnop_write; @@ -140,10 +145,13 @@ struct vop_vector fuse_vnops = { .vop_access = fuse_vnop_access, .vop_close = fuse_vnop_close, .vop_create = fuse_vnop_create, + .vop_deleteextattr = fuse_vnop_deleteextattr, .vop_fsync = fuse_vnop_fsync, .vop_getattr = fuse_vnop_getattr, + .vop_getextattr = fuse_vnop_getextattr, .vop_inactive = fuse_vnop_inactive, .vop_link = fuse_vnop_link, + .vop_listextattr = fuse_vnop_listextattr, .vop_lookup = fuse_vnop_lookup, .vop_mkdir = fuse_vnop_mkdir, .vop_mknod = fuse_vnop_mknod, @@ -157,6 +165,7 @@ struct vop_vector fuse_vnops = { .vop_rename = fuse_vnop_rename, .vop_rmdir = fuse_vnop_rmdir, .vop_setattr = fuse_vnop_setattr, + .vop_setextattr = fuse_vnop_setextattr, .vop_strategy = fuse_vnop_strategy, .vop_symlink = fuse_vnop_symlink, .vop_write = fuse_vnop_write, @@ -1958,6 +1967,383 @@ fuse_vnop_putpages(struct vop_putpages_args *ap) return rtvals[0]; } +static const char extattr_namespace_separator = '.'; + +/* + struct vop_getextattr_args { + struct vop_generic_args a_gen; + struct vnode *a_vp; + int a_attrnamespace; + const char *a_name; + struct uio *a_uio; + size_t *a_size; + struct ucred *a_cred; + struct thread *a_td; + }; +*/ +static int +fuse_vnop_getextattr(struct vop_getextattr_args *ap) +{ + struct vnode *vp = ap->a_vp; + struct uio *uio = ap->a_uio; + struct fuse_dispatcher fdi = {0}; + struct fuse_getxattr_in *get_xattr_in; + struct fuse_getxattr_out *get_xattr_out; + struct mount *mp = vnode_mount(vp); + char *prefix; + size_t len; + char *attr_str; + struct thread *td = ap->a_td; + struct ucred *cred = ap->a_cred; + int err = 0; + + fuse_trace_printf_vnop(); + + if (fuse_isdeadfs(vp)) + return ENXIO; + + /* Default to looking for user attributes. */ + if (ap->a_attrnamespace == EXTATTR_NAMESPACE_SYSTEM) + prefix = EXTATTR_NAMESPACE_SYSTEM_STRING; + else + prefix = EXTATTR_NAMESPACE_USER_STRING; + + len = strlen(prefix) + sizeof(extattr_namespace_separator) + + strlen(ap->a_name) + 1; + + fdisp_init(&fdi, len + sizeof(*get_xattr_in)); + fdisp_make_vp(&fdi, FUSE_GETXATTR, vp, td, cred); + + get_xattr_in = fdi.indata; + /* + * Check to see whether we're querying the available size or + * issuing the actual request. If we pass in 0, we get back struct + * fuse_getxattr_out. If we pass in a non-zero size, we get back + * that much data, without the struct fuse_getxattr_out header. + */ + if (ap->a_size != NULL) + get_xattr_in->size = 0; + else + get_xattr_in->size = uio->uio_resid; + + attr_str = (char *)fdi.indata + sizeof(*get_xattr_in); + snprintf(attr_str, len, "%s%c%s", prefix, extattr_namespace_separator, + ap->a_name); + + err = fdisp_wait_answ(&fdi); + + if (err != 0) { + if (err == ENOSYS) + fsess_set_notimpl(mp, FUSE_GETXATTR); + debug_printf("getxattr: got err=%d from daemon\n", err); + goto out; + } + + /* + * If we get to this point (i.e. no error), we should have a valid + * answer of some sort. i.e. non-zero iosize and a valid pointer. + */ + if ((fdi.answ == NULL) || (fdi.iosize == 0)) { + debug_printf("getxattr: err = 0, but answ = %p, iosize = %zu\n", + fdi.answ, fdi.iosize); + err = EINVAL; + goto out; + } + get_xattr_out = fdi.answ; + + if (ap->a_size != NULL) { + *ap->a_size = get_xattr_out->size; + } else if (fdi.iosize > 0) { + err = uiomove(fdi.answ, fdi.iosize, uio); + } else { + err = EINVAL; + } + +out: + fdisp_destroy(&fdi); + return (err); +} + +/* + struct vop_setextattr_args { + struct vop_generic_args a_gen; + struct vnode *a_vp; + int a_attrnamespace; + const char *a_name; + struct uio *a_uio; + struct ucred *a_cred; + struct thread *a_td; + }; +*/ +static int +fuse_vnop_setextattr(struct vop_setextattr_args *ap) +{ + struct vnode *vp = ap->a_vp; + struct uio *uio = ap->a_uio; + struct fuse_dispatcher fdi = {0}; + struct fuse_setxattr_in *set_xattr_in; + struct mount *mp = vnode_mount(vp); + char *prefix; + size_t len; + char *attr_str; + struct thread *td = ap->a_td; + struct ucred *cred = ap->a_cred; + int err = 0; + + fuse_trace_printf_vnop(); + + if (fuse_isdeadfs(vp)) + return ENXIO; + + /* Default to looking for user attributes. */ + if (ap->a_attrnamespace == EXTATTR_NAMESPACE_SYSTEM) + prefix = EXTATTR_NAMESPACE_SYSTEM_STRING; + else + prefix = EXTATTR_NAMESPACE_USER_STRING; + + len = strlen(prefix) + sizeof(extattr_namespace_separator) + + strlen(ap->a_name) + 1; + + fdisp_init(&fdi, len + sizeof(*set_xattr_in) + uio->uio_resid); + fdisp_make_vp(&fdi, FUSE_SETXATTR, vp, td, cred); + + set_xattr_in = fdi.indata; + set_xattr_in->size = uio->uio_resid; + + attr_str = (char *)fdi.indata + sizeof(*set_xattr_in); + snprintf(attr_str, len, "%s%c%s", prefix, extattr_namespace_separator, + ap->a_name); + + err = uiomove((char *)fdi.indata + sizeof(*set_xattr_in) + len, + uio->uio_resid, uio); + if (err != 0) { + debug_printf("setxattr: got error %d from uiomove\n", err); + goto out; + } + + err = fdisp_wait_answ(&fdi); + + if (err != 0) { + if (err == ENOSYS) + fsess_set_notimpl(mp, FUSE_SETXATTR); + debug_printf("setxattr: got err=%d from daemon\n", err); + goto out; + } + +out: + fdisp_destroy(&fdi); + return (err); +} + +/* + * The Linux / FUSE extended attribute list is simply a collection of + * NUL-terminated strings. The FreeBSD extended attribute list is a single + * byte length followed by a non-NUL terminated string. So, this allows + * conversion of the Linux / FUSE format to the FreeBSD format in place. + * Linux attribute names are reported with the namespace as a prefix (e.g. + * "user.attribute_name"), but in FreeBSD they are reported without the + * namespace prefix (e.g. "attribute_name"). So, we're going from: + * + * user.attr_name1\0user.attr_name2\0 + * + * to: + * + * attr_name1attr_name2 + * + * Where "" is a single byte number of characters in the attribute name. + * + * Args: + * prefix - exattr namespace prefix string + * list, list_len - input list with namespace prefixes + * bsd_list, bsd_list_len - output list compatible with bsd vfs + */ +static int +fuse_xattrlist_convert(char *prefix, const char *list, int list_len, + char *bsd_list, int *bsd_list_len) +{ + int len, pos, dist_to_next, prefix_len; + + pos = 0; + *bsd_list_len = 0; + prefix_len = strlen(prefix); + + while (pos < list_len && list[pos] != '\0') { + dist_to_next = strlen(&list[pos]) + 1; + if (bcmp(&list[pos], prefix, prefix_len) == 0 && + list[pos + prefix_len] == extattr_namespace_separator) { + len = dist_to_next - + (prefix_len + sizeof(extattr_namespace_separator)) - 1; + if (len >= EXTATTR_MAXNAMELEN) + return (ENAMETOOLONG); + + bsd_list[*bsd_list_len] = len; + memcpy(&bsd_list[*bsd_list_len + 1], + &list[pos + prefix_len + + sizeof(extattr_namespace_separator)], len); + + *bsd_list_len += len + 1; + } + + pos += dist_to_next; + } + + return (0); +} + +/* + struct vop_listextattr_args { + struct vop_generic_args a_gen; + struct vnode *a_vp; + int a_attrnamespace; + struct uio *a_uio; + size_t *a_size; + struct ucred *a_cred; + struct thread *a_td; + }; +*/ +static int +fuse_vnop_listextattr(struct vop_listextattr_args *ap) +{ + struct vnode *vp = ap->a_vp; + struct uio *uio = ap->a_uio; + struct fuse_dispatcher fdi = {0}; + struct fuse_getxattr_in *get_xattr_in; + struct fuse_getxattr_out *get_xattr_out; + struct mount *mp = vnode_mount(vp); + size_t len; + char *prefix; + char *attr_str; + char *bsd_list = NULL; + int bsd_list_len; + struct thread *td = ap->a_td; + struct ucred *cred = ap->a_cred; + int err = 0; + + fuse_trace_printf_vnop(); + + if (fuse_isdeadfs(vp)) + return ENXIO; + + /* + * Add space for a NUL and the period separator if enabled. + * Default to looking for user attributes. + */ + if (ap->a_attrnamespace == EXTATTR_NAMESPACE_SYSTEM) + prefix = EXTATTR_NAMESPACE_SYSTEM_STRING; + else + prefix = EXTATTR_NAMESPACE_USER_STRING; + + len = strlen(prefix) + sizeof(extattr_namespace_separator) + 1; + + fdisp_init(&fdi, sizeof(*get_xattr_in) + len); + fdisp_make_vp(&fdi, FUSE_LISTXATTR, vp, td, cred); + + get_xattr_in = fdi.indata; + if (ap->a_size != NULL) + get_xattr_in->size = 0; + else + get_xattr_in->size = uio->uio_resid + sizeof(*get_xattr_out); + + + attr_str = (char *)fdi.indata + sizeof(*get_xattr_in); + snprintf(attr_str, len, "%s%c", prefix, extattr_namespace_separator); + + err = fdisp_wait_answ(&fdi); + if (err != 0) { + if (err == ENOSYS) + fsess_set_notimpl(mp, FUSE_LISTXATTR); + debug_printf("listextattr: got err=%d from daemon\n", err); + goto out; + } + + if ((fdi.answ == NULL) || (fdi.iosize == 0)) { + err = EINVAL; + goto out; + } + get_xattr_out = fdi.answ; + + if (ap->a_size != NULL) { + *ap->a_size = get_xattr_out->size; + } else if (fdi.iosize > 0) { + /* + * The Linux / FUSE attribute list format isn't the same + * as FreeBSD's format. So we need to transform it into + * FreeBSD's format before giving it to the user. + */ + bsd_list = malloc(fdi.iosize, M_TEMP, M_WAITOK); + err = fuse_xattrlist_convert(prefix, fdi.answ, fdi.iosize, + bsd_list, &bsd_list_len); + if (err != 0) + goto out; + + err = uiomove(bsd_list, bsd_list_len, uio); + } else { + debug_printf("listextattr: returned iosize %zu for %s attribute list is " + "too small\n", fdi.iosize, prefix); + err = EINVAL; + } + +out: + free(bsd_list, M_TEMP); + fdisp_destroy(&fdi); + return (err); +} + +/* + struct vop_deleteextattr_args { + struct vop_generic_args a_gen; + struct vnode *a_vp; + int a_attrnamespace; + const char *a_name; + struct ucred *a_cred; + struct thread *a_td; + }; +*/ +static int +fuse_vnop_deleteextattr(struct vop_deleteextattr_args *ap) +{ + struct vnode *vp = ap->a_vp; + struct fuse_dispatcher fdi = {0}; + struct mount *mp = vnode_mount(vp); + char *prefix; + size_t len; + char *attr_str; + struct thread *td = ap->a_td; + struct ucred *cred = ap->a_cred; + int err; + + fuse_trace_printf_vnop(); + + if (fuse_isdeadfs(vp)) + return ENXIO; + + /* Default to looking for user attributes. */ + if (ap->a_attrnamespace == EXTATTR_NAMESPACE_SYSTEM) + prefix = EXTATTR_NAMESPACE_SYSTEM_STRING; + else + prefix = EXTATTR_NAMESPACE_USER_STRING; + + len = strlen(prefix) + sizeof(extattr_namespace_separator) + + strlen(ap->a_name) + 1; + + fdisp_init(&fdi, len); + fdisp_make_vp(&fdi, FUSE_REMOVEXATTR, vp, td, cred); + + attr_str = fdi.indata; + snprintf(attr_str, len, "%s%c%s", prefix, extattr_namespace_separator, + ap->a_name); + + err = fdisp_wait_answ(&fdi); + if (err != 0) { + if (err == ENOSYS) + fsess_set_notimpl(mp, FUSE_REMOVEXATTR); + debug_printf("removexattr: got err=%d from daemon\n", err); + } + + fdisp_destroy(&fdi); + return (err); +} + /* struct vnop_print_args { struct vnode *a_vp; From 70da35b7455299b90d16beac0f07b10896601c63 Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Sat, 14 Oct 2017 23:25:44 +0000 Subject: [PATCH 077/219] mlx4: use enum constants instead of const vars for case exprs Follow up from r324201 to fix compilation with gcc, which complains about non-ICE case expressions. Reviewed by: hselasky Differential Revision: https://reviews.freebsd.org/D12675 --- sys/dev/mlx4/mlx4_en/mlx4_en_rx.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/sys/dev/mlx4/mlx4_en/mlx4_en_rx.c b/sys/dev/mlx4/mlx4_en/mlx4_en_rx.c index 162616803752..300478205920 100644 --- a/sys/dev/mlx4/mlx4_en/mlx4_en_rx.c +++ b/sys/dev/mlx4/mlx4_en/mlx4_en_rx.c @@ -558,26 +558,28 @@ mlx4_en_rx_mb(struct mlx4_en_priv *priv, struct mlx4_en_rx_ring *ring, static __inline int mlx4_en_rss_hash(__be16 status, int udp_rss) { - const __be16 status_all = cpu_to_be16( + enum { + status_all = cpu_to_be16( MLX4_CQE_STATUS_IPV4 | MLX4_CQE_STATUS_IPV4F | MLX4_CQE_STATUS_IPV6 | MLX4_CQE_STATUS_TCP | - MLX4_CQE_STATUS_UDP); - const __be16 status_ipv4_tcp = cpu_to_be16( + MLX4_CQE_STATUS_UDP), + status_ipv4_tcp = cpu_to_be16( MLX4_CQE_STATUS_IPV4 | - MLX4_CQE_STATUS_TCP); - const __be16 status_ipv6_tcp = cpu_to_be16( + MLX4_CQE_STATUS_TCP), + status_ipv6_tcp = cpu_to_be16( MLX4_CQE_STATUS_IPV6 | - MLX4_CQE_STATUS_TCP); - const __be16 status_ipv4_udp = cpu_to_be16( + MLX4_CQE_STATUS_TCP), + status_ipv4_udp = cpu_to_be16( MLX4_CQE_STATUS_IPV4 | - MLX4_CQE_STATUS_UDP); - const __be16 status_ipv6_udp = cpu_to_be16( + MLX4_CQE_STATUS_UDP), + status_ipv6_udp = cpu_to_be16( MLX4_CQE_STATUS_IPV6 | - MLX4_CQE_STATUS_UDP); - const __be16 status_ipv4 = cpu_to_be16(MLX4_CQE_STATUS_IPV4); - const __be16 status_ipv6 = cpu_to_be16(MLX4_CQE_STATUS_IPV6); + MLX4_CQE_STATUS_UDP), + status_ipv4 = cpu_to_be16(MLX4_CQE_STATUS_IPV4), + status_ipv6 = cpu_to_be16(MLX4_CQE_STATUS_IPV6) + }; status &= status_all; switch (status) { From 93ca7f45e7b9a63f9621cb78084f0baebe2cc0bd Mon Sep 17 00:00:00 2001 From: Cy Schubert Date: Sun, 15 Oct 2017 02:40:13 +0000 Subject: [PATCH 078/219] Sync (make same) the offsetof macro definition in include/ with the definition of the same in sys/sys/. The problem was discovered while working on implementing a new C11 gets_s() for libc. (The new gets_s() requires rsize_t found in include/stddef.h.) The solution to sync the two definitions was suggested by ed@ while discussing D12667. Suggested by: ed MFC after: 2 weeks --- include/stddef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/stddef.h b/include/stddef.h index 88fbb93040a9..4916e80756f5 100644 --- a/include/stddef.h +++ b/include/stddef.h @@ -70,7 +70,7 @@ typedef __max_align_t max_align_t; #endif #endif -#define offsetof(type, member) __offsetof(type, member) +#define offsetof(type, field) __offsetof(type, field) #if __EXT1_VISIBLE /* ISO/IEC 9899:2011 K.3.3.2 */ From a6aeb2b6e4b01717238fc2ea05053a3c5a99f620 Mon Sep 17 00:00:00 2001 From: Baptiste Daroussin Date: Sun, 15 Oct 2017 08:03:14 +0000 Subject: [PATCH 079/219] Fix ctld segfaulting when using ucl conf file format and having duplicated lun or target Submitted by: Nikita Kozlov MFC after: 3 days Sponsored by: blade Differential Revision: https://reviews.freebsd.org/D12646 --- usr.sbin/ctld/uclparse.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usr.sbin/ctld/uclparse.c b/usr.sbin/ctld/uclparse.c index 21872420b62d..73d5c0a93197 100644 --- a/usr.sbin/ctld/uclparse.c +++ b/usr.sbin/ctld/uclparse.c @@ -619,6 +619,8 @@ uclparse_target(const char *name, const ucl_object_t *top) const char *key; target = target_new(conf, name); + if (target == NULL) + return (1); while ((obj = ucl_iterate_object(top, &it, true))) { key = ucl_object_key(obj); @@ -807,6 +809,8 @@ uclparse_lun(const char *name, const ucl_object_t *top) const char *key; lun = lun_new(conf, name); + if (lun == NULL) + return (1); while ((obj = ucl_iterate_object(top, &it, true))) { key = ucl_object_key(obj); From d78b853f0ff789cf35e4ef35339e8b74bef3e3b3 Mon Sep 17 00:00:00 2001 From: Jilles Tjoelker Date: Sun, 15 Oct 2017 11:28:41 +0000 Subject: [PATCH 080/219] rc.subr: Remove test that is always true. The code above always sets _pidcmd to a non-empty value. --- etc/rc.subr | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/etc/rc.subr b/etc/rc.subr index 42b774a82a77..caafd88b3f0b 100644 --- a/etc/rc.subr +++ b/etc/rc.subr @@ -930,9 +930,7 @@ run_rc_command() else _pidcmd='rc_pid=$(check_process '"$_procname $command_interpreter"')' fi - if [ -n "$_pidcmd" ]; then - _keywords="${_keywords} status poll" - fi + _keywords="${_keywords} status poll" fi if [ -z "$rc_arg" ]; then From 4ffeccf1e84e539920b81b2567a8d1df54c2c886 Mon Sep 17 00:00:00 2001 From: Edward Tomasz Napierala Date: Sun, 15 Oct 2017 11:46:11 +0000 Subject: [PATCH 081/219] Replace some magic numbers in usb_template(4) code with #defines. There should be no functional changes. Reviewed by: hselasky MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12670 --- sys/dev/usb/template/usb_template_audio.c | 20 ++++++++--------- sys/dev/usb/template/usb_template_kbd.c | 6 ++--- sys/dev/usb/template/usb_template_midi.c | 8 +++---- sys/dev/usb/template/usb_template_modem.c | 12 +++++----- sys/dev/usb/template/usb_template_mouse.c | 6 ++--- sys/dev/usb/template/usb_template_phone.c | 22 +++++++++---------- sys/dev/usb/template/usb_template_serialnet.c | 14 ++++++------ 7 files changed, 44 insertions(+), 44 deletions(-) diff --git a/sys/dev/usb/template/usb_template_audio.c b/sys/dev/usb/template/usb_template_audio.c index 7c7cebe33367..ccf50937e317 100644 --- a/sys/dev/usb/template/usb_template_audio.c +++ b/sys/dev/usb/template/usb_template_audio.c @@ -199,8 +199,8 @@ static const void *audio_raw_iface_0_desc[] = { static const struct usb_temp_interface_desc audio_iface_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = audio_raw_iface_0_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 1, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOCONTROL, .bInterfaceProtocol = 0, .iInterface = INDEX_AUDIO_MIXER, }; @@ -257,8 +257,8 @@ static const struct usb_temp_endpoint_desc *audio_iface_1_ep[] = { static const struct usb_temp_interface_desc audio_iface_1_alt_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = NULL, /* no raw descriptors */ - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_AUDIO_PLAYBACK, }; @@ -266,8 +266,8 @@ static const struct usb_temp_interface_desc audio_iface_1_alt_0 = { static const struct usb_temp_interface_desc audio_iface_1_alt_1 = { .ppEndpoints = audio_iface_1_ep, .ppRawDesc = audio_raw_iface_1_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_AUDIO_PLAYBACK, .isAltInterface = 1, /* this is an alternate setting */ @@ -315,8 +315,8 @@ static const struct usb_temp_endpoint_desc *audio_iface_2_ep[] = { static const struct usb_temp_interface_desc audio_iface_2_alt_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = NULL, /* no raw descriptors */ - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_AUDIO_RECORD, }; @@ -324,8 +324,8 @@ static const struct usb_temp_interface_desc audio_iface_2_alt_0 = { static const struct usb_temp_interface_desc audio_iface_2_alt_1 = { .ppEndpoints = audio_iface_2_ep, .ppRawDesc = audio_raw_iface_2_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_AUDIO_RECORD, .isAltInterface = 1, /* this is an alternate setting */ diff --git a/sys/dev/usb/template/usb_template_kbd.c b/sys/dev/usb/template/usb_template_kbd.c index 306b2fee155c..25d4d17d9fa0 100644 --- a/sys/dev/usb/template/usb_template_kbd.c +++ b/sys/dev/usb/template/usb_template_kbd.c @@ -130,9 +130,9 @@ static const void *keyboard_iface_0_desc[] = { static const struct usb_temp_interface_desc keyboard_iface_0 = { .ppRawDesc = keyboard_iface_0_desc, .ppEndpoints = keyboard_endpoints, - .bInterfaceClass = 3, - .bInterfaceSubClass = 1, - .bInterfaceProtocol = 1, + .bInterfaceClass = UICLASS_HID, + .bInterfaceSubClass = UISUBCLASS_BOOT, + .bInterfaceProtocol = UIPROTO_BOOT_KEYBOARD, .iInterface = INDEX_KEYBOARD, }; diff --git a/sys/dev/usb/template/usb_template_midi.c b/sys/dev/usb/template/usb_template_midi.c index 9be1b9e5a18c..923137e63ef3 100644 --- a/sys/dev/usb/template/usb_template_midi.c +++ b/sys/dev/usb/template/usb_template_midi.c @@ -89,8 +89,8 @@ static const void *midi_descs_0[] = { static const struct usb_temp_interface_desc midi_iface_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = midi_descs_0, - .bInterfaceClass = 1, - .bInterfaceSubClass = 1, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOCONTROL, .bInterfaceProtocol = 0, .iInterface = INDEX_MIDI_IF, }; @@ -171,8 +171,8 @@ static const void *midi_descs_1[] = { static const struct usb_temp_interface_desc midi_iface_1 = { .ppRawDesc = midi_descs_1, .ppEndpoints = midi_iface_1_ep, - .bInterfaceClass = 0x01, /* MIDI */ - .bInterfaceSubClass = 3, /* MIDI streaming */ + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_MIDISTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_MIDI_IF, }; diff --git a/sys/dev/usb/template/usb_template_modem.c b/sys/dev/usb/template/usb_template_modem.c index 6a976f7cbf17..cf520eff3a1b 100644 --- a/sys/dev/usb/template/usb_template_modem.c +++ b/sys/dev/usb/template/usb_template_modem.c @@ -156,17 +156,17 @@ static const void *modem_iface_0_desc[] = { static const struct usb_temp_interface_desc modem_iface_0 = { .ppRawDesc = modem_iface_0_desc, .ppEndpoints = modem_iface_0_ep, - .bInterfaceClass = 2, - .bInterfaceSubClass = 2, - .bInterfaceProtocol = 1, + .bInterfaceClass = UICLASS_CDC, + .bInterfaceSubClass = UISUBCLASS_ABSTRACT_CONTROL_MODEL, + .bInterfaceProtocol = UIPROTO_CDC_AT, .iInterface = INDEX_MODEM, }; static const struct usb_temp_interface_desc modem_iface_1 = { .ppEndpoints = modem_iface_1_ep, - .bInterfaceClass = 10, - .bInterfaceSubClass = 0, - .bInterfaceProtocol = 0, + .bInterfaceClass = UICLASS_CDC_DATA, + .bInterfaceSubClass = UISUBCLASS_DATA, + .bInterfaceProtocol = UIPROTO_CDC_NONE, .iInterface = INDEX_MODEM, }; diff --git a/sys/dev/usb/template/usb_template_mouse.c b/sys/dev/usb/template/usb_template_mouse.c index a48ccf4d61d6..215cede76005 100644 --- a/sys/dev/usb/template/usb_template_mouse.c +++ b/sys/dev/usb/template/usb_template_mouse.c @@ -128,9 +128,9 @@ static const void *mouse_iface_0_desc[] = { static const struct usb_temp_interface_desc mouse_iface_0 = { .ppRawDesc = mouse_iface_0_desc, .ppEndpoints = mouse_endpoints, - .bInterfaceClass = 3, - .bInterfaceSubClass = 1, - .bInterfaceProtocol = 2, + .bInterfaceClass = UICLASS_HID, + .bInterfaceSubClass = UISUBCLASS_BOOT, + .bInterfaceProtocol = UIPROTO_MOUSE, .iInterface = INDEX_MOUSE, }; diff --git a/sys/dev/usb/template/usb_template_phone.c b/sys/dev/usb/template/usb_template_phone.c index c58103e9b444..149c7fa517fb 100644 --- a/sys/dev/usb/template/usb_template_phone.c +++ b/sys/dev/usb/template/usb_template_phone.c @@ -156,8 +156,8 @@ static const void *phone_raw_iface_0_desc[] = { static const struct usb_temp_interface_desc phone_iface_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = phone_raw_iface_0_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 1, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOCONTROL, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_MIXER, }; @@ -213,8 +213,8 @@ static const struct usb_temp_endpoint_desc *phone_iface_1_ep[] = { static const struct usb_temp_interface_desc phone_iface_1_alt_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = NULL, /* no raw descriptors */ - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_PLAYBACK, }; @@ -222,8 +222,8 @@ static const struct usb_temp_interface_desc phone_iface_1_alt_0 = { static const struct usb_temp_interface_desc phone_iface_1_alt_1 = { .ppEndpoints = phone_iface_1_ep, .ppRawDesc = phone_raw_iface_1_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_PLAYBACK, .isAltInterface = 1, /* this is an alternate setting */ @@ -270,8 +270,8 @@ static const struct usb_temp_endpoint_desc *phone_iface_2_ep[] = { static const struct usb_temp_interface_desc phone_iface_2_alt_0 = { .ppEndpoints = NULL, /* no endpoints */ .ppRawDesc = NULL, /* no raw descriptors */ - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_RECORD, }; @@ -279,8 +279,8 @@ static const struct usb_temp_interface_desc phone_iface_2_alt_0 = { static const struct usb_temp_interface_desc phone_iface_2_alt_1 = { .ppEndpoints = phone_iface_2_ep, .ppRawDesc = phone_raw_iface_2_desc, - .bInterfaceClass = 1, - .bInterfaceSubClass = 2, + .bInterfaceClass = UICLASS_AUDIO, + .bInterfaceSubClass = UISUBCLASS_AUDIOSTREAM, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_RECORD, .isAltInterface = 1, /* this is an alternate setting */ @@ -321,7 +321,7 @@ static const struct usb_temp_endpoint_desc *phone_iface_3_ep[] = { static const struct usb_temp_interface_desc phone_iface_3 = { .ppEndpoints = phone_iface_3_ep, .ppRawDesc = phone_hid_desc_0, - .bInterfaceClass = 3, + .bInterfaceClass = UICLASS_HID, .bInterfaceSubClass = 0, .bInterfaceProtocol = 0, .iInterface = INDEX_PHONE_HID, diff --git a/sys/dev/usb/template/usb_template_serialnet.c b/sys/dev/usb/template/usb_template_serialnet.c index beb5e9c4986e..7763fe7574ce 100644 --- a/sys/dev/usb/template/usb_template_serialnet.c +++ b/sys/dev/usb/template/usb_template_serialnet.c @@ -202,7 +202,7 @@ static const struct usb_temp_interface_desc eth_control_interface = { .ppRawDesc = eth_control_if_desc, .bInterfaceClass = UICLASS_CDC, .bInterfaceSubClass = UISUBCLASS_ETHERNET_NETWORKING_CONTROL_MODEL, - .bInterfaceProtocol = 0, + .bInterfaceProtocol = UIPROTO_CDC_NONE, .iInterface = STRING_ETH_CONTROL_INDEX, }; @@ -215,7 +215,7 @@ static const struct usb_temp_endpoint_desc *eth_data_endpoints[] = { static const struct usb_temp_interface_desc eth_data_null_interface = { .ppEndpoints = NULL, /* no endpoints */ .bInterfaceClass = UICLASS_CDC_DATA, - .bInterfaceSubClass = 0, + .bInterfaceSubClass = UISUBCLASS_DATA, .bInterfaceProtocol = 0, .iInterface = STRING_ETH_DATA_INDEX, }; @@ -304,16 +304,16 @@ static const void *modem_iface_0_desc[] = { static const struct usb_temp_interface_desc modem_iface_0 = { .ppRawDesc = modem_iface_0_desc, .ppEndpoints = modem_iface_0_ep, - .bInterfaceClass = 2, - .bInterfaceSubClass = 2, - .bInterfaceProtocol = 1, + .bInterfaceClass = UICLASS_CDC, + .bInterfaceSubClass = UISUBCLASS_ABSTRACT_CONTROL_MODEL, + .bInterfaceProtocol = UIPROTO_CDC_AT, .iInterface = STRING_MODEM_INDEX, }; static const struct usb_temp_interface_desc modem_iface_1 = { .ppEndpoints = modem_iface_1_ep, - .bInterfaceClass = 10, - .bInterfaceSubClass = 0, + .bInterfaceClass = UICLASS_CDC_DATA, + .bInterfaceSubClass = UISUBCLASS_DATA, .bInterfaceProtocol = 0, .iInterface = STRING_MODEM_INDEX, }; From f3792e07f663c24047fa48e209633abf833908d1 Mon Sep 17 00:00:00 2001 From: Tijl Coosemans Date: Sun, 15 Oct 2017 16:03:45 +0000 Subject: [PATCH 082/219] Use sizeof instead of strlen on string constants. The compiler doesn't optimise the strlen calls away with -ffreestanding. --- sys/compat/linux/linux_util.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/sys/compat/linux/linux_util.c b/sys/compat/linux/linux_util.c index 61be7b9ab87e..e829ab12343e 100644 --- a/sys/compat/linux/linux_util.c +++ b/sys/compat/linux/linux_util.c @@ -128,33 +128,32 @@ linux_driver_get_major_minor(const char *node, int *major, int *minor) { struct device_element *de; unsigned long devno; + size_t sz; if (node == NULL || major == NULL || minor == NULL) return 1; - if (strlen(node) > strlen("pts/") && - strncmp(node, "pts/", strlen("pts/")) == 0) { + sz = sizeof("pts/") - 1; + if (strncmp(node, "pts/", sz) == 0 && node[sz] != '\0') { /* * Linux checks major and minors of the slave device * to make sure it's a pty device, so let's make him * believe it is. */ - devno = strtoul(node + strlen("pts/"), NULL, 10); + devno = strtoul(node + sz, NULL, 10); *major = 136 + (devno / 256); *minor = devno % 256; - return (0); } - if ((strlen(node) > strlen("drm/") && - strncmp(node, "drm/", strlen("drm/")) == 0) ) { - devno = strtoul(node + strlen("drm/"), NULL, 10); + sz = sizeof("drm/") - 1; + if (strncmp(node, "drm/", sz) == 0 && node[sz] != '\0') { + devno = strtoul(node + sz, NULL, 10); *major = 226 + (devno / 256); *minor = devno % 256; return (0); } - TAILQ_FOREACH(de, &devices, list) { if (strcmp(node, de->entry.bsd_device_name) == 0) { *major = de->entry.linux_major; From 834804f3fe0f9b0492ab67f8b4af064f6c5148ab Mon Sep 17 00:00:00 2001 From: Tijl Coosemans Date: Sun, 15 Oct 2017 16:08:22 +0000 Subject: [PATCH 083/219] Add special handling for current in-tree drm devices, like r323692 added for drm-next. --- sys/compat/linux/linux_util.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/sys/compat/linux/linux_util.c b/sys/compat/linux/linux_util.c index e829ab12343e..2c3c259f297f 100644 --- a/sys/compat/linux/linux_util.c +++ b/sys/compat/linux/linux_util.c @@ -146,6 +146,27 @@ linux_driver_get_major_minor(const char *node, int *major, int *minor) return (0); } + sz = sizeof("dri/card") - 1; + if (strncmp(node, "dri/card", sz) == 0 && node[sz] != '\0') { + devno = strtoul(node + sz, NULL, 10); + *major = 226 + (devno / 256); + *minor = devno % 256; + return (0); + } + sz = sizeof("dri/controlD") - 1; + if (strncmp(node, "dri/controlD", sz) == 0 && node[sz] != '\0') { + devno = strtoul(node + sz, NULL, 10); + *major = 226 + (devno / 256); + *minor = devno % 256; + return (0); + } + sz = sizeof("dri/renderD") - 1; + if (strncmp(node, "dri/renderD", sz) == 0 && node[sz] != '\0') { + devno = strtoul(node + sz, NULL, 10); + *major = 226 + (devno / 256); + *minor = devno % 256; + return (0); + } sz = sizeof("drm/") - 1; if (strncmp(node, "drm/", sz) == 0 && node[sz] != '\0') { devno = strtoul(node + sz, NULL, 10); From 717bff5d854109e3de78da190148deb9ab06e873 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 16:17:55 +0000 Subject: [PATCH 084/219] Update comment to reflect actual default timeout. Sponsored by: Netflix --- sys/cam/nvme/nvme_da.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/cam/nvme/nvme_da.c b/sys/cam/nvme/nvme_da.c index 8e4de784c3a1..bb55842d5a80 100644 --- a/sys/cam/nvme/nvme_da.c +++ b/sys/cam/nvme/nvme_da.c @@ -189,7 +189,7 @@ nda_nvme_flush(struct nda_softc *softc, struct ccb_nvmeio *nvmeio) CAM_DIR_NONE, /* flags */ NULL, /* data_ptr */ 0, /* dxfer_len */ - nda_default_timeout * 1000); /* timeout 5s */ + nda_default_timeout * 1000); /* timeout 30s */ nvme_ns_flush_cmd(&nvmeio->cmd, softc->nsid); } @@ -203,7 +203,7 @@ nda_nvme_trim(struct nda_softc *softc, struct ccb_nvmeio *nvmeio, CAM_DIR_OUT, /* flags */ payload, /* data_ptr */ num_ranges * sizeof(struct nvme_dsm_range), /* dxfer_len */ - nda_default_timeout * 1000); /* timeout 5s */ + nda_default_timeout * 1000); /* timeout 30s */ nvme_ns_trim_cmd(&nvmeio->cmd, softc->nsid, num_ranges); } @@ -217,7 +217,7 @@ nda_nvme_write(struct nda_softc *softc, struct ccb_nvmeio *nvmeio, CAM_DIR_OUT, /* flags */ payload, /* data_ptr */ len, /* dxfer_len */ - nda_default_timeout * 1000); /* timeout 5s */ + nda_default_timeout * 1000); /* timeout 30s */ nvme_ns_write_cmd(&nvmeio->cmd, softc->nsid, lba, count); } @@ -246,7 +246,7 @@ nda_nvme_rw_bio(struct nda_softc *softc, struct ccb_nvmeio *nvmeio, flags, /* flags */ payload, /* data_ptr */ bp->bio_bcount, /* dxfer_len */ - nda_default_timeout * 1000); /* timeout 5s */ + nda_default_timeout * 1000); /* timeout 30s */ nvme_ns_rw_cmd(&nvmeio->cmd, rwcmd, softc->nsid, lba, count); } From fbed8df25939bfe8a8db444db8f9d3d68f664fcb Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 16:17:59 +0000 Subject: [PATCH 085/219] Explicitly set reserved fields and 'fuse' to 0. This prevents us from acidentally sending bogus values in these fields, which some drives may reject with an error or worse (undefined behavior). This is especially needed for the ndadump routine which allocates the cmd from stack garbage.... Sponsored by: Netflix --- sys/dev/nvme/nvme.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/dev/nvme/nvme.h b/sys/dev/nvme/nvme.h index d4fc131ef643..3e6a4241c2a4 100644 --- a/sys/dev/nvme/nvme.h +++ b/sys/dev/nvme/nvme.h @@ -1082,7 +1082,11 @@ void nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint32_t nsid, uint64_t lba, uint32_t count) { cmd->opc = rwcmd; + cmd->fuse = 0; + cmd->rsvd1 = 0; cmd->nsid = nsid; + cmd->rsvd2 = 0; + cmd->rsvd3 = 0; cmd->cdw10 = lba & 0xffffffffu; cmd->cdw11 = lba >> 32; cmd->cdw12 = count-1; From c4231018d054dfa05962ca5493be2fcb349c1f9c Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 16:18:03 +0000 Subject: [PATCH 086/219] Be nicer on the dump stack by allocating only a ccb_nvmeio rather than a full ccb. This saves a few hundre bytes, which might be important during a crash dump... Sponsored by: Netflix Suggested by: scottl@ --- sys/cam/nvme/nvme_da.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/sys/cam/nvme/nvme_da.c b/sys/cam/nvme/nvme_da.c index bb55842d5a80..807cf3e0ea15 100644 --- a/sys/cam/nvme/nvme_da.c +++ b/sys/cam/nvme/nvme_da.c @@ -379,7 +379,7 @@ ndadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t len struct cam_periph *periph; struct nda_softc *softc; u_int secsize; - union ccb ccb; + struct ccb_nvmeio nvmeio; struct disk *dp; uint64_t lba; uint32_t count; @@ -399,15 +399,15 @@ ndadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t len } if (length > 0) { - xpt_setup_ccb(&ccb.ccb_h, periph->path, CAM_PRIORITY_NORMAL); - ccb.ccb_h.ccb_state = NDA_CCB_DUMP; - nda_nvme_write(softc, &ccb.nvmeio, virtual, lba, length, count); - xpt_polled_action(&ccb); + xpt_setup_ccb(&nvmeio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); + nvmeio.ccb_h.ccb_state = NDA_CCB_DUMP; + nda_nvme_write(softc, &nvmeio, virtual, lba, length, count); + xpt_polled_action((union ccb *)&nvmeio); - error = cam_periph_error(&ccb, + error = cam_periph_error((union ccb *)&nvmeio, 0, SF_NO_RECOVERY | SF_NO_RETRY, NULL); - if ((ccb.ccb_h.status & CAM_DEV_QFRZN) != 0) - cam_release_devq(ccb.ccb_h.path, /*relsim_flags*/0, + if ((nvmeio.ccb_h.status & CAM_DEV_QFRZN) != 0) + cam_release_devq(nvmeio.ccb_h.path, /*relsim_flags*/0, /*reduction*/0, /*timeout*/0, /*getcount_only*/0); if (error != 0) printf("Aborting dump due to I/O error.\n"); @@ -417,16 +417,16 @@ ndadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t len } /* Flush */ - xpt_setup_ccb(&ccb.ccb_h, periph->path, CAM_PRIORITY_NORMAL); + xpt_setup_ccb(&nvmeio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); - ccb.ccb_h.ccb_state = NDA_CCB_DUMP; - nda_nvme_flush(softc, &ccb.nvmeio); - xpt_polled_action(&ccb); + nvmeio.ccb_h.ccb_state = NDA_CCB_DUMP; + nda_nvme_flush(softc, &nvmeio); + xpt_polled_action((union ccb *)&nvmeio); - error = cam_periph_error(&ccb, + error = cam_periph_error((union ccb *)&nvmeio, 0, SF_NO_RECOVERY | SF_NO_RETRY, NULL); - if ((ccb.ccb_h.status & CAM_DEV_QFRZN) != 0) - cam_release_devq(ccb.ccb_h.path, /*relsim_flags*/0, + if ((nvmeio.ccb_h.status & CAM_DEV_QFRZN) != 0) + cam_release_devq(nvmeio.ccb_h.path, /*relsim_flags*/0, /*reduction*/0, /*timeout*/0, /*getcount_only*/0); if (error != 0) xpt_print(periph->path, "flush cmd failed\n"); From bb1c7be429bc0c16d7b1c826dc473c50d948c356 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 16:18:08 +0000 Subject: [PATCH 087/219] Create general polling function for the nvme controller. Use it when we're doing the various pin-based interrupt modes. Adjust nvme_ctrlr_intx_handler to use nvme_ctrlr_poll. Sponsored by: Netflix Suggested by: scottl@ --- sys/dev/nvme/nvme_ctrlr.c | 27 +++++++++++++++++++++------ sys/dev/nvme/nvme_private.h | 1 + 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/sys/dev/nvme/nvme_ctrlr.c b/sys/dev/nvme/nvme_ctrlr.c index 23aebb7bc063..b036eb64bf9f 100644 --- a/sys/dev/nvme/nvme_ctrlr.c +++ b/sys/dev/nvme/nvme_ctrlr.c @@ -815,18 +815,33 @@ nvme_ctrlr_reset_task(void *arg, int pending) atomic_cmpset_32(&ctrlr->is_resetting, 1, 0); } +/* + * Poll all the queues enabled on the device for completion. + */ +void +nvme_ctrlr_poll(struct nvme_controller *ctrlr) +{ + int i; + + nvme_qpair_process_completions(&ctrlr->adminq); + + for (i = 0; i < ctrlr->num_io_queues; i++) + if (ctrlr->ioq && ctrlr->ioq[i].cpl) + nvme_qpair_process_completions(&ctrlr->ioq[i]); +} + +/* + * Poll the single-vector intertrupt case: num_io_queues will be 1 and + * there's only a single vector. While we're polling, we mask further + * interrupts in the controller. + */ void nvme_ctrlr_intx_handler(void *arg) { struct nvme_controller *ctrlr = arg; nvme_mmio_write_4(ctrlr, intms, 1); - - nvme_qpair_process_completions(&ctrlr->adminq); - - if (ctrlr->ioq && ctrlr->ioq[0].cpl) - nvme_qpair_process_completions(&ctrlr->ioq[0]); - + nvme_ctrlr_poll(ctrlr); nvme_mmio_write_4(ctrlr, intmc, 1); } diff --git a/sys/dev/nvme/nvme_private.h b/sys/dev/nvme/nvme_private.h index d37af2932252..6f3df62155f7 100644 --- a/sys/dev/nvme/nvme_private.h +++ b/sys/dev/nvme/nvme_private.h @@ -542,5 +542,6 @@ void nvme_notify_fail_consumers(struct nvme_controller *ctrlr); void nvme_notify_new_controller(struct nvme_controller *ctrlr); void nvme_ctrlr_intx_handler(void *arg); +void nvme_ctrlr_poll(struct nvme_controller *ctrlr); #endif /* __NVME_PRIVATE_H__ */ From 29431e54b92f7702b6cffb3e91a0f54fde3d1982 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 16:19:09 +0000 Subject: [PATCH 088/219] Use nvme_ctrlr_poll instead of nvme_ctrlr_intx_handler since it is more general and doesn't try to access registers that may be undefined when the card is in MSIX mode. This change, along with r324630, r324631, r324632, makes nda crash dumps work again. Previously, they only worked on CPU 0 when the stack garbage was just so. Sponsored by: Netflix Suggested by: scottl@ (who provided earlier version of the patch) --- sys/dev/nvme/nvme_sim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/nvme/nvme_sim.c b/sys/dev/nvme/nvme_sim.c index 1170bdd4354c..94169055919c 100644 --- a/sys/dev/nvme/nvme_sim.c +++ b/sys/dev/nvme/nvme_sim.c @@ -246,7 +246,7 @@ static void nvme_sim_poll(struct cam_sim *sim) { - nvme_ctrlr_intx_handler(sim2ctrlr(sim)); + nvme_ctrlr_poll(sim2ctrlr(sim)); } static void * From 11ce4d9f3972570ad9ff926b8c17326f81044d0e Mon Sep 17 00:00:00 2001 From: Tijl Coosemans Date: Sun, 15 Oct 2017 18:53:21 +0000 Subject: [PATCH 089/219] When a Linux program tries to access a /path the kernel tries /compat/linux/path before /path. Stop following symbolic links when looking up /compat/linux/path so dead symbolic links aren't ignored. This allows syscalls like readlink(2) and lstat(2) to work on such links. And open(2) will return an error now instead of trying /path. --- sys/kern/vfs_lookup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/kern/vfs_lookup.c b/sys/kern/vfs_lookup.c index 4ee90e40d1c8..09503e4ca477 100644 --- a/sys/kern/vfs_lookup.c +++ b/sys/kern/vfs_lookup.c @@ -1390,13 +1390,13 @@ kern_alternate_path(struct thread *td, const char *prefix, const char *path, for (cp = &ptr[len] - 1; *cp != '/'; cp--); *cp = '\0'; - NDINIT(&nd, LOOKUP, FOLLOW, UIO_SYSSPACE, buf, td); + NDINIT(&nd, LOOKUP, NOFOLLOW, UIO_SYSSPACE, buf, td); error = namei(&nd); *cp = '/'; if (error != 0) goto keeporig; } else { - NDINIT(&nd, LOOKUP, FOLLOW, UIO_SYSSPACE, buf, td); + NDINIT(&nd, LOOKUP, NOFOLLOW, UIO_SYSSPACE, buf, td); error = namei(&nd); if (error != 0) From df4c97527531abff4154a60739bea11b8e9cf0e8 Mon Sep 17 00:00:00 2001 From: Tijl Coosemans Date: Sun, 15 Oct 2017 19:21:15 +0000 Subject: [PATCH 090/219] Set DEVNAME to dri/card%d. This works with both in-tree drm and drm-next and is also the value used on Linux. Tested by: Greg V --- sys/compat/linsysfs/linsysfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/compat/linsysfs/linsysfs.c b/sys/compat/linsysfs/linsysfs.c index 45b69f6f6c0a..145d009e94a3 100644 --- a/sys/compat/linsysfs/linsysfs.c +++ b/sys/compat/linsysfs/linsysfs.c @@ -205,8 +205,8 @@ linsysfs_fill_uevent_drm(PFS_FILL_ARGS) dev = (device_t)pn->pn_data; unit = device_get_unit(dev); sbuf_printf(sb, - "MAJOR=226\nMINOR=%d\nDEVNAME=drm/%d\nDEVTYPE=dri_minor\n", unit, - unit); + "MAJOR=226\nMINOR=%d\nDEVNAME=dri/card%d\nDEVTYPE=dri_minor\n", + unit, unit); return (0); } From 03cea61b3ae88f3c8b95a788b6d94ad4a858d4b5 Mon Sep 17 00:00:00 2001 From: Tijl Coosemans Date: Sun, 15 Oct 2017 19:28:14 +0000 Subject: [PATCH 091/219] Add information needed by Linux libdrm 2.4.74 (shipped with CentOS 7.4). Create a config file for PCI devices that exposes their configuration space. Only fields needed by libdrm are filled in (vendor, device, revision, subvendor and subdevice). Link /sys/class/drm/card%d/device to the PCI device directory. --- sys/compat/linsysfs/linsysfs.c | 84 +++++++++++++++++++++++++--------- 1 file changed, 62 insertions(+), 22 deletions(-) diff --git a/sys/compat/linsysfs/linsysfs.c b/sys/compat/linsysfs/linsysfs.c index 145d009e94a3..6df23d07ad92 100644 --- a/sys/compat/linsysfs/linsysfs.c +++ b/sys/compat/linsysfs/linsysfs.c @@ -175,6 +175,33 @@ linsysfs_fill_revid(PFS_FILL_ARGS) return (0); } +static int +linsysfs_fill_config(PFS_FILL_ARGS) +{ + uint8_t config[48]; + device_t dev; + uint32_t reg; + + dev = (device_t)pn->pn_data; + bzero(config, sizeof(config)); + reg = pci_get_vendor(dev); + config[0] = reg; + config[1] = reg >> 8; + reg = pci_get_device(dev); + config[2] = reg; + config[3] = reg >> 8; + reg = pci_get_revid(dev); + config[8] = reg; + reg = pci_get_subvendor(dev); + config[44] = reg; + config[45] = reg >> 8; + reg = pci_get_subdevice(dev); + config[46] = reg; + config[47] = reg >> 8; + sbuf_bcat(sb, config, sizeof(config)); + return (0); +} + /* * Filler function for PCI uevent file */ @@ -247,20 +274,20 @@ linsysfs_fill_vgapci(PFS_FILL_ARGS) #define PCI_DEV "pci" #define DRMN_DEV "drmn" static int -linsysfs_run_bus(device_t dev, struct pfs_node *dir, struct pfs_node *scsi, struct pfs_node *chardev, - char *path, char *prefix) +linsysfs_run_bus(device_t dev, struct pfs_node *dir, struct pfs_node *scsi, + struct pfs_node *chardev, struct pfs_node *drm, char *path, char *prefix) { struct scsi_host_queue *scsi_host; - struct pfs_node *sub_dir, *cur_file, *cur_chardev; + struct pfs_node *sub_dir, *cur_file; int i, nchildren, error; device_t *children, parent; devclass_t devclass; const char *name = NULL; struct pci_devinfo *dinfo; - char *device, *host, *new_path, *chardevname; + char *device, *host, *new_path, *devname; new_path = path; - chardevname = malloc(16, M_TEMP, M_WAITOK); + devname = malloc(16, M_TEMP, M_WAITOK); parent = device_get_parent(dev); if (parent) { @@ -308,6 +335,10 @@ linsysfs_run_bus(device_t dev, struct pfs_node *dir, struct pfs_node *scsi, stru &linsysfs_fill_revid, NULL, NULL, NULL, PFS_RD); cur_file->pn_data = (void*)dev; + cur_file = pfs_create_file(dir, "config", + &linsysfs_fill_config, NULL, NULL, NULL, + PFS_RD); + cur_file->pn_data = (void*)dev; cur_file = pfs_create_file(dir, "uevent", &linsysfs_fill_uevent_pci, NULL, NULL, NULL, PFS_RD); @@ -362,18 +393,26 @@ linsysfs_run_bus(device_t dev, struct pfs_node *dir, struct pfs_node *scsi, stru device_get_unit(dev) >= 0) { dinfo = device_get_ivars(parent); if (dinfo != NULL && dinfo->cfg.baseclass == PCIC_DISPLAY) { - sprintf(chardevname, "226:%d", + sprintf(devname, "226:%d", device_get_unit(dev)); - cur_chardev = pfs_create_dir(chardev, - chardevname, NULL, NULL, NULL, 0); - cur_file = pfs_create_link(cur_chardev, + sub_dir = pfs_create_dir(chardev, + devname, NULL, NULL, NULL, 0); + cur_file = pfs_create_link(sub_dir, "device", &linsysfs_fill_vgapci, NULL, NULL, NULL, PFS_RD); cur_file->pn_data = (void*)dir; - cur_file = pfs_create_file(cur_chardev, + cur_file = pfs_create_file(sub_dir, "uevent", &linsysfs_fill_uevent_drm, NULL, NULL, NULL, PFS_RD); cur_file->pn_data = (void*)dev; + sprintf(devname, "card%d", + device_get_unit(dev)); + sub_dir = pfs_create_dir(drm, + devname, NULL, NULL, NULL, 0); + cur_file = pfs_create_link(sub_dir, + "device", &linsysfs_fill_vgapci, NULL, + NULL, NULL, PFS_RD); + cur_file->pn_data = (void*)dir; } } } @@ -383,12 +422,12 @@ linsysfs_run_bus(device_t dev, struct pfs_node *dir, struct pfs_node *scsi, stru for (i = 0; i < nchildren; i++) if (children[i]) linsysfs_run_bus(children[i], dir, scsi, - chardev, new_path, prefix); + chardev, drm, new_path, prefix); free(children, M_TEMP); } if (new_path != path) free(new_path, M_TEMP); - free(chardevname, M_TEMP); + free(devname, M_TEMP); return (1); } @@ -449,7 +488,9 @@ static int linsysfs_init(PFS_INIT_ARGS) { struct pfs_node *root; + struct pfs_node *class; struct pfs_node *dir, *sys, *cpu; + struct pfs_node *drm; struct pfs_node *pci; struct pfs_node *scsi; struct pfs_node *devdir, *chardev; @@ -461,26 +502,25 @@ linsysfs_init(PFS_INIT_ARGS) root = pi->pi_root; /* /sys/class/... */ - scsi = pfs_create_dir(root, "class", NULL, NULL, NULL, 0); - scsi = pfs_create_dir(scsi, "scsi_host", NULL, NULL, NULL, 0); + class = pfs_create_dir(root, "class", NULL, NULL, NULL, 0); + scsi = pfs_create_dir(class, "scsi_host", NULL, NULL, NULL, 0); + drm = pfs_create_dir(class, "drm", NULL, NULL, NULL, 0); - /* /sys/devices */ - dir = pfs_create_dir(root, "devices", NULL, NULL, NULL, 0); - - /* /sys/devices/pci0000:00 */ - pci = pfs_create_dir(dir, "pci0000:00", NULL, NULL, NULL, 0); - - /* /sys/dev/char */ + /* /sys/dev/... */ devdir = pfs_create_dir(root, "dev", NULL, NULL, NULL, 0); chardev = pfs_create_dir(devdir, "char", NULL, NULL, NULL, 0); + /* /sys/devices/... */ + dir = pfs_create_dir(root, "devices", NULL, NULL, NULL, 0); + pci = pfs_create_dir(dir, "pci0000:00", NULL, NULL, NULL, 0); + devclass = devclass_find("root"); if (devclass == NULL) { return (0); } dev = devclass_get_device(devclass, 0); - linsysfs_run_bus(dev, pci, scsi, chardev, "/pci0000:00", "0000"); + linsysfs_run_bus(dev, pci, scsi, chardev, drm, "/pci0000:00", "0000"); /* /sys/devices/system */ sys = pfs_create_dir(dir, "system", NULL, NULL, NULL, 0); From 80a2d1406f3ce612524aec4b2a0c193256f2e515 Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Sun, 15 Oct 2017 19:33:30 +0000 Subject: [PATCH 092/219] Fix the handling of parital and too short chunks. Ensure that the current behaviour is consistent: stop processing of the chunk, but finish the processing of the previous chunks. This behaviour might be changed in a later commit to ABORT the assoication due to a protocol violation, but changing this is a separate issue. MFC after: 3 days --- sys/netinet/sctp_input.c | 170 +++++++++++++-------------------------- 1 file changed, 56 insertions(+), 114 deletions(-) diff --git a/sys/netinet/sctp_input.c b/sys/netinet/sctp_input.c index 2d3be9819b4f..b47fb607d367 100644 --- a/sys/netinet/sctp_input.c +++ b/sys/netinet/sctp_input.c @@ -4518,7 +4518,6 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, * until we get into jumbo grams and such.. */ uint8_t chunk_buf[SCTP_CHUNK_BUFFER_SIZE]; - struct sctp_tcb *locked_tcb = stcb; int got_auth = 0; uint32_t auth_offset = 0, auth_len = 0; int auth_skipped = 0; @@ -4530,31 +4529,28 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT1, "sctp_process_control: iphlen=%u, offset=%u, length=%u stcb:%p\n", iphlen, *offset, length, (void *)stcb); + if (stcb) { + SCTP_TCB_LOCK_ASSERT(stcb); + } /* validate chunk header length... */ if (ntohs(ch->chunk_length) < sizeof(*ch)) { SCTPDBG(SCTP_DEBUG_INPUT1, "Invalid header length %d\n", ntohs(ch->chunk_length)); - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } /* * validate the verification tag */ vtag_in = ntohl(sh->v_tag); - if (locked_tcb) { - SCTP_TCB_LOCK_ASSERT(locked_tcb); - } if (ch->chunk_type == SCTP_INITIATION) { SCTPDBG(SCTP_DEBUG_INPUT1, "Its an INIT of len:%d vtag:%x\n", ntohs(ch->chunk_length), vtag_in); if (vtag_in != 0) { /* protocol error- silently discard... */ SCTP_STAT_INCR(sctps_badvtag); - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4577,9 +4573,6 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (*offset >= length) { /* no more data left in the mbuf chain */ *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } return (NULL); } ch = (struct sctp_chunkhdr *)sctp_m_getptr(m, *offset, @@ -4588,10 +4581,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (ch == NULL) { /* Help */ *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } if (ch->chunk_type == SCTP_COOKIE_ECHO) { goto process_control_chunks; @@ -4628,10 +4618,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, * sctp_findassociation_ep_asconf(). */ SCTP_INP_DECR_REF(inp); - } else { - locked_tcb = stcb; } - /* now go back and verify any auth chunk to be sure */ if (auth_skipped && (stcb != NULL)) { struct sctp_auth_chunk *auth; @@ -4645,10 +4632,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, auth_offset)) { /* auth HMAC failed so dump it */ *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } else { /* remaining chunks are HMAC checked */ stcb->asoc.authenticated = 1; @@ -4664,9 +4648,6 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, mflowtype, mflowid, inp->fibnum, vrf_id, port); *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } return (NULL); } asoc = &stcb->asoc; @@ -4684,8 +4665,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, } else { /* drop this packet... */ SCTP_STAT_INCR(sctps_badvtag); - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4698,8 +4679,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, * but it won't complete until the shutdown * is completed */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } snprintf(msg, sizeof(msg), "OOTB, %s:%d at %s", __FILE__, __LINE__, __func__); op_err = sctp_generate_cause(SCTP_BASE_SYSCTL(sctp_diag_info_code), @@ -4718,8 +4699,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, "invalid vtag: %xh, expect %xh\n", vtag_in, asoc->my_vtag); SCTP_STAT_INCR(sctps_badvtag); - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } *offset = length; return (NULL); @@ -4755,10 +4736,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (chk_length < sizeof(*ch) || (*offset + (int)chk_length) > length) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } SCTP_STAT_INCR_COUNTER64(sctps_incontrolchunks); /* @@ -4773,8 +4751,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, sizeof(struct sctp_init_ack_chunk), chunk_buf); if (ch == NULL) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4796,8 +4774,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, chunk_buf); if (ch == NULL) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4808,8 +4786,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (ch == NULL) { SCTP_PRINTF("sctp_process_control: Can't get the all data....\n"); *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4849,8 +4827,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, (length - *offset > (int)SCTP_SIZE32(chk_length))) { /* RFC 4960 requires that no ABORT is sent */ *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); } @@ -4870,8 +4848,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, mflowtype, mflowid, vrf_id, port); *offset = length; - if ((!abort_no_unlock) && (locked_tcb)) { - SCTP_TCB_UNLOCK(locked_tcb); + if ((!abort_no_unlock) && (stcb != NULL)) { + SCTP_TCB_UNLOCK(stcb); } return (NULL); break; @@ -4881,15 +4859,14 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_INIT-ACK\n"); if (inp->sctp_flags & SCTP_PCB_FLAGS_SOCKET_GONE) { /* We are not interested anymore */ - if ((stcb) && (stcb->asoc.total_output_queue_size)) { + if ((stcb != NULL) && (stcb->asoc.total_output_queue_size)) { ; } else { - if ((locked_tcb != NULL) && (locked_tcb != stcb)) { - /* Very unlikely */ - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } *offset = length; - if (stcb) { + if (stcb != NULL) { #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) so = SCTP_INP_SO(inp); atomic_add_int(&stcb->asoc.refcnt, 1); @@ -4911,10 +4888,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if ((num_chunks > 1) || (length - *offset > (int)SCTP_SIZE32(chk_length))) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } if ((netp) && (*netp)) { ret = sctp_handle_init_ack(m, iphlen, *offset, @@ -4938,10 +4912,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if ((stcb != NULL) && (ret == 0)) { sctp_chunk_output(stcb->sctp_ep, stcb, SCTP_OUTPUT_FROM_CONTROL_PROC, SCTP_SO_NOT_LOCKED); } - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); break; case SCTP_SELECTIVE_ACK: { @@ -5133,10 +5104,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if ((stcb == NULL) || (chk_length != sizeof(struct sctp_heartbeat_chunk))) { /* Its not ours */ *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } /* He's alive so give him credit */ if (SCTP_BASE_SYSCTL(sctp_logging_level) & SCTP_THRESHOLD_LOGGING) { @@ -5166,10 +5134,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, (void *)stcb); if ((stcb == NULL) || (chk_length != sizeof(struct sctp_shutdown_chunk))) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } if (netp && *netp) { int abort_flag = 0; @@ -5206,7 +5171,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (inp->sctp_flags & SCTP_PCB_FLAGS_SOCKET_GONE) { /* We are not interested anymore */ abend: - if (stcb) { + if (stcb != NULL) { SCTP_TCB_UNLOCK(stcb); } *offset = length; @@ -5263,6 +5228,9 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, } } if (netp) { + struct sctp_tcb *locked_stcb; + + locked_stcb = stcb; ret_buf = sctp_handle_cookie_echo(m, iphlen, *offset, @@ -5273,11 +5241,17 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, auth_skipped, auth_offset, auth_len, - &locked_tcb, + &locked_stcb, mflowtype, mflowid, vrf_id, port); + if ((locked_stcb != NULL) && (locked_stcb != stcb)) { + SCTP_TCB_UNLOCK(locked_stcb); + } + if (stcb != NULL) { + SCTP_TCB_LOCK_ASSERT(stcb); + } } else { ret_buf = NULL; } @@ -5285,8 +5259,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTP_ASOC_CREATE_UNLOCK(linp); } if (ret_buf == NULL) { - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); + if (stcb != NULL) { + SCTP_TCB_UNLOCK(stcb); } SCTPDBG(SCTP_DEBUG_INPUT3, "GAK, null buffer\n"); @@ -5313,10 +5287,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, case SCTP_COOKIE_ACK: SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_COOKIE-ACK, stcb %p\n", (void *)stcb); if ((stcb == NULL) || chk_length != sizeof(struct sctp_cookie_ack_chunk)) { - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } if (inp->sctp_flags & SCTP_PCB_FLAGS_SOCKET_GONE) { /* We are not interested anymore */ @@ -5358,11 +5329,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, /* He's alive so give him credit */ if ((stcb == NULL) || (chk_length != sizeof(struct sctp_ecne_chunk))) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if (stcb) { if (stcb->asoc.ecn_supported == 0) { @@ -5385,12 +5353,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_ECN-CWR\n"); /* He's alive so give him credit */ if ((stcb == NULL) || (chk_length != sizeof(struct sctp_cwr_chunk))) { - /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if (stcb) { if (stcb->asoc.ecn_supported == 0) { @@ -5413,10 +5377,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if ((num_chunks > 1) || (length - *offset > (int)SCTP_SIZE32(chk_length))) { *offset = length; - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } - return (NULL); + return (stcb); } if ((stcb) && netp && *netp) { sctp_handle_shutdown_complete((struct sctp_shutdown_complete_chunk *)ch, @@ -5449,11 +5410,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_ASCONF-ACK\n"); if (chk_length < sizeof(struct sctp_asconf_ack_chunk)) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if ((stcb) && netp && *netp) { if (stcb->asoc.asconf_supported == 0) { @@ -5479,11 +5437,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_FWD-TSN\n"); if (chk_length < sizeof(struct sctp_forward_tsn_chunk)) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } /* He's alive so give him credit */ if (stcb) { @@ -5546,11 +5501,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, SCTPDBG(SCTP_DEBUG_INPUT3, "SCTP_STREAM_RESET\n"); if (((stcb == NULL) || (ch == NULL) || (chk_length < sizeof(struct sctp_stream_reset_tsn_req)))) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if (stcb->asoc.reconfig_supported == 0) { goto unknown_chunk; @@ -5566,11 +5518,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, /* re-get it all please */ if (chk_length < sizeof(struct sctp_pktdrop_chunk)) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if (ch && (stcb) && netp && (*netp)) { if (stcb->asoc.pktdrop_supported == 0) { @@ -5579,7 +5528,6 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, sctp_handle_packet_dropped((struct sctp_pktdrop_chunk *)ch, stcb, *netp, min(chk_length, (sizeof(chunk_buf) - 4))); - } break; case SCTP_AUTHENTICATION: @@ -5601,11 +5549,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, (chk_length > (sizeof(struct sctp_auth_chunk) + SCTP_AUTH_DIGEST_LEN_MAX))) { /* Its not ours */ - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } if (got_auth == 1) { /* skip this chunk... it's already auth'd */ @@ -5670,11 +5615,8 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, ch = (struct sctp_chunkhdr *)sctp_m_getptr(m, *offset, sizeof(struct sctp_chunkhdr), chunk_buf); if (ch == NULL) { - if (locked_tcb) { - SCTP_TCB_UNLOCK(locked_tcb); - } *offset = length; - return (NULL); + return (stcb); } } /* while */ From 57ef3db3a9e4160b29077577e933239a1f0c3903 Mon Sep 17 00:00:00 2001 From: Rick Macklem Date: Sun, 15 Oct 2017 22:22:27 +0000 Subject: [PATCH 093/219] Fix the client IP address reported by nfsdumpstate for 64bit arch and NFSv4.1. The client IP address was not being reported for some NFSv4 mounts by nfsdumpstate. Upon investigation, two problems were found for mounts using IPv4. One was that the code (originally written and tested on i386) assumed that a "u_long" was a "uint32_t" and would exactly store an IPv4 host address. Not correct for 64bit arches. Also, for NFSv4.1 mounts, the field was not being filled in. This was basically correct, because NFSv4.1 does not use a callback address. However, it meant that nfsdumpstate could not report the client IP addr. This patch should fix both of these issues. For IPv6, the address will still not be reported. The original NFSv4 RFC only specified IPv4 callback addresses. I think this has changed and, if so, a future commit to fix reporting of IPv6 addresses will be needed. Reported by: manu PR: 223036 MFC after: 2 weeks --- sys/fs/nfsserver/nfs_nfsdserv.c | 8 ++++++++ sys/fs/nfsserver/nfs_nfsdstate.c | 10 ++++++---- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/sys/fs/nfsserver/nfs_nfsdserv.c b/sys/fs/nfsserver/nfs_nfsdserv.c index 98909ff9914b..509849d148d8 100644 --- a/sys/fs/nfsserver/nfs_nfsdserv.c +++ b/sys/fs/nfsserver/nfs_nfsdserv.c @@ -3729,6 +3729,7 @@ nfsrvd_exchangeid(struct nfsrv_descript *nd, __unused int isdgram, uint32_t sp4type, v41flags; uint64_t owner_minor; struct timespec verstime; + struct sockaddr_in *sad, *rad; if (nfs_rootfhset == 0 || nfsd_checkrootexp(nd) != 0) { nd->nd_repstat = NFSERR_WRONGSEC; @@ -3752,6 +3753,13 @@ nfsrvd_exchangeid(struct nfsrv_descript *nd, __unused int isdgram, NFSINITSOCKMUTEX(&clp->lc_req.nr_mtx); NFSSOCKADDRALLOC(clp->lc_req.nr_nam); NFSSOCKADDRSIZE(clp->lc_req.nr_nam, sizeof (struct sockaddr_in)); + sad = NFSSOCKADDR(nd->nd_nam, struct sockaddr_in *); + rad = NFSSOCKADDR(clp->lc_req.nr_nam, struct sockaddr_in *); + rad->sin_family = AF_INET; + rad->sin_addr.s_addr = 0; + rad->sin_port = 0; + if (sad->sin_family == AF_INET) + rad->sin_addr.s_addr = sad->sin_addr.s_addr; clp->lc_req.nr_cred = NULL; NFSBCOPY(verf, clp->lc_verf, NFSX_VERF); clp->lc_idlen = idlen; diff --git a/sys/fs/nfsserver/nfs_nfsdstate.c b/sys/fs/nfsserver/nfs_nfsdstate.c index f494071171f3..47716024a934 100644 --- a/sys/fs/nfsserver/nfs_nfsdstate.c +++ b/sys/fs/nfsserver/nfs_nfsdstate.c @@ -3891,11 +3891,11 @@ nfsrv_getclientipaddr(struct nfsrv_descript *nd, struct nfsclient *clp) u_char protocol[5], addr[24]; int error = 0, cantparse = 0; union { - u_long ival; + in_addr_t ival; u_char cval[4]; } ip; union { - u_short sval; + in_port_t sval; u_char cval[2]; } port; @@ -3989,8 +3989,10 @@ nfsrv_getclientipaddr(struct nfsrv_descript *nd, struct nfsclient *clp) } if (cantparse) { sad = NFSSOCKADDR(nd->nd_nam, struct sockaddr_in *); - rad->sin_addr.s_addr = sad->sin_addr.s_addr; - rad->sin_port = 0x0; + if (sad->sin_family == AF_INET) { + rad->sin_addr.s_addr = sad->sin_addr.s_addr; + rad->sin_port = 0x0; + } clp->lc_program = 0; } nfsmout: From fa271a5d09d6dc12cd0e3838cd92a90daaf5819c Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 23:53:55 +0000 Subject: [PATCH 094/219] Closer examination shows that nvme and CAM both normally zero-fill allocations (for req and ccb, which ultimately contain the nvme_cmd). As such, we can micro-optimize these routines. Add a comment to this effect, and bzero the ccb used to make the requests for the nda dump rotuine so it more closely matches a ccb allocated with xpt_get_ccb(). Sponsored by: Netflix --- sys/cam/nvme/nvme_da.c | 2 ++ sys/dev/nvme/nvme.h | 14 ++++++-------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/sys/cam/nvme/nvme_da.c b/sys/cam/nvme/nvme_da.c index 807cf3e0ea15..f0f438b4fb79 100644 --- a/sys/cam/nvme/nvme_da.c +++ b/sys/cam/nvme/nvme_da.c @@ -398,6 +398,8 @@ ndadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t len return (ENXIO); } + /* xpt_get_ccb returns a zero'd allocation for the ccb, mimic that here */ + memset(&nvmeio, 0, sizeof(nvmeio)); if (length > 0) { xpt_setup_ccb(&nvmeio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); nvmeio.ccb_h.ccb_state = NDA_CCB_DUMP; diff --git a/sys/dev/nvme/nvme.h b/sys/dev/nvme/nvme.h index 3e6a4241c2a4..aff4fbc66a61 100644 --- a/sys/dev/nvme/nvme.h +++ b/sys/dev/nvme/nvme.h @@ -1068,7 +1068,12 @@ uint32_t nvme_ns_get_stripesize(struct nvme_namespace *ns); int nvme_ns_bio_process(struct nvme_namespace *ns, struct bio *bp, nvme_cb_fn_t cb_fn); -/* Command building helper functions -- shared with CAM */ +/* + * Command building helper functions -- shared with CAM + * These functions assume allocator zeros out cmd structure + * CAM's xpt_get_ccb and the request allocator for nvme both + * do zero'd allocations. + */ static inline void nvme_ns_flush_cmd(struct nvme_command *cmd, uint32_t nsid) { @@ -1082,17 +1087,10 @@ void nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint32_t nsid, uint64_t lba, uint32_t count) { cmd->opc = rwcmd; - cmd->fuse = 0; - cmd->rsvd1 = 0; cmd->nsid = nsid; - cmd->rsvd2 = 0; - cmd->rsvd3 = 0; cmd->cdw10 = lba & 0xffffffffu; cmd->cdw11 = lba >> 32; cmd->cdw12 = count-1; - cmd->cdw13 = 0; - cmd->cdw14 = 0; - cmd->cdw15 = 0; } static inline From 1f88be2d3aa026472e12b9040117042fd4cdc639 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 15 Oct 2017 23:54:04 +0000 Subject: [PATCH 095/219] Zero out the ccb's alloated on the stack for the dump routines to more closely match a ccb returned from xpt_get_ccb(). Sponsored by: Netflix --- sys/cam/ata/ata_da.c | 1 + sys/cam/scsi/scsi_da.c | 1 + 2 files changed, 2 insertions(+) diff --git a/sys/cam/ata/ata_da.c b/sys/cam/ata/ata_da.c index 5f000e05511c..ca16f226426c 100644 --- a/sys/cam/ata/ata_da.c +++ b/sys/cam/ata/ata_da.c @@ -1057,6 +1057,7 @@ adadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t len return (ENXIO); } + memset(&ccb, 0, sizeof(ccb)); if (length > 0) { xpt_setup_ccb(&ccb.ccb_h, periph->path, CAM_PRIORITY_NORMAL); ccb.ccb_h.ccb_state = ADA_CCB_DUMP; diff --git a/sys/cam/scsi/scsi_da.c b/sys/cam/scsi/scsi_da.c index b9a98b5aac25..061ea9d93398 100644 --- a/sys/cam/scsi/scsi_da.c +++ b/sys/cam/scsi/scsi_da.c @@ -1646,6 +1646,7 @@ dadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t leng return (ENXIO); } + memset(&csio, 0, sizeof(csio)); if (length > 0) { xpt_setup_ccb(&csio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); csio.ccb_h.ccb_state = DA_CCB_DUMP; From cb0ba37ec50a25111e769fc008bf538dfa07eb48 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:11 +0000 Subject: [PATCH 096/219] Unify boot1 with loader Refactor boot1 to use the same I/O code as /boot/loader uses. Refactor to use the common efi_main.c. Submitted by: Eric McCorkle Differential Revision: https://reviews.freebsd.org/D10447 --- sys/boot/efi/boot1/Makefile | 37 +- sys/boot/efi/boot1/boot1.c | 827 ++++++++++++--------- sys/boot/efi/boot1/boot_module.h | 109 --- sys/boot/efi/boot1/ufs_module.c | 185 ----- sys/boot/efi/boot1/zfs_module.c | 248 ------ sys/boot/efi/libefi/Makefile | 5 +- sys/boot/efi/{loader => libefi}/efi_main.c | 0 sys/boot/efi/loader/Makefile | 1 - 8 files changed, 520 insertions(+), 892 deletions(-) delete mode 100644 sys/boot/efi/boot1/boot_module.h delete mode 100644 sys/boot/efi/boot1/ufs_module.c delete mode 100644 sys/boot/efi/boot1/zfs_module.c rename sys/boot/efi/{loader => libefi}/efi_main.c (100%) diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index 1907dc222d18..95508df8bbd9 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -8,7 +8,10 @@ MK_SSP= no PROG= boot1.sym INTERNALPROG= -WARNS?= 6 +WARNS?= 3 + +# Include bcache code. +HAVE_BCACHE= yes # We implement a slightly non-standard %S in that it always takes a # CHAR16 that's common in UEFI-land instead of a wchar_t. This only @@ -18,13 +21,15 @@ WARNS?= 6 CWARNFLAGS.boot1.c+= -Wno-format # Disable warnings that are currently incompatible with the zfs boot code -CWARNFLAGS.zfs_module.c += -Wno-array-bounds -CWARNFLAGS.zfs_module.c += -Wno-cast-align -CWARNFLAGS.zfs_module.c += -Wno-cast-qual -CWARNFLAGS.zfs_module.c += -Wno-missing-prototypes -CWARNFLAGS.zfs_module.c += -Wno-sign-compare -CWARNFLAGS.zfs_module.c += -Wno-unused-parameter -CWARNFLAGS.zfs_module.c += -Wno-unused-function +CWARNFLAGS.zfs.c += -Wno-incompatible-pointer-types-discards-qualifiers +CWARNFLAGS.zfs.c += -Wno-missing-variable-declarations +CWARNFLAGS.zfs.c += -Wno-array-bounds +CWARNFLAGS.zfs.c += -Wno-cast-align +CWARNFLAGS.zfs.c += -Wno-cast-qual +CWARNFLAGS.zfs.c += -Wno-missing-prototypes +CWARNFLAGS.zfs.c += -Wno-sign-compare +CWARNFLAGS.zfs.c += -Wno-unused-parameter +CWARNFLAGS.zfs.c += -Wno-unused-function CWARNFLAGS.skein.c += -Wno-cast-align .if ${COMPILER_TYPE} == "clang" CWARNFLAGS.skein.c += -Wno-missing-variable-declarations @@ -33,19 +38,27 @@ CWARNFLAGS.skein.c += -Wno-missing-declarations .endif # architecture-specific loader code -SRCS= boot1.c self_reloc.c start.S ufs_module.c +SRCS= boot1.c self_reloc.c start.S .if ${MK_ZFS} != "no" -SRCS+= zfs_module.c +.PATH: ${.CURDIR}/../../../crypto/skein SRCS+= skein.c skein_block.c # Do not unroll skein loops, reduce code size CFLAGS+= -DSKEIN_LOOP=111 -.PATH: ${.CURDIR}/../../../crypto/skein +.PATH: ${.CURDIR}/../../zfs +SRCS+= zfs.c .endif .if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} > 40201 CWARNFLAGS.self_reloc.c+= -Wno-error=maybe-uninitialized .endif +# Always add MI sources +.PATH: ${.CURDIR}/../../common +.include "${.CURDIR}/../../common/Makefile.inc" +CFLAGS+= -I${.CURDIR}/../../common + +.PATH: ${.CURDIR}/arch/${MACHINE} + CFLAGS+= -I. CFLAGS+= -I${.CURDIR}/../include CFLAGS+= -I${.CURDIR}/../include/${MACHINE} @@ -117,7 +130,7 @@ boot1.efi: ${PROG} SOURCE_DATE_EPOCH=${SOURCE_DATE_EPOCH} \ ${OBJCOPY} -j .peheader -j .text -j .sdata -j .data \ -j .dynamic -j .dynsym -j .rel.dyn \ - -j .rela.dyn -j .reloc -j .eh_frame \ + -j .rela.dyn -j .reloc -j .eh_frame -j set_Xcommand_set \ --output-target=${EFI_TARGET} ${.ALLSRC} ${.TARGET} boot1.o: ${SASRC}/ufsread.c diff --git a/sys/boot/efi/boot1/boot1.c b/sys/boot/efi/boot1/boot1.c index e2152f52bc0e..df9a1dc9d7b5 100644 --- a/sys/boot/efi/boot1/boot1.c +++ b/sys/boot/efi/boot1/boot1.c @@ -23,61 +23,179 @@ __FBSDID("$FreeBSD$"); #include +#include #include #include #include +#include #include +#include +#include #include +#ifdef EFI_ZFS_BOOT +#include +#endif typedef CHAR16 efi_char; #include -#include "boot_module.h" +#include + +#include "efi_drivers.h" +#include "efizfs.h" #include "paths.h" static void efi_panic(EFI_STATUS s, const char *fmt, ...) __dead2 __printflike(2, 3); +#ifdef EFI_DEBUG +#define DPRINTF(fmt, args...) printf(fmt, ##args) +#define DSTALL(d) BS->Stall(d) +#else +#define DPRINTF(fmt, ...) {} +#define DSTALL(d) {} +#endif -static const boot_module_t *boot_modules[] = -{ -#ifdef EFI_ZFS_BOOT - &zfs_module, -#endif -#ifdef EFI_UFS_BOOT - &ufs_module -#endif +struct arch_switch archsw; /* MI/MD interface boundary */ + +static const efi_driver_t *efi_drivers[] = { + NULL }; -#define NUM_BOOT_MODULES nitems(boot_modules) +extern struct console efi_console; +#if defined(__amd64__) || defined(__i386__) +extern struct console comconsole; +extern struct console nullconsole; +#endif + +#ifdef EFI_ZFS_BOOT +uint64_t pool_guid; +#endif + +struct fs_ops *file_system[] = { +#ifdef EFI_ZFS_BOOT + &zfs_fsops, +#endif + &dosfs_fsops, +#ifdef EFI_UFS_BOOT + &ufs_fsops, +#endif + &cd9660_fsops, + &nfs_fsops, + &gzipfs_fsops, + &bzipfs_fsops, + NULL +}; + +struct devsw *devsw[] = { + &efipart_hddev, + &efipart_fddev, + &efipart_cddev, +#ifdef EFI_ZFS_BOOT + &zfs_dev, +#endif + NULL +}; + +struct console *consoles[] = { + &efi_console, + NULL +}; + +static EFI_LOADED_IMAGE *boot_image; +static EFI_DEVICE_PATH *imgpath; +static EFI_DEVICE_PATH *imgprefix; + +/* Definitions we don't actually need for boot, but we need to define + * to make the linker happy. + */ +struct file_format *file_formats[] = { NULL }; + +struct netif_driver *netif_drivers[] = { NULL }; + +static int +efi_autoload(void) +{ + printf("******** Boot block should not call autoload\n"); + return (-1); +} + +static ssize_t +efi_copyin(const void *src __unused, vm_offset_t dest __unused, + const size_t len __unused) +{ + printf("******** Boot block should not call copyin\n"); + return (-1); +} + +static ssize_t +efi_copyout(vm_offset_t src __unused, void *dest __unused, + const size_t len __unused) +{ + printf("******** Boot block should not call copyout\n"); + return (-1); +} + +static ssize_t +efi_readin(int fd __unused, vm_offset_t dest __unused, + const size_t len __unused) +{ + printf("******** Boot block should not call readin\n"); + return (-1); +} + /* The initial number of handles used to query EFI for partitions. */ #define NUM_HANDLES_INIT 24 -static EFI_GUID BlockIoProtocolGUID = BLOCK_IO_PROTOCOL; static EFI_GUID DevicePathGUID = DEVICE_PATH_PROTOCOL; static EFI_GUID LoadedImageGUID = LOADED_IMAGE_PROTOCOL; -static EFI_GUID ConsoleControlGUID = EFI_CONSOLE_CONTROL_PROTOCOL_GUID; static EFI_GUID FreeBSDBootVarGUID = FREEBSD_BOOT_VAR_GUID; -/* - * Provide Malloc / Free backed by EFIs AllocatePool / FreePool which ensures - * memory is correctly aligned avoiding EFI_INVALID_PARAMETER returns from - * EFI methods. - */ -void * -Malloc(size_t len, const char *file __unused, int line __unused) +static EFI_STATUS +do_load(const char *filepath, void **bufp, size_t *bufsize) { - void *out; + struct stat st; + void *buf = NULL; + int fd, err; + size_t fsize, remaining; + ssize_t readsize; - if (BS->AllocatePool(EfiLoaderData, len, &out) == EFI_SUCCESS) - return (out); + if ((fd = open(filepath, O_RDONLY)) < 0) { + return (ENOTSUP); + } - return (NULL); -} + if ((err = fstat(fd, &st)) != 0) { + goto close_file; + } -void -Free(void *buf, const char *file __unused, int line __unused) -{ - if (buf != NULL) - (void)BS->FreePool(buf); + fsize = st.st_size; + + if ((buf = malloc(fsize)) == NULL) { + err = ENOMEM; + goto close_file; + } + + remaining = fsize; + + do { + if ((readsize = read(fd, buf, fsize)) < 0) { + err = (-readsize); + goto free_buf; + } + + remaining -= readsize; + } while(remaining != 0); + + close(fd); + *bufsize = st.st_size; + *bufp = buf; + + close_file: + close(fd); + + return errno_to_efi_status(err); + + free_buf: + free(buf); + goto close_file; } static EFI_STATUS @@ -97,98 +215,275 @@ efi_setenv_freebsd_wcs(const char *varname, CHAR16 *valstr) return (rv); } -/* - * nodes_match returns TRUE if the imgpath isn't NULL and the nodes match, - * FALSE otherwise. - */ -static BOOLEAN -nodes_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath) +static int +probe_fs(const char *filepath) { - size_t len; + int fd; - if (imgpath == NULL || imgpath->Type != devpath->Type || - imgpath->SubType != devpath->SubType) - return (FALSE); + if ((fd = open(filepath, O_RDONLY)) < 0) { + return (ENOTSUP); + } - len = DevicePathNodeLength(imgpath); - if (len != DevicePathNodeLength(devpath)) - return (FALSE); + close(fd); - return (memcmp(imgpath, devpath, (size_t)len) == 0); + return (0); } -/* - * device_paths_match returns TRUE if the imgpath isn't NULL and all nodes - * in imgpath and devpath match up to their respective occurrences of a - * media node, FALSE otherwise. - */ -static BOOLEAN -device_paths_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath) +static int +probe_dev(struct devsw *dev, int unit, const char *filepath) { + struct devdesc currdev; + char *devname; + int err; - if (imgpath == NULL) - return (FALSE); + currdev.d_dev = dev; + currdev.d_type = currdev.d_dev->dv_type; + currdev.d_unit = unit; + currdev.d_opendata = NULL; + devname = efi_fmtdev(&currdev); - while (!IsDevicePathEnd(imgpath) && !IsDevicePathEnd(devpath)) { - if (IsDevicePathType(imgpath, MEDIA_DEVICE_PATH) && - IsDevicePathType(devpath, MEDIA_DEVICE_PATH)) - return (TRUE); + env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, + env_nounset); - if (!nodes_match(imgpath, devpath)) - return (FALSE); + err = probe_fs(filepath); - imgpath = NextDevicePathNode(imgpath); - devpath = NextDevicePathNode(devpath); + return (err); +} + +static bool +check_preferred(EFI_HANDLE *h) +{ + EFI_DEVICE_PATH *path = efi_lookup_devpath(h); + bool out; + + if ((path = efi_lookup_devpath(h)) == NULL) + return (false); + + out = efi_devpath_is_prefix(imgpath, path) || + efi_devpath_is_prefix(imgprefix, path); + + return (out); +} + +bool +efi_zfs_is_preferred(EFI_HANDLE *h) +{ + return (check_preferred(h)); +} + +static int +load_preferred(EFI_LOADED_IMAGE *img, const char *filepath, void **bufp, + size_t *bufsize, EFI_HANDLE *handlep) +{ + pdinfo_list_t *pdi_list; + pdinfo_t *dp, *pp; + char *devname; + +#ifdef EFI_ZFS_BOOT + /* Did efi_zfs_probe() detect the boot pool? */ + if (pool_guid != 0) { + struct zfs_devdesc currdev; + + currdev.d_dev = &zfs_dev; + currdev.d_unit = 0; + currdev.d_type = currdev.d_dev->dv_type; + currdev.d_opendata = NULL; + currdev.pool_guid = pool_guid; + currdev.root_guid = 0; + devname = efi_fmtdev(&currdev); + + env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, + env_nounset); + + if (probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = efizfs_get_handle_by_guid(pool_guid); + return (0); + } } +#endif /* EFI_ZFS_BOOT */ - return (FALSE); -} + /* We have device lists for hd, cd, fd, walk them all. */ + pdi_list = efiblk_get_pdinfo_list(&efipart_hddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + struct disk_devdesc currdev; -/* - * devpath_last returns the last non-path end node in devpath. - */ -static EFI_DEVICE_PATH * -devpath_last(EFI_DEVICE_PATH *devpath) -{ + currdev.d_dev = &efipart_hddev; + currdev.d_type = currdev.d_dev->dv_type; + currdev.d_unit = dp->pd_unit; + currdev.d_opendata = NULL; + currdev.d_slice = -1; + currdev.d_partition = -1; + devname = efi_fmtdev(&currdev); - while (!IsDevicePathEnd(NextDevicePathNode(devpath))) - devpath = NextDevicePathNode(devpath); + env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, + env_nounset); - return (devpath); -} + if (check_preferred(dp->pd_handle) && + probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + return (0); + } -/* - * load_loader attempts to load the loader image data. - * - * It tries each module and its respective devices, identified by mod->probe, - * in order until a successful load occurs at which point it returns EFI_SUCCESS - * and EFI_NOT_FOUND otherwise. - * - * Only devices which have preferred matching the preferred parameter are tried. - */ -static EFI_STATUS -load_loader(const boot_module_t **modp, dev_info_t **devinfop, void **bufp, - size_t *bufsize, BOOLEAN preferred) -{ - UINTN i; - dev_info_t *dev; - const boot_module_t *mod; + /* Assuming GPT partitioning. */ + STAILQ_FOREACH(pp, &dp->pd_part, pd_link) { + if (check_preferred(pp->pd_handle)) { + currdev.d_slice = pp->pd_unit; + currdev.d_partition = 255; + devname = efi_fmtdev(&currdev); - for (i = 0; i < NUM_BOOT_MODULES; i++) { - mod = boot_modules[i]; - for (dev = mod->devices(); dev != NULL; dev = dev->next) { - if (dev->preferred != preferred) - continue; + env_setenv("currdev", EV_VOLATILE, devname, + efi_setcurrdev, env_nounset); - if (mod->load(PATH_LOADER_EFI, dev, bufp, bufsize) == - EFI_SUCCESS) { - *devinfop = dev; - *modp = mod; - return (EFI_SUCCESS); + if (probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == + EFI_SUCCESS) { + *handlep = pp->pd_handle; + return (0); + } } } } + pdi_list = efiblk_get_pdinfo_list(&efipart_cddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + if ((dp->pd_handle == img->DeviceHandle || + dp->pd_alias == img->DeviceHandle || + check_preferred(dp->pd_handle)) && + probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + return (0); + } + } + + pdi_list = efiblk_get_pdinfo_list(&efipart_fddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + if ((dp->pd_handle == img->DeviceHandle || + check_preferred(dp->pd_handle)) && + probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + return (0); + } + } + + return (ENOENT); +} + +static int +load_all(const char *filepath, void **bufp, size_t *bufsize, + EFI_HANDLE *handlep) +{ + pdinfo_list_t *pdi_list; + pdinfo_t *dp, *pp; + zfsinfo_list_t *zfsi_list; + zfsinfo_t *zi; + char *devname; + +#ifdef EFI_ZFS_BOOT + zfsi_list = efizfs_get_zfsinfo_list(); + STAILQ_FOREACH(zi, zfsi_list, zi_link) { + struct zfs_devdesc currdev; + + currdev.d_dev = &zfs_dev; + currdev.d_unit = 0; + currdev.d_type = currdev.d_dev->dv_type; + currdev.d_opendata = NULL; + currdev.pool_guid = zi->zi_pool_guid; + currdev.root_guid = 0; + devname = efi_fmtdev(&currdev); + + env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, + env_nounset); + + if (probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = zi->zi_handle; + + return (0); + } + } +#endif /* EFI_ZFS_BOOT */ + + /* We have device lists for hd, cd, fd, walk them all. */ + pdi_list = efiblk_get_pdinfo_list(&efipart_hddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + struct disk_devdesc currdev; + + currdev.d_dev = &efipart_hddev; + currdev.d_type = currdev.d_dev->dv_type; + currdev.d_unit = dp->pd_unit; + currdev.d_opendata = NULL; + currdev.d_slice = -1; + currdev.d_partition = -1; + devname = efi_fmtdev(&currdev); + + env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, + env_nounset); + + if (probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + + return (0); + } + + /* Assuming GPT partitioning. */ + STAILQ_FOREACH(pp, &dp->pd_part, pd_link) { + currdev.d_slice = pp->pd_unit; + currdev.d_partition = 255; + devname = efi_fmtdev(&currdev); + + env_setenv("currdev", EV_VOLATILE, devname, + efi_setcurrdev, env_nounset); + + if (probe_fs(filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = pp->pd_handle; + + return (0); + } + } + } + + pdi_list = efiblk_get_pdinfo_list(&efipart_cddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + if (probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + + return (0); + } + } + + pdi_list = efiblk_get_pdinfo_list(&efipart_fddev); + STAILQ_FOREACH(dp, pdi_list, pd_link) { + if (probe_dev(&efipart_fddev, dp->pd_unit, filepath) == 0 && + do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { + *handlep = dp->pd_handle; + + return (0); + } + } + + return (ENOENT); +} + +static EFI_STATUS +load_loader(EFI_HANDLE *handlep, void **bufp, size_t *bufsize) +{ + /* Try the preferred handles first, then all the handles */ + if (load_preferred(boot_image, PATH_LOADER_EFI, bufp, bufsize, + handlep) == 0) { + return (0); + } + + if (load_all(PATH_LOADER_EFI, bufp, bufsize, handlep) == 0) { + return (0); + } + return (EFI_NOT_FOUND); } @@ -202,20 +497,27 @@ try_boot(void) size_t bufsize, loadersize, cmdsize; void *buf, *loaderbuf; char *cmd; - dev_info_t *dev; - const boot_module_t *mod; + EFI_HANDLE fshandle; EFI_HANDLE loaderhandle; EFI_LOADED_IMAGE *loaded_image; EFI_STATUS status; + EFI_DEVICE_PATH *fspath; - status = load_loader(&mod, &dev, &loaderbuf, &loadersize, TRUE); - if (status != EFI_SUCCESS) { - status = load_loader(&mod, &dev, &loaderbuf, &loadersize, - FALSE); + status = load_loader(&fshandle, &loaderbuf, &loadersize); + + if (status != EFI_SUCCESS) { + return (status); + } + + fspath = NULL; + if (status == EFI_SUCCESS) { + status = BS->OpenProtocol(fshandle, &DevicePathGUID, + (void **)&fspath, IH, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); if (status != EFI_SUCCESS) { - printf("Failed to load '%s'\n", PATH_LOADER_EFI); - return (status); - } + DPRINTF("Failed to get image DevicePath (%lu)\n", + EFI_ERROR_CODE(status)); + } + DPRINTF("filesystem device path: %s\n", devpath_str(fspath)); } /* @@ -230,9 +532,9 @@ try_boot(void) */ cmd = NULL; cmdsize = 0; - status = mod->load(PATH_DOTCONFIG, dev, &buf, &bufsize); + status = do_load(PATH_DOTCONFIG, &buf, &bufsize); if (status == EFI_NOT_FOUND) - status = mod->load(PATH_CONFIG, dev, &buf, &bufsize); + status = do_load(PATH_CONFIG, &buf, &bufsize); if (status == EFI_SUCCESS) { cmdsize = bufsize + 1; cmd = malloc(cmdsize); @@ -244,24 +546,25 @@ try_boot(void) buf = NULL; } - if ((status = BS->LoadImage(TRUE, IH, devpath_last(dev->devpath), + if ((status = BS->LoadImage(TRUE, IH, efi_devpath_last_node(fspath), loaderbuf, loadersize, &loaderhandle)) != EFI_SUCCESS) { - printf("Failed to load image provided by %s, size: %zu, (%lu)\n", - mod->name, loadersize, EFI_ERROR_CODE(status)); + printf("Failed to load image, size: %zu, (%lu)\n", + loadersize, EFI_ERROR_CODE(status)); goto errout; } - if ((status = BS->HandleProtocol(loaderhandle, &LoadedImageGUID, - (VOID**)&loaded_image)) != EFI_SUCCESS) { - printf("Failed to query LoadedImage provided by %s (%lu)\n", - mod->name, EFI_ERROR_CODE(status)); + if ((status = BS->OpenProtocol(loaderhandle, &LoadedImageGUID, + (VOID**)&loaded_image, IH, NULL, + EFI_OPEN_PROTOCOL_GET_PROTOCOL)) != EFI_SUCCESS) { + printf("Failed to query LoadedImage (%lu)\n", + EFI_ERROR_CODE(status)); goto errout; } if (cmd != NULL) printf(" command args: %s\n", cmd); - loaded_image->DeviceHandle = dev->devhandle; + loaded_image->DeviceHandle = fshandle; loaded_image->LoadOptionsSize = cmdsize; loaded_image->LoadOptions = cmd; @@ -279,8 +582,8 @@ try_boot(void) if ((status = BS->StartImage(loaderhandle, NULL, NULL)) != EFI_SUCCESS) { - printf("Failed to start image provided by %s (%lu)\n", - mod->name, EFI_ERROR_CODE(status)); + printf("Failed to start image (%lu)\n", + EFI_ERROR_CODE(status)); loaded_image->LoadOptionsSize = 0; loaded_image->LoadOptions = NULL; } @@ -296,142 +599,37 @@ try_boot(void) return (status); } -/* - * probe_handle determines if the passed handle represents a logical partition - * if it does it uses each module in order to probe it and if successful it - * returns EFI_SUCCESS. - */ -static EFI_STATUS -probe_handle(EFI_HANDLE h, EFI_DEVICE_PATH *imgpath, BOOLEAN *preferred) -{ - dev_info_t *devinfo; - EFI_BLOCK_IO *blkio; - EFI_DEVICE_PATH *devpath; - EFI_STATUS status; - UINTN i; - - /* Figure out if we're dealing with an actual partition. */ - status = BS->HandleProtocol(h, &DevicePathGUID, (void **)&devpath); - if (status == EFI_UNSUPPORTED) - return (status); - - if (status != EFI_SUCCESS) { - DPRINTF("\nFailed to query DevicePath (%lu)\n", - EFI_ERROR_CODE(status)); - return (status); - } -#ifdef EFI_DEBUG - { - CHAR16 *text = efi_devpath_name(devpath); - DPRINTF("probing: %S\n", text); - efi_free_devpath_name(text); - } -#endif - status = BS->HandleProtocol(h, &BlockIoProtocolGUID, (void **)&blkio); - if (status == EFI_UNSUPPORTED) - return (status); - - if (status != EFI_SUCCESS) { - DPRINTF("\nFailed to query BlockIoProtocol (%lu)\n", - EFI_ERROR_CODE(status)); - return (status); - } - - if (!blkio->Media->LogicalPartition) - return (EFI_UNSUPPORTED); - - *preferred = device_paths_match(imgpath, devpath); - - /* Run through each module, see if it can load this partition */ - for (i = 0; i < NUM_BOOT_MODULES; i++) { - devinfo = malloc(sizeof(*devinfo)); - if (devinfo == NULL) { - DPRINTF("\nFailed to allocate devinfo\n"); - continue; - } - devinfo->dev = blkio; - devinfo->devpath = devpath; - devinfo->devhandle = h; - devinfo->devdata = NULL; - devinfo->preferred = *preferred; - devinfo->next = NULL; - - status = boot_modules[i]->probe(devinfo); - if (status == EFI_SUCCESS) - return (EFI_SUCCESS); - free(devinfo); - } - - return (EFI_UNSUPPORTED); -} - -/* - * probe_handle_status calls probe_handle and outputs the returned status - * of the call. - */ -static void -probe_handle_status(EFI_HANDLE h, EFI_DEVICE_PATH *imgpath) -{ - EFI_STATUS status; - BOOLEAN preferred; - - preferred = FALSE; - status = probe_handle(h, imgpath, &preferred); - - DPRINTF("probe: "); - switch (status) { - case EFI_UNSUPPORTED: - printf("."); - DPRINTF(" not supported\n"); - break; - case EFI_SUCCESS: - if (preferred) { - printf("%c", '*'); - DPRINTF(" supported (preferred)\n"); - } else { - printf("%c", '+'); - DPRINTF(" supported\n"); - } - break; - default: - printf("x"); - DPRINTF(" error (%lu)\n", EFI_ERROR_CODE(status)); - break; - } - DSTALL(500000); -} - EFI_STATUS -efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE *Xsystab) +main(int argc __unused, CHAR16 *argv[] __unused) { - EFI_HANDLE *handles; - EFI_LOADED_IMAGE *img; - EFI_DEVICE_PATH *imgpath; - EFI_STATUS status; - EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl = NULL; - SIMPLE_TEXT_OUTPUT_INTERFACE *conout = NULL; - UINTN i, max_dim, best_mode, cols, rows, hsize, nhandles; - CHAR16 *text; + EFI_STATUS status; - /* Basic initialization*/ - ST = Xsystab; - IH = Ximage; - BS = ST->BootServices; - RS = ST->RuntimeServices; + SIMPLE_TEXT_OUTPUT_INTERFACE *conout = NULL; + UINTN i, max_dim, best_mode, cols, rows; + CHAR16 *text; + + archsw.arch_autoload = efi_autoload; + archsw.arch_getdev = efi_getdev; + archsw.arch_copyin = efi_copyin; + archsw.arch_copyout = efi_copyout; + archsw.arch_readin = efi_readin; +#ifdef EFI_ZFS_BOOT + /* Note this needs to be set before ZFS init. */ + archsw.arch_zfs_probe = efi_zfs_probe; +#endif + + /* Init the time source */ + efi_time_init(); + cons_probe(); - /* Set up the console, so printf works. */ - status = BS->LocateProtocol(&ConsoleControlGUID, NULL, - (VOID **)&ConsoleControl); - if (status == EFI_SUCCESS) - (void)ConsoleControl->SetMode(ConsoleControl, - EfiConsoleControlScreenText); /* * Reset the console and find the best text mode. */ conout = ST->ConOut; conout->Reset(conout, TRUE); max_dim = best_mode = 0; - for (i = 0; ; i++) { + + for (i = 0; ; i++) { status = conout->QueryMode(conout, i, &cols, &rows); if (EFI_ERROR(status)) break; @@ -440,31 +638,37 @@ efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE *Xsystab) best_mode = i; } } - if (max_dim > 0) + + if (max_dim > 0) conout->SetMode(conout, best_mode); + conout->EnableCursor(conout, TRUE); conout->ClearScreen(conout); + /* Print this here, so people know it's at least starting. */ printf("\n>> FreeBSD EFI boot block\n"); printf(" Loader path: %s\n\n", PATH_LOADER_EFI); - printf(" Initializing modules:"); - for (i = 0; i < NUM_BOOT_MODULES; i++) { - printf(" %s", boot_modules[i]->name); - if (boot_modules[i]->init != NULL) - boot_modules[i]->init(); + + /* Get the image path and trim it to get the disk on which we + * found this loader. + */ + if ((status = BS->OpenProtocol(IH, &LoadedImageGUID, + (VOID**)&boot_image, IH, NULL, + EFI_OPEN_PROTOCOL_GET_PROTOCOL)) != EFI_SUCCESS) { + panic("Failed to query LoadedImage (%lu)\n", + EFI_ERROR_CODE(status)); } - putchar('\n'); /* Determine the devpath of our image so we can prefer it. */ - status = BS->HandleProtocol(IH, &LoadedImageGUID, (VOID**)&img); + status = BS->HandleProtocol(IH, &LoadedImageGUID, (VOID**)&boot_image); imgpath = NULL; if (status == EFI_SUCCESS) { - text = efi_devpath_name(img->FilePath); + text = efi_devpath_name(boot_image->FilePath); printf(" Load Path: %S\n", text); efi_setenv_freebsd_wcs("Boot1Path", text); efi_free_devpath_name(text); - status = BS->HandleProtocol(img->DeviceHandle, &DevicePathGUID, + status = BS->HandleProtocol(boot_image->DeviceHandle, &DevicePathGUID, (void **)&imgpath); if (status != EFI_SUCCESS) { DPRINTF("Failed to get image DevicePath (%lu)\n", @@ -478,48 +682,35 @@ efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE *Xsystab) } - /* Get all the device handles */ - hsize = (UINTN)NUM_HANDLES_INIT * sizeof(EFI_HANDLE); - handles = malloc(hsize); - if (handles == NULL) { - printf("Failed to allocate %d handles\n", NUM_HANDLES_INIT); + /* The loaded image device path ends with a partition, then a + * file path. Trim them both to get the actual disk. + */ + if ((imgprefix = efi_devpath_trim(imgpath)) == NULL || + (imgprefix = efi_devpath_trim(imgprefix)) == NULL) { + panic("Couldn't trim device path"); + } + + /* + * Initialize the block cache. Set the upper limit. + */ + bcache_init(32768, 512); + + printf("\n Initializing modules:"); + + for (i = 0; efi_drivers[i] != NULL; i++) { + printf(" %s", efi_drivers[i]->name); + if (efi_drivers[i]->init != NULL) + efi_drivers[i]->init(); } - status = BS->LocateHandle(ByProtocol, &BlockIoProtocolGUID, NULL, - &hsize, handles); - switch (status) { - case EFI_SUCCESS: - break; - case EFI_BUFFER_TOO_SMALL: - free(handles); - handles = malloc(hsize); - if (handles == NULL) - efi_panic(EFI_OUT_OF_RESOURCES, "Failed to allocate %d handles\n", - NUM_HANDLES_INIT); - status = BS->LocateHandle(ByProtocol, &BlockIoProtocolGUID, - NULL, &hsize, handles); - if (status != EFI_SUCCESS) - efi_panic(status, "Failed to get device handles\n"); - break; - default: - efi_panic(status, "Failed to get device handles\n"); - break; - } + for (i = 0; devsw[i] != NULL; i++) { + if (devsw[i]->dv_init != NULL) { + printf(" %s", devsw[i]->dv_name); + (devsw[i]->dv_init)(); + } + } - /* Scan all partitions, probing with all modules. */ - nhandles = hsize / sizeof(*handles); - printf(" Probing %zu block devices...", nhandles); - DPRINTF("\n"); - - for (i = 0; i < nhandles; i++) - probe_handle_status(handles[i], imgpath); - printf(" done\n"); - - /* Status summary. */ - for (i = 0; i < NUM_BOOT_MODULES; i++) { - printf(" "); - boot_modules[i]->status(); - } + putchar('\n'); try_boot(); @@ -527,25 +718,6 @@ efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE *Xsystab) efi_panic(EFI_LOAD_ERROR, "No bootable partitions found!"); } -/* - * add_device adds a device to the passed devinfo list. - */ -void -add_device(dev_info_t **devinfop, dev_info_t *devinfo) -{ - dev_info_t *dev; - - if (*devinfop == NULL) { - *devinfop = devinfo; - return; - } - - for (dev = *devinfop; dev->next != NULL; dev = dev->next) - ; - - dev->next = devinfo; -} - /* * OK. We totally give up. Exit back to EFI with a sensible status so * it can try the next option on the list. @@ -553,28 +725,13 @@ add_device(dev_info_t **devinfop, dev_info_t *devinfo) static void efi_panic(EFI_STATUS s, const char *fmt, ...) { - va_list ap; + va_list ap; - printf("panic: "); - va_start(ap, fmt); - vprintf(fmt, ap); - va_end(ap); - printf("\n"); + printf("panic: "); + va_start(ap, fmt); + vprintf(fmt, ap); + va_end(ap); + printf("\n"); - BS->Exit(IH, s, 0, NULL); -} - -void -putchar(int c) -{ - CHAR16 buf[2]; - - if (c == '\n') { - buf[0] = '\r'; - buf[1] = 0; - ST->ConOut->OutputString(ST->ConOut, buf); - } - buf[0] = c; - buf[1] = 0; - ST->ConOut->OutputString(ST->ConOut, buf); + BS->Exit(IH, s, 0, NULL); } diff --git a/sys/boot/efi/boot1/boot_module.h b/sys/boot/efi/boot1/boot_module.h deleted file mode 100644 index bfade34fe9cb..000000000000 --- a/sys/boot/efi/boot1/boot_module.h +++ /dev/null @@ -1,109 +0,0 @@ -/*- - * Copyright (c) 2015 Eric McCorkle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _BOOT_MODULE_H_ -#define _BOOT_MODULE_H_ - -#include - -#include -#include -#include - -#ifdef EFI_DEBUG -#define DPRINTF(fmt, args...) printf(fmt, ##args) -#define DSTALL(d) BS->Stall(d) -#else -#define DPRINTF(fmt, ...) {} -#define DSTALL(d) {} -#endif - -/* EFI device info */ -typedef struct dev_info -{ - EFI_BLOCK_IO *dev; - EFI_DEVICE_PATH *devpath; - EFI_HANDLE *devhandle; - void *devdata; - BOOLEAN preferred; - struct dev_info *next; -} dev_info_t; - -/* - * A boot loader module. - * - * This is a standard interface for filesystem modules in the EFI system. - */ -typedef struct boot_module_t -{ - const char *name; - - /* init is the optional initialiser for the module. */ - void (*init)(void); - - /* - * probe checks to see if the module can handle dev. - * - * Return codes: - * EFI_SUCCESS = The module can handle the device. - * EFI_NOT_FOUND = The module can not handle the device. - * Other = The module encountered an error. - */ - EFI_STATUS (*probe)(dev_info_t* dev); - - /* - * load should select the best out of a set of devices that probe - * indicated were loadable and load the specified file. - * - * Return codes: - * EFI_SUCCESS = The module can handle the device. - * EFI_NOT_FOUND = The module can not handle the device. - * Other = The module encountered an error. - */ - EFI_STATUS (*load)(const char *filepath, dev_info_t *devinfo, - void **buf, size_t *bufsize); - - /* status outputs information about the probed devices. */ - void (*status)(void); - - /* valid devices as found by probe. */ - dev_info_t *(*devices)(void); -} boot_module_t; - -/* Standard boot modules. */ -#ifdef EFI_UFS_BOOT -extern const boot_module_t ufs_module; -#endif -#ifdef EFI_ZFS_BOOT -extern const boot_module_t zfs_module; -#endif - -/* Functions available to modules. */ -extern void add_device(dev_info_t **devinfop, dev_info_t *devinfo); -extern int vsnprintf(char *str, size_t sz, const char *fmt, va_list ap); -#endif diff --git a/sys/boot/efi/boot1/ufs_module.c b/sys/boot/efi/boot1/ufs_module.c deleted file mode 100644 index 4a8016fad2ce..000000000000 --- a/sys/boot/efi/boot1/ufs_module.c +++ /dev/null @@ -1,185 +0,0 @@ -/*- - * Copyright (c) 1998 Robert Nordier - * All rights reserved. - * Copyright (c) 2001 Robert Drehmel - * All rights reserved. - * Copyright (c) 2014 Nathan Whitehorn - * All rights reserved. - * Copyright (c) 2015 Eric McCorkle - * All rights reverved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include -#include -#include -#include -#include - -#include "boot_module.h" - -static dev_info_t *devinfo; -static dev_info_t *devices; - -static int -dskread(void *buf, u_int64_t lba, int nblk) -{ - int size; - EFI_STATUS status; - - lba = lba / (devinfo->dev->Media->BlockSize / DEV_BSIZE); - size = nblk * DEV_BSIZE; - - status = devinfo->dev->ReadBlocks(devinfo->dev, - devinfo->dev->Media->MediaId, lba, size, buf); - - if (status != EFI_SUCCESS) { - DPRINTF("dskread: failed dev: %p, id: %u, lba: %ju, size: %d, " - "status: %lu\n", devinfo->dev, - devinfo->dev->Media->MediaId, (uintmax_t)lba, size, - EFI_ERROR_CODE(status)); - return (-1); - } - - return (0); -} - -#include "ufsread.c" - -static struct dmadat __dmadat; - -static int -init_dev(dev_info_t* dev) -{ - - devinfo = dev; - dmadat = &__dmadat; - - return fsread(0, NULL, 0); -} - -static EFI_STATUS -probe(dev_info_t* dev) -{ - - if (init_dev(dev) < 0) - return (EFI_UNSUPPORTED); - - add_device(&devices, dev); - - return (EFI_SUCCESS); -} - -static EFI_STATUS -load(const char *filepath, dev_info_t *dev, void **bufp, size_t *bufsize) -{ - ufs_ino_t ino; - EFI_STATUS status; - size_t size; - ssize_t read; - void *buf; - -#ifdef EFI_DEBUG - { - CHAR16 *text = efi_devpath_name(dev->devpath); - DPRINTF("Loading '%s' from %S\n", filepath, text); - efi_free_devpath_name(text); - } -#endif - if (init_dev(dev) < 0) { - DPRINTF("Failed to init device\n"); - return (EFI_UNSUPPORTED); - } - - if ((ino = lookup(filepath)) == 0) { - DPRINTF("Failed to lookup '%s' (file not found?)\n", filepath); - return (EFI_NOT_FOUND); - } - - if (fsread_size(ino, NULL, 0, &size) < 0 || size <= 0) { - printf("Failed to read size of '%s' ino: %d\n", filepath, ino); - return (EFI_INVALID_PARAMETER); - } - - if ((status = BS->AllocatePool(EfiLoaderData, size, &buf)) != - EFI_SUCCESS) { - printf("Failed to allocate read buffer %zu for '%s' (%lu)\n", - size, filepath, EFI_ERROR_CODE(status)); - return (status); - } - - read = fsread(ino, buf, size); - if ((size_t)read != size) { - printf("Failed to read '%s' (%zd != %zu)\n", filepath, read, - size); - (void)BS->FreePool(buf); - return (EFI_INVALID_PARAMETER); - } - - DPRINTF("Load complete\n"); - - *bufp = buf; - *bufsize = size; - - return (EFI_SUCCESS); -} - -static void -status(void) -{ - int i; - dev_info_t *dev; - - for (dev = devices, i = 0; dev != NULL; dev = dev->next, i++) - ; - - printf("%s found ", ufs_module.name); - switch (i) { - case 0: - printf("no partitions\n"); - break; - case 1: - printf("%d partition\n", i); - break; - default: - printf("%d partitions\n", i); - } -} - -static dev_info_t * -_devices(void) -{ - - return (devices); -} - -const boot_module_t ufs_module = -{ - .name = "UFS", - .probe = probe, - .load = load, - .status = status, - .devices = _devices -}; diff --git a/sys/boot/efi/boot1/zfs_module.c b/sys/boot/efi/boot1/zfs_module.c deleted file mode 100644 index e1d1a5a35f17..000000000000 --- a/sys/boot/efi/boot1/zfs_module.c +++ /dev/null @@ -1,248 +0,0 @@ -/*- - * Copyright (c) 2015 Eric McCorkle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -#include -#include -#include -#include -#include -#include -#include - -#include "boot_module.h" - -#include "libzfs.h" -#include "zfsimpl.c" - -static dev_info_t *devices; - -uint64_t -ldi_get_size(void *priv) -{ - dev_info_t *devinfo = priv; - - return (devinfo->dev->Media->BlockSize * - (devinfo->dev->Media->LastBlock + 1)); -} - -static int -vdev_read(vdev_t *vdev, void *priv, off_t off, void *buf, size_t bytes) -{ - dev_info_t *devinfo; - uint64_t lba; - size_t size, remainder, rb_size, blksz; - char *bouncebuf = NULL, *rb_buf; - EFI_STATUS status; - - devinfo = (dev_info_t *)priv; - lba = off / devinfo->dev->Media->BlockSize; - remainder = off % devinfo->dev->Media->BlockSize; - - rb_buf = buf; - rb_size = bytes; - - /* - * If we have remainder from off, we need to add remainder part. - * Since buffer must be multiple of the BlockSize, round it all up. - */ - size = roundup2(bytes + remainder, devinfo->dev->Media->BlockSize); - blksz = size; - if (remainder != 0 || size != bytes) { - rb_size = devinfo->dev->Media->BlockSize; - bouncebuf = malloc(rb_size); - if (bouncebuf == NULL) { - printf("vdev_read: out of memory\n"); - return (-1); - } - rb_buf = bouncebuf; - blksz = rb_size - remainder; - } - - while (bytes > 0) { - status = devinfo->dev->ReadBlocks(devinfo->dev, - devinfo->dev->Media->MediaId, lba, rb_size, rb_buf); - if (EFI_ERROR(status)) - goto error; - if (bytes < blksz) - blksz = bytes; - if (bouncebuf != NULL) - memcpy(buf, rb_buf + remainder, blksz); - buf = (void *)((uintptr_t)buf + blksz); - bytes -= blksz; - lba++; - remainder = 0; - blksz = rb_size; - } - - free(bouncebuf); - return (0); - -error: - free(bouncebuf); - DPRINTF("vdev_read: failed dev: %p, id: %u, lba: %ju, size: %zu," - " rb_size: %zu, status: %lu\n", devinfo->dev, - devinfo->dev->Media->MediaId, (uintmax_t)lba, bytes, rb_size, - EFI_ERROR_CODE(status)); - return (-1); -} - -static EFI_STATUS -probe(dev_info_t *dev) -{ - spa_t *spa; - dev_info_t *tdev; - EFI_STATUS status; - - /* ZFS consumes the dev on success so we need a copy. */ - if ((status = BS->AllocatePool(EfiLoaderData, sizeof(*dev), - (void**)&tdev)) != EFI_SUCCESS) { - DPRINTF("Failed to allocate tdev (%lu)\n", - EFI_ERROR_CODE(status)); - return (status); - } - memcpy(tdev, dev, sizeof(*dev)); - - if (vdev_probe(vdev_read, tdev, &spa) != 0) { - (void)BS->FreePool(tdev); - return (EFI_UNSUPPORTED); - } - - dev->devdata = spa; - add_device(&devices, dev); - - return (EFI_SUCCESS); -} - -static EFI_STATUS -load(const char *filepath, dev_info_t *devinfo, void **bufp, size_t *bufsize) -{ - spa_t *spa; - struct zfsmount zfsmount; - dnode_phys_t dn; - struct stat st; - int err; - void *buf; - EFI_STATUS status; - - spa = devinfo->devdata; - -#ifdef EFI_DEBUG - { - CHAR16 *text = efi_devpath_name(devinfo->devpath); - DPRINTF("load: '%s' spa: '%s', devpath: %S\n", filepath, - spa->spa_name, text); - efi_free_devpath_name(text); - } -#endif - if ((err = zfs_spa_init(spa)) != 0) { - DPRINTF("Failed to load pool '%s' (%d)\n", spa->spa_name, err); - return (EFI_NOT_FOUND); - } - - if ((err = zfs_mount(spa, 0, &zfsmount)) != 0) { - DPRINTF("Failed to mount pool '%s' (%d)\n", spa->spa_name, err); - return (EFI_NOT_FOUND); - } - - if ((err = zfs_lookup(&zfsmount, filepath, &dn)) != 0) { - if (err == ENOENT) { - DPRINTF("Failed to find '%s' on pool '%s' (%d)\n", - filepath, spa->spa_name, err); - return (EFI_NOT_FOUND); - } - printf("Failed to lookup '%s' on pool '%s' (%d)\n", filepath, - spa->spa_name, err); - return (EFI_INVALID_PARAMETER); - } - - if ((err = zfs_dnode_stat(spa, &dn, &st)) != 0) { - printf("Failed to stat '%s' on pool '%s' (%d)\n", filepath, - spa->spa_name, err); - return (EFI_INVALID_PARAMETER); - } - - if ((status = BS->AllocatePool(EfiLoaderData, (UINTN)st.st_size, &buf)) - != EFI_SUCCESS) { - printf("Failed to allocate load buffer %jd for pool '%s' for '%s' " - "(%lu)\n", (intmax_t)st.st_size, spa->spa_name, filepath, EFI_ERROR_CODE(status)); - return (EFI_INVALID_PARAMETER); - } - - if ((err = dnode_read(spa, &dn, 0, buf, st.st_size)) != 0) { - printf("Failed to read node from %s (%d)\n", spa->spa_name, - err); - (void)BS->FreePool(buf); - return (EFI_INVALID_PARAMETER); - } - - *bufsize = st.st_size; - *bufp = buf; - - return (EFI_SUCCESS); -} - -static void -status(void) -{ - spa_t *spa; - - spa = STAILQ_FIRST(&zfs_pools); - if (spa == NULL) { - printf("%s found no pools\n", zfs_module.name); - return; - } - - printf("%s found the following pools:", zfs_module.name); - STAILQ_FOREACH(spa, &zfs_pools, spa_link) - printf(" %s", spa->spa_name); - - printf("\n"); -} - -static void -init(void) -{ - - zfs_init(); -} - -static dev_info_t * -_devices(void) -{ - - return (devices); -} - -const boot_module_t zfs_module = -{ - .name = "ZFS", - .init = init, - .probe = probe, - .load = load, - .status = status, - .devices = _devices -}; diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile index 71089697a4ee..449762fe3b04 100644 --- a/sys/boot/efi/libefi/Makefile +++ b/sys/boot/efi/libefi/Makefile @@ -11,8 +11,9 @@ LIB= efi INTERNALLIB= WARNS?= 2 -SRCS= delay.c devpath.c efi_console.c efichar.c efinet.c efipart.c env.c errno.c \ - handles.c wchar.c libefi.c efi_driver_utils.c efizfs.c devicename.c +SRCS= delay.c devpath.c efi_console.c efichar.c efinet.c efipart.c env.c \ + errno.c handles.c wchar.c libefi.c efi_driver_utils.c efizfs.c \ + devicename.c efi_main.c .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" SRCS+= time.c diff --git a/sys/boot/efi/loader/efi_main.c b/sys/boot/efi/libefi/efi_main.c similarity index 100% rename from sys/boot/efi/loader/efi_main.c rename to sys/boot/efi/libefi/efi_main.c diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index 1abf6fda6111..89a58f7c31c2 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -16,7 +16,6 @@ SRCS= autoload.c \ bootinfo.c \ conf.c \ copy.c \ - efi_main.c \ main.c \ self_reloc.c \ smbios.c \ From 6c4b856dbe74e9ab74c8b1ef625a369bc512e86a Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:17 +0000 Subject: [PATCH 097/219] Move orphaned man pages into new man directory from common. This helps keep cleaer that common is just for the MI files for /boot/loader programs. Sponsored by: Netflix --- sys/boot/Makefile | 2 +- sys/boot/{common => man}/Makefile | 0 sys/boot/{common => man}/loader.8 | 0 sys/boot/{common => man}/zfsloader.8 | 0 4 files changed, 1 insertion(+), 1 deletion(-) rename sys/boot/{common => man}/Makefile (100%) rename sys/boot/{common => man}/loader.8 (100%) rename sys/boot/{common => man}/zfsloader.8 (100%) diff --git a/sys/boot/Makefile b/sys/boot/Makefile index 30baed2313aa..edd3200f7d2b 100644 --- a/sys/boot/Makefile +++ b/sys/boot/Makefile @@ -9,7 +9,7 @@ SUBDIR+= ficl SUBDIR+= forth .endif -SUBDIR+= common +SUBDIR+= man .include diff --git a/sys/boot/common/Makefile b/sys/boot/man/Makefile similarity index 100% rename from sys/boot/common/Makefile rename to sys/boot/man/Makefile diff --git a/sys/boot/common/loader.8 b/sys/boot/man/loader.8 similarity index 100% rename from sys/boot/common/loader.8 rename to sys/boot/man/loader.8 diff --git a/sys/boot/common/zfsloader.8 b/sys/boot/man/zfsloader.8 similarity index 100% rename from sys/boot/common/zfsloader.8 rename to sys/boot/man/zfsloader.8 From 7e705f54f8270b7ec5a3ef638bed161cbf0bd532 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:22 +0000 Subject: [PATCH 098/219] Rename top level Makefile.ficl to ficl.mk. --- sys/boot/common/Makefile.inc | 2 +- sys/boot/efi/libefi/Makefile | 2 +- sys/boot/{Makefile.ficl => ficl.mk} | 0 sys/boot/ficl/Makefile | 2 +- 4 files changed, 3 insertions(+), 3 deletions(-) rename sys/boot/{Makefile.ficl => ficl.mk} (100%) diff --git a/sys/boot/common/Makefile.inc b/sys/boot/common/Makefile.inc index 59bd6497e0a2..867035907a99 100644 --- a/sys/boot/common/Makefile.inc +++ b/sys/boot/common/Makefile.inc @@ -62,7 +62,7 @@ SRCS+= pnp.c # Forth interpreter .if defined(BOOT_FORTH) SRCS+= interp_forth.c -.include "${SRCTOP}/sys/boot/Makefile.ficl" +.include "../ficl.mk" .endif .if defined(BOOT_PROMPT_123) diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile index 449762fe3b04..e94098616359 100644 --- a/sys/boot/efi/libefi/Makefile +++ b/sys/boot/efi/libefi/Makefile @@ -4,7 +4,7 @@ .if ${MK_FORTH} != "no" CFLAGS+= -DBOOT_FORTH -.include "${.CURDIR}/../../Makefile.ficl" +.include "../../ficl.mk" .endif LIB= efi diff --git a/sys/boot/Makefile.ficl b/sys/boot/ficl.mk similarity index 100% rename from sys/boot/Makefile.ficl rename to sys/boot/ficl.mk diff --git a/sys/boot/ficl/Makefile b/sys/boot/ficl/Makefile index c16b25d8fc90..413bfacc0fe0 100644 --- a/sys/boot/ficl/Makefile +++ b/sys/boot/ficl/Makefile @@ -1,7 +1,7 @@ # $FreeBSD$ # -.include "${.CURDIR}/../Makefile.ficl" +.include "../ficl.mk" BASE_SRCS= dict.c ficl.c fileaccess.c float.c loader.c math64.c \ prefix.c search.c stack.c tools.c vm.c words.c From 7f20726e4badbe62a3b6d45a2e61bd68ac1d4cd3 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:28 +0000 Subject: [PATCH 099/219] Move common/Makefile.inc to sys/boot/loader.mk. Makefile.inc has a specific meaning in the tree, and common/Makefile.inc doesn't quite fit into that. Rename it to loader.mk and it will be a place to collect common things to all /boot/loader programs there. Sponsored by: Netflix --- sys/boot/arm/uboot/Makefile | 6 ++---- sys/boot/efi/boot1/Makefile | 4 +--- sys/boot/efi/loader/Makefile | 4 +--- sys/boot/i386/loader/Makefile | 6 ++---- sys/boot/{common/Makefile.inc => loader.mk} | 13 +++++++++---- sys/boot/mips/beri/loader/Makefile | 10 ++-------- sys/boot/mips/uboot/Makefile | 6 ++---- sys/boot/powerpc/kboot/Makefile | 8 ++++---- sys/boot/powerpc/ofw/Makefile | 8 ++++---- sys/boot/powerpc/ps3/Makefile | 8 ++++---- sys/boot/powerpc/uboot/Makefile | 8 ++++---- sys/boot/sparc64/loader/Makefile | 6 ++---- sys/boot/userboot/userboot/Makefile | 5 +---- 13 files changed, 38 insertions(+), 54 deletions(-) rename sys/boot/{common/Makefile.inc => loader.mk} (87%) diff --git a/sys/boot/arm/uboot/Makefile b/sys/boot/arm/uboot/Makefile index 990c78d48d35..ba56279b0f8b 100644 --- a/sys/boot/arm/uboot/Makefile +++ b/sys/boot/arm/uboot/Makefile @@ -90,9 +90,7 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" CFLAGS+= -I. CLEANFILES+= loader.help @@ -124,7 +122,7 @@ OBJS+= ${SRCS:N*.h:R:S/$/.o/g} loader.help: help.common help.uboot ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} ldscript.abs: echo "UBLDR_LOADADDR = ${UBLDR_LOADADDR};" >${.TARGET} diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index 95508df8bbd9..6375a796886f 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -53,9 +53,7 @@ CWARNFLAGS.self_reloc.c+= -Wno-error=maybe-uninitialized .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" .PATH: ${.CURDIR}/arch/${MACHINE} diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index 89a58f7c31c2..006e544f19e3 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -103,9 +103,7 @@ CFLAGS+= -DEFI_STAGING_SIZE=${EFI_STAGING_SIZE} .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" FILES+= loader.efi FILESMODE_loader.efi= ${BINMODE} diff --git a/sys/boot/i386/loader/Makefile b/sys/boot/i386/loader/Makefile index 034b77536baf..b5b169e2717c 100644 --- a/sys/boot/i386/loader/Makefile +++ b/sys/boot/i386/loader/Makefile @@ -72,9 +72,7 @@ CFLAGS+= -I${.CURDIR}/../../.. -D_STAND .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" CFLAGS+= -I. CLEANFILES= ${LOADER} ${LOADER}.bin loader.help @@ -104,7 +102,7 @@ ${LOADER}.bin: ${LOADER}.sym strip -R .comment -R .note -o ${.TARGET} ${.ALLSRC} loader.help: help.common help.i386 - cat ${.ALLSRC} | awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + cat ${.ALLSRC} | awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} FILES= ${LOADER} # XXX INSTALLFLAGS_loader= -b diff --git a/sys/boot/common/Makefile.inc b/sys/boot/loader.mk similarity index 87% rename from sys/boot/common/Makefile.inc rename to sys/boot/loader.mk index 867035907a99..bf241a127526 100644 --- a/sys/boot/common/Makefile.inc +++ b/sys/boot/loader.mk @@ -1,6 +1,11 @@ # $FreeBSD$ -.PATH: ${SRCTOP}/sys/boot/common ${SRCTOP}/sys/boot/libsa +BOOTDIR=${SRCTOP}/sys/boot +LDR_MI=${BOOTDIR}/common + +.PATH: ${LDR_MI} ${BOOTDIR}/libsa + +CFLAGS+=-I${LDR_MI} SRCS+= boot.c commands.c console.c devopen.c interp.c SRCS+= interp_backslash.c interp_parse.c ls.c misc.c @@ -62,7 +67,7 @@ SRCS+= pnp.c # Forth interpreter .if defined(BOOT_FORTH) SRCS+= interp_forth.c -.include "../ficl.mk" +.include "${BOOTDIR}/ficl.mk" .endif .if defined(BOOT_PROMPT_123) @@ -78,6 +83,6 @@ VERSION_FILE?= ${.CURDIR}/version .if ${MK_REPRODUCIBLE_BUILD} != no REPRO_FLAG= -r .endif -vers.c: ${SRCTOP}/sys/boot/common/newvers.sh ${VERSION_FILE} - sh ${SRCTOP}/sys/boot/common/newvers.sh ${REPRO_FLAG} ${VERSION_FILE} \ +vers.c: ${LDR_MI}/newvers.sh ${VERSION_FILE} + sh ${LDR_MI}/newvers.sh ${REPRO_FLAG} ${VERSION_FILE} \ ${NEWVERSWHAT} diff --git a/sys/boot/mips/beri/loader/Makefile b/sys/boot/mips/beri/loader/Makefile index 1bdf5a99351a..aec550cc038c 100644 --- a/sys/boot/mips/beri/loader/Makefile +++ b/sys/boot/mips/beri/loader/Makefile @@ -76,14 +76,8 @@ CFLAGS+= -I${.CURDIR}/../../../ficl/mips64 LIBFICL= ${.OBJDIR}/../../../ficl/libficl.a .endif -# Common code across BERI boot loader parts -.PATH: ${.CURDIR}/../common -CFLAGS+= -I${.CURDIR}/../common - # Always add MI sources -.PATH: ${.CURDIR}/../../../common -.include "${.CURDIR}/../../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../../common +.include "../../../loader.mk" # BERI files common to boot2 and loader .PATH: ${.CURDIR}/../common @@ -112,7 +106,7 @@ LDADD= ${LIBFICL} ${LIBSA} loader.help: help.common help.mips cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../../forth .include "${.CURDIR}/../../../forth/Makefile.inc" diff --git a/sys/boot/mips/uboot/Makefile b/sys/boot/mips/uboot/Makefile index 86a07a7e6a02..3efafafe23af 100644 --- a/sys/boot/mips/uboot/Makefile +++ b/sys/boot/mips/uboot/Makefile @@ -94,9 +94,7 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" CFLAGS+= -I. CLEANFILES+= loader.help @@ -126,7 +124,7 @@ OBJS+= ${SRCS:N*.h:R:S/$/.o/g} loader.help: help.common help.uboot ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} ldscript.abs: echo "UBLDR_LOADADDR = ${UBLDR_LOADADDR};" >${.TARGET} diff --git a/sys/boot/powerpc/kboot/Makefile b/sys/boot/powerpc/kboot/Makefile index c42267bf0930..f5767f972ac9 100644 --- a/sys/boot/powerpc/kboot/Makefile +++ b/sys/boot/powerpc/kboot/Makefile @@ -72,9 +72,9 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a CFLAGS+= -mcpu=powerpc64 # Always add MI sources -.PATH: ${.CURDIR}/../../common ${.CURDIR}/../../../libkern -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common -I${.CURDIR}/../../.. +.include "../../loader.mk" +.PATH: ${.CURDIR}/../../../libkern +CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -I. CLEANFILES+= loader.help @@ -98,7 +98,7 @@ LDADD= ${LIBFICL} ${LIBOFW} ${LIBFDT} ${LIBSA32} loader.help: help.common help.kboot ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../forth .include "${.CURDIR}/../../forth/Makefile.inc" diff --git a/sys/boot/powerpc/ofw/Makefile b/sys/boot/powerpc/ofw/Makefile index 458d7dd237b5..b170812559f6 100644 --- a/sys/boot/powerpc/ofw/Makefile +++ b/sys/boot/powerpc/ofw/Makefile @@ -69,9 +69,9 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common ${.CURDIR}/../../../libkern -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common -I${.CURDIR}/../../.. +.include "../../loader.mk" +.PATH: ${.CURDIR}/../../../libkern +CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -I. CLEANFILES+= loader.help @@ -96,7 +96,7 @@ LDADD= ${LIBFICL} ${LIBOFW} ${LIBFDT} ${LIBSA32} loader.help: help.common help.ofw ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../forth .include "${.CURDIR}/../../forth/Makefile.inc" diff --git a/sys/boot/powerpc/ps3/Makefile b/sys/boot/powerpc/ps3/Makefile index 4df5b4196030..f6b3d41c2b98 100644 --- a/sys/boot/powerpc/ps3/Makefile +++ b/sys/boot/powerpc/ps3/Makefile @@ -72,9 +72,9 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a CFLAGS+= -mcpu=powerpc64 # Always add MI sources -.PATH: ${.CURDIR}/../../common ${.CURDIR}/../../../libkern -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common -I${.CURDIR}/../../.. +.include "../../loader.mk" +.PATH: ${.CURDIR}/../../../libkern +CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -I. CLEANFILES+= loader.help @@ -100,7 +100,7 @@ font.h: loader.help: help.common help.ps3 ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../forth .include "${.CURDIR}/../../forth/Makefile.inc" diff --git a/sys/boot/powerpc/uboot/Makefile b/sys/boot/powerpc/uboot/Makefile index c153719b5fc8..5a88546d5ce3 100644 --- a/sys/boot/powerpc/uboot/Makefile +++ b/sys/boot/powerpc/uboot/Makefile @@ -75,9 +75,9 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common ${.CURDIR}/../../../libkern -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common -I${.CURDIR}/../../.. +.include "../../loader.mk" +.PATH: ${.CURDIR}/../../../libkern +CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -I. CLEANFILES+= ${PROG}.help @@ -101,7 +101,7 @@ LDADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} ${LIBUBOOT_FDT} ${LIBSA32} loader.help: help.common help.uboot ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../forth FILES= loader.help diff --git a/sys/boot/sparc64/loader/Makefile b/sys/boot/sparc64/loader/Makefile index bc7b870ae5b2..4825a76ddd6b 100644 --- a/sys/boot/sparc64/loader/Makefile +++ b/sys/boot/sparc64/loader/Makefile @@ -66,9 +66,7 @@ LIBFICL= ${.OBJDIR}/../../ficl/libficl.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" CFLAGS+= -I. CLEANFILES+= loader.help @@ -87,7 +85,7 @@ LDADD= ${LIBFICL} ${LIBZFSBOOT} ${LIBOFW} ${LIBSA} loader.help: help.common help.sparc64 cat ${.ALLSRC} | \ - awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} + awk -f ${LDR_MI}/merge_help.awk > ${.TARGET} .PATH: ${.CURDIR}/../../forth .include "${.CURDIR}/../../forth/Makefile.inc" diff --git a/sys/boot/userboot/userboot/Makefile b/sys/boot/userboot/userboot/Makefile index 3f5dcace6162..9a8963c9ed65 100644 --- a/sys/boot/userboot/userboot/Makefile +++ b/sys/boot/userboot/userboot/Makefile @@ -30,7 +30,6 @@ SRCS+= vers.c CFLAGS+= -Wall CFLAGS+= -I${.CURDIR}/.. -CFLAGS+= -I${.CURDIR}/../../common CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -ffreestanding -I. @@ -54,9 +53,7 @@ LIBZFSBOOT= ${.OBJDIR}/../zfs/libzfsboot.a .endif # Always add MI sources -.PATH: ${.CURDIR}/../../common -.include "${.CURDIR}/../../common/Makefile.inc" -CFLAGS+= -I${.CURDIR}/../../common +.include "../../loader.mk" CFLAGS+= -I. DPADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSA} LDADD+= ${LIBFICL} ${LIBZFSBOOT} ${LIBSA} From bcbe0c006e3e9403ac1386bbfe99ca8ee99a6635 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:33 +0000 Subject: [PATCH 100/219] tweak style --- sys/boot/ficl.mk | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sys/boot/ficl.mk b/sys/boot/ficl.mk index ef9a11de347a..31ca677e863e 100644 --- a/sys/boot/ficl.mk +++ b/sys/boot/ficl.mk @@ -26,8 +26,7 @@ CFLAGS+= -fPIC CFLAGS+= -m32 -mcpu=powerpc -I. .endif -CFLAGS+= -I${FICLDIR} -I${FICLDIR}/${FICL_CPUARCH} \ - -I${FICLDIR}/../common +CFLAGS+= -I${FICLDIR} -I${FICLDIR}/${FICL_CPUARCH} -I${SRCTOP}/sys/boot/common .if ${MACHINE_CPUARCH} == "amd64" && defined(FICL32) .if !exists(machine) From 8ed8e507755f93d82f5d5c0374de72cacef6ab2b Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:38 +0000 Subject: [PATCH 101/219] create defs.mk for common definitions --- sys/boot/Makefile.inc | 8 ++------ sys/boot/defs.mk | 17 +++++++++++++++++ sys/boot/ficl.mk | 4 ++-- sys/boot/loader.mk | 3 +-- 4 files changed, 22 insertions(+), 10 deletions(-) create mode 100644 sys/boot/defs.mk diff --git a/sys/boot/Makefile.inc b/sys/boot/Makefile.inc index eaa62df8fec3..b83216982df9 100644 --- a/sys/boot/Makefile.inc +++ b/sys/boot/Makefile.inc @@ -2,15 +2,11 @@ .include +.include "defs.mk" + .if !defined(__BOOT_MAKEFILE_INC__) __BOOT_MAKEFILE_INC__=${MFILE} -SASRC=${SRCTOP}/sys/boot/libsa -# Normal Standalone library -LIBSA=${OBJTOP}/sys/boot/libsa/libsa.a -# Standalone library compiled for 32-bit version of the processor -LIBSA32=${OBJTOP}/sys/boot/libsa32/libsa32.a - CFLAGS+=-I${SASRC} SSP_CFLAGS= diff --git a/sys/boot/defs.mk b/sys/boot/defs.mk new file mode 100644 index 000000000000..a84598003567 --- /dev/null +++ b/sys/boot/defs.mk @@ -0,0 +1,17 @@ +# $FreeBSD$ + +.if !defined(__BOOT_DEFS_MK__) +__BOOT_DEFS_MK__=${MFILE} + +BOOTDIR= ${SRCTOP}/sys/boot +FICLDIR= ${SRCTOP}/sys/boot/ficl +LDR_MI= ${BOOTDIR}/common +SASRC= ${SRCTOP}/sys/boot/libsa +SYSDIR= ${SRCTOP}/sys + +# Normal Standalone library +LIBSA= ${OBJTOP}/sys/boot/libsa/libsa.a +# Standalone library compiled for 32-bit version of the processor +LIBSA32= ${OBJTOP}/sys/boot/libsa32/libsa32.a + +.endif # __BOOT_DEFS_MK__ diff --git a/sys/boot/ficl.mk b/sys/boot/ficl.mk index 31ca677e863e..8700362332f0 100644 --- a/sys/boot/ficl.mk +++ b/sys/boot/ficl.mk @@ -2,7 +2,7 @@ # Common flags to build FICL related files -FICLDIR?= ${SRCTOP}/sys/boot/ficl +.include "defs.mk" .if ${MACHINE_CPUARCH} == "amd64" && defined(FICL32) FICL_CPUARCH= i386 @@ -26,7 +26,7 @@ CFLAGS+= -fPIC CFLAGS+= -m32 -mcpu=powerpc -I. .endif -CFLAGS+= -I${FICLDIR} -I${FICLDIR}/${FICL_CPUARCH} -I${SRCTOP}/sys/boot/common +CFLAGS+= -I${FICLDIR} -I${FICLDIR}/${FICL_CPUARCH} -I${LDR_MI} .if ${MACHINE_CPUARCH} == "amd64" && defined(FICL32) .if !exists(machine) diff --git a/sys/boot/loader.mk b/sys/boot/loader.mk index bf241a127526..65ca86728a95 100644 --- a/sys/boot/loader.mk +++ b/sys/boot/loader.mk @@ -1,7 +1,6 @@ # $FreeBSD$ -BOOTDIR=${SRCTOP}/sys/boot -LDR_MI=${BOOTDIR}/common +.include "defs.mk" .PATH: ${LDR_MI} ${BOOTDIR}/libsa From 6b9f688352c672850ed67ad2a31788d3ff024f5d Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:44 +0000 Subject: [PATCH 102/219] Move all the ficl common code into ficl.mk There's a number of copies of basically identical code to enable building forth in /boot/loader. Move it all into ficl.mk. --- sys/boot/arm/uboot/Makefile | 8 -------- sys/boot/defs.mk | 9 +++++++-- sys/boot/efi/boot1/Makefile | 1 + sys/boot/efi/libefi/Makefile | 1 - sys/boot/efi/loader/Makefile | 8 -------- sys/boot/ficl.mk | 2 ++ sys/boot/i386/loader/Makefile | 22 +++++++++------------- sys/boot/loader.mk | 2 +- sys/boot/mips/beri/loader/Makefile | 8 -------- sys/boot/mips/uboot/Makefile | 12 ------------ sys/boot/powerpc/kboot/Makefile | 9 --------- sys/boot/powerpc/ofw/Makefile | 9 +-------- sys/boot/powerpc/ps3/Makefile | 8 -------- sys/boot/powerpc/uboot/Makefile | 8 -------- sys/boot/sparc64/loader/Makefile | 8 -------- sys/boot/userboot/userboot/Makefile | 8 -------- 16 files changed, 21 insertions(+), 102 deletions(-) diff --git a/sys/boot/arm/uboot/Makefile b/sys/boot/arm/uboot/Makefile index ba56279b0f8b..ab9306d30834 100644 --- a/sys/boot/arm/uboot/Makefile +++ b/sys/boot/arm/uboot/Makefile @@ -81,14 +81,6 @@ LIBUBOOT_FDT= ${.OBJDIR}/../../uboot/fdt/libuboot_fdt.a LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/arm -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - # Always add MI sources .include "../../loader.mk" CFLAGS+= -I. diff --git a/sys/boot/defs.mk b/sys/boot/defs.mk index a84598003567..65a4dc22e384 100644 --- a/sys/boot/defs.mk +++ b/sys/boot/defs.mk @@ -1,5 +1,7 @@ # $FreeBSD$ +.include + .if !defined(__BOOT_DEFS_MK__) __BOOT_DEFS_MK__=${MFILE} @@ -9,9 +11,12 @@ LDR_MI= ${BOOTDIR}/common SASRC= ${SRCTOP}/sys/boot/libsa SYSDIR= ${SRCTOP}/sys -# Normal Standalone library +# NB: The makefiles depend on these being empty when we don't build forth. +.if ${MK_FORTH} != "no" +LIBFICL= ${OBJTOP}/sys/boot/ficl/libficl.a +LIBFICL32= ${OBJTOP}/sys/boot/ficl32/libficl.a +.endif LIBSA= ${OBJTOP}/sys/boot/libsa/libsa.a -# Standalone library compiled for 32-bit version of the processor LIBSA32= ${OBJTOP}/sys/boot/libsa32/libsa32.a .endif # __BOOT_DEFS_MK__ diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index 6375a796886f..2018e776a02e 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -5,6 +5,7 @@ MAN= .include "../Makefile.inc" MK_SSP= no +MK_FORTH= no PROG= boot1.sym INTERNALPROG= diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile index e94098616359..6f3c17236a9b 100644 --- a/sys/boot/efi/libefi/Makefile +++ b/sys/boot/efi/libefi/Makefile @@ -3,7 +3,6 @@ .include .if ${MK_FORTH} != "no" -CFLAGS+= -DBOOT_FORTH .include "../../ficl.mk" .endif diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index 006e544f19e3..2b3aa2b31d84 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -78,14 +78,6 @@ CFLAGS+= -DSMBIOS_NETWORK_ENDIAN_UUID .endif .endif -.if ${MK_FORTH} != "no" -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -CFLAGS+= -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/${MACHINE_CPUARCH} -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - LOADER_FDT_SUPPORT?= no .if ${MK_FDT} != "no" && ${LOADER_FDT_SUPPORT} != "no" CFLAGS+= -I${.CURDIR}/../../fdt diff --git a/sys/boot/ficl.mk b/sys/boot/ficl.mk index 8700362332f0..bde0cc423e70 100644 --- a/sys/boot/ficl.mk +++ b/sys/boot/ficl.mk @@ -27,6 +27,8 @@ CFLAGS+= -m32 -mcpu=powerpc -I. .endif CFLAGS+= -I${FICLDIR} -I${FICLDIR}/${FICL_CPUARCH} -I${LDR_MI} +CFLAGS+= -DBOOT_FORTH +CFLAGS+= -DBF_DICTSIZE=15000 .if ${MACHINE_CPUARCH} == "amd64" && defined(FICL32) .if !exists(machine) diff --git a/sys/boot/i386/loader/Makefile b/sys/boot/i386/loader/Makefile index b5b169e2717c..68413c96a110 100644 --- a/sys/boot/i386/loader/Makefile +++ b/sys/boot/i386/loader/Makefile @@ -42,17 +42,6 @@ HAVE_BCACHE= yes HAVE_PNP= yes HAVE_ISABUS= yes -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -I${.CURDIR}/../../ficl/i386 -.if ${MACHINE_CPUARCH} == "amd64" -LIBFICL= ${.OBJDIR}/../../ficl32/libficl.a -.else -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif -.endif - .if defined(LOADER_BZIP2_SUPPORT) CFLAGS+= -DLOADER_BZIP2_SUPPORT .endif @@ -119,8 +108,15 @@ FILES+= loader.rc menu.rc # XXX crt0.o needs to be first for pxeboot(8) to work OBJS= ${BTXCRT} -DPADD= ${LIBFICL} ${LIBFIREWIRE} ${LIBZFSBOOT} ${LIBI386} ${LIBGELIBOOT} ${LIBSA32} -LDADD= ${LIBFICL} ${LIBFIREWIRE} ${LIBZFSBOOT} ${LIBI386} ${LIBGELIBOOT} ${LIBSA32} +# XXX not happy with this construct, revisit +.if ${MACHINE_CPUARCH} == "amd64" +FICL= ${LIBFICL32} +.else +FICL= ${LIBFICL} +.endif + +DPADD= ${FICL} ${LIBFIREWIRE} ${LIBZFSBOOT} ${LIBI386} ${LIBGELIBOOT} ${LIBSA32} +LDADD= ${FICL} ${LIBFIREWIRE} ${LIBZFSBOOT} ${LIBI386} ${LIBGELIBOOT} ${LIBSA32} .include diff --git a/sys/boot/loader.mk b/sys/boot/loader.mk index 65ca86728a95..6e71cda7b2af 100644 --- a/sys/boot/loader.mk +++ b/sys/boot/loader.mk @@ -64,7 +64,7 @@ SRCS+= pnp.c .endif # Forth interpreter -.if defined(BOOT_FORTH) +.if ${MK_FORTH} != "no" SRCS+= interp_forth.c .include "${BOOTDIR}/ficl.mk" .endif diff --git a/sys/boot/mips/beri/loader/Makefile b/sys/boot/mips/beri/loader/Makefile index aec550cc038c..db11b1fa2051 100644 --- a/sys/boot/mips/beri/loader/Makefile +++ b/sys/boot/mips/beri/loader/Makefile @@ -68,14 +68,6 @@ CFLAGS+= -DLOADER_BZIP2_SUPPORT #CFLAGS+= -DLOADER_NFS_SUPPORT #CFLAGS+= -DLOADER_TFTP_SUPPORT -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../../ficl -CFLAGS+= -I${.CURDIR}/../../../ficl/mips64 -LIBFICL= ${.OBJDIR}/../../../ficl/libficl.a -.endif - # Always add MI sources .include "../../../loader.mk" diff --git a/sys/boot/mips/uboot/Makefile b/sys/boot/mips/uboot/Makefile index 3efafafe23af..2b36c2eb328e 100644 --- a/sys/boot/mips/uboot/Makefile +++ b/sys/boot/mips/uboot/Makefile @@ -81,18 +81,6 @@ LIBUBOOT_FDT= ${.OBJDIR}/../../uboot/fdt/libuboot_fdt.a LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -.if ${MACHINE_ARCH:Mmips64*} != "" -CFLAGS+= -I${.CURDIR}/../../ficl/mips64 -.else -CFLAGS+= -I${.CURDIR}/../../ficl/mips -.endif -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - # Always add MI sources .include "../../loader.mk" CFLAGS+= -I. diff --git a/sys/boot/powerpc/kboot/Makefile b/sys/boot/powerpc/kboot/Makefile index f5767f972ac9..252eb80c0a2e 100644 --- a/sys/boot/powerpc/kboot/Makefile +++ b/sys/boot/powerpc/kboot/Makefile @@ -60,15 +60,6 @@ CFLAGS+= -DLOADER_FDT_SUPPORT LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif - -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/powerpc -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - CFLAGS+= -mcpu=powerpc64 # Always add MI sources diff --git a/sys/boot/powerpc/ofw/Makefile b/sys/boot/powerpc/ofw/Makefile index b170812559f6..5a04c7df6825 100644 --- a/sys/boot/powerpc/ofw/Makefile +++ b/sys/boot/powerpc/ofw/Makefile @@ -60,16 +60,9 @@ CFLAGS+= -DLOADER_FDT_SUPPORT LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/powerpc -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - # Always add MI sources .include "../../loader.mk" + .PATH: ${.CURDIR}/../../../libkern CFLAGS+= -I${.CURDIR}/../../.. CFLAGS+= -I. diff --git a/sys/boot/powerpc/ps3/Makefile b/sys/boot/powerpc/ps3/Makefile index f6b3d41c2b98..bce98ff84343 100644 --- a/sys/boot/powerpc/ps3/Makefile +++ b/sys/boot/powerpc/ps3/Makefile @@ -61,14 +61,6 @@ LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/powerpc -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - CFLAGS+= -mcpu=powerpc64 # Always add MI sources diff --git a/sys/boot/powerpc/uboot/Makefile b/sys/boot/powerpc/uboot/Makefile index 5a88546d5ce3..eaa551e64ded 100644 --- a/sys/boot/powerpc/uboot/Makefile +++ b/sys/boot/powerpc/uboot/Makefile @@ -66,14 +66,6 @@ LIBUBOOT_FDT= ${.OBJDIR}/../../uboot/fdt/libuboot_fdt.a LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/powerpc -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - # Always add MI sources .include "../../loader.mk" .PATH: ${.CURDIR}/../../../libkern diff --git a/sys/boot/sparc64/loader/Makefile b/sys/boot/sparc64/loader/Makefile index 4825a76ddd6b..1dfb1535da01 100644 --- a/sys/boot/sparc64/loader/Makefile +++ b/sys/boot/sparc64/loader/Makefile @@ -57,14 +57,6 @@ CFLAGS+= -DLOADER_NFS_SUPPORT CFLAGS+= -DLOADER_TFTP_SUPPORT .endif -.if ${MK_FORTH} != "no" -# Enable BootForth -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/sparc64 -LIBFICL= ${.OBJDIR}/../../ficl/libficl.a -.endif - # Always add MI sources .include "../../loader.mk" CFLAGS+= -I. diff --git a/sys/boot/userboot/userboot/Makefile b/sys/boot/userboot/userboot/Makefile index 9a8963c9ed65..851454859c94 100644 --- a/sys/boot/userboot/userboot/Makefile +++ b/sys/boot/userboot/userboot/Makefile @@ -39,14 +39,6 @@ LDFLAGS+= -nostdlib -Wl,-Bsymbolic NEWVERSWHAT= "User boot" ${MACHINE_CPUARCH} -.if ${MK_FORTH} != "no" -BOOT_FORTH= yes -CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -CFLAGS+= -I${.CURDIR}/../../ficl/i386 -CFLAGS+= -DBF_DICTSIZE=15000 -LIBFICL= ${.OBJDIR}/../ficl/libficl.a -.endif - .if ${MK_ZFS} != "no" CFLAGS+= -DUSERBOOT_ZFS_SUPPORT LIBZFSBOOT= ${.OBJDIR}/../zfs/libzfsboot.a From a7fa2fb669005dba5ef2ddd7eb6d00ad27ddcfbf Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:52 +0000 Subject: [PATCH 103/219] LOADER_foo_SUPPORTED --- sys/boot/arm/uboot/Makefile | 47 ++----------------------- sys/boot/defs.mk | 52 ++++++++++++++++++++++++++++ sys/boot/efi/libefi/Makefile | 1 + sys/boot/efi/loader/Makefile | 5 +++ sys/boot/i386/libi386/Makefile | 9 ++--- sys/boot/i386/loader/Makefile | 23 ++++--------- sys/boot/i386/zfsboot/Makefile | 2 ++ sys/boot/loader.mk | 18 +++------- sys/boot/mips/beri/loader/Makefile | 14 ++++---- sys/boot/mips/uboot/Makefile | 53 ++--------------------------- sys/boot/powerpc/kboot/Makefile | 31 ++--------------- sys/boot/powerpc/ofw/Makefile | 31 ++--------------- sys/boot/powerpc/ps3/Makefile | 29 ---------------- sys/boot/powerpc/uboot/Makefile | 38 +-------------------- sys/boot/sparc64/loader/Makefile | 26 ++------------ sys/boot/uboot/lib/Makefile | 5 --- sys/boot/userboot/userboot/Makefile | 5 +++ 17 files changed, 95 insertions(+), 294 deletions(-) diff --git a/sys/boot/arm/uboot/Makefile b/sys/boot/arm/uboot/Makefile index ab9306d30834..cc7ee64be27b 100644 --- a/sys/boot/arm/uboot/Makefile +++ b/sys/boot/arm/uboot/Makefile @@ -19,60 +19,17 @@ SRCS= start.S conf.c self_reloc.c vers.c CWARNFLAGS.self_reloc.c+= -Wno-error=maybe-uninitialized .endif -.if !defined(LOADER_NO_DISK_SUPPORT) -LOADER_DISK_SUPPORT?= yes -.else -LOADER_DISK_SUPPORT= no -.endif LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= no +LOADER_MSDOS_SUPPORT?= no LOADER_EXT2FS_SUPPORT?= no -.if ${MK_NAND} != "no" -LOADER_NANDFS_SUPPORT?= yes -.else -LOADER_NANDFS_SUPPORT?= no -.endif LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= no LOADER_GZIP_SUPPORT?= no LOADER_BZIP2_SUPPORT?= no -.if ${MK_FDT} != "no" -LOADER_FDT_SUPPORT= yes -.else -LOADER_FDT_SUPPORT= no -.endif +LOADER_FDT_SUPPORT= ${MK_FDT} -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_NANDFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NANDFS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" CFLAGS+= -I${.CURDIR}/../../fdt CFLAGS+= -I${.OBJDIR}/../../fdt diff --git a/sys/boot/defs.mk b/sys/boot/defs.mk index 65a4dc22e384..8380f7d9ec71 100644 --- a/sys/boot/defs.mk +++ b/sys/boot/defs.mk @@ -19,4 +19,56 @@ LIBFICL32= ${OBJTOP}/sys/boot/ficl32/libficl.a LIBSA= ${OBJTOP}/sys/boot/libsa/libsa.a LIBSA32= ${OBJTOP}/sys/boot/libsa32/libsa32.a +# Standard options: + +# Filesystem support +.if ${LOADER_CD9660_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_CD9660_SUPPORT +.endif +.if ${LOADER_EXT2FS_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_EXT2FS_SUPPORT +.endif +.if ${LOADER_MSDOS_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_MSDOS_SUPPORT +.endif +.if ${LOADER_NANDFS_SUPPORT:U${MK_NAND}} == "yes" +CFLAGS+= -DLOADER_NANDFS_SUPPORT +.endif +.if ${LOADER_UFS_SUPPORT:Uyes} == "yes" +CFLAGS+= -DLOADER_UFS_SUPPORT +.endif + +# Compression +.if ${LOADER_GZIP_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_GZIP_SUPPORT +.endif +.if ${LOADER_BZIP2_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_BZIP2_SUPPORT +.endif + +# Network related things +.if ${LOADER_NET_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_NET_SUPPORT +.endif +.if ${LOADER_NFS_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_NFS_SUPPORT +.endif +.if ${LOADER_TFTP_SUPPORT:Uno} == "yes" +CFLAGS+= -DLOADER_TFTP_SUPPORT +.endif + +# Disk and partition support +.if ${LOADER_DISK_SUPPORT:Uyes} == "yes" +CFLAGS+= -DLOADER_DISK_SUPPORT +.if ${LOADER_GPT_SUPPORT:Uyes} == "yes" +CFLAGS+= -DLOADER_GPT_SUPPORT +.endif +.if ${LOADER_MBR_SUPPORT:Uyes} == "yes" +CFLAGS+= -DLOADER_MBR_SUPPORT +.endif +.if ${LOADER_GELI_SUPPORT:Uyes} == "yes" +CFLAGS+= -DLOADER_GELI_SUPPORT +.endif +.endif + .endif # __BOOT_DEFS_MK__ diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile index 6f3c17236a9b..27e801d125f0 100644 --- a/sys/boot/efi/libefi/Makefile +++ b/sys/boot/efi/libefi/Makefile @@ -35,6 +35,7 @@ CFLAGS+= -mgeneral-regs-only .if ${MACHINE_ARCH} == "amd64" CFLAGS+= -fPIC -mno-red-zone .endif +CFLAGS+= -I${SYSDIR} CFLAGS+= -I${.CURDIR}/../include CFLAGS+= -I${.CURDIR}/../include/${MACHINE} .if ${MK_ZFS} != "no" diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index 2b3aa2b31d84..d73b9a9fbd9a 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -11,6 +11,11 @@ INTERNALPROG= WARNS?= 3 LOADER_NET_SUPPORT?= yes +LOADER_MSDOS_SUPPORT?= yes +LOADER_UFS_SUPPORT?= yes +LOADER_CD9660_SUPPORT?= no +LOADER_EXT2FS_SUPPORT?= no + # architecture-specific loader code SRCS= autoload.c \ bootinfo.c \ diff --git a/sys/boot/i386/libi386/Makefile b/sys/boot/i386/libi386/Makefile index 70714b8e78e2..98f6d686a526 100644 --- a/sys/boot/i386/libi386/Makefile +++ b/sys/boot/i386/libi386/Makefile @@ -1,5 +1,7 @@ # $FreeBSD$ # +.include "../../defs.mk" + LIB= i386 INTERNALLIB= @@ -12,13 +14,6 @@ SRCS= biosacpi.c bioscd.c biosdisk.c biosmem.c biospnp.c \ .PATH: ${.CURDIR}/../../zfs SRCS+= devicename_stubs.c -.if defined(LOADER_TFTP_SUPPORT) -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif -.if defined(LOADER_NFS_SUPPORT) -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif - BOOT_COMCONSOLE_PORT?= 0x3f8 CFLAGS+= -DCOMPORT=${BOOT_COMCONSOLE_PORT} diff --git a/sys/boot/i386/loader/Makefile b/sys/boot/i386/loader/Makefile index 68413c96a110..1f3046b97910 100644 --- a/sys/boot/i386/loader/Makefile +++ b/sys/boot/i386/loader/Makefile @@ -13,6 +13,11 @@ LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= yes +LOADER_CD9660_SUPPORT?= no +LOADER_EXT2FS_SUPPORT?= no +LOADER_MSDOS_SUPPORT?= no +LOADER_UFS_SUPPORT?= yes + # architecture-specific loader code SRCS= main.c conf.c vers.c chain.c @@ -28,13 +33,6 @@ CFLAGS+= -DLOADER_ZFS_SUPPORT LIBZFSBOOT= ${.OBJDIR}/../../zfs/libzfsboot.a .endif -.if defined(LOADER_TFTP_SUPPORT) -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif -.if defined(LOADER_NFS_SUPPORT) -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif - # Include bcache code. HAVE_BCACHE= yes @@ -42,16 +40,7 @@ HAVE_BCACHE= yes HAVE_PNP= yes HAVE_ISABUS= yes -.if defined(LOADER_BZIP2_SUPPORT) -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if !defined(LOADER_NO_GZIP_SUPPORT) -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if defined(LOADER_NANDFS_SUPPORT) -CFLAGS+= -DLOADER_NANDFS_SUPPORT -.endif -.if !defined(LOADER_NO_GELI_SUPPORT) +.if ${LOADER_GELI_SUPPORT:Uyes} == "yes" CFLAGS+= -DLOADER_GELI_SUPPORT CFLAGS+= -I${.CURDIR}/../../geli LIBGELIBOOT= ${.OBJDIR}/../../geli/libgeliboot.a diff --git a/sys/boot/i386/zfsboot/Makefile b/sys/boot/i386/zfsboot/Makefile index 304263342466..6fd2fe433f01 100644 --- a/sys/boot/i386/zfsboot/Makefile +++ b/sys/boot/i386/zfsboot/Makefile @@ -1,5 +1,7 @@ # $FreeBSD$ +LOADER_GELI_SUPPORT=no + .include "../Makefile.inc" .PATH: ${.CURDIR}/../boot2 ${.CURDIR}/../common \ diff --git a/sys/boot/loader.mk b/sys/boot/loader.mk index 6e71cda7b2af..814cef256c81 100644 --- a/sys/boot/loader.mk +++ b/sys/boot/loader.mk @@ -28,22 +28,12 @@ SRCS+= load_elf64.c reloc_elf64.c SRCS+= load_elf32.c reloc_elf32.c .endif -.if defined(LOADER_NET_SUPPORT) -SRCS+= dev_net.c +.if ${LOADER_DISK_SUPPORT:Uyes} == "yes" +SRCS+= disk.c part.c .endif -.if !defined(LOADER_NO_DISK_SUPPORT) -SRCS+= disk.c part.c -CFLAGS+= -DLOADER_DISK_SUPPORT -.if !defined(LOADER_NO_GPT_SUPPORT) -CFLAGS+= -DLOADER_GPT_SUPPORT -.endif -.if !defined(LOADER_NO_MBR_SUPPORT) -CFLAGS+= -DLOADER_MBR_SUPPORT -.endif -.endif -.if !defined(LOADER_NO_GELI_SUPPORT) -CFLAGS+= -DLOADER_GELI_SUPPORT +.if ${LOADER_NET_SUPPORT:Uno} == "yes" +SRCS+= dev_net.c .endif .if defined(HAVE_BCACHE) diff --git a/sys/boot/mips/beri/loader/Makefile b/sys/boot/mips/beri/loader/Makefile index db11b1fa2051..b5aa09b779b5 100644 --- a/sys/boot/mips/beri/loader/Makefile +++ b/sys/boot/mips/beri/loader/Makefile @@ -59,14 +59,12 @@ SRCS+= altera_jtag_uart.c \ # Since we don't have a backward compatibility issue, default to this on BERI. CFLAGS+= -DBOOT_PROMPT_123 -CFLAGS+= -DLOADER_DISK_SUPPORT -CFLAGS+= -DLOADER_UFS_SUPPORT -CFLAGS+= -DLOADER_GZIP_SUPPORT -CFLAGS+= -DLOADER_BZIP2_SUPPORT - -#CFLAGS+= -DLOADER_NET_SUPPORT -#CFLAGS+= -DLOADER_NFS_SUPPORT -#CFLAGS+= -DLOADER_TFTP_SUPPORT +LOADER_MSDOS_SUPPORT?= yes +LOADER_UFS_SUPPORT?= yes +LOADER_CD9660_SUPPORT?= no +LOADER_EXT2FS_SUPPORT?= no +LOADER_GZIP_SUPPORT?= yes +LOADER_BZIP2_SUPPORT?= yes # Always add MI sources .include "../../../loader.mk" diff --git a/sys/boot/mips/uboot/Makefile b/sys/boot/mips/uboot/Makefile index 2b36c2eb328e..89ed58fe6a2f 100644 --- a/sys/boot/mips/uboot/Makefile +++ b/sys/boot/mips/uboot/Makefile @@ -15,64 +15,17 @@ UBLDR_LOADADDR?= 0xffffffff80800000 # Architecture-specific loader code SRCS= start.S conf.c vers.c -.if !defined(LOADER_NO_DISK_SUPPORT) -LOADER_DISK_SUPPORT?= yes -.else -LOADER_DISK_SUPPORT= no -.endif -LOADER_MSDOS_SUPPORT?= yes -LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= no LOADER_EXT2FS_SUPPORT?= no -.if ${MK_NAND} != "no" -LOADER_NANDFS_SUPPORT?= yes -.else -LOADER_NANDFS_SUPPORT?= no -.endif +LOADER_MSDOS_SUPPORT?= yes +LOADER_UFS_SUPPORT?= yes LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= no LOADER_GZIP_SUPPORT?= no LOADER_BZIP2_SUPPORT?= no -.if ${MK_FDT} != "no" -LOADER_FDT_SUPPORT= yes -.else -LOADER_FDT_SUPPORT= no -.endif +LOADER_FDT_SUPPORT= ${MK_FDT} -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_MSDOS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_MSDOS_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_NANDFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NANDFS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" CFLAGS+= -I${.CURDIR}/../../fdt CFLAGS+= -I${.OBJDIR}/../../fdt diff --git a/sys/boot/powerpc/kboot/Makefile b/sys/boot/powerpc/kboot/Makefile index 252eb80c0a2e..d579f3110bfe 100644 --- a/sys/boot/powerpc/kboot/Makefile +++ b/sys/boot/powerpc/kboot/Makefile @@ -14,10 +14,10 @@ SRCS= conf.c metadata.c vers.c main.c ppc64_elf_freebsd.c SRCS+= host_syscall.S hostcons.c hostdisk.c kerneltramp.S kbootfdt.c SRCS+= ucmpdi2.c -LOADER_DISK_SUPPORT?= yes -LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= yes +LOADER_MSDOS_SUPPORT?= no LOADER_EXT2FS_SUPPORT?= yes +LOADER_UFS_SUPPORT?= yes LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= no @@ -25,33 +25,6 @@ LOADER_GZIP_SUPPORT?= yes LOADER_FDT_SUPPORT= yes LOADER_BZIP2_SUPPORT?= no -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" CFLAGS+= -I${.CURDIR}/../../fdt CFLAGS+= -I${.OBJDIR}/../../fdt diff --git a/sys/boot/powerpc/ofw/Makefile b/sys/boot/powerpc/ofw/Makefile index 5a04c7df6825..4471507c8419 100644 --- a/sys/boot/powerpc/ofw/Makefile +++ b/sys/boot/powerpc/ofw/Makefile @@ -13,10 +13,10 @@ INSTALLFLAGS= -b SRCS= conf.c metadata.c vers.c start.c SRCS+= ucmpdi2.c -LOADER_DISK_SUPPORT?= yes -LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= yes LOADER_EXT2FS_SUPPORT?= no +LOADER_MSDOS_SUPPORT?= no +LOADER_UFS_SUPPORT?= yes LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= no @@ -24,33 +24,6 @@ LOADER_GZIP_SUPPORT?= yes LOADER_BZIP2_SUPPORT?= no LOADER_FDT_SUPPORT?= yes -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" SRCS+= ofwfdt.c CFLAGS+= -I${.CURDIR}/../../fdt diff --git a/sys/boot/powerpc/ps3/Makefile b/sys/boot/powerpc/ps3/Makefile index bce98ff84343..246d1f4ae0d1 100644 --- a/sys/boot/powerpc/ps3/Makefile +++ b/sys/boot/powerpc/ps3/Makefile @@ -15,7 +15,6 @@ SRCS+= lv1call.S ps3cons.c font.h ps3mmu.c ps3net.c ps3repo.c \ ps3stor.c ps3disk.c ps3cdrom.c SRCS+= ucmpdi2.c -LOADER_DISK_SUPPORT?= yes LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= yes LOADER_EXT2FS_SUPPORT?= yes @@ -26,33 +25,6 @@ LOADER_GZIP_SUPPORT?= yes LOADER_FDT_SUPPORT?= no LOADER_BZIP2_SUPPORT?= no -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" CFLAGS+= -I${.CURDIR}/../../fdt CFLAGS+= -I${.OBJDIR}/../../fdt @@ -60,7 +32,6 @@ CFLAGS+= -DLOADER_FDT_SUPPORT LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif - CFLAGS+= -mcpu=powerpc64 # Always add MI sources diff --git a/sys/boot/powerpc/uboot/Makefile b/sys/boot/powerpc/uboot/Makefile index eaa551e64ded..68b9bd48c454 100644 --- a/sys/boot/powerpc/uboot/Makefile +++ b/sys/boot/powerpc/uboot/Makefile @@ -12,11 +12,6 @@ MAN= SRCS= start.S conf.c vers.c SRCS+= ucmpdi2.c -.if !defined(LOADER_NO_DISK_SUPPORT) -LOADER_DISK_SUPPORT?= yes -.else -LOADER_DISK_SUPPORT= no -.endif LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= no LOADER_EXT2FS_SUPPORT?= no @@ -25,39 +20,8 @@ LOADER_NFS_SUPPORT?= yes LOADER_TFTP_SUPPORT?= no LOADER_GZIP_SUPPORT?= no LOADER_BZIP2_SUPPORT?= no -.if ${MK_FDT} != "no" -LOADER_FDT_SUPPORT= yes -.else -LOADER_FDT_SUPPORT= no -.endif +LOADER_FDT_SUPPORT= ${MK_FDT} -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif -.if ${LOADER_EXT2FS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_EXT2FS_SUPPORT -.endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif .if ${LOADER_FDT_SUPPORT} == "yes" CFLAGS+= -I${.CURDIR}/../../fdt CFLAGS+= -I${.OBJDIR}/../../fdt diff --git a/sys/boot/sparc64/loader/Makefile b/sys/boot/sparc64/loader/Makefile index 1dfb1535da01..4642c111c5f8 100644 --- a/sys/boot/sparc64/loader/Makefile +++ b/sys/boot/sparc64/loader/Makefile @@ -15,6 +15,8 @@ SRCS= locore.S main.c metadata.c vers.c LOADER_DISK_SUPPORT?= yes LOADER_UFS_SUPPORT?= yes LOADER_CD9660_SUPPORT?= yes +LOADER_EXT2FS_SUPPORT?= no +LOADER_MSDOS_SUPPORT?= no LOADER_ZFS_SUPPORT?= no LOADER_NET_SUPPORT?= yes LOADER_NFS_SUPPORT?= yes @@ -26,36 +28,12 @@ LOADER_DEBUG?= no .if ${LOADER_DEBUG} == "yes" CFLAGS+= -DLOADER_DEBUG .endif -.if ${LOADER_DISK_SUPPORT} == "yes" -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif -.if ${LOADER_UFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_UFS_SUPPORT -.endif -.if ${LOADER_CD9660_SUPPORT} == "yes" -CFLAGS+= -DLOADER_CD9660_SUPPORT -.endif .if ${LOADER_ZFS_SUPPORT} == "yes" CFLAGS+= -DLOADER_ZFS_SUPPORT CFLAGS+= -I${.CURDIR}/../../zfs CFLAGS+= -I${.CURDIR}/../../../cddl/boot/zfs LIBZFSBOOT= ${.OBJDIR}/../../zfs/libzfsboot.a .endif -.if ${LOADER_GZIP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_GZIP_SUPPORT -.endif -.if ${LOADER_BZIP2_SUPPORT} == "yes" -CFLAGS+= -DLOADER_BZIP2_SUPPORT -.endif -.if ${LOADER_NET_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NET_SUPPORT -.endif -.if ${LOADER_NFS_SUPPORT} == "yes" -CFLAGS+= -DLOADER_NFS_SUPPORT -.endif -.if ${LOADER_TFTP_SUPPORT} == "yes" -CFLAGS+= -DLOADER_TFTP_SUPPORT -.endif # Always add MI sources .include "../../loader.mk" diff --git a/sys/boot/uboot/lib/Makefile b/sys/boot/uboot/lib/Makefile index c80c859b3ec3..4ea53f851a5e 100644 --- a/sys/boot/uboot/lib/Makefile +++ b/sys/boot/uboot/lib/Makefile @@ -13,11 +13,6 @@ SRCS+= module.c net.c reboot.c time.c CFLAGS+= -ffreestanding -msoft-float -.if !defined(LOADER_NO_DISK_SUPPORT) -SRCS+= disk.c -CFLAGS+= -DLOADER_DISK_SUPPORT -.endif - .if ${MK_FDT} != "no" LOADER_FDT_SUPPORT= yes .else diff --git a/sys/boot/userboot/userboot/Makefile b/sys/boot/userboot/userboot/Makefile index 851454859c94..d8fb60881782 100644 --- a/sys/boot/userboot/userboot/Makefile +++ b/sys/boot/userboot/userboot/Makefile @@ -5,6 +5,11 @@ MAN= .include MK_SSP= no +LOADER_MSDOS_SUPPORT?= yes +LOADER_UFS_SUPPORT?= yes +LOADER_CD9660_SUPPORT?= no +LOADER_EXT2FS_SUPPORT?= no + SHLIB_NAME= userboot.so MK_CTF= no STRIP= From e4e7fb2337537da7256716b6bd4fc2a409be8dc7 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Mon, 16 Oct 2017 03:59:58 +0000 Subject: [PATCH 104/219] Explicitly inlcude SYSDIR in the include path -- need machine path too? --- sys/boot/libsa/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/boot/libsa/Makefile b/sys/boot/libsa/Makefile index cdd4a86a5ad2..b870443e7fc7 100644 --- a/sys/boot/libsa/Makefile +++ b/sys/boot/libsa/Makefile @@ -21,7 +21,7 @@ LIB?= sa NO_PIC= WARNS?= 0 -CFLAGS+= -I${SASRC} +CFLAGS+= -I${SASRC} -I${SYSDIR} # standalone components and stuff we have modified locally SRCS+= gzguts.h zutil.h __main.c assert.c bcd.c environment.c getopt.c gets.c \ From e2a596363565778ae1d2ca3195270f037ccb5137 Mon Sep 17 00:00:00 2001 From: Xin LI Date: Mon, 16 Oct 2017 04:46:28 +0000 Subject: [PATCH 105/219] Remove the libstand directory which is now empty. From c2803f1a046713ae7284a285ccf9484788c8401e Mon Sep 17 00:00:00 2001 From: Andriy Voskoboinyk Date: Mon, 16 Oct 2017 06:54:26 +0000 Subject: [PATCH 106/219] libifconfig: allow to get original interface name via ifconfig_get_orig_name() Uses the same method as in tools/tools/ifinfo/ifinfo.c (via net.link.generic sysctl). Tested with modified wlandebug(8). Differential Revision: https://reviews.freebsd.org/D12554 --- lib/libifconfig/libifconfig.c | 95 +++++++++++++++++++++++++++++++++++ lib/libifconfig/libifconfig.h | 2 + 2 files changed, 97 insertions(+) diff --git a/lib/libifconfig/libifconfig.c b/lib/libifconfig/libifconfig.c index 1f57d3fdd73b..07b5145d6311 100644 --- a/lib/libifconfig/libifconfig.c +++ b/lib/libifconfig/libifconfig.c @@ -61,9 +61,43 @@ * $FreeBSD$ */ + /* + * Copyright 1996 Massachusetts Institute of Technology + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose and without fee is hereby + * granted, provided that both the above copyright notice and this + * permission notice appear in all copies, that both the above + * copyright notice and this permission notice appear in all + * supporting documentation, and that the name of M.I.T. not be used + * in advertising or publicity pertaining to distribution of the + * software without specific, written prior permission. M.I.T. makes + * no representations about the suitability of this software for any + * purpose. It is provided "as is" without express or implied + * warranty. + * + * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS + * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include #include +#include #include +#include #include #include @@ -247,6 +281,67 @@ ifconfig_set_name(ifconfig_handle_t *h, const char *name, const char *newname) return (0); } +int +ifconfig_get_orig_name(ifconfig_handle_t *h, const char *ifname, + char **orig_name) +{ + struct ifmibdata ifmd; + size_t len; + int name[6]; + int i, maxifno; + + name[0] = CTL_NET; + name[1] = PF_LINK; + name[2] = NETLINK_GENERIC; + name[3] = IFMIB_SYSTEM; + name[4] = IFMIB_IFCOUNT; + + len = sizeof maxifno; + if (sysctl(name, 5, &maxifno, &len, 0, 0) < 0) { + h->error.errtype = OTHER; + h->error.errcode = errno; + return (-1); + } + + name[3] = IFMIB_IFDATA; + name[5] = IFDATA_GENERAL; + for (i = 1; i <= maxifno; i++) { + len = sizeof ifmd; + name[4] = i; + if (sysctl(name, 6, &ifmd, &len, 0, 0) < 0) { + if (errno == ENOENT) + continue; + + goto fail; + } + + if (strncmp(ifmd.ifmd_name, ifname, IFNAMSIZ) != 0) + continue; + + len = 0; + name[5] = IFDATA_DRIVERNAME; + if (sysctl(name, 6, NULL, &len, 0, 0) < 0) + goto fail; + + *orig_name = malloc(len); + if (*orig_name == NULL) + goto fail; + + if (sysctl(name, 6, *orig_name, &len, 0, 0) < 0) { + free(*orig_name); + *orig_name = NULL; + goto fail; + } + + return (0); + } + +fail: + h->error.errtype = OTHER; + h->error.errcode = (i <= maxifno) ? errno : ENOENT; + return (-1); +} + int ifconfig_set_mtu(ifconfig_handle_t *h, const char *name, const int mtu) { diff --git a/lib/libifconfig/libifconfig.h b/lib/libifconfig/libifconfig.h index de635334ad7a..b5508740de10 100644 --- a/lib/libifconfig/libifconfig.h +++ b/lib/libifconfig/libifconfig.h @@ -82,6 +82,8 @@ int ifconfig_set_description(ifconfig_handle_t *h, const char *name, int ifconfig_unset_description(ifconfig_handle_t *h, const char *name); int ifconfig_set_name(ifconfig_handle_t *h, const char *name, const char *newname); +int ifconfig_get_orig_name(ifconfig_handle_t *h, const char *ifname, + char **orig_name); int ifconfig_set_mtu(ifconfig_handle_t *h, const char *name, const int mtu); int ifconfig_get_mtu(ifconfig_handle_t *h, const char *name, int *mtu); int ifconfig_set_metric(ifconfig_handle_t *h, const char *name, From 238c9eb65af22393584c3569f654015d31f4b9cf Mon Sep 17 00:00:00 2001 From: Andriy Voskoboinyk Date: Mon, 16 Oct 2017 07:01:27 +0000 Subject: [PATCH 107/219] wlandebug(8): obtain original interface name via ifconfig_get_orig_name() --- usr.sbin/wlandebug/Makefile | 2 ++ usr.sbin/wlandebug/wlandebug.c | 21 ++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/usr.sbin/wlandebug/Makefile b/usr.sbin/wlandebug/Makefile index e916c23e7512..7ac993319947 100644 --- a/usr.sbin/wlandebug/Makefile +++ b/usr.sbin/wlandebug/Makefile @@ -3,6 +3,8 @@ PROG= wlandebug MAN= wlandebug.8 +LIBADD+= ifconfig + WARNS?= 2 .include diff --git a/usr.sbin/wlandebug/wlandebug.c b/usr.sbin/wlandebug/wlandebug.c index 9bec123b5f63..f7227eb8be96 100644 --- a/usr.sbin/wlandebug/wlandebug.c +++ b/usr.sbin/wlandebug/wlandebug.c @@ -43,6 +43,8 @@ #include #include +#include + #define N(a) (sizeof(a)/sizeof(a[0])) const char *progname; @@ -160,6 +162,21 @@ setoid(char oid[], size_t oidlen, const char *wlan) #endif } +static void +get_orig_iface_name(char *oid, size_t oid_size, char *name) +{ + struct ifconfig_handle *h; + char *orig_name; + + h = ifconfig_open(); + if (ifconfig_get_orig_name(h, name, &orig_name) < 0) + errc(1, ifconfig_err_errno(h), "cannot get interface name"); + + ifconfig_close(h); + setoid(oid, oid_size, orig_name); + free(orig_name); +} + int main(int argc, char *argv[]) { @@ -179,9 +196,7 @@ main(int argc, char *argv[]) } else if (strcmp(argv[1], "-i") == 0) { if (argc <= 2) errx(1, "missing interface name for -i option"); - if (strncmp(argv[2], "wlan", 4) != 0) - errx(1, "expecting a wlan interface name"); - setoid(oid, sizeof(oid), argv[2]); + get_orig_iface_name(oid, sizeof(oid), argv[2]); argc -= 2, argv += 2; } else if (strcmp(argv[1], "-?") == 0) usage(); From 3ce85fa36bfdcbb49678ed24d79f911c59373a1d Mon Sep 17 00:00:00 2001 From: Andriy Voskoboinyk Date: Mon, 16 Oct 2017 07:15:50 +0000 Subject: [PATCH 108/219] wlandebug(8): add a sanity check. --- usr.sbin/wlandebug/wlandebug.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/usr.sbin/wlandebug/wlandebug.c b/usr.sbin/wlandebug/wlandebug.c index f7227eb8be96..b5c635074300 100644 --- a/usr.sbin/wlandebug/wlandebug.c +++ b/usr.sbin/wlandebug/wlandebug.c @@ -172,6 +172,9 @@ get_orig_iface_name(char *oid, size_t oid_size, char *name) if (ifconfig_get_orig_name(h, name, &orig_name) < 0) errc(1, ifconfig_err_errno(h), "cannot get interface name"); + if (strlen(orig_name) < strlen("wlan") + 1) + errx(1, "expecting a wlan interface name"); + ifconfig_close(h); setoid(oid, oid_size, orig_name); free(orig_name); From 0c40a4ac6166e4525e2ff3aa5dfe16807d8fefcb Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Mon, 16 Oct 2017 12:32:57 +0000 Subject: [PATCH 109/219] Update details of interface capabilities changed by bridge(4). PR: 221122 MFC after: 1 week --- share/man/man4/bridge.4 | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/share/man/man4/bridge.4 b/share/man/man4/bridge.4 index d3410d5f9440..d787db1aa141 100644 --- a/share/man/man4/bridge.4 +++ b/share/man/man4/bridge.4 @@ -35,7 +35,7 @@ .\" .\" $FreeBSD$ .\" -.Dd July 27, 2013 +.Dd October 16, 2017 .Dt IF_BRIDGE 4 .Os .Sh NAME @@ -129,8 +129,11 @@ in The MTU of the first member interface to be added is used as the bridge MTU. All additional members are required to have exactly the same value. .Pp -The TXCSUM capability is disabled for any interface added to the bridge, and it -is restored when the interface is removed again. +The TOE, TSO, TXCSUM and TXCSUM6 capabilities on all interfaces added to the +bridge are disabled if any of the interfaces doesn't support/enable them. +The LRO capability is always disabled. +All the capabilities are restored when the interface is removed from bridge. +Changing capabilities in run time may cause NIC reinit and the link flap. .Pp The bridge supports .Dq monitor mode , From a86d7982105eac5572e6dcd9d7bd1a0b124d3c71 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Mon, 16 Oct 2017 12:53:54 +0000 Subject: [PATCH 110/219] Save VFP state in getcontext(3) on ARM. This is a last followup of r315974, which fixes userland part of VFP save/restore problems described in PR 217611. PR: 217611 MFC after: 2 weeks --- lib/libc/arm/gen/Makefile.inc | 2 +- lib/libc/arm/gen/getcontextx.c | 99 ++++++++++++++++++++++++++++++++++ sys/arm/arm/machdep.c | 24 +++++++++ sys/arm/arm/sys_machdep.c | 5 ++ sys/arm/include/machdep.h | 1 + sys/arm/include/sysarch.h | 6 +++ 6 files changed, 136 insertions(+), 1 deletion(-) create mode 100644 lib/libc/arm/gen/getcontextx.c diff --git a/lib/libc/arm/gen/Makefile.inc b/lib/libc/arm/gen/Makefile.inc index 95b1bba4c12f..05f3e95889a5 100644 --- a/lib/libc/arm/gen/Makefile.inc +++ b/lib/libc/arm/gen/Makefile.inc @@ -5,7 +5,7 @@ SRCS+= _ctx_start.S _setjmp.S _set_tp.c alloca.S fabs.c \ infinity.c ldexp.c makecontext.c \ __aeabi_read_tp.S setjmp.S signalcontext.c sigsetjmp.S flt_rounds.c \ arm_initfini.c \ - trivial-getcontextx.c + getcontextx.c .if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") SRCS+= fpgetmask_vfp.c fpgetround_vfp.c fpgetsticky_vfp.c fpsetmask_vfp.c \ diff --git a/lib/libc/arm/gen/getcontextx.c b/lib/libc/arm/gen/getcontextx.c new file mode 100644 index 000000000000..3092e2818e92 --- /dev/null +++ b/lib/libc/arm/gen/getcontextx.c @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2017 Michal Meloun + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include + +struct ucontextx { + ucontext_t ucontext; + mcontext_vfp_t mcontext_vfp; +}; + +int +__getcontextx_size(void) +{ + + return (sizeof(struct ucontextx)); +} + +int +__fillcontextx2(char *ctx) +{ + struct ucontextx *ucxp; + ucontext_t *ucp; + mcontext_vfp_t *mvp; + struct arm_get_vfpstate_args vfp_arg; + + ucxp = (struct ucontextx *)ctx; + ucp = &ucxp->ucontext; + mvp = &ucxp->mcontext_vfp; + + vfp_arg.mc_vfp_size = sizeof(mcontext_vfp_t); + vfp_arg.mc_vfp = mvp; + if (sysarch(ARM_GET_VFPSTATE, &vfp_arg) == -1) + return (-1); + ucp->uc_mcontext.mc_vfp_size = sizeof(mcontext_vfp_t); + ucp->uc_mcontext.mc_vfp_ptr = mvp; + return (0); +} + +int +__fillcontextx(char *ctx) +{ + struct ucontextx *ucxp; + + ucxp = (struct ucontextx *)ctx; + if (getcontext(&ucxp->ucontext) == -1) + return (-1); + __fillcontextx2(ctx); + return (0); +} + +__weak_reference(__getcontextx, getcontextx); + +ucontext_t * +__getcontextx(void) +{ + char *ctx; + int error; + + ctx = malloc(__getcontextx_size()); + if (ctx == NULL) + return (NULL); + if (__fillcontextx(ctx) == -1) { + error = errno; + free(ctx); + errno = error; + return (NULL); + } + return ((ucontext_t *)ctx); +} diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c index fdd5e6cf9798..689f7686d4c9 100644 --- a/sys/arm/arm/machdep.c +++ b/sys/arm/arm/machdep.c @@ -443,6 +443,30 @@ set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) } #endif +int +arm_get_vfpstate(struct thread *td, void *args) +{ + int rv; + struct arm_get_vfpstate_args ua; + mcontext_vfp_t mcontext_vfp; + + rv = copyin(args, &ua, sizeof(ua)); + if (rv != 0) + return (rv); + if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) + return (EINVAL); +#ifdef VFP + get_vfpcontext(td, &mcontext_vfp); +#else + bzero(&mcontext_vfp, sizeof(mcontext_vfp)); +#endif + + rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); + if (rv != 0) + return (rv); + return (0); +} + /* * Get machine context. */ diff --git a/sys/arm/arm/sys_machdep.c b/sys/arm/arm/sys_machdep.c index af34e30930b6..c938c0b1f570 100644 --- a/sys/arm/arm/sys_machdep.c +++ b/sys/arm/arm/sys_machdep.c @@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #ifndef _SYS_SYSPROTO_H_ @@ -204,6 +205,7 @@ sysarch(struct thread *td, struct sysarch_args *uap) case ARM_DRAIN_WRITEBUF: case ARM_SET_TP: case ARM_GET_TP: + case ARM_GET_VFPSTATE: break; default: @@ -229,6 +231,9 @@ sysarch(struct thread *td, struct sysarch_args *uap) case ARM_GET_TP: error = arm32_get_tp(td, uap->parms); break; + case ARM_GET_VFPSTATE: + error = arm_get_vfpstate(td, uap->parms); + break; default: error = EINVAL; break; diff --git a/sys/arm/include/machdep.h b/sys/arm/include/machdep.h index b738b971bd3f..ba20e40c0d35 100644 --- a/sys/arm/include/machdep.h +++ b/sys/arm/include/machdep.h @@ -40,6 +40,7 @@ void arm_parse_fdt_bootargs(void); void arm_print_kenv(void); void arm_generic_initclocks(void); +int arm_get_vfpstate(struct thread *td, void *args); /* Board-specific attributes */ void board_set_serial(uint64_t); diff --git a/sys/arm/include/sysarch.h b/sys/arm/include/sysarch.h index 43abb0057505..de48587cfd19 100644 --- a/sys/arm/include/sysarch.h +++ b/sys/arm/include/sysarch.h @@ -78,12 +78,18 @@ #define ARM_DRAIN_WRITEBUF 1 #define ARM_SET_TP 2 #define ARM_GET_TP 3 +#define ARM_GET_VFPSTATE 4 struct arm_sync_icache_args { uintptr_t addr; /* Virtual start address */ size_t len; /* Region size */ }; +struct arm_get_vfpstate_args { + size_t mc_vfp_size; + void *mc_vfp; +}; + #ifndef _KERNEL __BEGIN_DECLS int arm_sync_icache (u_int addr, int len); From eeec68eae7944e7ed80633b7fcaa4b5676d0b67e Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Mon, 16 Oct 2017 12:54:53 +0000 Subject: [PATCH 111/219] Add Creative vendor ID. MFC after: 1 week --- sys/dev/sound/pci/hda/hdac.c | 1 + sys/dev/sound/pci/hda/hdac.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/sys/dev/sound/pci/hda/hdac.c b/sys/dev/sound/pci/hda/hdac.c index 4726edd78410..a41e44831253 100644 --- a/sys/dev/sound/pci/hda/hdac.c +++ b/sys/dev/sound/pci/hda/hdac.c @@ -175,6 +175,7 @@ static const struct { { HDA_NVIDIA_ALL, "NVIDIA", 0, 0 }, { HDA_ATI_ALL, "ATI", 0, 0 }, { HDA_AMD_ALL, "AMD", 0, 0 }, + { HDA_CREATIVE_ALL, "Creative", 0, 0 }, { HDA_VIA_ALL, "VIA", 0, 0 }, { HDA_SIS_ALL, "SiS", 0, 0 }, { HDA_ULI_ALL, "ULI", 0, 0 }, diff --git a/sys/dev/sound/pci/hda/hdac.h b/sys/dev/sound/pci/hda/hdac.h index d20501a72024..0adc6ddce85f 100644 --- a/sys/dev/sound/pci/hda/hdac.h +++ b/sys/dev/sound/pci/hda/hdac.h @@ -150,6 +150,10 @@ #define RDC_VENDORID 0x17f3 #define HDA_RDC_M3010 HDA_MODEL_CONSTRUCT(RDC, 0x3010) +/* Creative */ +#define CREATIVE_VENDORID 0x1102 +#define HDA_CREATIVE_ALL HDA_MODEL_CONSTRUCT(CREATIVE, 0xffff) + /* VIA */ #define VIA_VENDORID 0x1106 #define HDA_VIA_VT82XX HDA_MODEL_CONSTRUCT(VIA, 0x3288) From 67f4baf8b08d7bb0e8a4d65e12d6d4a12fdd3a9d Mon Sep 17 00:00:00 2001 From: Kristof Provost Date: Mon, 16 Oct 2017 15:01:49 +0000 Subject: [PATCH 112/219] pf: test set-tos Introduce tests for the set-tos feature of pf. Teach pft_ping.py to send and verify ToS flags. --- tests/sys/netpfil/pf/Makefile | 3 +- tests/sys/netpfil/pf/pft_ping.py | 38 ++++++++++--- tests/sys/netpfil/pf/set_tos.sh | 92 ++++++++++++++++++++++++++++++++ 3 files changed, 124 insertions(+), 9 deletions(-) create mode 100755 tests/sys/netpfil/pf/set_tos.sh diff --git a/tests/sys/netpfil/pf/Makefile b/tests/sys/netpfil/pf/Makefile index fe0080d76c5d..d4516c82d8ab 100644 --- a/tests/sys/netpfil/pf/Makefile +++ b/tests/sys/netpfil/pf/Makefile @@ -5,7 +5,8 @@ PACKAGE= tests TESTSDIR= ${TESTSBASE}/sys/netpfil/pf ATF_TESTS_SH+= pass_block \ - forward + forward \ + set_tos ${PACKAGE}FILES+= utils.subr \ pft_ping.py diff --git a/tests/sys/netpfil/pf/pft_ping.py b/tests/sys/netpfil/pf/pft_ping.py index a07cfd82b6e8..f5b6a7c1e5ac 100644 --- a/tests/sys/netpfil/pf/pft_ping.py +++ b/tests/sys/netpfil/pf/pft_ping.py @@ -18,7 +18,7 @@ def __init__(self, recvif): def run(self): self.packets = sp.sniff(iface=self._recvif, timeout=3) -def check_ping_request(packet, dst_ip): +def check_ping_request(packet, dst_ip, args): """ Verify that the packet matches what we'd have sent """ @@ -40,13 +40,27 @@ def check_ping_request(packet, dst_ip): if raw.load != str(PAYLOAD_MAGIC): return False + # Wait to check expectations until we've established this is the packet we + # sent. + if args.expect_tos: + if ip.tos != int(args.expect_tos[0]): + print "Unexpected ToS value %d, expected %s" \ + % (ip.tos, args.expect_tos[0]) + return False + + return True -def ping(send_if, dst_ip): - req = sp.Ether() \ - / sp.IP(dst=dst_ip) \ - / sp.ICMP(type='echo-request') \ - / sp.Raw(PAYLOAD_MAGIC) +def ping(send_if, dst_ip, args): + ether = sp.Ether() + ip = sp.IP(dst=dst_ip) + icmp = sp.ICMP(type='echo-request') + raw = sp.Raw(PAYLOAD_MAGIC) + + if args.send_tos: + ip.tos = int(args.send_tos[0]) + + req = ether / ip / icmp / raw sp.sendp(req, iface=send_if, verbose=False) def main(): @@ -61,19 +75,27 @@ def main(): required=True, help='The destination IP address for the ICMP echo request') + # Packet settings + parser.add_argument('--send-tos', nargs=1, + help='Set the ToS value for the transmitted packet') + + # Expectations + parser.add_argument('--expect-tos', nargs=1, + help='The expected ToS value in the received packet') + args = parser.parse_args() sniffer = None if not args.recvif is None: sniffer = Sniffer(args.recvif[0]) - ping(args.sendif[0], args.to[0]) + ping(args.sendif[0], args.to[0], args) if sniffer: sniffer.join() for packet in sniffer.packets: - if check_ping_request(packet, args.to[0]): + if check_ping_request(packet, args.to[0], args): sys.exit(0) # We did not get the packet we expected diff --git a/tests/sys/netpfil/pf/set_tos.sh b/tests/sys/netpfil/pf/set_tos.sh new file mode 100755 index 000000000000..4916d939ca5a --- /dev/null +++ b/tests/sys/netpfil/pf/set_tos.sh @@ -0,0 +1,92 @@ +# $FreeBSD$ + +. $(atf_get_srcdir)/utils.subr + +atf_test_case "v4" "cleanup" +v4_head() +{ + atf_set descr 'set-tos test' + atf_set require.user root + + # We need scapy to be installed for out test scripts to work + atf_set require.progs scapy +} + +v4_body() +{ + pft_init + + epair_send=$(pft_mkepair) + ifconfig ${epair_send}a 192.0.2.1/24 up + + epair_recv=$(pft_mkepair) + ifconfig ${epair_recv}a up + + pft_mkjail alcatraz ${epair_send}b ${epair_recv}b + jexec alcatraz ifconfig ${epair_send}b 192.0.2.2/24 up + jexec alcatraz ifconfig ${epair_recv}b 198.51.100.2/24 up + jexec alcatraz sysctl net.inet.ip.forwarding=1 + jexec alcatraz arp -s 198.51.100.3 00:01:02:03:04:05 + route add -net 198.51.100.0/24 192.0.2.2 + + # No change is done if not requested + printf "scrub out proto icmp\n" | jexec alcatraz pfctl -ef - + atf_check -s exit:1 -o ignore $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --expect-tos 42 + + # The requested ToS is set + printf "scrub out proto icmp set-tos 42\n" | jexec alcatraz pfctl -f - + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --expect-tos 42 + + # ToS is not changed if the scrub rule does not match + printf "scrub out proto tcp set-tos 42\n" | jexec alcatraz pfctl -f - + atf_check -s exit:1 -o ignore $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --expect-tos 42 + + # Multiple scrub rules match as expected + printf "scrub out proto tcp set-tos 13\nscrub out proto icmp set-tos 14\n" \ + | jexec alcatraz pfctl -f - + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --expect-tos 14 + + # And this works even if the packet already has ToS values set + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --send-tos 42 \ + --expect-tos 14 + + # ToS values are unmolested if the packets do not match a scrub rule + printf "scrub out proto tcp set-tos 13\n" \ + | jexec alcatraz pfctl -f - + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --sendif ${epair_send}a \ + --to 198.51.100.3 \ + --recvif ${epair_recv}a \ + --send-tos 42 \ + --expect-tos 42 +} + +v4_cleanup() +{ + pft_cleanup +} + +atf_init_test_cases() +{ + atf_add_test_case "v4" +} From ba22aeacf1a1433d43dcbc688546e19f1d2ffc72 Mon Sep 17 00:00:00 2001 From: Kristof Provost Date: Mon, 16 Oct 2017 15:03:45 +0000 Subject: [PATCH 113/219] pf tests: Basic IPv6 forwarding tests Pass/block packets in the forwarding path with pf. Introduce the pft_set_rules() helper function, because we need to remember to flush states between individual tests. If not we can get packets passing despite rules blocking them because they match states created in a previous test. Extend pft_ping.py to be able to send IPv6 echo requests. --- tests/sys/netpfil/pf/forward.sh | 80 ++++++++++++++++++++++++++++++++ tests/sys/netpfil/pf/pft_ping.py | 42 ++++++++++++++++- tests/sys/netpfil/pf/utils.subr | 14 ++++++ 3 files changed, 135 insertions(+), 1 deletion(-) diff --git a/tests/sys/netpfil/pf/forward.sh b/tests/sys/netpfil/pf/forward.sh index 62ef97b09dc1..78bdef6b360d 100755 --- a/tests/sys/netpfil/pf/forward.sh +++ b/tests/sys/netpfil/pf/forward.sh @@ -61,7 +61,87 @@ v4_cleanup() pft_cleanup } +atf_test_case "v6" "cleanup" +v6_head() +{ + atf_set descr 'Basic IPv6 forwarding test' + atf_set require.user root + atf_set require.progs scapy +} + +v6_body() +{ + pft_init + + epair_send=$(pft_mkepair) + epair_recv=$(pft_mkepair) + + ifconfig ${epair_send}a inet6 2001:db8:42::1/64 up no_dad -ifdisabled + ifconfig ${epair_recv}a up + + pft_mkjail alcatraz ${epair_send}b ${epair_recv}b + + jexec alcatraz ifconfig ${epair_send}b inet6 2001:db8:42::2/64 up no_dad + jexec alcatraz ifconfig ${epair_recv}b inet6 2001:db8:43::2/64 up no_dad + jexec alcatraz sysctl net.inet6.ip6.forwarding=1 + jexec alcatraz ndp -s 2001:db8:43::3 00:01:02:03:04:05 + route add -6 2001:db8:43::/64 2001:db8:42::2 + + # Sanity check, can we forward ICMP echo requests without pf? + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --ip6 \ + --sendif ${epair_send}a \ + --to 2001:db8:43::3 \ + --recvif ${epair_recv}a + + jexec alcatraz pfctl -e + + # Block incoming echo request packets + pft_set_rules alcatraz \ + "block in inet6 proto icmp6 icmp6-type echoreq" + atf_check -s exit:1 $(atf_get_srcdir)/pft_ping.py \ + --ip6 \ + --sendif ${epair_send}a \ + --to 2001:db8:43::3 \ + --recvif ${epair_recv}a + + # Block outgoing echo request packets + pft_set_rules alcatraz \ + "block out inet6 proto icmp6 icmp6-type echoreq" + atf_check -s exit:1 -e ignore $(atf_get_srcdir)/pft_ping.py \ + --ip6 \ + --sendif ${epair_send}a \ + --to 2001:db8:43::3 \ + --recvif ${epair_recv}a + + # Allow ICMPv6 but nothing else + pft_set_rules alcatraz \ + "block out" \ + "pass out inet6 proto icmp6" + atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ + --ip6 \ + --sendif ${epair_send}a \ + --to 2001:db8:43::3 \ + --recvif ${epair_recv}a + + # Allowing ICMPv4 does not allow ICMPv6 + pft_set_rules alcatraz \ + "block out inet6 proto icmp6 icmp6-type echoreq" \ + "pass in proto icmp" + atf_check -s exit:1 $(atf_get_srcdir)/pft_ping.py \ + --ip6 \ + --sendif ${epair_send}a \ + --to 2001:db8:43::3 \ + --recvif ${epair_recv}a +} + +v6_cleanup() +{ + pft_cleanup +} + atf_init_test_cases() { atf_add_test_case "v4" + atf_add_test_case "v6" } diff --git a/tests/sys/netpfil/pf/pft_ping.py b/tests/sys/netpfil/pf/pft_ping.py index f5b6a7c1e5ac..98bce2e0716f 100644 --- a/tests/sys/netpfil/pf/pft_ping.py +++ b/tests/sys/netpfil/pf/pft_ping.py @@ -19,6 +19,12 @@ def run(self): self.packets = sp.sniff(iface=self._recvif, timeout=3) def check_ping_request(packet, dst_ip, args): + if args.ip6: + return check_ping6_request(packet, dst_ip, args) + else: + return check_ping4_request(packet, dst_ip, args) + +def check_ping4_request(packet, dst_ip, args): """ Verify that the packet matches what we'd have sent """ @@ -51,6 +57,24 @@ def check_ping_request(packet, dst_ip, args): return True +def check_ping6_request(packet, dst_ip, args): + """ + Verify that the packet matches what we'd have sent + """ + ip = packet.getlayer(sp.IPv6) + if not ip: + return False + if ip.dst != dst_ip: + return False + + icmp = packet.getlayer(sp.ICMPv6EchoRequest) + if not icmp: + return False + if icmp.data != str(PAYLOAD_MAGIC): + return False + + return True + def ping(send_if, dst_ip, args): ether = sp.Ether() ip = sp.IP(dst=dst_ip) @@ -63,6 +87,14 @@ def ping(send_if, dst_ip, args): req = ether / ip / icmp / raw sp.sendp(req, iface=send_if, verbose=False) +def ping6(send_if, dst_ip, args): + ether = sp.Ether() + ip6 = sp.IPv6(dst=dst_ip) + icmp = sp.ICMPv6EchoRequest(data=PAYLOAD_MAGIC) + + req = ether / ip6 / icmp + sp.sendp(req, iface=send_if, verbose=False) + def main(): parser = argparse.ArgumentParser("pft_ping.py", description="Ping test tool") @@ -71,6 +103,8 @@ def main(): help='The interface through which the packet(s) will be sent') parser.add_argument('--recvif', nargs=1, help='The interface on which to expect the ICMP echo response') + parser.add_argument('--ip6', action='store_true', + help='Use IPv6') parser.add_argument('--to', nargs=1, required=True, help='The destination IP address for the ICMP echo request') @@ -85,11 +119,17 @@ def main(): args = parser.parse_args() + # We may not have a default route. Tell scapy where to start looking for routes + sp.conf.iface6 = args.sendif[0] + sniffer = None if not args.recvif is None: sniffer = Sniffer(args.recvif[0]) - ping(args.sendif[0], args.to[0], args) + if args.ip6: + ping6(args.sendif[0], args.to[0], args) + else: + ping(args.sendif[0], args.to[0], args) if sniffer: sniffer.join() diff --git a/tests/sys/netpfil/pf/utils.subr b/tests/sys/netpfil/pf/utils.subr index 9d2f2bee95e4..375a9d55642b 100644 --- a/tests/sys/netpfil/pf/utils.subr +++ b/tests/sys/netpfil/pf/utils.subr @@ -35,6 +35,20 @@ pft_mkjail() echo $jailname >> created_jails.lst } +pft_set_rules() +{ + jname=$1 + shift + + # Flush all states, rules, fragments, ... + jexec ${jname} pfctl -F all + + while [ $# -gt 0 ]; do + printf "$1\n" + shift + done | jexec ${jname} pfctl -f - +} + pft_cleanup() { if [ -f created_interfaces.lst ]; then From f038a398da3053d2d9ce6dcd098588aee813bcb7 Mon Sep 17 00:00:00 2001 From: Kristof Provost Date: Mon, 16 Oct 2017 15:05:32 +0000 Subject: [PATCH 114/219] pf tests: Use pft_set_rules everywhere We now have a utility function to set pf rules in the jail. Use it whenever we need to set the pf rules in the test jail. --- tests/sys/netpfil/pf/forward.sh | 8 +++++--- tests/sys/netpfil/pf/pass_block.sh | 10 +++++----- tests/sys/netpfil/pf/set_tos.sh | 15 ++++++++------- 3 files changed, 18 insertions(+), 15 deletions(-) diff --git a/tests/sys/netpfil/pf/forward.sh b/tests/sys/netpfil/pf/forward.sh index 78bdef6b360d..a41ff8934a83 100755 --- a/tests/sys/netpfil/pf/forward.sh +++ b/tests/sys/netpfil/pf/forward.sh @@ -35,21 +35,23 @@ v4_body() --to 198.51.100.3 \ --recvif ${epair_recv}a + jexec alcatraz pfctl -e + # Forward with pf enabled - printf "block in\n" | jexec alcatraz pfctl -ef - + pft_set_rules alcatraz "block in" atf_check -s exit:1 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ --recvif ${epair_recv}a - printf "block out\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block out" atf_check -s exit:1 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ --recv ${epair_recv}a # Allow ICMP - printf "block in\npass in proto icmp\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" "pass in proto icmp" atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ diff --git a/tests/sys/netpfil/pf/pass_block.sh b/tests/sys/netpfil/pf/pass_block.sh index abb481d40e57..9eeb89b17037 100755 --- a/tests/sys/netpfil/pf/pass_block.sh +++ b/tests/sys/netpfil/pf/pass_block.sh @@ -28,11 +28,11 @@ v4_body() atf_check -s exit:0 -o ignore ping -c 1 -t 1 192.0.2.2 # Block everything - printf "block in\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" atf_check -s exit:2 -o ignore ping -c 1 -t 1 192.0.2.2 # Block everything but ICMP - printf "block in\npass in proto icmp\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" "pass in proto icmp" atf_check -s exit:0 -o ignore ping -c 1 -t 1 192.0.2.2 } @@ -67,15 +67,15 @@ v6_body() atf_check -s exit:0 -o ignore ping6 -c 1 -x 1 2001:db8:42::2 # Block everything - printf "block in\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" atf_check -s exit:2 -o ignore ping6 -c 1 -x 1 2001:db8:42::2 # Block everything but ICMP - printf "block in\npass in proto icmp6\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" "pass in proto icmp6" atf_check -s exit:0 -o ignore ping6 -c 1 -x 1 2001:db8:42::2 # Allowing ICMPv4 does not allow ICMPv6 - printf "block in\npass in proto icmp\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "block in" "pass in proto icmp" atf_check -s exit:2 -o ignore ping6 -c 1 -x 1 2001:db8:42::2 } diff --git a/tests/sys/netpfil/pf/set_tos.sh b/tests/sys/netpfil/pf/set_tos.sh index 4916d939ca5a..5e56b7ceb656 100755 --- a/tests/sys/netpfil/pf/set_tos.sh +++ b/tests/sys/netpfil/pf/set_tos.sh @@ -29,8 +29,10 @@ v4_body() jexec alcatraz arp -s 198.51.100.3 00:01:02:03:04:05 route add -net 198.51.100.0/24 192.0.2.2 + jexec alcatraz pfctl -e + # No change is done if not requested - printf "scrub out proto icmp\n" | jexec alcatraz pfctl -ef - + pft_set_rules alcatraz "scrub out proto icmp" atf_check -s exit:1 -o ignore $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ @@ -38,7 +40,7 @@ v4_body() --expect-tos 42 # The requested ToS is set - printf "scrub out proto icmp set-tos 42\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "scrub out proto icmp set-tos 42" atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ @@ -46,7 +48,7 @@ v4_body() --expect-tos 42 # ToS is not changed if the scrub rule does not match - printf "scrub out proto tcp set-tos 42\n" | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "scrub out proto tcp set-tos 42" atf_check -s exit:1 -o ignore $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ @@ -54,8 +56,8 @@ v4_body() --expect-tos 42 # Multiple scrub rules match as expected - printf "scrub out proto tcp set-tos 13\nscrub out proto icmp set-tos 14\n" \ - | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "scrub out proto tcp set-tos 13" \ + "scrub out proto icmp set-tos 14" atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ @@ -71,8 +73,7 @@ v4_body() --expect-tos 14 # ToS values are unmolested if the packets do not match a scrub rule - printf "scrub out proto tcp set-tos 13\n" \ - | jexec alcatraz pfctl -f - + pft_set_rules alcatraz "scrub out proto tcp set-tos 13" atf_check -s exit:0 $(atf_get_srcdir)/pft_ping.py \ --sendif ${epair_send}a \ --to 198.51.100.3 \ From ca1f624517bee47e896c04a01f97d2a4bf55b7a9 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Mon, 16 Oct 2017 15:16:24 +0000 Subject: [PATCH 115/219] Fix the pv_chunks pc_lru tailq handling in reclaim_pv_chunk(). For processing, reclaim_pv_chunk() removes the pv_chunk from the lru list, which makes pc_lru linkage invalid. Then the pmap lock is released, which allows for other thread to free the last pv entry allocated from the chunk and call free_pv_chunk(), which tries to modify the invalid linkage. Similarly, the chunk is inserted into the private tailq new_tail temporary. Again, free_pv_chunk() might be run and corrupt the linkage for the new_tail after the pmap lock is dropped. This is a consequence of r299788 elimination of pvh_global_lock, which allowed for reclaim to run in parallel with other pmap calls which free pv chunks. As a fix, do not remove the chunk from pc_lru queue, use a marker to remember the position in the queue iteration. We can safely operate on the chunks after the chunk's pmap is locked, we fetched the chunk after the marker, and we checked that chunk pmap is same as we have locked, because chunk removal from pc_lru requires both pv_chunk_mutex and the pmap mutex owned. Note that the fix lost an optimization which was present in the previous algorithm. Namely, new_tail requeueing rotated the pv chunks list so that reclaim didn't scan the same pv chunks that couldn't be freed (because they contained a wired and/or superpage mapping) on every invocation. An additional change is planned which would improve this. Reported and tested by: pho Reviewed by: alc Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/amd64/amd64/pmap.c | 63 ++++++++++++++++++++++++++++------------ sys/amd64/include/pmap.h | 15 +++++++--- 2 files changed, 55 insertions(+), 23 deletions(-) diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 80f6526b52b1..5ef462676df1 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -2888,11 +2888,11 @@ reclaim_pv_chunk_leave_pmap(pmap_t pmap, pmap_t locked_pmap, bool start_di) static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) { - struct pch new_tail; - struct pv_chunk *pc; + struct pv_chunk *pc, *pc_marker; + struct pv_chunk_header pc_marker_b; struct md_page *pvh; pd_entry_t *pde; - pmap_t pmap; + pmap_t next_pmap, pmap; pt_entry_t *pte, tpte; pt_entry_t PG_G, PG_A, PG_M, PG_RW; pv_entry_t pv; @@ -2909,7 +2909,8 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) m_pc = NULL; PG_G = PG_A = PG_M = PG_RW = 0; SLIST_INIT(&free); - TAILQ_INIT(&new_tail); + bzero(&pc_marker_b, sizeof(pc_marker_b)); + pc_marker = (struct pv_chunk *)&pc_marker_b; /* * A delayed invalidation block should already be active if @@ -2919,30 +2920,52 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) start_di = pmap_not_in_di(); mtx_lock(&pv_chunks_mutex); - while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && SLIST_EMPTY(&free)) { - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); + TAILQ_INSERT_HEAD(&pv_chunks, pc_marker, pc_lru); + while ((pc = TAILQ_NEXT(pc_marker, pc_lru)) != NULL && + SLIST_EMPTY(&free)) { + next_pmap = pc->pc_pmap; + if (next_pmap == NULL) /* marker */ + goto next_chunk; mtx_unlock(&pv_chunks_mutex); - if (pmap != pc->pc_pmap) { + + /* + * A pv_chunk can only be removed from the pc_lru list + * when both pc_chunks_mutex is owned and the + * corresponding pmap is locked. + */ + if (pmap != next_pmap) { reclaim_pv_chunk_leave_pmap(pmap, locked_pmap, start_di); - pmap = pc->pc_pmap; + pmap = next_pmap; /* Avoid deadlock and lock recursion. */ if (pmap > locked_pmap) { RELEASE_PV_LIST_LOCK(lockp); PMAP_LOCK(pmap); - } else if (pmap != locked_pmap && - !PMAP_TRYLOCK(pmap)) { - pmap = NULL; - TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru); + if (start_di) + pmap_delayed_invl_started(); mtx_lock(&pv_chunks_mutex); continue; - } + } else if (pmap != locked_pmap) { + if (PMAP_TRYLOCK(pmap)) { + if (start_di) + pmap_delayed_invl_started(); + mtx_lock(&pv_chunks_mutex); + continue; + } else { + pmap = NULL; /* pmap is not locked */ + mtx_lock(&pv_chunks_mutex); + pc = TAILQ_NEXT(pc_marker, pc_lru); + if (pc == NULL || + pc->pc_pmap != next_pmap) + continue; + goto next_chunk; + } + } else if (start_di) + pmap_delayed_invl_started(); PG_G = pmap_global_bit(pmap); PG_A = pmap_accessed_bit(pmap); PG_M = pmap_modified_bit(pmap); PG_RW = pmap_rw_bit(pmap); - if (start_di) - pmap_delayed_invl_started(); } /* @@ -2987,9 +3010,8 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) } } if (freed == 0) { - TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru); mtx_lock(&pv_chunks_mutex); - continue; + goto next_chunk; } /* Every freed mapping is for a 4 KB page. */ pmap_resident_count_dec(pmap, freed); @@ -3006,16 +3028,19 @@ reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) m_pc = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc)); dump_drop_page(m_pc->phys_addr); mtx_lock(&pv_chunks_mutex); + TAILQ_REMOVE(&pv_chunks, pc, pc_lru); break; } TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru); mtx_lock(&pv_chunks_mutex); /* One freed pv entry in locked_pmap is sufficient. */ if (pmap == locked_pmap) break; +next_chunk: + TAILQ_REMOVE(&pv_chunks, pc_marker, pc_lru); + TAILQ_INSERT_AFTER(&pv_chunks, pc, pc_marker, pc_lru); } - TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru); + TAILQ_REMOVE(&pv_chunks, pc_marker, pc_lru); mtx_unlock(&pv_chunks_mutex); reclaim_pv_chunk_leave_pmap(pmap, locked_pmap, start_di); if (m_pc == NULL && !SLIST_EMPTY(&free)) { diff --git a/sys/amd64/include/pmap.h b/sys/amd64/include/pmap.h index 36d5c446dbe8..1e4f6bfdc127 100644 --- a/sys/amd64/include/pmap.h +++ b/sys/amd64/include/pmap.h @@ -366,11 +366,18 @@ typedef struct pv_entry { */ #define _NPCM 3 #define _NPCPV 168 -struct pv_chunk { - pmap_t pc_pmap; - TAILQ_ENTRY(pv_chunk) pc_list; - uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */ +#define PV_CHUNK_HEADER \ + pmap_t pc_pmap; \ + TAILQ_ENTRY(pv_chunk) pc_list; \ + uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */ \ TAILQ_ENTRY(pv_chunk) pc_lru; + +struct pv_chunk_header { + PV_CHUNK_HEADER +}; + +struct pv_chunk { + PV_CHUNK_HEADER struct pv_entry pc_pventry[_NPCPV]; }; From 0d8e04054ee6de957268ecbe4ff1b453263f32d1 Mon Sep 17 00:00:00 2001 From: Matt Joras Date: Mon, 16 Oct 2017 16:14:50 +0000 Subject: [PATCH 116/219] Properly reset the fields in clean_unrhdr. In r324542 I neglected to reset the first and last fields of struct unrhdr. This causes a tmpfs to fail the unr(9) consistency checks with DIAGNOSTIC on. Fix this by resetting the fields by calling init_unrhdr. While here, change a loop to use TAILQ_FOREACH_SAFE since it is more readable and equally fast. Reported by: David Wolfskill Approved by: rstone (mentor) Sponsored by: Dell EMC Isilon --- sys/kern/subr_unit.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sys/kern/subr_unit.c b/sys/kern/subr_unit.c index c2110d72169f..867edbe75460 100644 --- a/sys/kern/subr_unit.c +++ b/sys/kern/subr_unit.c @@ -373,18 +373,17 @@ clear_unrhdr(struct unrhdr *uh) KASSERT(TAILQ_EMPTY(&uh->ppfree), ("unrhdr has postponed item for free")); - up = TAILQ_FIRST(&uh->head); - while (up != NULL) { - uq = TAILQ_NEXT(up, list); + TAILQ_FOREACH_SAFE(up, &uh->head, list, uq) { if (up->ptr != uh) { Free(up->ptr); } Free(up); - up = uq; } - TAILQ_INIT(&uh->head); uh->busy = 0; uh->alloc = 0; + init_unrhdr(uh, uh->low, uh->high, uh->mtx); + + check_unrhdr(uh, __LINE__); } static __inline int From 3f7047aeebeed66f0963299083f3f18b6cba5de3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Romain=20Tarti=C3=A8re?= Date: Mon, 16 Oct 2017 17:21:52 +0000 Subject: [PATCH 117/219] Add a quick description of the geom_getxml(3), geom_xml2tree(3), geom_gettree(3) and geom_deletetree(3) functions provided by libgeom and are not documented in libgeom(3). Reviewed by: mav, bjk, allanjude Approved by: allanjude Differential Revision: https://reviews.freebsd.org/D12679 --- lib/libgeom/Makefile | 4 ++++ lib/libgeom/libgeom.3 | 54 ++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/lib/libgeom/Makefile b/lib/libgeom/Makefile index ea1f6c83a961..b7877cc56ece 100644 --- a/lib/libgeom/Makefile +++ b/lib/libgeom/Makefile @@ -33,6 +33,10 @@ MLINKS+= \ libgeom.3 gctl_issue.3 \ libgeom.3 gctl_free.3 \ libgeom.3 gctl_dump.3 \ + libgeom.3 geom_getxml.3 \ + libgeom.3 geom_xml2tree.3 \ + libgeom.3 geom_gettree.3 \ + libgeom.3 geom_deletetree.3 \ libgeom.3 g_close.3 \ libgeom.3 g_delete.3 \ libgeom.3 g_device_path.3 \ diff --git a/lib/libgeom/libgeom.3 b/lib/libgeom/libgeom.3 index dbe21c84d38e..e1a3a35b7062 100644 --- a/lib/libgeom/libgeom.3 +++ b/lib/libgeom/libgeom.3 @@ -28,7 +28,7 @@ .\" .\" $FreeBSD$ .\" -.Dd April 22, 2017 +.Dd October 16, 2017 .Dt LIBGEOM 3 .Os .Sh NAME @@ -46,6 +46,10 @@ .Nm gctl_issue , .Nm gctl_free , .Nm gctl_dump , +.Nm geom_getxml , +.Nm geom_xml2tree , +.Nm geom_gettree , +.Nm geom_deletetree , .Nm g_open , .Nm g_close , .Nm g_mediasize , @@ -99,6 +103,14 @@ .Ft void .Fn gctl_dump "struct gctl_req *req" "FILE *f" .Ss "Utility Functions" +.Ft "char *" +.Fn geom_getxml void +.Ft int +.Fn geom_xml2tree "struct gmesh *gmp" "char *p" +.Ft int +.Fn geom_gettree "struct gmesh *gmp" +.Ft void +.Fn geom_deletetree "struct gmesh *gmp" .Ft int .Fn g_open "const char *name" "int dowrite" .Ft int @@ -279,6 +291,46 @@ on success, or an error message corresponding to the first error which happened. .Ss "Utility Functions" The +.Fn geom_getxml +function is a wrapper around +.Xr sysctl 3 +that fetches the +.Ar kern.geom.confxml +OID, and returns it's value. +The allocated memory should be released with +.Xr free 2 +after use. +.Pp +The +.Fn geom_xml2tree +function parses the XML representation of a GEOM topology passed as +.Ar p , +allocates the needed data structures to access this information and fills in +the passed +.Ar gmp +data structure. +Memory allocated during this transformation should be released +using +.Fn geom_deletetree +after use. +.Pp +The +.Fn geom_gettree +function is a wrapper around the +.Fn geom_getxml +and +.Fn geom_xml2tree +functions. +Memory allocated during this operation should be released using +.Fn geom_deletetree +after use. +.Pp +The +.Fn geom_deletetree +function releases memory allocated for storing the data-structures referenced by +.Ar gmp . +.Pp +The .Fn g_* functions are used to communicate with GEOM providers. .Pp From fc1e29dc357e8fc501e31d767ddec1515c2eb4a9 Mon Sep 17 00:00:00 2001 From: Bryan Drewery Date: Mon, 16 Oct 2017 20:06:24 +0000 Subject: [PATCH 118/219] This child is expected to exit on SIGTRAP, don't leave a core behind. MFC after: 1 week Sponsored by: Dell EMC Isilon --- tests/sys/kern/ptrace_test.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tests/sys/kern/ptrace_test.c b/tests/sys/kern/ptrace_test.c index 7f0b9655b14c..e2a89c116232 100644 --- a/tests/sys/kern/ptrace_test.c +++ b/tests/sys/kern/ptrace_test.c @@ -2467,12 +2467,16 @@ ATF_TC_WITHOUT_HEAD(ptrace__PT_CONTINUE_with_sigtrap_system_call_entry); ATF_TC_BODY(ptrace__PT_CONTINUE_with_sigtrap_system_call_entry, tc) { struct ptrace_lwpinfo pl; + struct rlimit rl; pid_t fpid, wpid; int status; ATF_REQUIRE((fpid = fork()) != -1); if (fpid == 0) { trace_me(); + /* SIGTRAP expected to cause exit on syscall entry. */ + rl.rlim_cur = rl.rlim_max = 0; + ATF_REQUIRE(setrlimit(RLIMIT_CORE, &rl) == 0); getpid(); exit(1); } From 0167b33b81678845998328a8a76b85c98f40fed1 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Mon, 16 Oct 2017 20:11:29 +0000 Subject: [PATCH 119/219] Style. Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/kern/kern_sig.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c index ce5e7b2768f0..d3bccd0dd1ca 100644 --- a/sys/kern/kern_sig.c +++ b/sys/kern/kern_sig.c @@ -2786,15 +2786,15 @@ issignal(struct thread *td) struct sigacts *ps; struct sigqueue *queue; sigset_t sigpending; - int sig, prop; ksiginfo_t ksi; + int prop, sig, traced; p = td->td_proc; ps = p->p_sigacts; mtx_assert(&ps->ps_mtx, MA_OWNED); PROC_LOCK_ASSERT(p, MA_OWNED); for (;;) { - int traced = (p->p_flag & P_TRACED) || (p->p_stops & S_SIG); + traced = (p->p_flag & P_TRACED) || (p->p_stops & S_SIG); sigpending = td->td_sigqueue.sq_signals; SIGSETOR(sigpending, p->p_sigqueue.sq_signals); @@ -2982,11 +2982,10 @@ thread_stopped(struct proc *p) * from the current set of pending signals. */ int -postsig(sig) - int sig; +postsig(int sig) { - struct thread *td = curthread; - struct proc *p = td->td_proc; + struct thread *td; + struct proc *p; struct sigacts *ps; sig_t action; ksiginfo_t ksi; @@ -2994,6 +2993,8 @@ postsig(sig) KASSERT(sig != 0, ("postsig")); + td = curthread; + p = td->td_proc; PROC_LOCK_ASSERT(p, MA_OWNED); ps = p->p_sigacts; mtx_assert(&ps->ps_mtx, MA_OWNED); @@ -3010,7 +3011,7 @@ postsig(sig) ktrpsig(sig, action, td->td_pflags & TDP_OLDMASK ? &td->td_oldsigmask : &td->td_sigmask, ksi.ksi_code); #endif - if (p->p_stops & S_SIG) { + if ((p->p_stops & S_SIG) != 0) { mtx_unlock(&ps->ps_mtx); stopevent(p, S_SIG, sig); mtx_lock(&ps->ps_mtx); From cd735d8f5a7c1f56d99f9d5e6535696d1e8484c3 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Mon, 16 Oct 2017 20:15:19 +0000 Subject: [PATCH 120/219] Improve assertion that an ignored or blocked signal is not delivered. Split two conditions into separate asserts. Print additional details, like the signal number and action value. Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/kern/kern_sig.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c index d3bccd0dd1ca..e0bc937b6e81 100644 --- a/sys/kern/kern_sig.c +++ b/sys/kern/kern_sig.c @@ -3030,8 +3030,10 @@ postsig(int sig) /* * If we get here, the signal must be caught. */ - KASSERT(action != SIG_IGN && !SIGISMEMBER(td->td_sigmask, sig), - ("postsig action")); + KASSERT(action != SIG_IGN, ("postsig action %p", action)); + KASSERT(!SIGISMEMBER(td->td_sigmask, sig), + ("postsig action: blocked sig %d", sig)); + /* * Set the new mask value and also defer further * occurrences of this signal. From e9445808a8409448264642dc078dc37033593be1 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Mon, 16 Oct 2017 20:21:51 +0000 Subject: [PATCH 121/219] Re-evaluate thread' signal mask after ptracestop(). The stop drops process lock, which allows the signal mask to be changed and our selected signal might become blocked, i.e. should be returned to the process queue instead of delivery. Also, for the existing check of the process no longer having an attached debugger, we should not loose the signal, but requeue it. Reported and tested by: bdrewery Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/kern/kern_sig.c | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c index e0bc937b6e81..ea3b68e370c6 100644 --- a/sys/kern/kern_sig.c +++ b/sys/kern/kern_sig.c @@ -2855,15 +2855,32 @@ issignal(struct thread *td) mtx_lock(&ps->ps_mtx); /* - * Keep looking if the debugger discarded the signal - * or replaced it with a masked signal. - * - * If the traced bit got turned off, go back up - * to the top to rescan signals. This ensures - * that p_sig* and p_sigact are consistent. + * Keep looking if the debugger discarded or + * replaced the signal. */ - if (sig == 0 || (p->p_flag & P_TRACED) == 0) + if (sig == 0) continue; + + /* + * If the signal became masked, re-queue it. + */ + if (SIGISMEMBER(td->td_sigmask, sig)) { + ksi.ksi_flags |= KSI_HEAD; + sigqueue_add(&p->p_sigqueue, sig, &ksi); + continue; + } + + /* + * If the traced bit got turned off, requeue + * the signal and go back up to the top to + * rescan signals. This ensures that p_sig* + * and p_sigact are consistent. + */ + if ((p->p_flag & P_TRACED) == 0) { + ksi.ksi_flags |= KSI_HEAD; + sigqueue_add(queue, sig, &ksi); + continue; + } } prop = sigprop(sig); From c64c1f95a791046f4bd15e1d69b7c0de63e4cd83 Mon Sep 17 00:00:00 2001 From: Andriy Voskoboinyk Date: Mon, 16 Oct 2017 21:21:31 +0000 Subject: [PATCH 122/219] ifnet(9): split ifc_alloc_unit() (should simplify code flow) Allocate smallest unit number from pool via ifc_alloc_unit_next() and exact unit number (if available) via ifc_alloc_unit_specific(). While here, address possible deadlock (mentioned in PR). PR: 217401 MFC after: 5 days Differential Revision: https://reviews.freebsd.org/D12551 --- sys/net/if_clone.c | 60 +++++++++++++++++++++++++++------------------- 1 file changed, 36 insertions(+), 24 deletions(-) diff --git a/sys/net/if_clone.c b/sys/net/if_clone.c index 3b5884e841d5..cba0d9ad7d69 100644 --- a/sys/net/if_clone.c +++ b/sys/net/if_clone.c @@ -595,39 +595,21 @@ ifc_name2unit(const char *name, int *unit) return (0); } -int -ifc_alloc_unit(struct if_clone *ifc, int *unit) +static int +ifc_alloc_unit_specific(struct if_clone *ifc, int *unit) { char name[IFNAMSIZ]; - int wildcard; - wildcard = (*unit < 0); -retry: if (*unit > ifc->ifc_maxunit) return (ENOSPC); - if (*unit < 0) { - *unit = alloc_unr(ifc->ifc_unrhdr); - if (*unit == -1) - return (ENOSPC); - } else { - *unit = alloc_unr_specific(ifc->ifc_unrhdr, *unit); - if (*unit == -1) { - if (wildcard) { - (*unit)++; - goto retry; - } else - return (EEXIST); - } - } + + if (alloc_unr_specific(ifc->ifc_unrhdr, *unit) == -1) + return (EEXIST); snprintf(name, IFNAMSIZ, "%s%d", ifc->ifc_name, *unit); if (ifunit(name) != NULL) { free_unr(ifc->ifc_unrhdr, *unit); - if (wildcard) { - (*unit)++; - goto retry; - } else - return (EEXIST); + return (EEXIST); } IF_CLONE_ADDREF(ifc); @@ -635,6 +617,36 @@ ifc_alloc_unit(struct if_clone *ifc, int *unit) return (0); } +static int +ifc_alloc_unit_next(struct if_clone *ifc, int *unit) +{ + int error; + + *unit = alloc_unr(ifc->ifc_unrhdr); + if (*unit == -1) + return (ENOSPC); + + free_unr(ifc->ifc_unrhdr, *unit); + for (;;) { + error = ifc_alloc_unit_specific(ifc, unit); + if (error != EEXIST) + break; + + (*unit)++; + } + + return (error); +} + +int +ifc_alloc_unit(struct if_clone *ifc, int *unit) +{ + if (*unit < 0) + return (ifc_alloc_unit_next(ifc, unit)); + else + return (ifc_alloc_unit_specific(ifc, unit)); +} + void ifc_free_unit(struct if_clone *ifc, int unit) { From 6623429867e0a48c72ccbe6c8c240a85e6b88b86 Mon Sep 17 00:00:00 2001 From: Andriy Voskoboinyk Date: Mon, 16 Oct 2017 21:46:11 +0000 Subject: [PATCH 123/219] mbuf(9): unbreak m_fragment() - Fix it by replacing m_cat() with m_prev->m_next = m_new (m_cat() will try to append data - as a result, there will be no fragmentation). - Move some constants out of the loop. Was previously tested with D4077. Differential Revision: https://reviews.freebsd.org/D4090 --- sys/kern/uipc_mbuf.c | 57 +++++++++++++++++++++----------------------- 1 file changed, 27 insertions(+), 30 deletions(-) diff --git a/sys/kern/uipc_mbuf.c b/sys/kern/uipc_mbuf.c index a8a0391eae5c..6fe5f7630c58 100644 --- a/sys/kern/uipc_mbuf.c +++ b/sys/kern/uipc_mbuf.c @@ -1449,62 +1449,59 @@ m_collapse(struct mbuf *m0, int how, int maxfrags) struct mbuf * m_fragment(struct mbuf *m0, int how, int length) { - struct mbuf *m_new = NULL, *m_final = NULL; - int progress = 0; + struct mbuf *m_first, *m_last; + int divisor = 255, progress = 0, fraglen; if (!(m0->m_flags & M_PKTHDR)) return (m0); - if ((length == 0) || (length < -2)) + if (length == 0 || length < -2) return (m0); + if (length > MCLBYTES) + length = MCLBYTES; + if (length < 0 && divisor > MCLBYTES) + divisor = MCLBYTES; + if (length == -1) + length = 1 + (arc4random() % divisor); + if (length > 0) + fraglen = length; m_fixhdr(m0); /* Needed sanity check */ - m_final = m_getcl(how, MT_DATA, M_PKTHDR); - - if (m_final == NULL) + m_first = m_getcl(how, MT_DATA, M_PKTHDR); + if (m_first == NULL) goto nospace; - if (m_dup_pkthdr(m_final, m0, how) == 0) + if (m_dup_pkthdr(m_first, m0, how) == 0) goto nospace; - m_new = m_final; - - if (length == -1) - length = 1 + (arc4random() & 255); + m_last = m_first; while (progress < m0->m_pkthdr.len) { - int fraglen; - - if (length > 0) - fraglen = length; - else - fraglen = 1 + (arc4random() & 255); + if (length == -2) + fraglen = 1 + (arc4random() % divisor); if (fraglen > m0->m_pkthdr.len - progress) fraglen = m0->m_pkthdr.len - progress; - if (fraglen > MCLBYTES) - fraglen = MCLBYTES; - - if (m_new == NULL) { - m_new = m_getcl(how, MT_DATA, 0); + if (progress != 0) { + struct mbuf *m_new = m_getcl(how, MT_DATA, 0); if (m_new == NULL) goto nospace; + + m_last->m_next = m_new; + m_last = m_new; } - m_copydata(m0, progress, fraglen, mtod(m_new, caddr_t)); + m_copydata(m0, progress, fraglen, mtod(m_last, caddr_t)); progress += fraglen; - m_new->m_len = fraglen; - if (m_new != m_final) - m_cat(m_final, m_new); - m_new = NULL; + m_last->m_len = fraglen; } m_freem(m0); - m0 = m_final; + m0 = m_first; return (m0); nospace: - if (m_final) - m_freem(m_final); + if (m_first) + m_freem(m_first); /* Return the original chain on failure */ return (m0); } From f49c813c1d68f32f60e23821ede8eff1a7abd3dc Mon Sep 17 00:00:00 2001 From: Rick Macklem Date: Mon, 16 Oct 2017 23:28:12 +0000 Subject: [PATCH 124/219] Use taskqueue(9) to do writes/commits to mirrored DSs concurrently. When the NFSv4.1 pNFS client is using a Flexible File Layout specifying mirrored Data Servers, it must do the writes and commits to all mirrors. This patch modifies the client to use a taskqueue to perform these writes and commits concurrently. The number of threads can't be changed for taskqueue(9), so it is set to 4 * mp_ncpus by default, but this can be overridden by setting the sysctl vfs.nfs.pnfsiothreads. Differential Revision: https://reviews.freebsd.org/D12632 --- sys/fs/nfs/nfs_commonport.c | 51 +++++++ sys/fs/nfsclient/nfs_clrpcops.c | 242 ++++++++++++++++++++++++++++---- 2 files changed, 266 insertions(+), 27 deletions(-) diff --git a/sys/fs/nfs/nfs_commonport.c b/sys/fs/nfs/nfs_commonport.c index cebacaf6c531..853753c86636 100644 --- a/sys/fs/nfs/nfs_commonport.c +++ b/sys/fs/nfs/nfs_commonport.c @@ -40,7 +40,9 @@ __FBSDID("$FreeBSD$"); * to this BSD variant. */ #include +#include #include +#include #include #include #include @@ -68,6 +70,8 @@ int nfsrv_lughashsize = 100; void (*nfsd_call_servertimer)(void) = NULL; void (*ncl_call_invalcaches)(struct vnode *) = NULL; +int nfs_pnfsio(task_fn_t *, void *); + static int nfs_realign_test; static int nfs_realign_count; static struct ext_nfsstats oldnfsstats; @@ -84,6 +88,9 @@ SYSCTL_INT(_vfs_nfs, OID_AUTO, debuglevel, CTLFLAG_RW, &nfscl_debuglevel, 0, "Debug level for NFS client"); SYSCTL_INT(_vfs_nfs, OID_AUTO, userhashsize, CTLFLAG_RDTUN, &nfsrv_lughashsize, 0, "Size of hash tables for uid/name mapping"); +int nfs_pnfsiothreads = 0; +SYSCTL_INT(_vfs_nfs, OID_AUTO, pnfsiothreads, CTLFLAG_RW, &nfs_pnfsiothreads, + 0, "Number of pNFS mirror I/O threads"); /* * Defines for malloc @@ -691,6 +698,50 @@ nfs_supportsnfsv4acls(struct vnode *vp) return (0); } +/* + * These are the first fields of all the context structures passed into + * nfs_pnfsio(). + */ +struct pnfsio { + int done; + int inprog; + struct task tsk; +}; + +/* + * Do a mirror I/O on a pNFS thread. + */ +int +nfs_pnfsio(task_fn_t *func, void *context) +{ + struct pnfsio *pio; + int ret; + static struct taskqueue *pnfsioq = NULL; + + pio = (struct pnfsio *)context; + if (pnfsioq == NULL) { + if (nfs_pnfsiothreads == 0) + nfs_pnfsiothreads = mp_ncpus * 4; + pnfsioq = taskqueue_create("pnfsioq", M_WAITOK, + taskqueue_thread_enqueue, &pnfsioq); + if (pnfsioq == NULL) + return (ENOMEM); + ret = taskqueue_start_threads(&pnfsioq, nfs_pnfsiothreads, + 0, "pnfsiot"); + if (ret != 0) { + taskqueue_free(pnfsioq); + pnfsioq = NULL; + return (ret); + } + } + pio->inprog = 1; + TASK_INIT(&pio->tsk, 0, func, context); + ret = taskqueue_enqueue(pnfsioq, &pio->tsk); + if (ret != 0) + pio->inprog = 0; + return (ret); +} + extern int (*nfsd_call_nfscommon)(struct thread *, struct nfssvc_args *); /* diff --git a/sys/fs/nfsclient/nfs_clrpcops.c b/sys/fs/nfsclient/nfs_clrpcops.c index 4c9e47740423..4c1d78f2a2b8 100644 --- a/sys/fs/nfsclient/nfs_clrpcops.c +++ b/sys/fs/nfsclient/nfs_clrpcops.c @@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include SYSCTL_DECL(_vfs_nfs); @@ -64,6 +65,7 @@ extern nfstype nfsv34_type[9]; extern int nfsrv_useacl; extern char nfsv4_callbackaddr[INET6_ADDRSTRLEN]; extern int nfscl_debuglevel; +extern int nfs_pnfsiothreads; NFSCLSTATEMUTEX; int nfstest_outofseq = 0; int nfscl_assumeposixlocks = 1; @@ -87,6 +89,30 @@ enum nfsclds_state { NFSDSP_NOTFOUND = 2, }; +/* + * Do a write RPC on a DS data file, using this structure for the arguments, + * so that this function can be executed by a separate kernel process. + */ +struct nfsclwritedsdorpc { + int done; + int inprog; + struct task tsk; + struct vnode *vp; + int iomode; + int must_commit; + nfsv4stateid_t *stateidp; + struct nfsclds *dsp; + uint64_t off; + int len; + struct nfsfh *fhp; + struct mbuf *m; + int vers; + int minorvers; + struct ucred *cred; + NFSPROC_T *p; + int err; +}; + static int nfsrpc_setattrrpc(vnode_t , struct vattr *, nfsv4stateid_t *, struct ucred *, NFSPROC_T *, struct nfsvattr *, int *, void *); static int nfsrpc_readrpc(vnode_t , struct uio *, struct ucred *, @@ -119,7 +145,7 @@ static int nfscl_doflayoutio(vnode_t, struct uio *, int *, int *, int *, static int nfscl_dofflayoutio(vnode_t, struct uio *, int *, int *, int *, nfsv4stateid_t *, int, struct nfscldevinfo *, struct nfscllayout *, struct nfsclflayout *, uint64_t, uint64_t, int, int, struct mbuf *, - struct ucred *, NFSPROC_T *); + struct nfsclwritedsdorpc *, struct ucred *, NFSPROC_T *); static struct mbuf *nfsm_copym(struct mbuf *, int, int); static int nfsrpc_readds(vnode_t, struct uio *, nfsv4stateid_t *, int *, struct nfsclds *, uint64_t, int, struct nfsfh *, int, int, int, @@ -127,11 +153,17 @@ static int nfsrpc_readds(vnode_t, struct uio *, nfsv4stateid_t *, int *, static int nfsrpc_writeds(vnode_t, struct uio *, int *, int *, nfsv4stateid_t *, struct nfsclds *, uint64_t, int, struct nfsfh *, int, int, int, int, struct ucred *, NFSPROC_T *); +static int nfsio_writedsmir(vnode_t, int *, int *, nfsv4stateid_t *, + struct nfsclds *, uint64_t, int, struct nfsfh *, struct mbuf *, int, int, + struct nfsclwritedsdorpc *, struct ucred *, NFSPROC_T *); static int nfsrpc_writedsmir(vnode_t, int *, int *, nfsv4stateid_t *, struct nfsclds *, uint64_t, int, struct nfsfh *, struct mbuf *, int, int, struct ucred *, NFSPROC_T *); static enum nfsclds_state nfscl_getsameserver(struct nfsmount *, struct nfsclds *, struct nfsclds **); +static int nfsio_commitds(vnode_t, uint64_t, int, struct nfsclds *, + struct nfsfh *, int, int, struct nfsclwritedsdorpc *, struct ucred *, + NFSPROC_T *); static int nfsrpc_commitds(vnode_t, uint64_t, int, struct nfsclds *, struct nfsfh *, int, int, struct ucred *, NFSPROC_T *); static void nfsrv_setuplayoutget(struct nfsrv_descript *, int, uint64_t, @@ -163,6 +195,8 @@ static int nfsrpc_layoutgetres(struct nfsmount *, vnode_t, uint8_t *, int, nfsv4stateid_t *, int, uint32_t *, struct nfscllayout **, struct nfsclflayouthead *, int, int, int *, struct ucred *, NFSPROC_T *); +int nfs_pnfsio(task_fn_t *, void *); + /* * nfs null call from vfs. */ @@ -5544,10 +5578,11 @@ nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, struct nfscldevinfo *dip; struct nfsclflayout *rflp; struct mbuf *m; + struct nfsclwritedsdorpc *drpc, *tdrpc; nfsv4stateid_t stateid; struct ucred *newcred; uint64_t lastbyte, len, off, oresid, xfer; - int eof, error, firstmirror, i, iolaymode, mirrorcnt, recalled; + int eof, error, firstmirror, i, iolaymode, mirrorcnt, recalled, timo; void *lckp; uint8_t *dev; void *iovbase; @@ -5627,6 +5662,7 @@ nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, * do all mirrors. */ m = NULL; + drpc = NULL; firstmirror = 0; mirrorcnt = 1; if ((layp->nfsly_flags & NFSLY_FLEXFILE) != 0 && @@ -5634,17 +5670,24 @@ nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, if (rwaccess == NFSV4OPEN_ACCESSREAD) { firstmirror = arc4random() % mirrorcnt; mirrorcnt = firstmirror + 1; - } else if (docommit == 0) { - /* - * Save values, so uiop can be rolled - * back upon a write error. - */ - offs = uiop->uio_offset; - resid = uiop->uio_resid; - iovbase = uiop->uio_iov->iov_base; - iovlen = uiop->uio_iov->iov_len; - m = nfsm_uiombuflist(uiop, len, NULL, - NULL); + } else { + if (docommit == 0) { + /* + * Save values, so uiop can be + * rolled back upon a write + * error. + */ + offs = uiop->uio_offset; + resid = uiop->uio_resid; + iovbase = + uiop->uio_iov->iov_base; + iovlen = uiop->uio_iov->iov_len; + m = nfsm_uiombuflist(uiop, len, + NULL, NULL); + } + tdrpc = drpc = malloc(sizeof(*drpc) * + (mirrorcnt - 1), M_TEMP, M_WAITOK | + M_ZERO); } } for (i = firstmirror; i < mirrorcnt && error == 0; i++){ @@ -5661,8 +5704,8 @@ nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, uiop, iomode, must_commit, &eof, &stateid, rwaccess, dip, layp, rflp, off, xfer, - i, docommit, m, newcred, - p); + i, docommit, m, tdrpc, + newcred, p); else error = nfscl_doflayoutio(vp, uiop, iomode, must_commit, @@ -5672,9 +5715,27 @@ nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, nfscl_reldevinfo(dip); } else error = EIO; + tdrpc++; } if (m != NULL) m_freem(m); + tdrpc = drpc; + timo = hz / 50; /* Wait for 20msec. */ + if (timo < 1) + timo = 1; + for (i = firstmirror; i < mirrorcnt - 1 && + tdrpc != NULL; i++, tdrpc++) { + /* + * For the unused drpc entries, both inprog and + * err == 0, so this loop won't break. + */ + while (tdrpc->inprog != 0 && tdrpc->done == 0) + tsleep(&tdrpc->tsk, PVFS, "clrpcio", + timo); + if (error == 0 && tdrpc->err != 0) + error = tdrpc->err; + } + free(drpc, M_TEMP); if (error == 0) { if (mirrorcnt > 1 && rwaccess == NFSV4OPEN_ACCESSWRITE && docommit == 0) { @@ -5898,8 +5959,8 @@ static int nfscl_dofflayoutio(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, int *eofp, nfsv4stateid_t *stateidp, int rwflag, struct nfscldevinfo *dp, struct nfscllayout *lyp, struct nfsclflayout *flp, uint64_t off, - uint64_t len, int mirror, int docommit, struct mbuf *mp, struct ucred *cred, - NFSPROC_T *p) + uint64_t len, int mirror, int docommit, struct mbuf *mp, + struct nfsclwritedsdorpc *drpc, struct ucred *cred, NFSPROC_T *p) { uint64_t transfer, xfer; int error, rel_off; @@ -5940,11 +6001,21 @@ nfscl_dofflayoutio(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, else xfer = len; if (docommit != 0) { - if (error == 0) - error = nfsrpc_commitds(vp, off, xfer, *dspp, - fhp, dp->nfsdi_vers, dp->nfsdi_minorvers, - tcred, p); - NFSCL_DEBUG(4, "aft nfsrpc_commitds=%d\n", error); + if (error == 0) { + /* + * Do last mirrored DS commit with this thread. + */ + if (mirror < flp->nfsfl_mirrorcnt - 1) + error = nfsio_commitds(vp, off, xfer, + *dspp, fhp, dp->nfsdi_vers, + dp->nfsdi_minorvers, drpc, tcred, + p); + else + error = nfsrpc_commitds(vp, off, xfer, + *dspp, fhp, dp->nfsdi_vers, + dp->nfsdi_minorvers, tcred, p); + } + NFSCL_DEBUG(4, "aft nfsio_commitds=%d\n", error); if (error == 0) { /* * Set both eof and uio_resid = 0 to end any @@ -5976,11 +6047,22 @@ nfscl_dofflayoutio(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, m = nfsm_copym(mp, rel_off, xfer); NFSCL_DEBUG(4, "mcopy reloff=%d xfer=%jd\n", rel_off, (uintmax_t)xfer); - error = nfsrpc_writedsmir(vp, iomode, - must_commit, stateidp, *dspp, off, xfer, - fhp, m, dp->nfsdi_vers, dp->nfsdi_minorvers, - tcred, p); - NFSCL_DEBUG(4, "nfsrpc_writedsmir=%d\n", error); + /* + * Do last write to a mirrored DS with this + * thread. + */ + if (mirror < flp->nfsfl_mirrorcnt - 1) + error = nfsio_writedsmir(vp, iomode, + must_commit, stateidp, *dspp, off, + xfer, fhp, m, dp->nfsdi_vers, + dp->nfsdi_minorvers, drpc, tcred, + p); + else + error = nfsrpc_writedsmir(vp, iomode, + must_commit, stateidp, *dspp, off, + xfer, fhp, m, dp->nfsdi_vers, + dp->nfsdi_minorvers, tcred, p); + NFSCL_DEBUG(4, "nfsio_writedsmir=%d\n", error); } } NFSCL_DEBUG(4, "aft read/writeds=%d\n", error); @@ -6306,6 +6388,62 @@ nfsrpc_writedsmir(vnode_t vp, int *iomode, int *must_commit, return (error); } +/* + * Start up the thread that will execute nfsrpc_writedsmir(). + */ +static void +start_writedsmir(void *arg, int pending) +{ + struct nfsclwritedsdorpc *drpc; + + drpc = (struct nfsclwritedsdorpc *)arg; + drpc->err = nfsrpc_writedsmir(drpc->vp, &drpc->iomode, + &drpc->must_commit, drpc->stateidp, drpc->dsp, drpc->off, drpc->len, + drpc->fhp, drpc->m, drpc->vers, drpc->minorvers, drpc->cred, + drpc->p); + drpc->done = 1; + NFSCL_DEBUG(4, "start_writedsmir: err=%d\n", drpc->err); +} + +/* + * Set up the write DS mirror call for the pNFS I/O thread. + */ +static int +nfsio_writedsmir(vnode_t vp, int *iomode, int *must_commit, + nfsv4stateid_t *stateidp, struct nfsclds *dsp, uint64_t off, int len, + struct nfsfh *fhp, struct mbuf *m, int vers, int minorvers, + struct nfsclwritedsdorpc *drpc, struct ucred *cred, NFSPROC_T *p) +{ + int error, ret; + + error = 0; + drpc->done = 0; + drpc->vp = vp; + drpc->iomode = *iomode; + drpc->must_commit = *must_commit; + drpc->stateidp = stateidp; + drpc->dsp = dsp; + drpc->off = off; + drpc->len = len; + drpc->fhp = fhp; + drpc->m = m; + drpc->vers = vers; + drpc->minorvers = minorvers; + drpc->cred = cred; + drpc->p = p; + drpc->inprog = 0; + ret = EIO; + if (nfs_pnfsiothreads > 0) { + ret = nfs_pnfsio(start_writedsmir, drpc); + NFSCL_DEBUG(4, "nfsio_writedsmir: nfs_pnfsio=%d\n", ret); + } + if (ret != 0) + error = nfsrpc_writedsmir(vp, iomode, must_commit, stateidp, + dsp, off, len, fhp, m, vers, minorvers, cred, p); + NFSCL_DEBUG(4, "nfsio_writedsmir: error=%d\n", error); + return (error); +} + /* * Free up the nfsclds structure. */ @@ -6435,6 +6573,56 @@ nfsrpc_commitds(vnode_t vp, uint64_t offset, int cnt, struct nfsclds *dsp, return (error); } +/* + * Start up the thread that will execute nfsrpc_commitds(). + */ +static void +start_commitds(void *arg, int pending) +{ + struct nfsclwritedsdorpc *drpc; + + drpc = (struct nfsclwritedsdorpc *)arg; + drpc->err = nfsrpc_commitds(drpc->vp, drpc->off, drpc->len, + drpc->dsp, drpc->fhp, drpc->vers, drpc->minorvers, drpc->cred, + drpc->p); + drpc->done = 1; + NFSCL_DEBUG(4, "start_commitds: err=%d\n", drpc->err); +} + +/* + * Set up the commit DS mirror call for the pNFS I/O thread. + */ +static int +nfsio_commitds(vnode_t vp, uint64_t offset, int cnt, struct nfsclds *dsp, + struct nfsfh *fhp, int vers, int minorvers, + struct nfsclwritedsdorpc *drpc, struct ucred *cred, NFSPROC_T *p) +{ + int error, ret; + + error = 0; + drpc->done = 0; + drpc->vp = vp; + drpc->off = offset; + drpc->len = cnt; + drpc->dsp = dsp; + drpc->fhp = fhp; + drpc->vers = vers; + drpc->minorvers = minorvers; + drpc->cred = cred; + drpc->p = p; + drpc->inprog = 0; + ret = EIO; + if (nfs_pnfsiothreads > 0) { + ret = nfs_pnfsio(start_commitds, drpc); + NFSCL_DEBUG(4, "nfsio_commitds: nfs_pnfsio=%d\n", ret); + } + if (ret != 0) + error = nfsrpc_commitds(vp, offset, cnt, dsp, fhp, vers, + minorvers, cred, p); + NFSCL_DEBUG(4, "nfsio_commitds: error=%d\n", error); + return (error); +} + /* * Set up the XDR arguments for the LayoutGet operation. */ From 8a7a65717a62ac8606b9cb342bfba4a4cdfcaa77 Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Tue, 17 Oct 2017 01:12:17 +0000 Subject: [PATCH 125/219] gdb kernel server: fixup Search:memory style This is a NFC patch to move around the Search:memory implementation so that it doesn't exceed the standard column width and doesn't take so much vertical space in gdb_trap. Submitted by: Daniel O'Connor Reviewed by: cem, jhb Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12684 --- sys/gdb/gdb_main.c | 49 ++++++++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 21 deletions(-) diff --git a/sys/gdb/gdb_main.c b/sys/gdb/gdb_main.c index f8f3836f66eb..7c10b3b2b5a9 100644 --- a/sys/gdb/gdb_main.c +++ b/sys/gdb/gdb_main.c @@ -94,6 +94,33 @@ gdb_init(void) return (cur_pri); } +static void +gdb_do_mem_search(void) +{ + size_t patlen; + intmax_t addr, size; + const unsigned char *found; + + if (gdb_rx_varhex(&addr) || gdb_rx_char() != ';' || + gdb_rx_varhex(&size) || gdb_rx_char() != ';' || + gdb_rx_bindata(gdb_bindata, sizeof(gdb_bindata), &patlen)) { + gdb_tx_err(EINVAL); + return; + } + if (gdb_search_mem((char *)(uintptr_t)addr, size, gdb_bindata, + patlen, &found)) { + if (found == 0ULL) + gdb_tx_begin('0'); + else { + gdb_tx_begin('1'); + gdb_tx_char(','); + gdb_tx_hex((intmax_t)(uintptr_t)found, 8); + } + gdb_tx_end(); + } else + gdb_tx_err(EIO); +} + static int gdb_trap(int type, int code) { @@ -257,27 +284,7 @@ gdb_trap(int type, int code) gdb_tx_end(); } } else if (gdb_rx_equal("Search:memory:")) { - size_t patlen; - intmax_t addr, size; - const unsigned char *found; - if (gdb_rx_varhex(&addr) || gdb_rx_char() != ';' || - gdb_rx_varhex(&size) || gdb_rx_char() != ';' || - gdb_rx_bindata(gdb_bindata, sizeof(gdb_bindata), &patlen)) { - gdb_tx_err(EINVAL); - break; - } - if (gdb_search_mem((char *)(uintptr_t)addr, size, gdb_bindata, patlen, &found)) { - if (found == 0ULL) - gdb_tx_begin('0'); - else { - gdb_tx_begin('1'); - gdb_tx_char(','); - gdb_tx_hex((intmax_t)(uintptr_t)found, 8); - } - gdb_tx_end(); - } else - gdb_tx_err(EIO); - break; + gdb_do_mem_search(); } else if (!gdb_cpu_query()) gdb_tx_empty(); break; From 088e763042828d9007ac631632a94b2aa48f3a82 Mon Sep 17 00:00:00 2001 From: Cy Schubert Date: Tue, 17 Oct 2017 01:15:13 +0000 Subject: [PATCH 126/219] Provide an option to run the anticongestion ntpd leapfile fetch in the background. Original patch submitted by feld@. I added the "optional" bit. Submitted by: feld (original patch) MFC after: 2 weeks --- etc/defaults/periodic.conf | 2 ++ etc/periodic/daily/480.leapfile-ntpd | 11 +++++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/etc/defaults/periodic.conf b/etc/defaults/periodic.conf index 801733301318..64d9ba487e10 100644 --- a/etc/defaults/periodic.conf +++ b/etc/defaults/periodic.conf @@ -141,6 +141,8 @@ daily_status_mail_rejects_shorten="NO" # Shorten output # 480.leapfile-ntpd daily_ntpd_leapfile_enable="YES" # Fetch NTP leapfile +daily_ntpd_leapfile_background="NO" # Fetch NTP leapfile + # in the background # 480.status-ntpd daily_status_ntpd_enable="NO" # Check NTP status diff --git a/etc/periodic/daily/480.leapfile-ntpd b/etc/periodic/daily/480.leapfile-ntpd index 6b2a1f33f1b7..812ba610567b 100755 --- a/etc/periodic/daily/480.leapfile-ntpd +++ b/etc/periodic/daily/480.leapfile-ntpd @@ -13,8 +13,15 @@ fi case "$daily_ntpd_leapfile_enable" in [Yy][Ee][Ss]) - anticongestion - service ntpd onefetch + case "$daily_ntpd_leapfile_background" in + [Yy][Ee][Ss]) + (anticongestion && service ntpd onefetch) & + ;; + *) + anticongestion + service ntpd onefetch + ;; + esac ;; esac From 53ddaabc12cc7915e785f630e3edd1526a93b321 Mon Sep 17 00:00:00 2001 From: Cy Schubert Date: Tue, 17 Oct 2017 01:15:55 +0000 Subject: [PATCH 127/219] Style. Replace 8 spaces with a tab. MFC after: 2 weeks (with prior commit to this file) --- etc/periodic/daily/480.leapfile-ntpd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/etc/periodic/daily/480.leapfile-ntpd b/etc/periodic/daily/480.leapfile-ntpd index 812ba610567b..0924a7445cad 100755 --- a/etc/periodic/daily/480.leapfile-ntpd +++ b/etc/periodic/daily/480.leapfile-ntpd @@ -22,7 +22,7 @@ case "$daily_ntpd_leapfile_enable" in service ntpd onefetch ;; esac - ;; + ;; esac exit $rc From 31a4787b803d523363d9d6f3f9b8a2e77acc4b89 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 17 Oct 2017 02:51:45 +0000 Subject: [PATCH 128/219] write.2: correct maximum nbytes size for EINVAL error In FreeBSD 11 and later debug.iosize_max_clamp defaults to 0, and the maximum nbytes count for write(2) is SSIZE_MAX. Update the man page to document this, and mention the sysctl that can be set to obtain the previous behaviour. PR: 196666 MFC after: 1 week Sponsored by: The FreeBSD Foundation --- lib/libc/sys/write.2 | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/lib/libc/sys/write.2 b/lib/libc/sys/write.2 index 823201362f28..9d469b5e9f00 100644 --- a/lib/libc/sys/write.2 +++ b/lib/libc/sys/write.2 @@ -28,7 +28,7 @@ .\" @(#)write.2 8.5 (Berkeley) 4/2/94 .\" $FreeBSD$ .\" -.Dd December 15, 2015 +.Dd October 16, 2017 .Dt WRITE 2 .Os .Sh NAME @@ -199,7 +199,12 @@ to enable writing on the disk label area. The value .Fa nbytes is greater than -.Dv INT_MAX . +.Dv SSIZE_MAX +(or greater than +.Dv INT_MAX , +if the sysctl +.Va debug.iosize_max_clamp +is non-zero). .El .Pp In addition, From 565e262b62fb4b8eacd4544ef5f995c058593649 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 17 Oct 2017 02:53:42 +0000 Subject: [PATCH 129/219] Remove lib/libstand again, accidentally readded in r324683 From a71a5d885fc7d3ba1dd82e85a276b6895e66fa57 Mon Sep 17 00:00:00 2001 From: Maxim Konovalov Date: Tue, 17 Oct 2017 14:37:12 +0000 Subject: [PATCH 130/219] DragonFly 5.0.0 release added. --- share/misc/bsd-family-tree | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/share/misc/bsd-family-tree b/share/misc/bsd-family-tree index 012e1595e213..982e7038c5f8 100644 --- a/share/misc/bsd-family-tree +++ b/share/misc/bsd-family-tree @@ -356,7 +356,7 @@ FreeBSD 5.2 | | | | | FreeBSD | | | | | | 11.1 FreeBSD | | | | | | 10.4 | | OpenBSD 6.2 | - | v | | | | + | v | | | DragonFly 5.0.0 | | | | | FreeBSD 12 -current | NetBSD -current OpenBSD -current DragonFly -current | | | | | @@ -720,6 +720,7 @@ FreeBSD 11.1 2017-07-26 [FBD] macOS 10.13 2017-09-25 [APL] FreeBSD 10.4 2017-10-03 [FBD] OpenBSD 6.2 2017-10-09 [OBD] +DragonFly 5.0.0 2017-10-16 [DFB] Bibliography ------------------------ From 20e9cab5faba8bb4589bb4cfbb1971bb744366fb Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Tue, 17 Oct 2017 15:39:38 +0000 Subject: [PATCH 131/219] iscsi: do not hold the global lock while tearing down a session It should be sufficient to hold the lock just for removing the session from the session list. Everything else should be covered by the session specific lock. On top of that, at present we can get a deadlock caused by waiting on the CAM SIM reference count while holding the global lock. A specific scenario involving ZFS is this: - concurrent termination of two sessions, S1 and S2 - session S1 completed all I/Os and sleeps in CAM waiting for device close by ZFS; - session S2 is also dead now, but can not forcefully complete outstanding requests by calling iscsi_session_cleanup() from iscsi_maintenance_thread_terminate(), since it can't get the same global sc_lock; - as soon as there are unfinished requests, ZFS can not do spa_config_enter() as writer, and so can not close the device for session S1; - deadlock. Reported by: Ben RUBSON Tested by: Ben RUBSON Reviewed by: mav, trasz MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D12652 --- sys/dev/iscsi/iscsi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/dev/iscsi/iscsi.c b/sys/dev/iscsi/iscsi.c index fc2553d48b9d..fb3cced004e3 100644 --- a/sys/dev/iscsi/iscsi.c +++ b/sys/dev/iscsi/iscsi.c @@ -434,6 +434,8 @@ iscsi_maintenance_thread_terminate(struct iscsi_session *is) sc = is->is_softc; sx_xlock(&sc->sc_lock); + TAILQ_REMOVE(&sc->sc_sessions, is, is_next); + sx_xunlock(&sc->sc_lock); icl_conn_close(is->is_conn); callout_drain(&is->is_callout); @@ -465,8 +467,6 @@ iscsi_maintenance_thread_terminate(struct iscsi_session *is) #ifdef ICL_KERNEL_PROXY cv_destroy(&is->is_login_cv); #endif - TAILQ_REMOVE(&sc->sc_sessions, is, is_next); - sx_xunlock(&sc->sc_lock); ISCSI_SESSION_DEBUG(is, "terminated"); free(is, M_ISCSI); From ad10496cf48ed751d53a53612717738cf475f4bf Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Tue, 17 Oct 2017 16:03:59 +0000 Subject: [PATCH 132/219] never retry oustanding requests when terminating iscsi session CAM_REQ_ABORTED sounds natural for aborting outstanding requests when tearing down a session, but that status actually causes eligible requests to be tried again. That's completely useless, so let's use CAM_DEV_NOT_THERE instead. Perhaps there is a better status, but this should be good enough. The change should affect only the session termination. Tested by: Ben RUBSON Reviewed by: mav, trasz MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D12653 --- sys/dev/iscsi/iscsi.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/sys/dev/iscsi/iscsi.c b/sys/dev/iscsi/iscsi.c index fb3cced004e3..d7a36c6d2655 100644 --- a/sys/dev/iscsi/iscsi.c +++ b/sys/dev/iscsi/iscsi.c @@ -291,17 +291,14 @@ iscsi_session_logout(struct iscsi_session *is) static void iscsi_session_terminate_task(struct iscsi_session *is, - struct iscsi_outstanding *io, bool requeue) + struct iscsi_outstanding *io, cam_status status) { ISCSI_SESSION_LOCK_ASSERT(is); if (io->io_ccb != NULL) { io->io_ccb->ccb_h.status &= ~(CAM_SIM_QUEUED | CAM_STATUS_MASK); - if (requeue) - io->io_ccb->ccb_h.status |= CAM_REQUEUE_REQ; - else - io->io_ccb->ccb_h.status |= CAM_REQ_ABORTED; + io->io_ccb->ccb_h.status |= status; if ((io->io_ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) { io->io_ccb->ccb_h.status |= CAM_DEV_QFRZN; xpt_freeze_devq(io->io_ccb->ccb_h.path, 1); @@ -313,14 +310,14 @@ iscsi_session_terminate_task(struct iscsi_session *is, } static void -iscsi_session_terminate_tasks(struct iscsi_session *is, bool requeue) +iscsi_session_terminate_tasks(struct iscsi_session *is, cam_status status) { struct iscsi_outstanding *io, *tmp; ISCSI_SESSION_LOCK_ASSERT(is); TAILQ_FOREACH_SAFE(io, &is->is_outstanding, io_next, tmp) { - iscsi_session_terminate_task(is, io, requeue); + iscsi_session_terminate_task(is, io, status); } } @@ -354,11 +351,11 @@ iscsi_session_cleanup(struct iscsi_session *is, bool destroy_sim) /* * Terminate SCSI tasks, asking CAM to requeue them. */ - iscsi_session_terminate_tasks(is, true); + iscsi_session_terminate_tasks(is, CAM_REQUEUE_REQ); return; } - iscsi_session_terminate_tasks(is, false); + iscsi_session_terminate_tasks(is, CAM_DEV_NOT_THERE); if (is->is_sim == NULL) return; @@ -1021,7 +1018,7 @@ iscsi_pdu_handle_task_response(struct icl_pdu *response) } else { aio = iscsi_outstanding_find(is, io->io_datasn); if (aio != NULL && aio->io_ccb != NULL) - iscsi_session_terminate_task(is, aio, false); + iscsi_session_terminate_task(is, aio, CAM_REQ_ABORTED); } iscsi_outstanding_remove(is, io); From fd8103ed4393f1acaaa4e944370503aa02bb8ae2 Mon Sep 17 00:00:00 2001 From: Jonathan Anderson Date: Tue, 17 Oct 2017 16:29:50 +0000 Subject: [PATCH 133/219] Add LLVM IR libraries to CLEANFILES. We previously taught the build system how to create files like libfoo.bc, but neglected to teach it about cleaning such files up. Rectify this now. MFC after: 1 week Sponsored by: DARPA, AFRL --- share/mk/bsd.lib.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/share/mk/bsd.lib.mk b/share/mk/bsd.lib.mk index ac21caaa4ab8..dc282ac2a27c 100644 --- a/share/mk/bsd.lib.mk +++ b/share/mk/bsd.lib.mk @@ -209,6 +209,8 @@ lib${LIB_PRIVATE}${LIB}.bc: ${BCOBJS} lib${LIB_PRIVATE}${LIB}.ll: ${LLOBJS} ${LLVM_LINK} -S -o ${.TARGET} ${LLOBJS} + +CLEANFILES+= lib${LIB_PRIVATE}${LIB}.bc lib${LIB_PRIVATE}${LIB}.ll .endif .if defined(SHLIB_NAME) || \ From a2063804a2b88ae476f8c5992e6f4e12b6207ac4 Mon Sep 17 00:00:00 2001 From: Gordon Tetlow Date: Tue, 17 Oct 2017 17:22:36 +0000 Subject: [PATCH 134/219] Update wpa_supplicant/hostapd for 2017-01 vulnerability release. hostapd: Avoid key reinstallation in FT handshake Prevent reinstallation of an already in-use group key Extend protection of GTK/IGTK reinstallation of WNM-Sleep Mode cases Fix TK configuration to the driver in EAPOL-Key 3/4 retry case Prevent installation of an all-zero TK Fix PTK rekeying to generate a new ANonce TDLS: Reject TPK-TK reconfiguration WNM: Ignore Key Data in WNM Sleep Mode Response frame if no PMF in use WNM: Ignore WNM-Sleep Mode Response if WNM-Sleep Mode has not been used WNM: Ignore WNM-Sleep Mode Response without pending request FT: Do not allow multiple Reassociation Response frames TDLS: Ignore incoming TDLS Setup Response retries Submitted by: jhb Obtained from: https://w1.fi/security/2017-01/ (against later version) Security: FreeBSD-SA-17:07 Security: CERT VU#228519 Security: CVE-2017-13077 Security: CVE-2017-13078 Security: CVE-2017-13079 Security: CVE-2017-13080 Security: CVE-2017-13081 Security: CVE-2017-13082 Security: CVE-2017-13086 Security: CVE-2017-13087 Security: CVE-2017-13088 Differential Revision: https://reviews.freebsd.org/D12693 --- contrib/wpa/src/ap/wpa_auth.c | 32 +++- contrib/wpa/src/ap/wpa_auth.h | 1 + contrib/wpa/src/ap/wpa_auth_ft.c | 10 ++ contrib/wpa/src/ap/wpa_auth_i.h | 1 + contrib/wpa/src/common/wpa_common.h | 12 ++ contrib/wpa/src/rsn_supp/tdls.c | 46 +++++- contrib/wpa/src/rsn_supp/wpa.c | 155 ++++++++++++------ contrib/wpa/src/rsn_supp/wpa_ft.c | 8 + contrib/wpa/src/rsn_supp/wpa_i.h | 7 + contrib/wpa/wpa_supplicant/ctrl_iface.c | 1 + contrib/wpa/wpa_supplicant/events.c | 1 + contrib/wpa/wpa_supplicant/wnm_sta.c | 16 ++ contrib/wpa/wpa_supplicant/wpa_supplicant_i.h | 1 + 13 files changed, 239 insertions(+), 52 deletions(-) diff --git a/contrib/wpa/src/ap/wpa_auth.c b/contrib/wpa/src/ap/wpa_auth.c index 2760a3f3a00e..63f252fb55b0 100644 --- a/contrib/wpa/src/ap/wpa_auth.c +++ b/contrib/wpa/src/ap/wpa_auth.c @@ -1893,6 +1893,21 @@ SM_STATE(WPA_PTK, AUTHENTICATION2) } +static int wpa_auth_sm_ptk_update(struct wpa_state_machine *sm) +{ + if (random_get_bytes(sm->ANonce, WPA_NONCE_LEN)) { + wpa_printf(MSG_ERROR, + "WPA: Failed to get random data for ANonce"); + sm->Disconnect = TRUE; + return -1; + } + wpa_hexdump(MSG_DEBUG, "WPA: Assign new ANonce", sm->ANonce, + WPA_NONCE_LEN); + sm->TimeoutCtr = 0; + return 0; +} + + SM_STATE(WPA_PTK, INITPMK) { u8 msk[2 * PMK_LEN]; @@ -2414,9 +2429,12 @@ SM_STEP(WPA_PTK) SM_ENTER(WPA_PTK, AUTHENTICATION); else if (sm->ReAuthenticationRequest) SM_ENTER(WPA_PTK, AUTHENTICATION2); - else if (sm->PTKRequest) - SM_ENTER(WPA_PTK, PTKSTART); - else switch (sm->wpa_ptk_state) { + else if (sm->PTKRequest) { + if (wpa_auth_sm_ptk_update(sm) < 0) + SM_ENTER(WPA_PTK, DISCONNECTED); + else + SM_ENTER(WPA_PTK, PTKSTART); + } else switch (sm->wpa_ptk_state) { case WPA_PTK_INITIALIZE: break; case WPA_PTK_DISCONNECT: @@ -3209,6 +3227,14 @@ int wpa_auth_sta_wpa_version(struct wpa_state_machine *sm) } +int wpa_auth_sta_ft_tk_already_set(struct wpa_state_machine *sm) +{ + if (!sm || !wpa_key_mgmt_ft(sm->wpa_key_mgmt)) + return 0; + return sm->tk_already_set; +} + + int wpa_auth_sta_clear_pmksa(struct wpa_state_machine *sm, struct rsn_pmksa_cache_entry *entry) { diff --git a/contrib/wpa/src/ap/wpa_auth.h b/contrib/wpa/src/ap/wpa_auth.h index fd04f169433a..1b1442f414fa 100644 --- a/contrib/wpa/src/ap/wpa_auth.h +++ b/contrib/wpa/src/ap/wpa_auth.h @@ -271,6 +271,7 @@ int wpa_auth_pairwise_set(struct wpa_state_machine *sm); int wpa_auth_get_pairwise(struct wpa_state_machine *sm); int wpa_auth_sta_key_mgmt(struct wpa_state_machine *sm); int wpa_auth_sta_wpa_version(struct wpa_state_machine *sm); +int wpa_auth_sta_ft_tk_already_set(struct wpa_state_machine *sm); int wpa_auth_sta_clear_pmksa(struct wpa_state_machine *sm, struct rsn_pmksa_cache_entry *entry); struct rsn_pmksa_cache_entry * diff --git a/contrib/wpa/src/ap/wpa_auth_ft.c b/contrib/wpa/src/ap/wpa_auth_ft.c index eeaffbf63516..f8f5dbe3e7da 100644 --- a/contrib/wpa/src/ap/wpa_auth_ft.c +++ b/contrib/wpa/src/ap/wpa_auth_ft.c @@ -780,6 +780,14 @@ void wpa_ft_install_ptk(struct wpa_state_machine *sm) return; } + if (sm->tk_already_set) { + /* Must avoid TK reconfiguration to prevent clearing of TX/RX + * PN in the driver */ + wpa_printf(MSG_DEBUG, + "FT: Do not re-install same PTK to the driver"); + return; + } + /* FIX: add STA entry to kernel/driver here? The set_key will fail * most likely without this.. At the moment, STA entry is added only * after association has been completed. This function will be called @@ -792,6 +800,7 @@ void wpa_ft_install_ptk(struct wpa_state_machine *sm) /* FIX: MLME-SetProtection.Request(TA, Tx_Rx) */ sm->pairwise_set = TRUE; + sm->tk_already_set = TRUE; } @@ -898,6 +907,7 @@ static int wpa_ft_process_auth_req(struct wpa_state_machine *sm, sm->pairwise = pairwise; sm->PTK_valid = TRUE; + sm->tk_already_set = FALSE; wpa_ft_install_ptk(sm); buflen = 2 + sizeof(struct rsn_mdie) + 2 + sizeof(struct rsn_ftie) + diff --git a/contrib/wpa/src/ap/wpa_auth_i.h b/contrib/wpa/src/ap/wpa_auth_i.h index 57b098f2ed72..234d84c84689 100644 --- a/contrib/wpa/src/ap/wpa_auth_i.h +++ b/contrib/wpa/src/ap/wpa_auth_i.h @@ -64,6 +64,7 @@ struct wpa_state_machine { struct wpa_ptk PTK; Boolean PTK_valid; Boolean pairwise_set; + Boolean tk_already_set; int keycount; Boolean Pair; struct wpa_key_replay_counter { diff --git a/contrib/wpa/src/common/wpa_common.h b/contrib/wpa/src/common/wpa_common.h index c08f6514ab57..a04e759373b9 100644 --- a/contrib/wpa/src/common/wpa_common.h +++ b/contrib/wpa/src/common/wpa_common.h @@ -213,8 +213,20 @@ struct wpa_ptk { size_t kck_len; size_t kek_len; size_t tk_len; + int installed; /* 1 if key has already been installed to driver */ }; +struct wpa_gtk { + u8 gtk[WPA_GTK_MAX_LEN]; + size_t gtk_len; +}; + +#ifdef CONFIG_IEEE80211W +struct wpa_igtk { + u8 igtk[WPA_IGTK_MAX_LEN]; + size_t igtk_len; +}; +#endif /* CONFIG_IEEE80211W */ /* WPA IE version 1 * 00-50-f2:1 (OUI:OUI type) diff --git a/contrib/wpa/src/rsn_supp/tdls.c b/contrib/wpa/src/rsn_supp/tdls.c index 722c20a706f9..cce59d7df5b9 100644 --- a/contrib/wpa/src/rsn_supp/tdls.c +++ b/contrib/wpa/src/rsn_supp/tdls.c @@ -112,6 +112,7 @@ struct wpa_tdls_peer { u8 tk[16]; /* TPK-TK; assuming only CCMP will be used */ } tpk; int tpk_set; + int tk_set; /* TPK-TK configured to the driver */ int tpk_success; int tpk_in_progress; @@ -192,6 +193,20 @@ static int wpa_tdls_set_key(struct wpa_sm *sm, struct wpa_tdls_peer *peer) u8 rsc[6]; enum wpa_alg alg; + if (peer->tk_set) { + /* + * This same TPK-TK has already been configured to the driver + * and this new configuration attempt (likely due to an + * unexpected retransmitted frame) would result in clearing + * the TX/RX sequence number which can break security, so must + * not allow that to happen. + */ + wpa_printf(MSG_INFO, "TDLS: TPK-TK for the peer " MACSTR + " has already been configured to the driver - do not reconfigure", + MAC2STR(peer->addr)); + return -1; + } + os_memset(rsc, 0, 6); switch (peer->cipher) { @@ -209,12 +224,15 @@ static int wpa_tdls_set_key(struct wpa_sm *sm, struct wpa_tdls_peer *peer) return -1; } + wpa_printf(MSG_DEBUG, "TDLS: Configure pairwise key for peer " MACSTR, + MAC2STR(peer->addr)); if (wpa_sm_set_key(sm, alg, peer->addr, -1, 1, rsc, sizeof(rsc), peer->tpk.tk, key_len) < 0) { wpa_printf(MSG_WARNING, "TDLS: Failed to set TPK to the " "driver"); return -1; } + peer->tk_set = 1; return 0; } @@ -690,7 +708,7 @@ static void wpa_tdls_peer_clear(struct wpa_sm *sm, struct wpa_tdls_peer *peer) peer->cipher = 0; peer->qos_info = 0; peer->wmm_capable = 0; - peer->tpk_set = peer->tpk_success = 0; + peer->tk_set = peer->tpk_set = peer->tpk_success = 0; peer->chan_switch_enabled = 0; os_memset(&peer->tpk, 0, sizeof(peer->tpk)); os_memset(peer->inonce, 0, WPA_NONCE_LEN); @@ -1153,6 +1171,7 @@ static int wpa_tdls_send_tpk_m1(struct wpa_sm *sm, wpa_tdls_peer_free(sm, peer); return -1; } + peer->tk_set = 0; /* A new nonce results in a new TK */ wpa_hexdump(MSG_DEBUG, "TDLS: Initiator Nonce for TPK handshake", peer->inonce, WPA_NONCE_LEN); os_memcpy(ftie->Snonce, peer->inonce, WPA_NONCE_LEN); @@ -1745,6 +1764,19 @@ static int wpa_tdls_addset_peer(struct wpa_sm *sm, struct wpa_tdls_peer *peer, } +static int tdls_nonce_set(const u8 *nonce) +{ + int i; + + for (i = 0; i < WPA_NONCE_LEN; i++) { + if (nonce[i]) + return 1; + } + + return 0; +} + + static int wpa_tdls_process_tpk_m1(struct wpa_sm *sm, const u8 *src_addr, const u8 *buf, size_t len) { @@ -1998,7 +2030,8 @@ static int wpa_tdls_process_tpk_m1(struct wpa_sm *sm, const u8 *src_addr, peer->rsnie_i_len = kde.rsn_ie_len; peer->cipher = cipher; - if (os_memcmp(peer->inonce, ftie->Snonce, WPA_NONCE_LEN) != 0) { + if (os_memcmp(peer->inonce, ftie->Snonce, WPA_NONCE_LEN) != 0 || + !tdls_nonce_set(peer->inonce)) { /* * There is no point in updating the RNonce for every obtained * TPK M1 frame (e.g., retransmission due to timeout) with the @@ -2014,6 +2047,7 @@ static int wpa_tdls_process_tpk_m1(struct wpa_sm *sm, const u8 *src_addr, "TDLS: Failed to get random data for responder nonce"); goto error; } + peer->tk_set = 0; /* A new nonce results in a new TK */ } #if 0 @@ -2170,6 +2204,14 @@ static int wpa_tdls_process_tpk_m2(struct wpa_sm *sm, const u8 *src_addr, "ignore TPK M2 from " MACSTR, MAC2STR(src_addr)); return -1; } + + if (peer->tpk_success) { + wpa_printf(MSG_INFO, "TDLS: Ignore incoming TPK M2 retry, from " + MACSTR " as TPK M3 was already sent", + MAC2STR(src_addr)); + return 0; + } + wpa_tdls_tpk_retry_timeout_cancel(sm, peer, WLAN_TDLS_SETUP_REQUEST); if (len < 3 + 2 + 1) { diff --git a/contrib/wpa/src/rsn_supp/wpa.c b/contrib/wpa/src/rsn_supp/wpa.c index d397ff1605c2..bc50c97141b6 100644 --- a/contrib/wpa/src/rsn_supp/wpa.c +++ b/contrib/wpa/src/rsn_supp/wpa.c @@ -605,6 +605,12 @@ static int wpa_supplicant_install_ptk(struct wpa_sm *sm, const u8 *key_rsc; u8 null_rsc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; + if (sm->ptk.installed) { + wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, + "WPA: Do not re-install same PTK to the driver"); + return 0; + } + wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, "WPA: Installing PTK to the driver"); @@ -643,6 +649,7 @@ static int wpa_supplicant_install_ptk(struct wpa_sm *sm, /* TK is not needed anymore in supplicant */ os_memset(sm->ptk.tk, 0, WPA_TK_MAX_LEN); + sm->ptk.installed = 1; if (sm->wpa_ptk_rekey) { eloop_cancel_timeout(wpa_sm_rekey_ptk, sm, NULL); @@ -692,11 +699,23 @@ struct wpa_gtk_data { static int wpa_supplicant_install_gtk(struct wpa_sm *sm, const struct wpa_gtk_data *gd, - const u8 *key_rsc) + const u8 *key_rsc, int wnm_sleep) { const u8 *_gtk = gd->gtk; u8 gtk_buf[32]; + /* Detect possible key reinstallation */ + if ((sm->gtk.gtk_len == (size_t) gd->gtk_len && + os_memcmp(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len) == 0) || + (sm->gtk_wnm_sleep.gtk_len == (size_t) gd->gtk_len && + os_memcmp(sm->gtk_wnm_sleep.gtk, gd->gtk, + sm->gtk_wnm_sleep.gtk_len) == 0)) { + wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, + "WPA: Not reinstalling already in-use GTK to the driver (keyidx=%d tx=%d len=%d)", + gd->keyidx, gd->tx, gd->gtk_len); + return 0; + } + wpa_hexdump_key(MSG_DEBUG, "WPA: Group Key", gd->gtk, gd->gtk_len); wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, "WPA: Installing GTK to the driver (keyidx=%d tx=%d len=%d)", @@ -731,6 +750,15 @@ static int wpa_supplicant_install_gtk(struct wpa_sm *sm, } os_memset(gtk_buf, 0, sizeof(gtk_buf)); + if (wnm_sleep) { + sm->gtk_wnm_sleep.gtk_len = gd->gtk_len; + os_memcpy(sm->gtk_wnm_sleep.gtk, gd->gtk, + sm->gtk_wnm_sleep.gtk_len); + } else { + sm->gtk.gtk_len = gd->gtk_len; + os_memcpy(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len); + } + return 0; } @@ -788,7 +816,7 @@ static int wpa_supplicant_pairwise_gtk(struct wpa_sm *sm, (wpa_supplicant_check_group_cipher(sm, sm->group_cipher, gtk_len, gtk_len, &gd.key_rsc_len, &gd.alg) || - wpa_supplicant_install_gtk(sm, &gd, key->key_rsc))) { + wpa_supplicant_install_gtk(sm, &gd, key->key_rsc, 0))) { wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, "RSN: Failed to install GTK"); os_memset(&gd, 0, sizeof(gd)); @@ -802,6 +830,58 @@ static int wpa_supplicant_pairwise_gtk(struct wpa_sm *sm, } +#ifdef CONFIG_IEEE80211W +static int wpa_supplicant_install_igtk(struct wpa_sm *sm, + const struct wpa_igtk_kde *igtk, + int wnm_sleep) +{ + size_t len = wpa_cipher_key_len(sm->mgmt_group_cipher); + u16 keyidx = WPA_GET_LE16(igtk->keyid); + + /* Detect possible key reinstallation */ + if ((sm->igtk.igtk_len == len && + os_memcmp(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len) == 0) || + (sm->igtk_wnm_sleep.igtk_len == len && + os_memcmp(sm->igtk_wnm_sleep.igtk, igtk->igtk, + sm->igtk_wnm_sleep.igtk_len) == 0)) { + wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, + "WPA: Not reinstalling already in-use IGTK to the driver (keyidx=%d)", + keyidx); + return 0; + } + + wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, + "WPA: IGTK keyid %d pn %02x%02x%02x%02x%02x%02x", + keyidx, MAC2STR(igtk->pn)); + wpa_hexdump_key(MSG_DEBUG, "WPA: IGTK", igtk->igtk, len); + if (keyidx > 4095) { + wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, + "WPA: Invalid IGTK KeyID %d", keyidx); + return -1; + } + if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), + broadcast_ether_addr, + keyidx, 0, igtk->pn, sizeof(igtk->pn), + igtk->igtk, len) < 0) { + wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, + "WPA: Failed to configure IGTK to the driver"); + return -1; + } + + if (wnm_sleep) { + sm->igtk_wnm_sleep.igtk_len = len; + os_memcpy(sm->igtk_wnm_sleep.igtk, igtk->igtk, + sm->igtk_wnm_sleep.igtk_len); + } else { + sm->igtk.igtk_len = len; + os_memcpy(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len); + } + + return 0; +} +#endif /* CONFIG_IEEE80211W */ + + static int ieee80211w_set_keys(struct wpa_sm *sm, struct wpa_eapol_ie_parse *ie) { @@ -812,30 +892,14 @@ static int ieee80211w_set_keys(struct wpa_sm *sm, if (ie->igtk) { size_t len; const struct wpa_igtk_kde *igtk; - u16 keyidx; + len = wpa_cipher_key_len(sm->mgmt_group_cipher); if (ie->igtk_len != WPA_IGTK_KDE_PREFIX_LEN + len) return -1; + igtk = (const struct wpa_igtk_kde *) ie->igtk; - keyidx = WPA_GET_LE16(igtk->keyid); - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, "WPA: IGTK keyid %d " - "pn %02x%02x%02x%02x%02x%02x", - keyidx, MAC2STR(igtk->pn)); - wpa_hexdump_key(MSG_DEBUG, "WPA: IGTK", - igtk->igtk, len); - if (keyidx > 4095) { - wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, - "WPA: Invalid IGTK KeyID %d", keyidx); + if (wpa_supplicant_install_igtk(sm, igtk, 0) < 0) return -1; - } - if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), - broadcast_ether_addr, - keyidx, 0, igtk->pn, sizeof(igtk->pn), - igtk->igtk, len) < 0) { - wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, - "WPA: Failed to configure IGTK to the driver"); - return -1; - } } return 0; @@ -1483,7 +1547,7 @@ static void wpa_supplicant_process_1_of_2(struct wpa_sm *sm, if (ret) goto failed; - if (wpa_supplicant_install_gtk(sm, &gd, key->key_rsc) || + if (wpa_supplicant_install_gtk(sm, &gd, key->key_rsc, 0) || wpa_supplicant_send_2_of_2(sm, key, ver, key_info)) goto failed; os_memset(&gd, 0, sizeof(gd)); @@ -2251,7 +2315,7 @@ void wpa_sm_deinit(struct wpa_sm *sm) */ void wpa_sm_notify_assoc(struct wpa_sm *sm, const u8 *bssid) { - int clear_ptk = 1; + int clear_keys = 1; if (sm == NULL) return; @@ -2277,11 +2341,11 @@ void wpa_sm_notify_assoc(struct wpa_sm *sm, const u8 *bssid) /* Prepare for the next transition */ wpa_ft_prepare_auth_request(sm, NULL); - clear_ptk = 0; + clear_keys = 0; } #endif /* CONFIG_IEEE80211R */ - if (clear_ptk) { + if (clear_keys) { /* * IEEE 802.11, 8.4.10: Delete PTK SA on (re)association if * this is not part of a Fast BSS Transition. @@ -2291,6 +2355,12 @@ void wpa_sm_notify_assoc(struct wpa_sm *sm, const u8 *bssid) os_memset(&sm->ptk, 0, sizeof(sm->ptk)); sm->tptk_set = 0; os_memset(&sm->tptk, 0, sizeof(sm->tptk)); + os_memset(&sm->gtk, 0, sizeof(sm->gtk)); + os_memset(&sm->gtk_wnm_sleep, 0, sizeof(sm->gtk_wnm_sleep)); +#ifdef CONFIG_IEEE80211W + os_memset(&sm->igtk, 0, sizeof(sm->igtk)); + os_memset(&sm->igtk_wnm_sleep, 0, sizeof(sm->igtk_wnm_sleep)); +#endif /* CONFIG_IEEE80211W */ } #ifdef CONFIG_TDLS @@ -2322,6 +2392,9 @@ void wpa_sm_notify_disassoc(struct wpa_sm *sm) #ifdef CONFIG_TDLS wpa_tdls_disassoc(sm); #endif /* CONFIG_TDLS */ +#ifdef CONFIG_IEEE80211R + sm->ft_reassoc_completed = 0; +#endif /* CONFIG_IEEE80211R */ /* Keys are not needed in the WPA state machine anymore */ wpa_sm_drop_sa(sm); @@ -2807,6 +2880,12 @@ void wpa_sm_drop_sa(struct wpa_sm *sm) os_memset(sm->pmk, 0, sizeof(sm->pmk)); os_memset(&sm->ptk, 0, sizeof(sm->ptk)); os_memset(&sm->tptk, 0, sizeof(sm->tptk)); + os_memset(&sm->gtk, 0, sizeof(sm->gtk)); + os_memset(&sm->gtk_wnm_sleep, 0, sizeof(sm->gtk_wnm_sleep)); +#ifdef CONFIG_IEEE80211W + os_memset(&sm->igtk, 0, sizeof(sm->igtk)); + os_memset(&sm->igtk_wnm_sleep, 0, sizeof(sm->igtk_wnm_sleep)); +#endif /* CONFIG_IEEE80211W */ #ifdef CONFIG_IEEE80211R os_memset(sm->xxkey, 0, sizeof(sm->xxkey)); os_memset(sm->pmk_r0, 0, sizeof(sm->pmk_r0)); @@ -2870,7 +2949,7 @@ int wpa_wnmsleep_install_key(struct wpa_sm *sm, u8 subelem_id, u8 *buf) wpa_hexdump_key(MSG_DEBUG, "Install GTK (WNM SLEEP)", gd.gtk, gd.gtk_len); - if (wpa_supplicant_install_gtk(sm, &gd, key_rsc)) { + if (wpa_supplicant_install_gtk(sm, &gd, key_rsc, 1)) { os_memset(&gd, 0, sizeof(gd)); wpa_printf(MSG_DEBUG, "Failed to install the GTK in " "WNM mode"); @@ -2879,29 +2958,11 @@ int wpa_wnmsleep_install_key(struct wpa_sm *sm, u8 subelem_id, u8 *buf) os_memset(&gd, 0, sizeof(gd)); #ifdef CONFIG_IEEE80211W } else if (subelem_id == WNM_SLEEP_SUBELEM_IGTK) { - struct wpa_igtk_kde igd; - u16 keyidx; + const struct wpa_igtk_kde *igtk; - os_memset(&igd, 0, sizeof(igd)); - keylen = wpa_cipher_key_len(sm->mgmt_group_cipher); - os_memcpy(igd.keyid, buf + 2, 2); - os_memcpy(igd.pn, buf + 4, 6); - - keyidx = WPA_GET_LE16(igd.keyid); - os_memcpy(igd.igtk, buf + 10, keylen); - - wpa_hexdump_key(MSG_DEBUG, "Install IGTK (WNM SLEEP)", - igd.igtk, keylen); - if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), - broadcast_ether_addr, - keyidx, 0, igd.pn, sizeof(igd.pn), - igd.igtk, keylen) < 0) { - wpa_printf(MSG_DEBUG, "Failed to install the IGTK in " - "WNM mode"); - os_memset(&igd, 0, sizeof(igd)); + igtk = (const struct wpa_igtk_kde *) (buf + 2); + if (wpa_supplicant_install_igtk(sm, igtk, 1) < 0) return -1; - } - os_memset(&igd, 0, sizeof(igd)); #endif /* CONFIG_IEEE80211W */ } else { wpa_printf(MSG_DEBUG, "Unknown element id"); diff --git a/contrib/wpa/src/rsn_supp/wpa_ft.c b/contrib/wpa/src/rsn_supp/wpa_ft.c index 205793e7f43a..d45bb4585e50 100644 --- a/contrib/wpa/src/rsn_supp/wpa_ft.c +++ b/contrib/wpa/src/rsn_supp/wpa_ft.c @@ -153,6 +153,7 @@ static u8 * wpa_ft_gen_req_ies(struct wpa_sm *sm, size_t *len, u16 capab; sm->ft_completed = 0; + sm->ft_reassoc_completed = 0; buf_len = 2 + sizeof(struct rsn_mdie) + 2 + sizeof(struct rsn_ftie) + 2 + sm->r0kh_id_len + ric_ies_len + 100; @@ -681,6 +682,11 @@ int wpa_ft_validate_reassoc_resp(struct wpa_sm *sm, const u8 *ies, return -1; } + if (sm->ft_reassoc_completed) { + wpa_printf(MSG_DEBUG, "FT: Reassociation has already been completed for this FT protocol instance - ignore unexpected retransmission"); + return 0; + } + if (wpa_ft_parse_ies(ies, ies_len, &parse) < 0) { wpa_printf(MSG_DEBUG, "FT: Failed to parse IEs"); return -1; @@ -781,6 +787,8 @@ int wpa_ft_validate_reassoc_resp(struct wpa_sm *sm, const u8 *ies, return -1; } + sm->ft_reassoc_completed = 1; + if (wpa_ft_process_gtk_subelem(sm, parse.gtk, parse.gtk_len) < 0) return -1; diff --git a/contrib/wpa/src/rsn_supp/wpa_i.h b/contrib/wpa/src/rsn_supp/wpa_i.h index 965a9c1d577c..85cc86282640 100644 --- a/contrib/wpa/src/rsn_supp/wpa_i.h +++ b/contrib/wpa/src/rsn_supp/wpa_i.h @@ -30,6 +30,12 @@ struct wpa_sm { u8 rx_replay_counter[WPA_REPLAY_COUNTER_LEN]; int rx_replay_counter_set; u8 request_counter[WPA_REPLAY_COUNTER_LEN]; + struct wpa_gtk gtk; + struct wpa_gtk gtk_wnm_sleep; +#ifdef CONFIG_IEEE80211W + struct wpa_igtk igtk; + struct wpa_igtk igtk_wnm_sleep; +#endif /* CONFIG_IEEE80211W */ struct eapol_sm *eapol; /* EAPOL state machine from upper level code */ @@ -121,6 +127,7 @@ struct wpa_sm { size_t r0kh_id_len; u8 r1kh_id[FT_R1KH_ID_LEN]; int ft_completed; + int ft_reassoc_completed; int over_the_ds_in_progress; u8 target_ap[ETH_ALEN]; /* over-the-DS target AP */ int set_ptk_after_assoc; diff --git a/contrib/wpa/wpa_supplicant/ctrl_iface.c b/contrib/wpa/wpa_supplicant/ctrl_iface.c index 3b97806d871d..25dcdf7ee321 100644 --- a/contrib/wpa/wpa_supplicant/ctrl_iface.c +++ b/contrib/wpa/wpa_supplicant/ctrl_iface.c @@ -6891,6 +6891,7 @@ static void wpa_supplicant_ctrl_iface_flush(struct wpa_supplicant *wpa_s) } eloop_cancel_timeout(wpas_network_reenabled, wpa_s, NULL); + wpa_s->wnmsleep_used = 0; } diff --git a/contrib/wpa/wpa_supplicant/events.c b/contrib/wpa/wpa_supplicant/events.c index 3af1c7d89c64..e2105ec505f5 100644 --- a/contrib/wpa/wpa_supplicant/events.c +++ b/contrib/wpa/wpa_supplicant/events.c @@ -303,6 +303,7 @@ void wpa_supplicant_mark_disassoc(struct wpa_supplicant *wpa_s) wpa_s->key_mgmt = 0; wpas_rrm_reset(wpa_s); + wpa_s->wnmsleep_used = 0; } diff --git a/contrib/wpa/wpa_supplicant/wnm_sta.c b/contrib/wpa/wpa_supplicant/wnm_sta.c index 954de67c2aa3..d88c863ac25e 100644 --- a/contrib/wpa/wpa_supplicant/wnm_sta.c +++ b/contrib/wpa/wpa_supplicant/wnm_sta.c @@ -137,6 +137,8 @@ int ieee802_11_send_wnmsleep_req(struct wpa_supplicant *wpa_s, if (res < 0) wpa_printf(MSG_DEBUG, "Failed to send WNM-Sleep Request " "(action=%d, intval=%d)", action, intval); + else + wpa_s->wnmsleep_used = 1; os_free(wnmsleep_ie); os_free(wnmtfs_ie); @@ -187,6 +189,12 @@ static void wnm_sleep_mode_exit_success(struct wpa_supplicant *wpa_s, end = ptr + key_len_total; wpa_hexdump_key(MSG_DEBUG, "WNM: Key Data", ptr, key_len_total); + if (key_len_total && !wpa_sm_pmf_enabled(wpa_s->wpa)) { + wpa_msg(wpa_s, MSG_INFO, + "WNM: Ignore Key Data in WNM-Sleep Mode Response - PMF not enabled"); + return; + } + while (ptr + 1 < end) { if (ptr + 2 + ptr[1] > end) { wpa_printf(MSG_DEBUG, "WNM: Invalid Key Data element " @@ -247,6 +255,12 @@ static void ieee802_11_rx_wnmsleep_resp(struct wpa_supplicant *wpa_s, u8 *tfsresp_ie_end = NULL; size_t left; + if (!wpa_s->wnmsleep_used) { + wpa_printf(MSG_DEBUG, + "WNM: Ignore WNM-Sleep Mode Response frame since WNM-Sleep Mode operation has not been requested"); + return; + } + if (len < 3) return; key_len_total = WPA_GET_LE16(frm + 1); @@ -282,6 +296,8 @@ static void ieee802_11_rx_wnmsleep_resp(struct wpa_supplicant *wpa_s, return; } + wpa_s->wnmsleep_used = 0; + if (wnmsleep_ie->status == WNM_STATUS_SLEEP_ACCEPT || wnmsleep_ie->status == WNM_STATUS_SLEEP_EXIT_ACCEPT_GTK_UPDATE) { wpa_printf(MSG_DEBUG, "Successfully recv WNM-Sleep Response " diff --git a/contrib/wpa/wpa_supplicant/wpa_supplicant_i.h b/contrib/wpa/wpa_supplicant/wpa_supplicant_i.h index 58df48c548ea..318768bc2776 100644 --- a/contrib/wpa/wpa_supplicant/wpa_supplicant_i.h +++ b/contrib/wpa/wpa_supplicant/wpa_supplicant_i.h @@ -658,6 +658,7 @@ struct wpa_supplicant { unsigned int reattach:1; /* reassociation to the same BSS requested */ unsigned int mac_addr_changed:1; unsigned int added_vif:1; + unsigned int wnmsleep_used:1; struct os_reltime last_mac_addr_change; int last_mac_addr_style; From 3a4661b9b4f2fd0b49b1efdea6b2b93cb1c27ef3 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 17 Oct 2017 18:00:01 +0000 Subject: [PATCH 135/219] loader: initialize dv_cleanup in md.c to eliminate clang warning Submitted by: Zakary Nafziger Sponsored by: The FreeBSD Foundation --- sys/boot/common/md.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sys/boot/common/md.c b/sys/boot/common/md.c index bb469a27f62b..5585218b3276 100644 --- a/sys/boot/common/md.c +++ b/sys/boot/common/md.c @@ -73,7 +73,8 @@ struct devsw md_dev = { md_open, md_close, noioctl, - md_print + md_print, + NULL }; static int From 753e292217c103661d546d2b92b2bbd6f2e458bd Mon Sep 17 00:00:00 2001 From: Bryan Drewery Date: Tue, 17 Oct 2017 19:01:01 +0000 Subject: [PATCH 136/219] Add a test for r324671 along with some other masked tests. MFC after: 1 week Sponsored by: Dell EMC Isilon --- tests/sys/kern/ptrace_test.c | 254 +++++++++++++++++++++++++++++++++-- 1 file changed, 245 insertions(+), 9 deletions(-) diff --git a/tests/sys/kern/ptrace_test.c b/tests/sys/kern/ptrace_test.c index e2a89c116232..97381213c874 100644 --- a/tests/sys/kern/ptrace_test.c +++ b/tests/sys/kern/ptrace_test.c @@ -2402,6 +2402,106 @@ ATF_TC_BODY(ptrace__PT_CONTINUE_with_signal_full_sigqueue, tc) ATF_REQUIRE(errno == ECHILD); } +static sem_t sigusr1_sem; +static int got_usr1; + +static void +sigusr1_sempost_handler(int sig __unused) +{ + + got_usr1++; + CHILD_REQUIRE(sem_post(&sigusr1_sem) == 0); +} + +/* + * Verify that even if the signal queue is full for a child process, + * and the signal is masked, a PT_CONTINUE with a signal will not + * result in loss of that signal. + */ +ATF_TC_WITHOUT_HEAD(ptrace__PT_CONTINUE_with_signal_masked_full_sigqueue); +ATF_TC_BODY(ptrace__PT_CONTINUE_with_signal_masked_full_sigqueue, tc) +{ + struct ptrace_lwpinfo pl; + pid_t fpid, wpid; + int status, err; + int max_pending_per_proc; + size_t len; + int i; + sigset_t sigmask; + + ATF_REQUIRE(signal(SIGUSR2, handler) != SIG_ERR); + ATF_REQUIRE(sem_init(&sigusr1_sem, 0, 0) == 0); + ATF_REQUIRE(signal(SIGUSR1, sigusr1_sempost_handler) != SIG_ERR); + + got_usr1 = 0; + ATF_REQUIRE((fpid = fork()) != -1); + if (fpid == 0) { + CHILD_REQUIRE(sigemptyset(&sigmask) == 0); + CHILD_REQUIRE(sigaddset(&sigmask, SIGUSR1) == 0); + CHILD_REQUIRE(sigprocmask(SIG_BLOCK, &sigmask, NULL) == 0); + + trace_me(); + CHILD_REQUIRE(got_usr1 == 0); + + /* Allow the pending SIGUSR1 in now. */ + CHILD_REQUIRE(sigprocmask(SIG_UNBLOCK, &sigmask, NULL) == 0); + /* Wait to receive the SIGUSR1. */ + do { + err = sem_wait(&sigusr1_sem); + CHILD_REQUIRE(err == 0 || errno == EINTR); + } while (err != 0 && errno == EINTR); + CHILD_REQUIRE(got_usr1 == 1); + exit(1); + } + + /* The first wait() should report the stop from SIGSTOP. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + + len = sizeof(max_pending_per_proc); + ATF_REQUIRE(sysctlbyname("kern.sigqueue.max_pending_per_proc", + &max_pending_per_proc, &len, NULL, 0) == 0); + + /* Fill the signal queue. */ + for (i = 0; i < max_pending_per_proc; ++i) + ATF_REQUIRE(kill(fpid, SIGUSR2) == 0); + + /* Continue with signal. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, SIGUSR1) == 0); + + /* Collect and ignore all of the SIGUSR2. */ + for (i = 0; i < max_pending_per_proc; ++i) { + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGUSR2); + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, 0) == 0); + } + + /* Now our PT_CONTINUE'd SIGUSR1 should cause a stop after unmask. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGUSR1); + ATF_REQUIRE(ptrace(PT_LWPINFO, fpid, (caddr_t)&pl, sizeof(pl)) != -1); + ATF_REQUIRE(pl.pl_siginfo.si_signo == SIGUSR1); + + /* Continue the child, ignoring the SIGUSR1. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, 0) == 0); + + /* The last wait() should report exit after receiving SIGUSR1. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + wpid = wait(&status); + ATF_REQUIRE(wpid == -1); + ATF_REQUIRE(errno == ECHILD); +} + /* * Verify that, after stopping due to a signal, that signal can be * replaced with another signal. @@ -2674,15 +2774,6 @@ ATF_TC_BODY(ptrace__PT_CONTINUE_with_signal_kqueue, tc) ATF_REQUIRE(errno == ECHILD); } -static sem_t sigusr1_sem; - -static void -sigusr1_sempost_handler(int sig __unused) -{ - - CHILD_REQUIRE(sem_post(&sigusr1_sem) == 0); -} - static void * signal_thread(void *arg) { @@ -2717,6 +2808,148 @@ signal_thread(void *arg) return (NULL); } +/* + * Verify that a traced process with blocked signal received the + * signal from kill() once unmasked. + */ +ATF_TC_WITHOUT_HEAD(ptrace__killed_with_sigmask); +ATF_TC_BODY(ptrace__killed_with_sigmask, tc) +{ + struct ptrace_lwpinfo pl; + pid_t fpid, wpid; + int status, err; + sigset_t sigmask; + + ATF_REQUIRE(sem_init(&sigusr1_sem, 0, 0) == 0); + ATF_REQUIRE(signal(SIGUSR1, sigusr1_sempost_handler) != SIG_ERR); + got_usr1 = 0; + + ATF_REQUIRE((fpid = fork()) != -1); + if (fpid == 0) { + CHILD_REQUIRE(sigemptyset(&sigmask) == 0); + CHILD_REQUIRE(sigaddset(&sigmask, SIGUSR1) == 0); + CHILD_REQUIRE(sigprocmask(SIG_BLOCK, &sigmask, NULL) == 0); + + trace_me(); + CHILD_REQUIRE(got_usr1 == 0); + + /* Allow the pending SIGUSR1 in now. */ + CHILD_REQUIRE(sigprocmask(SIG_UNBLOCK, &sigmask, NULL) == 0); + /* Wait to receive a SIGUSR1. */ + do { + err = sem_wait(&sigusr1_sem); + CHILD_REQUIRE(err == 0 || errno == EINTR); + } while (err != 0 && errno == EINTR); + CHILD_REQUIRE(got_usr1 == 1); + exit(1); + } + + /* The first wait() should report the stop from SIGSTOP. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + ATF_REQUIRE(ptrace(PT_LWPINFO, fpid, (caddr_t)&pl, sizeof(pl)) != -1); + ATF_REQUIRE(pl.pl_siginfo.si_signo == SIGSTOP); + + /* Send blocked SIGUSR1 which should cause a stop. */ + ATF_REQUIRE(kill(fpid, SIGUSR1) == 0); + + /* Continue the child ignoring the SIGSTOP. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, 0) == 0); + + /* The next wait() should report the kill(SIGUSR1) was received. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGUSR1); + ATF_REQUIRE(ptrace(PT_LWPINFO, fpid, (caddr_t)&pl, sizeof(pl)) != -1); + ATF_REQUIRE(pl.pl_siginfo.si_signo == SIGUSR1); + + /* Continue the child, allowing in the SIGUSR1. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, SIGUSR1) == 0); + + /* The last wait() should report normal exit with code 1. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + wpid = wait(&status); + ATF_REQUIRE(wpid == -1); + ATF_REQUIRE(errno == ECHILD); +} + +/* + * Verify that a traced process with blocked signal received the + * signal from PT_CONTINUE once unmasked. + */ +ATF_TC_WITHOUT_HEAD(ptrace__PT_CONTINUE_with_sigmask); +ATF_TC_BODY(ptrace__PT_CONTINUE_with_sigmask, tc) +{ + struct ptrace_lwpinfo pl; + pid_t fpid, wpid; + int status, err; + sigset_t sigmask; + + ATF_REQUIRE(sem_init(&sigusr1_sem, 0, 0) == 0); + ATF_REQUIRE(signal(SIGUSR1, sigusr1_sempost_handler) != SIG_ERR); + got_usr1 = 0; + + ATF_REQUIRE((fpid = fork()) != -1); + if (fpid == 0) { + CHILD_REQUIRE(sigemptyset(&sigmask) == 0); + CHILD_REQUIRE(sigaddset(&sigmask, SIGUSR1) == 0); + CHILD_REQUIRE(sigprocmask(SIG_BLOCK, &sigmask, NULL) == 0); + + trace_me(); + CHILD_REQUIRE(got_usr1 == 0); + + /* Allow the pending SIGUSR1 in now. */ + CHILD_REQUIRE(sigprocmask(SIG_UNBLOCK, &sigmask, NULL) == 0); + /* Wait to receive a SIGUSR1. */ + do { + err = sem_wait(&sigusr1_sem); + CHILD_REQUIRE(err == 0 || errno == EINTR); + } while (err != 0 && errno == EINTR); + + CHILD_REQUIRE(got_usr1 == 1); + exit(1); + } + + /* The first wait() should report the stop from SIGSTOP. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + ATF_REQUIRE(ptrace(PT_LWPINFO, fpid, (caddr_t)&pl, sizeof(pl)) != -1); + ATF_REQUIRE(pl.pl_siginfo.si_signo == SIGSTOP); + + /* Continue the child replacing SIGSTOP with SIGUSR1. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, SIGUSR1) == 0); + + /* The next wait() should report the SIGUSR1 was received. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGUSR1); + ATF_REQUIRE(ptrace(PT_LWPINFO, fpid, (caddr_t)&pl, sizeof(pl)) != -1); + ATF_REQUIRE(pl.pl_siginfo.si_signo == SIGUSR1); + + /* Continue the child, ignoring the SIGUSR1. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, fpid, (caddr_t)1, 0) == 0); + + /* The last wait() should report normal exit with code 1. */ + wpid = waitpid(fpid, &status, 0); + ATF_REQUIRE(wpid == fpid); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + wpid = wait(&status); + ATF_REQUIRE(wpid == -1); + ATF_REQUIRE(errno == ECHILD); +} + /* * Verify that if ptrace stops due to a signal but continues with * a different signal that the new signal is routed to a thread @@ -3183,10 +3416,13 @@ ATF_TP_ADD_TCS(tp) ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_system_call_entry_and_exit); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_full_sigqueue); + ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_masked_full_sigqueue); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_change_sig); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_sigtrap_system_call_entry); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_mix); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_kqueue); + ATF_TP_ADD_TC(tp, ptrace__killed_with_sigmask); + ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_sigmask); ATF_TP_ADD_TC(tp, ptrace__PT_CONTINUE_with_signal_thread_sigmask); ATF_TP_ADD_TC(tp, ptrace__parent_terminate_with_pending_sigstop1); ATF_TP_ADD_TC(tp, ptrace__parent_terminate_with_pending_sigstop2); From 1118d57b3603192dc44733ad14c896449c27c158 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Tue, 17 Oct 2017 19:11:19 +0000 Subject: [PATCH 137/219] We need to include disk.o in libuboot.a when we're building with support for disk access. Sponsored by: Netflix --- sys/boot/uboot/lib/Makefile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/boot/uboot/lib/Makefile b/sys/boot/uboot/lib/Makefile index 4ea53f851a5e..38002e390930 100644 --- a/sys/boot/uboot/lib/Makefile +++ b/sys/boot/uboot/lib/Makefile @@ -13,6 +13,10 @@ SRCS+= module.c net.c reboot.c time.c CFLAGS+= -ffreestanding -msoft-float +.if ${LOADER_DISK_SUPPORT:Uyes} == "yes" +SRCS+= disk.c +.endif + .if ${MK_FDT} != "no" LOADER_FDT_SUPPORT= yes .else From 14481f92c4fa8b8a93883b6d4547c6bbf9505ff3 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 17 Oct 2017 19:11:29 +0000 Subject: [PATCH 138/219] loader.mk: clean md.o even if MD_IMAGE_SIZE not defined We don't normally provide special handling for optionally-included src files, but md.o depends on both md.c and the value of ${MD_IMAGE_SIZE}. Previously if one built with MD_IMAGE_SIZE, executed "make clean", and then built with a different MD_IMAGE_SIZE md.o would not be rebuilt. Reported by: Zakary Nafziger Sponsored by: The FreeBSD Foundation --- sys/boot/loader.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/boot/loader.mk b/sys/boot/loader.mk index 814cef256c81..a501d69a7ade 100644 --- a/sys/boot/loader.mk +++ b/sys/boot/loader.mk @@ -43,6 +43,8 @@ SRCS+= bcache.c .if defined(MD_IMAGE_SIZE) CFLAGS+= -DMD_IMAGE_SIZE=${MD_IMAGE_SIZE} SRCS+= md.c +.else +CLEANFILES+= md.o .endif # Machine-independant ISA PnP From fa00affd18f7b9051dcbc76d28ce634bf076637d Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Tue, 17 Oct 2017 19:41:45 +0000 Subject: [PATCH 139/219] Fix a racy VI_DOOMED check in MNT_VNODE_FOREACH_ALL(). MNT_VNODE_FOREACH_ALL() is supposed to avoid returning doomed vnodes, but the VI_DOOMED check it used was done without the vnode interlock held, so it could race with a concurrent vgone(). Submitted by: Don Morris Reviewed by: kib, mckusick MFC after: 1 week Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12704 --- sys/kern/vfs_subr.c | 40 ++++++++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 16 deletions(-) diff --git a/sys/kern/vfs_subr.c b/sys/kern/vfs_subr.c index ecadcb7297aa..0bac7667731b 100644 --- a/sys/kern/vfs_subr.c +++ b/sys/kern/vfs_subr.c @@ -5299,12 +5299,18 @@ __mnt_vnode_next_all(struct vnode **mvp, struct mount *mp) kern_yield(PRI_USER); MNT_ILOCK(mp); KASSERT((*mvp)->v_mount == mp, ("marker vnode mount list mismatch")); - vp = TAILQ_NEXT(*mvp, v_nmntvnodes); - while (vp != NULL && (vp->v_type == VMARKER || - (vp->v_iflag & VI_DOOMED) != 0)) - vp = TAILQ_NEXT(vp, v_nmntvnodes); - - /* Check if we are done */ + for (vp = TAILQ_NEXT(*mvp, v_nmntvnodes); vp != NULL; + vp = TAILQ_NEXT(vp, v_nmntvnodes)) { + /* Allow a racy peek at VI_DOOMED to save a lock acquisition. */ + if (vp->v_type == VMARKER || (vp->v_iflag & VI_DOOMED) != 0) + continue; + VI_LOCK(vp); + if ((vp->v_iflag & VI_DOOMED) != 0) { + VI_UNLOCK(vp); + continue; + } + break; + } if (vp == NULL) { __mnt_vnode_markerfree_all(mvp, mp); /* MNT_IUNLOCK(mp); -- done in above function */ @@ -5313,7 +5319,6 @@ __mnt_vnode_next_all(struct vnode **mvp, struct mount *mp) } TAILQ_REMOVE(&mp->mnt_nvnodelist, *mvp, v_nmntvnodes); TAILQ_INSERT_AFTER(&mp->mnt_nvnodelist, vp, *mvp, v_nmntvnodes); - VI_LOCK(vp); MNT_IUNLOCK(mp); return (vp); } @@ -5326,14 +5331,20 @@ __mnt_vnode_first_all(struct vnode **mvp, struct mount *mp) *mvp = malloc(sizeof(struct vnode), M_VNODE_MARKER, M_WAITOK | M_ZERO); MNT_ILOCK(mp); MNT_REF(mp); + (*mvp)->v_mount = mp; (*mvp)->v_type = VMARKER; - vp = TAILQ_FIRST(&mp->mnt_nvnodelist); - while (vp != NULL && (vp->v_type == VMARKER || - (vp->v_iflag & VI_DOOMED) != 0)) - vp = TAILQ_NEXT(vp, v_nmntvnodes); - - /* Check if we are done */ + TAILQ_FOREACH(vp, &mp->mnt_nvnodelist, v_nmntvnodes) { + /* Allow a racy peek at VI_DOOMED to save a lock acquisition. */ + if (vp->v_type == VMARKER || (vp->v_iflag & VI_DOOMED) != 0) + continue; + VI_LOCK(vp); + if ((vp->v_iflag & VI_DOOMED) != 0) { + VI_UNLOCK(vp); + continue; + } + break; + } if (vp == NULL) { MNT_REL(mp); MNT_IUNLOCK(mp); @@ -5341,14 +5352,11 @@ __mnt_vnode_first_all(struct vnode **mvp, struct mount *mp) *mvp = NULL; return (NULL); } - (*mvp)->v_mount = mp; TAILQ_INSERT_AFTER(&mp->mnt_nvnodelist, vp, *mvp, v_nmntvnodes); - VI_LOCK(vp); MNT_IUNLOCK(mp); return (vp); } - void __mnt_vnode_markerfree_all(struct vnode **mvp, struct mount *mp) { From b541ba195ccc4806d94348fa328d620e3261c05a Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Tue, 17 Oct 2017 20:37:31 +0000 Subject: [PATCH 140/219] cxgbe: delete now-redundant vnet decls r324539 gathered some vnet decls into netinet/tcp_var.h, so that they are now redundant in dev/cxgbe/tom/{t4_cpl_io.c,t4_ddp.c}. This triggers gcc -Wredundant-decls. Reviewed by: np Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12674 --- sys/dev/cxgbe/tom/t4_cpl_io.c | 13 ------------- sys/dev/cxgbe/tom/t4_ddp.c | 7 ------- 2 files changed, 20 deletions(-) diff --git a/sys/dev/cxgbe/tom/t4_cpl_io.c b/sys/dev/cxgbe/tom/t4_cpl_io.c index 0e40f6f6a80a..a4cacdd32c39 100644 --- a/sys/dev/cxgbe/tom/t4_cpl_io.c +++ b/sys/dev/cxgbe/tom/t4_cpl_io.c @@ -71,19 +71,6 @@ __FBSDID("$FreeBSD$"); #include "tom/t4_tom_l2t.h" #include "tom/t4_tom.h" -VNET_DECLARE(int, tcp_do_autosndbuf); -#define V_tcp_do_autosndbuf VNET(tcp_do_autosndbuf) -VNET_DECLARE(int, tcp_autosndbuf_inc); -#define V_tcp_autosndbuf_inc VNET(tcp_autosndbuf_inc) -VNET_DECLARE(int, tcp_autosndbuf_max); -#define V_tcp_autosndbuf_max VNET(tcp_autosndbuf_max) -VNET_DECLARE(int, tcp_do_autorcvbuf); -#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf) -VNET_DECLARE(int, tcp_autorcvbuf_inc); -#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc) -VNET_DECLARE(int, tcp_autorcvbuf_max); -#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max) - #define IS_AIOTX_MBUF(m) \ ((m)->m_flags & M_EXT && (m)->m_ext.ext_flags & EXT_FLAG_AIOTX) diff --git a/sys/dev/cxgbe/tom/t4_ddp.c b/sys/dev/cxgbe/tom/t4_ddp.c index 0cd9fd4359d2..e32fc4fb18a6 100644 --- a/sys/dev/cxgbe/tom/t4_ddp.c +++ b/sys/dev/cxgbe/tom/t4_ddp.c @@ -67,13 +67,6 @@ __FBSDID("$FreeBSD$"); #include "common/t4_tcb.h" #include "tom/t4_tom.h" -VNET_DECLARE(int, tcp_do_autorcvbuf); -#define V_tcp_do_autorcvbuf VNET(tcp_do_autorcvbuf) -VNET_DECLARE(int, tcp_autorcvbuf_inc); -#define V_tcp_autorcvbuf_inc VNET(tcp_autorcvbuf_inc) -VNET_DECLARE(int, tcp_autorcvbuf_max); -#define V_tcp_autorcvbuf_max VNET(tcp_autorcvbuf_max) - /* * Use the 'backend3' field in AIO jobs to store the amount of data * received by the AIO job so far. From b394cd1e28f1a094742434474ebe4f5004bf0ce3 Mon Sep 17 00:00:00 2001 From: Fedor Uporov Date: Tue, 17 Oct 2017 20:45:44 +0000 Subject: [PATCH 141/219] Add inital extents read-write support. Approved by: pfg (mentor) MFC after: 6 months RelNotes: Yes Differential Revision: https://reviews.freebsd.org/D12087 --- sys/fs/ext2fs/ext2_alloc.c | 34 +- sys/fs/ext2fs/ext2_balloc.c | 74 ++ sys/fs/ext2fs/ext2_bmap.c | 59 +- sys/fs/ext2fs/ext2_extattr.c | 4 +- sys/fs/ext2fs/ext2_extents.c | 1634 +++++++++++++++++++++++++++++--- sys/fs/ext2fs/ext2_extents.h | 40 +- sys/fs/ext2fs/ext2_extern.h | 4 +- sys/fs/ext2fs/ext2_inode.c | 353 ++++--- sys/fs/ext2fs/ext2_inode_cnv.c | 44 +- sys/fs/ext2fs/ext2_subr.c | 49 +- sys/fs/ext2fs/ext2_vfsops.c | 1 + sys/fs/ext2fs/ext2_vnops.c | 150 +-- sys/fs/ext2fs/ext2fs.h | 1 - sys/fs/ext2fs/inode.h | 9 +- 14 files changed, 1925 insertions(+), 531 deletions(-) diff --git a/sys/fs/ext2fs/ext2_alloc.c b/sys/fs/ext2fs/ext2_alloc.c index eda85c1132b6..6ffb91069078 100644 --- a/sys/fs/ext2fs/ext2_alloc.c +++ b/sys/fs/ext2fs/ext2_alloc.c @@ -135,19 +135,20 @@ ext2_alloc(struct inode *ip, daddr_t lbn, e4fs_daddr_t bpref, int size, * Allocate EA's block for inode. */ daddr_t -ext2_allocfacl(struct inode *ip) +ext2_alloc_meta(struct inode *ip) { struct m_ext2fs *fs; - daddr_t facl; + daddr_t blk; fs = ip->i_e2fs; EXT2_LOCK(ip->i_ump); - facl = ext2_alloccg(ip, ino_to_cg(fs, ip->i_number), 0, fs->e2fs_bsize); - if (0 == facl) + blk = ext2_hashalloc(ip, ino_to_cg(fs, ip->i_number), 0, fs->e2fs_bsize, + ext2_alloccg); + if (0 == blk) EXT2_UNLOCK(ip->i_ump); - return (facl); + return (blk); } /* @@ -200,7 +201,7 @@ ext2_reallocblks(struct vop_reallocblks_args *ap) fs = ip->i_e2fs; ump = ip->i_ump; - if (fs->e2fs_contigsumsize <= 0) + if (fs->e2fs_contigsumsize <= 0 || ip->i_flag & IN_E4EXTENTS) return (ENOSPC); buflist = ap->a_buflist; @@ -375,7 +376,7 @@ ext2_valloc(struct vnode *pvp, int mode, struct ucred *cred, struct vnode **vpp) struct inode *ip; struct ext2mount *ump; ino_t ino, ipref; - int i, error, cg; + int error, cg; *vpp = NULL; pip = VTOI(pvp); @@ -421,11 +422,12 @@ ext2_valloc(struct vnode *pvp, int mode, struct ucred *cred, struct vnode **vpp) ip->i_blocks = 0; ip->i_mode = 0; ip->i_flags = 0; - /* now we want to make sure that the block pointers are zeroed out */ - for (i = 0; i < EXT2_NDADDR; i++) - ip->i_db[i] = 0; - for (i = 0; i < EXT2_NIADDR; i++) - ip->i_ib[i] = 0; + if (EXT2_HAS_INCOMPAT_FEATURE(fs, EXT2F_INCOMPAT_EXTENTS) + && (S_ISREG(mode) || S_ISDIR(mode))) + ext4_ext_tree_init(ip); + else + memset(ip->i_data, 0, sizeof(ip->i_data)); + /* * Set up a new generation number for this inode. @@ -575,8 +577,11 @@ e4fs_daddr_t ext2_blkpref(struct inode *ip, e2fs_lbn_t lbn, int indx, e2fs_daddr_t *bap, e2fs_daddr_t blocknr) { + struct m_ext2fs *fs; int tmp; + fs = ip->i_e2fs; + mtx_assert(EXT2_MTX(ip->i_ump), MA_OWNED); /* @@ -599,10 +604,9 @@ ext2_blkpref(struct inode *ip, e2fs_lbn_t lbn, int indx, e2fs_daddr_t *bap, * Else lets fall back to the blocknr or, if there is none, follow * the rule that a block should be allocated near its inode. */ - return blocknr ? blocknr : + return (blocknr ? blocknr : (e2fs_daddr_t)(ip->i_block_group * - EXT2_BLOCKS_PER_GROUP(ip->i_e2fs)) + - ip->i_e2fs->e2fs->e2fs_first_dblock; + EXT2_BLOCKS_PER_GROUP(fs)) + fs->e2fs->e2fs_first_dblock); } /* diff --git a/sys/fs/ext2fs/ext2_balloc.c b/sys/fs/ext2fs/ext2_balloc.c index d45791e22cde..888d8fe4af38 100644 --- a/sys/fs/ext2fs/ext2_balloc.c +++ b/sys/fs/ext2fs/ext2_balloc.c @@ -51,6 +51,76 @@ #include #include +static int +ext2_ext_balloc(struct inode *ip, uint32_t lbn, int size, + struct ucred *cred, struct buf **bpp, int flags) +{ + struct m_ext2fs *fs; + struct buf *bp = NULL; + struct vnode *vp = ITOV(ip); + uint32_t nb; + int osize, nsize, blks, error, allocated; + + fs = ip->i_e2fs; + blks = howmany(size, fs->e2fs_bsize); + + error = ext4_ext_get_blocks(ip, lbn, blks, cred, NULL, &allocated, &nb); + if (error) + return (error); + + if (allocated) { + if (ip->i_size < (lbn + 1) * fs->e2fs_bsize) + nsize = fragroundup(fs, size); + else + nsize = fs->e2fs_bsize; + + bp = getblk(vp, lbn, nsize, 0, 0, 0); + if(!bp) + return (EIO); + + bp->b_blkno = fsbtodb(fs, nb); + if (flags & BA_CLRBUF) + vfs_bio_clrbuf(bp); + } else { + if (ip->i_size >= (lbn + 1) * fs->e2fs_bsize) { + + error = bread(vp, lbn, fs->e2fs_bsize, NOCRED, &bp); + if (error) { + brelse(bp); + return (error); + } + bp->b_blkno = fsbtodb(fs, nb); + *bpp = bp; + return (0); + } + + /* + * Consider need to reallocate a fragment. + */ + osize = fragroundup(fs, blkoff(fs, ip->i_size)); + nsize = fragroundup(fs, size); + if (nsize <= osize) { + error = bread(vp, lbn, osize, NOCRED, &bp); + if (error) { + brelse(bp); + return (error); + } + bp->b_blkno = fsbtodb(fs, nb); + } else { + error = bread(vp, lbn, fs->e2fs_bsize, NOCRED, &bp); + if (error) { + brelse(bp); + return (error); + } + bp->b_blkno = fsbtodb(fs, nb); + } + } + + *bpp = bp; + + return (error); +} + /* * Balloc defines the structure of filesystem storage * by allocating the physical blocks on a device given @@ -84,6 +154,10 @@ ext2_balloc(struct inode *ip, e2fs_lbn_t lbn, int size, struct ucred *cred, ip->i_next_alloc_block++; ip->i_next_alloc_goal++; } + + if (ip->i_flag & IN_E4EXTENTS) + return (ext2_ext_balloc(ip, lbn, size, cred, bpp, flags)); + /* * The first EXT2_NDADDR blocks are direct blocks */ diff --git a/sys/fs/ext2fs/ext2_bmap.c b/sys/fs/ext2fs/ext2_bmap.c index ea28bb05b5ff..9ff20636ae9e 100644 --- a/sys/fs/ext2fs/ext2_bmap.c +++ b/sys/fs/ext2fs/ext2_bmap.c @@ -53,8 +53,6 @@ #include #include -static int ext4_bmapext(struct vnode *, int32_t, int64_t *, int *, int *); - /* * Bmap converts the logical block number of a file to its physical block * number on the disk. The conversion is done by using the logical block @@ -89,55 +87,52 @@ ext2_bmap(struct vop_bmap_args *ap) * Convert the logical block number of a file to its physical block number * on the disk within ext4 extents. */ -static int +int ext4_bmapext(struct vnode *vp, int32_t bn, int64_t *bnp, int *runp, int *runb) { struct inode *ip; struct m_ext2fs *fs; + struct ext4_extent_header *ehp; struct ext4_extent *ep; - struct ext4_extent_path path = {.ep_bp = NULL}; + struct ext4_extent_path *path = NULL; daddr_t lbn; - int error; + int error, depth; ip = VTOI(vp); fs = ip->i_e2fs; lbn = bn; + ehp = (struct ext4_extent_header *)ip->i_data; + depth = ehp->eh_depth; + *bnp = -1; if (runp != NULL) *runp = 0; if (runb != NULL) *runb = 0; - error = 0; - ext4_ext_find_extent(fs, ip, lbn, &path); - if (path.ep_is_sparse) { - *bnp = -1; - if (runp != NULL) - *runp = path.ep_sparse_ext.e_len - - (lbn - path.ep_sparse_ext.e_blk) - 1; - if (runb != NULL) - *runb = lbn - path.ep_sparse_ext.e_blk; - } else { - if (path.ep_ext == NULL) { - error = EIO; - goto out; + error = ext4_ext_find_extent(ip, lbn, &path); + if (error) + return (error); + + ep = path[depth].ep_ext; + if(ep) { + if (lbn < ep->e_blk) { + if (runp != NULL) + *runp = ep->e_blk - lbn - 1; + } else if (ep->e_blk <= lbn && lbn < ep->e_blk + ep->e_len) { + *bnp = fsbtodb(fs, lbn - ep->e_blk + + (ep->e_start_lo | (daddr_t)ep->e_start_hi << 32)); + if (runp != NULL) + *runp = ep->e_len - (lbn - ep->e_blk) - 1; + if (runb != NULL) + *runb = lbn - ep->e_blk; + } else { + if (runb != NULL) + *runb = ep->e_blk + lbn - ep->e_len; } - ep = path.ep_ext; - *bnp = fsbtodb(fs, lbn - ep->e_blk + - (ep->e_start_lo | (daddr_t)ep->e_start_hi << 32)); - - if (*bnp == 0) - *bnp = -1; - - if (runp != NULL) - *runp = ep->e_len - (lbn - ep->e_blk) - 1; - if (runb != NULL) - *runb = lbn - ep->e_blk; } -out: - if (path.ep_bp != NULL) - brelse(path.ep_bp); + ext4_ext_path_free(path); return (error); } diff --git a/sys/fs/ext2fs/ext2_extattr.c b/sys/fs/ext2fs/ext2_extattr.c index d19d4a0daf6e..a86ffdfebff5 100644 --- a/sys/fs/ext2fs/ext2_extattr.c +++ b/sys/fs/ext2fs/ext2_extattr.c @@ -612,7 +612,7 @@ ext2_extattr_block_clone(struct inode *ip, struct buf **bpp) if (header->h_magic != EXTATTR_MAGIC || header->h_refcount == 1) return (EINVAL); - facl = ext2_allocfacl(ip); + facl = ext2_alloc_meta(ip); if (!facl) return (ENOSPC); @@ -1137,7 +1137,7 @@ ext2_extattr_block_set(struct inode *ip, int attrnamespace, return (ENOSPC); /* Allocate block, fill EA header and insert entry */ - ip->i_facl = ext2_allocfacl(ip); + ip->i_facl = ext2_alloc_meta(ip); if (0 == ip->i_facl) return (ENOSPC); diff --git a/sys/fs/ext2fs/ext2_extents.c b/sys/fs/ext2fs/ext2_extents.c index 14ed4a65c520..788f089e29a6 100644 --- a/sys/fs/ext2fs/ext2_extents.c +++ b/sys/fs/ext2fs/ext2_extents.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -43,87 +44,163 @@ #include #include -static bool -ext4_ext_binsearch_index(struct inode *ip, struct ext4_extent_path *path, - daddr_t lbn, daddr_t *first_lbn, daddr_t *last_lbn){ - struct ext4_extent_header *ehp = path->ep_header; - struct ext4_extent_index *first, *last, *l, *r, *m; +static MALLOC_DEFINE(M_EXT2EXTENTS, "ext2_extents", "EXT2 extents"); - first = (struct ext4_extent_index *)(char *)(ehp + 1); - last = first + ehp->eh_ecount - 1; - l = first; - r = last; - while (l <= r) { - m = l + (r - l) / 2; - if (lbn < m->ei_blk) - r = m - 1; - else - l = m + 1; +#ifdef EXT2FS_DEBUG +static void +ext4_ext_print_extent(struct ext4_extent *ep) +{ + + printf(" ext %p => (blk %u len %u start %lu)\n", + ep, ep->e_blk, ep->e_len, + (uint64_t)ep->e_start_hi << 32 | ep->e_start_lo); +} + +static void ext4_ext_print_header(struct inode *ip, struct ext4_extent_header *ehp); + +static void +ext4_ext_print_index(struct inode *ip, struct ext4_extent_index *ex, int do_walk) +{ + struct m_ext2fs *fs; + struct buf *bp; + int error; + + fs = ip->i_e2fs; + + printf(" index %p => (blk %u pblk %lu)\n", + ex, ex->ei_blk, (uint64_t)ex->ei_leaf_hi << 32 | ex->ei_leaf_lo); + + if(!do_walk) + return; + + if ((error = bread(ip->i_devvp, + fsbtodb(fs, ((uint64_t)ex->ei_leaf_hi << 32 | ex->ei_leaf_lo)), + (int)fs->e2fs_bsize, NOCRED, &bp)) != 0) { + brelse(bp); + return; } - if (l == first) { - path->ep_sparse_ext.e_blk = *first_lbn; - path->ep_sparse_ext.e_len = first->ei_blk - *first_lbn; - path->ep_sparse_ext.e_start_hi = 0; - path->ep_sparse_ext.e_start_lo = 0; - path->ep_is_sparse = true; - return (true); - } - path->ep_index = l - 1; - *first_lbn = path->ep_index->ei_blk; - if (path->ep_index < last) - *last_lbn = l->ei_blk - 1; - return (false); + ext4_ext_print_header(ip, (struct ext4_extent_header *)bp->b_data); + + brelse(bp); + } static void -ext4_ext_binsearch(struct inode *ip, struct ext4_extent_path *path, daddr_t lbn, - daddr_t first_lbn, daddr_t last_lbn) +ext4_ext_print_header(struct inode *ip, struct ext4_extent_header *ehp) { - struct ext4_extent_header *ehp = path->ep_header; - struct ext4_extent *first, *l, *r, *m; + int i; - if (ehp->eh_ecount == 0) - return; + printf("header %p => (magic 0x%x entries %d max %d depth %d gen %d)\n", + ehp, ehp->eh_magic, ehp->eh_ecount, ehp->eh_max, ehp->eh_depth, + ehp->eh_gen); - first = (struct ext4_extent *)(char *)(ehp + 1); - l = first; - r = first + ehp->eh_ecount - 1; - while (l <= r) { - m = l + (r - l) / 2; - if (lbn < m->e_blk) - r = m - 1; + for (i = 0; i < ehp->eh_ecount; i++) + if (ehp->eh_depth != 0) + ext4_ext_print_index(ip, + (struct ext4_extent_index *)(ehp + 1 + i), 1); else - l = m + 1; - } + ext4_ext_print_extent((struct ext4_extent *)(ehp + 1 + i)); +} - if (l == first) { - path->ep_sparse_ext.e_blk = first_lbn; - path->ep_sparse_ext.e_len = first->e_blk - first_lbn; - path->ep_sparse_ext.e_start_hi = 0; - path->ep_sparse_ext.e_start_lo = 0; - path->ep_is_sparse = true; - return; - } - path->ep_ext = l - 1; - if (path->ep_ext->e_blk + path->ep_ext->e_len <= lbn) { - path->ep_sparse_ext.e_blk = path->ep_ext->e_blk + - path->ep_ext->e_len; - if (l <= (first + ehp->eh_ecount - 1)) - path->ep_sparse_ext.e_len = l->e_blk - - path->ep_sparse_ext.e_blk; - else - path->ep_sparse_ext.e_len = last_lbn - - path->ep_sparse_ext.e_blk + 1; - path->ep_sparse_ext.e_start_hi = 0; - path->ep_sparse_ext.e_start_lo = 0; - path->ep_is_sparse = true; +static void +ext4_ext_print_path(struct inode *ip, struct ext4_extent_path *path) +{ + int k, l; + + l = path->ep_depth + + printf("ip=%d, Path:\n", ip->i_number); + for (k = 0; k <= l; k++, path++) { + if (path->ep_index) { + ext4_ext_print_index(ip, path->ep_index, 0); + } else if (path->ep_ext) { + ext4_ext_print_extent(path->ep_ext); + } } } -/* - * Find a block in ext4 extent cache. - */ +void +ext4_ext_print_extent_tree_status(struct inode * ip) +{ + struct m_ext2fs *fs; + struct ext4_extent_header *ehp; + + fs = ip->i_e2fs; + ehp = (struct ext4_extent_header *)(char *)ip->i_db; + + printf("Extent status:ip=%d\n", ip->i_number); + if (!(ip->i_flag & IN_E4EXTENTS)) + return; + + ext4_ext_print_header(ip, ehp); + + return; +} +#endif + +static inline struct ext4_extent_header * +ext4_ext_inode_header(struct inode *ip) +{ + + return ((struct ext4_extent_header *)ip->i_db); +} + +static inline struct ext4_extent_header * +ext4_ext_block_header(char *bdata) +{ + + return ((struct ext4_extent_header *)bdata); +} + +static inline unsigned short +ext4_ext_inode_depth(struct inode *ip) +{ + struct ext4_extent_header *ehp; + + ehp = (struct ext4_extent_header *)ip->i_data; + return (ehp->eh_depth); +} + +static inline e4fs_daddr_t +ext4_ext_index_pblock(struct ext4_extent_index *index) +{ + e4fs_daddr_t blk; + + blk = index->ei_leaf_lo; + blk |= (e4fs_daddr_t)index->ei_leaf_hi << 32; + + return (blk); +} + +static inline void +ext4_index_store_pblock(struct ext4_extent_index *index, e4fs_daddr_t pb) +{ + + index->ei_leaf_lo = pb & 0xffffffff; + index->ei_leaf_hi = (pb >> 32) & 0xffff; +} + + +static inline e4fs_daddr_t +ext4_ext_extent_pblock(struct ext4_extent *extent) +{ + e4fs_daddr_t blk; + + blk = extent->e_start_lo; + blk |= (e4fs_daddr_t)extent->e_start_hi << 32; + + return (blk); +} + +static inline void +ext4_ext_store_pblock(struct ext4_extent *ex, e4fs_daddr_t pb) +{ + + ex->e_start_lo = pb & 0xffffffff; + ex->e_start_hi = (pb >> 32) & 0xffff; +} + int ext4_ext_in_cache(struct inode *ip, daddr_t lbn, struct ext4_extent *ep) { @@ -131,8 +208,6 @@ ext4_ext_in_cache(struct inode *ip, daddr_t lbn, struct ext4_extent *ep) int ret = EXT4_EXT_CACHE_NO; ecp = &ip->i_ext_cache; - - /* cache is invalid */ if (ecp->ec_type == EXT4_EXT_CACHE_NO) return (ret); @@ -146,74 +221,1367 @@ ext4_ext_in_cache(struct inode *ip, daddr_t lbn, struct ext4_extent *ep) return (ret); } -/* - * Put an ext4_extent structure in ext4 cache. - */ -void -ext4_ext_put_cache(struct inode *ip, struct ext4_extent *ep, int type) +static int +ext4_ext_check_header(struct inode *ip, struct ext4_extent_header *eh) { - struct ext4_extent_cache *ecp; + struct m_ext2fs *fs; + char *error_msg; - ecp = &ip->i_ext_cache; - ecp->ec_type = type; - ecp->ec_blk = ep->e_blk; - ecp->ec_len = ep->e_len; - ecp->ec_start = (daddr_t)ep->e_start_hi << 32 | ep->e_start_lo; -} + fs = ip->i_e2fs; -/* - * Find an extent. - */ -struct ext4_extent_path * -ext4_ext_find_extent(struct m_ext2fs *fs, struct inode *ip, - daddr_t lbn, struct ext4_extent_path *path) -{ - struct ext4_extent_header *ehp; - uint16_t i; - int error, size; - daddr_t nblk; - - ehp = (struct ext4_extent_header *)(char *)ip->i_db; - - if (ehp->eh_magic != EXT4_EXT_MAGIC) - return (NULL); - - path->ep_header = ehp; - - daddr_t first_lbn = 0; - daddr_t last_lbn = lblkno(ip->i_e2fs, ip->i_size); - - for (i = ehp->eh_depth; i != 0; --i) { - path->ep_depth = i; - path->ep_ext = NULL; - if (ext4_ext_binsearch_index(ip, path, lbn, &first_lbn, - &last_lbn)) { - return (path); - } - - nblk = (daddr_t)path->ep_index->ei_leaf_hi << 32 | - path->ep_index->ei_leaf_lo; - size = blksize(fs, ip, nblk); - if (path->ep_bp != NULL) { - brelse(path->ep_bp); - path->ep_bp = NULL; - } - error = bread(ip->i_devvp, fsbtodb(fs, nblk), size, NOCRED, - &path->ep_bp); - if (error) { - brelse(path->ep_bp); - path->ep_bp = NULL; - return (NULL); - } - ehp = (struct ext4_extent_header *)path->ep_bp->b_data; - path->ep_header = ehp; + if (eh->eh_magic != EXT4_EXT_MAGIC) { + error_msg = "invalid magic"; + goto corrupted; + } + if (eh->eh_max == 0) { + error_msg = "invalid eh_max"; + goto corrupted; + } + if (eh->eh_ecount > eh->eh_max) { + error_msg = "invalid eh_entries"; + goto corrupted; } - path->ep_depth = i; - path->ep_ext = NULL; - path->ep_index = NULL; - path->ep_is_sparse = false; + return (0); - ext4_ext_binsearch(ip, path, lbn, first_lbn, last_lbn); - return (path); +corrupted: + ext2_fserr(fs, ip->i_uid, error_msg); + return (EIO); +} + +static void +ext4_ext_binsearch_index(struct ext4_extent_path *path, int blk) +{ + struct ext4_extent_header *eh; + struct ext4_extent_index *r, *l, *m; + + eh = path->ep_header; + + KASSERT(eh->eh_ecount <= eh->eh_max && eh->eh_ecount > 0, + ("ext4_ext_binsearch_index: bad args")); + + l = EXT_FIRST_INDEX(eh) + 1; + r = EXT_FIRST_INDEX(eh) + eh->eh_ecount - 1; + while (l <= r) { + m = l + (r - l) / 2; + if (blk < m->ei_blk) + r = m - 1; + else + l = m + 1; + } + + path->ep_index = l - 1; +} + +static void +ext4_ext_binsearch_ext(struct ext4_extent_path *path, int blk) +{ + struct ext4_extent_header *eh; + struct ext4_extent *r, *l, *m; + + eh = path->ep_header; + + KASSERT(eh->eh_ecount <= eh->eh_max, + ("ext4_ext_binsearch_ext: bad args")); + + if (eh->eh_ecount == 0) + return; + + l = EXT_FIRST_EXTENT(eh) + 1; + r = EXT_FIRST_EXTENT(eh) + eh->eh_ecount - 1; + + while (l <= r) { + m = l + (r - l) / 2; + if (blk < m->e_blk) + r = m - 1; + else + l = m + 1; + } + + path->ep_ext = l - 1; +} + +static int +ext4_ext_fill_path_bdata(struct ext4_extent_path *path, + struct buf *bp, uint64_t blk) +{ + + KASSERT(path->ep_data == NULL, + ("ext4_ext_fill_path_bdata: bad ep_data")); + + path->ep_data = malloc(bp->b_bufsize, M_EXT2EXTENTS, M_WAITOK); + if (!path->ep_data) + return (ENOMEM); + + memcpy(path->ep_data, bp->b_data, bp->b_bufsize); + path->ep_blk = blk; + + return (0); +} + +static void +ext4_ext_fill_path_buf(struct ext4_extent_path *path, struct buf *bp) +{ + + KASSERT(path->ep_data != NULL, + ("ext4_ext_fill_path_buf: bad ep_data")); + + memcpy(bp->b_data, path->ep_data, bp->b_bufsize); +} + +static void +ext4_ext_drop_refs(struct ext4_extent_path *path) +{ + int depth, i; + + if (!path) + return; + + depth = path->ep_depth; + for (i = 0; i <= depth; i++, path++) + if (path->ep_data) { + free(path->ep_data, M_EXT2EXTENTS); + path->ep_data = NULL; + } +} + +void +ext4_ext_path_free(struct ext4_extent_path *path) +{ + + if (!path) + return; + + ext4_ext_drop_refs(path); + free(path, M_EXT2EXTENTS); +} + +int +ext4_ext_find_extent(struct inode *ip, daddr_t block, + struct ext4_extent_path **ppath) +{ + struct m_ext2fs *fs; + struct ext4_extent_header *eh; + struct ext4_extent_path *path; + struct buf *bp; + uint64_t blk; + int error, depth, i, ppos, alloc; + + fs = ip->i_e2fs; + eh = ext4_ext_inode_header(ip); + depth = ext4_ext_inode_depth(ip); + ppos = 0; + alloc = 0; + + error = ext4_ext_check_header(ip, eh); + if (error) + return (error); + + if (!ppath) + return (EINVAL); + + path = *ppath; + if (!path) { + path = malloc(EXT4_EXT_DEPTH_MAX * + sizeof(struct ext4_extent_path), + M_EXT2EXTENTS, M_WAITOK | M_ZERO); + if (!path) + return (ENOMEM); + + *ppath = path; + alloc = 1; + } + + path[0].ep_header = eh; + path[0].ep_data = NULL; + + /* Walk through the tree. */ + i = depth; + while (i) { + ext4_ext_binsearch_index(&path[ppos], block); + blk = ext4_ext_index_pblock(path[ppos].ep_index); + path[ppos].ep_depth = i; + path[ppos].ep_ext = NULL; + + error = bread(ip->i_devvp, fsbtodb(ip->i_e2fs, blk), + ip->i_e2fs->e2fs_bsize, NOCRED, &bp); + if (error) { + brelse(bp); + goto error; + } + + ppos++; + if (ppos > depth) { + ext2_fserr(fs, ip->i_uid, + "ppos > depth => extent corrupted"); + error = EIO; + brelse(bp); + goto error; + } + + ext4_ext_fill_path_bdata(&path[ppos], bp, blk); + brelse(bp); + + eh = ext4_ext_block_header(path[ppos].ep_data); + error = ext4_ext_check_header(ip, eh); + if (error) + goto error; + + path[ppos].ep_header = eh; + + i--; + } + + error = ext4_ext_check_header(ip, eh); + if (error) + goto error; + + /* Find extent. */ + path[ppos].ep_depth = i; + path[ppos].ep_header = eh; + path[ppos].ep_ext = NULL; + path[ppos].ep_index = NULL; + ext4_ext_binsearch_ext(&path[ppos], block); + return (0); + +error: + ext4_ext_drop_refs(path); + if (alloc) + free(path, M_EXT2EXTENTS); + + *ppath = NULL; + + return (error); +} + +static inline int +ext4_ext_space_root(struct inode *ip) +{ + int size; + + size = sizeof(ip->i_data); + size -= sizeof(struct ext4_extent_header); + size /= sizeof(struct ext4_extent); + + return (size); +} + +static inline int +ext4_ext_space_block(struct inode *ip) +{ + struct m_ext2fs *fs; + int size; + + fs = ip->i_e2fs; + + size = (fs->e2fs_bsize - sizeof(struct ext4_extent_header)) / + sizeof(struct ext4_extent); + + return (size); +} + +static inline int +ext4_ext_space_block_index(struct inode *ip) +{ + struct m_ext2fs *fs; + int size; + + fs = ip->i_e2fs; + + size = (fs->e2fs_bsize - sizeof(struct ext4_extent_header)) / + sizeof(struct ext4_extent_index); + + return (size); +} + +void +ext4_ext_tree_init(struct inode *ip) +{ + struct ext4_extent_header *ehp; + + ip->i_flag |= IN_E4EXTENTS; + + memset(ip->i_data, 0, EXT2_NDADDR + EXT2_NIADDR); + ehp = (struct ext4_extent_header *)ip->i_data; + ehp->eh_magic = EXT4_EXT_MAGIC; + ehp->eh_max = ext4_ext_space_root(ip); + ip->i_ext_cache.ec_type = EXT4_EXT_CACHE_NO; + ip->i_flag |= IN_CHANGE | IN_UPDATE; + ext2_update(ip->i_vnode, 1); +} + +static inline void +ext4_ext_put_in_cache(struct inode *ip, uint32_t blk, + uint32_t len, uint32_t start, int type) +{ + + KASSERT(len != 0, ("ext4_ext_put_in_cache: bad input")); + + ip->i_ext_cache.ec_type = type; + ip->i_ext_cache.ec_blk = blk; + ip->i_ext_cache.ec_len = len; + ip->i_ext_cache.ec_start = start; +} + +static e4fs_daddr_t +ext4_ext_blkpref(struct inode *ip, struct ext4_extent_path *path, + e4fs_daddr_t block) +{ + struct m_ext2fs *fs; + struct ext4_extent *ex; + e4fs_daddr_t bg_start; + int depth; + + fs = ip->i_e2fs; + + if (path) { + depth = path->ep_depth; + ex = path[depth].ep_ext; + if (ex) { + e4fs_daddr_t pblk = ext4_ext_extent_pblock(ex); + e2fs_daddr_t blk = ex->e_blk; + + if (block > blk) + return (pblk + (block - blk)); + else + return (pblk - (blk - block)); + } + + /* Try to get block from index itself. */ + if (path[depth].ep_data) + return (path[depth].ep_blk); + } + + /* Use inode's group. */ + bg_start = (ip->i_block_group * EXT2_BLOCKS_PER_GROUP(ip->i_e2fs)) + + fs->e2fs->e2fs_first_dblock; + + return (bg_start + block); +} + +static int inline +ext4_can_extents_be_merged(struct ext4_extent *ex1, + struct ext4_extent *ex2) +{ + + if (ex1->e_blk + ex1->e_len != ex2->e_blk) + return (0); + + if (ex1->e_len + ex2->e_len > EXT4_MAX_LEN) + return (0); + + if (ext4_ext_extent_pblock(ex1) + ex1->e_len == + ext4_ext_extent_pblock(ex2)) + return (1); + + return (0); +} + +static unsigned +ext4_ext_next_leaf_block(struct inode *ip, struct ext4_extent_path *path) +{ + int depth = path->ep_depth; + + /* Empty tree */ + if (depth == 0) + return (EXT4_MAX_BLOCKS); + + /* Go to indexes. */ + depth--; + + while (depth >= 0) { + if (path[depth].ep_index != + EXT_LAST_INDEX(path[depth].ep_header)) + return (path[depth].ep_index[1].ei_blk); + + depth--; + } + + return (EXT4_MAX_BLOCKS); +} + +static int +ext4_ext_dirty(struct inode *ip, struct ext4_extent_path *path) +{ + struct m_ext2fs *fs; + struct buf *bp; + uint64_t blk; + int error; + + fs = ip->i_e2fs; + + if (!path) + return (EINVAL); + + if (path->ep_data) { + blk = path->ep_blk; + bp = getblk(ip->i_devvp, fsbtodb(fs, blk), + fs->e2fs_bsize, 0, 0, 0); + if (!bp) + return (EIO); + ext4_ext_fill_path_buf(path, bp); + error = bwrite(bp); + } else { + ip->i_flag |= IN_CHANGE | IN_UPDATE; + error = ext2_update(ip->i_vnode, 1); + } + + return (error); +} + +static int +ext4_ext_insert_index(struct inode *ip, struct ext4_extent_path *path, + uint32_t lblk, e4fs_daddr_t blk) +{ + struct m_ext2fs *fs; + struct ext4_extent_index *idx; + int len; + + fs = ip->i_e2fs; + + if (lblk == path->ep_index->ei_blk) { + ext2_fserr(fs, ip->i_uid, + "lblk == index blk => extent corrupted"); + return (EIO); + } + + if (path->ep_header->eh_ecount >= path->ep_header->eh_max) { + ext2_fserr(fs, ip->i_uid, + "ecout > maxcount => extent corrupted"); + return (EIO); + } + + if (lblk > path->ep_index->ei_blk) { + /* Insert after. */ + idx = path->ep_index + 1; + } else { + /* Insert before. */ + idx = path->ep_index; + } + + len = EXT_LAST_INDEX(path->ep_header) - idx + 1; + if (len > 0) + memmove(idx + 1, idx, len * sizeof(struct ext4_extent_index)); + + if (idx > EXT_MAX_INDEX(path->ep_header)) { + ext2_fserr(fs, ip->i_uid, + "index is out of range => extent corrupted"); + return (EIO); + } + + idx->ei_blk = lblk; + ext4_index_store_pblock(idx, blk); + path->ep_header->eh_ecount++; + + return (ext4_ext_dirty(ip, path)); +} + +static e4fs_daddr_t +ext4_ext_alloc_meta(struct inode *ip) +{ + e4fs_daddr_t blk = ext2_alloc_meta(ip); + if (blk) { + ip->i_blocks += btodb(ip->i_e2fs->e2fs_bsize); + ip->i_flag |= IN_CHANGE | IN_UPDATE; + ext2_update(ip->i_vnode, 1); + } + + return (blk); +} + +static void +ext4_ext_blkfree(struct inode *ip, uint64_t blk, int count, int flags) +{ + struct m_ext2fs *fs; + int i, blocksreleased; + + fs = ip->i_e2fs; + blocksreleased = count; + + for(i = 0; i < count; i++) + ext2_blkfree(ip, blk + i, fs->e2fs_bsize); + + if (ip->i_blocks >= blocksreleased) + ip->i_blocks -= (btodb(fs->e2fs_bsize)*blocksreleased); + else + ip->i_blocks = 0; + + ip->i_flag |= IN_CHANGE | IN_UPDATE; + ext2_update(ip->i_vnode, 1); +} + +static int +ext4_ext_split(struct inode *ip, struct ext4_extent_path *path, + struct ext4_extent *newext, int at) +{ + struct m_ext2fs *fs; + struct buf *bp; + int depth = ext4_ext_inode_depth(ip); + struct ext4_extent_header *neh; + struct ext4_extent_index *fidx; + struct ext4_extent *ex; + int i = at, k, m, a; + e4fs_daddr_t newblk, oldblk; + uint32_t border; + e4fs_daddr_t *ablks = NULL; + int error = 0; + + fs = ip->i_e2fs; + bp = NULL; + + /* + * We will split at current extent for now. + */ + if (path[depth].ep_ext > EXT_MAX_EXTENT(path[depth].ep_header)) { + ext2_fserr(fs, ip->i_uid, + "extent is out of range => extent corrupted"); + return (EIO); + } + + if (path[depth].ep_ext != EXT_MAX_EXTENT(path[depth].ep_header)) + border = path[depth].ep_ext[1].e_blk; + else + border = newext->e_blk; + + /* Allocate new blocks. */ + ablks = malloc(sizeof(e4fs_daddr_t) * depth, + M_EXT2EXTENTS, M_WAITOK | M_ZERO); + if (!ablks) + return (ENOMEM); + for (a = 0; a < depth - at; a++) { + newblk = ext4_ext_alloc_meta(ip); + if (newblk == 0) + goto cleanup; + ablks[a] = newblk; + } + + newblk = ablks[--a]; + bp = getblk(ip->i_devvp, fsbtodb(fs, newblk), fs->e2fs_bsize, 0, 0, 0); + if (!bp) { + error = EIO; + goto cleanup; + } + + neh = ext4_ext_block_header(bp->b_data); + neh->eh_ecount = 0; + neh->eh_max = ext4_ext_space_block(ip); + neh->eh_magic = EXT4_EXT_MAGIC; + neh->eh_depth = 0; + ex = EXT_FIRST_EXTENT(neh); + + if (path[depth].ep_header->eh_ecount != path[depth].ep_header->eh_max) { + ext2_fserr(fs, ip->i_uid, + "extents count out of range => extent corrupted"); + error = EIO; + goto cleanup; + } + + /* Start copy from next extent. */ + m = 0; + path[depth].ep_ext++; + while (path[depth].ep_ext <= EXT_MAX_EXTENT(path[depth].ep_header)) { + path[depth].ep_ext++; + m++; + } + if (m) { + memmove(ex, path[depth].ep_ext - m, + sizeof(struct ext4_extent) * m); + neh->eh_ecount = neh->eh_ecount + m; + } + + bwrite(bp); + bp = NULL; + + /* Fix old leaf. */ + if (m) { + path[depth].ep_header->eh_ecount = + path[depth].ep_header->eh_ecount - m; + ext4_ext_dirty(ip, path + depth); + } + + /* Create intermediate indexes. */ + k = depth - at - 1; + KASSERT(k >= 0, ("ext4_ext_split: negative k")); + + /* Insert new index into current index block. */ + i = depth - 1; + while (k--) { + oldblk = newblk; + newblk = ablks[--a]; + error = bread(ip->i_devvp, fsbtodb(fs, newblk), + (int)fs->e2fs_bsize, NOCRED, &bp); + if (error) { + brelse(bp); + goto cleanup; + } + + neh = (struct ext4_extent_header *)bp->b_data; + neh->eh_ecount = 1; + neh->eh_magic = EXT4_EXT_MAGIC; + neh->eh_max = ext4_ext_space_block_index(ip); + neh->eh_depth = depth - i; + fidx = EXT_FIRST_INDEX(neh); + fidx->ei_blk = border; + ext4_index_store_pblock(fidx, oldblk); + + m = 0; + path[i].ep_index++; + while (path[i].ep_index <= EXT_MAX_INDEX(path[i].ep_header)) { + path[i].ep_index++; + m++; + } + if (m) { + memmove(++fidx, path[i].ep_index - m, + sizeof(struct ext4_extent_index) * m); + neh->eh_ecount = neh->eh_ecount + m; + } + + bwrite(bp); + bp = NULL; + + /* Fix old index. */ + if (m) { + path[i].ep_header->eh_ecount = + path[i].ep_header->eh_ecount - m; + ext4_ext_dirty(ip, path + i); + } + + i--; + } + + error = ext4_ext_insert_index(ip, path + at, border, newblk); + +cleanup: + if (bp) + brelse(bp); + + if (error) { + for (i = 0; i < depth; i++) { + if (!ablks[i]) + continue; + ext4_ext_blkfree(ip, ablks[i], 1, 0); + } + } + + free(ablks, M_EXT2EXTENTS); + + return (error); +} + +static int +ext4_ext_grow_indepth(struct inode *ip, struct ext4_extent_path *path, + struct ext4_extent *newext) +{ + struct m_ext2fs *fs; + struct ext4_extent_path *curpath; + struct ext4_extent_header *neh; + struct ext4_extent_index *fidx; + struct buf *bp; + e4fs_daddr_t newblk; + int error = 0; + + fs = ip->i_e2fs; + curpath = path; + + newblk = ext4_ext_alloc_meta(ip); + if (newblk == 0) + return (error); + + bp = getblk(ip->i_devvp, fsbtodb(fs, newblk), fs->e2fs_bsize, 0, 0, 0); + if (!bp) + return (EIO); + + /* Move top-level index/leaf into new block. */ + memmove(bp->b_data, curpath->ep_header, sizeof(ip->i_data)); + + /* Set size of new block */ + neh = ext4_ext_block_header(bp->b_data); + neh->eh_magic = EXT4_EXT_MAGIC; + + if (ext4_ext_inode_depth(ip)) + neh->eh_max = ext4_ext_space_block_index(ip); + else + neh->eh_max = ext4_ext_space_block(ip); + + error = bwrite(bp); + if (error) + goto out; + + bp = NULL; + + curpath->ep_header->eh_magic = EXT4_EXT_MAGIC; + curpath->ep_header->eh_max = ext4_ext_space_root(ip); + curpath->ep_header->eh_ecount = 1; + curpath->ep_index = EXT_FIRST_INDEX(curpath->ep_header); + curpath->ep_index->ei_blk = EXT_FIRST_EXTENT(path[0].ep_header)->e_blk; + ext4_index_store_pblock(curpath->ep_index, newblk); + + neh = ext4_ext_inode_header(ip); + fidx = EXT_FIRST_INDEX(neh); + neh->eh_depth = path->ep_depth + 1; + ext4_ext_dirty(ip, curpath); +out: + brelse(bp); + + return (error); +} + +static int +ext4_ext_create_new_leaf(struct inode *ip, struct ext4_extent_path *path, + struct ext4_extent *newext) +{ + struct m_ext2fs *fs; + struct ext4_extent_path *curpath; + int depth, i, error; + + fs = ip->i_e2fs; + +repeat: + i = depth = ext4_ext_inode_depth(ip); + + /* Look for free index entry int the tree */ + curpath = path + depth; + while (i > 0 && !EXT_HAS_FREE_INDEX(curpath)) { + i--; + curpath--; + } + + /* + * We use already allocated block for index block, + * so subsequent data blocks should be contiguous. + */ + if (EXT_HAS_FREE_INDEX(curpath)) { + error = ext4_ext_split(ip, path, newext, i); + if (error) + goto out; + + /* Refill path. */ + ext4_ext_drop_refs(path); + error = ext4_ext_find_extent(ip, newext->e_blk, &path); + if (error) + goto out; + } else { + /* Tree is full, do grow in depth. */ + error = ext4_ext_grow_indepth(ip, path, newext); + if (error) + goto out; + + /* Refill path. */ + ext4_ext_drop_refs(path); + error = ext4_ext_find_extent(ip, newext->e_blk, &path); + if (error) + goto out; + + /* Check and split tree if required. */ + depth = ext4_ext_inode_depth(ip); + if (path[depth].ep_header->eh_ecount == + path[depth].ep_header->eh_max) + goto repeat; + } + +out: + return (error); +} + +static int +ext4_ext_correct_indexes(struct inode *ip, struct ext4_extent_path *path) +{ + struct ext4_extent_header *eh; + struct ext4_extent *ex; + int32_t border; + int depth, k; + + depth = ext4_ext_inode_depth(ip); + eh = path[depth].ep_header; + ex = path[depth].ep_ext; + + if (ex == NULL || eh == NULL) + return (EIO); + + if (!depth) + return (0); + + /* We will correct tree if first leaf got modified only. */ + if (ex != EXT_FIRST_EXTENT(eh)) + return (0); + + k = depth - 1; + border = path[depth].ep_ext->e_blk; + path[k].ep_index->ei_blk = border; + ext4_ext_dirty(ip, path + k); + while (k--) { + /* Change all left-side indexes. */ + if (path[k+1].ep_index != EXT_FIRST_INDEX(path[k+1].ep_header)) + break; + + path[k].ep_index->ei_blk = border; + ext4_ext_dirty(ip, path + k); + } + + return (0); +} + +static int +ext4_ext_insert_extent(struct inode *ip, struct ext4_extent_path *path, + struct ext4_extent *newext) +{ + struct m_ext2fs *fs; + struct ext4_extent_header * eh; + struct ext4_extent *ex, *nex, *nearex; + struct ext4_extent_path *npath; + int depth, len, error, next; + + fs = ip->i_e2fs; + depth = ext4_ext_inode_depth(ip); + ex = path[depth].ep_ext; + npath = NULL; + + if (newext->e_len == 0 || path[depth].ep_header == NULL) + return (EINVAL); + + /* Insert block into found extent. */ + if (ex && ext4_can_extents_be_merged(ex, newext)) { + ex->e_len = ex->e_len + newext->e_len; + eh = path[depth].ep_header; + nearex = ex; + goto merge; + } + +repeat: + depth = ext4_ext_inode_depth(ip); + eh = path[depth].ep_header; + if (eh->eh_ecount < eh->eh_max) + goto has_space; + + /* Try next leaf */ + nex = EXT_LAST_EXTENT(eh); + next = ext4_ext_next_leaf_block(ip, path); + if (newext->e_blk > nex->e_blk && next != EXT4_MAX_BLOCKS) { + KASSERT(npath == NULL, + ("ext4_ext_insert_extent: bad path")); + + error = ext4_ext_find_extent(ip, next, &npath); + if (error) + goto cleanup; + + if (npath->ep_depth != path->ep_depth) { + error = EIO; + goto cleanup; + } + + eh = npath[depth].ep_header; + if (eh->eh_ecount < eh->eh_max) { + path = npath; + goto repeat; + } + } + + /* + * There is no free space in the found leaf, + * try to add a new leaf to the tree. + */ + error = ext4_ext_create_new_leaf(ip, path, newext); + if (error) + goto cleanup; + + depth = ext4_ext_inode_depth(ip); + eh = path[depth].ep_header; + +has_space: + nearex = path[depth].ep_ext; + if (!nearex) { + /* Create new extent in the leaf. */ + path[depth].ep_ext = EXT_FIRST_EXTENT(eh); + } else if (newext->e_blk > nearex->e_blk) { + if (nearex != EXT_LAST_EXTENT(eh)) { + len = EXT_MAX_EXTENT(eh) - nearex; + len = (len - 1) * sizeof(struct ext4_extent); + len = len < 0 ? 0 : len; + memmove(nearex + 2, nearex + 1, len); + } + path[depth].ep_ext = nearex + 1; + } else { + len = (EXT_MAX_EXTENT(eh) - nearex) * sizeof(struct ext4_extent); + len = len < 0 ? 0 : len; + memmove(nearex + 1, nearex, len); + path[depth].ep_ext = nearex; + } + + eh->eh_ecount = eh->eh_ecount + 1; + nearex = path[depth].ep_ext; + nearex->e_blk = newext->e_blk; + nearex->e_start_lo = newext->e_start_lo; + nearex->e_start_hi = newext->e_start_hi; + nearex->e_len = newext->e_len; + +merge: + /* Try to merge extents to the right. */ + while (nearex < EXT_LAST_EXTENT(eh)) { + if (!ext4_can_extents_be_merged(nearex, nearex + 1)) + break; + + /* Merge with next extent. */ + nearex->e_len = nearex->e_len + nearex[1].e_len; + if (nearex + 1 < EXT_LAST_EXTENT(eh)) { + len = (EXT_LAST_EXTENT(eh) - nearex - 1) * + sizeof(struct ext4_extent); + memmove(nearex + 1, nearex + 2, len); + } + + eh->eh_ecount = eh->eh_ecount - 1; + KASSERT(eh->eh_ecount != 0, + ("ext4_ext_insert_extent: bad ecount")); + } + + /* + * Try to merge extents to the left, + * start from inexes correction. + */ + error = ext4_ext_correct_indexes(ip, path); + if (error) + goto cleanup; + + ext4_ext_dirty(ip, path + depth); + +cleanup: + if (npath) { + ext4_ext_drop_refs(npath); + free(npath, M_EXT2EXTENTS); + } + + ip->i_ext_cache.ec_type = EXT4_EXT_CACHE_NO; + return (error); +} + +static e4fs_daddr_t +ext4_new_blocks(struct inode *ip, daddr_t lbn, e4fs_daddr_t pref, + struct ucred *cred, unsigned long *count, int *perror) +{ + struct m_ext2fs *fs; + struct ext2mount *ump; + e4fs_daddr_t newblk; + + fs = ip->i_e2fs; + ump = ip->i_ump; + + /* + * We will allocate only single block for now. + */ + if (*count > 1) + return (0); + + EXT2_LOCK(ip->i_ump); + *perror = ext2_alloc(ip, lbn, pref, (int)fs->e2fs_bsize, cred, &newblk); + if (*perror) + return (0); + + if (newblk) { + ip->i_flag |= IN_CHANGE | IN_UPDATE; + ext2_update(ip->i_vnode, 1); + } + + return (newblk); +} + +int +ext4_ext_get_blocks(struct inode *ip, e4fs_daddr_t iblk, + unsigned long max_blocks, struct ucred *cred, struct buf **bpp, + int *pallocated, uint32_t *nb) +{ + struct m_ext2fs *fs; + struct buf *bp = NULL; + struct ext4_extent_path *path; + struct ext4_extent newex, *ex; + e4fs_daddr_t bpref, newblk = 0; + unsigned long allocated = 0; + int error = 0, depth; + + fs = ip->i_e2fs; + *pallocated = 0; + path = NULL; + if(bpp) + *bpp = NULL; + + /* Check cache. */ + if ((bpref = ext4_ext_in_cache(ip, iblk, &newex))) { + if (bpref == EXT4_EXT_CACHE_IN) { + /* Block is already allocated. */ + newblk = iblk - newex.e_blk + + ext4_ext_extent_pblock(&newex); + allocated = newex.e_len - (iblk - newex.e_blk); + goto out; + } else { + error = EIO; + goto out2; + } + } + + error = ext4_ext_find_extent(ip, iblk, &path); + if (error) { + goto out2; + } + + depth = ext4_ext_inode_depth(ip); + if (path[depth].ep_ext == NULL && depth != 0) { + error = EIO; + goto out2; + } + + if ((ex = path[depth].ep_ext)) { + uint64_t lblk = ex->e_blk; + uint16_t e_len = ex->e_len; + e4fs_daddr_t e_start = ext4_ext_extent_pblock(ex); + + if (e_len > EXT4_MAX_LEN) + goto out2; + + /* If we found extent covers block, simply return it. */ + if (iblk >= lblk && iblk < lblk + e_len) { + newblk = iblk - lblk + e_start; + allocated = e_len - (iblk - lblk); + ext4_ext_put_in_cache(ip, lblk, e_len, + e_start, EXT4_EXT_CACHE_IN); + goto out; + } + } + + /* Allocate the new block. */ + if (S_ISREG(ip->i_mode) && (!ip->i_next_alloc_block)) { + ip->i_next_alloc_goal = 0; + } + + bpref = ext4_ext_blkpref(ip, path, iblk); + allocated = max_blocks; + newblk = ext4_new_blocks(ip, iblk, bpref, cred, &allocated, &error); + if (!newblk) + goto out2; + + /* Try to insert new extent into found leaf and return. */ + newex.e_blk = iblk; + ext4_ext_store_pblock(&newex, newblk); + newex.e_len = allocated; + error = ext4_ext_insert_extent(ip, path, &newex); + if (error) + goto out2; + + newblk = ext4_ext_extent_pblock(&newex); + ext4_ext_put_in_cache(ip, iblk, allocated, newblk, EXT4_EXT_CACHE_IN); + *pallocated = 1; + +out: + if (allocated > max_blocks) + allocated = max_blocks; + + if (bpp) + { + error = bread(ip->i_devvp, fsbtodb(fs, newblk), + fs->e2fs_bsize, cred, &bp); + if (error) { + brelse(bp); + } else { + *bpp = bp; + } + } + +out2: + if (path) { + ext4_ext_drop_refs(path); + free(path, M_EXT2EXTENTS); + } + + if (nb) + *nb = newblk; + + return (error); +} + +static inline uint16_t +ext4_ext_get_actual_len(struct ext4_extent *ext) +{ + + return (ext->e_len <= EXT_INIT_MAX_LEN ? + ext->e_len : (ext->e_len - EXT_INIT_MAX_LEN)); +} + +static inline struct ext4_extent_header * +ext4_ext_header(struct inode *ip) +{ + + return (struct ext4_extent_header *)ip->i_db; +} + +static int +ext4_remove_blocks(struct inode *ip, struct ext4_extent *ex, + unsigned long from, unsigned long to) +{ + unsigned long num, start; + + if (from >= ex->e_blk && + to == ex->e_blk + ext4_ext_get_actual_len(ex) - 1) { + /* Tail cleanup. */ + num = ex->e_blk + ext4_ext_get_actual_len(ex) - from; + start = ext4_ext_extent_pblock(ex) + + ext4_ext_get_actual_len(ex) - num; + ext4_ext_blkfree(ip, start, num, 0); + } + + return (0); +} + +static int +ext4_ext_rm_index(struct inode *ip, struct ext4_extent_path *path) +{ + e4fs_daddr_t leaf; + + /* Free index block. */ + path--; + leaf = ext4_ext_index_pblock(path->ep_index); + KASSERT(path->ep_header->eh_ecount != 0, + ("ext4_ext_rm_index: bad ecount")); + path->ep_header->eh_ecount--; + ext4_ext_dirty(ip, path); + ext4_ext_blkfree(ip, leaf, 1, 0); + return (0); +} + +static int +ext4_ext_rm_leaf(struct inode *ip, struct ext4_extent_path *path, + uint64_t start) +{ + struct m_ext2fs *fs; + int depth, credits; + struct ext4_extent_header *eh; + unsigned int a, b, block, num; + unsigned long ex_blk; + unsigned short ex_len; + struct ext4_extent *ex; + int error, correct_index; + + fs = ip->i_e2fs; + depth = ext4_ext_inode_depth(ip); + correct_index = 0; + + if (!path[depth].ep_header) { + if (path[depth].ep_data == NULL) + return (EINVAL); + path[depth].ep_header = + (struct ext4_extent_header* )path[depth].ep_data; + } + + eh = path[depth].ep_header; + if (!eh) { + ext2_fserr(fs, ip->i_uid, "bad header => extent corrupted"); + return (EIO); + } + + ex = EXT_LAST_EXTENT(eh); + ex_blk = ex->e_blk; + ex_len = ext4_ext_get_actual_len(ex); + + while (ex >= EXT_FIRST_EXTENT(eh) && ex_blk + ex_len > start) { + path[depth].ep_ext = ex; + a = ex_blk > start ? ex_blk : start; + b = (uint64_t)ex_blk + ex_len - 1 < + EXT4_MAX_BLOCKS ? ex_blk + ex_len - 1 : EXT4_MAX_BLOCKS; + + if (a != ex_blk && b != ex_blk + ex_len - 1) + return (EINVAL); + else if (a != ex_blk) { + /* Remove tail of the extent. */ + block = ex_blk; + num = a - block; + } else if (b != ex_blk + ex_len - 1) { + /* Remove head of the extent, not implemented. */ + return (EINVAL); + } else { + /* Remove whole extent. */ + block = ex_blk; + num = 0; + KASSERT(a == ex_blk, ("ext4_ext_rm_leaf: bad a")); + KASSERT(b != ex_blk + ex_len - 1, + ("ext4_ext_rm_leaf: bad b")); + } + + credits = EXT4_EXT_DEPTH_MAX; + if (ex == EXT_FIRST_EXTENT(eh)) { + correct_index = 1; + credits += (ext4_ext_inode_depth(ip)) + 1; + } + + error = ext4_remove_blocks(ip, ex, a, b); + if (error) + goto out; + + if (num == 0) { + ext4_ext_store_pblock(ex, 0); + eh->eh_ecount--; + } + + ex->e_blk = block; + ex->e_len = num; + + ext4_ext_dirty(ip, path + depth); + + ex--; + ex_blk = ex->e_blk; + ex_len = ext4_ext_get_actual_len(ex); + }; + + if (correct_index && eh->eh_ecount) + error = ext4_ext_correct_indexes(ip, path); + + /* + * If this leaf is free, we should + * remove it from index block above. + */ + if (error == 0 && eh->eh_ecount == 0 && path[depth].ep_data != NULL) + error = ext4_ext_rm_index(ip, path + depth); + +out: + return (error); +} + +static struct buf * +ext4_read_extent_tree_block(struct inode *ip, e4fs_daddr_t pblk, + int depth, int flags) +{ + struct m_ext2fs *fs; + struct ext4_extent_header *eh; + struct buf *bp; + int error; + + fs = ip->i_e2fs; + + error = bread(ip->i_devvp, fsbtodb(fs, pblk), + fs->e2fs_bsize, NOCRED, &bp); + if (error) { + brelse(bp); + return (NULL); + } + + eh = ext4_ext_block_header(bp->b_data); + if (eh->eh_depth != depth) { + ext2_fserr(fs, ip->i_uid, "unexpected eh_depth"); + goto err; + } + + error = ext4_ext_check_header(ip, eh); + if (error) + goto err; + + return (bp); + +err: + brelse(bp); + return (NULL); + +} + +static int inline +ext4_ext_more_to_rm(struct ext4_extent_path *path) +{ + + KASSERT(path->ep_index != NULL, + ("ext4_ext_more_to_rm: bad index from path")); + + if (path->ep_index < EXT_FIRST_INDEX(path->ep_header)) + return (0); + + if (path->ep_header->eh_ecount == path->index_count) + return (0); + + return (1); +} + +int +ext4_ext_remove_space(struct inode *ip, off_t length, int flags, + struct ucred *cred, struct thread *td) +{ + struct buf *bp; + struct ext4_extent_header *ehp; + struct ext4_extent_path *path; + int depth; + int i, error; + + ehp = (struct ext4_extent_header *)ip->i_db; + depth = ext4_ext_inode_depth(ip); + + error = ext4_ext_check_header(ip, ehp); + if(error) + return (error); + + path = malloc(sizeof(struct ext4_extent_path) * (depth + 1), + M_EXT2EXTENTS, M_WAITOK | M_ZERO); + if (!path) + return (ENOMEM); + + i = 0; + path[0].ep_header = ehp; + path[0].ep_depth = depth; + while (i >= 0 && error == 0) { + if (i == depth) { + /* This is leaf. */ + error = ext4_ext_rm_leaf(ip, path, length); + if (error) + break; + free(path[i].ep_data, M_EXT2EXTENTS); + path[i].ep_data = NULL; + i--; + continue; + } + + /* This is index. */ + if (!path[i].ep_header) + path[i].ep_header = + (struct ext4_extent_header *)path[i].ep_data; + + if (!path[i].ep_index) { + /* This level hasn't touched yet. */ + path[i].ep_index = EXT_LAST_INDEX(path[i].ep_header); + path[i].index_count = path[i].ep_header->eh_ecount + 1; + } else { + /* We've already was here, see at next index. */ + path[i].ep_index--; + } + + if (ext4_ext_more_to_rm(path + i)) { + memset(path + i + 1, 0, sizeof(*path)); + bp = ext4_read_extent_tree_block(ip, + ext4_ext_index_pblock(path[i].ep_index), + path[0].ep_depth - (i + 1), 0); + if (!bp) { + error = EIO; + break; + } + + ext4_ext_fill_path_bdata(&path[i+1], bp, + ext4_ext_index_pblock(path[i].ep_index)); + brelse(bp); + path[i].index_count = path[i].ep_header->eh_ecount; + i++; + } else { + if (path[i].ep_header->eh_ecount == 0 && i > 0) { + /* Index is empty, remove it. */ + error = ext4_ext_rm_index(ip, path + i); + } + free(path[i].ep_data, M_EXT2EXTENTS); + path[i].ep_data = NULL; + i--; + } + } + + if (path->ep_header->eh_ecount == 0) { + /* + * Truncate the tree to zero. + */ + ext4_ext_header(ip)->eh_depth = 0; + ext4_ext_header(ip)->eh_max = ext4_ext_space_root(ip); + ext4_ext_dirty(ip, path); + + } + + ext4_ext_drop_refs(path); + free(path, M_EXT2EXTENTS); + + return (error); } diff --git a/sys/fs/ext2fs/ext2_extents.h b/sys/fs/ext2fs/ext2_extents.h index 91cb0d32346c..b69da4cdba19 100644 --- a/sys/fs/ext2fs/ext2_extents.h +++ b/sys/fs/ext2fs/ext2_extents.h @@ -31,6 +31,10 @@ #include #define EXT4_EXT_MAGIC 0xf30a +#define EXT4_MAX_BLOCKS 0xffffffff +#define EXT_INIT_MAX_LEN (1UL << 15) +#define EXT4_MAX_LEN (EXT_INIT_MAX_LEN - 1) +#define EXT4_EXT_DEPTH_MAX 5 #define EXT4_EXT_CACHE_NO 0 #define EXT4_EXT_CACHE_GAP 1 @@ -82,23 +86,41 @@ struct ext4_extent_cache { * Save path to some extent. */ struct ext4_extent_path { + int index_count; uint16_t ep_depth; - struct buf *ep_bp; - bool ep_is_sparse; - union { - struct ext4_extent ep_sparse_ext; - struct ext4_extent *ep_ext; - }; + uint64_t ep_blk; + char *ep_data; + struct ext4_extent *ep_ext; struct ext4_extent_index *ep_index; struct ext4_extent_header *ep_header; }; +#define EXT_FIRST_EXTENT(hdr) ((struct ext4_extent *)(((char *)(hdr)) + \ + sizeof(struct ext4_extent_header))) +#define EXT_FIRST_INDEX(hdr) ((struct ext4_extent_index *)(((char *)(hdr)) + \ + sizeof(struct ext4_extent_header))) +#define EXT_LAST_EXTENT(hdr) (EXT_FIRST_EXTENT((hdr)) + (hdr)->eh_ecount - 1) +#define EXT_LAST_INDEX(hdr) (EXT_FIRST_INDEX((hdr)) + (hdr)->eh_ecount - 1) +#define EXT4_EXTENT_TAIL_OFFSET(hdr) (sizeof(struct ext4_extent_header) + \ + (sizeof(struct ext4_extent) * (hdr)->eh_max)) +#define EXT_HAS_FREE_INDEX(path) \ + ((path)->ep_header->eh_ecount < (path)->ep_header->eh_max) +#define EXT_MAX_EXTENT(hdr) (EXT_FIRST_EXTENT(hdr) + ((hdr)->eh_max) - 1) +#define EXT_MAX_INDEX(hdr) (EXT_FIRST_INDEX((hdr)) + (hdr)->eh_max - 1) + struct inode; struct m_ext2fs; +void ext4_ext_tree_init(struct inode *ip); int ext4_ext_in_cache(struct inode *, daddr_t, struct ext4_extent *); void ext4_ext_put_cache(struct inode *, struct ext4_extent *, int); -struct ext4_extent_path * -ext4_ext_find_extent(struct m_ext2fs *fs, - struct inode *, daddr_t, struct ext4_extent_path *); +int ext4_ext_find_extent(struct inode *, daddr_t, struct ext4_extent_path **); +void ext4_ext_path_free(struct ext4_extent_path *path); +int ext4_ext_remove_space(struct inode *ip, off_t length, int flags, + struct ucred *cred, struct thread *td); +int ext4_ext_get_blocks(struct inode *ip, int64_t iblock, + unsigned long max_blocks, struct ucred *cred, struct buf **bpp, int *allocate, uint32_t *); +#ifdef EXT2FS_DEBUG +void ext4_ext_print_extent_tree_status(struct inode * ip); +#endif #endif /* !_FS_EXT2FS_EXT2_EXTENTS_H_ */ diff --git a/sys/fs/ext2fs/ext2_extern.h b/sys/fs/ext2fs/ext2_extern.h index b31220403469..079f7c61a987 100644 --- a/sys/fs/ext2fs/ext2_extern.h +++ b/sys/fs/ext2fs/ext2_extern.h @@ -51,7 +51,7 @@ struct vnode; int ext2_add_entry(struct vnode *, struct ext2fs_direct_2 *); int ext2_alloc(struct inode *, daddr_t, e4fs_daddr_t, int, struct ucred *, e4fs_daddr_t *); -daddr_t ext2_allocfacl(struct inode *ip); +daddr_t ext2_alloc_meta(struct inode *ip); int ext2_balloc(struct inode *, e2fs_lbn_t, int, struct ucred *, struct buf **, int); int ext2_blkatoff(struct vnode *, off_t, char **, struct buf **); @@ -60,6 +60,7 @@ e4fs_daddr_t ext2_blkpref(struct inode *, e2fs_lbn_t, int, e2fs_daddr_t *, e2fs_daddr_t); int ext2_bmap(struct vop_bmap_args *); int ext2_bmaparray(struct vnode *, daddr_t, daddr_t *, int *, int *); +int ext4_bmapext(struct vnode *, int32_t, int64_t *, int *, int *); void ext2_clusteracct(struct m_ext2fs *, char *, int, daddr_t, int); void ext2_dirbad(struct inode *ip, doff_t offset, char *how); void ext2_fserr(struct m_ext2fs *, uid_t, char *); @@ -101,6 +102,7 @@ int ext2_search_dirblock(struct inode *, void *, int *, const char *, int, int *, doff_t *, doff_t *, doff_t *, struct ext2fs_searchslot *); int ext2_gd_csum_verify(struct m_ext2fs *fs, struct cdev *dev); void ext2_gd_csum_set(struct m_ext2fs *fs); +void ext2_fserr(struct m_ext2fs *, uid_t, char *); /* Flags to low-level allocation routines. diff --git a/sys/fs/ext2fs/ext2_inode.c b/sys/fs/ext2fs/ext2_inode.c index 745d92061d50..a763ab89ceb9 100644 --- a/sys/fs/ext2fs/ext2_inode.c +++ b/sys/fs/ext2fs/ext2_inode.c @@ -55,9 +55,6 @@ #include #include -static int ext2_indirtrunc(struct inode *, daddr_t, daddr_t, - daddr_t, int, e4fs_daddr_t *); - /* * Update the access, modified, and inode change times as specified by the * IN_ACCESS, IN_UPDATE, and IN_CHANGE flags respectively. Write the inode @@ -107,12 +104,123 @@ ext2_update(struct vnode *vp, int waitfor) #define SINGLE 0 /* index of single indirect block */ #define DOUBLE 1 /* index of double indirect block */ #define TRIPLE 2 /* index of triple indirect block */ + +/* + * Release blocks associated with the inode ip and stored in the indirect + * block bn. Blocks are free'd in LIFO order up to (but not including) + * lastbn. If level is greater than SINGLE, the block is an indirect block + * and recursive calls to indirtrunc must be used to cleanse other indirect + * blocks. + * + * NB: triple indirect blocks are untested. + */ +static int +ext2_indirtrunc(struct inode *ip, daddr_t lbn, daddr_t dbn, + daddr_t lastbn, int level, e4fs_daddr_t *countp) +{ + struct buf *bp; + struct m_ext2fs *fs = ip->i_e2fs; + struct vnode *vp; + e2fs_daddr_t *bap, *copy; + int i, nblocks, error = 0, allerror = 0; + e2fs_lbn_t nb, nlbn, last; + e4fs_daddr_t blkcount, factor, blocksreleased = 0; + + /* + * Calculate index in current block of last + * block to be kept. -1 indicates the entire + * block so we need not calculate the index. + */ + factor = 1; + for (i = SINGLE; i < level; i++) + factor *= NINDIR(fs); + last = lastbn; + if (lastbn > 0) + last /= factor; + nblocks = btodb(fs->e2fs_bsize); + /* + * Get buffer of block pointers, zero those entries corresponding + * to blocks to be free'd, and update on disk copy first. Since + * double(triple) indirect before single(double) indirect, calls + * to bmap on these blocks will fail. However, we already have + * the on disk address, so we have to set the b_blkno field + * explicitly instead of letting bread do everything for us. + */ + vp = ITOV(ip); + bp = getblk(vp, lbn, (int)fs->e2fs_bsize, 0, 0, 0); + if ((bp->b_flags & (B_DONE | B_DELWRI)) == 0) { + bp->b_iocmd = BIO_READ; + if (bp->b_bcount > bp->b_bufsize) + panic("ext2_indirtrunc: bad buffer size"); + bp->b_blkno = dbn; + vfs_busy_pages(bp, 0); + bp->b_iooffset = dbtob(bp->b_blkno); + bstrategy(bp); + error = bufwait(bp); + } + if (error) { + brelse(bp); + *countp = 0; + return (error); + } + bap = (e2fs_daddr_t *)bp->b_data; + copy = malloc(fs->e2fs_bsize, M_TEMP, M_WAITOK); + bcopy((caddr_t)bap, (caddr_t)copy, (u_int)fs->e2fs_bsize); + bzero((caddr_t)&bap[last + 1], + (NINDIR(fs) - (last + 1)) * sizeof(e2fs_daddr_t)); + if (last == -1) + bp->b_flags |= B_INVAL; + if (DOINGASYNC(vp)) { + bdwrite(bp); + } else { + error = bwrite(bp); + if (error) + allerror = error; + } + bap = copy; + + /* + * Recursively free totally unused blocks. + */ + for (i = NINDIR(fs) - 1, nlbn = lbn + 1 - i * factor; i > last; + i--, nlbn += factor) { + nb = bap[i]; + if (nb == 0) + continue; + if (level > SINGLE) { + if ((error = ext2_indirtrunc(ip, nlbn, + fsbtodb(fs, nb), (int32_t)-1, level - 1, &blkcount)) != 0) + allerror = error; + blocksreleased += blkcount; + } + ext2_blkfree(ip, nb, fs->e2fs_bsize); + blocksreleased += nblocks; + } + + /* + * Recursively free last partial block. + */ + if (level > SINGLE && lastbn >= 0) { + last = lastbn % factor; + nb = bap[i]; + if (nb != 0) { + if ((error = ext2_indirtrunc(ip, nlbn, fsbtodb(fs, nb), + last, level - 1, &blkcount)) != 0) + allerror = error; + blocksreleased += blkcount; + } + } + free(copy, M_TEMP); + *countp = blocksreleased; + return (allerror); +} + /* * Truncate the inode oip to at most length size, freeing the * disk blocks. */ -int -ext2_truncate(struct vnode *vp, off_t length, int flags, struct ucred *cred, +static int +ext2_ind_truncate(struct vnode *vp, off_t length, int flags, struct ucred *cred, struct thread *td) { struct vnode *ovp = vp; @@ -136,26 +244,6 @@ ext2_truncate(struct vnode *vp, off_t length, int flags, struct ucred *cred, bo = &ovp->v_bufobj; #endif - ASSERT_VOP_LOCKED(vp, "ext2_truncate"); - - if (length < 0) - return (EINVAL); - - if (ovp->v_type == VLNK && - oip->i_size < ovp->v_mount->mnt_maxsymlinklen) { -#ifdef INVARIANTS - if (length != 0) - panic("ext2_truncate: partial truncate of symlink"); -#endif - bzero((char *)&oip->i_shortlink, (u_int)oip->i_size); - oip->i_size = 0; - oip->i_flag |= IN_CHANGE | IN_UPDATE; - return (ext2_update(ovp, 1)); - } - if (oip->i_size == length) { - oip->i_flag |= IN_CHANGE | IN_UPDATE; - return (ext2_update(ovp, 0)); - } fs = oip->i_e2fs; osize = oip->i_size; /* @@ -365,115 +453,131 @@ ext2_truncate(struct vnode *vp, off_t length, int flags, struct ucred *cred, return (allerror); } -/* - * Release blocks associated with the inode ip and stored in the indirect - * block bn. Blocks are free'd in LIFO order up to (but not including) - * lastbn. If level is greater than SINGLE, the block is an indirect block - * and recursive calls to indirtrunc must be used to cleanse other indirect - * blocks. - * - * NB: triple indirect blocks are untested. - */ - static int -ext2_indirtrunc(struct inode *ip, daddr_t lbn, daddr_t dbn, - daddr_t lastbn, int level, e4fs_daddr_t *countp) +ext2_ext_truncate(struct vnode *vp, off_t length, int flags, + struct ucred *cred, struct thread *td) { + struct vnode *ovp = vp; + int32_t lastblock; + struct m_ext2fs *fs; + struct inode *oip; struct buf *bp; - struct m_ext2fs *fs = ip->i_e2fs; - struct vnode *vp; - e2fs_daddr_t *bap, *copy; - int i, nblocks, error = 0, allerror = 0; - e2fs_lbn_t nb, nlbn, last; - e4fs_daddr_t blkcount, factor, blocksreleased = 0; + uint32_t lbn, offset; + int error, size; + off_t osize; - /* - * Calculate index in current block of last - * block to be kept. -1 indicates the entire - * block so we need not calculate the index. - */ - factor = 1; - for (i = SINGLE; i < level; i++) - factor *= NINDIR(fs); - last = lastbn; - if (lastbn > 0) - last /= factor; - nblocks = btodb(fs->e2fs_bsize); - /* - * Get buffer of block pointers, zero those entries corresponding - * to blocks to be free'd, and update on disk copy first. Since - * double(triple) indirect before single(double) indirect, calls - * to bmap on these blocks will fail. However, we already have - * the on disk address, so we have to set the b_blkno field - * explicitly instead of letting bread do everything for us. - */ - vp = ITOV(ip); - bp = getblk(vp, lbn, (int)fs->e2fs_bsize, 0, 0, 0); - if ((bp->b_flags & (B_DONE | B_DELWRI)) == 0) { - bp->b_iocmd = BIO_READ; - if (bp->b_bcount > bp->b_bufsize) - panic("ext2_indirtrunc: bad buffer size"); - bp->b_blkno = dbn; - vfs_busy_pages(bp, 0); - bp->b_iooffset = dbtob(bp->b_blkno); - bstrategy(bp); - error = bufwait(bp); + oip = VTOI(ovp); + fs = oip->i_e2fs; + osize = oip->i_size; + + if (osize < length) { + if (length > oip->i_e2fs->e2fs_maxfilesize) { + return (EFBIG); + } + vnode_pager_setsize(ovp, length); + offset = blkoff(fs, length - 1); + lbn = lblkno(fs, length - 1); + flags |= BA_CLRBUF; + error = ext2_balloc(oip, lbn, offset + 1, cred, &bp, flags); + if (error) { + vnode_pager_setsize(vp, osize); + return (error); + } + oip->i_size = length; + if (bp->b_bufsize == fs->e2fs_bsize) + bp->b_flags |= B_CLUSTEROK; + if (flags & IO_SYNC) + bwrite(bp); + else if (DOINGASYNC(ovp)) + bdwrite(bp); + else + bawrite(bp); + oip->i_flag |= IN_CHANGE | IN_UPDATE; + return (ext2_update(ovp, !DOINGASYNC(ovp))); } - if (error) { - brelse(bp); - *countp = 0; + + lastblock = (length + fs->e2fs_bsize - 1) / fs->e2fs_bsize; + error = ext4_ext_remove_space(oip, lastblock, flags, cred, td); + if (error) return (error); - } - bap = (e2fs_daddr_t *)bp->b_data; - copy = malloc(fs->e2fs_bsize, M_TEMP, M_WAITOK); - bcopy((caddr_t)bap, (caddr_t)copy, (u_int)fs->e2fs_bsize); - bzero((caddr_t)&bap[last + 1], - (NINDIR(fs) - (last + 1)) * sizeof(e2fs_daddr_t)); - if (last == -1) - bp->b_flags |= B_INVAL; - if (DOINGASYNC(vp)) { - bdwrite(bp); + + offset = blkoff(fs, length); + if (offset == 0) { + oip->i_size = length; } else { - error = bwrite(bp); - if (error) - allerror = error; - } - bap = copy; - - /* - * Recursively free totally unused blocks. - */ - for (i = NINDIR(fs) - 1, nlbn = lbn + 1 - i * factor; i > last; - i--, nlbn += factor) { - nb = bap[i]; - if (nb == 0) - continue; - if (level > SINGLE) { - if ((error = ext2_indirtrunc(ip, nlbn, - fsbtodb(fs, nb), (int32_t)-1, level - 1, &blkcount)) != 0) - allerror = error; - blocksreleased += blkcount; + lbn = lblkno(fs, length); + flags |= BA_CLRBUF; + error = ext2_balloc(oip, lbn, offset, cred, &bp, flags); + if (error) { + return (error); } - ext2_blkfree(ip, nb, fs->e2fs_bsize); - blocksreleased += nblocks; + oip->i_size = length; + size = blksize(fs, oip, lbn); + bzero((char *)bp->b_data + offset, (u_int)(size - offset)); + allocbuf(bp, size); + if (bp->b_bufsize == fs->e2fs_bsize) + bp->b_flags |= B_CLUSTEROK; + if (flags & IO_SYNC) + bwrite(bp); + else if (DOINGASYNC(ovp)) + bdwrite(bp); + else + bawrite(bp); } - /* - * Recursively free last partial block. - */ - if (level > SINGLE && lastbn >= 0) { - last = lastbn % factor; - nb = bap[i]; - if (nb != 0) { - if ((error = ext2_indirtrunc(ip, nlbn, fsbtodb(fs, nb), - last, level - 1, &blkcount)) != 0) - allerror = error; - blocksreleased += blkcount; - } + oip->i_size = osize; + error = vtruncbuf(ovp, cred, length, (int)fs->e2fs_bsize); + if (error) + return (error); + + vnode_pager_setsize(ovp, length); + + oip->i_size = length; + oip->i_flag |= IN_CHANGE | IN_UPDATE; + error = ext2_update(ovp, !DOINGASYNC(ovp)); + + return (error); +} + +/* + * Truncate the inode ip to at most length size, freeing the + * disk blocks. + */ +int +ext2_truncate(struct vnode *vp, off_t length, int flags, struct ucred *cred, + struct thread *td) +{ + struct inode *ip; + int error; + + ASSERT_VOP_LOCKED(vp, "ext2_truncate"); + + if (length < 0) + return (EINVAL); + + ip = VTOI(vp); + if (vp->v_type == VLNK && + ip->i_size < vp->v_mount->mnt_maxsymlinklen) { +#ifdef INVARIANTS + if (length != 0) + panic("ext2_truncate: partial truncate of symlink"); +#endif + bzero((char *)&ip->i_shortlink, (u_int)ip->i_size); + ip->i_size = 0; + ip->i_flag |= IN_CHANGE | IN_UPDATE; + return (ext2_update(vp, 1)); } - free(copy, M_TEMP); - *countp = blocksreleased; - return (allerror); + if (ip->i_size == length) { + ip->i_flag |= IN_CHANGE | IN_UPDATE; + return (ext2_update(vp, 0)); + } + + if (ip->i_flag & IN_E4EXTENTS) + error = ext2_ext_truncate(vp, length, flags, cred, td); + else + error = ext2_ind_truncate(vp, length, flags, cred, td); + + return (error); } /* @@ -495,7 +599,8 @@ ext2_inactive(struct vop_inactive_args *ap) if (ip->i_nlink <= 0) { ext2_extattr_free(ip); error = ext2_truncate(vp, (off_t)0, 0, NOCRED, td); - ip->i_rdev = 0; + if (!(ip->i_flag & IN_E4EXTENTS)) + ip->i_rdev = 0; mode = ip->i_mode; ip->i_mode = 0; ip->i_flag |= IN_CHANGE | IN_UPDATE; diff --git a/sys/fs/ext2fs/ext2_inode_cnv.c b/sys/fs/ext2fs/ext2_inode_cnv.c index ec3faa93b1fa..ef2fe60ef3f9 100644 --- a/sys/fs/ext2fs/ext2_inode_cnv.c +++ b/sys/fs/ext2fs/ext2_inode_cnv.c @@ -51,7 +51,7 @@ ext2_print_inode(struct inode *in) printf("Inode: %5ju", (uintmax_t)in->i_number); printf( /* "Inode: %5d" */ - " Type: %10s Mode: 0x%o Flags: 0x%x Version: %d acl: 0x%llx\n", + " Type: %10s Mode: 0x%o Flags: 0x%x Version: %d acl: 0x%lx\n", "n/a", in->i_mode, in->i_flags, in->i_gen, in->i_facl); printf("User: %5u Group: %5u Size: %ju\n", in->i_uid, in->i_gid, (uintmax_t)in->i_size); @@ -62,19 +62,22 @@ ext2_print_inode(struct inode *in) printf("mtime: 0x%x", in->i_mtime); if (E2DI_HAS_XTIME(in)) printf("crtime %#x ", in->i_birthtime); - printf("BLOCKS:"); - for (i = 0; i < (in->i_blocks <= 24 ? (in->i_blocks + 1) / 2 : 12); i++) - printf(" %d", in->i_db[i]); - printf("\n"); - printf("Extents:\n"); - ehp = (struct ext4_extent_header *)in->i_db; - printf("Header (magic 0x%x entries %d max %d depth %d gen %d)\n", - ehp->eh_magic, ehp->eh_ecount, ehp->eh_max, ehp->eh_depth, - ehp->eh_gen); - ep = (struct ext4_extent *)(char *)(ehp + 1); - printf("Index (blk %d len %d start_lo %d start_hi %d)\n", ep->e_blk, - ep->e_len, ep->e_start_lo, ep->e_start_hi); - printf("\n"); + if (in->i_flag & IN_E4EXTENTS) { + printf("Extents:\n"); + ehp = (struct ext4_extent_header *)in->i_db; + printf("Header (magic 0x%x entries %d max %d depth %d gen %d)\n", + ehp->eh_magic, ehp->eh_ecount, ehp->eh_max, ehp->eh_depth, + ehp->eh_gen); + ep = (struct ext4_extent *)(char *)(ehp + 1); + printf("Index (blk %d len %d start_lo %d start_hi %d)\n", ep->e_blk, + ep->e_len, ep->e_start_lo, ep->e_start_hi); + printf("\n"); + } else { + printf("BLOCKS:"); + for (i = 0; i < (in->i_blocks <= 24 ? (in->i_blocks + 1) / 2 : 12); i++) + printf(" %d", in->i_db[i]); + printf("\n"); + } } #endif /* EXT2FS_DEBUG */ @@ -84,8 +87,6 @@ ext2_print_inode(struct inode *in) void ext2_ei2i(struct ext2fs_dinode *ei, struct inode *ip) { - int i; - ip->i_nlink = ei->e2di_nlink; /* * Godmar thinks - if the link count is zero, then the inode is @@ -127,10 +128,7 @@ ext2_ei2i(struct ext2fs_dinode *ei, struct inode *ip) ip->i_uid |= (uint32_t)ei->e2di_uid_high << 16; ip->i_gid |= (uint32_t)ei->e2di_gid_high << 16; - for (i = 0; i < EXT2_NDADDR; i++) - ip->i_db[i] = ei->e2di_blocks[i]; - for (i = 0; i < EXT2_NIADDR; i++) - ip->i_ib[i] = ei->e2di_blocks[EXT2_NDIR_BLOCKS + i]; + memcpy(ip->i_data, ei->e2di_blocks, sizeof(ei->e2di_blocks)); } /* @@ -140,7 +138,6 @@ int ext2_i2ei(struct inode *ip, struct ext2fs_dinode *ei) { struct m_ext2fs *fs; - int i; fs = ip->i_e2fs; ei->e2di_mode = ip->i_mode; @@ -190,10 +187,7 @@ ext2_i2ei(struct inode *ip, struct ext2fs_dinode *ei) ei->e2di_gid = ip->i_gid & 0xffff; ei->e2di_gid_high = ip->i_gid >> 16 & 0xffff; - for (i = 0; i < EXT2_NDADDR; i++) - ei->e2di_blocks[i] = ip->i_db[i]; - for (i = 0; i < EXT2_NIADDR; i++) - ei->e2di_blocks[EXT2_NDIR_BLOCKS + i] = ip->i_ib[i]; + memcpy(ei->e2di_blocks, ip->i_data, sizeof(ei->e2di_blocks)); return (0); } diff --git a/sys/fs/ext2fs/ext2_subr.c b/sys/fs/ext2fs/ext2_subr.c index a481b9985b8f..f058a3d4f1a0 100644 --- a/sys/fs/ext2fs/ext2_subr.c +++ b/sys/fs/ext2fs/ext2_subr.c @@ -66,63 +66,22 @@ ext2_blkatoff(struct vnode *vp, off_t offset, char **res, struct buf **bpp) struct m_ext2fs *fs; struct buf *bp; e2fs_lbn_t lbn; - int bsize, error; - daddr_t newblk; - struct ext4_extent *ep; - struct ext4_extent_path path; + int error, bsize; ip = VTOI(vp); fs = ip->i_e2fs; lbn = lblkno(fs, offset); bsize = blksize(fs, ip, lbn); - *bpp = NULL; - /* - * IN_E4EXTENTS requires special treatment as we can otherwise fall - * back to the normal path. - */ - if (!(ip->i_flag & IN_E4EXTENTS)) - goto normal; - - memset(&path, 0, sizeof(path)); - if (ext4_ext_find_extent(fs, ip, lbn, &path) == NULL) - goto normal; - ep = path.ep_ext; - if (ep == NULL) - goto normal; - - newblk = lbn - ep->e_blk + - (ep->e_start_lo | (daddr_t)ep->e_start_hi << 32); - - if (path.ep_bp != NULL) { - brelse(path.ep_bp); - path.ep_bp = NULL; - } - error = bread(ip->i_devvp, fsbtodb(fs, newblk), bsize, NOCRED, &bp); - if (error != 0) { + if ((error = bread(vp, lbn, bsize, NOCRED, &bp)) != 0) { brelse(bp); return (error); } if (res) *res = (char *)bp->b_data + blkoff(fs, offset); - /* - * If IN_E4EXTENTS is enabled we would get a wrong offset so - * reset b_offset here. - */ - bp->b_offset = lbn * bsize; - *bpp = bp; - return (0); -normal: - if (*bpp == NULL) { - if ((error = bread(vp, lbn, bsize, NOCRED, &bp)) != 0) { - brelse(bp); - return (error); - } - if (res) - *res = (char *)bp->b_data + blkoff(fs, offset); - *bpp = bp; - } + *bpp = bp; + return (0); } diff --git a/sys/fs/ext2fs/ext2_vfsops.c b/sys/fs/ext2fs/ext2_vfsops.c index 98d4f0a73b2c..fe509872500c 100644 --- a/sys/fs/ext2fs/ext2_vfsops.c +++ b/sys/fs/ext2fs/ext2_vfsops.c @@ -992,6 +992,7 @@ ext2_vget(struct mount *mp, ino_t ino, int flags, struct vnode **vpp) } #ifdef EXT2FS_DEBUG ext2_print_inode(ip); + ext4_ext_print_extent_tree_status(ip); #endif bqrelse(bp); diff --git a/sys/fs/ext2fs/ext2_vnops.c b/sys/fs/ext2fs/ext2_vnops.c index d5fd6260b890..41b046a74e21 100644 --- a/sys/fs/ext2fs/ext2_vnops.c +++ b/sys/fs/ext2fs/ext2_vnops.c @@ -91,8 +91,6 @@ static int ext2_makeinode(int mode, struct vnode *, struct vnode **, struct componentname *); static void ext2_itimes_locked(struct vnode *); -static int ext4_ext_read(struct vop_read_args *); -static int ext2_ind_read(struct vop_read_args *); static vop_access_t ext2_access; static int ext2_chmod(struct vnode *, int, struct ucred *, struct thread *); @@ -630,7 +628,8 @@ ext2_mknod(struct vop_mknod_args *ap) * Want to be able to use this to make badblock * inodes, so don't truncate the dev number. */ - ip->i_rdev = vap->va_rdev; + if (!(ip->i_flag & IN_E4EXTENTS)) + ip->i_rdev = vap->va_rdev; } /* * Remove inode, then reload it through VFS_VGET so it is @@ -1542,7 +1541,12 @@ ext2_strategy(struct vop_strategy_args *ap) if (vp->v_type == VBLK || vp->v_type == VCHR) panic("ext2_strategy: spec"); if (bp->b_blkno == bp->b_lblkno) { - error = ext2_bmaparray(vp, bp->b_lblkno, &blkno, NULL, NULL); + + if (VTOI(ap->a_vp)->i_flag & IN_E4EXTENTS) + error = ext4_bmapext(vp, bp->b_lblkno, &blkno, NULL, NULL); + else + error = ext2_bmaparray(vp, bp->b_lblkno, &blkno, NULL, NULL); + bp->b_blkno = blkno; if (error) { bp->b_error = error; @@ -1987,28 +1991,6 @@ ext2_makeinode(int mode, struct vnode *dvp, struct vnode **vpp, */ static int ext2_read(struct vop_read_args *ap) -{ - struct vnode *vp; - struct inode *ip; - int error; - - vp = ap->a_vp; - ip = VTOI(vp); - - /* EXT4_EXT_LOCK(ip); */ - if (ip->i_flag & IN_E4EXTENTS) - error = ext4_ext_read(ap); - else - error = ext2_ind_read(ap); - /* EXT4_EXT_UNLOCK(ip); */ - return (error); -} - -/* - * Vnode op for reading. - */ -static int -ext2_ind_read(struct vop_read_args *ap) { struct vnode *vp; struct inode *ip; @@ -2130,122 +2112,6 @@ ext2_ioctl(struct vop_ioctl_args *ap) } } -/* - * this function handles ext4 extents block mapping - */ -static int -ext4_ext_read(struct vop_read_args *ap) -{ - static unsigned char zeroes[EXT2_MAX_BLOCK_SIZE]; - struct vnode *vp; - struct inode *ip; - struct uio *uio; - struct m_ext2fs *fs; - struct buf *bp; - struct ext4_extent nex, *ep; - struct ext4_extent_path path; - daddr_t lbn, newblk; - off_t bytesinfile; - int cache_type; - ssize_t orig_resid; - int error; - long size, xfersize, blkoffset; - - vp = ap->a_vp; - ip = VTOI(vp); - uio = ap->a_uio; - memset(&path, 0, sizeof(path)); - - orig_resid = uio->uio_resid; - KASSERT(orig_resid >= 0, ("%s: uio->uio_resid < 0", __func__)); - if (orig_resid == 0) - return (0); - KASSERT(uio->uio_offset >= 0, ("%s: uio->uio_offset < 0", __func__)); - fs = ip->i_e2fs; - if (uio->uio_offset < ip->i_size && uio->uio_offset >= fs->e2fs_maxfilesize) - return (EOVERFLOW); - - while (uio->uio_resid > 0) { - if ((bytesinfile = ip->i_size - uio->uio_offset) <= 0) - break; - lbn = lblkno(fs, uio->uio_offset); - size = blksize(fs, ip, lbn); - blkoffset = blkoff(fs, uio->uio_offset); - - xfersize = fs->e2fs_fsize - blkoffset; - xfersize = MIN(xfersize, uio->uio_resid); - xfersize = MIN(xfersize, bytesinfile); - - /* get block from ext4 extent cache */ - cache_type = ext4_ext_in_cache(ip, lbn, &nex); - switch (cache_type) { - case EXT4_EXT_CACHE_NO: - ext4_ext_find_extent(fs, ip, lbn, &path); - if (path.ep_is_sparse) - ep = &path.ep_sparse_ext; - else - ep = path.ep_ext; - if (ep == NULL) - return (EIO); - - ext4_ext_put_cache(ip, ep, - path.ep_is_sparse ? EXT4_EXT_CACHE_GAP : EXT4_EXT_CACHE_IN); - - newblk = lbn - ep->e_blk + (ep->e_start_lo | - (daddr_t)ep->e_start_hi << 32); - - if (path.ep_bp != NULL) { - brelse(path.ep_bp); - path.ep_bp = NULL; - } - break; - - case EXT4_EXT_CACHE_GAP: - /* block has not been allocated yet */ - break; - - case EXT4_EXT_CACHE_IN: - newblk = lbn - nex.e_blk + (nex.e_start_lo | - (daddr_t)nex.e_start_hi << 32); - break; - - default: - panic("%s: invalid cache type", __func__); - } - - if (cache_type == EXT4_EXT_CACHE_GAP || - (cache_type == EXT4_EXT_CACHE_NO && path.ep_is_sparse)) { - if (xfersize > sizeof(zeroes)) - xfersize = sizeof(zeroes); - error = uiomove(zeroes, xfersize, uio); - if (error) - return (error); - } else { - error = bread(ip->i_devvp, fsbtodb(fs, newblk), size, - NOCRED, &bp); - if (error) { - brelse(bp); - return (error); - } - - size -= bp->b_resid; - if (size < xfersize) { - if (size == 0) { - bqrelse(bp); - break; - } - xfersize = size; - } - error = uiomove(bp->b_data + blkoffset, xfersize, uio); - bqrelse(bp); - if (error) - return (error); - } - } - - return (0); -} - /* * Vnode op for writing. */ diff --git a/sys/fs/ext2fs/ext2fs.h b/sys/fs/ext2fs/ext2fs.h index ff0457357bd1..b3a321b9ecb2 100644 --- a/sys/fs/ext2fs/ext2fs.h +++ b/sys/fs/ext2fs/ext2fs.h @@ -385,7 +385,6 @@ struct ext2_gd { /* * Macro-instructions used to manage several block sizes */ -#define EXT2_MAX_BLOCK_SIZE 4096 #define EXT2_MIN_BLOCK_LOG_SIZE 10 #define EXT2_BLOCK_SIZE(s) ((s)->e2fs_bsize) #define EXT2_ADDR_PER_BLOCK(s) (EXT2_BLOCK_SIZE(s) / sizeof(uint32_t)) diff --git a/sys/fs/ext2fs/inode.h b/sys/fs/ext2fs/inode.h index c0178d711eae..a65dc1901893 100644 --- a/sys/fs/ext2fs/inode.h +++ b/sys/fs/ext2fs/inode.h @@ -107,8 +107,13 @@ struct inode { uint32_t i_gen; /* Generation number. */ uint64_t i_facl; /* EA block number. */ uint32_t i_flags; /* Status flags (chflags). */ - uint32_t i_db[EXT2_NDADDR]; /* Direct disk blocks. */ - uint32_t i_ib[EXT2_NIADDR]; /* Indirect disk blocks. */ + union { + struct { + uint32_t i_db[EXT2_NDADDR]; /* Direct disk blocks. */ + uint32_t i_ib[EXT2_NIADDR]; /* Indirect disk blocks. */ + }; + uint32_t i_data[EXT2_NDADDR + EXT2_NIADDR]; + }; struct ext4_extent_cache i_ext_cache; /* cache for ext4 extent */ }; From 0bf94a089dbd5f215259aee174d6d1205e99b9c7 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Tue, 17 Oct 2017 21:13:26 +0000 Subject: [PATCH 142/219] embed_mfs: add error handling, usage Ensure that we are called with two arguments, and that the output file is writable. Also, if we cannot find the mfs section report the output file name rather than "kernel", as this script may be used with other than kernels. Sponsored by: The FreeBSD Foundation --- sys/tools/embed_mfs.sh | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/sys/tools/embed_mfs.sh b/sys/tools/embed_mfs.sh index a7ac80c8f8d3..780ad891ae06 100644 --- a/sys/tools/embed_mfs.sh +++ b/sys/tools/embed_mfs.sh @@ -32,13 +32,22 @@ # $2: MFS image filename # +if [ $# -ne 2 ]; then + echo "usage: $(basename $0) target mfs_image" + exit 0 +fi +if [ ! -w "$1" ]; then + echo $1 not writable + exit 1 +fi + mfs_size=`stat -f '%z' $2 2> /dev/null` # If we can't determine MFS image size - bail. [ -z ${mfs_size} ] && echo "Can't determine MFS image size" && exit 1 sec_info=`elfdump -c $1 2> /dev/null | grep -A 5 -E "sh_name: oldmfs$"` # If we can't find the mfs section within the given kernel - bail. -[ -z "${sec_info}" ] && echo "Can't locate mfs section within kernel" && exit 1 +[ -z "${sec_info}" ] && echo "Can't locate mfs section within $1" && exit 1 sec_size=`echo "${sec_info}" | awk '/sh_size/ {print $2}' 2> /dev/null` sec_start=`echo "${sec_info}" | awk '/sh_offset/ {print $2}' 2> /dev/null` From b0900232b95c055712852b2c70d9c94ebe6c1ec7 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Tue, 17 Oct 2017 23:38:27 +0000 Subject: [PATCH 143/219] Revert "Unify boot1 with loader" change r324646 Back out the unification commit to boot1. There's some issues on the arm and arm64 platforms that need to be addressed with code changes. There's also a discussion on arch@ about the future of boot1.efi vs just using loader.efi that needs to play out. So take a pause on these changes until the arm issues can be fixed and it's clear boot1.efi will survive into FreeBSD 12. OK'd by: Eric@meatspace --- sys/boot/efi/boot1/Makefile | 35 +- sys/boot/efi/boot1/boot1.c | 817 +++++++++------------ sys/boot/efi/boot1/boot_module.h | 109 +++ sys/boot/efi/boot1/ufs_module.c | 185 +++++ sys/boot/efi/boot1/zfs_module.c | 248 +++++++ sys/boot/efi/libefi/Makefile | 5 +- sys/boot/efi/loader/Makefile | 1 + sys/boot/efi/{libefi => loader}/efi_main.c | 0 8 files changed, 887 insertions(+), 513 deletions(-) create mode 100644 sys/boot/efi/boot1/boot_module.h create mode 100644 sys/boot/efi/boot1/ufs_module.c create mode 100644 sys/boot/efi/boot1/zfs_module.c rename sys/boot/efi/{libefi => loader}/efi_main.c (100%) diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index 2018e776a02e..15cea1eb4243 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -9,10 +9,7 @@ MK_FORTH= no PROG= boot1.sym INTERNALPROG= -WARNS?= 3 - -# Include bcache code. -HAVE_BCACHE= yes +WARNS?= 6 # We implement a slightly non-standard %S in that it always takes a # CHAR16 that's common in UEFI-land instead of a wchar_t. This only @@ -22,15 +19,13 @@ HAVE_BCACHE= yes CWARNFLAGS.boot1.c+= -Wno-format # Disable warnings that are currently incompatible with the zfs boot code -CWARNFLAGS.zfs.c += -Wno-incompatible-pointer-types-discards-qualifiers -CWARNFLAGS.zfs.c += -Wno-missing-variable-declarations -CWARNFLAGS.zfs.c += -Wno-array-bounds -CWARNFLAGS.zfs.c += -Wno-cast-align -CWARNFLAGS.zfs.c += -Wno-cast-qual -CWARNFLAGS.zfs.c += -Wno-missing-prototypes -CWARNFLAGS.zfs.c += -Wno-sign-compare -CWARNFLAGS.zfs.c += -Wno-unused-parameter -CWARNFLAGS.zfs.c += -Wno-unused-function +CWARNFLAGS.zfs_module.c += -Wno-array-bounds +CWARNFLAGS.zfs_module.c += -Wno-cast-align +CWARNFLAGS.zfs_module.c += -Wno-cast-qual +CWARNFLAGS.zfs_module.c += -Wno-missing-prototypes +CWARNFLAGS.zfs_module.c += -Wno-sign-compare +CWARNFLAGS.zfs_module.c += -Wno-unused-parameter +CWARNFLAGS.zfs_module.c += -Wno-unused-function CWARNFLAGS.skein.c += -Wno-cast-align .if ${COMPILER_TYPE} == "clang" CWARNFLAGS.skein.c += -Wno-missing-variable-declarations @@ -39,25 +34,19 @@ CWARNFLAGS.skein.c += -Wno-missing-declarations .endif # architecture-specific loader code -SRCS= boot1.c self_reloc.c start.S +SRCS= boot1.c self_reloc.c start.S ufs_module.c .if ${MK_ZFS} != "no" -.PATH: ${.CURDIR}/../../../crypto/skein +SRCS+= zfs_module.c SRCS+= skein.c skein_block.c # Do not unroll skein loops, reduce code size CFLAGS+= -DSKEIN_LOOP=111 -.PATH: ${.CURDIR}/../../zfs -SRCS+= zfs.c +.PATH: ${.CURDIR}/../../../crypto/skein .endif .if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} > 40201 CWARNFLAGS.self_reloc.c+= -Wno-error=maybe-uninitialized .endif -# Always add MI sources -.include "../../loader.mk" - -.PATH: ${.CURDIR}/arch/${MACHINE} - CFLAGS+= -I. CFLAGS+= -I${.CURDIR}/../include CFLAGS+= -I${.CURDIR}/../include/${MACHINE} @@ -129,7 +118,7 @@ boot1.efi: ${PROG} SOURCE_DATE_EPOCH=${SOURCE_DATE_EPOCH} \ ${OBJCOPY} -j .peheader -j .text -j .sdata -j .data \ -j .dynamic -j .dynsym -j .rel.dyn \ - -j .rela.dyn -j .reloc -j .eh_frame -j set_Xcommand_set \ + -j .rela.dyn -j .reloc -j .eh_frame \ --output-target=${EFI_TARGET} ${.ALLSRC} ${.TARGET} boot1.o: ${SASRC}/ufsread.c diff --git a/sys/boot/efi/boot1/boot1.c b/sys/boot/efi/boot1/boot1.c index df9a1dc9d7b5..e2152f52bc0e 100644 --- a/sys/boot/efi/boot1/boot1.c +++ b/sys/boot/efi/boot1/boot1.c @@ -23,179 +23,61 @@ __FBSDID("$FreeBSD$"); #include -#include #include #include #include -#include #include -#include -#include #include -#ifdef EFI_ZFS_BOOT -#include -#endif typedef CHAR16 efi_char; #include -#include - -#include "efi_drivers.h" -#include "efizfs.h" +#include "boot_module.h" #include "paths.h" static void efi_panic(EFI_STATUS s, const char *fmt, ...) __dead2 __printflike(2, 3); -#ifdef EFI_DEBUG -#define DPRINTF(fmt, args...) printf(fmt, ##args) -#define DSTALL(d) BS->Stall(d) -#else -#define DPRINTF(fmt, ...) {} -#define DSTALL(d) {} -#endif - -struct arch_switch archsw; /* MI/MD interface boundary */ - -static const efi_driver_t *efi_drivers[] = { - NULL -}; - -extern struct console efi_console; -#if defined(__amd64__) || defined(__i386__) -extern struct console comconsole; -extern struct console nullconsole; -#endif +static const boot_module_t *boot_modules[] = +{ #ifdef EFI_ZFS_BOOT -uint64_t pool_guid; + &zfs_module, #endif - -struct fs_ops *file_system[] = { -#ifdef EFI_ZFS_BOOT - &zfs_fsops, -#endif - &dosfs_fsops, #ifdef EFI_UFS_BOOT - &ufs_fsops, + &ufs_module #endif - &cd9660_fsops, - &nfs_fsops, - &gzipfs_fsops, - &bzipfs_fsops, - NULL }; -struct devsw *devsw[] = { - &efipart_hddev, - &efipart_fddev, - &efipart_cddev, -#ifdef EFI_ZFS_BOOT - &zfs_dev, -#endif - NULL -}; - -struct console *consoles[] = { - &efi_console, - NULL -}; - -static EFI_LOADED_IMAGE *boot_image; -static EFI_DEVICE_PATH *imgpath; -static EFI_DEVICE_PATH *imgprefix; - -/* Definitions we don't actually need for boot, but we need to define - * to make the linker happy. - */ -struct file_format *file_formats[] = { NULL }; - -struct netif_driver *netif_drivers[] = { NULL }; - -static int -efi_autoload(void) -{ - printf("******** Boot block should not call autoload\n"); - return (-1); -} - -static ssize_t -efi_copyin(const void *src __unused, vm_offset_t dest __unused, - const size_t len __unused) -{ - printf("******** Boot block should not call copyin\n"); - return (-1); -} - -static ssize_t -efi_copyout(vm_offset_t src __unused, void *dest __unused, - const size_t len __unused) -{ - printf("******** Boot block should not call copyout\n"); - return (-1); -} - -static ssize_t -efi_readin(int fd __unused, vm_offset_t dest __unused, - const size_t len __unused) -{ - printf("******** Boot block should not call readin\n"); - return (-1); -} - +#define NUM_BOOT_MODULES nitems(boot_modules) /* The initial number of handles used to query EFI for partitions. */ #define NUM_HANDLES_INIT 24 +static EFI_GUID BlockIoProtocolGUID = BLOCK_IO_PROTOCOL; static EFI_GUID DevicePathGUID = DEVICE_PATH_PROTOCOL; static EFI_GUID LoadedImageGUID = LOADED_IMAGE_PROTOCOL; +static EFI_GUID ConsoleControlGUID = EFI_CONSOLE_CONTROL_PROTOCOL_GUID; static EFI_GUID FreeBSDBootVarGUID = FREEBSD_BOOT_VAR_GUID; -static EFI_STATUS -do_load(const char *filepath, void **bufp, size_t *bufsize) +/* + * Provide Malloc / Free backed by EFIs AllocatePool / FreePool which ensures + * memory is correctly aligned avoiding EFI_INVALID_PARAMETER returns from + * EFI methods. + */ +void * +Malloc(size_t len, const char *file __unused, int line __unused) { - struct stat st; - void *buf = NULL; - int fd, err; - size_t fsize, remaining; - ssize_t readsize; + void *out; - if ((fd = open(filepath, O_RDONLY)) < 0) { - return (ENOTSUP); - } + if (BS->AllocatePool(EfiLoaderData, len, &out) == EFI_SUCCESS) + return (out); - if ((err = fstat(fd, &st)) != 0) { - goto close_file; - } + return (NULL); +} - fsize = st.st_size; - - if ((buf = malloc(fsize)) == NULL) { - err = ENOMEM; - goto close_file; - } - - remaining = fsize; - - do { - if ((readsize = read(fd, buf, fsize)) < 0) { - err = (-readsize); - goto free_buf; - } - - remaining -= readsize; - } while(remaining != 0); - - close(fd); - *bufsize = st.st_size; - *bufp = buf; - - close_file: - close(fd); - - return errno_to_efi_status(err); - - free_buf: - free(buf); - goto close_file; +void +Free(void *buf, const char *file __unused, int line __unused) +{ + if (buf != NULL) + (void)BS->FreePool(buf); } static EFI_STATUS @@ -215,274 +97,97 @@ efi_setenv_freebsd_wcs(const char *varname, CHAR16 *valstr) return (rv); } -static int -probe_fs(const char *filepath) +/* + * nodes_match returns TRUE if the imgpath isn't NULL and the nodes match, + * FALSE otherwise. + */ +static BOOLEAN +nodes_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath) { - int fd; + size_t len; - if ((fd = open(filepath, O_RDONLY)) < 0) { - return (ENOTSUP); - } + if (imgpath == NULL || imgpath->Type != devpath->Type || + imgpath->SubType != devpath->SubType) + return (FALSE); - close(fd); + len = DevicePathNodeLength(imgpath); + if (len != DevicePathNodeLength(devpath)) + return (FALSE); - return (0); + return (memcmp(imgpath, devpath, (size_t)len) == 0); } -static int -probe_dev(struct devsw *dev, int unit, const char *filepath) +/* + * device_paths_match returns TRUE if the imgpath isn't NULL and all nodes + * in imgpath and devpath match up to their respective occurrences of a + * media node, FALSE otherwise. + */ +static BOOLEAN +device_paths_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath) { - struct devdesc currdev; - char *devname; - int err; - currdev.d_dev = dev; - currdev.d_type = currdev.d_dev->dv_type; - currdev.d_unit = unit; - currdev.d_opendata = NULL; - devname = efi_fmtdev(&currdev); + if (imgpath == NULL) + return (FALSE); - env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, - env_nounset); + while (!IsDevicePathEnd(imgpath) && !IsDevicePathEnd(devpath)) { + if (IsDevicePathType(imgpath, MEDIA_DEVICE_PATH) && + IsDevicePathType(devpath, MEDIA_DEVICE_PATH)) + return (TRUE); - err = probe_fs(filepath); + if (!nodes_match(imgpath, devpath)) + return (FALSE); - return (err); + imgpath = NextDevicePathNode(imgpath); + devpath = NextDevicePathNode(devpath); + } + + return (FALSE); } -static bool -check_preferred(EFI_HANDLE *h) +/* + * devpath_last returns the last non-path end node in devpath. + */ +static EFI_DEVICE_PATH * +devpath_last(EFI_DEVICE_PATH *devpath) { - EFI_DEVICE_PATH *path = efi_lookup_devpath(h); - bool out; - if ((path = efi_lookup_devpath(h)) == NULL) - return (false); + while (!IsDevicePathEnd(NextDevicePathNode(devpath))) + devpath = NextDevicePathNode(devpath); - out = efi_devpath_is_prefix(imgpath, path) || - efi_devpath_is_prefix(imgprefix, path); - - return (out); -} - -bool -efi_zfs_is_preferred(EFI_HANDLE *h) -{ - return (check_preferred(h)); -} - -static int -load_preferred(EFI_LOADED_IMAGE *img, const char *filepath, void **bufp, - size_t *bufsize, EFI_HANDLE *handlep) -{ - pdinfo_list_t *pdi_list; - pdinfo_t *dp, *pp; - char *devname; - -#ifdef EFI_ZFS_BOOT - /* Did efi_zfs_probe() detect the boot pool? */ - if (pool_guid != 0) { - struct zfs_devdesc currdev; - - currdev.d_dev = &zfs_dev; - currdev.d_unit = 0; - currdev.d_type = currdev.d_dev->dv_type; - currdev.d_opendata = NULL; - currdev.pool_guid = pool_guid; - currdev.root_guid = 0; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, - env_nounset); - - if (probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = efizfs_get_handle_by_guid(pool_guid); - return (0); - } - } -#endif /* EFI_ZFS_BOOT */ - - /* We have device lists for hd, cd, fd, walk them all. */ - pdi_list = efiblk_get_pdinfo_list(&efipart_hddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - struct disk_devdesc currdev; - - currdev.d_dev = &efipart_hddev; - currdev.d_type = currdev.d_dev->dv_type; - currdev.d_unit = dp->pd_unit; - currdev.d_opendata = NULL; - currdev.d_slice = -1; - currdev.d_partition = -1; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, - env_nounset); - - if (check_preferred(dp->pd_handle) && - probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - return (0); - } - - /* Assuming GPT partitioning. */ - STAILQ_FOREACH(pp, &dp->pd_part, pd_link) { - if (check_preferred(pp->pd_handle)) { - currdev.d_slice = pp->pd_unit; - currdev.d_partition = 255; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, - efi_setcurrdev, env_nounset); - - if (probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == - EFI_SUCCESS) { - *handlep = pp->pd_handle; - return (0); - } - } - } - } - - pdi_list = efiblk_get_pdinfo_list(&efipart_cddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - if ((dp->pd_handle == img->DeviceHandle || - dp->pd_alias == img->DeviceHandle || - check_preferred(dp->pd_handle)) && - probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - return (0); - } - } - - pdi_list = efiblk_get_pdinfo_list(&efipart_fddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - if ((dp->pd_handle == img->DeviceHandle || - check_preferred(dp->pd_handle)) && - probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - return (0); - } - } - - return (ENOENT); -} - -static int -load_all(const char *filepath, void **bufp, size_t *bufsize, - EFI_HANDLE *handlep) -{ - pdinfo_list_t *pdi_list; - pdinfo_t *dp, *pp; - zfsinfo_list_t *zfsi_list; - zfsinfo_t *zi; - char *devname; - -#ifdef EFI_ZFS_BOOT - zfsi_list = efizfs_get_zfsinfo_list(); - STAILQ_FOREACH(zi, zfsi_list, zi_link) { - struct zfs_devdesc currdev; - - currdev.d_dev = &zfs_dev; - currdev.d_unit = 0; - currdev.d_type = currdev.d_dev->dv_type; - currdev.d_opendata = NULL; - currdev.pool_guid = zi->zi_pool_guid; - currdev.root_guid = 0; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, - env_nounset); - - if (probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = zi->zi_handle; - - return (0); - } - } -#endif /* EFI_ZFS_BOOT */ - - /* We have device lists for hd, cd, fd, walk them all. */ - pdi_list = efiblk_get_pdinfo_list(&efipart_hddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - struct disk_devdesc currdev; - - currdev.d_dev = &efipart_hddev; - currdev.d_type = currdev.d_dev->dv_type; - currdev.d_unit = dp->pd_unit; - currdev.d_opendata = NULL; - currdev.d_slice = -1; - currdev.d_partition = -1; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, efi_setcurrdev, - env_nounset); - - if (probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - - return (0); - } - - /* Assuming GPT partitioning. */ - STAILQ_FOREACH(pp, &dp->pd_part, pd_link) { - currdev.d_slice = pp->pd_unit; - currdev.d_partition = 255; - devname = efi_fmtdev(&currdev); - - env_setenv("currdev", EV_VOLATILE, devname, - efi_setcurrdev, env_nounset); - - if (probe_fs(filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = pp->pd_handle; - - return (0); - } - } - } - - pdi_list = efiblk_get_pdinfo_list(&efipart_cddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - if (probe_dev(&efipart_cddev, dp->pd_unit, filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - - return (0); - } - } - - pdi_list = efiblk_get_pdinfo_list(&efipart_fddev); - STAILQ_FOREACH(dp, pdi_list, pd_link) { - if (probe_dev(&efipart_fddev, dp->pd_unit, filepath) == 0 && - do_load(filepath, bufp, bufsize) == EFI_SUCCESS) { - *handlep = dp->pd_handle; - - return (0); - } - } - - return (ENOENT); + return (devpath); } +/* + * load_loader attempts to load the loader image data. + * + * It tries each module and its respective devices, identified by mod->probe, + * in order until a successful load occurs at which point it returns EFI_SUCCESS + * and EFI_NOT_FOUND otherwise. + * + * Only devices which have preferred matching the preferred parameter are tried. + */ static EFI_STATUS -load_loader(EFI_HANDLE *handlep, void **bufp, size_t *bufsize) +load_loader(const boot_module_t **modp, dev_info_t **devinfop, void **bufp, + size_t *bufsize, BOOLEAN preferred) { - /* Try the preferred handles first, then all the handles */ - if (load_preferred(boot_image, PATH_LOADER_EFI, bufp, bufsize, - handlep) == 0) { - return (0); - } + UINTN i; + dev_info_t *dev; + const boot_module_t *mod; - if (load_all(PATH_LOADER_EFI, bufp, bufsize, handlep) == 0) { - return (0); - } + for (i = 0; i < NUM_BOOT_MODULES; i++) { + mod = boot_modules[i]; + for (dev = mod->devices(); dev != NULL; dev = dev->next) { + if (dev->preferred != preferred) + continue; + + if (mod->load(PATH_LOADER_EFI, dev, bufp, bufsize) == + EFI_SUCCESS) { + *devinfop = dev; + *modp = mod; + return (EFI_SUCCESS); + } + } + } return (EFI_NOT_FOUND); } @@ -497,27 +202,20 @@ try_boot(void) size_t bufsize, loadersize, cmdsize; void *buf, *loaderbuf; char *cmd; - EFI_HANDLE fshandle; + dev_info_t *dev; + const boot_module_t *mod; EFI_HANDLE loaderhandle; EFI_LOADED_IMAGE *loaded_image; EFI_STATUS status; - EFI_DEVICE_PATH *fspath; - status = load_loader(&fshandle, &loaderbuf, &loadersize); - - if (status != EFI_SUCCESS) { - return (status); - } - - fspath = NULL; - if (status == EFI_SUCCESS) { - status = BS->OpenProtocol(fshandle, &DevicePathGUID, - (void **)&fspath, IH, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); + status = load_loader(&mod, &dev, &loaderbuf, &loadersize, TRUE); + if (status != EFI_SUCCESS) { + status = load_loader(&mod, &dev, &loaderbuf, &loadersize, + FALSE); if (status != EFI_SUCCESS) { - DPRINTF("Failed to get image DevicePath (%lu)\n", - EFI_ERROR_CODE(status)); - } - DPRINTF("filesystem device path: %s\n", devpath_str(fspath)); + printf("Failed to load '%s'\n", PATH_LOADER_EFI); + return (status); + } } /* @@ -532,9 +230,9 @@ try_boot(void) */ cmd = NULL; cmdsize = 0; - status = do_load(PATH_DOTCONFIG, &buf, &bufsize); + status = mod->load(PATH_DOTCONFIG, dev, &buf, &bufsize); if (status == EFI_NOT_FOUND) - status = do_load(PATH_CONFIG, &buf, &bufsize); + status = mod->load(PATH_CONFIG, dev, &buf, &bufsize); if (status == EFI_SUCCESS) { cmdsize = bufsize + 1; cmd = malloc(cmdsize); @@ -546,25 +244,24 @@ try_boot(void) buf = NULL; } - if ((status = BS->LoadImage(TRUE, IH, efi_devpath_last_node(fspath), + if ((status = BS->LoadImage(TRUE, IH, devpath_last(dev->devpath), loaderbuf, loadersize, &loaderhandle)) != EFI_SUCCESS) { - printf("Failed to load image, size: %zu, (%lu)\n", - loadersize, EFI_ERROR_CODE(status)); + printf("Failed to load image provided by %s, size: %zu, (%lu)\n", + mod->name, loadersize, EFI_ERROR_CODE(status)); goto errout; } - if ((status = BS->OpenProtocol(loaderhandle, &LoadedImageGUID, - (VOID**)&loaded_image, IH, NULL, - EFI_OPEN_PROTOCOL_GET_PROTOCOL)) != EFI_SUCCESS) { - printf("Failed to query LoadedImage (%lu)\n", - EFI_ERROR_CODE(status)); + if ((status = BS->HandleProtocol(loaderhandle, &LoadedImageGUID, + (VOID**)&loaded_image)) != EFI_SUCCESS) { + printf("Failed to query LoadedImage provided by %s (%lu)\n", + mod->name, EFI_ERROR_CODE(status)); goto errout; } if (cmd != NULL) printf(" command args: %s\n", cmd); - loaded_image->DeviceHandle = fshandle; + loaded_image->DeviceHandle = dev->devhandle; loaded_image->LoadOptionsSize = cmdsize; loaded_image->LoadOptions = cmd; @@ -582,8 +279,8 @@ try_boot(void) if ((status = BS->StartImage(loaderhandle, NULL, NULL)) != EFI_SUCCESS) { - printf("Failed to start image (%lu)\n", - EFI_ERROR_CODE(status)); + printf("Failed to start image provided by %s (%lu)\n", + mod->name, EFI_ERROR_CODE(status)); loaded_image->LoadOptionsSize = 0; loaded_image->LoadOptions = NULL; } @@ -599,37 +296,142 @@ try_boot(void) return (status); } -EFI_STATUS -main(int argc __unused, CHAR16 *argv[] __unused) +/* + * probe_handle determines if the passed handle represents a logical partition + * if it does it uses each module in order to probe it and if successful it + * returns EFI_SUCCESS. + */ +static EFI_STATUS +probe_handle(EFI_HANDLE h, EFI_DEVICE_PATH *imgpath, BOOLEAN *preferred) { - EFI_STATUS status; + dev_info_t *devinfo; + EFI_BLOCK_IO *blkio; + EFI_DEVICE_PATH *devpath; + EFI_STATUS status; + UINTN i; - SIMPLE_TEXT_OUTPUT_INTERFACE *conout = NULL; - UINTN i, max_dim, best_mode, cols, rows; - CHAR16 *text; + /* Figure out if we're dealing with an actual partition. */ + status = BS->HandleProtocol(h, &DevicePathGUID, (void **)&devpath); + if (status == EFI_UNSUPPORTED) + return (status); - archsw.arch_autoload = efi_autoload; - archsw.arch_getdev = efi_getdev; - archsw.arch_copyin = efi_copyin; - archsw.arch_copyout = efi_copyout; - archsw.arch_readin = efi_readin; -#ifdef EFI_ZFS_BOOT - /* Note this needs to be set before ZFS init. */ - archsw.arch_zfs_probe = efi_zfs_probe; + if (status != EFI_SUCCESS) { + DPRINTF("\nFailed to query DevicePath (%lu)\n", + EFI_ERROR_CODE(status)); + return (status); + } +#ifdef EFI_DEBUG + { + CHAR16 *text = efi_devpath_name(devpath); + DPRINTF("probing: %S\n", text); + efi_free_devpath_name(text); + } #endif + status = BS->HandleProtocol(h, &BlockIoProtocolGUID, (void **)&blkio); + if (status == EFI_UNSUPPORTED) + return (status); - /* Init the time source */ - efi_time_init(); - cons_probe(); + if (status != EFI_SUCCESS) { + DPRINTF("\nFailed to query BlockIoProtocol (%lu)\n", + EFI_ERROR_CODE(status)); + return (status); + } + if (!blkio->Media->LogicalPartition) + return (EFI_UNSUPPORTED); + + *preferred = device_paths_match(imgpath, devpath); + + /* Run through each module, see if it can load this partition */ + for (i = 0; i < NUM_BOOT_MODULES; i++) { + devinfo = malloc(sizeof(*devinfo)); + if (devinfo == NULL) { + DPRINTF("\nFailed to allocate devinfo\n"); + continue; + } + devinfo->dev = blkio; + devinfo->devpath = devpath; + devinfo->devhandle = h; + devinfo->devdata = NULL; + devinfo->preferred = *preferred; + devinfo->next = NULL; + + status = boot_modules[i]->probe(devinfo); + if (status == EFI_SUCCESS) + return (EFI_SUCCESS); + free(devinfo); + } + + return (EFI_UNSUPPORTED); +} + +/* + * probe_handle_status calls probe_handle and outputs the returned status + * of the call. + */ +static void +probe_handle_status(EFI_HANDLE h, EFI_DEVICE_PATH *imgpath) +{ + EFI_STATUS status; + BOOLEAN preferred; + + preferred = FALSE; + status = probe_handle(h, imgpath, &preferred); + + DPRINTF("probe: "); + switch (status) { + case EFI_UNSUPPORTED: + printf("."); + DPRINTF(" not supported\n"); + break; + case EFI_SUCCESS: + if (preferred) { + printf("%c", '*'); + DPRINTF(" supported (preferred)\n"); + } else { + printf("%c", '+'); + DPRINTF(" supported\n"); + } + break; + default: + printf("x"); + DPRINTF(" error (%lu)\n", EFI_ERROR_CODE(status)); + break; + } + DSTALL(500000); +} + +EFI_STATUS +efi_main(EFI_HANDLE Ximage, EFI_SYSTEM_TABLE *Xsystab) +{ + EFI_HANDLE *handles; + EFI_LOADED_IMAGE *img; + EFI_DEVICE_PATH *imgpath; + EFI_STATUS status; + EFI_CONSOLE_CONTROL_PROTOCOL *ConsoleControl = NULL; + SIMPLE_TEXT_OUTPUT_INTERFACE *conout = NULL; + UINTN i, max_dim, best_mode, cols, rows, hsize, nhandles; + CHAR16 *text; + + /* Basic initialization*/ + ST = Xsystab; + IH = Ximage; + BS = ST->BootServices; + RS = ST->RuntimeServices; + + /* Set up the console, so printf works. */ + status = BS->LocateProtocol(&ConsoleControlGUID, NULL, + (VOID **)&ConsoleControl); + if (status == EFI_SUCCESS) + (void)ConsoleControl->SetMode(ConsoleControl, + EfiConsoleControlScreenText); /* * Reset the console and find the best text mode. */ conout = ST->ConOut; conout->Reset(conout, TRUE); max_dim = best_mode = 0; - - for (i = 0; ; i++) { + for (i = 0; ; i++) { status = conout->QueryMode(conout, i, &cols, &rows); if (EFI_ERROR(status)) break; @@ -638,37 +440,31 @@ main(int argc __unused, CHAR16 *argv[] __unused) best_mode = i; } } - - if (max_dim > 0) + if (max_dim > 0) conout->SetMode(conout, best_mode); - conout->EnableCursor(conout, TRUE); conout->ClearScreen(conout); - /* Print this here, so people know it's at least starting. */ printf("\n>> FreeBSD EFI boot block\n"); printf(" Loader path: %s\n\n", PATH_LOADER_EFI); - - /* Get the image path and trim it to get the disk on which we - * found this loader. - */ - if ((status = BS->OpenProtocol(IH, &LoadedImageGUID, - (VOID**)&boot_image, IH, NULL, - EFI_OPEN_PROTOCOL_GET_PROTOCOL)) != EFI_SUCCESS) { - panic("Failed to query LoadedImage (%lu)\n", - EFI_ERROR_CODE(status)); + printf(" Initializing modules:"); + for (i = 0; i < NUM_BOOT_MODULES; i++) { + printf(" %s", boot_modules[i]->name); + if (boot_modules[i]->init != NULL) + boot_modules[i]->init(); } + putchar('\n'); /* Determine the devpath of our image so we can prefer it. */ - status = BS->HandleProtocol(IH, &LoadedImageGUID, (VOID**)&boot_image); + status = BS->HandleProtocol(IH, &LoadedImageGUID, (VOID**)&img); imgpath = NULL; if (status == EFI_SUCCESS) { - text = efi_devpath_name(boot_image->FilePath); + text = efi_devpath_name(img->FilePath); printf(" Load Path: %S\n", text); efi_setenv_freebsd_wcs("Boot1Path", text); efi_free_devpath_name(text); - status = BS->HandleProtocol(boot_image->DeviceHandle, &DevicePathGUID, + status = BS->HandleProtocol(img->DeviceHandle, &DevicePathGUID, (void **)&imgpath); if (status != EFI_SUCCESS) { DPRINTF("Failed to get image DevicePath (%lu)\n", @@ -682,35 +478,48 @@ main(int argc __unused, CHAR16 *argv[] __unused) } - /* The loaded image device path ends with a partition, then a - * file path. Trim them both to get the actual disk. - */ - if ((imgprefix = efi_devpath_trim(imgpath)) == NULL || - (imgprefix = efi_devpath_trim(imgprefix)) == NULL) { - panic("Couldn't trim device path"); - } - - /* - * Initialize the block cache. Set the upper limit. - */ - bcache_init(32768, 512); - - printf("\n Initializing modules:"); - - for (i = 0; efi_drivers[i] != NULL; i++) { - printf(" %s", efi_drivers[i]->name); - if (efi_drivers[i]->init != NULL) - efi_drivers[i]->init(); + /* Get all the device handles */ + hsize = (UINTN)NUM_HANDLES_INIT * sizeof(EFI_HANDLE); + handles = malloc(hsize); + if (handles == NULL) { + printf("Failed to allocate %d handles\n", NUM_HANDLES_INIT); } - for (i = 0; devsw[i] != NULL; i++) { - if (devsw[i]->dv_init != NULL) { - printf(" %s", devsw[i]->dv_name); - (devsw[i]->dv_init)(); - } - } + status = BS->LocateHandle(ByProtocol, &BlockIoProtocolGUID, NULL, + &hsize, handles); + switch (status) { + case EFI_SUCCESS: + break; + case EFI_BUFFER_TOO_SMALL: + free(handles); + handles = malloc(hsize); + if (handles == NULL) + efi_panic(EFI_OUT_OF_RESOURCES, "Failed to allocate %d handles\n", + NUM_HANDLES_INIT); + status = BS->LocateHandle(ByProtocol, &BlockIoProtocolGUID, + NULL, &hsize, handles); + if (status != EFI_SUCCESS) + efi_panic(status, "Failed to get device handles\n"); + break; + default: + efi_panic(status, "Failed to get device handles\n"); + break; + } - putchar('\n'); + /* Scan all partitions, probing with all modules. */ + nhandles = hsize / sizeof(*handles); + printf(" Probing %zu block devices...", nhandles); + DPRINTF("\n"); + + for (i = 0; i < nhandles; i++) + probe_handle_status(handles[i], imgpath); + printf(" done\n"); + + /* Status summary. */ + for (i = 0; i < NUM_BOOT_MODULES; i++) { + printf(" "); + boot_modules[i]->status(); + } try_boot(); @@ -718,6 +527,25 @@ main(int argc __unused, CHAR16 *argv[] __unused) efi_panic(EFI_LOAD_ERROR, "No bootable partitions found!"); } +/* + * add_device adds a device to the passed devinfo list. + */ +void +add_device(dev_info_t **devinfop, dev_info_t *devinfo) +{ + dev_info_t *dev; + + if (*devinfop == NULL) { + *devinfop = devinfo; + return; + } + + for (dev = *devinfop; dev->next != NULL; dev = dev->next) + ; + + dev->next = devinfo; +} + /* * OK. We totally give up. Exit back to EFI with a sensible status so * it can try the next option on the list. @@ -725,13 +553,28 @@ main(int argc __unused, CHAR16 *argv[] __unused) static void efi_panic(EFI_STATUS s, const char *fmt, ...) { - va_list ap; + va_list ap; - printf("panic: "); - va_start(ap, fmt); - vprintf(fmt, ap); - va_end(ap); - printf("\n"); + printf("panic: "); + va_start(ap, fmt); + vprintf(fmt, ap); + va_end(ap); + printf("\n"); - BS->Exit(IH, s, 0, NULL); + BS->Exit(IH, s, 0, NULL); +} + +void +putchar(int c) +{ + CHAR16 buf[2]; + + if (c == '\n') { + buf[0] = '\r'; + buf[1] = 0; + ST->ConOut->OutputString(ST->ConOut, buf); + } + buf[0] = c; + buf[1] = 0; + ST->ConOut->OutputString(ST->ConOut, buf); } diff --git a/sys/boot/efi/boot1/boot_module.h b/sys/boot/efi/boot1/boot_module.h new file mode 100644 index 000000000000..bfade34fe9cb --- /dev/null +++ b/sys/boot/efi/boot1/boot_module.h @@ -0,0 +1,109 @@ +/*- + * Copyright (c) 2015 Eric McCorkle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _BOOT_MODULE_H_ +#define _BOOT_MODULE_H_ + +#include + +#include +#include +#include + +#ifdef EFI_DEBUG +#define DPRINTF(fmt, args...) printf(fmt, ##args) +#define DSTALL(d) BS->Stall(d) +#else +#define DPRINTF(fmt, ...) {} +#define DSTALL(d) {} +#endif + +/* EFI device info */ +typedef struct dev_info +{ + EFI_BLOCK_IO *dev; + EFI_DEVICE_PATH *devpath; + EFI_HANDLE *devhandle; + void *devdata; + BOOLEAN preferred; + struct dev_info *next; +} dev_info_t; + +/* + * A boot loader module. + * + * This is a standard interface for filesystem modules in the EFI system. + */ +typedef struct boot_module_t +{ + const char *name; + + /* init is the optional initialiser for the module. */ + void (*init)(void); + + /* + * probe checks to see if the module can handle dev. + * + * Return codes: + * EFI_SUCCESS = The module can handle the device. + * EFI_NOT_FOUND = The module can not handle the device. + * Other = The module encountered an error. + */ + EFI_STATUS (*probe)(dev_info_t* dev); + + /* + * load should select the best out of a set of devices that probe + * indicated were loadable and load the specified file. + * + * Return codes: + * EFI_SUCCESS = The module can handle the device. + * EFI_NOT_FOUND = The module can not handle the device. + * Other = The module encountered an error. + */ + EFI_STATUS (*load)(const char *filepath, dev_info_t *devinfo, + void **buf, size_t *bufsize); + + /* status outputs information about the probed devices. */ + void (*status)(void); + + /* valid devices as found by probe. */ + dev_info_t *(*devices)(void); +} boot_module_t; + +/* Standard boot modules. */ +#ifdef EFI_UFS_BOOT +extern const boot_module_t ufs_module; +#endif +#ifdef EFI_ZFS_BOOT +extern const boot_module_t zfs_module; +#endif + +/* Functions available to modules. */ +extern void add_device(dev_info_t **devinfop, dev_info_t *devinfo); +extern int vsnprintf(char *str, size_t sz, const char *fmt, va_list ap); +#endif diff --git a/sys/boot/efi/boot1/ufs_module.c b/sys/boot/efi/boot1/ufs_module.c new file mode 100644 index 000000000000..4a8016fad2ce --- /dev/null +++ b/sys/boot/efi/boot1/ufs_module.c @@ -0,0 +1,185 @@ +/*- + * Copyright (c) 1998 Robert Nordier + * All rights reserved. + * Copyright (c) 2001 Robert Drehmel + * All rights reserved. + * Copyright (c) 2014 Nathan Whitehorn + * All rights reserved. + * Copyright (c) 2015 Eric McCorkle + * All rights reverved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include +#include +#include +#include + +#include "boot_module.h" + +static dev_info_t *devinfo; +static dev_info_t *devices; + +static int +dskread(void *buf, u_int64_t lba, int nblk) +{ + int size; + EFI_STATUS status; + + lba = lba / (devinfo->dev->Media->BlockSize / DEV_BSIZE); + size = nblk * DEV_BSIZE; + + status = devinfo->dev->ReadBlocks(devinfo->dev, + devinfo->dev->Media->MediaId, lba, size, buf); + + if (status != EFI_SUCCESS) { + DPRINTF("dskread: failed dev: %p, id: %u, lba: %ju, size: %d, " + "status: %lu\n", devinfo->dev, + devinfo->dev->Media->MediaId, (uintmax_t)lba, size, + EFI_ERROR_CODE(status)); + return (-1); + } + + return (0); +} + +#include "ufsread.c" + +static struct dmadat __dmadat; + +static int +init_dev(dev_info_t* dev) +{ + + devinfo = dev; + dmadat = &__dmadat; + + return fsread(0, NULL, 0); +} + +static EFI_STATUS +probe(dev_info_t* dev) +{ + + if (init_dev(dev) < 0) + return (EFI_UNSUPPORTED); + + add_device(&devices, dev); + + return (EFI_SUCCESS); +} + +static EFI_STATUS +load(const char *filepath, dev_info_t *dev, void **bufp, size_t *bufsize) +{ + ufs_ino_t ino; + EFI_STATUS status; + size_t size; + ssize_t read; + void *buf; + +#ifdef EFI_DEBUG + { + CHAR16 *text = efi_devpath_name(dev->devpath); + DPRINTF("Loading '%s' from %S\n", filepath, text); + efi_free_devpath_name(text); + } +#endif + if (init_dev(dev) < 0) { + DPRINTF("Failed to init device\n"); + return (EFI_UNSUPPORTED); + } + + if ((ino = lookup(filepath)) == 0) { + DPRINTF("Failed to lookup '%s' (file not found?)\n", filepath); + return (EFI_NOT_FOUND); + } + + if (fsread_size(ino, NULL, 0, &size) < 0 || size <= 0) { + printf("Failed to read size of '%s' ino: %d\n", filepath, ino); + return (EFI_INVALID_PARAMETER); + } + + if ((status = BS->AllocatePool(EfiLoaderData, size, &buf)) != + EFI_SUCCESS) { + printf("Failed to allocate read buffer %zu for '%s' (%lu)\n", + size, filepath, EFI_ERROR_CODE(status)); + return (status); + } + + read = fsread(ino, buf, size); + if ((size_t)read != size) { + printf("Failed to read '%s' (%zd != %zu)\n", filepath, read, + size); + (void)BS->FreePool(buf); + return (EFI_INVALID_PARAMETER); + } + + DPRINTF("Load complete\n"); + + *bufp = buf; + *bufsize = size; + + return (EFI_SUCCESS); +} + +static void +status(void) +{ + int i; + dev_info_t *dev; + + for (dev = devices, i = 0; dev != NULL; dev = dev->next, i++) + ; + + printf("%s found ", ufs_module.name); + switch (i) { + case 0: + printf("no partitions\n"); + break; + case 1: + printf("%d partition\n", i); + break; + default: + printf("%d partitions\n", i); + } +} + +static dev_info_t * +_devices(void) +{ + + return (devices); +} + +const boot_module_t ufs_module = +{ + .name = "UFS", + .probe = probe, + .load = load, + .status = status, + .devices = _devices +}; diff --git a/sys/boot/efi/boot1/zfs_module.c b/sys/boot/efi/boot1/zfs_module.c new file mode 100644 index 000000000000..e1d1a5a35f17 --- /dev/null +++ b/sys/boot/efi/boot1/zfs_module.c @@ -0,0 +1,248 @@ +/*- + * Copyright (c) 2015 Eric McCorkle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +#include +#include +#include +#include +#include +#include + +#include "boot_module.h" + +#include "libzfs.h" +#include "zfsimpl.c" + +static dev_info_t *devices; + +uint64_t +ldi_get_size(void *priv) +{ + dev_info_t *devinfo = priv; + + return (devinfo->dev->Media->BlockSize * + (devinfo->dev->Media->LastBlock + 1)); +} + +static int +vdev_read(vdev_t *vdev, void *priv, off_t off, void *buf, size_t bytes) +{ + dev_info_t *devinfo; + uint64_t lba; + size_t size, remainder, rb_size, blksz; + char *bouncebuf = NULL, *rb_buf; + EFI_STATUS status; + + devinfo = (dev_info_t *)priv; + lba = off / devinfo->dev->Media->BlockSize; + remainder = off % devinfo->dev->Media->BlockSize; + + rb_buf = buf; + rb_size = bytes; + + /* + * If we have remainder from off, we need to add remainder part. + * Since buffer must be multiple of the BlockSize, round it all up. + */ + size = roundup2(bytes + remainder, devinfo->dev->Media->BlockSize); + blksz = size; + if (remainder != 0 || size != bytes) { + rb_size = devinfo->dev->Media->BlockSize; + bouncebuf = malloc(rb_size); + if (bouncebuf == NULL) { + printf("vdev_read: out of memory\n"); + return (-1); + } + rb_buf = bouncebuf; + blksz = rb_size - remainder; + } + + while (bytes > 0) { + status = devinfo->dev->ReadBlocks(devinfo->dev, + devinfo->dev->Media->MediaId, lba, rb_size, rb_buf); + if (EFI_ERROR(status)) + goto error; + if (bytes < blksz) + blksz = bytes; + if (bouncebuf != NULL) + memcpy(buf, rb_buf + remainder, blksz); + buf = (void *)((uintptr_t)buf + blksz); + bytes -= blksz; + lba++; + remainder = 0; + blksz = rb_size; + } + + free(bouncebuf); + return (0); + +error: + free(bouncebuf); + DPRINTF("vdev_read: failed dev: %p, id: %u, lba: %ju, size: %zu," + " rb_size: %zu, status: %lu\n", devinfo->dev, + devinfo->dev->Media->MediaId, (uintmax_t)lba, bytes, rb_size, + EFI_ERROR_CODE(status)); + return (-1); +} + +static EFI_STATUS +probe(dev_info_t *dev) +{ + spa_t *spa; + dev_info_t *tdev; + EFI_STATUS status; + + /* ZFS consumes the dev on success so we need a copy. */ + if ((status = BS->AllocatePool(EfiLoaderData, sizeof(*dev), + (void**)&tdev)) != EFI_SUCCESS) { + DPRINTF("Failed to allocate tdev (%lu)\n", + EFI_ERROR_CODE(status)); + return (status); + } + memcpy(tdev, dev, sizeof(*dev)); + + if (vdev_probe(vdev_read, tdev, &spa) != 0) { + (void)BS->FreePool(tdev); + return (EFI_UNSUPPORTED); + } + + dev->devdata = spa; + add_device(&devices, dev); + + return (EFI_SUCCESS); +} + +static EFI_STATUS +load(const char *filepath, dev_info_t *devinfo, void **bufp, size_t *bufsize) +{ + spa_t *spa; + struct zfsmount zfsmount; + dnode_phys_t dn; + struct stat st; + int err; + void *buf; + EFI_STATUS status; + + spa = devinfo->devdata; + +#ifdef EFI_DEBUG + { + CHAR16 *text = efi_devpath_name(devinfo->devpath); + DPRINTF("load: '%s' spa: '%s', devpath: %S\n", filepath, + spa->spa_name, text); + efi_free_devpath_name(text); + } +#endif + if ((err = zfs_spa_init(spa)) != 0) { + DPRINTF("Failed to load pool '%s' (%d)\n", spa->spa_name, err); + return (EFI_NOT_FOUND); + } + + if ((err = zfs_mount(spa, 0, &zfsmount)) != 0) { + DPRINTF("Failed to mount pool '%s' (%d)\n", spa->spa_name, err); + return (EFI_NOT_FOUND); + } + + if ((err = zfs_lookup(&zfsmount, filepath, &dn)) != 0) { + if (err == ENOENT) { + DPRINTF("Failed to find '%s' on pool '%s' (%d)\n", + filepath, spa->spa_name, err); + return (EFI_NOT_FOUND); + } + printf("Failed to lookup '%s' on pool '%s' (%d)\n", filepath, + spa->spa_name, err); + return (EFI_INVALID_PARAMETER); + } + + if ((err = zfs_dnode_stat(spa, &dn, &st)) != 0) { + printf("Failed to stat '%s' on pool '%s' (%d)\n", filepath, + spa->spa_name, err); + return (EFI_INVALID_PARAMETER); + } + + if ((status = BS->AllocatePool(EfiLoaderData, (UINTN)st.st_size, &buf)) + != EFI_SUCCESS) { + printf("Failed to allocate load buffer %jd for pool '%s' for '%s' " + "(%lu)\n", (intmax_t)st.st_size, spa->spa_name, filepath, EFI_ERROR_CODE(status)); + return (EFI_INVALID_PARAMETER); + } + + if ((err = dnode_read(spa, &dn, 0, buf, st.st_size)) != 0) { + printf("Failed to read node from %s (%d)\n", spa->spa_name, + err); + (void)BS->FreePool(buf); + return (EFI_INVALID_PARAMETER); + } + + *bufsize = st.st_size; + *bufp = buf; + + return (EFI_SUCCESS); +} + +static void +status(void) +{ + spa_t *spa; + + spa = STAILQ_FIRST(&zfs_pools); + if (spa == NULL) { + printf("%s found no pools\n", zfs_module.name); + return; + } + + printf("%s found the following pools:", zfs_module.name); + STAILQ_FOREACH(spa, &zfs_pools, spa_link) + printf(" %s", spa->spa_name); + + printf("\n"); +} + +static void +init(void) +{ + + zfs_init(); +} + +static dev_info_t * +_devices(void) +{ + + return (devices); +} + +const boot_module_t zfs_module = +{ + .name = "ZFS", + .init = init, + .probe = probe, + .load = load, + .status = status, + .devices = _devices +}; diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile index 27e801d125f0..9a2c20b7c52d 100644 --- a/sys/boot/efi/libefi/Makefile +++ b/sys/boot/efi/libefi/Makefile @@ -10,9 +10,8 @@ LIB= efi INTERNALLIB= WARNS?= 2 -SRCS= delay.c devpath.c efi_console.c efichar.c efinet.c efipart.c env.c \ - errno.c handles.c wchar.c libefi.c efi_driver_utils.c efizfs.c \ - devicename.c efi_main.c +SRCS= delay.c devpath.c efi_console.c efichar.c efinet.c efipart.c env.c errno.c \ + handles.c wchar.c libefi.c efi_driver_utils.c efizfs.c devicename.c .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" SRCS+= time.c diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index d73b9a9fbd9a..9db19fb8d538 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -21,6 +21,7 @@ SRCS= autoload.c \ bootinfo.c \ conf.c \ copy.c \ + efi_main.c \ main.c \ self_reloc.c \ smbios.c \ diff --git a/sys/boot/efi/libefi/efi_main.c b/sys/boot/efi/loader/efi_main.c similarity index 100% rename from sys/boot/efi/libefi/efi_main.c rename to sys/boot/efi/loader/efi_main.c From 39ed7f250a4245fcddea4a80c619b8c812845034 Mon Sep 17 00:00:00 2001 From: Brooks Davis Date: Wed, 18 Oct 2017 00:18:03 +0000 Subject: [PATCH 144/219] Remove mbpool(9) now that it has no consumers. mbpool existed to support NICs with memory interfaces and all remaining comsumers were removed earlier this year with NATM. Reviewed by: jhb Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D10513 --- ObsoleteFiles.inc | 13 ++ share/man/man9/Makefile | 11 - share/man/man9/mbpool.9 | 262 ---------------------- sys/conf/NOTES | 2 - sys/conf/files | 1 - sys/conf/options | 1 - sys/kern/subr_mbpool.c | 398 --------------------------------- sys/modules/Makefile | 1 - sys/modules/libmbpool/Makefile | 19 -- sys/sys/mbpool.h | 90 -------- 10 files changed, 13 insertions(+), 785 deletions(-) delete mode 100644 share/man/man9/mbpool.9 delete mode 100644 sys/kern/subr_mbpool.c delete mode 100644 sys/modules/libmbpool/Makefile delete mode 100644 sys/sys/mbpool.h diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc index 44a7e8a32866..7d33615e49e6 100644 --- a/ObsoleteFiles.inc +++ b/ObsoleteFiles.inc @@ -38,6 +38,19 @@ # xargs -n1 | sort | uniq -d; # done +# 20171017: Removal of mbpool(9) +OLD_FILES+=usr/include/sys/mbpool.h +OLD_FILES+=usr/share/man/man9/mbpool.9.gz +OLD_FILES+=usr/share/man/man9/mbp_destroy.9.gz +OLD_FILES+=usr/share/man/man9/mbp_alloc.9.gz +OLD_FILES+=usr/share/man/man9/mbp_ext_free.9.gz +OLD_FILES+=usr/share/man/man9/mbp_count.9.gz +OLD_FILES+=usr/share/man/man9/mbp_card_free.9.gz +OLD_FILES+=usr/share/man/man9/mbp_get_keep.9.gz +OLD_FILES+=usr/share/man/man9/mbp_free.9.gz +OLD_FILES+=usr/share/man/man9/mbp_get.9.gz +OLD_FILES+=usr/share/man/man9/mbp_create.9.gz +OLD_FILES+=usr/share/man/man9/mbp_sync.9.gz # 20171010: Remove libstand OLD_FILES+=usr/lib/libstand.a OLD_FILES+=usr/lib/libstand_p.a diff --git a/share/man/man9/Makefile b/share/man/man9/Makefile index 1540bfa9d4dd..f3c00af9f753 100644 --- a/share/man/man9/Makefile +++ b/share/man/man9/Makefile @@ -184,7 +184,6 @@ MAN= accept_filter.9 \ make_dev.9 \ malloc.9 \ mbchain.9 \ - mbpool.9 \ mbuf.9 \ mbuf_tags.9 \ MD5.9 \ @@ -1162,16 +1161,6 @@ MLINKS+=mbchain.9 mb_detach.9 \ mbchain.9 mb_put_uint8.9 \ mbchain.9 mb_put_uio.9 \ mbchain.9 mb_reserve.9 -MLINKS+=mbpool.9 mbp_alloc.9 \ - mbpool.9 mbp_card_free.9 \ - mbpool.9 mbp_count.9 \ - mbpool.9 mbp_create.9 \ - mbpool.9 mbp_destroy.9 \ - mbpool.9 mbp_ext_free.9 \ - mbpool.9 mbp_free.9 \ - mbpool.9 mbp_get.9 \ - mbpool.9 mbp_get_keep.9 \ - mbpool.9 mbp_sync.9 MLINKS+=\ mbuf.9 m_adj.9 \ mbuf.9 m_align.9 \ diff --git a/share/man/man9/mbpool.9 b/share/man/man9/mbpool.9 deleted file mode 100644 index 5761996665df..000000000000 --- a/share/man/man9/mbpool.9 +++ /dev/null @@ -1,262 +0,0 @@ -.\" Copyright (c) 2003 -.\" Fraunhofer Institute for Open Communication Systems (FhG Fokus). -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" Author: Hartmut Brandt -.\" -.\" $FreeBSD$ -.\" -.Dd September 27, 2017 -.Dt MBPOOL 9 -.Os -.Sh NAME -.Nm mbpool -.Nd "buffer pools for network interfaces" -.Sh SYNOPSIS -.In sys/types.h -.In machine/bus.h -.In sys/mbpool.h -.Vt struct mbpool ; -.Ft int -.Fo mbp_create -.Fa "struct mbpool **mbp" "const char *name" "bus_dma_tag_t dmat" -.Fa "u_int max_pages" "size_t page_size" "size_t chunk_size" -.Fc -.Ft void -.Fn mbp_destroy "struct mbpool *mbp" -.Ft "void *" -.Fn mbp_alloc "struct mbpool *mbp" "bus_addr_t *pa" "uint32_t *hp" -.Ft void -.Fn mbp_free "struct mbpool *mbp" "void *p" -.Ft void -.Fn mbp_ext_free "struct mbuf *" -.Ft void -.Fn mbp_card_free "struct mbpool *mbp" -.Ft void -.Fn mbp_count "struct mbpool *mbp" "u_int *used" "u_int *card" "u_int *free" -.Ft "void *" -.Fn mbp_get "struct mbpool *mbp" "uint32_t h" -.Ft "void *" -.Fn mbp_get_keep "struct mbpool *mbp" "uint32_t h" -.Ft void -.Fo mbp_sync -.Fa "struct mbpool *mbp" "uint32_t h" "bus_addr_t off" "bus_size_t len" -.Fa "u_int op" -.Fc -.Pp -.Fn MODULE_DEPEND "your_module" "libmbpool" 1 1 1 -.Pp -.Cd "options LIBMBPOOL" -.Sh DESCRIPTION -Mbuf pools are intended to help drivers for interface cards that need huge -amounts of receive buffers, and additionally provides a mapping between these -buffers and 32-bit handles. -.Pp -An example of these cards are the Fore/Marconi ForeRunnerHE cards. -These -employ up to 8 receive groups, each with two buffer pools, each of which -can contain up to 8192. -This gives a total maximum number of more than -100000 buffers. -Even with a more moderate configuration the card eats several -thousand buffers. -Each of these buffers must be mapped for DMA. -While for -machines without an IOMMU and with lesser than 4GByte memory this is not -a problem, for other machines this may quickly eat up all available IOMMU -address space and/or bounce buffers. -On sparc64, the default I/O page size -is 16k, so mapping a simple mbuf wastes 31/32 of the address space. -.Pp -Another problem with most of these cards is that they support putting a 32-bit -handle into the buffer descriptor together with the physical address. -This handle is reflected back to the driver when the buffer is filled, and -assists the driver in finding the buffer in host memory. -For 32-bit machines, -the virtual address of the buffer is usually used as the handle. -This does not -work for 64-bit machines for obvious reasons, so a mapping is needed between -these handles and the buffers. -This mapping should be possible without -searching lists and the like. -.Pp -An mbuf pool overcomes both problems by allocating DMA-able memory page wise -with a per-pool configurable page size. -Each page is divided into a number of -equally-sized chunks, the last -.Dv MBPOOL_TRAILER_SIZE -of which are used by the pool code (4 bytes). -The rest of each chunk is -usable as a buffer. -There is a per-pool limit on pages that will be allocated. -.Pp -Additionally, the code manages two flags for each buffer: -.Dq on-card -and -.Dq used . -A buffer may be in one of three states: -.Bl -tag -width "on-card" -.It free -None of the flags is set. -.It on-card -Both flags are set. -The buffer is assumed to be handed over to the card and -waiting to be filled. -.It used -The buffer was returned by the card and is now travelling through the system. -.El -.Pp -A pool is created with -.Fn mbp_create . -This call specifies a DMA tag -.Fa dmat -to be used to create and map the memory pages via -.Xr bus_dmamem_alloc 9 . -The -.Fa chunk_size -includes the pool overhead. -It means that to get buffers for 5 ATM cells -(240 bytes), a chunk size of 256 should be specified. -This results in 12 unused -bytes between the buffer, and the pool overhead of four byte. -The total -maximum number of buffers in a pool is -.Fa max_pages -* -.Fa ( page_size -/ -.Fa chunk_size ) . -The maximum value for -.Fa max_pages -is 2^14-1 (16383) and the maximum of -.Fa page_size -/ -.Fa chunk_size -is 2^9 (512). -If the call is successful, a pointer to a newly allocated -.Vt "struct mbpool" -is set into the variable pointed to by -.Fa mpb . -.Pp -A pool is destroyed with -.Fn mbp_destroy . -This frees all pages and the pool structure itself. -If compiled with -.Dv DIAGNOSTICS , -the code checks that all buffers are free. -If not, a warning message is issued -to the console. -.Pp -A buffer is allocated with -.Fn mbp_alloc . -This returns the virtual address of the buffer and stores the physical -address into the variable pointed to by -.Fa pa . -The handle is stored into the variable pointed to by -.Fa hp . -The two most significant bits and the 7 least significant bits of the handle -are unused by the pool code and may be used by the caller. -These are -automatically stripped when passing a handle to one of the other functions. -If a buffer cannot be allocated (either because the maximum number of pages -is reached, no memory is available or the memory cannot be mapped), -.Dv NULL -is returned. -If a buffer could be allocated, it is in the -.Dq on-card -state. -.Pp -When the buffer is returned by the card, the driver calls -.Fn mbp_get -with the handle. -This function returns the virtual address of the buffer -and clears the -.Dq on-card -bit. -The buffer is now in the -.Dq used -state. -The function -.Fn mbp_get_keep -differs from -.Fn mbp_get -in that it does not clear the -.Dq on-card -bit. -This can be used for buffers -that are returned -.Dq partially -by the card. -.Pp -A buffer is freed by calling -.Fn mbp_free -with the virtual address of the buffer. -This clears the -.Dq used -bit, and -puts the buffer on the free list of the pool. -Note that free buffers -are NOT returned to the system. -The function -.Fn mbp_ext_free -can be given to -.Fn m_extadd -as the free function. -.Pp -Before using the contents of a buffer returned by the card, the driver -must call -.Fn mbp_sync -with the appropriate parameters. -This results in a call to -.Xr bus_dmamap_sync 9 -for the buffer. -.Pp -All buffers in the pool that are currently in the -.Dq on-card -state can be freed -with a call to -.Fn mbp_card_free . -This may be called by the driver when it stops the interface. -Buffers in the -.Dq used -state are not freed by this call. -.Pp -For debugging it is possible to call -.Fn mbp_count . -This returns the number of buffers in the -.Dq used -and -.Dq on-card -states and -the number of buffers on the free list. -.Sh SEE ALSO -.Xr mbuf 9 -.Sh AUTHORS -.An Harti Brandt Aq Mt harti@FreeBSD.org -.Sh CAVEATS -The function -.Fn mbp_sync -is currently a no-op because -.Xr bus_dmamap_sync 9 -is missing the offset and length parameters. diff --git a/sys/conf/NOTES b/sys/conf/NOTES index 1e63b17c9163..ce9991d1e956 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -2210,8 +2210,6 @@ device rtwnfw options MCLSHIFT=12 # mbuf cluster shift in bits, 12 == 4KB options MSIZE=512 # mbuf size in bytes -options LIBMBPOOL - # # Sound drivers # diff --git a/sys/conf/files b/sys/conf/files index 0b01ba755a65..bd185588eee0 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -3816,7 +3816,6 @@ kern/subr_kdb.c standard kern/subr_kobj.c standard kern/subr_lock.c standard kern/subr_log.c standard -kern/subr_mbpool.c optional libmbpool kern/subr_mchain.c optional libmchain kern/subr_module.c standard kern/subr_msgbuf.c standard diff --git a/sys/conf/options b/sys/conf/options index 9e71487705ac..224d06792b94 100644 --- a/sys/conf/options +++ b/sys/conf/options @@ -432,7 +432,6 @@ IPSEC_SUPPORT opt_ipsec.h IPSTEALTH KRPC LIBALIAS -LIBMBPOOL LIBMCHAIN MBUF_PROFILING MBUF_STRESS_TEST diff --git a/sys/kern/subr_mbpool.c b/sys/kern/subr_mbpool.c deleted file mode 100644 index e1bae23ff2f1..000000000000 --- a/sys/kern/subr_mbpool.c +++ /dev/null @@ -1,398 +0,0 @@ -/*- - * Copyright (c) 2003 - * Fraunhofer Institute for Open Communication Systems (FhG Fokus). - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Author: Hartmut Brandt - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -MODULE_VERSION(libmbpool, 1); - -/* - * Memory is allocated as DMA-able pages. Each page is divided into a number - * of equal chunks where the last 4 bytes of each chunk are occupied by - * the page number and the chunk number. The caller must take these four - * bytes into account when specifying the chunk size. Each page is mapped by - * its own DMA map using the user specified DMA tag. - * - * Each chunk has a used and a card bit in the high bits of its page number. - * 0 0 chunk is free and may be allocated - * 1 1 chunk has been given to the interface - * 0 1 chunk is traveling through the system - * 1 0 illegal - */ -struct mbtrail { - uint16_t chunk; - uint16_t page; -}; -#define MBP_CARD 0x8000 -#define MBP_USED 0x4000 -#define MBP_PMSK 0x3fff /* page number mask */ -#define MBP_CMSK 0x01ff /* chunk number mask */ - -struct mbfree { - SLIST_ENTRY(mbfree) link; /* link on free list */ -}; - -struct mbpage { - bus_dmamap_t map; /* map for this page */ - bus_addr_t phy; /* physical address */ - void *va; /* the memory */ -}; - -struct mbpool { - const char *name; /* a name for this pool */ - bus_dma_tag_t dmat; /* tag for mapping */ - u_int max_pages; /* maximum number of pages */ - size_t page_size; /* size of each allocation */ - size_t chunk_size; /* size of each external mbuf */ - - struct mtx free_lock; /* lock of free list */ - SLIST_HEAD(, mbfree) free_list; /* free list */ - u_int npages; /* current number of pages */ - u_int nchunks; /* chunks per page */ - struct mbpage pages[]; /* pages */ -}; - -static MALLOC_DEFINE(M_MBPOOL, "mbpools", "mbuf pools"); - -/* - * Make a trail pointer from a chunk pointer - */ -#define C2T(P, C) ((struct mbtrail *)((char *)(C) + (P)->chunk_size - \ - sizeof(struct mbtrail))) - -/* - * Make a free chunk pointer from a chunk number - */ -#define N2C(P, PG, C) ((struct mbfree *)((char *)(PG)->va + \ - (C) * (P)->chunk_size)) - -/* - * Make/parse handles - */ -#define HMAKE(P, C) ((((P) & MBP_PMSK) << 16) | ((C) << 7)) -#define HPAGE(H) (((H) >> 16) & MBP_PMSK) -#define HCHUNK(H) (((H) >> 7) & MBP_CMSK) - -/* - * initialize a pool - */ -int -mbp_create(struct mbpool **pp, const char *name, bus_dma_tag_t dmat, - u_int max_pages, size_t page_size, size_t chunk_size) -{ - u_int nchunks; - - if (max_pages > MBPOOL_MAX_MAXPAGES || chunk_size == 0) - return (EINVAL); - nchunks = page_size / chunk_size; - if (nchunks == 0 || nchunks > MBPOOL_MAX_CHUNKS) - return (EINVAL); - - (*pp) = malloc(sizeof(struct mbpool) + - max_pages * sizeof(struct mbpage), - M_MBPOOL, M_WAITOK | M_ZERO); - - (*pp)->name = name; - (*pp)->dmat = dmat; - (*pp)->max_pages = max_pages; - (*pp)->page_size = page_size; - (*pp)->chunk_size = chunk_size; - (*pp)->nchunks = nchunks; - - SLIST_INIT(&(*pp)->free_list); - mtx_init(&(*pp)->free_lock, name, NULL, MTX_DEF); - - return (0); -} - -/* - * destroy a pool - */ -void -mbp_destroy(struct mbpool *p) -{ - u_int i; - struct mbpage *pg; -#ifdef DIAGNOSTIC - struct mbtrail *tr; - u_int b; -#endif - - for (i = 0; i < p->npages; i++) { - pg = &p->pages[i]; -#ifdef DIAGNOSTIC - for (b = 0; b < p->nchunks; b++) { - tr = C2T(p, N2C(p, pg, b)); - if (tr->page & MBP_CARD) - printf("%s: (%s) buf still on card" - " %u/%u\n", __func__, p->name, i, b); - if (tr->page & MBP_USED) - printf("%s: (%s) sbuf still in use" - " %u/%u\n", __func__, p->name, i, b); - } -#endif - bus_dmamap_unload(p->dmat, pg->map); - bus_dmamem_free(p->dmat, pg->va, pg->map); - } - mtx_destroy(&p->free_lock); - - free(p, M_MBPOOL); -} - -/* - * Helper function when loading a one segment DMA buffer. - */ -static void -mbp_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - if (error == 0) - *(bus_addr_t *)arg = segs[0].ds_addr; -} - -/* - * Allocate a new page - */ -static void -mbp_alloc_page(struct mbpool *p) -{ - int error; - struct mbpage *pg; - u_int i; - struct mbfree *f; - struct mbtrail *t; - - if (p->npages == p->max_pages) { -#ifdef DIAGNOSTIC - printf("%s: (%s) page limit reached %u\n", __func__, - p->name, p->max_pages); -#endif - return; - } - pg = &p->pages[p->npages]; - - error = bus_dmamem_alloc(p->dmat, &pg->va, BUS_DMA_NOWAIT, &pg->map); - if (error != 0) - return; - - error = bus_dmamap_load(p->dmat, pg->map, pg->va, p->page_size, - mbp_callback, &pg->phy, 0); - if (error != 0) { - bus_dmamem_free(p->dmat, pg->va, pg->map); - return; - } - - for (i = 0; i < p->nchunks; i++) { - f = N2C(p, pg, i); - t = C2T(p, f); - t->page = p->npages; - t->chunk = i; - SLIST_INSERT_HEAD(&p->free_list, f, link); - } - - p->npages++; -} - -/* - * allocate a chunk - */ -void * -mbp_alloc(struct mbpool *p, bus_addr_t *pap, uint32_t *hp) -{ - struct mbfree *cf; - struct mbtrail *t; - - mtx_lock(&p->free_lock); - if ((cf = SLIST_FIRST(&p->free_list)) == NULL) { - mbp_alloc_page(p); - cf = SLIST_FIRST(&p->free_list); - } - if (cf == NULL) { - mtx_unlock(&p->free_lock); - return (NULL); - } - SLIST_REMOVE_HEAD(&p->free_list, link); - mtx_unlock(&p->free_lock); - - t = C2T(p, cf); - - *pap = p->pages[t->page].phy + t->chunk * p->chunk_size; - *hp = HMAKE(t->page, t->chunk); - - t->page |= MBP_CARD | MBP_USED; - - return (cf); -} - -/* - * Free a chunk - */ -void -mbp_free(struct mbpool *p, void *ptr) -{ - struct mbtrail *t; - - mtx_lock(&p->free_lock); - t = C2T(p, ptr); - t->page &= ~(MBP_USED | MBP_CARD); - SLIST_INSERT_HEAD(&p->free_list, (struct mbfree *)ptr, link); - mtx_unlock(&p->free_lock); -} - -/* - * Mbuf system external mbuf free routine - */ -void -mbp_ext_free(struct mbuf *m) -{ - - mbp_free(m->m_ext.ext_arg2, m->m_ext.ext_arg1); -} - -/* - * Free all buffers that are marked as being on the card - */ -void -mbp_card_free(struct mbpool *p) -{ - u_int i, b; - struct mbpage *pg; - struct mbtrail *tr; - struct mbfree *cf; - - mtx_lock(&p->free_lock); - for (i = 0; i < p->npages; i++) { - pg = &p->pages[i]; - for (b = 0; b < p->nchunks; b++) { - cf = N2C(p, pg, b); - tr = C2T(p, cf); - if (tr->page & MBP_CARD) { - tr->page &= MBP_PMSK; - SLIST_INSERT_HEAD(&p->free_list, cf, link); - } - } - } - mtx_unlock(&p->free_lock); -} - -/* - * Count buffers - */ -void -mbp_count(struct mbpool *p, u_int *used, u_int *card, u_int *free) -{ - u_int i, b; - struct mbpage *pg; - struct mbtrail *tr; - struct mbfree *cf; - - *used = *card = *free = 0; - for (i = 0; i < p->npages; i++) { - pg = &p->pages[i]; - for (b = 0; b < p->nchunks; b++) { - tr = C2T(p, N2C(p, pg, b)); - if (tr->page & MBP_CARD) - (*card)++; - if (tr->page & MBP_USED) - (*used)++; - } - } - mtx_lock(&p->free_lock); - SLIST_FOREACH(cf, &p->free_list, link) - (*free)++; - mtx_unlock(&p->free_lock); -} - -/* - * Get the buffer from a handle and clear the card flag. - */ -void * -mbp_get(struct mbpool *p, uint32_t h) -{ - struct mbfree *cf; - struct mbtrail *tr; - - cf = N2C(p, &p->pages[HPAGE(h)], HCHUNK(h)); - tr = C2T(p, cf); - -#ifdef DIAGNOSTIC - if (!(tr->page & MBP_CARD)) - printf("%s: (%s) chunk %u page %u not on card\n", __func__, - p->name, HCHUNK(h), HPAGE(h)); -#endif - - tr->page &= ~MBP_CARD; - return (cf); -} - -/* - * Get the buffer from a handle and keep the card flag. - */ -void * -mbp_get_keep(struct mbpool *p, uint32_t h) -{ - struct mbfree *cf; - struct mbtrail *tr; - - cf = N2C(p, &p->pages[HPAGE(h)], HCHUNK(h)); - tr = C2T(p, cf); - -#ifdef DIAGNOSTIC - if (!(tr->page & MBP_CARD)) - printf("%s: (%s) chunk %u page %u not on card\n", __func__, - p->name, HCHUNK(h), HPAGE(h)); -#endif - - return (cf); -} - -/* - * sync the chunk - */ -void -mbp_sync(struct mbpool *p, uint32_t h, bus_addr_t off, bus_size_t len, u_int op) -{ - -#if 0 - bus_dmamap_sync_size(p->dmat, p->pages[HPAGE(h)].map, - HCHUNK(h) * p->chunk_size + off, len, op); -#endif -} diff --git a/sys/modules/Makefile b/sys/modules/Makefile index 0db52cff3083..cb94ec1a2a1e 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -218,7 +218,6 @@ SUBDIR= \ lge \ libalias \ libiconv \ - libmbpool \ libmchain \ ${_linprocfs} \ ${_linsysfs} \ diff --git a/sys/modules/libmbpool/Makefile b/sys/modules/libmbpool/Makefile deleted file mode 100644 index 2b694be83962..000000000000 --- a/sys/modules/libmbpool/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/kern - -KMOD= libmbpool -SRCS= subr_mbpool.c - -EXPORT_SYMS= mbp_create \ - mbp_destroy \ - mbp_alloc \ - mbp_free \ - mbp_ext_free \ - mbp_card_free \ - mbp_count \ - mbp_get \ - mbp_get_keep \ - mbp_sync - -.include diff --git a/sys/sys/mbpool.h b/sys/sys/mbpool.h deleted file mode 100644 index be95d619827b..000000000000 --- a/sys/sys/mbpool.h +++ /dev/null @@ -1,90 +0,0 @@ -/*- - * Copyright (c) 2003 - * Fraunhofer Institute for Open Communication Systems (FhG Fokus). - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Author: Hartmut Brandt - */ - -/* - * This implements pools of DMA-able buffers that conserve DMA address space - * by putting several buffers into one page and that allow to map between - * 32-bit handles for the buffer and buffer addresses (to use 32-bit network - * interfaces on 64bit machines). This assists network interfaces that may need - * huge numbers of mbufs. - * - * $FreeBSD$ - */ -#ifndef _SYS_MBPOOL_H_ -#define _SYS_MBPOOL_H_ - -#ifdef _KERNEL - -#include - -/* opaque */ -struct mbpool; - -/* size of reserved area at end of each chunk */ -#define MBPOOL_TRAILER_SIZE 4 - -/* maximum value of max_pages */ -#define MBPOOL_MAX_MAXPAGES ((1 << 14) - 1) - -/* maximum number of chunks per page */ -#define MBPOOL_MAX_CHUNKS (1 << 9) - -/* initialize a pool */ -int mbp_create(struct mbpool **, const char *, bus_dma_tag_t, u_int, - size_t, size_t); - -/* destroy a pool */ -void mbp_destroy(struct mbpool *); - -/* allocate a chunk and set used and on card */ -void *mbp_alloc(struct mbpool *, bus_addr_t *, uint32_t *); - -/* free a chunk */ -void mbp_free(struct mbpool *, void *); - -/* free a chunk that is an external mbuf */ -void mbp_ext_free(struct mbuf *); - -/* free all buffers that are marked to be on the card */ -void mbp_card_free(struct mbpool *); - -/* count used buffers and buffers on card */ -void mbp_count(struct mbpool *, u_int *, u_int *, u_int *); - -/* get the buffer from a handle and clear card bit */ -void *mbp_get(struct mbpool *, uint32_t); - -/* get the buffer from a handle and don't clear card bit */ -void *mbp_get_keep(struct mbpool *, uint32_t); - -/* sync the chunk */ -void mbp_sync(struct mbpool *, uint32_t, bus_addr_t, bus_size_t, u_int); - -#endif /* _KERNEL */ -#endif /* _SYS_MBPOOL_H_ */ From 6f6b66a827dbf2e16bc65626129bb8a4740b3849 Mon Sep 17 00:00:00 2001 From: Jonathan Anderson Date: Wed, 18 Oct 2017 00:30:15 +0000 Subject: [PATCH 145/219] Improve logic of CLEANFILES+=${PROG_FULL}.{bc,ll}. The build rule describing how to create ${PROG_FULL}.{bc,ll} is only dependent on LLVM_LINK being defined, not on MK_DEBUG_FILES being "yes". Move the addition of ${PROG_FULL}.{bc,ll} out of the conditional block under `.if ${MK_DEBUG_FILES} != "no"` and up next to where the build rules for ${PROG_FULL}.{bc,ll} are defined. Reviewed by: emaste MFC after: 1 week Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D12703 --- share/mk/bsd.prog.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/share/mk/bsd.prog.mk b/share/mk/bsd.prog.mk index 2670e6ae37f5..6c5b771176fe 100644 --- a/share/mk/bsd.prog.mk +++ b/share/mk/bsd.prog.mk @@ -158,6 +158,7 @@ ${PROG_FULL}.bc: ${BCOBJS} ${PROG_FULL}.ll: ${LLOBJS} ${LLVM_LINK} -S -o ${.TARGET} ${LLOBJS} +CLEANFILES+= ${PROG_FULL}.bc ${PROG_FULL}.ll .endif # defined(LLVM_LINK) .if ${MK_MAN} != "no" && !defined(MAN) && \ @@ -181,7 +182,7 @@ all: all-man .if defined(PROG) CLEANFILES+= ${PROG} ${PROG}.bc ${PROG}.ll .if ${MK_DEBUG_FILES} != "no" -CLEANFILES+= ${PROG_FULL} ${PROG_FULL}.bc ${PROGNAME}.debug ${PROG_FULL}.ll +CLEANFILES+= ${PROG_FULL} ${PROGNAME}.debug .endif .endif From 4f2fac37593702eae572eecb2ce6aafeee09eb18 Mon Sep 17 00:00:00 2001 From: Jonathan Anderson Date: Wed, 18 Oct 2017 00:33:20 +0000 Subject: [PATCH 146/219] Improve computation of {BC,LL}OBJS. Now that OBJS has grown an OBJS_SRCS_FILTER variable, use this variable in the computation of BCOBJS and LLOBJS too. Also move BCOBJS and LLOBJS computation to be next to the OBJS computation: this should both make the parallel structure clearer and serve to remind people changing OBJS that parallel changes are required in BCOBJS and LLOBJS. A side effect of this change is that BCOBJS and LLOBJS will be available even when LLVM_LINK has not been defined, but that seems like a positive change: there's no reason we can't ask "what bitcode files would you generate" just because we can't link those files together into a complete bitcode representation of a binary or library. Reviewed by: sjg Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D12701 --- share/mk/bsd.lib.mk | 8 +++----- share/mk/bsd.prog.mk | 13 ++++++++----- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/share/mk/bsd.lib.mk b/share/mk/bsd.lib.mk index dc282ac2a27c..d3e4d7839cff 100644 --- a/share/mk/bsd.lib.mk +++ b/share/mk/bsd.lib.mk @@ -169,7 +169,9 @@ LDFLAGS+= -Wl,--version-script=${VERSION_MAP} .if defined(LIB) && !empty(LIB) || defined(SHLIB_NAME) OBJS+= ${SRCS:N*.h:${OBJS_SRCS_FILTER:ts:}:S/$/.o/} -CLEANFILES+= ${OBJS} ${STATICOBJS} +BCOBJS+= ${SRCS:N*.[hsS]:N*.asm:${OBJS_SRCS_FILTER:ts:}:S/$/.bco/g} +LLOBJS+= ${SRCS:N*.[hsS]:N*.asm:${OBJS_SRCS_FILTER:ts:}:S/$/.llo/g} +CLEANFILES+= ${OBJS} ${BCOBJS} ${LLOBJS} ${STATICOBJS} .endif .if defined(LIB) && !empty(LIB) @@ -200,10 +202,6 @@ lib${LIB_PRIVATE}${LIB}_p.a: ${POBJS} .endif .if defined(LLVM_LINK) -BCOBJS= ${OBJS:.o=.bco} ${STATICOBJS:.o=.bco} -LLOBJS= ${OBJS:.o=.llo} ${STATICOBJS:.o=.llo} -CLEANFILES+= ${BCOBJS} ${LLOBJS} - lib${LIB_PRIVATE}${LIB}.bc: ${BCOBJS} ${LLVM_LINK} -o ${.TARGET} ${BCOBJS} diff --git a/share/mk/bsd.prog.mk b/share/mk/bsd.prog.mk index 6c5b771176fe..a3129a8cdca9 100644 --- a/share/mk/bsd.prog.mk +++ b/share/mk/bsd.prog.mk @@ -87,6 +87,10 @@ PROGNAME?= ${PROG} OBJS+= ${SRCS:N*.h:${OBJS_SRCS_FILTER:ts:}:S/$/.o/g} +# LLVM bitcode / textual IR representations of the program +BCOBJS+=${SRCS:N*.[hsS]:N*.asm:${OBJS_SRCS_FILTER:ts:}:S/$/.bco/g} +LLOBJS+=${SRCS:N*.[hsS]:N*.asm:${OBJS_SRCS_FILTER:ts:}:S/$/.llo/g} + .if target(beforelinking) beforelinking: ${OBJS} ${PROG_FULL}: beforelinking @@ -117,7 +121,10 @@ SRCS= ${PROG}.c # - the name of the object gets put into the executable symbol table instead of # the name of a variable temporary object. # - it's useful to keep objects around for crunching. -OBJS+= ${PROG}.o +OBJS+= ${PROG}.o +BCOBJS+= ${PROG}.bc +LLOBJS+= ${PROG}.ll +CLEANFILES+= ${PROG}.o ${PROG}.bc ${PROG}.ll .if target(beforelinking) beforelinking: ${OBJS} @@ -148,10 +155,6 @@ ${PROGNAME}.debug: ${PROG_FULL} .endif .if defined(LLVM_LINK) -# LLVM bitcode / textual IR representations of the program -BCOBJS= ${OBJS:.o=.bco} -LLOBJS= ${OBJS:.o=.llo} - ${PROG_FULL}.bc: ${BCOBJS} ${LLVM_LINK} -o ${.TARGET} ${BCOBJS} From ccf2e8123b2c495b50a79085c02ea7844814adcc Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Wed, 18 Oct 2017 00:41:23 +0000 Subject: [PATCH 147/219] ext2: delete redundant decl of ext2_fserr Fix gcc build after r324706. Reviewed by: pfg Differential Revision: https://reviews.freebsd.org/D12709 --- sys/fs/ext2fs/ext2_extern.h | 1 - 1 file changed, 1 deletion(-) diff --git a/sys/fs/ext2fs/ext2_extern.h b/sys/fs/ext2fs/ext2_extern.h index 079f7c61a987..fdf1a29ce048 100644 --- a/sys/fs/ext2fs/ext2_extern.h +++ b/sys/fs/ext2fs/ext2_extern.h @@ -102,7 +102,6 @@ int ext2_search_dirblock(struct inode *, void *, int *, const char *, int, int *, doff_t *, doff_t *, doff_t *, struct ext2fs_searchslot *); int ext2_gd_csum_verify(struct m_ext2fs *fs, struct cdev *dev); void ext2_gd_csum_set(struct m_ext2fs *fs); -void ext2_fserr(struct m_ext2fs *, uid_t, char *); /* Flags to low-level allocation routines. From 1fffcd755d9c63824656f2e8b3986cbc7fbd70d0 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Wed, 18 Oct 2017 07:27:43 +0000 Subject: [PATCH 148/219] Do not report reduction of swap zone if it was not. After r324600 we see the actual reservation. Reported by: jkim Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/vm/swap_pager.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/vm/swap_pager.c b/sys/vm/swap_pager.c index bd84332d8123..d3cc1330a08d 100644 --- a/sys/vm/swap_pager.c +++ b/sys/vm/swap_pager.c @@ -549,7 +549,7 @@ swap_pager_swap_init(void) */ n = uma_zone_get_max(swblk_zone); - if (n2 != n) + if (n < n2) printf("Swap blk zone entries reduced from %lu to %lu.\n", n2, n); swap_maxpages = n * SWAP_META_PAGES; From 9d3fb104c9edce9e3b6fc8ea52e60dc49d2bfdd1 Mon Sep 17 00:00:00 2001 From: Toomas Soome Date: Wed, 18 Oct 2017 07:39:21 +0000 Subject: [PATCH 149/219] libsa/ip.c: misplaced comment, ip_v is half char, not ip_p The comment should be at previous line. Reported by: Dan McDonald --- sys/boot/libsa/ip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/boot/libsa/ip.c b/sys/boot/libsa/ip.c index 541cabc4bdd8..c0a9f3c90f7f 100644 --- a/sys/boot/libsa/ip.c +++ b/sys/boot/libsa/ip.c @@ -229,8 +229,8 @@ readipv4(struct iodesc *d, void **pkt, void **payload, time_t tleft, } /* Check ip header */ - if (ip->ip_v != IPVERSION || - ip->ip_p != proto) { /* half char */ + if (ip->ip_v != IPVERSION || /* half char */ + ip->ip_p != proto) { #ifdef NET_DEBUG if (debug) { printf("readip: IP version or proto. ip_v=%d ip_p=%d\n", From 47243561f4493fbc8e0833f22b411e1c2b16973a Mon Sep 17 00:00:00 2001 From: Toomas Soome Date: Wed, 18 Oct 2017 08:06:05 +0000 Subject: [PATCH 150/219] libsa/ip: stop read loop on bad fragments Lets try to clear out from case of overlapping etc fragments and stop read. Reported by: Dan McDonald --- sys/boot/libsa/ip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sys/boot/libsa/ip.c b/sys/boot/libsa/ip.c index c0a9f3c90f7f..f2293b3cd3f9 100644 --- a/sys/boot/libsa/ip.c +++ b/sys/boot/libsa/ip.c @@ -350,7 +350,8 @@ readipv4(struct iodesc *d, void **pkt, void **payload, time_t tleft, last = NULL; STAILQ_FOREACH(ipq, &ipr->ip_queue, ipq_next) { if ((ntohs(ipq->ipq_hdr->ip_off) & IP_OFFMASK) != n / 8) { - errno = EAGAIN; + STAILQ_REMOVE(&ire_list, ipr, ip_reasm, ip_next); + ip_reasm_free(ipr); return (-1); } From e5accd3ca17c0d0061f2ad9a5b68c48efe255efe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stefan=20E=C3=9Fer?= Date: Wed, 18 Oct 2017 13:25:44 +0000 Subject: [PATCH 151/219] Add references to sysrc(8). Reported by: Kurt Jaeger (lists at opsec.eu) --- share/man/man5/rc.conf.5 | 1 + share/man/man8/rc.8 | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/share/man/man5/rc.conf.5 b/share/man/man5/rc.conf.5 index eb4a0fca9f16..4582ca440b59 100644 --- a/share/man/man5/rc.conf.5 +++ b/share/man/man5/rc.conf.5 @@ -4537,6 +4537,7 @@ configuration file. .Xr swapon 8 , .Xr sysctl 8 , .Xr syslogd 8 , +.Xr sysrc 8 , .Xr timed 8 , .Xr unbound 8 , .Xr usbconfig 8 , diff --git a/share/man/man8/rc.8 b/share/man/man8/rc.8 index 2aa7d3aa6ad2..c72ed595165a 100644 --- a/share/man/man8/rc.8 +++ b/share/man/man8/rc.8 @@ -548,7 +548,8 @@ is unnecessary, but is often included. .Xr rc.subr 8 , .Xr rcorder 8 , .Xr reboot 8 , -.Xr savecore 8 +.Xr savecore 8 , +.Xr sysrc 8 .Sh HISTORY The .Nm From 46fcd1af63db2837bd91d56481030f5b8a3eb13e Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Wed, 18 Oct 2017 15:38:05 +0000 Subject: [PATCH 152/219] Move kernel dump offset tracking into MI code. All of the kernel dump implementations keep track of the current offset ("dumplo") within the dump device. However, except for textdumps, they all write the dump sequentially, so we can reduce code duplication by having the MI code keep track of the current offset. The new dump_append() API can be used to write at the current offset. This is needed to implement support for kernel dump compression in the MI kernel dump code. Also simplify dump_encrypted_write() somewhat: use dump_write() instead of duplicating its bounds checks, and get rid of the redundant offset tracking. Reviewed by: cem Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D11722 --- sys/amd64/amd64/minidump_machdep.c | 11 +-- sys/arm/arm/minidump_machdep.c | 12 +-- sys/arm64/arm64/minidump_machdep.c | 11 +-- sys/i386/i386/minidump_machdep.c | 11 +-- sys/kern/kern_dump.c | 25 ++---- sys/kern/kern_shutdown.c | 126 +++++++++++++---------------- sys/mips/mips/minidump_machdep.c | 8 +- sys/sparc64/sparc64/dump_machdep.c | 5 +- sys/sys/conf.h | 16 ++-- 9 files changed, 93 insertions(+), 132 deletions(-) diff --git a/sys/amd64/amd64/minidump_machdep.c b/sys/amd64/amd64/minidump_machdep.c index c5414a18ab67..d1990ba9cf69 100644 --- a/sys/amd64/amd64/minidump_machdep.c +++ b/sys/amd64/amd64/minidump_machdep.c @@ -56,7 +56,6 @@ uint64_t *vm_page_dump; int vm_page_dump_size; static struct kerneldumpheader kdh; -static off_t dumplo; /* Handle chunked writes. */ static size_t fragsz; @@ -93,8 +92,7 @@ blk_flush(struct dumperinfo *di) if (fragsz == 0) return (0); - error = dump_write(di, dump_va, 0, dumplo, fragsz); - dumplo += fragsz; + error = dump_append(di, dump_va, 0, fragsz); fragsz = 0; return (error); } @@ -177,10 +175,9 @@ blk_write(struct dumperinfo *di, char *ptr, vm_paddr_t pa, size_t sz) wdog_kern_pat(WD_LASTVAL); if (ptr) { - error = dump_write(di, ptr, 0, dumplo, len); + error = dump_append(di, ptr, 0, len); if (error) return (error); - dumplo += len; ptr += len; sz -= len; } else { @@ -333,7 +330,7 @@ minidumpsys(struct dumperinfo *di) printf("Dumping %llu out of %ju MB:", (long long)dumpsize >> 20, ptoa((uintmax_t)physmem) / 1048576); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -419,7 +416,7 @@ minidumpsys(struct dumperinfo *di) if (error) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/arm/arm/minidump_machdep.c b/sys/arm/arm/minidump_machdep.c index 9fff9fda1d34..c6a0de4483d4 100644 --- a/sys/arm/arm/minidump_machdep.c +++ b/sys/arm/arm/minidump_machdep.c @@ -58,8 +58,6 @@ int vm_page_dump_size; static struct kerneldumpheader kdh; -static off_t dumplo; - /* Handle chunked writes. */ static size_t fragsz; static void *dump_va; @@ -89,8 +87,7 @@ blk_flush(struct dumperinfo *di) if (fragsz == 0) return (0); - error = dump_write(di, dump_va, 0, dumplo, fragsz); - dumplo += fragsz; + error = dump_append(di, dump_va, 0, fragsz); fragsz = 0; return (error); } @@ -141,10 +138,9 @@ blk_write(struct dumperinfo *di, char *ptr, vm_paddr_t pa, size_t sz) wdog_kern_pat(WD_LASTVAL); #endif if (ptr) { - error = dump_write(di, ptr, 0, dumplo, len); + error = dump_append(di, ptr, 0, len); if (error) return (error); - dumplo += len; ptr += len; sz -= len; } else { @@ -251,7 +247,7 @@ minidumpsys(struct dumperinfo *di) printf("Physical memory: %u MB\n", ptoa((uintmax_t)physmem) / 1048576); printf("Dumping %llu MB:", (long long)dumpsize >> 20); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -329,7 +325,7 @@ minidumpsys(struct dumperinfo *di) if (error) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/arm64/arm64/minidump_machdep.c b/sys/arm64/arm64/minidump_machdep.c index 50139b1b54b9..34295be87a08 100644 --- a/sys/arm64/arm64/minidump_machdep.c +++ b/sys/arm64/arm64/minidump_machdep.c @@ -62,7 +62,6 @@ uint64_t *vm_page_dump; int vm_page_dump_size; static struct kerneldumpheader kdh; -static off_t dumplo; /* Handle chunked writes. */ static size_t fragsz; @@ -96,8 +95,7 @@ blk_flush(struct dumperinfo *di) if (fragsz == 0) return (0); - error = dump_write(di, dump_va, 0, dumplo, fragsz); - dumplo += fragsz; + error = dump_append(di, dump_va, 0, fragsz); fragsz = 0; return (error); } @@ -183,10 +181,9 @@ blk_write(struct dumperinfo *di, char *ptr, vm_paddr_t pa, size_t sz) wdog_kern_pat(WD_LASTVAL); if (ptr) { - error = dump_write(di, ptr, 0, dumplo, len); + error = dump_append(di, ptr, 0, len); if (error) return (error); - dumplo += len; ptr += len; sz -= len; } else { @@ -295,7 +292,7 @@ minidumpsys(struct dumperinfo *di) printf("Dumping %llu out of %ju MB:", (long long)dumpsize >> 20, ptoa((uintmax_t)physmem) / 1048576); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -395,7 +392,7 @@ minidumpsys(struct dumperinfo *di) if (error) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/i386/i386/minidump_machdep.c b/sys/i386/i386/minidump_machdep.c index d28a64f52fc3..689982af81d6 100644 --- a/sys/i386/i386/minidump_machdep.c +++ b/sys/i386/i386/minidump_machdep.c @@ -54,7 +54,6 @@ uint32_t *vm_page_dump; int vm_page_dump_size; static struct kerneldumpheader kdh; -static off_t dumplo; /* Handle chunked writes. */ static size_t fragsz; @@ -86,8 +85,7 @@ blk_flush(struct dumperinfo *di) if (fragsz == 0) return (0); - error = dump_write(di, dump_va, 0, dumplo, fragsz); - dumplo += fragsz; + error = dump_append(di, dump_va, 0, fragsz); fragsz = 0; return (error); } @@ -135,10 +133,9 @@ blk_write(struct dumperinfo *di, char *ptr, vm_paddr_t pa, size_t sz) wdog_kern_pat(WD_LASTVAL); if (ptr) { - error = dump_write(di, ptr, 0, dumplo, len); + error = dump_append(di, ptr, 0, len); if (error) return (error); - dumplo += len; ptr += len; sz -= len; } else { @@ -258,7 +255,7 @@ minidumpsys(struct dumperinfo *di) printf("Physical memory: %ju MB\n", ptoa((uintmax_t)physmem) / 1048576); printf("Dumping %llu MB:", (long long)dumpsize >> 20); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -334,7 +331,7 @@ minidumpsys(struct dumperinfo *di) if (error) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/kern/kern_dump.c b/sys/kern/kern_dump.c index a8e32a75a98b..d2914966957a 100644 --- a/sys/kern/kern_dump.c +++ b/sys/kern/kern_dump.c @@ -51,8 +51,6 @@ CTASSERT(sizeof(struct kerneldumpheader) == 512); #define MD_ALIGN(x) roundup2((off_t)(x), PAGE_SIZE) -off_t dumplo; - /* Handle buffered writes. */ static size_t fragsz; @@ -122,11 +120,9 @@ dumpsys_buf_seek(struct dumperinfo *di, size_t sz) while (sz > 0) { nbytes = MIN(sz, sizeof(buf)); - error = dump_write(di, buf, 0, dumplo, nbytes); + error = dump_append(di, buf, 0, nbytes); if (error) return (error); - dumplo += nbytes; - sz -= nbytes; } @@ -148,11 +144,9 @@ dumpsys_buf_write(struct dumperinfo *di, char *ptr, size_t sz) ptr += len; sz -= len; if (fragsz == di->blocksize) { - error = dump_write(di, di->blockbuf, 0, dumplo, - di->blocksize); + error = dump_append(di, di->blockbuf, 0, di->blocksize); if (error) return (error); - dumplo += di->blocksize; fragsz = 0; } } @@ -167,8 +161,7 @@ dumpsys_buf_flush(struct dumperinfo *di) if (fragsz == 0) return (0); - error = dump_write(di, di->blockbuf, 0, dumplo, di->blocksize); - dumplo += di->blocksize; + error = dump_append(di, di->blockbuf, 0, di->blocksize); fragsz = 0; return (error); } @@ -216,11 +209,10 @@ dumpsys_cb_dumpdata(struct dump_pa *mdp, int seqnr, void *arg) wdog_kern_pat(WD_LASTVAL); #endif - error = dump_write(di, va, 0, dumplo, sz); + error = dump_append(di, va, 0, sz); dumpsys_unmap_chunk(pa, chunk, va); if (error) break; - dumplo += sz; pgs -= chunk; pa += sz; @@ -347,7 +339,7 @@ dumpsys_generic(struct dumperinfo *di) printf("Dumping %ju MB (%d chunks)\n", (uintmax_t)dumpsize >> 20, ehdr.e_phnum - DUMPSYS_NUM_AUX_HDRS); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -369,19 +361,18 @@ dumpsys_generic(struct dumperinfo *di) * All headers are written using blocked I/O, so we know the * current offset is (still) block aligned. Skip the alignement * in the file to have the segment contents aligned at page - * boundary. We cannot use MD_ALIGN on dumplo, because we don't - * care and may very well be unaligned within the dump device. + * boundary. */ error = dumpsys_buf_seek(di, (size_t)hdrgap); if (error) goto fail; - /* Dump memory chunks (updates dumplo) */ + /* Dump memory chunks. */ error = dumpsys_foreach_chunk(dumpsys_cb_dumpdata, di); if (error < 0) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/kern/kern_shutdown.c b/sys/kern/kern_shutdown.c index 168da47170af..36c275809add 100644 --- a/sys/kern/kern_shutdown.c +++ b/sys/kern/kern_shutdown.c @@ -157,7 +157,6 @@ struct kerneldumpcrypto { uint8_t kdc_iv[KERNELDUMP_IV_MAX_SIZE]; keyInstance kdc_ki; cipherInstance kdc_ci; - off_t kdc_nextoffset; uint32_t kdc_dumpkeysize; struct kerneldumpkey kdc_dumpkey[]; }; @@ -931,8 +930,6 @@ kerneldumpcrypto_init(struct kerneldumpcrypto *kdc) goto out; } - kdc->kdc_nextoffset = 0; - kdk = kdc->kdc_dumpkey; memcpy(kdk->kdk_iv, kdc->kdc_iv, sizeof(kdk->kdk_iv)); out: @@ -1024,24 +1021,20 @@ dump_check_bounds(struct dumperinfo *di, off_t offset, size_t length) (uintmax_t)length, (intmax_t)di->mediasize); return (ENOSPC); } + if (length % di->blocksize != 0) { + printf("Attempt to write partial block of length %ju.\n", + (uintmax_t)length); + return (EINVAL); + } + if (offset % di->blocksize != 0) { + printf("Attempt to write at unaligned offset %jd.\n", + (intmax_t)offset); + return (EINVAL); + } return (0); } -/* Call dumper with bounds checking. */ -static int -dump_raw_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, - off_t offset, size_t length) -{ - int error; - - error = dump_check_bounds(di, offset, length); - if (error != 0) - return (error); - - return (di->dumper(di->priv, virtual, physical, offset, length)); -} - #ifdef EKCD static int dump_encrypt(struct kerneldumpcrypto *kdc, uint8_t *buf, size_t size) @@ -1067,40 +1060,16 @@ dump_encrypt(struct kerneldumpcrypto *kdc, uint8_t *buf, size_t size) /* Encrypt data and call dumper. */ static int -dump_encrypted_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, - off_t offset, size_t length) +dump_encrypted_write(struct dumperinfo *di, void *virtual, + vm_offset_t physical, off_t offset, size_t length) { static uint8_t buf[KERNELDUMP_BUFFER_SIZE]; struct kerneldumpcrypto *kdc; int error; size_t nbytes; - off_t nextoffset; kdc = di->kdc; - error = dump_check_bounds(di, offset, length); - if (error != 0) - return (error); - - /* Signal completion. */ - if (virtual == NULL && physical == 0 && offset == 0 && length == 0) { - return (di->dumper(di->priv, virtual, physical, offset, - length)); - } - - /* Data have to be aligned to block size. */ - if ((length % di->blocksize) != 0) - return (EINVAL); - - /* - * Data have to be written continuously becase we're encrypting using - * CBC mode which has this assumption. - */ - if (kdc->kdc_nextoffset != 0 && kdc->kdc_nextoffset != offset) - return (EINVAL); - - nextoffset = offset + (off_t)length; - while (length > 0) { nbytes = MIN(length, sizeof(buf)); bcopy(virtual, buf, nbytes); @@ -1108,7 +1077,7 @@ dump_encrypted_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, if (dump_encrypt(kdc, buf, nbytes) != 0) return (EIO); - error = di->dumper(di->priv, buf, physical, offset, nbytes); + error = dump_write(di, buf, physical, offset, nbytes); if (error != 0) return (error); @@ -1117,8 +1086,6 @@ dump_encrypted_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, length -= nbytes; } - kdc->kdc_nextoffset = nextoffset; - return (0); } @@ -1131,26 +1098,11 @@ dump_write_key(struct dumperinfo *di, vm_offset_t physical, off_t offset) if (kdc == NULL) return (0); - return (dump_raw_write(di, kdc->kdc_dumpkey, physical, offset, + return (dump_write(di, kdc->kdc_dumpkey, physical, offset, kdc->kdc_dumpkeysize)); } #endif /* EKCD */ -int -dump_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, - off_t offset, size_t length) -{ - -#ifdef EKCD - if (di->kdc != NULL) { - return (dump_encrypted_write(di, virtual, physical, offset, - length)); - } -#endif - - return (dump_raw_write(di, virtual, physical, offset, length)); -} - static int dump_write_header(struct dumperinfo *di, struct kerneldumpheader *kdh, vm_offset_t physical, off_t offset) @@ -1170,7 +1122,7 @@ dump_write_header(struct dumperinfo *di, struct kerneldumpheader *kdh, memcpy(buf, kdh, hdrsz); } - return (dump_raw_write(di, buf, physical, offset, di->blocksize)); + return (dump_write(di, buf, physical, offset, di->blocksize)); } /* @@ -1185,7 +1137,7 @@ dump_write_header(struct dumperinfo *di, struct kerneldumpheader *kdh, * key. */ int -dump_start(struct dumperinfo *di, struct kerneldumpheader *kdh, off_t *dumplop) +dump_start(struct dumperinfo *di, struct kerneldumpheader *kdh) { uint64_t dumpsize; uint32_t keysize; @@ -1204,33 +1156,65 @@ dump_start(struct dumperinfo *di, struct kerneldumpheader *kdh, off_t *dumplop) if (di->mediasize < SIZEOF_METADATA + dumpsize) return (E2BIG); - *dumplop = di->mediaoffset + di->mediasize - dumpsize; + di->dumpoff = di->mediaoffset + di->mediasize - dumpsize; - error = dump_write_header(di, kdh, 0, *dumplop); + error = dump_write_header(di, kdh, 0, di->dumpoff); if (error != 0) return (error); - *dumplop += di->blocksize; + di->dumpoff += di->blocksize; #ifdef EKCD - error = dump_write_key(di, 0, *dumplop); + error = dump_write_key(di, 0, di->dumpoff); if (error != 0) return (error); - *dumplop += keysize; + di->dumpoff += keysize; #endif return (0); } +/* Write to the dump device at the current dump offset. */ +int +dump_append(struct dumperinfo *di, void *virtual, vm_offset_t physical, + size_t length) +{ + int error; + +#ifdef EKCD + if (di->kdc != NULL) + error = dump_encrypted_write(di, virtual, physical, di->dumpoff, + length); + else +#endif + error = dump_write(di, virtual, physical, di->dumpoff, length); + if (error == 0) + di->dumpoff += length; + return (error); +} + +/* Perform a raw write to the dump device at the specified offset. */ +int +dump_write(struct dumperinfo *di, void *virtual, vm_offset_t physical, + off_t offset, size_t length) +{ + int error; + + error = dump_check_bounds(di, offset, length); + if (error != 0) + return (error); + return (di->dumper(di->priv, virtual, physical, offset, length)); +} + /* * Write the trailing kernel dump header and signal to the lower layers that the * dump has completed. */ int -dump_finish(struct dumperinfo *di, struct kerneldumpheader *kdh, off_t dumplo) +dump_finish(struct dumperinfo *di, struct kerneldumpheader *kdh) { int error; - error = dump_write_header(di, kdh, 0, dumplo); + error = dump_write_header(di, kdh, 0, di->dumpoff); if (error != 0) return (error); diff --git a/sys/mips/mips/minidump_machdep.c b/sys/mips/mips/minidump_machdep.c index c38e60412a99..9b55ddbb3c5f 100644 --- a/sys/mips/mips/minidump_machdep.c +++ b/sys/mips/mips/minidump_machdep.c @@ -56,7 +56,6 @@ uint32_t *vm_page_dump; int vm_page_dump_size; static struct kerneldumpheader kdh; -static off_t dumplo; /* Handle chunked writes. */ static uint64_t counter, progress, dumpsize; @@ -166,10 +165,9 @@ write_buffer(struct dumperinfo *di, char *ptr, size_t sz) wdog_kern_pat(WD_LASTVAL); if (ptr) { - error = dump_write(di, ptr, 0, dumplo, len); + error = dump_append(di, ptr, 0, len); if (error) return (error); - dumplo += len; ptr += len; sz -= len; } else { @@ -267,7 +265,7 @@ minidumpsys(struct dumperinfo *di) printf("Dumping %llu out of %ju MB:", (long long)dumpsize >> 20, ptoa((uintmax_t)physmem) / 1048576); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -335,7 +333,7 @@ minidumpsys(struct dumperinfo *di) } } - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/sparc64/sparc64/dump_machdep.c b/sys/sparc64/sparc64/dump_machdep.c index 769c8d1a2cf6..5b61c5d237c8 100644 --- a/sys/sparc64/sparc64/dump_machdep.c +++ b/sys/sparc64/sparc64/dump_machdep.c @@ -49,7 +49,6 @@ __FBSDID("$FreeBSD$"); static off_t fileofs; -extern off_t dumplo; extern struct dump_pa dump_map[DUMPSYS_MD_PA_NPAIRS]; int do_minidump = 0; @@ -99,7 +98,7 @@ dumpsys(struct dumperinfo *di) printf("Dumping %lu MB (%d chunks)\n", (u_long)(size >> 20), nreg); - error = dump_start(di, &kdh, &dumplo); + error = dump_start(di, &kdh); if (error != 0) goto fail; @@ -128,7 +127,7 @@ dumpsys(struct dumperinfo *di) if (error < 0) goto fail; - error = dump_finish(di, &kdh, dumplo); + error = dump_finish(di, &kdh); if (error != 0) goto fail; diff --git a/sys/sys/conf.h b/sys/sys/conf.h index 1b4e576db25c..4c33ec34a9b6 100644 --- a/sys/sys/conf.h +++ b/sys/sys/conf.h @@ -336,21 +336,23 @@ struct dumperinfo { off_t mediaoffset; /* Initial offset in bytes. */ off_t mediasize; /* Space available in bytes. */ void *blockbuf; /* Buffer for padding shorter dump blocks */ + off_t dumpoff; /* Offset of ongoing kernel dump. */ struct kerneldumpcrypto *kdc; /* Kernel dump crypto. */ }; +extern int dumping; /* system is dumping */ + +int doadump(boolean_t); int set_dumper(struct dumperinfo *di, const char *devname, struct thread *td, uint8_t encrypt, const uint8_t *key, uint32_t encryptedkeysize, const uint8_t *encryptedkey); + +int dump_start(struct dumperinfo *di, struct kerneldumpheader *kdh); +int dump_append(struct dumperinfo *, void *, vm_offset_t, size_t); +int dump_write(struct dumperinfo *, void *, vm_offset_t, off_t, size_t); +int dump_finish(struct dumperinfo *di, struct kerneldumpheader *kdh); void dump_init_header(const struct dumperinfo *di, struct kerneldumpheader *kdh, char *magic, uint32_t archver, uint64_t dumplen); -int dump_start(struct dumperinfo *di, struct kerneldumpheader *kdh, - off_t *dumplop); -int dump_finish(struct dumperinfo *di, struct kerneldumpheader *kdh, - off_t dumplo); -int dump_write(struct dumperinfo *, void *, vm_offset_t, off_t, size_t); -int doadump(boolean_t); -extern int dumping; /* system is dumping */ #endif /* _KERNEL */ From 1ff30c6af03e41949ff486b2c0919f01dd231649 Mon Sep 17 00:00:00 2001 From: Brad Davis Date: Wed, 18 Oct 2017 15:48:26 +0000 Subject: [PATCH 153/219] Teach beinstall to use and prefer svnlite, with a fallback to svn. Approved by: will --- tools/build/beinstall.sh | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tools/build/beinstall.sh b/tools/build/beinstall.sh index 0467ce0e0ed3..94b25c59af24 100755 --- a/tools/build/beinstall.sh +++ b/tools/build/beinstall.sh @@ -106,7 +106,13 @@ if [ -d .git ] ; then [ $? -ne 0 ] && errx "Can't lookup git commit timestamp" commit_ts=$(date -r ${commit_time} '+%Y%m%d.%H%M%S') elif [ -d .svn ] ; then - commit_ts=$( svn info | awk '/Last Changed Date/ {print $4 "." $5}' | tr -d :- ) + if [ -f /usr/bin/svnlite ]; then + commit_ts=$( svnlite info --show-item last-changed-date | sed -e 's/\..*//' -e 's/T/./' -e 's/-//g' -e s'/://g' ) + elif [ -f /usr/local/bin/svn ]; then + commit_ts=$( svn info --show-item last-changed-date | sed -e 's/\..*//' -e 's/T/./' -e 's/-//g' -e s'/://g' ) + else + errx "Can't lookup Subversion commit timestamp" + fi [ $? -ne 0 ] && errx "Can't lookup Subversion commit timestamp" else errx "Unable to determine sandbox type" From d8371cb18ee1b5560883190875544152896ca5b0 Mon Sep 17 00:00:00 2001 From: John Baldwin Date: Wed, 18 Oct 2017 17:23:16 +0000 Subject: [PATCH 154/219] Remove CPU_HAVEFPU. Instead, use a runtime decision to handle COP1 traps. If floating point support is present in the current CPU, enable saving of the floating point state. If support is not present, fail with SIGILL. Reviewed by: imp, br Sponsored by: DARPA / AFRL Differential Revision: https://reviews.freebsd.org/D12707 --- sys/conf/kern.mk | 3 --- sys/conf/options.mips | 1 - sys/mips/mips/trap.c | 15 ++++++++------- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk index 844510742cb6..204b8203d6e4 100644 --- a/sys/conf/kern.mk +++ b/sys/conf/kern.mk @@ -184,9 +184,6 @@ CFLAGS.gcc+= -mcall-aixdesc .if ${MACHINE_CPUARCH} == "mips" CFLAGS+= -msoft-float INLINE_LIMIT?= 8000 -.if ${MACHINE_ARCH:Mmips*hf} != "" -CFLAGS+= -DCPU_HAVEFPU -.endif .endif # diff --git a/sys/conf/options.mips b/sys/conf/options.mips index 92e830ba341b..3cbeba993528 100644 --- a/sys/conf/options.mips +++ b/sys/conf/options.mips @@ -39,7 +39,6 @@ CPU_PROAPTIV opt_global.h CPU_MIPS32 opt_global.h CPU_MIPS64 opt_global.h CPU_SENTRY5 opt_global.h -CPU_HAVEFPU opt_global.h CPU_SB1 opt_global.h CPU_CNMIPS opt_global.h CPU_RMI opt_global.h diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c index 0f1508c7f2d3..016257be7c13 100644 --- a/sys/mips/mips/trap.c +++ b/sys/mips/mips/trap.c @@ -75,6 +75,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -970,12 +971,13 @@ trap(struct trapframe *trapframe) case T_COP_UNUSABLE + T_USER: cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT; if (cop == 1) { -#if !defined(CPU_HAVEFPU) - /* FP (COP1) instruction */ - log_illegal_instruction("COP1_UNUSABLE", trapframe); - i = SIGILL; - break; -#else + /* FP (COP1) instruction */ + if (cpuinfo.fpu_id == 0) { + log_illegal_instruction("COP1_UNUSABLE", + trapframe); + i = SIGILL; + break; + } addr = trapframe->pc; MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame); PCPU_SET(fpcurthread, td); @@ -986,7 +988,6 @@ trap(struct trapframe *trapframe) #endif td->td_md.md_flags |= MDTD_FPUSED; goto out; -#endif } #ifdef CPU_CNMIPS else if (cop == 2) { From 3ed8d364a780b12a4fa883b0daa6e9c792346835 Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Wed, 18 Oct 2017 18:56:56 +0000 Subject: [PATCH 155/219] Fix a bug introduced in r324638. Thanks to Felix Weinrank for making me aware of this. MFC after: 3 days --- sys/netinet/ip_fw.h | 2 ++ sys/netinet/sctp_input.c | 1 + 2 files changed, 3 insertions(+) diff --git a/sys/netinet/ip_fw.h b/sys/netinet/ip_fw.h index ddee5bf12cf2..d22aedf9d887 100644 --- a/sys/netinet/ip_fw.h +++ b/sys/netinet/ip_fw.h @@ -728,6 +728,8 @@ struct _ipfw_dyn_rule { #define ICMP_REJECT_RST 0x100 /* fake ICMP code (send a TCP RST) */ #define ICMP6_UNREACH_RST 0x100 /* fake ICMPv6 code (send a TCP RST) */ +#define ICMP_REJECT_ABORT 0x101 /* fake ICMP code (send an SCTP ABORT */ +#define ICMP6_UNREACH_ABORT 0x101 /* fake ICMPv6 code (send an SCTP ABORT) */ /* * These are used for lookup tables. diff --git a/sys/netinet/sctp_input.c b/sys/netinet/sctp_input.c index b47fb607d367..0c408da4dfa3 100644 --- a/sys/netinet/sctp_input.c +++ b/sys/netinet/sctp_input.c @@ -4536,6 +4536,7 @@ sctp_process_control(struct mbuf *m, int iphlen, int *offset, int length, if (ntohs(ch->chunk_length) < sizeof(*ch)) { SCTPDBG(SCTP_DEBUG_INPUT1, "Invalid header length %d\n", ntohs(ch->chunk_length)); + *offset = length; return (stcb); } /* From 0d5af38ceb5464b2c7f5feb54fcc0c0cb7925e65 Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Wed, 18 Oct 2017 18:59:35 +0000 Subject: [PATCH 156/219] Revert change which got in accidently. --- sys/netinet/ip_fw.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/sys/netinet/ip_fw.h b/sys/netinet/ip_fw.h index d22aedf9d887..ddee5bf12cf2 100644 --- a/sys/netinet/ip_fw.h +++ b/sys/netinet/ip_fw.h @@ -728,8 +728,6 @@ struct _ipfw_dyn_rule { #define ICMP_REJECT_RST 0x100 /* fake ICMP code (send a TCP RST) */ #define ICMP6_UNREACH_RST 0x100 /* fake ICMPv6 code (send a TCP RST) */ -#define ICMP_REJECT_ABORT 0x101 /* fake ICMP code (send an SCTP ABORT */ -#define ICMP6_UNREACH_ABORT 0x101 /* fake ICMPv6 code (send an SCTP ABORT) */ /* * These are used for lookup tables. From 4e1847781bdf26b80cd541971868bafffaf64bf5 Mon Sep 17 00:00:00 2001 From: Ed Schouten Date: Wed, 18 Oct 2017 19:22:53 +0000 Subject: [PATCH 157/219] Import the latest CloudABI definitions, version 0.16. The most important change in this release is the removal of the poll_fd() system call; CloudABI's equivalent of kevent(). Though I think that kqueue is a lot saner than many of its alternatives, our experience is that emulating this system call on other systems accurately isn't easy. It has become a complex API, even though I'm not convinced this complexity is needed. This is why we've decided to take a different approach, by looking one layer up. We're currently adding an event loop to CloudABI's C library that is API compatible with libuv (except when incompatible with Capsicum). Initially, this event loop will be built on top of plain inefficient poll() calls. Only after this is finished, we'll work our way backwards and design a new set of system calls to optimize it. Interesting challenges will include integrating asynchronous I/O into such a system call API. libuv currently doesn't aio(4) on Linux/BSD, due to it being unreliable and having undesired semantics. Obtained from: https://github.com/NuxiNL/cloudabi --- sys/compat/cloudabi/cloudabi_fd.c | 11 -- sys/compat/cloudabi32/cloudabi32_poll.c | 62 +--------- sys/compat/cloudabi32/cloudabi32_proto.h | 10 -- sys/compat/cloudabi32/cloudabi32_syscall.h | 25 ++-- sys/compat/cloudabi32/cloudabi32_syscalls.c | 23 ++-- sys/compat/cloudabi32/cloudabi32_sysent.c | 23 ++-- .../cloudabi32/cloudabi32_systrace_args.c | 108 ++++++------------ sys/compat/cloudabi64/cloudabi64_poll.c | 62 +--------- sys/compat/cloudabi64/cloudabi64_proto.h | 10 -- sys/compat/cloudabi64/cloudabi64_syscall.h | 25 ++-- sys/compat/cloudabi64/cloudabi64_syscalls.c | 23 ++-- sys/compat/cloudabi64/cloudabi64_sysent.c | 23 ++-- .../cloudabi64/cloudabi64_systrace_args.c | 108 ++++++------------ sys/contrib/cloudabi/cloudabi32_types.h | 4 +- sys/contrib/cloudabi/cloudabi64_types.h | 4 +- sys/contrib/cloudabi/cloudabi_types_common.h | 13 --- sys/contrib/cloudabi/cloudabi_vdso_aarch64.S | 34 ++---- sys/contrib/cloudabi/cloudabi_vdso_armv6.S | 31 ++--- sys/contrib/cloudabi/cloudabi_vdso_i686.S | 33 ++---- .../cloudabi/cloudabi_vdso_i686_on_64bit.S | 56 ++------- sys/contrib/cloudabi/cloudabi_vdso_x86_64.S | 34 ++---- sys/contrib/cloudabi/syscalls32.master | 30 ++--- sys/contrib/cloudabi/syscalls64.master | 30 ++--- usr.bin/truss/syscalls.c | 2 +- 24 files changed, 220 insertions(+), 564 deletions(-) diff --git a/sys/compat/cloudabi/cloudabi_fd.c b/sys/compat/cloudabi/cloudabi_fd.c index 3f57da40d68f..0d15365180b0 100644 --- a/sys/compat/cloudabi/cloudabi_fd.c +++ b/sys/compat/cloudabi/cloudabi_fd.c @@ -73,9 +73,7 @@ __FBSDID("$FreeBSD$"); MAPPING(CLOUDABI_RIGHT_MEM_MAP, CAP_MMAP) \ MAPPING(CLOUDABI_RIGHT_MEM_MAP_EXEC, CAP_MMAP_X) \ MAPPING(CLOUDABI_RIGHT_POLL_FD_READWRITE, CAP_EVENT) \ - MAPPING(CLOUDABI_RIGHT_POLL_MODIFY, CAP_KQUEUE_CHANGE) \ MAPPING(CLOUDABI_RIGHT_POLL_PROC_TERMINATE, CAP_EVENT) \ - MAPPING(CLOUDABI_RIGHT_POLL_WAIT, CAP_KQUEUE_EVENT) \ MAPPING(CLOUDABI_RIGHT_PROC_EXEC, CAP_FEXECVE) \ MAPPING(CLOUDABI_RIGHT_SOCK_SHUTDOWN, CAP_SHUTDOWN) \ @@ -93,9 +91,6 @@ cloudabi_sys_fd_create1(struct thread *td, struct filecaps fcaps = {}; switch (uap->type) { - case CLOUDABI_FILETYPE_POLL: - cap_rights_init(&fcaps.fc_rights, CAP_FSTAT, CAP_KQUEUE); - return (kern_kqueue(td, 0, &fcaps)); case CLOUDABI_FILETYPE_SHARED_MEMORY: cap_rights_init(&fcaps.fc_rights, CAP_FSTAT, CAP_FTRUNCATE, CAP_MMAP_RWX); @@ -201,8 +196,6 @@ cloudabi_convert_filetype(const struct file *fp) switch (fp->f_type) { case DTYPE_FIFO: return (CLOUDABI_FILETYPE_SOCKET_STREAM); - case DTYPE_KQUEUE: - return (CLOUDABI_FILETYPE_POLL); case DTYPE_PIPE: return (CLOUDABI_FILETYPE_SOCKET_STREAM); case DTYPE_PROCDESC: @@ -316,10 +309,6 @@ cloudabi_remove_conflicting_rights(cloudabi_filetype_t filetype, CLOUDABI_RIGHT_POLL_FD_READWRITE | CLOUDABI_RIGHT_PROC_EXEC; break; - case CLOUDABI_FILETYPE_POLL: - *base &= ~CLOUDABI_RIGHT_FILE_ADVISE; - *inheriting = 0; - break; case CLOUDABI_FILETYPE_PROCESS: *base &= ~(CLOUDABI_RIGHT_FILE_ADVISE | CLOUDABI_RIGHT_POLL_FD_READWRITE); diff --git a/sys/compat/cloudabi32/cloudabi32_poll.c b/sys/compat/cloudabi32/cloudabi32_poll.c index dfffdc6c97e3..9bdd9ecb86a7 100644 --- a/sys/compat/cloudabi32/cloudabi32_poll.c +++ b/sys/compat/cloudabi32/cloudabi32_poll.c @@ -79,7 +79,6 @@ convert_signal(int sig) struct cloudabi32_kevent_args { const cloudabi32_subscription_t *in; cloudabi32_event_t *out; - bool once; }; /* Converts CloudABI's subscription objects to FreeBSD's struct kevent. */ @@ -124,9 +123,7 @@ cloudabi32_kevent_copyin(void *arg, struct kevent *kevp, int count) case CLOUDABI_EVENTTYPE_FD_READ: kevp->filter = EVFILT_READ; kevp->ident = sub.fd_readwrite.fd; - if ((sub.fd_readwrite.flags & - CLOUDABI_SUBSCRIPTION_FD_READWRITE_POLL) != 0) - kevp->fflags = NOTE_FILE_POLL; + kevp->fflags = NOTE_FILE_POLL; break; case CLOUDABI_EVENTTYPE_FD_WRITE: kevp->filter = EVFILT_WRITE; @@ -138,24 +135,7 @@ cloudabi32_kevent_copyin(void *arg, struct kevent *kevp, int count) kevp->fflags = NOTE_EXIT; break; } - if (args->once) { - /* Ignore flags. Simply use oneshot mode. */ - kevp->flags = EV_ADD | EV_ONESHOT; - } else { - /* Translate flags. */ - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ADD) != 0) - kevp->flags |= EV_ADD; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_CLEAR) != 0) - kevp->flags |= EV_CLEAR; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_DELETE) != 0) - kevp->flags |= EV_DELETE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_DISABLE) != 0) - kevp->flags |= EV_DISABLE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ENABLE) != 0) - kevp->flags |= EV_ENABLE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ONESHOT) != 0) - kevp->flags |= EV_ONESHOT; - } + kevp->flags = EV_ADD | EV_ONESHOT; ++kevp; } return (0); @@ -238,7 +218,6 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap) struct cloudabi32_kevent_args args = { .in = uap->in, .out = uap->out, - .once = true, }; struct kevent_copyops copyops = { .k_copyin = cloudabi32_kevent_copyin, @@ -369,40 +348,3 @@ cloudabi32_sys_poll(struct thread *td, struct cloudabi32_sys_poll_args *uap) return (kern_kevent_anonymous(td, uap->nsubscriptions, ©ops)); } - -int -cloudabi32_sys_poll_fd(struct thread *td, - struct cloudabi32_sys_poll_fd_args *uap) -{ - struct cloudabi32_kevent_args args = { - .in = uap->in, - .out = uap->out, - .once = false, - }; - struct kevent_copyops copyops = { - .k_copyin = cloudabi32_kevent_copyin, - .k_copyout = cloudabi32_kevent_copyout, - .arg = &args, - }; - cloudabi32_subscription_t subtimo; - struct timespec timeout; - int error; - - if (uap->timeout != NULL) { - /* Poll with a timeout. */ - error = copyin(uap->timeout, &subtimo, sizeof(subtimo)); - if (error != 0) - return (error); - if (subtimo.type != CLOUDABI_EVENTTYPE_CLOCK || - subtimo.clock.flags != 0) - return (EINVAL); - timeout.tv_sec = subtimo.clock.timeout / 1000000000; - timeout.tv_nsec = subtimo.clock.timeout % 1000000000; - return (kern_kevent(td, uap->fd, uap->in_len, uap->out_len, - ©ops, &timeout)); - } else { - /* Poll without a timeout. */ - return (kern_kevent(td, uap->fd, uap->in_len, uap->out_len, - ©ops, NULL)); - } -} diff --git a/sys/compat/cloudabi32/cloudabi32_proto.h b/sys/compat/cloudabi32/cloudabi32_proto.h index 108bbbc2debb..16a072278267 100644 --- a/sys/compat/cloudabi32/cloudabi32_proto.h +++ b/sys/compat/cloudabi32/cloudabi32_proto.h @@ -227,14 +227,6 @@ struct cloudabi32_sys_poll_args { char out_l_[PADL_(cloudabi32_event_t *)]; cloudabi32_event_t * out; char out_r_[PADR_(cloudabi32_event_t *)]; char nsubscriptions_l_[PADL_(size_t)]; size_t nsubscriptions; char nsubscriptions_r_[PADR_(size_t)]; }; -struct cloudabi32_sys_poll_fd_args { - char fd_l_[PADL_(cloudabi_fd_t)]; cloudabi_fd_t fd; char fd_r_[PADR_(cloudabi_fd_t)]; - char in_l_[PADL_(const cloudabi32_subscription_t *)]; const cloudabi32_subscription_t * in; char in_r_[PADR_(const cloudabi32_subscription_t *)]; - char in_len_l_[PADL_(size_t)]; size_t in_len; char in_len_r_[PADR_(size_t)]; - char out_l_[PADL_(cloudabi32_event_t *)]; cloudabi32_event_t * out; char out_r_[PADR_(cloudabi32_event_t *)]; - char out_len_l_[PADL_(size_t)]; size_t out_len; char out_len_r_[PADR_(size_t)]; - char timeout_l_[PADL_(const cloudabi32_subscription_t *)]; const cloudabi32_subscription_t * timeout; char timeout_r_[PADR_(const cloudabi32_subscription_t *)]; -}; struct cloudabi_sys_proc_exec_args { char fd_l_[PADL_(cloudabi_fd_t)]; cloudabi_fd_t fd; char fd_r_[PADR_(cloudabi_fd_t)]; char data_l_[PADL_(const void *)]; const void * data; char data_r_[PADR_(const void *)]; @@ -317,7 +309,6 @@ int cloudabi_sys_mem_protect(struct thread *, struct cloudabi_sys_mem_protect_ar int cloudabi_sys_mem_sync(struct thread *, struct cloudabi_sys_mem_sync_args *); int cloudabi_sys_mem_unmap(struct thread *, struct cloudabi_sys_mem_unmap_args *); int cloudabi32_sys_poll(struct thread *, struct cloudabi32_sys_poll_args *); -int cloudabi32_sys_poll_fd(struct thread *, struct cloudabi32_sys_poll_fd_args *); int cloudabi_sys_proc_exec(struct thread *, struct cloudabi_sys_proc_exec_args *); int cloudabi_sys_proc_exit(struct thread *, struct cloudabi_sys_proc_exit_args *); int cloudabi_sys_proc_fork(struct thread *, struct cloudabi_sys_proc_fork_args *); @@ -403,7 +394,6 @@ int cloudabi_sys_thread_yield(struct thread *, struct cloudabi_sys_thread_yield_ #define CLOUDABI32_SYS_AUE_cloudabi_sys_mem_sync AUE_NULL #define CLOUDABI32_SYS_AUE_cloudabi_sys_mem_unmap AUE_NULL #define CLOUDABI32_SYS_AUE_cloudabi32_sys_poll AUE_NULL -#define CLOUDABI32_SYS_AUE_cloudabi32_sys_poll_fd AUE_NULL #define CLOUDABI32_SYS_AUE_cloudabi_sys_proc_exec AUE_NULL #define CLOUDABI32_SYS_AUE_cloudabi_sys_proc_exit AUE_NULL #define CLOUDABI32_SYS_AUE_cloudabi_sys_proc_fork AUE_NULL diff --git a/sys/compat/cloudabi32/cloudabi32_syscall.h b/sys/compat/cloudabi32/cloudabi32_syscall.h index ba0aa0ef71b9..a09dd1258041 100644 --- a/sys/compat/cloudabi32/cloudabi32_syscall.h +++ b/sys/compat/cloudabi32/cloudabi32_syscall.h @@ -43,16 +43,15 @@ #define CLOUDABI32_SYS_cloudabi_sys_mem_sync 35 #define CLOUDABI32_SYS_cloudabi_sys_mem_unmap 36 #define CLOUDABI32_SYS_cloudabi32_sys_poll 37 -#define CLOUDABI32_SYS_cloudabi32_sys_poll_fd 38 -#define CLOUDABI32_SYS_cloudabi_sys_proc_exec 39 -#define CLOUDABI32_SYS_cloudabi_sys_proc_exit 40 -#define CLOUDABI32_SYS_cloudabi_sys_proc_fork 41 -#define CLOUDABI32_SYS_cloudabi_sys_proc_raise 42 -#define CLOUDABI32_SYS_cloudabi_sys_random_get 43 -#define CLOUDABI32_SYS_cloudabi32_sys_sock_recv 44 -#define CLOUDABI32_SYS_cloudabi32_sys_sock_send 45 -#define CLOUDABI32_SYS_cloudabi_sys_sock_shutdown 46 -#define CLOUDABI32_SYS_cloudabi32_sys_thread_create 47 -#define CLOUDABI32_SYS_cloudabi_sys_thread_exit 48 -#define CLOUDABI32_SYS_cloudabi_sys_thread_yield 49 -#define CLOUDABI32_SYS_MAXSYSCALL 50 +#define CLOUDABI32_SYS_cloudabi_sys_proc_exec 38 +#define CLOUDABI32_SYS_cloudabi_sys_proc_exit 39 +#define CLOUDABI32_SYS_cloudabi_sys_proc_fork 40 +#define CLOUDABI32_SYS_cloudabi_sys_proc_raise 41 +#define CLOUDABI32_SYS_cloudabi_sys_random_get 42 +#define CLOUDABI32_SYS_cloudabi32_sys_sock_recv 43 +#define CLOUDABI32_SYS_cloudabi32_sys_sock_send 44 +#define CLOUDABI32_SYS_cloudabi_sys_sock_shutdown 45 +#define CLOUDABI32_SYS_cloudabi32_sys_thread_create 46 +#define CLOUDABI32_SYS_cloudabi_sys_thread_exit 47 +#define CLOUDABI32_SYS_cloudabi_sys_thread_yield 48 +#define CLOUDABI32_SYS_MAXSYSCALL 49 diff --git a/sys/compat/cloudabi32/cloudabi32_syscalls.c b/sys/compat/cloudabi32/cloudabi32_syscalls.c index dfe24e7cd6eb..95b4781e3310 100644 --- a/sys/compat/cloudabi32/cloudabi32_syscalls.c +++ b/sys/compat/cloudabi32/cloudabi32_syscalls.c @@ -44,16 +44,15 @@ const char *cloudabi32_syscallnames[] = { "cloudabi_sys_mem_sync", /* 35 = cloudabi_sys_mem_sync */ "cloudabi_sys_mem_unmap", /* 36 = cloudabi_sys_mem_unmap */ "cloudabi32_sys_poll", /* 37 = cloudabi32_sys_poll */ - "cloudabi32_sys_poll_fd", /* 38 = cloudabi32_sys_poll_fd */ - "cloudabi_sys_proc_exec", /* 39 = cloudabi_sys_proc_exec */ - "cloudabi_sys_proc_exit", /* 40 = cloudabi_sys_proc_exit */ - "cloudabi_sys_proc_fork", /* 41 = cloudabi_sys_proc_fork */ - "cloudabi_sys_proc_raise", /* 42 = cloudabi_sys_proc_raise */ - "cloudabi_sys_random_get", /* 43 = cloudabi_sys_random_get */ - "cloudabi32_sys_sock_recv", /* 44 = cloudabi32_sys_sock_recv */ - "cloudabi32_sys_sock_send", /* 45 = cloudabi32_sys_sock_send */ - "cloudabi_sys_sock_shutdown", /* 46 = cloudabi_sys_sock_shutdown */ - "cloudabi32_sys_thread_create", /* 47 = cloudabi32_sys_thread_create */ - "cloudabi_sys_thread_exit", /* 48 = cloudabi_sys_thread_exit */ - "cloudabi_sys_thread_yield", /* 49 = cloudabi_sys_thread_yield */ + "cloudabi_sys_proc_exec", /* 38 = cloudabi_sys_proc_exec */ + "cloudabi_sys_proc_exit", /* 39 = cloudabi_sys_proc_exit */ + "cloudabi_sys_proc_fork", /* 40 = cloudabi_sys_proc_fork */ + "cloudabi_sys_proc_raise", /* 41 = cloudabi_sys_proc_raise */ + "cloudabi_sys_random_get", /* 42 = cloudabi_sys_random_get */ + "cloudabi32_sys_sock_recv", /* 43 = cloudabi32_sys_sock_recv */ + "cloudabi32_sys_sock_send", /* 44 = cloudabi32_sys_sock_send */ + "cloudabi_sys_sock_shutdown", /* 45 = cloudabi_sys_sock_shutdown */ + "cloudabi32_sys_thread_create", /* 46 = cloudabi32_sys_thread_create */ + "cloudabi_sys_thread_exit", /* 47 = cloudabi_sys_thread_exit */ + "cloudabi_sys_thread_yield", /* 48 = cloudabi_sys_thread_yield */ }; diff --git a/sys/compat/cloudabi32/cloudabi32_sysent.c b/sys/compat/cloudabi32/cloudabi32_sysent.c index e48bcd1d509b..40380207d59b 100644 --- a/sys/compat/cloudabi32/cloudabi32_sysent.c +++ b/sys/compat/cloudabi32/cloudabi32_sysent.c @@ -52,16 +52,15 @@ struct sysent cloudabi32_sysent[] = { { AS(cloudabi_sys_mem_sync_args), (sy_call_t *)cloudabi_sys_mem_sync, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 35 = cloudabi_sys_mem_sync */ { AS(cloudabi_sys_mem_unmap_args), (sy_call_t *)cloudabi_sys_mem_unmap, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 36 = cloudabi_sys_mem_unmap */ { AS(cloudabi32_sys_poll_args), (sy_call_t *)cloudabi32_sys_poll, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 37 = cloudabi32_sys_poll */ - { AS(cloudabi32_sys_poll_fd_args), (sy_call_t *)cloudabi32_sys_poll_fd, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 38 = cloudabi32_sys_poll_fd */ - { AS(cloudabi_sys_proc_exec_args), (sy_call_t *)cloudabi_sys_proc_exec, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 39 = cloudabi_sys_proc_exec */ - { AS(cloudabi_sys_proc_exit_args), (sy_call_t *)cloudabi_sys_proc_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 40 = cloudabi_sys_proc_exit */ - { 0, (sy_call_t *)cloudabi_sys_proc_fork, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 41 = cloudabi_sys_proc_fork */ - { AS(cloudabi_sys_proc_raise_args), (sy_call_t *)cloudabi_sys_proc_raise, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 42 = cloudabi_sys_proc_raise */ - { AS(cloudabi_sys_random_get_args), (sy_call_t *)cloudabi_sys_random_get, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 43 = cloudabi_sys_random_get */ - { AS(cloudabi32_sys_sock_recv_args), (sy_call_t *)cloudabi32_sys_sock_recv, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 44 = cloudabi32_sys_sock_recv */ - { AS(cloudabi32_sys_sock_send_args), (sy_call_t *)cloudabi32_sys_sock_send, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 45 = cloudabi32_sys_sock_send */ - { AS(cloudabi_sys_sock_shutdown_args), (sy_call_t *)cloudabi_sys_sock_shutdown, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 46 = cloudabi_sys_sock_shutdown */ - { AS(cloudabi32_sys_thread_create_args), (sy_call_t *)cloudabi32_sys_thread_create, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 47 = cloudabi32_sys_thread_create */ - { AS(cloudabi_sys_thread_exit_args), (sy_call_t *)cloudabi_sys_thread_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 48 = cloudabi_sys_thread_exit */ - { 0, (sy_call_t *)cloudabi_sys_thread_yield, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 49 = cloudabi_sys_thread_yield */ + { AS(cloudabi_sys_proc_exec_args), (sy_call_t *)cloudabi_sys_proc_exec, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 38 = cloudabi_sys_proc_exec */ + { AS(cloudabi_sys_proc_exit_args), (sy_call_t *)cloudabi_sys_proc_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 39 = cloudabi_sys_proc_exit */ + { 0, (sy_call_t *)cloudabi_sys_proc_fork, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 40 = cloudabi_sys_proc_fork */ + { AS(cloudabi_sys_proc_raise_args), (sy_call_t *)cloudabi_sys_proc_raise, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 41 = cloudabi_sys_proc_raise */ + { AS(cloudabi_sys_random_get_args), (sy_call_t *)cloudabi_sys_random_get, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 42 = cloudabi_sys_random_get */ + { AS(cloudabi32_sys_sock_recv_args), (sy_call_t *)cloudabi32_sys_sock_recv, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 43 = cloudabi32_sys_sock_recv */ + { AS(cloudabi32_sys_sock_send_args), (sy_call_t *)cloudabi32_sys_sock_send, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 44 = cloudabi32_sys_sock_send */ + { AS(cloudabi_sys_sock_shutdown_args), (sy_call_t *)cloudabi_sys_sock_shutdown, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 45 = cloudabi_sys_sock_shutdown */ + { AS(cloudabi32_sys_thread_create_args), (sy_call_t *)cloudabi32_sys_thread_create, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 46 = cloudabi32_sys_thread_create */ + { AS(cloudabi_sys_thread_exit_args), (sy_call_t *)cloudabi_sys_thread_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 47 = cloudabi_sys_thread_exit */ + { 0, (sy_call_t *)cloudabi_sys_thread_yield, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 48 = cloudabi_sys_thread_yield */ }; diff --git a/sys/compat/cloudabi32/cloudabi32_systrace_args.c b/sys/compat/cloudabi32/cloudabi32_systrace_args.c index 532ce4dd4a4f..4221955ab5e6 100644 --- a/sys/compat/cloudabi32/cloudabi32_systrace_args.c +++ b/sys/compat/cloudabi32/cloudabi32_systrace_args.c @@ -357,20 +357,8 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) *n_args = 3; break; } - /* cloudabi32_sys_poll_fd */ - case 38: { - struct cloudabi32_sys_poll_fd_args *p = params; - iarg[0] = p->fd; /* cloudabi_fd_t */ - uarg[1] = (intptr_t) p->in; /* const cloudabi32_subscription_t * */ - uarg[2] = p->in_len; /* size_t */ - uarg[3] = (intptr_t) p->out; /* cloudabi32_event_t * */ - uarg[4] = p->out_len; /* size_t */ - uarg[5] = (intptr_t) p->timeout; /* const cloudabi32_subscription_t * */ - *n_args = 6; - break; - } /* cloudabi_sys_proc_exec */ - case 39: { + case 38: { struct cloudabi_sys_proc_exec_args *p = params; iarg[0] = p->fd; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->data; /* const void * */ @@ -381,26 +369,26 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_proc_exit */ - case 40: { + case 39: { struct cloudabi_sys_proc_exit_args *p = params; iarg[0] = p->rval; /* cloudabi_exitcode_t */ *n_args = 1; break; } /* cloudabi_sys_proc_fork */ - case 41: { + case 40: { *n_args = 0; break; } /* cloudabi_sys_proc_raise */ - case 42: { + case 41: { struct cloudabi_sys_proc_raise_args *p = params; iarg[0] = p->sig; /* cloudabi_signal_t */ *n_args = 1; break; } /* cloudabi_sys_random_get */ - case 43: { + case 42: { struct cloudabi_sys_random_get_args *p = params; uarg[0] = (intptr_t) p->buf; /* void * */ uarg[1] = p->buf_len; /* size_t */ @@ -408,7 +396,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi32_sys_sock_recv */ - case 44: { + case 43: { struct cloudabi32_sys_sock_recv_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->in; /* const cloudabi32_recv_in_t * */ @@ -417,7 +405,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi32_sys_sock_send */ - case 45: { + case 44: { struct cloudabi32_sys_sock_send_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->in; /* const cloudabi32_send_in_t * */ @@ -426,7 +414,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_sock_shutdown */ - case 46: { + case 45: { struct cloudabi_sys_sock_shutdown_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ iarg[1] = p->how; /* cloudabi_sdflags_t */ @@ -434,14 +422,14 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi32_sys_thread_create */ - case 47: { + case 46: { struct cloudabi32_sys_thread_create_args *p = params; uarg[0] = (intptr_t) p->attr; /* cloudabi32_threadattr_t * */ *n_args = 1; break; } /* cloudabi_sys_thread_exit */ - case 48: { + case 47: { struct cloudabi_sys_thread_exit_args *p = params; uarg[0] = (intptr_t) p->lock; /* cloudabi_lock_t * */ iarg[1] = p->scope; /* cloudabi_scope_t */ @@ -449,7 +437,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_thread_yield */ - case 49: { + case 48: { *n_args = 0; break; } @@ -1083,33 +1071,8 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; }; break; - /* cloudabi32_sys_poll_fd */ - case 38: - switch(ndx) { - case 0: - p = "cloudabi_fd_t"; - break; - case 1: - p = "userland const cloudabi32_subscription_t *"; - break; - case 2: - p = "size_t"; - break; - case 3: - p = "userland cloudabi32_event_t *"; - break; - case 4: - p = "size_t"; - break; - case 5: - p = "userland const cloudabi32_subscription_t *"; - break; - default: - break; - }; - break; /* cloudabi_sys_proc_exec */ - case 39: + case 38: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1131,7 +1094,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_proc_exit */ - case 40: + case 39: switch(ndx) { case 0: p = "cloudabi_exitcode_t"; @@ -1141,10 +1104,10 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_proc_fork */ - case 41: + case 40: break; /* cloudabi_sys_proc_raise */ - case 42: + case 41: switch(ndx) { case 0: p = "cloudabi_signal_t"; @@ -1154,7 +1117,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_random_get */ - case 43: + case 42: switch(ndx) { case 0: p = "userland void *"; @@ -1167,7 +1130,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi32_sys_sock_recv */ - case 44: + case 43: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1183,7 +1146,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi32_sys_sock_send */ - case 45: + case 44: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1199,7 +1162,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_sock_shutdown */ - case 46: + case 45: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1212,7 +1175,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi32_sys_thread_create */ - case 47: + case 46: switch(ndx) { case 0: p = "userland cloudabi32_threadattr_t *"; @@ -1222,7 +1185,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_thread_exit */ - case 48: + case 47: switch(ndx) { case 0: p = "userland cloudabi_lock_t *"; @@ -1235,7 +1198,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_thread_yield */ - case 49: + case 48: break; default: break; @@ -1438,60 +1401,55 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) if (ndx == 0 || ndx == 1) p = "size_t"; break; - /* cloudabi32_sys_poll_fd */ - case 38: - if (ndx == 0 || ndx == 1) - p = "size_t"; - break; /* cloudabi_sys_proc_exec */ - case 39: + case 38: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_proc_exit */ - case 40: + case 39: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_proc_fork */ - case 41: + case 40: /* cloudabi_sys_proc_raise */ - case 42: + case 41: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_random_get */ - case 43: + case 42: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi32_sys_sock_recv */ - case 44: + case 43: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi32_sys_sock_send */ - case 45: + case 44: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_sock_shutdown */ - case 46: + case 45: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi32_sys_thread_create */ - case 47: + case 46: if (ndx == 0 || ndx == 1) p = "cloudabi_tid_t"; break; /* cloudabi_sys_thread_exit */ - case 48: + case 47: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_thread_yield */ - case 49: + case 48: default: break; }; diff --git a/sys/compat/cloudabi64/cloudabi64_poll.c b/sys/compat/cloudabi64/cloudabi64_poll.c index 3df526598934..2b80d7af6b62 100644 --- a/sys/compat/cloudabi64/cloudabi64_poll.c +++ b/sys/compat/cloudabi64/cloudabi64_poll.c @@ -79,7 +79,6 @@ convert_signal(int sig) struct cloudabi64_kevent_args { const cloudabi64_subscription_t *in; cloudabi64_event_t *out; - bool once; }; /* Converts CloudABI's subscription objects to FreeBSD's struct kevent. */ @@ -124,9 +123,7 @@ cloudabi64_kevent_copyin(void *arg, struct kevent *kevp, int count) case CLOUDABI_EVENTTYPE_FD_READ: kevp->filter = EVFILT_READ; kevp->ident = sub.fd_readwrite.fd; - if ((sub.fd_readwrite.flags & - CLOUDABI_SUBSCRIPTION_FD_READWRITE_POLL) != 0) - kevp->fflags = NOTE_FILE_POLL; + kevp->fflags = NOTE_FILE_POLL; break; case CLOUDABI_EVENTTYPE_FD_WRITE: kevp->filter = EVFILT_WRITE; @@ -138,24 +135,7 @@ cloudabi64_kevent_copyin(void *arg, struct kevent *kevp, int count) kevp->fflags = NOTE_EXIT; break; } - if (args->once) { - /* Ignore flags. Simply use oneshot mode. */ - kevp->flags = EV_ADD | EV_ONESHOT; - } else { - /* Translate flags. */ - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ADD) != 0) - kevp->flags |= EV_ADD; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_CLEAR) != 0) - kevp->flags |= EV_CLEAR; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_DELETE) != 0) - kevp->flags |= EV_DELETE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_DISABLE) != 0) - kevp->flags |= EV_DISABLE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ENABLE) != 0) - kevp->flags |= EV_ENABLE; - if ((sub.flags & CLOUDABI_SUBSCRIPTION_ONESHOT) != 0) - kevp->flags |= EV_ONESHOT; - } + kevp->flags = EV_ADD | EV_ONESHOT; ++kevp; } return (0); @@ -238,7 +218,6 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap) struct cloudabi64_kevent_args args = { .in = uap->in, .out = uap->out, - .once = true, }; struct kevent_copyops copyops = { .k_copyin = cloudabi64_kevent_copyin, @@ -369,40 +348,3 @@ cloudabi64_sys_poll(struct thread *td, struct cloudabi64_sys_poll_args *uap) return (kern_kevent_anonymous(td, uap->nsubscriptions, ©ops)); } - -int -cloudabi64_sys_poll_fd(struct thread *td, - struct cloudabi64_sys_poll_fd_args *uap) -{ - struct cloudabi64_kevent_args args = { - .in = uap->in, - .out = uap->out, - .once = false, - }; - struct kevent_copyops copyops = { - .k_copyin = cloudabi64_kevent_copyin, - .k_copyout = cloudabi64_kevent_copyout, - .arg = &args, - }; - cloudabi64_subscription_t subtimo; - struct timespec timeout; - int error; - - if (uap->timeout != NULL) { - /* Poll with a timeout. */ - error = copyin(uap->timeout, &subtimo, sizeof(subtimo)); - if (error != 0) - return (error); - if (subtimo.type != CLOUDABI_EVENTTYPE_CLOCK || - subtimo.clock.flags != 0) - return (EINVAL); - timeout.tv_sec = subtimo.clock.timeout / 1000000000; - timeout.tv_nsec = subtimo.clock.timeout % 1000000000; - return (kern_kevent(td, uap->fd, uap->in_len, uap->out_len, - ©ops, &timeout)); - } else { - /* Poll without a timeout. */ - return (kern_kevent(td, uap->fd, uap->in_len, uap->out_len, - ©ops, NULL)); - } -} diff --git a/sys/compat/cloudabi64/cloudabi64_proto.h b/sys/compat/cloudabi64/cloudabi64_proto.h index 7adbea2d2d2e..2f0302f9aa11 100644 --- a/sys/compat/cloudabi64/cloudabi64_proto.h +++ b/sys/compat/cloudabi64/cloudabi64_proto.h @@ -227,14 +227,6 @@ struct cloudabi64_sys_poll_args { char out_l_[PADL_(cloudabi64_event_t *)]; cloudabi64_event_t * out; char out_r_[PADR_(cloudabi64_event_t *)]; char nsubscriptions_l_[PADL_(size_t)]; size_t nsubscriptions; char nsubscriptions_r_[PADR_(size_t)]; }; -struct cloudabi64_sys_poll_fd_args { - char fd_l_[PADL_(cloudabi_fd_t)]; cloudabi_fd_t fd; char fd_r_[PADR_(cloudabi_fd_t)]; - char in_l_[PADL_(const cloudabi64_subscription_t *)]; const cloudabi64_subscription_t * in; char in_r_[PADR_(const cloudabi64_subscription_t *)]; - char in_len_l_[PADL_(size_t)]; size_t in_len; char in_len_r_[PADR_(size_t)]; - char out_l_[PADL_(cloudabi64_event_t *)]; cloudabi64_event_t * out; char out_r_[PADR_(cloudabi64_event_t *)]; - char out_len_l_[PADL_(size_t)]; size_t out_len; char out_len_r_[PADR_(size_t)]; - char timeout_l_[PADL_(const cloudabi64_subscription_t *)]; const cloudabi64_subscription_t * timeout; char timeout_r_[PADR_(const cloudabi64_subscription_t *)]; -}; struct cloudabi_sys_proc_exec_args { char fd_l_[PADL_(cloudabi_fd_t)]; cloudabi_fd_t fd; char fd_r_[PADR_(cloudabi_fd_t)]; char data_l_[PADL_(const void *)]; const void * data; char data_r_[PADR_(const void *)]; @@ -317,7 +309,6 @@ int cloudabi_sys_mem_protect(struct thread *, struct cloudabi_sys_mem_protect_ar int cloudabi_sys_mem_sync(struct thread *, struct cloudabi_sys_mem_sync_args *); int cloudabi_sys_mem_unmap(struct thread *, struct cloudabi_sys_mem_unmap_args *); int cloudabi64_sys_poll(struct thread *, struct cloudabi64_sys_poll_args *); -int cloudabi64_sys_poll_fd(struct thread *, struct cloudabi64_sys_poll_fd_args *); int cloudabi_sys_proc_exec(struct thread *, struct cloudabi_sys_proc_exec_args *); int cloudabi_sys_proc_exit(struct thread *, struct cloudabi_sys_proc_exit_args *); int cloudabi_sys_proc_fork(struct thread *, struct cloudabi_sys_proc_fork_args *); @@ -403,7 +394,6 @@ int cloudabi_sys_thread_yield(struct thread *, struct cloudabi_sys_thread_yield_ #define CLOUDABI64_SYS_AUE_cloudabi_sys_mem_sync AUE_NULL #define CLOUDABI64_SYS_AUE_cloudabi_sys_mem_unmap AUE_NULL #define CLOUDABI64_SYS_AUE_cloudabi64_sys_poll AUE_NULL -#define CLOUDABI64_SYS_AUE_cloudabi64_sys_poll_fd AUE_NULL #define CLOUDABI64_SYS_AUE_cloudabi_sys_proc_exec AUE_NULL #define CLOUDABI64_SYS_AUE_cloudabi_sys_proc_exit AUE_NULL #define CLOUDABI64_SYS_AUE_cloudabi_sys_proc_fork AUE_NULL diff --git a/sys/compat/cloudabi64/cloudabi64_syscall.h b/sys/compat/cloudabi64/cloudabi64_syscall.h index af22a32eae90..091faf1fefe6 100644 --- a/sys/compat/cloudabi64/cloudabi64_syscall.h +++ b/sys/compat/cloudabi64/cloudabi64_syscall.h @@ -43,16 +43,15 @@ #define CLOUDABI64_SYS_cloudabi_sys_mem_sync 35 #define CLOUDABI64_SYS_cloudabi_sys_mem_unmap 36 #define CLOUDABI64_SYS_cloudabi64_sys_poll 37 -#define CLOUDABI64_SYS_cloudabi64_sys_poll_fd 38 -#define CLOUDABI64_SYS_cloudabi_sys_proc_exec 39 -#define CLOUDABI64_SYS_cloudabi_sys_proc_exit 40 -#define CLOUDABI64_SYS_cloudabi_sys_proc_fork 41 -#define CLOUDABI64_SYS_cloudabi_sys_proc_raise 42 -#define CLOUDABI64_SYS_cloudabi_sys_random_get 43 -#define CLOUDABI64_SYS_cloudabi64_sys_sock_recv 44 -#define CLOUDABI64_SYS_cloudabi64_sys_sock_send 45 -#define CLOUDABI64_SYS_cloudabi_sys_sock_shutdown 46 -#define CLOUDABI64_SYS_cloudabi64_sys_thread_create 47 -#define CLOUDABI64_SYS_cloudabi_sys_thread_exit 48 -#define CLOUDABI64_SYS_cloudabi_sys_thread_yield 49 -#define CLOUDABI64_SYS_MAXSYSCALL 50 +#define CLOUDABI64_SYS_cloudabi_sys_proc_exec 38 +#define CLOUDABI64_SYS_cloudabi_sys_proc_exit 39 +#define CLOUDABI64_SYS_cloudabi_sys_proc_fork 40 +#define CLOUDABI64_SYS_cloudabi_sys_proc_raise 41 +#define CLOUDABI64_SYS_cloudabi_sys_random_get 42 +#define CLOUDABI64_SYS_cloudabi64_sys_sock_recv 43 +#define CLOUDABI64_SYS_cloudabi64_sys_sock_send 44 +#define CLOUDABI64_SYS_cloudabi_sys_sock_shutdown 45 +#define CLOUDABI64_SYS_cloudabi64_sys_thread_create 46 +#define CLOUDABI64_SYS_cloudabi_sys_thread_exit 47 +#define CLOUDABI64_SYS_cloudabi_sys_thread_yield 48 +#define CLOUDABI64_SYS_MAXSYSCALL 49 diff --git a/sys/compat/cloudabi64/cloudabi64_syscalls.c b/sys/compat/cloudabi64/cloudabi64_syscalls.c index 101ed369b276..c5ce5f368b9b 100644 --- a/sys/compat/cloudabi64/cloudabi64_syscalls.c +++ b/sys/compat/cloudabi64/cloudabi64_syscalls.c @@ -44,16 +44,15 @@ const char *cloudabi64_syscallnames[] = { "cloudabi_sys_mem_sync", /* 35 = cloudabi_sys_mem_sync */ "cloudabi_sys_mem_unmap", /* 36 = cloudabi_sys_mem_unmap */ "cloudabi64_sys_poll", /* 37 = cloudabi64_sys_poll */ - "cloudabi64_sys_poll_fd", /* 38 = cloudabi64_sys_poll_fd */ - "cloudabi_sys_proc_exec", /* 39 = cloudabi_sys_proc_exec */ - "cloudabi_sys_proc_exit", /* 40 = cloudabi_sys_proc_exit */ - "cloudabi_sys_proc_fork", /* 41 = cloudabi_sys_proc_fork */ - "cloudabi_sys_proc_raise", /* 42 = cloudabi_sys_proc_raise */ - "cloudabi_sys_random_get", /* 43 = cloudabi_sys_random_get */ - "cloudabi64_sys_sock_recv", /* 44 = cloudabi64_sys_sock_recv */ - "cloudabi64_sys_sock_send", /* 45 = cloudabi64_sys_sock_send */ - "cloudabi_sys_sock_shutdown", /* 46 = cloudabi_sys_sock_shutdown */ - "cloudabi64_sys_thread_create", /* 47 = cloudabi64_sys_thread_create */ - "cloudabi_sys_thread_exit", /* 48 = cloudabi_sys_thread_exit */ - "cloudabi_sys_thread_yield", /* 49 = cloudabi_sys_thread_yield */ + "cloudabi_sys_proc_exec", /* 38 = cloudabi_sys_proc_exec */ + "cloudabi_sys_proc_exit", /* 39 = cloudabi_sys_proc_exit */ + "cloudabi_sys_proc_fork", /* 40 = cloudabi_sys_proc_fork */ + "cloudabi_sys_proc_raise", /* 41 = cloudabi_sys_proc_raise */ + "cloudabi_sys_random_get", /* 42 = cloudabi_sys_random_get */ + "cloudabi64_sys_sock_recv", /* 43 = cloudabi64_sys_sock_recv */ + "cloudabi64_sys_sock_send", /* 44 = cloudabi64_sys_sock_send */ + "cloudabi_sys_sock_shutdown", /* 45 = cloudabi_sys_sock_shutdown */ + "cloudabi64_sys_thread_create", /* 46 = cloudabi64_sys_thread_create */ + "cloudabi_sys_thread_exit", /* 47 = cloudabi_sys_thread_exit */ + "cloudabi_sys_thread_yield", /* 48 = cloudabi_sys_thread_yield */ }; diff --git a/sys/compat/cloudabi64/cloudabi64_sysent.c b/sys/compat/cloudabi64/cloudabi64_sysent.c index 3772cdbb2722..f1ef767662f2 100644 --- a/sys/compat/cloudabi64/cloudabi64_sysent.c +++ b/sys/compat/cloudabi64/cloudabi64_sysent.c @@ -52,16 +52,15 @@ struct sysent cloudabi64_sysent[] = { { AS(cloudabi_sys_mem_sync_args), (sy_call_t *)cloudabi_sys_mem_sync, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 35 = cloudabi_sys_mem_sync */ { AS(cloudabi_sys_mem_unmap_args), (sy_call_t *)cloudabi_sys_mem_unmap, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 36 = cloudabi_sys_mem_unmap */ { AS(cloudabi64_sys_poll_args), (sy_call_t *)cloudabi64_sys_poll, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 37 = cloudabi64_sys_poll */ - { AS(cloudabi64_sys_poll_fd_args), (sy_call_t *)cloudabi64_sys_poll_fd, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 38 = cloudabi64_sys_poll_fd */ - { AS(cloudabi_sys_proc_exec_args), (sy_call_t *)cloudabi_sys_proc_exec, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 39 = cloudabi_sys_proc_exec */ - { AS(cloudabi_sys_proc_exit_args), (sy_call_t *)cloudabi_sys_proc_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 40 = cloudabi_sys_proc_exit */ - { 0, (sy_call_t *)cloudabi_sys_proc_fork, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 41 = cloudabi_sys_proc_fork */ - { AS(cloudabi_sys_proc_raise_args), (sy_call_t *)cloudabi_sys_proc_raise, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 42 = cloudabi_sys_proc_raise */ - { AS(cloudabi_sys_random_get_args), (sy_call_t *)cloudabi_sys_random_get, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 43 = cloudabi_sys_random_get */ - { AS(cloudabi64_sys_sock_recv_args), (sy_call_t *)cloudabi64_sys_sock_recv, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 44 = cloudabi64_sys_sock_recv */ - { AS(cloudabi64_sys_sock_send_args), (sy_call_t *)cloudabi64_sys_sock_send, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 45 = cloudabi64_sys_sock_send */ - { AS(cloudabi_sys_sock_shutdown_args), (sy_call_t *)cloudabi_sys_sock_shutdown, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 46 = cloudabi_sys_sock_shutdown */ - { AS(cloudabi64_sys_thread_create_args), (sy_call_t *)cloudabi64_sys_thread_create, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 47 = cloudabi64_sys_thread_create */ - { AS(cloudabi_sys_thread_exit_args), (sy_call_t *)cloudabi_sys_thread_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 48 = cloudabi_sys_thread_exit */ - { 0, (sy_call_t *)cloudabi_sys_thread_yield, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 49 = cloudabi_sys_thread_yield */ + { AS(cloudabi_sys_proc_exec_args), (sy_call_t *)cloudabi_sys_proc_exec, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 38 = cloudabi_sys_proc_exec */ + { AS(cloudabi_sys_proc_exit_args), (sy_call_t *)cloudabi_sys_proc_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 39 = cloudabi_sys_proc_exit */ + { 0, (sy_call_t *)cloudabi_sys_proc_fork, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 40 = cloudabi_sys_proc_fork */ + { AS(cloudabi_sys_proc_raise_args), (sy_call_t *)cloudabi_sys_proc_raise, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 41 = cloudabi_sys_proc_raise */ + { AS(cloudabi_sys_random_get_args), (sy_call_t *)cloudabi_sys_random_get, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 42 = cloudabi_sys_random_get */ + { AS(cloudabi64_sys_sock_recv_args), (sy_call_t *)cloudabi64_sys_sock_recv, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 43 = cloudabi64_sys_sock_recv */ + { AS(cloudabi64_sys_sock_send_args), (sy_call_t *)cloudabi64_sys_sock_send, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 44 = cloudabi64_sys_sock_send */ + { AS(cloudabi_sys_sock_shutdown_args), (sy_call_t *)cloudabi_sys_sock_shutdown, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 45 = cloudabi_sys_sock_shutdown */ + { AS(cloudabi64_sys_thread_create_args), (sy_call_t *)cloudabi64_sys_thread_create, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 46 = cloudabi64_sys_thread_create */ + { AS(cloudabi_sys_thread_exit_args), (sy_call_t *)cloudabi_sys_thread_exit, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 47 = cloudabi_sys_thread_exit */ + { 0, (sy_call_t *)cloudabi_sys_thread_yield, AUE_NULL, NULL, 0, 0, SYF_CAPENABLED, SY_THR_STATIC }, /* 48 = cloudabi_sys_thread_yield */ }; diff --git a/sys/compat/cloudabi64/cloudabi64_systrace_args.c b/sys/compat/cloudabi64/cloudabi64_systrace_args.c index 14f10ce64fb1..6dc8fc77163a 100644 --- a/sys/compat/cloudabi64/cloudabi64_systrace_args.c +++ b/sys/compat/cloudabi64/cloudabi64_systrace_args.c @@ -357,20 +357,8 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) *n_args = 3; break; } - /* cloudabi64_sys_poll_fd */ - case 38: { - struct cloudabi64_sys_poll_fd_args *p = params; - iarg[0] = p->fd; /* cloudabi_fd_t */ - uarg[1] = (intptr_t) p->in; /* const cloudabi64_subscription_t * */ - uarg[2] = p->in_len; /* size_t */ - uarg[3] = (intptr_t) p->out; /* cloudabi64_event_t * */ - uarg[4] = p->out_len; /* size_t */ - uarg[5] = (intptr_t) p->timeout; /* const cloudabi64_subscription_t * */ - *n_args = 6; - break; - } /* cloudabi_sys_proc_exec */ - case 39: { + case 38: { struct cloudabi_sys_proc_exec_args *p = params; iarg[0] = p->fd; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->data; /* const void * */ @@ -381,26 +369,26 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_proc_exit */ - case 40: { + case 39: { struct cloudabi_sys_proc_exit_args *p = params; iarg[0] = p->rval; /* cloudabi_exitcode_t */ *n_args = 1; break; } /* cloudabi_sys_proc_fork */ - case 41: { + case 40: { *n_args = 0; break; } /* cloudabi_sys_proc_raise */ - case 42: { + case 41: { struct cloudabi_sys_proc_raise_args *p = params; iarg[0] = p->sig; /* cloudabi_signal_t */ *n_args = 1; break; } /* cloudabi_sys_random_get */ - case 43: { + case 42: { struct cloudabi_sys_random_get_args *p = params; uarg[0] = (intptr_t) p->buf; /* void * */ uarg[1] = p->buf_len; /* size_t */ @@ -408,7 +396,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi64_sys_sock_recv */ - case 44: { + case 43: { struct cloudabi64_sys_sock_recv_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->in; /* const cloudabi64_recv_in_t * */ @@ -417,7 +405,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi64_sys_sock_send */ - case 45: { + case 44: { struct cloudabi64_sys_sock_send_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ uarg[1] = (intptr_t) p->in; /* const cloudabi64_send_in_t * */ @@ -426,7 +414,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_sock_shutdown */ - case 46: { + case 45: { struct cloudabi_sys_sock_shutdown_args *p = params; iarg[0] = p->sock; /* cloudabi_fd_t */ iarg[1] = p->how; /* cloudabi_sdflags_t */ @@ -434,14 +422,14 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi64_sys_thread_create */ - case 47: { + case 46: { struct cloudabi64_sys_thread_create_args *p = params; uarg[0] = (intptr_t) p->attr; /* cloudabi64_threadattr_t * */ *n_args = 1; break; } /* cloudabi_sys_thread_exit */ - case 48: { + case 47: { struct cloudabi_sys_thread_exit_args *p = params; uarg[0] = (intptr_t) p->lock; /* cloudabi_lock_t * */ iarg[1] = p->scope; /* cloudabi_scope_t */ @@ -449,7 +437,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) break; } /* cloudabi_sys_thread_yield */ - case 49: { + case 48: { *n_args = 0; break; } @@ -1083,33 +1071,8 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; }; break; - /* cloudabi64_sys_poll_fd */ - case 38: - switch(ndx) { - case 0: - p = "cloudabi_fd_t"; - break; - case 1: - p = "userland const cloudabi64_subscription_t *"; - break; - case 2: - p = "size_t"; - break; - case 3: - p = "userland cloudabi64_event_t *"; - break; - case 4: - p = "size_t"; - break; - case 5: - p = "userland const cloudabi64_subscription_t *"; - break; - default: - break; - }; - break; /* cloudabi_sys_proc_exec */ - case 39: + case 38: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1131,7 +1094,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_proc_exit */ - case 40: + case 39: switch(ndx) { case 0: p = "cloudabi_exitcode_t"; @@ -1141,10 +1104,10 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_proc_fork */ - case 41: + case 40: break; /* cloudabi_sys_proc_raise */ - case 42: + case 41: switch(ndx) { case 0: p = "cloudabi_signal_t"; @@ -1154,7 +1117,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_random_get */ - case 43: + case 42: switch(ndx) { case 0: p = "userland void *"; @@ -1167,7 +1130,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi64_sys_sock_recv */ - case 44: + case 43: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1183,7 +1146,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi64_sys_sock_send */ - case 45: + case 44: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1199,7 +1162,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_sock_shutdown */ - case 46: + case 45: switch(ndx) { case 0: p = "cloudabi_fd_t"; @@ -1212,7 +1175,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi64_sys_thread_create */ - case 47: + case 46: switch(ndx) { case 0: p = "userland cloudabi64_threadattr_t *"; @@ -1222,7 +1185,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_thread_exit */ - case 48: + case 47: switch(ndx) { case 0: p = "userland cloudabi_lock_t *"; @@ -1235,7 +1198,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) }; break; /* cloudabi_sys_thread_yield */ - case 49: + case 48: break; default: break; @@ -1438,60 +1401,55 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) if (ndx == 0 || ndx == 1) p = "size_t"; break; - /* cloudabi64_sys_poll_fd */ - case 38: - if (ndx == 0 || ndx == 1) - p = "size_t"; - break; /* cloudabi_sys_proc_exec */ - case 39: + case 38: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_proc_exit */ - case 40: + case 39: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_proc_fork */ - case 41: + case 40: /* cloudabi_sys_proc_raise */ - case 42: + case 41: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_random_get */ - case 43: + case 42: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi64_sys_sock_recv */ - case 44: + case 43: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi64_sys_sock_send */ - case 45: + case 44: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_sock_shutdown */ - case 46: + case 45: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi64_sys_thread_create */ - case 47: + case 46: if (ndx == 0 || ndx == 1) p = "cloudabi_tid_t"; break; /* cloudabi_sys_thread_exit */ - case 48: + case 47: if (ndx == 0 || ndx == 1) p = "void"; break; /* cloudabi_sys_thread_yield */ - case 49: + case 48: default: break; }; diff --git a/sys/contrib/cloudabi/cloudabi32_types.h b/sys/contrib/cloudabi/cloudabi32_types.h index 95dac188e4fd..58f4d7cb9bb0 100644 --- a/sys/contrib/cloudabi/cloudabi32_types.h +++ b/sys/contrib/cloudabi/cloudabi32_types.h @@ -156,7 +156,7 @@ _Static_assert(_Alignof(cloudabi32_send_out_t) == 4, "Incorrect layout"); typedef struct { _Alignas(8) cloudabi_userdata_t userdata; - _Alignas(2) cloudabi_subflags_t flags; + _Alignas(2) uint16_t unused; _Alignas(1) cloudabi_eventtype_t type; union { struct { @@ -186,7 +186,7 @@ typedef struct { }; } cloudabi32_subscription_t; _Static_assert(offsetof(cloudabi32_subscription_t, userdata) == 0, "Incorrect layout"); -_Static_assert(offsetof(cloudabi32_subscription_t, flags) == 8, "Incorrect layout"); +_Static_assert(offsetof(cloudabi32_subscription_t, unused) == 8, "Incorrect layout"); _Static_assert(offsetof(cloudabi32_subscription_t, type) == 10, "Incorrect layout"); _Static_assert(offsetof(cloudabi32_subscription_t, clock.identifier) == 16, "Incorrect layout"); _Static_assert(offsetof(cloudabi32_subscription_t, clock.clock_id) == 24, "Incorrect layout"); diff --git a/sys/contrib/cloudabi/cloudabi64_types.h b/sys/contrib/cloudabi/cloudabi64_types.h index bb624cf736c2..f45ad81e8b38 100644 --- a/sys/contrib/cloudabi/cloudabi64_types.h +++ b/sys/contrib/cloudabi/cloudabi64_types.h @@ -156,7 +156,7 @@ _Static_assert(_Alignof(cloudabi64_send_out_t) == 8, "Incorrect layout"); typedef struct { _Alignas(8) cloudabi_userdata_t userdata; - _Alignas(2) cloudabi_subflags_t flags; + _Alignas(2) uint16_t unused; _Alignas(1) cloudabi_eventtype_t type; union { struct { @@ -186,7 +186,7 @@ typedef struct { }; } cloudabi64_subscription_t; _Static_assert(offsetof(cloudabi64_subscription_t, userdata) == 0, "Incorrect layout"); -_Static_assert(offsetof(cloudabi64_subscription_t, flags) == 8, "Incorrect layout"); +_Static_assert(offsetof(cloudabi64_subscription_t, unused) == 8, "Incorrect layout"); _Static_assert(offsetof(cloudabi64_subscription_t, type) == 10, "Incorrect layout"); _Static_assert(offsetof(cloudabi64_subscription_t, clock.identifier) == 16, "Incorrect layout"); _Static_assert(offsetof(cloudabi64_subscription_t, clock.clock_id) == 24, "Incorrect layout"); diff --git a/sys/contrib/cloudabi/cloudabi_types_common.h b/sys/contrib/cloudabi/cloudabi_types_common.h index 2f0c03d8da01..1c403b00d330 100644 --- a/sys/contrib/cloudabi/cloudabi_types_common.h +++ b/sys/contrib/cloudabi/cloudabi_types_common.h @@ -59,8 +59,6 @@ typedef uint32_t cloudabi_auxtype_t; #define CLOUDABI_AT_SYSINFO_EHDR 262 #define CLOUDABI_AT_TID 261 -typedef uint32_t cloudabi_backlog_t; - typedef uint32_t cloudabi_clockid_t; #define CLOUDABI_CLOCK_MONOTONIC 1 #define CLOUDABI_CLOCK_PROCESS_CPUTIME_ID 2 @@ -191,7 +189,6 @@ typedef uint8_t cloudabi_filetype_t; #define CLOUDABI_FILETYPE_BLOCK_DEVICE 16 #define CLOUDABI_FILETYPE_CHARACTER_DEVICE 17 #define CLOUDABI_FILETYPE_DIRECTORY 32 -#define CLOUDABI_FILETYPE_POLL 64 #define CLOUDABI_FILETYPE_PROCESS 80 #define CLOUDABI_FILETYPE_REGULAR_FILE 96 #define CLOUDABI_FILETYPE_SHARED_MEMORY 112 @@ -276,9 +273,7 @@ typedef uint64_t cloudabi_rights_t; #define CLOUDABI_RIGHT_MEM_MAP 0x0000000004000000 #define CLOUDABI_RIGHT_MEM_MAP_EXEC 0x0000000008000000 #define CLOUDABI_RIGHT_POLL_FD_READWRITE 0x0000000010000000 -#define CLOUDABI_RIGHT_POLL_MODIFY 0x0000000020000000 #define CLOUDABI_RIGHT_POLL_PROC_TERMINATE 0x0000000040000000 -#define CLOUDABI_RIGHT_POLL_WAIT 0x0000000080000000 #define CLOUDABI_RIGHT_PROC_EXEC 0x0000000100000000 #define CLOUDABI_RIGHT_SOCK_SHUTDOWN 0x0000008000000000 @@ -327,14 +322,6 @@ typedef uint8_t cloudabi_signal_t; typedef uint16_t cloudabi_subclockflags_t; #define CLOUDABI_SUBSCRIPTION_CLOCK_ABSTIME 0x0001 -typedef uint16_t cloudabi_subflags_t; -#define CLOUDABI_SUBSCRIPTION_ADD 0x0001 -#define CLOUDABI_SUBSCRIPTION_CLEAR 0x0002 -#define CLOUDABI_SUBSCRIPTION_DELETE 0x0004 -#define CLOUDABI_SUBSCRIPTION_DISABLE 0x0008 -#define CLOUDABI_SUBSCRIPTION_ENABLE 0x0010 -#define CLOUDABI_SUBSCRIPTION_ONESHOT 0x0020 - typedef uint16_t cloudabi_subrwflags_t; #define CLOUDABI_SUBSCRIPTION_FD_READWRITE_POLL 0x0001 diff --git a/sys/contrib/cloudabi/cloudabi_vdso_aarch64.S b/sys/contrib/cloudabi/cloudabi_vdso_aarch64.S index 7c98e5b3f005..eeccd74b93e1 100644 --- a/sys/contrib/cloudabi/cloudabi_vdso_aarch64.S +++ b/sys/contrib/cloudabi/cloudabi_vdso_aarch64.S @@ -353,32 +353,20 @@ ENTRY(cloudabi_sys_poll) ret END(cloudabi_sys_poll) -ENTRY(cloudabi_sys_poll_fd) - str x6, [sp, #-8] - mov w8, #38 - svc #0 - ldr x2, [sp, #-8] - b.cs 1f - str x0, [x2] - mov w0, wzr -1: - ret -END(cloudabi_sys_poll_fd) - ENTRY(cloudabi_sys_proc_exec) - mov w8, #39 + mov w8, #38 svc #0 ret END(cloudabi_sys_proc_exec) ENTRY(cloudabi_sys_proc_exit) - mov w8, #40 + mov w8, #39 svc #0 END(cloudabi_sys_proc_exit) ENTRY(cloudabi_sys_proc_fork) stp x0, x1, [sp, #-16] - mov w8, #41 + mov w8, #40 svc #0 ldp x2, x3, [sp, #-16] b.cs 1f @@ -390,38 +378,38 @@ ENTRY(cloudabi_sys_proc_fork) END(cloudabi_sys_proc_fork) ENTRY(cloudabi_sys_proc_raise) - mov w8, #42 + mov w8, #41 svc #0 ret END(cloudabi_sys_proc_raise) ENTRY(cloudabi_sys_random_get) - mov w8, #43 + mov w8, #42 svc #0 ret END(cloudabi_sys_random_get) ENTRY(cloudabi_sys_sock_recv) - mov w8, #44 + mov w8, #43 svc #0 ret END(cloudabi_sys_sock_recv) ENTRY(cloudabi_sys_sock_send) - mov w8, #45 + mov w8, #44 svc #0 ret END(cloudabi_sys_sock_send) ENTRY(cloudabi_sys_sock_shutdown) - mov w8, #46 + mov w8, #45 svc #0 ret END(cloudabi_sys_sock_shutdown) ENTRY(cloudabi_sys_thread_create) str x1, [sp, #-8] - mov w8, #47 + mov w8, #46 svc #0 ldr x2, [sp, #-8] b.cs 1f @@ -432,12 +420,12 @@ ENTRY(cloudabi_sys_thread_create) END(cloudabi_sys_thread_create) ENTRY(cloudabi_sys_thread_exit) - mov w8, #48 + mov w8, #47 svc #0 END(cloudabi_sys_thread_exit) ENTRY(cloudabi_sys_thread_yield) - mov w8, #49 + mov w8, #48 svc #0 ret END(cloudabi_sys_thread_yield) diff --git a/sys/contrib/cloudabi/cloudabi_vdso_armv6.S b/sys/contrib/cloudabi/cloudabi_vdso_armv6.S index 7ca7a39419d6..36aa8f018a3d 100644 --- a/sys/contrib/cloudabi/cloudabi_vdso_armv6.S +++ b/sys/contrib/cloudabi/cloudabi_vdso_armv6.S @@ -320,30 +320,21 @@ ENTRY(cloudabi_sys_poll) bx lr END(cloudabi_sys_poll) -ENTRY(cloudabi_sys_poll_fd) - mov ip, #38 - swi 0 - ldrcc r2, [sp, #8] - strcc r0, [r2] - movcc r0, $0 - bx lr -END(cloudabi_sys_poll_fd) - ENTRY(cloudabi_sys_proc_exec) - mov ip, #39 + mov ip, #38 swi 0 bx lr END(cloudabi_sys_proc_exec) ENTRY(cloudabi_sys_proc_exit) - mov ip, #40 + mov ip, #39 swi 0 END(cloudabi_sys_proc_exit) ENTRY(cloudabi_sys_proc_fork) str r0, [sp, #-4] str r1, [sp, #-8] - mov ip, #41 + mov ip, #40 swi 0 ldrcc r2, [sp, #-4] ldrcc r3, [sp, #-8] @@ -354,38 +345,38 @@ ENTRY(cloudabi_sys_proc_fork) END(cloudabi_sys_proc_fork) ENTRY(cloudabi_sys_proc_raise) - mov ip, #42 + mov ip, #41 swi 0 bx lr END(cloudabi_sys_proc_raise) ENTRY(cloudabi_sys_random_get) - mov ip, #43 + mov ip, #42 swi 0 bx lr END(cloudabi_sys_random_get) ENTRY(cloudabi_sys_sock_recv) - mov ip, #44 + mov ip, #43 swi 0 bx lr END(cloudabi_sys_sock_recv) ENTRY(cloudabi_sys_sock_send) - mov ip, #45 + mov ip, #44 swi 0 bx lr END(cloudabi_sys_sock_send) ENTRY(cloudabi_sys_sock_shutdown) - mov ip, #46 + mov ip, #45 swi 0 bx lr END(cloudabi_sys_sock_shutdown) ENTRY(cloudabi_sys_thread_create) str r1, [sp, #-4] - mov ip, #47 + mov ip, #46 swi 0 ldrcc r2, [sp, #-4] strcc r0, [r2] @@ -394,12 +385,12 @@ ENTRY(cloudabi_sys_thread_create) END(cloudabi_sys_thread_create) ENTRY(cloudabi_sys_thread_exit) - mov ip, #48 + mov ip, #47 swi 0 END(cloudabi_sys_thread_exit) ENTRY(cloudabi_sys_thread_yield) - mov ip, #49 + mov ip, #48 swi 0 bx lr END(cloudabi_sys_thread_yield) diff --git a/sys/contrib/cloudabi/cloudabi_vdso_i686.S b/sys/contrib/cloudabi/cloudabi_vdso_i686.S index 135ea8d55bf1..6180ce90e82a 100644 --- a/sys/contrib/cloudabi/cloudabi_vdso_i686.S +++ b/sys/contrib/cloudabi/cloudabi_vdso_i686.S @@ -342,30 +342,19 @@ ENTRY(cloudabi_sys_poll) ret END(cloudabi_sys_poll) -ENTRY(cloudabi_sys_poll_fd) - mov $38, %eax - int $0x80 - jc 1f - mov 28(%esp), %ecx - mov %eax, (%ecx) - xor %eax, %eax -1: - ret -END(cloudabi_sys_poll_fd) - ENTRY(cloudabi_sys_proc_exec) - mov $39, %eax + mov $38, %eax int $0x80 ret END(cloudabi_sys_proc_exec) ENTRY(cloudabi_sys_proc_exit) - mov $40, %eax + mov $39, %eax int $0x80 END(cloudabi_sys_proc_exit) ENTRY(cloudabi_sys_proc_fork) - mov $41, %eax + mov $40, %eax int $0x80 jc 1f mov 4(%esp), %ecx @@ -378,37 +367,37 @@ ENTRY(cloudabi_sys_proc_fork) END(cloudabi_sys_proc_fork) ENTRY(cloudabi_sys_proc_raise) - mov $42, %eax + mov $41, %eax int $0x80 ret END(cloudabi_sys_proc_raise) ENTRY(cloudabi_sys_random_get) - mov $43, %eax + mov $42, %eax int $0x80 ret END(cloudabi_sys_random_get) ENTRY(cloudabi_sys_sock_recv) - mov $44, %eax + mov $43, %eax int $0x80 ret END(cloudabi_sys_sock_recv) ENTRY(cloudabi_sys_sock_send) - mov $45, %eax + mov $44, %eax int $0x80 ret END(cloudabi_sys_sock_send) ENTRY(cloudabi_sys_sock_shutdown) - mov $46, %eax + mov $45, %eax int $0x80 ret END(cloudabi_sys_sock_shutdown) ENTRY(cloudabi_sys_thread_create) - mov $47, %eax + mov $46, %eax int $0x80 jc 1f mov 8(%esp), %ecx @@ -419,12 +408,12 @@ ENTRY(cloudabi_sys_thread_create) END(cloudabi_sys_thread_create) ENTRY(cloudabi_sys_thread_exit) - mov $48, %eax + mov $47, %eax int $0x80 END(cloudabi_sys_thread_exit) ENTRY(cloudabi_sys_thread_yield) - mov $49, %eax + mov $48, %eax int $0x80 ret END(cloudabi_sys_thread_yield) diff --git a/sys/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S b/sys/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S index 009f928d71e5..a64cf070a529 100644 --- a/sys/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S +++ b/sys/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S @@ -873,40 +873,6 @@ ENTRY(cloudabi_sys_poll) ret END(cloudabi_sys_poll) -ENTRY(cloudabi_sys_poll_fd) - push %ebp - mov %esp, %ebp - mov 8(%ebp), %ecx - mov %ecx, -48(%ebp) - mov 12(%ebp), %ecx - mov %ecx, -40(%ebp) - movl $0, -36(%ebp) - mov 16(%ebp), %ecx - mov %ecx, -32(%ebp) - movl $0, -28(%ebp) - mov 20(%ebp), %ecx - mov %ecx, -24(%ebp) - movl $0, -20(%ebp) - mov 24(%ebp), %ecx - mov %ecx, -16(%ebp) - movl $0, -12(%ebp) - mov 28(%ebp), %ecx - mov %ecx, -8(%ebp) - movl $0, -4(%ebp) - mov $38, %eax - mov %ebp, %ecx - sub $48, %ecx - int $0x80 - test %eax, %eax - jnz 1f - mov 32(%ebp), %ecx - mov -48(%ebp), %edx - mov %edx, 0(%ecx) -1: - pop %ebp - ret -END(cloudabi_sys_poll_fd) - ENTRY(cloudabi_sys_proc_exec) push %ebp mov %esp, %ebp @@ -924,7 +890,7 @@ ENTRY(cloudabi_sys_proc_exec) mov 24(%ebp), %ecx mov %ecx, -8(%ebp) movl $0, -4(%ebp) - mov $39, %eax + mov $38, %eax mov %ebp, %ecx sub $40, %ecx int $0x80 @@ -937,7 +903,7 @@ ENTRY(cloudabi_sys_proc_exit) mov %esp, %ebp mov 8(%ebp), %ecx mov %ecx, -16(%ebp) - mov $40, %eax + mov $39, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -946,7 +912,7 @@ END(cloudabi_sys_proc_exit) ENTRY(cloudabi_sys_proc_fork) push %ebp mov %esp, %ebp - mov $41, %eax + mov $40, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -968,7 +934,7 @@ ENTRY(cloudabi_sys_proc_raise) mov %esp, %ebp mov 8(%ebp), %ecx mov %ecx, -16(%ebp) - mov $42, %eax + mov $41, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -985,7 +951,7 @@ ENTRY(cloudabi_sys_random_get) mov 12(%ebp), %ecx mov %ecx, -8(%ebp) movl $0, -4(%ebp) - mov $43, %eax + mov $42, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -1004,7 +970,7 @@ ENTRY(cloudabi_sys_sock_recv) mov 16(%ebp), %ecx mov %ecx, -8(%ebp) movl $0, -4(%ebp) - mov $44, %eax + mov $43, %eax mov %ebp, %ecx sub $24, %ecx int $0x80 @@ -1023,7 +989,7 @@ ENTRY(cloudabi_sys_sock_send) mov 16(%ebp), %ecx mov %ecx, -8(%ebp) movl $0, -4(%ebp) - mov $45, %eax + mov $44, %eax mov %ebp, %ecx sub $24, %ecx int $0x80 @@ -1038,7 +1004,7 @@ ENTRY(cloudabi_sys_sock_shutdown) mov %ecx, -16(%ebp) mov 12(%ebp), %ecx mov %ecx, -8(%ebp) - mov $46, %eax + mov $45, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -1052,7 +1018,7 @@ ENTRY(cloudabi_sys_thread_create) mov 8(%ebp), %ecx mov %ecx, -16(%ebp) movl $0, -12(%ebp) - mov $47, %eax + mov $46, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -1074,7 +1040,7 @@ ENTRY(cloudabi_sys_thread_exit) movl $0, -12(%ebp) mov 12(%ebp), %ecx mov %ecx, -8(%ebp) - mov $48, %eax + mov $47, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 @@ -1083,7 +1049,7 @@ END(cloudabi_sys_thread_exit) ENTRY(cloudabi_sys_thread_yield) push %ebp mov %esp, %ebp - mov $49, %eax + mov $48, %eax mov %ebp, %ecx sub $16, %ecx int $0x80 diff --git a/sys/contrib/cloudabi/cloudabi_vdso_x86_64.S b/sys/contrib/cloudabi/cloudabi_vdso_x86_64.S index 217bd1cbea0a..4703597f7a62 100644 --- a/sys/contrib/cloudabi/cloudabi_vdso_x86_64.S +++ b/sys/contrib/cloudabi/cloudabi_vdso_x86_64.S @@ -368,34 +368,22 @@ ENTRY(cloudabi_sys_poll) ret END(cloudabi_sys_poll) -ENTRY(cloudabi_sys_poll_fd) - mov %rcx, %r10 - mov $38, %eax - syscall - jc 1f - mov 8(%rsp), %rcx - mov %rax, (%rcx) - xor %eax, %eax -1: - ret -END(cloudabi_sys_poll_fd) - ENTRY(cloudabi_sys_proc_exec) mov %rcx, %r10 - mov $39, %eax + mov $38, %eax syscall ret END(cloudabi_sys_proc_exec) ENTRY(cloudabi_sys_proc_exit) - mov $40, %eax + mov $39, %eax syscall END(cloudabi_sys_proc_exit) ENTRY(cloudabi_sys_proc_fork) push %rdi push %rsi - mov $41, %eax + mov $40, %eax syscall pop %rsi pop %rcx @@ -408,38 +396,38 @@ ENTRY(cloudabi_sys_proc_fork) END(cloudabi_sys_proc_fork) ENTRY(cloudabi_sys_proc_raise) - mov $42, %eax + mov $41, %eax syscall ret END(cloudabi_sys_proc_raise) ENTRY(cloudabi_sys_random_get) - mov $43, %eax + mov $42, %eax syscall ret END(cloudabi_sys_random_get) ENTRY(cloudabi_sys_sock_recv) - mov $44, %eax + mov $43, %eax syscall ret END(cloudabi_sys_sock_recv) ENTRY(cloudabi_sys_sock_send) - mov $45, %eax + mov $44, %eax syscall ret END(cloudabi_sys_sock_send) ENTRY(cloudabi_sys_sock_shutdown) - mov $46, %eax + mov $45, %eax syscall ret END(cloudabi_sys_sock_shutdown) ENTRY(cloudabi_sys_thread_create) push %rsi - mov $47, %eax + mov $46, %eax syscall pop %rcx jc 1f @@ -450,12 +438,12 @@ ENTRY(cloudabi_sys_thread_create) END(cloudabi_sys_thread_create) ENTRY(cloudabi_sys_thread_exit) - mov $48, %eax + mov $47, %eax syscall END(cloudabi_sys_thread_exit) ENTRY(cloudabi_sys_thread_yield) - mov $49, %eax + mov $48, %eax syscall ret END(cloudabi_sys_thread_yield) diff --git a/sys/contrib/cloudabi/syscalls32.master b/sys/contrib/cloudabi/syscalls32.master index 6ed39ec7ed98..0d6eb94fb0d3 100644 --- a/sys/contrib/cloudabi/syscalls32.master +++ b/sys/contrib/cloudabi/syscalls32.master @@ -231,52 +231,44 @@ cloudabi32_event_t *out, \ size_t nsubscriptions); } -38 AUE_NULL STD { size_t cloudabi32_sys_poll_fd( \ - cloudabi_fd_t fd, \ - const cloudabi32_subscription_t *in, \ - size_t in_len, \ - cloudabi32_event_t *out, \ - size_t out_len, \ - const cloudabi32_subscription_t *timeout); } - -39 AUE_NULL STD { void cloudabi_sys_proc_exec( \ +38 AUE_NULL STD { void cloudabi_sys_proc_exec( \ cloudabi_fd_t fd, \ const void *data, \ size_t data_len, \ const cloudabi_fd_t *fds, \ size_t fds_len); } -40 AUE_NULL STD { void cloudabi_sys_proc_exit( \ +39 AUE_NULL STD { void cloudabi_sys_proc_exit( \ cloudabi_exitcode_t rval); } -41 AUE_NULL STD { void cloudabi_sys_proc_fork(); } +40 AUE_NULL STD { void cloudabi_sys_proc_fork(); } -42 AUE_NULL STD { void cloudabi_sys_proc_raise( \ +41 AUE_NULL STD { void cloudabi_sys_proc_raise( \ cloudabi_signal_t sig); } -43 AUE_NULL STD { void cloudabi_sys_random_get( \ +42 AUE_NULL STD { void cloudabi_sys_random_get( \ void *buf, \ size_t buf_len); } -44 AUE_NULL STD { void cloudabi32_sys_sock_recv( \ +43 AUE_NULL STD { void cloudabi32_sys_sock_recv( \ cloudabi_fd_t sock, \ const cloudabi32_recv_in_t *in, \ cloudabi32_recv_out_t *out); } -45 AUE_NULL STD { void cloudabi32_sys_sock_send( \ +44 AUE_NULL STD { void cloudabi32_sys_sock_send( \ cloudabi_fd_t sock, \ const cloudabi32_send_in_t *in, \ cloudabi32_send_out_t *out); } -46 AUE_NULL STD { void cloudabi_sys_sock_shutdown( \ +45 AUE_NULL STD { void cloudabi_sys_sock_shutdown( \ cloudabi_fd_t sock, \ cloudabi_sdflags_t how); } -47 AUE_NULL STD { cloudabi_tid_t cloudabi32_sys_thread_create( \ +46 AUE_NULL STD { cloudabi_tid_t cloudabi32_sys_thread_create( \ cloudabi32_threadattr_t *attr); } -48 AUE_NULL STD { void cloudabi_sys_thread_exit( \ +47 AUE_NULL STD { void cloudabi_sys_thread_exit( \ cloudabi_lock_t *lock, \ cloudabi_scope_t scope); } -49 AUE_NULL STD { void cloudabi_sys_thread_yield(); } +48 AUE_NULL STD { void cloudabi_sys_thread_yield(); } diff --git a/sys/contrib/cloudabi/syscalls64.master b/sys/contrib/cloudabi/syscalls64.master index 81a77dcbefd1..678598aff338 100644 --- a/sys/contrib/cloudabi/syscalls64.master +++ b/sys/contrib/cloudabi/syscalls64.master @@ -231,52 +231,44 @@ cloudabi64_event_t *out, \ size_t nsubscriptions); } -38 AUE_NULL STD { size_t cloudabi64_sys_poll_fd( \ - cloudabi_fd_t fd, \ - const cloudabi64_subscription_t *in, \ - size_t in_len, \ - cloudabi64_event_t *out, \ - size_t out_len, \ - const cloudabi64_subscription_t *timeout); } - -39 AUE_NULL STD { void cloudabi_sys_proc_exec( \ +38 AUE_NULL STD { void cloudabi_sys_proc_exec( \ cloudabi_fd_t fd, \ const void *data, \ size_t data_len, \ const cloudabi_fd_t *fds, \ size_t fds_len); } -40 AUE_NULL STD { void cloudabi_sys_proc_exit( \ +39 AUE_NULL STD { void cloudabi_sys_proc_exit( \ cloudabi_exitcode_t rval); } -41 AUE_NULL STD { void cloudabi_sys_proc_fork(); } +40 AUE_NULL STD { void cloudabi_sys_proc_fork(); } -42 AUE_NULL STD { void cloudabi_sys_proc_raise( \ +41 AUE_NULL STD { void cloudabi_sys_proc_raise( \ cloudabi_signal_t sig); } -43 AUE_NULL STD { void cloudabi_sys_random_get( \ +42 AUE_NULL STD { void cloudabi_sys_random_get( \ void *buf, \ size_t buf_len); } -44 AUE_NULL STD { void cloudabi64_sys_sock_recv( \ +43 AUE_NULL STD { void cloudabi64_sys_sock_recv( \ cloudabi_fd_t sock, \ const cloudabi64_recv_in_t *in, \ cloudabi64_recv_out_t *out); } -45 AUE_NULL STD { void cloudabi64_sys_sock_send( \ +44 AUE_NULL STD { void cloudabi64_sys_sock_send( \ cloudabi_fd_t sock, \ const cloudabi64_send_in_t *in, \ cloudabi64_send_out_t *out); } -46 AUE_NULL STD { void cloudabi_sys_sock_shutdown( \ +45 AUE_NULL STD { void cloudabi_sys_sock_shutdown( \ cloudabi_fd_t sock, \ cloudabi_sdflags_t how); } -47 AUE_NULL STD { cloudabi_tid_t cloudabi64_sys_thread_create( \ +46 AUE_NULL STD { cloudabi_tid_t cloudabi64_sys_thread_create( \ cloudabi64_threadattr_t *attr); } -48 AUE_NULL STD { void cloudabi_sys_thread_exit( \ +47 AUE_NULL STD { void cloudabi_sys_thread_exit( \ cloudabi_lock_t *lock, \ cloudabi_scope_t scope); } -49 AUE_NULL STD { void cloudabi_sys_thread_yield(); } +48 AUE_NULL STD { void cloudabi_sys_thread_yield(); } diff --git a/usr.bin/truss/syscalls.c b/usr.bin/truss/syscalls.c index f6585ebc3abd..251a43f6cec3 100644 --- a/usr.bin/truss/syscalls.c +++ b/usr.bin/truss/syscalls.c @@ -734,7 +734,7 @@ static struct xlat cloudabi_fdsflags[] = { static struct xlat cloudabi_filetype[] = { X(FILETYPE_UNKNOWN) X(FILETYPE_BLOCK_DEVICE) X(FILETYPE_CHARACTER_DEVICE) X(FILETYPE_DIRECTORY) - X(FILETYPE_POLL) X(FILETYPE_PROCESS) X(FILETYPE_REGULAR_FILE) + X(FILETYPE_PROCESS) X(FILETYPE_REGULAR_FILE) X(FILETYPE_SHARED_MEMORY) X(FILETYPE_SOCKET_DGRAM) X(FILETYPE_SOCKET_STREAM) X(FILETYPE_SYMBOLIC_LINK) XEND From dd00a8cd290a4189c3e0cf4aad5100e6b4ec66f7 Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Wed, 18 Oct 2017 19:28:28 +0000 Subject: [PATCH 158/219] ql*_def.h: fix QL_ALIGN parenthesization QL_ALIGN is a set of copies of roundup2, but it was missing an outer set of parentheses, which began to matter with r324538. Now, fully copy the parenthesization of roundup2. Reviewed by: davidcs Differential Revision: https://reviews.freebsd.org/D12673 --- sys/dev/qlnx/qlnxe/qlnx_def.h | 2 +- sys/dev/qlxgb/qla_def.h | 2 +- sys/dev/qlxgbe/ql_def.h | 2 +- sys/dev/qlxge/qls_def.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/dev/qlnx/qlnxe/qlnx_def.h b/sys/dev/qlnx/qlnxe/qlnx_def.h index dad7a10e73e8..6c487e578a2b 100644 --- a/sys/dev/qlnx/qlnxe/qlnx_def.h +++ b/sys/dev/qlnx/qlnxe/qlnx_def.h @@ -486,7 +486,7 @@ struct qlnx_host { typedef struct qlnx_host qlnx_host_t; /* note that align has to be a power of 2 */ -#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1); +#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1))) #define QL_MIN(x, y) ((x < y) ? x : y) #define QL_RUNNING(ifp) \ diff --git a/sys/dev/qlxgb/qla_def.h b/sys/dev/qlxgb/qla_def.h index 77b678c7bc83..d5b11c156768 100644 --- a/sys/dev/qlxgb/qla_def.h +++ b/sys/dev/qlxgb/qla_def.h @@ -200,7 +200,7 @@ struct qla_host { typedef struct qla_host qla_host_t; /* note that align has to be a power of 2 */ -#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1); +#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1))) #define QL_MIN(x, y) ((x < y) ? x : y) #define QL_RUNNING(ifp) \ diff --git a/sys/dev/qlxgbe/ql_def.h b/sys/dev/qlxgbe/ql_def.h index 8d864ab75ba7..168cd265f66c 100644 --- a/sys/dev/qlxgbe/ql_def.h +++ b/sys/dev/qlxgbe/ql_def.h @@ -263,7 +263,7 @@ struct qla_host { typedef struct qla_host qla_host_t; /* note that align has to be a power of 2 */ -#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1); +#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1))) #define QL_MIN(x, y) ((x < y) ? x : y) #define QL_RUNNING(ifp) (ifp->if_drv_flags & IFF_DRV_RUNNING) diff --git a/sys/dev/qlxge/qls_def.h b/sys/dev/qlxge/qls_def.h index 815946fafd5f..8d191e060290 100644 --- a/sys/dev/qlxge/qls_def.h +++ b/sys/dev/qlxge/qls_def.h @@ -361,7 +361,7 @@ struct qla_host { typedef struct qla_host qla_host_t; /* note that align has to be a power of 2 */ -#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1); +#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1))) #define QL_MIN(x, y) ((x < y) ? x : y) #define QL_RUNNING(ifp) \ From 7f75695a3e94f6dcc05af95655e73a90ae44e3be Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Wed, 18 Oct 2017 20:17:44 +0000 Subject: [PATCH 159/219] Abort an SCTP association, when a DATA chunk is followed by an unknown chunk with a length smaller than the minimum length. Thanks to Felix Weinrank for making me aware of the problem. MFC after: 3 days --- sys/netinet/sctp_indata.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/sys/netinet/sctp_indata.c b/sys/netinet/sctp_indata.c index 49f2f9053cd2..8fa04fe1f664 100644 --- a/sys/netinet/sctp_indata.c +++ b/sys/netinet/sctp_indata.c @@ -2696,7 +2696,8 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, } /* get pointer to the first chunk header */ ch = (struct sctp_chunkhdr *)sctp_m_getptr(m, *offset, - sizeof(struct sctp_chunkhdr), (uint8_t *)&chunk_buf); + sizeof(struct sctp_chunkhdr), + (uint8_t *)&chunk_buf); if (ch == NULL) { return (1); } @@ -2753,7 +2754,8 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, struct mbuf *op_err; char msg[SCTP_DIAG_INFO_LEN]; - snprintf(msg, sizeof(msg), "DATA chunk of length %d", + snprintf(msg, sizeof(msg), "%s chunk of length %d", + ch->chunk_type == SCTP_DATA ? "DATA" : "I-DATA", chk_length); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_20; @@ -2830,7 +2832,25 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, return (2); } default: - /* unknown chunk type, use bit rules */ + /* + * Unknown chunk type: use bit rules after + * checking length + */ + if (chk_length < sizeof(struct sctp_chunkhdr)) { + /* + * Need to send an abort since we + * had a invalid chunk. + */ + struct mbuf *op_err; + char msg[SCTP_DIAG_INFO_LEN]; + + snprintf(msg, sizeof(msg), "Chunk of length %d", + chk_length); + op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_20; + sctp_abort_an_association(inp, stcb, op_err, SCTP_SO_NOT_LOCKED); + return (2); + } if (ch->chunk_type & 0x40) { /* Add a error report to the queue */ struct mbuf *op_err; @@ -2866,7 +2886,8 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, continue; } ch = (struct sctp_chunkhdr *)sctp_m_getptr(m, *offset, - sizeof(struct sctp_chunkhdr), (uint8_t *)&chunk_buf); + sizeof(struct sctp_chunkhdr), + (uint8_t *)&chunk_buf); if (ch == NULL) { *offset = length; stop_proc = 1; From af03054c8a0a157f4a3f826b646ac6d853886749 Mon Sep 17 00:00:00 2001 From: Michael Tuexen Date: Wed, 18 Oct 2017 21:08:35 +0000 Subject: [PATCH 160/219] Fix a signed/unsigned warning. MFC after: 1 week --- sys/netinet/sctp_indata.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sys/netinet/sctp_indata.c b/sys/netinet/sctp_indata.c index 8fa04fe1f664..79fe5d9e65c3 100644 --- a/sys/netinet/sctp_indata.c +++ b/sys/netinet/sctp_indata.c @@ -2641,10 +2641,11 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, struct sctp_association *asoc; int num_chunks = 0; /* number of control chunks processed */ int stop_proc = 0; - int chk_length, break_flag, last_chunk; + int break_flag, last_chunk; int abort_flag = 0, was_a_gap; struct mbuf *m; uint32_t highest_tsn; + uint16_t chk_length; /* set the rwnd */ sctp_set_rwnd(stcb, &stcb->asoc); @@ -2739,7 +2740,7 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, } if ((ch->chunk_type == SCTP_DATA) || (ch->chunk_type == SCTP_IDATA)) { - int clen; + uint16_t clen; if (ch->chunk_type == SCTP_DATA) { clen = sizeof(struct sctp_data_chunk); @@ -2754,7 +2755,7 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, struct mbuf *op_err; char msg[SCTP_DIAG_INFO_LEN]; - snprintf(msg, sizeof(msg), "%s chunk of length %d", + snprintf(msg, sizeof(msg), "%s chunk of length %u", ch->chunk_type == SCTP_DATA ? "DATA" : "I-DATA", chk_length); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); @@ -2844,7 +2845,7 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, struct mbuf *op_err; char msg[SCTP_DIAG_INFO_LEN]; - snprintf(msg, sizeof(msg), "Chunk of length %d", + snprintf(msg, sizeof(msg), "Chunk of length %u", chk_length); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_20; From c69a1a50cd13a8ef705ece1748bd93b7474cfee1 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Wed, 18 Oct 2017 22:00:44 +0000 Subject: [PATCH 161/219] Don't take Giant for SMP status and cpu topology sysctls. Not only this lock doesn't play any role here, dirtying it slows down other things a little bit as giant-held checks (e.g. DROP_GIANT) are spread all over the kernel. MFC after: 1 week --- sys/kern/sched_ule.c | 2 +- sys/kern/subr_smp.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/sys/kern/sched_ule.c b/sys/kern/sched_ule.c index a4d0a040297e..c6889ccd9332 100644 --- a/sys/kern/sched_ule.c +++ b/sys/kern/sched_ule.c @@ -2939,7 +2939,7 @@ SYSCTL_INT(_kern_sched, OID_AUTO, steal_idle, CTLFLAG_RW, &steal_idle, 0, SYSCTL_INT(_kern_sched, OID_AUTO, steal_thresh, CTLFLAG_RW, &steal_thresh, 0, "Minimum load on remote CPU before we'll steal"); SYSCTL_PROC(_kern_sched, OID_AUTO, topology_spec, CTLTYPE_STRING | - CTLFLAG_RD, NULL, 0, sysctl_kern_sched_topology_spec, "A", + CTLFLAG_MPSAFE | CTLFLAG_RD, NULL, 0, sysctl_kern_sched_topology_spec, "A", "XML dump of detected CPU topology"); #endif diff --git a/sys/kern/subr_smp.c b/sys/kern/subr_smp.c index 81e11ee70e73..108705c98a25 100644 --- a/sys/kern/subr_smp.c +++ b/sys/kern/subr_smp.c @@ -84,8 +84,9 @@ SYSCTL_INT(_kern_smp, OID_AUTO, maxid, CTLFLAG_RD|CTLFLAG_CAPRD, &mp_maxid, 0, SYSCTL_INT(_kern_smp, OID_AUTO, maxcpus, CTLFLAG_RD|CTLFLAG_CAPRD, &mp_maxcpus, 0, "Max number of CPUs that the system was compiled for."); -SYSCTL_PROC(_kern_smp, OID_AUTO, active, CTLFLAG_RD | CTLTYPE_INT, NULL, 0, - sysctl_kern_smp_active, "I", "Indicates system is running in SMP mode"); +SYSCTL_PROC(_kern_smp, OID_AUTO, active, CTLFLAG_RD|CTLTYPE_INT|CTLFLAG_MPSAFE, + NULL, 0, sysctl_kern_smp_active, "I", + "Indicates system is running in SMP mode"); int smp_disabled = 0; /* has smp been disabled? */ SYSCTL_INT(_kern_smp, OID_AUTO, disabled, CTLFLAG_RDTUN|CTLFLAG_CAPRD, From 72cc0b3d93a081c2d1490729fdbf490632d78619 Mon Sep 17 00:00:00 2001 From: Benjamin Kaduk Date: Wed, 18 Oct 2017 22:56:46 +0000 Subject: [PATCH 162/219] Adopt jail.8 to our brave new bsdinstall world Submitted by: Steve Kargl MFC after: 3 days --- usr.sbin/jail/jail.8 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usr.sbin/jail/jail.8 b/usr.sbin/jail/jail.8 index f728dbf153c0..166c79b8b0b0 100644 --- a/usr.sbin/jail/jail.8 +++ b/usr.sbin/jail/jail.8 @@ -1006,7 +1006,7 @@ jail -c path=/data/jail/testjail mount.devfs \\ .Pp Assuming no errors, you will end up with a shell prompt within the jail. You can now run -.Pa /usr/sbin/sysinstall +.Pa /usr/sbin/bsdinstall and do the post-install configuration to set various configuration options, or perform these actions manually by editing .Pa /etc/rc.conf , From cb1c79008ee951895ac07a66dff92c6e97ec8066 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Thu, 19 Oct 2017 00:31:00 +0000 Subject: [PATCH 163/219] sysvsem: check if semu_list has anything on it before grabbing the lock This should get a process-specific support instead. MFC after: 1 week --- sys/kern/sysv_sem.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/kern/sysv_sem.c b/sys/kern/sysv_sem.c index 60688960e24e..116fc437e4b9 100644 --- a/sys/kern/sysv_sem.c +++ b/sys/kern/sysv_sem.c @@ -1412,6 +1412,8 @@ semexit_myhook(void *arg, struct proc *p) * Go through the chain of undo vectors looking for one * associated with this process. */ + if (LIST_EMPTY(&semu_list)) + return; SEMUNDO_LOCK(); LIST_FOREACH(suptr, &semu_list, un_next) { if (suptr->un_proc == p) From 80a2397a38c0a30f2b9a111546bf4d8ed420d7fd Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Thu, 19 Oct 2017 00:38:14 +0000 Subject: [PATCH 164/219] Tidy up pmc support at execve. The proc-specific check is inherently racy, so the code can just unlock beforehand. MFC after: 1 week --- sys/kern/kern_exec.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/sys/kern/kern_exec.c b/sys/kern/kern_exec.c index 953da2d908a7..47ca142c65c6 100644 --- a/sys/kern/kern_exec.c +++ b/sys/kern/kern_exec.c @@ -849,28 +849,23 @@ do_execve(struct thread *td, struct image_args *args, struct mac *mac_p) p->p_args = newargs; newargs = NULL; + PROC_UNLOCK(p); + #ifdef HWPMC_HOOKS /* * Check if system-wide sampling is in effect or if the * current process is using PMCs. If so, do exec() time * processing. This processing needs to happen AFTER the * P_INEXEC flag is cleared. - * - * The proc lock needs to be released before taking the PMC - * SX. */ if (PMC_SYSTEM_SAMPLING_ACTIVE() || PMC_PROC_IS_USING_PMCS(p)) { - PROC_UNLOCK(p); VOP_UNLOCK(imgp->vp, 0); pe.pm_credentialschanged = credential_changing; pe.pm_entryaddr = imgp->entry_addr; PMC_CALL_HOOK_X(td, PMC_FN_PROCESS_EXEC, (void *) &pe); vn_lock(imgp->vp, LK_SHARED | LK_RETRY); - } else - PROC_UNLOCK(p); -#else /* !HWPMC_HOOKS */ - PROC_UNLOCK(p); + } #endif /* Set values passed into the program in registers. */ From e6b645ae89f67c8b5ea2cc82560606e475fbebe1 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Thu, 19 Oct 2017 00:46:15 +0000 Subject: [PATCH 165/219] execve: avoid one proc lock/unlock trip unless PTRACE_EXEC is set MFC after: 1 week --- sys/kern/kern_exec.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/sys/kern/kern_exec.c b/sys/kern/kern_exec.c index 47ca142c65c6..3c594da1b2c5 100644 --- a/sys/kern/kern_exec.c +++ b/sys/kern/kern_exec.c @@ -900,10 +900,12 @@ do_execve(struct thread *td, struct image_args *args, struct mac *mac_p) free(imgp->freepath, M_TEMP); if (error == 0) { - PROC_LOCK(p); - if (p->p_ptevents & PTRACE_EXEC) - td->td_dbgflags |= TDB_EXEC; - PROC_UNLOCK(p); + if (p->p_ptevents & PTRACE_EXEC) { + PROC_LOCK(p); + if (p->p_ptevents & PTRACE_EXEC) + td->td_dbgflags |= TDB_EXEC; + PROC_UNLOCK(p); + } /* * Stop the process here if its stop event mask has From 9b8de76beb76736056b41fb3a486786c236a0fb2 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Thu, 19 Oct 2017 01:38:31 +0000 Subject: [PATCH 166/219] sysctl: only take mem lock if oldlen is > 4 * PAGE_SIZE The previous limit of just one page is hit by ps. The entire mechanism should be reworked, if not whacked. It seems the intent is to reduce kernel dos-ability - some handlers wire the amount of memory passed here. Handlers should probably stop wiring in the first place or in the worst case indicate they are doing so so that the check is done only if necessary. It should also probably be a counter, not a lock. MFC after: 1 week --- sys/kern/kern_sysctl.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/sys/kern/kern_sysctl.c b/sys/kern/kern_sysctl.c index ad8a0c72ef83..340549ff5749 100644 --- a/sys/kern/kern_sysctl.c +++ b/sys/kern/kern_sysctl.c @@ -2109,12 +2109,11 @@ userland_sysctl(struct thread *td, int *name, u_int namelen, void *old, if (KTRPOINT(curthread, KTR_SYSCTL)) ktrsysctl(name, namelen); #endif - - if (req.oldptr && req.oldlen > PAGE_SIZE) { + memlocked = 0; + if (req.oldptr && req.oldlen > 4 * PAGE_SIZE) { memlocked = 1; sx_xlock(&sysctlmemlock); - } else - memlocked = 0; + } CURVNET_SET(TD_TO_VNET(td)); for (;;) { From 5ff24e4eb4bf16de46d27e4ee3d0d95ed74eb992 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Thu, 19 Oct 2017 02:14:39 +0000 Subject: [PATCH 167/219] Remove some unnecessary includes --- sys/powerpc/mpc85xx/fsl_diu.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/sys/powerpc/mpc85xx/fsl_diu.c b/sys/powerpc/mpc85xx/fsl_diu.c index 5019b209d1f3..a63775567c87 100644 --- a/sys/powerpc/mpc85xx/fsl_diu.c +++ b/sys/powerpc/mpc85xx/fsl_diu.c @@ -35,13 +35,8 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include -#include -#include #include #include -#include -#include #include #include @@ -59,8 +54,6 @@ __FBSDID("$FreeBSD$"); #include -#include "gpio_if.h" - #include #include From dde76442926d61e8a4a79e6dbf497cdec6b89264 Mon Sep 17 00:00:00 2001 From: Cy Schubert Date: Thu, 19 Oct 2017 03:17:50 +0000 Subject: [PATCH 168/219] Anticongestion refinements for ntpd rc script. This reverts r324681 and checks if ntp leapfile needs fetching before entering into the anticongestion sleep. Unfortunately some ports still use their own sleeps so, this commit doesn't address the complete problem which is compounded by every port that uses its own anticongestion mechanism. Discussed with: asomers --- etc/defaults/periodic.conf | 2 -- etc/periodic/daily/480.leapfile-ntpd | 9 ++------- etc/rc.d/ntpd | 20 ++++++++++++++++++-- 3 files changed, 20 insertions(+), 11 deletions(-) diff --git a/etc/defaults/periodic.conf b/etc/defaults/periodic.conf index 64d9ba487e10..801733301318 100644 --- a/etc/defaults/periodic.conf +++ b/etc/defaults/periodic.conf @@ -141,8 +141,6 @@ daily_status_mail_rejects_shorten="NO" # Shorten output # 480.leapfile-ntpd daily_ntpd_leapfile_enable="YES" # Fetch NTP leapfile -daily_ntpd_leapfile_background="NO" # Fetch NTP leapfile - # in the background # 480.status-ntpd daily_status_ntpd_enable="NO" # Check NTP status diff --git a/etc/periodic/daily/480.leapfile-ntpd b/etc/periodic/daily/480.leapfile-ntpd index 0924a7445cad..a693986e0dd1 100755 --- a/etc/periodic/daily/480.leapfile-ntpd +++ b/etc/periodic/daily/480.leapfile-ntpd @@ -13,15 +13,10 @@ fi case "$daily_ntpd_leapfile_enable" in [Yy][Ee][Ss]) - case "$daily_ntpd_leapfile_background" in - [Yy][Ee][Ss]) - (anticongestion && service ntpd onefetch) & - ;; - *) + if service ntpd oneneedfetch; then anticongestion service ntpd onefetch - ;; - esac + fi ;; esac diff --git a/etc/rc.d/ntpd b/etc/rc.d/ntpd index a0cb54362541..6021f89b0c2d 100755 --- a/etc/rc.d/ntpd +++ b/etc/rc.d/ntpd @@ -15,8 +15,9 @@ desc="Network Time Protocol daemon" rcvar="ntpd_enable" command="/usr/sbin/${name}" pidfile="/var/run/${name}.pid" -extra_commands="fetch" +extra_commands="fetch needfetch" fetch_cmd="ntpd_fetch_leapfile" +needfetch_cmd="ntpd_needfetch_leapfile" start_precmd="ntpd_precmd" load_rc_config $name @@ -90,7 +91,7 @@ ntpd_init_leapfile() { fi } -ntpd_fetch_leapfile() { +ntpd_needfetch_leapfile() { local ntp_tmp_leapfile rc verbose if checkyesno ntp_leapfile_fetch_verbose; then @@ -122,6 +123,21 @@ ntpd_fetch_leapfile() { ntp_leap_fetch_date=$((ntp_leap_expiry-ntp_leapfile_expiry_seconds)) if [ $(current_ntp_ts) -ge $ntp_leap_fetch_date ]; then $verbose Within ntp leapfile expiry limit, initiating fetch + # Return code 0: ntp leapfile fetch needed + return 0 + fi + # Return code 1: ntp leapfile fetch not needed + return 1 +} + +ntpd_fetch_leapfile() { + if checkyesno ntp_leapfile_fetch_verbose; then + verbose=echo + else + verbose=: + fi + + if ntpd_needfetch_leapfile ; then for url in $ntp_leapfile_sources ; do $verbose fetching $url fetch $ntp_leapfile_fetch_opts -o $ntp_tmp_leapfile $url && break From 12accff18624fe67c78a62c4484c8046a7dbf6e8 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Thu, 19 Oct 2017 03:38:53 +0000 Subject: [PATCH 169/219] Add some more devices to the MPC85XX-based configs These devices bring the configs closer to a desktop-like (GENERIC) kernel config. * The Freescale DIU support was added to the config in r306358. Without keyboard support video support is nearly pointless, so add ukbd and ums. * The AmigaOne X5000, and P1022 devboard, both use a variant of the ds1307 RTC * cpufreq scaling is currently supported by the p1022. More SoCs will be added eventually. --- sys/powerpc/conf/MPC85XX | 4 ++++ sys/powerpc/conf/MPC85XXSPE | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sys/powerpc/conf/MPC85XX b/sys/powerpc/conf/MPC85XX index fe32f298c995..640e7319284a 100644 --- a/sys/powerpc/conf/MPC85XX +++ b/sys/powerpc/conf/MPC85XX @@ -67,9 +67,11 @@ options DDB_CTF # Kernel ELF linker loads CTF data device ata device bpf device cfi +device cpufreq device crypto device cryptodev device da +device ds1307 device ds1553 device em device alc @@ -102,6 +104,8 @@ device uart options USB_DEBUG # enable debug msgs #device uhci device ehci +device ukbd +device ums device umass device usb device vlan diff --git a/sys/powerpc/conf/MPC85XXSPE b/sys/powerpc/conf/MPC85XXSPE index d1928a5b208c..087737e5798a 100644 --- a/sys/powerpc/conf/MPC85XXSPE +++ b/sys/powerpc/conf/MPC85XXSPE @@ -67,9 +67,11 @@ options DDB_CTF # Kernel ELF linker loads CTF data device ata device bpf device cfi +device cpufreq device crypto device cryptodev device da +device ds1307 device ds1553 device em device alc @@ -103,6 +105,8 @@ device uart options USB_DEBUG # enable debug msgs #device uhci device ehci +device ukbd +device ums device umass device usb device vlan From 4074d642d214ae365d63ba2f2e825be746739abf Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Thu, 19 Oct 2017 04:13:47 +0000 Subject: [PATCH 170/219] Batch atomic updates to the number of active, inactive, and laundry pages by vm_object_terminate_pages(). For example, for a "buildworld" workload, this batching reduces vm_object_terminate_pages()'s average execution time by 12%. (The total savings were about 11.7 billion processor cycles.) Reviewed by: kib MFC after: 1 week --- sys/vm/vm_object.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c index 270477e57405..bcf1204b9937 100644 --- a/sys/vm/vm_object.c +++ b/sys/vm/vm_object.c @@ -715,6 +715,7 @@ vm_object_terminate_pages(vm_object_t object) vm_page_t p, p_next; struct mtx *mtx, *mtx1; struct vm_pagequeue *pq, *pq1; + int dequeued; VM_OBJECT_ASSERT_WLOCKED(object); @@ -739,6 +740,7 @@ vm_object_terminate_pages(vm_object_t object) if (mtx != NULL) mtx_unlock(mtx); if (pq != NULL) { + vm_pagequeue_cnt_add(pq, dequeued); vm_pagequeue_unlock(pq); pq = NULL; } @@ -756,19 +758,27 @@ vm_object_terminate_pages(vm_object_t object) "page %p is not queued", p)); pq1 = vm_page_pagequeue(p); if (pq != pq1) { - if (pq != NULL) + if (pq != NULL) { + vm_pagequeue_cnt_add(pq, dequeued); vm_pagequeue_unlock(pq); + } pq = pq1; vm_pagequeue_lock(pq); + dequeued = 0; } + p->queue = PQ_NONE; + TAILQ_REMOVE(&pq->pq_pl, p, plinks.q); + dequeued--; } if (vm_page_free_prep(p, true)) continue; unlist: TAILQ_REMOVE(&object->memq, p, listq); } - if (pq != NULL) + if (pq != NULL) { + vm_pagequeue_cnt_add(pq, dequeued); vm_pagequeue_unlock(pq); + } if (mtx != NULL) mtx_unlock(mtx); From 81098a018e280f577402918ead340af27e5e9b89 Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Thu, 19 Oct 2017 09:01:15 +0000 Subject: [PATCH 171/219] Relax per-ifnet cif_vrs list double locking in carp(4). In all cases where cif_vrs list is modified, two locks are held: per-ifnet CIF_LOCK and global carp_sx. It means to read that list only one of them is enough to be held, so we can skip CIF_LOCK when we already have carp_sx. This fixes kernel panic, caused by attempts of copyout() to sleep while holding non-sleepable CIF_LOCK mutex. Discussed with: glebius MFC after: 2 weeks Sponsored by: iXsystems, Inc. --- sys/netinet/ip_carp.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/sys/netinet/ip_carp.c b/sys/netinet/ip_carp.c index b84df2396082..eb2e455cbe67 100644 --- a/sys/netinet/ip_carp.c +++ b/sys/netinet/ip_carp.c @@ -175,8 +175,8 @@ static int proto_reg[] = {-1, -1}; * Each softc has a lock sc_mtx. It is used to synchronise carp_input_c(), * callout-driven events and ioctl()s. * - * To traverse the list of softcs on an ifnet we use CIF_LOCK(), to - * traverse the global list we use the mutex carp_mtx. + * To traverse the list of softcs on an ifnet we use CIF_LOCK() or carp_sx. + * To traverse the global list we use the mutex carp_mtx. * * Known issues with locking: * @@ -286,7 +286,8 @@ SYSCTL_VNET_PCPUSTAT(_net_inet_carp, OID_AUTO, stats, struct carpstats, ++_i) #define IFNET_FOREACH_CARP(ifp, sc) \ - CIF_LOCK_ASSERT(ifp->if_carp); \ + KASSERT(mtx_owned(&ifp->if_carp->cif_mtx) || \ + sx_xlocked(&carp_sx), ("cif_vrs not locked")); \ TAILQ_FOREACH((sc), &(ifp)->if_carp->cif_vrs, sc_list) #define DEMOTE_ADVSKEW(sc) \ @@ -1562,6 +1563,8 @@ carp_alloc(struct ifnet *ifp) struct carp_softc *sc; struct carp_if *cif; + sx_assert(&carp_sx, SA_XLOCKED); + if ((cif = ifp->if_carp) == NULL) cif = carp_alloc_if(ifp); @@ -1751,11 +1754,9 @@ carp_ioctl(struct ifreq *ifr, u_long cmd, struct thread *td) } if (ifp->if_carp) { - CIF_LOCK(ifp->if_carp); IFNET_FOREACH_CARP(ifp, sc) if (sc->sc_vhid == carpr.carpr_vhid) break; - CIF_UNLOCK(ifp->if_carp); } if (sc == NULL) { sc = carp_alloc(ifp); @@ -1826,11 +1827,9 @@ carp_ioctl(struct ifreq *ifr, u_long cmd, struct thread *td) priveleged = (priv_check(td, PRIV_NETINET_CARP) == 0); if (carpr.carpr_vhid != 0) { - CIF_LOCK(ifp->if_carp); IFNET_FOREACH_CARP(ifp, sc) if (sc->sc_vhid == carpr.carpr_vhid) break; - CIF_UNLOCK(ifp->if_carp); if (sc == NULL) { error = ENOENT; break; @@ -1841,7 +1840,6 @@ carp_ioctl(struct ifreq *ifr, u_long cmd, struct thread *td) int i, count; count = 0; - CIF_LOCK(ifp->if_carp); IFNET_FOREACH_CARP(ifp, sc) count++; @@ -1863,7 +1861,6 @@ carp_ioctl(struct ifreq *ifr, u_long cmd, struct thread *td) } i++; } - CIF_UNLOCK(ifp->if_carp); } break; } @@ -1918,11 +1915,9 @@ carp_attach(struct ifaddr *ifa, int vhid) return (ENOPROTOOPT); } - CIF_LOCK(cif); IFNET_FOREACH_CARP(ifp, sc) if (sc->sc_vhid == vhid) break; - CIF_UNLOCK(cif); if (sc == NULL) { sx_xunlock(&carp_sx); return (ENOENT); From 027bebe8e1be3f30c262cde5075f91613a246e63 Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 19 Oct 2017 12:55:11 +0000 Subject: [PATCH 172/219] msdosfs: fix build with MSDOSFS_DEBUG Inspired by a patch submission by longwitz@incore.de with many changes for ino64 in HEAD. PR: 199152 MFC after: 2 weeks Sponsored by: The FreeBSD Foundation --- sys/fs/msdosfs/msdosfs_conv.c | 2 +- sys/fs/msdosfs/msdosfs_denode.c | 5 +++-- sys/fs/msdosfs/msdosfs_vfsops.c | 4 ++++ sys/fs/msdosfs/msdosfs_vnops.c | 11 +++++++---- 4 files changed, 15 insertions(+), 7 deletions(-) diff --git a/sys/fs/msdosfs/msdosfs_conv.c b/sys/fs/msdosfs/msdosfs_conv.c index 6d92c60be355..debf1984782f 100644 --- a/sys/fs/msdosfs/msdosfs_conv.c +++ b/sys/fs/msdosfs/msdosfs_conv.c @@ -594,7 +594,7 @@ winChkName(struct mbnambuf *nbp, const u_char *un, size_t unlen, int chksum, return -1; #ifdef MSDOSFS_DEBUG - printf("winChkName(): un=%s:%d,d_name=%s:%d\n", un, unlen, + printf("winChkName(): un=%s:%zu,d_name=%s:%d\n", un, unlen, dirbuf.d_name, dirbuf.d_namlen); #endif diff --git a/sys/fs/msdosfs/msdosfs_denode.c b/sys/fs/msdosfs/msdosfs_denode.c index 4b1f0c70472b..1c67568273f1 100644 --- a/sys/fs/msdosfs/msdosfs_denode.c +++ b/sys/fs/msdosfs/msdosfs_denode.c @@ -590,8 +590,9 @@ msdosfs_inactive(struct vop_inactive_args *ap) * as empty. (This may not be necessary for the dos filesystem.) */ #ifdef MSDOSFS_DEBUG - printf("msdosfs_inactive(): dep %p, refcnt %ld, mntflag %x, MNT_RDONLY %x\n", - dep, dep->de_refcnt, vp->v_mount->mnt_flag, MNT_RDONLY); + printf("msdosfs_inactive(): dep %p, refcnt %ld, mntflag %llx, MNT_RDONLY %llx\n", + dep, dep->de_refcnt, (unsigned long long)vp->v_mount->mnt_flag, + (unsigned long long)MNT_RDONLY); #endif if (dep->de_refcnt <= 0 && (vp->v_mount->mnt_flag & MNT_RDONLY) == 0) { error = detrunc(dep, (u_long) 0, 0, NOCRED); diff --git a/sys/fs/msdosfs/msdosfs_vfsops.c b/sys/fs/msdosfs/msdosfs_vfsops.c index 30b463c46083..237c1b9592c3 100644 --- a/sys/fs/msdosfs/msdosfs_vfsops.c +++ b/sys/fs/msdosfs/msdosfs_vfsops.c @@ -75,6 +75,10 @@ #include #include +#ifdef MSDOSFS_DEBUG +#include +#endif + static const char msdosfs_lock_msg[] = "fatlk"; /* Mount options that we support. */ diff --git a/sys/fs/msdosfs/msdosfs_vnops.c b/sys/fs/msdosfs/msdosfs_vnops.c index 2af5ae0c892e..1a3b8bbc10dc 100644 --- a/sys/fs/msdosfs/msdosfs_vnops.c +++ b/sys/fs/msdosfs/msdosfs_vnops.c @@ -348,10 +348,13 @@ msdosfs_setattr(struct vop_setattr_args *ap) (vap->va_bytes != VNOVAL) || (vap->va_gen != VNOVAL)) { #ifdef MSDOSFS_DEBUG printf("msdosfs_setattr(): returning EINVAL\n"); - printf(" va_type %d, va_nlink %x, va_fsid %lx, va_fileid %lx\n", - vap->va_type, vap->va_nlink, vap->va_fsid, vap->va_fileid); - printf(" va_blocksize %lx, va_rdev %x, va_bytes %qx, va_gen %lx\n", - vap->va_blocksize, vap->va_rdev, vap->va_bytes, vap->va_gen); + printf(" va_type %d, va_nlink %llx, va_fsid %llx, va_fileid %llx\n", + vap->va_type, (unsigned long long)vap->va_nlink, + (unsigned long long)vap->va_fsid, + (unsigned long long)vap->va_fileid); + printf(" va_blocksize %lx, va_rdev %llx, va_bytes %llx, va_gen %lx\n", + vap->va_blocksize, (unsigned long long)vap->va_rdev, + (unsigned long long)vap->va_bytes, vap->va_gen); printf(" va_uid %x, va_gid %x\n", vap->va_uid, vap->va_gid); #endif From 833a983e5e36db2432043e4c7495d9f13954f7c6 Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Thu, 19 Oct 2017 13:22:52 +0000 Subject: [PATCH 173/219] Allow later PSCI revisions to also work. The latest ARM Trusted Firmware reports version 1.1 so the check was failing. As thjis is a minor change from 1.0, and future 1.x revisions are also expected to be backwards compatible just ignore the minor revision in the init handler. Sponsored by: DARPA, AFRL --- sys/dev/psci/psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/psci/psci.c b/sys/dev/psci/psci.c index b62962f5818a..ea656bb6be66 100644 --- a/sys/dev/psci/psci.c +++ b/sys/dev/psci/psci.c @@ -493,7 +493,7 @@ psci_v0_2_init(device_t dev) return (1); if ((PSCI_VER_MAJOR(version) == 0 && PSCI_VER_MINOR(version) == 2) || - (PSCI_VER_MAJOR(version) == 1 && PSCI_VER_MINOR(version) == 0)) { + PSCI_VER_MAJOR(version) == 1) { if (bootverbose) device_printf(dev, "PSCI version 0.2 available\n"); From 13bacc714438c1589c6c5388ca15bb49dd8c9dd1 Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Thu, 19 Oct 2017 16:36:07 +0000 Subject: [PATCH 174/219] remove spa_sync_on assert from spa_async_thread_vd Unlike spa_async_thread that can get started only from spa_sync() spa_async_thread_vd can get started from other contexts. Additionally, spa_async_thread_vd does not really depend on spa sync being enabled. The incorrect assert could be triggered by importing a pool in the read-only mode and then disconnecting one of its disks. In this case spa_sync_on was false because the pool was read-only and spa_async_thread_vd was started to handle SPA_ASYNC_REMOVE event. Note: spa_async_thread_vd() currently exists only in FreeBSD, it was split out of spa_async_thread() in r253990. Discussed with: mav MFC after: 2 weeks --- sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c index 87649a421ca8..ae6dc57b6f29 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c @@ -6247,8 +6247,6 @@ spa_async_thread_vd(void *arg) spa_t *spa = arg; int tasks; - ASSERT(spa->spa_sync_on); - mutex_enter(&spa->spa_async_lock); tasks = spa->spa_async_tasks; retry: From a5c9ec376b5978521db674ccbfe234a1a9a3535d Mon Sep 17 00:00:00 2001 From: Ed Maste Date: Thu, 19 Oct 2017 16:40:17 +0000 Subject: [PATCH 175/219] psci: change bootverbose string to 'PSCI 0.2 compatible' Prior to r324754 we treated PSCI 0.2 and 1.0 as identical, and r324754 extended that to include all PSCI 1.x revisions. Change the string emitted under bootverbose to reference '0.2 compatible' to avoid confusion when the system includes a later PSCI rev. Discussed with: andrew Sponsored by: The FreeBSD Foundation --- sys/dev/psci/psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/psci/psci.c b/sys/dev/psci/psci.c index ea656bb6be66..83c9bdb9a1a4 100644 --- a/sys/dev/psci/psci.c +++ b/sys/dev/psci/psci.c @@ -495,7 +495,7 @@ psci_v0_2_init(device_t dev) if ((PSCI_VER_MAJOR(version) == 0 && PSCI_VER_MINOR(version) == 2) || PSCI_VER_MAJOR(version) == 1) { if (bootverbose) - device_printf(dev, "PSCI version 0.2 available\n"); + device_printf(dev, "PSCI version 0.2 compatible\n"); /* * We only register this for v0.2 since v0.1 doesn't support From 3fcbb8c0a9966ef9bd4fc7f5cdf85106427c29c5 Mon Sep 17 00:00:00 2001 From: Fedor Uporov Date: Thu, 19 Oct 2017 16:42:03 +0000 Subject: [PATCH 176/219] Fix unused variable + style(9) fixes inside the ext4_ext_find_extent() Approved by: pfg (mentor) Reported by: Coverity CID: 1381754 MFC after: 6 months --- sys/fs/ext2fs/ext2_extents.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/sys/fs/ext2fs/ext2_extents.c b/sys/fs/ext2fs/ext2_extents.c index 788f089e29a6..c7bd74a44cda 100644 --- a/sys/fs/ext2fs/ext2_extents.c +++ b/sys/fs/ext2fs/ext2_extents.c @@ -377,11 +377,11 @@ ext4_ext_find_extent(struct inode *ip, daddr_t block, if (error) return (error); - if (!ppath) + if (ppath == NULL) return (EINVAL); path = *ppath; - if (!path) { + if (path == NULL) { path = malloc(EXT4_EXT_DEPTH_MAX * sizeof(struct ext4_extent_path), M_EXT2EXTENTS, M_WAITOK | M_ZERO); @@ -1349,7 +1349,7 @@ ext4_ext_rm_leaf(struct inode *ip, struct ext4_extent_path *path, uint64_t start) { struct m_ext2fs *fs; - int depth, credits; + int depth; struct ext4_extent_header *eh; unsigned int a, b, block, num; unsigned long ex_blk; @@ -1402,11 +1402,8 @@ ext4_ext_rm_leaf(struct inode *ip, struct ext4_extent_path *path, ("ext4_ext_rm_leaf: bad b")); } - credits = EXT4_EXT_DEPTH_MAX; - if (ex == EXT_FIRST_EXTENT(eh)) { + if (ex == EXT_FIRST_EXTENT(eh)) correct_index = 1; - credits += (ext4_ext_inode_depth(ip)) + 1; - } error = ext4_remove_blocks(ip, ex, a, b); if (error) From 87165bf858efc96b1ce868993be06ea61a1944e1 Mon Sep 17 00:00:00 2001 From: Gleb Smirnoff Date: Thu, 19 Oct 2017 18:04:16 +0000 Subject: [PATCH 177/219] Hide struct sockbuf from userland. PR: 222917 (exp-run) --- sys/sys/sockbuf.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/sys/sys/sockbuf.h b/sys/sys/sockbuf.h index c864937f0002..ad675b360aae 100644 --- a/sys/sys/sockbuf.h +++ b/sys/sys/sockbuf.h @@ -32,15 +32,9 @@ */ #ifndef _SYS_SOCKBUF_H_ #define _SYS_SOCKBUF_H_ -#include -#include -#include -#include - -#define SB_MAX (2*1024*1024) /* default for max chars in sockbuf */ /* - * Constants for sb_flags field of struct sockbuf. + * Constants for sb_flags field of struct sockbuf/xsockbuf. */ #define SB_WAIT 0x04 /* someone is waiting for data/space */ #define SB_SEL 0x08 /* someone is selecting */ @@ -59,6 +53,14 @@ #define SBS_CANTRCVMORE 0x0020 /* can't receive more data from peer */ #define SBS_RCVATMARK 0x0040 /* at mark on input */ +#if defined(_KERNEL) || defined(_WANT_SOCKET) +#include +#include +#include +#include + +#define SB_MAX (2*1024*1024) /* default for max chars in sockbuf */ + struct mbuf; struct sockaddr; struct socket; @@ -101,6 +103,7 @@ struct sockbuf { struct task sb_aiotask; /* AIO task */ }; +#endif /* defined(_KERNEL) || defined(_WANT_SOCKET) */ #ifdef _KERNEL /* From 12df521311790f2165bd6c12a10b4f1021561891 Mon Sep 17 00:00:00 2001 From: Vladimir Kondratyev Date: Thu, 19 Oct 2017 20:42:46 +0000 Subject: [PATCH 178/219] bthidd: Fix leds on multireport keyboards broken after r297217 Reviewed by: emax, gonzo Approved by: gonzo (mentor) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D12214 --- usr.sbin/bluetooth/bthidd/kbd.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/usr.sbin/bluetooth/bthidd/kbd.c b/usr.sbin/bluetooth/bthidd/kbd.c index a92a63a7c444..e946f0169fe7 100644 --- a/usr.sbin/bluetooth/bthidd/kbd.c +++ b/usr.sbin/bluetooth/bthidd/kbd.c @@ -569,6 +569,11 @@ kbd_status_changed(bthid_session_p s, uint8_t *data, int32_t len) } hid_end_parse(d); + if (report_id != NO_REPORT_ID) { + data[2] = data[1]; + data[1] = report_id; + } + if (found) write(s->intr, data, (report_id != NO_REPORT_ID) ? 3 : 2); From 59c4192cd3ea4df1a84b8624049ee232a84db2c4 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Thu, 19 Oct 2017 20:52:17 +0000 Subject: [PATCH 179/219] tegra: Do not define early printf function Since tegra is now in GENERIC, do not enable the early printf function as it can conflict with others. --- sys/arm/nvidia/tegra124/tegra124_machdep.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/arm/nvidia/tegra124/tegra124_machdep.c b/sys/arm/nvidia/tegra124/tegra124_machdep.c index 55b411dd7914..ee65805738e3 100644 --- a/sys/arm/nvidia/tegra124/tegra124_machdep.c +++ b/sys/arm/nvidia/tegra124/tegra124_machdep.c @@ -122,6 +122,7 @@ tegra124_cpu_reset(platform_t plat) * option SOCDEV_VA=0x70000000 * option EARLY_PRINTF */ +#if 0 #ifdef EARLY_PRINTF static void tegra124_early_putc(int c) @@ -136,6 +137,7 @@ tegra124_early_putc(int c) } early_putc_t *early_putc = tegra124_early_putc; #endif +#endif static platform_method_t tegra124_methods[] = { PLATFORMMETHOD(platform_attach, tegra124_attach), From 7707483a07a5a07dbc6b911719683ec6f9992885 Mon Sep 17 00:00:00 2001 From: Vladimir Kondratyev Date: Thu, 19 Oct 2017 20:54:55 +0000 Subject: [PATCH 180/219] ums(4): Unreverse evdev Tilt-axis reporting to match Linux. sysmouse tilt to button mapping remained unchanged. Reviewed by: hselasky Approved by: gonzo (mentor) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D12671 --- sys/dev/usb/input/ums.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/dev/usb/input/ums.c b/sys/dev/usb/input/ums.c index f9571f2108fe..c393f31a94e7 100644 --- a/sys/dev/usb/input/ums.c +++ b/sys/dev/usb/input/ums.c @@ -296,7 +296,7 @@ ums_intr_callback(struct usb_xfer *xfer, usb_error_t error) if ((info->sc_flags & UMS_FLAG_T_AXIS) && (id == info->sc_iid_t)) { - dt -= hid_get_data(buf, len, &info->sc_loc_t); + dt += hid_get_data(buf, len, &info->sc_loc_t); /* T-axis is translated into button presses */ buttons_found |= (1UL << 5) | (1UL << 6); } @@ -332,10 +332,10 @@ ums_intr_callback(struct usb_xfer *xfer, usb_error_t error) /* translate T-axis into button presses until further */ if (dt > 0) { ums_put_queue(sc, 0, 0, 0, 0, buttons); - buttons |= 1UL << 5; + buttons |= 1UL << 6; } else if (dt < 0) { ums_put_queue(sc, 0, 0, 0, 0, buttons); - buttons |= 1UL << 6; + buttons |= 1UL << 5; } sc->sc_status.button = buttons; From 3e8d2879c6290f59218b77e9378c91cf679f8322 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Thu, 19 Oct 2017 20:56:30 +0000 Subject: [PATCH 181/219] Allwinner: Add EARLY_PRINTF function EARLY_PRINTF can help debugging early problems. Add it for Allwinner SoCs. Tested On: OrangePi One (H3) --- sys/arm/allwinner/aw_machdep.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/sys/arm/allwinner/aw_machdep.c b/sys/arm/allwinner/aw_machdep.c index 45a62d9af7e0..cf4196cd268c 100644 --- a/sys/arm/allwinner/aw_machdep.c +++ b/sys/arm/allwinner/aw_machdep.c @@ -164,6 +164,29 @@ allwinner_cpu_reset(platform_t plat) while (1); } +/* + * To use early printf on Allwinner SoC, add to kernel config + * options SOCDEV_PA=0x01C00000 + * options SOCDEV_VA=0x10000000 + * options EARLY_PRINTF + * And remove the if 0 +*/ +#if 0 +#ifdef EARLY_PRINTF +static void +allwinner_early_putc(int c) +{ + volatile uint32_t * UART_STAT_REG = (uint32_t *)0x1002807C; + volatile uint32_t * UART_TX_REG = (uint32_t *)0x10028000; + const uint32_t UART_TXRDY = (1 << 2); + + while ((*UART_STAT_REG & UART_TXRDY) == 0) + continue; + *UART_TX_REG = c; +} +early_putc_t *early_putc = allwinner_early_putc; +#endif /* EARLY_PRINTF */ + #if defined(SOC_ALLWINNER_A10) static platform_method_t a10_methods[] = { PLATFORMMETHOD(platform_attach, a10_attach), From 8352f326c3db80e16d43d5b29a9cf55d914becdd Mon Sep 17 00:00:00 2001 From: Vladimir Kondratyev Date: Thu, 19 Oct 2017 21:07:28 +0000 Subject: [PATCH 182/219] psm(4): Add sanity checks to Synaptics touchpad driver resolution parser. This fixes "Kernel has only x or y resolution, not both" libinput error. Reported by: Ivan Tested by: Ivan Approved by: gonzo (mentor) MFC after: 2 weeks --- sys/dev/atkbdc/psm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/sys/dev/atkbdc/psm.c b/sys/dev/atkbdc/psm.c index c077a68190e9..608e4c58f0f0 100644 --- a/sys/dev/atkbdc/psm.c +++ b/sys/dev/atkbdc/psm.c @@ -6094,8 +6094,10 @@ enable_synaptics(struct psm_softc *sc, enum probearg arg) if (get_mouse_status(kbdc, status, 0, 3) != 3) return (FALSE); - synhw.infoXupmm = status[0]; - synhw.infoYupmm = status[2]; + if (status[0] != 0 && (status[1] & 0x80) && status[2] != 0) { + synhw.infoXupmm = status[0]; + synhw.infoYupmm = status[2]; + } if (verbose >= 2) { printf(" Extended capabilities:\n"); From ec9f9562a58b95806c54120ebf42b5a49ce84d1e Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Thu, 19 Oct 2017 21:34:53 +0000 Subject: [PATCH 183/219] Allwinner: Fix compilation Forgot an #endif in r324773, sorry for the breakage. --- sys/arm/allwinner/aw_machdep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sys/arm/allwinner/aw_machdep.c b/sys/arm/allwinner/aw_machdep.c index cf4196cd268c..1acac3809a65 100644 --- a/sys/arm/allwinner/aw_machdep.c +++ b/sys/arm/allwinner/aw_machdep.c @@ -186,6 +186,7 @@ allwinner_early_putc(int c) } early_putc_t *early_putc = allwinner_early_putc; #endif /* EARLY_PRINTF */ +#endif #if defined(SOC_ALLWINNER_A10) static platform_method_t a10_methods[] = { From da979d442a42c54d33e271367d97eb245f1e4c0b Mon Sep 17 00:00:00 2001 From: Marius Strobl Date: Thu, 19 Oct 2017 21:57:14 +0000 Subject: [PATCH 184/219] Correct an inverted conditional for determining the multiplier of the user data area size. --- sys/dev/mmc/mmcsd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/mmc/mmcsd.c b/sys/dev/mmc/mmcsd.c index 3c626a99defd..70ffb77e796b 100644 --- a/sys/dev/mmc/mmcsd.c +++ b/sys/dev/mmc/mmcsd.c @@ -327,7 +327,7 @@ mmcsd_attach(device_t dev) (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * - (sc->high_cap != 0 ? MMC_SECTOR_SIZE : 1); + (sc->high_cap == 0 ? MMC_SECTOR_SIZE : 1); } else if (bootverbose) device_printf(dev, "enhanced user data area spans entire device\n"); From 0d74fe267b81cfd13f274a0d7f1a20ca80b464f2 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 00:30:35 +0000 Subject: [PATCH 185/219] mtx: clean up locking spin mutexes 1) shorten the fast path by pushing the lockstat probe to the slow path 2) test for kernel panic only after it turns out we will have to spin, in particular test only after we know we are not recursing MFC after: 1 week --- sys/kern/kern_mutex.c | 30 +++++++++++++++++++++++------- sys/sys/mutex.h | 25 ++++++++++++++++--------- 2 files changed, 39 insertions(+), 16 deletions(-) diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c index 5d2146b7909c..b3e511611e20 100644 --- a/sys/kern/kern_mutex.c +++ b/sys/kern/kern_mutex.c @@ -289,6 +289,7 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, int line) { struct mtx *m; + uintptr_t tid, v; if (SCHEDULER_STOPPED()) return; @@ -308,7 +309,14 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, opts &= ~MTX_RECURSE; WITNESS_CHECKORDER(&m->lock_object, opts | LOP_NEWORDER | LOP_EXCLUSIVE, file, line, NULL); - __mtx_lock_spin(m, curthread, opts, file, line); + spinlock_enter(); + tid = (uintptr_t)curthread; + v = MTX_UNOWNED; + if (!_mtx_obtain_lock_fetch(m, &v, tid)) + _mtx_lock_spin(m, v, opts, file, line); + else + LOCKSTAT_PROFILE_OBTAIN_LOCK_SUCCESS(spin__acquire, + m, 0, 0, file, line); LOCK_LOG_LOCK("LOCK", &m->lock_object, opts, m->mtx_recurse, file, line); WITNESS_LOCK(&m->lock_object, opts | LOP_EXCLUSIVE, file, line); @@ -682,12 +690,18 @@ _mtx_lock_spin_failed(struct mtx *m) * This is only called if we need to actually spin for the lock. Recursion * is handled inline. */ +#if LOCK_DEBUG > 0 void -_mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, - int opts, const char *file, int line) +_mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, int opts, + const char *file, int line) +#else +void +_mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v) +#endif { struct mtx *m; struct lock_delay_arg lda; + uintptr_t tid; #ifdef LOCK_PROFILING int contested = 0; uint64_t waittime = 0; @@ -699,10 +713,7 @@ _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, int doing_lockprof; #endif - if (SCHEDULER_STOPPED()) - return; - - lock_delay_arg_init(&lda, &mtx_spin_delay); + tid = (uintptr_t)curthread; m = mtxlock2mtx(c); if (__predict_false(v == MTX_UNOWNED)) @@ -713,6 +724,11 @@ _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, return; } + if (SCHEDULER_STOPPED()) + return; + + lock_delay_arg_init(&lda, &mtx_spin_delay); + if (LOCK_LOG_TEST(&m->lock_object, opts)) CTR1(KTR_LOCK, "_mtx_lock_spin: %p spinning", m); KTR_STATE1(KTR_SCHED, "thread", sched_tdname((struct thread *)tid), diff --git a/sys/sys/mutex.h b/sys/sys/mutex.h index 359b1199714c..c37d4ebd2aaa 100644 --- a/sys/sys/mutex.h +++ b/sys/sys/mutex.h @@ -105,8 +105,12 @@ void __mtx_unlock_sleep(volatile uintptr_t *c); #endif #ifdef SMP -void _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, - int opts, const char *file, int line); +#if LOCK_DEBUG > 0 +void _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v, int opts, + const char *file, int line); +#else +void _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v); +#endif #endif void __mtx_lock_flags(volatile uintptr_t *c, int opts, const char *file, int line); @@ -154,8 +158,13 @@ void thread_lock_flags_(struct thread *, int, const char *, int); __mtx_unlock_sleep(&(m)->mtx_lock) #endif #ifdef SMP -#define _mtx_lock_spin(m, v, t, o, f, l) \ - _mtx_lock_spin_cookie(&(m)->mtx_lock, v, t, o, f, l) +#if LOCK_DEBUG > 0 +#define _mtx_lock_spin(m, v, o, f, l) \ + _mtx_lock_spin_cookie(&(m)->mtx_lock, v, o, f, l) +#else +#define _mtx_lock_spin(m, v, o, f, l) \ + _mtx_lock_spin_cookie(&(m)->mtx_lock, v) +#endif #endif #define _mtx_lock_flags(m, o, f, l) \ __mtx_lock_flags(&(m)->mtx_lock, o, f, l) @@ -219,11 +228,9 @@ void thread_lock_flags_(struct thread *, int, const char *, int); uintptr_t _v = MTX_UNOWNED; \ \ spinlock_enter(); \ - if (!_mtx_obtain_lock_fetch((mp), &_v, _tid)) \ - _mtx_lock_spin((mp), _v, _tid, (opts), (file), (line)); \ - else \ - LOCKSTAT_PROFILE_OBTAIN_LOCK_SUCCESS(spin__acquire, \ - mp, 0, 0, file, line); \ + if (__predict_false(LOCKSTAT_PROFILE_ENABLED(spin__acquire) || \ + !_mtx_obtain_lock_fetch((mp), &_v, _tid))) \ + _mtx_lock_spin((mp), _v, (opts), (file), (line)); \ } while (0) #define __mtx_trylock_spin(mp, tid, opts, file, line) __extension__ ({ \ uintptr_t _tid = (uintptr_t)(tid); \ From cbc2d7c218b96a4e43451b8e5632720a4a7bc48d Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 00:34:25 +0000 Subject: [PATCH 186/219] mtx: stop testing SCHEDULER_STOPPED in kabi funcs for spin mutexes There is nothing panic-breaking to do in the unlock case and the lock case will fallback to the slow path doing the check already. MFC after: 1 week --- sys/kern/kern_mutex.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c index b3e511611e20..3e125f34d8ec 100644 --- a/sys/kern/kern_mutex.c +++ b/sys/kern/kern_mutex.c @@ -291,9 +291,6 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, struct mtx *m; uintptr_t tid, v; - if (SCHEDULER_STOPPED()) - return; - m = mtxlock2mtx(c); KASSERT(m->mtx_lock != MTX_DESTROYED, @@ -356,9 +353,6 @@ __mtx_unlock_spin_flags(volatile uintptr_t *c, int opts, const char *file, { struct mtx *m; - if (SCHEDULER_STOPPED()) - return; - m = mtxlock2mtx(c); KASSERT(m->mtx_lock != MTX_DESTROYED, From 15f9620e366193e459e40f941c6b64ebc65eabc4 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Fri, 20 Oct 2017 03:03:04 +0000 Subject: [PATCH 187/219] Book-E debug trace fixes * Book-E can have Altivec exceptions, so move it out of the AIM-only block. * Print the right DSI trap mode (read vs write) for Book-E While here, fix some whitespace found while reviewing other diffs. --- sys/powerpc/powerpc/db_trace.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/sys/powerpc/powerpc/db_trace.c b/sys/powerpc/powerpc/db_trace.c index ceecacfe534d..a3ee988d4386 100644 --- a/sys/powerpc/powerpc/db_trace.c +++ b/sys/powerpc/powerpc/db_trace.c @@ -118,12 +118,12 @@ db_frame(struct db_variable *vp, db_expr_t *valuep, int op) if (kdb_frame == NULL) return (0); - reg = (register_t*)((uintptr_t)kdb_frame + (uintptr_t)vp->valuep); - if (op == DB_VAR_GET) - *valuep = *reg; - else - *reg = *valuep; - return (1); + reg = (register_t*)((uintptr_t)kdb_frame + (uintptr_t)vp->valuep); + if (op == DB_VAR_GET) + *valuep = *reg; + else + *reg = *valuep; + return (1); } @@ -215,12 +215,17 @@ db_backtrace(struct thread *td, db_addr_t fp, int count) switch (tf->exc) { case EXC_DSI: /* XXX take advantage of the union. */ +#ifdef BOOKE + db_printf("DSI %s trap @ %#zx by ", + (tf->cpu.booke.esr & ESR_ST) ? "write" + : "read", tf->dar); +#else db_printf("DSI %s trap @ %#zx by ", (tf->cpu.aim.dsisr & DSISR_STORE) ? "write" : "read", tf->dar); +#endif goto print_trap; case EXC_ALI: - /* XXX take advantage of the union. */ db_printf("ALI trap @ %#zx (xSR %#x) ", tf->dar, (uint32_t)tf->cpu.aim.dsisr); goto print_trap; @@ -237,8 +242,8 @@ db_backtrace(struct thread *td, db_addr_t fp, int count) case EXC_SC: trapstr = "SC"; break; case EXC_EXI: trapstr = "EXI"; break; case EXC_MCHK: trapstr = "MCHK"; break; -#if !defined(BOOKE) case EXC_VEC: trapstr = "VEC"; break; +#if !defined(BOOKE) case EXC_FPA: trapstr = "FPA"; break; case EXC_BPT: trapstr = "BPT"; break; case EXC_TRC: trapstr = "TRC"; break; From 95ce4c00ec0e3e5821689d207f838c12da1025e0 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Fri, 20 Oct 2017 03:13:31 +0000 Subject: [PATCH 188/219] No need to check for AIM here This block is already in a #ifdef AIM block. --- sys/powerpc/ofw/ofw_machdep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/powerpc/ofw/ofw_machdep.c b/sys/powerpc/ofw/ofw_machdep.c index 2042e704f469..25b2009e056c 100644 --- a/sys/powerpc/ofw/ofw_machdep.c +++ b/sys/powerpc/ofw/ofw_machdep.c @@ -461,7 +461,7 @@ openfirmware_core(void *args) /* Restore initially saved trap vectors */ ofw_restore_trap_vec(save_trap_init); -#if defined(AIM) && !defined(__powerpc64__) +#ifndef __powerpc64__ /* * Clear battable[] translations */ From d95498d44f652a50c728e1d985a455f70a201f6e Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 03:30:02 +0000 Subject: [PATCH 189/219] amd64: avoid acquiring dt lock if possible (which is the common case) Discussed with: kib MFC after: 1 week --- sys/amd64/amd64/machdep.c | 5 +---- sys/amd64/amd64/sys_machdep.c | 2 +- sys/amd64/amd64/vm_machdep.c | 5 +---- sys/amd64/ia32/ia32_signal.c | 5 +---- sys/amd64/linux/linux_sysvec.c | 3 --- sys/amd64/linux32/linux32_sysvec.c | 3 --- 6 files changed, 4 insertions(+), 19 deletions(-) diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index 9cfcc6fe2057..041ef2a9e76e 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -581,12 +581,9 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) struct trapframe *regs = td->td_frame; struct pcb *pcb = td->td_pcb; - mtx_lock(&dt_lock); if (td->td_proc->p_md.md_ldt != NULL) user_ldt_free(td); - else - mtx_unlock(&dt_lock); - + update_pcb_bases(pcb); pcb->pcb_fsbase = 0; pcb->pcb_gsbase = 0; diff --git a/sys/amd64/amd64/sys_machdep.c b/sys/amd64/amd64/sys_machdep.c index 3efcf9430d79..ae68b39af19a 100644 --- a/sys/amd64/amd64/sys_machdep.c +++ b/sys/amd64/amd64/sys_machdep.c @@ -500,7 +500,7 @@ user_ldt_free(struct thread *td) struct mdproc *mdp = &p->p_md; struct proc_ldt *pldt; - mtx_assert(&dt_lock, MA_OWNED); + mtx_lock(&dt_lock); if ((pldt = mdp->md_ldt) == NULL) { mtx_unlock(&dt_lock); return; diff --git a/sys/amd64/amd64/vm_machdep.c b/sys/amd64/amd64/vm_machdep.c index f71378b36f81..3100bf830333 100644 --- a/sys/amd64/amd64/vm_machdep.c +++ b/sys/amd64/amd64/vm_machdep.c @@ -299,11 +299,8 @@ cpu_exit(struct thread *td) /* * If this process has a custom LDT, release it. */ - mtx_lock(&dt_lock); - if (td->td_proc->p_md.md_ldt != 0) + if (td->td_proc->p_md.md_ldt != NULL) user_ldt_free(td); - else - mtx_unlock(&dt_lock); } void diff --git a/sys/amd64/ia32/ia32_signal.c b/sys/amd64/ia32/ia32_signal.c index 8161eaf25f0f..13e3877a83bc 100644 --- a/sys/amd64/ia32/ia32_signal.c +++ b/sys/amd64/ia32/ia32_signal.c @@ -937,12 +937,9 @@ ia32_setregs(struct thread *td, struct image_params *imgp, u_long stack) { struct trapframe *regs = td->td_frame; struct pcb *pcb = td->td_pcb; - - mtx_lock(&dt_lock); + if (td->td_proc->p_md.md_ldt != NULL) user_ldt_free(td); - else - mtx_unlock(&dt_lock); #ifdef COMPAT_43 setup_lcall_gate(); #endif diff --git a/sys/amd64/linux/linux_sysvec.c b/sys/amd64/linux/linux_sysvec.c index b87185f1fe33..7bf09429f0f2 100644 --- a/sys/amd64/linux/linux_sysvec.c +++ b/sys/amd64/linux/linux_sysvec.c @@ -453,11 +453,8 @@ linux_exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) struct trapframe *regs = td->td_frame; struct pcb *pcb = td->td_pcb; - mtx_lock(&dt_lock); if (td->td_proc->p_md.md_ldt != NULL) user_ldt_free(td); - else - mtx_unlock(&dt_lock); pcb->pcb_fsbase = 0; pcb->pcb_gsbase = 0; diff --git a/sys/amd64/linux32/linux32_sysvec.c b/sys/amd64/linux32/linux32_sysvec.c index 140d7b9e9612..8b0a35ea0bfa 100644 --- a/sys/amd64/linux32/linux32_sysvec.c +++ b/sys/amd64/linux32/linux32_sysvec.c @@ -804,11 +804,8 @@ exec_linux_setregs(struct thread *td, struct image_params *imgp, u_long stack) struct trapframe *regs = td->td_frame; struct pcb *pcb = td->td_pcb; - mtx_lock(&dt_lock); if (td->td_proc->p_md.md_ldt != NULL) user_ldt_free(td); - else - mtx_unlock(&dt_lock); critical_enter(); wrmsr(MSR_FSBASE, 0); From d41742b58528a743e3fdde2fcaed31987b01ae66 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Fri, 20 Oct 2017 03:31:23 +0000 Subject: [PATCH 190/219] Expand the TLB nest level mask to 3 bits to match the 32-bit mask This really doesn't change anything right now, because BOOKE_TLB_MAXNEST is only 3, which fits into the 2 bits currently used. --- sys/powerpc/booke/trap_subr.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S index 55b8f1a7de3c..836f86338672 100644 --- a/sys/powerpc/booke/trap_subr.S +++ b/sys/powerpc/booke/trap_subr.S @@ -365,7 +365,7 @@ ld %r30, (TLBSAVE_BOOKE_R30)(br); \ ld %r31, (TLBSAVE_BOOKE_R31)(br); #define TLB_NEST(outr,inr) \ - rlwinm outr, inr, 7, 23, 24; /* 8 x TLBSAVE_LEN */ + rlwinm outr, inr, 7, 22, 24; /* 8 x TLBSAVE_LEN */ #else #define TLB_SAVE_REGS(br) \ stmw %r20, TLBSAVE_BOOKE_R20(br) From 2567807c32cf12117ecb78f7aabb86cfd2285297 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 03:32:42 +0000 Subject: [PATCH 191/219] rwlock: reduce lockstat branches in the slowpath MFC after: 1 week --- sys/kern/kern_rwlock.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/sys/kern/kern_rwlock.c b/sys/kern/kern_rwlock.c index 4adcbc8f56cf..f0fe924dc124 100644 --- a/sys/kern/kern_rwlock.c +++ b/sys/kern/kern_rwlock.c @@ -847,6 +847,9 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, int64_t sleep_time = 0; int64_t all_time = 0; #endif +#if defined(KDTRACE_HOOKS) || defined(LOCK_PROFILING) + int doing_lockprof; +#endif if (SCHEDULER_STOPPED()) return; @@ -875,10 +878,17 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, CTR5(KTR_LOCK, "%s: %s contested (lock=%p) at %s:%d", __func__, rw->lock_object.lo_name, (void *)rw->rw_lock, file, line); -#ifdef KDTRACE_HOOKS - all_time -= lockstat_nsecs(&rw->lock_object); +#ifdef LOCK_PROFILING + doing_lockprof = 1; state = v; +#elif defined(KDTRACE_HOOKS) + doing_lockprof = lockstat_enabled; + if (__predict_false(doing_lockprof)) { + all_time -= lockstat_nsecs(&rw->lock_object); + state = v; + } #endif + for (;;) { if (v == RW_UNLOCKED) { if (_rw_write_lock_fetch(rw, &v, tid)) @@ -1024,6 +1034,10 @@ __rw_wlock_hard(volatile uintptr_t *c, uintptr_t v, uintptr_t tid, #endif v = RW_READ_VALUE(rw); } +#if defined(KDTRACE_HOOKS) || defined(LOCK_PROFILING) + if (__predict_true(!doing_lockprof)) + return; +#endif #ifdef KDTRACE_HOOKS all_time += lockstat_nsecs(&rw->lock_object); if (sleep_time) From a5db8ade37993b7fcb556e0c034d1ace79867002 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 03:38:58 +0000 Subject: [PATCH 192/219] amd64: __exclusive_cache_line pv_chunks_mutex and pv_list_locks Note that pv_list_locks is an array and currently it fits 2 locks per line. Resizing it and/or putting more locks in different lines requires several tests. MFC after: 1 week --- sys/amd64/amd64/pmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 5ef462676df1..dd9f8f3c5b2c 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -380,8 +380,8 @@ static int pmap_initialized; * elements, but reads are not. */ static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks); -static struct mtx pv_chunks_mutex; -static struct rwlock pv_list_locks[NPV_LIST_LOCKS]; +static struct mtx __exclusive_cache_line pv_chunks_mutex; +static struct rwlock __exclusive_cache_line pv_list_locks[NPV_LIST_LOCKS]; static u_long pv_invl_gen[NPV_LIST_LOCKS]; static struct md_page *pv_table; static struct md_page pv_dummy; From c48a94251d8d7f0330cf6bf29e9a576dfac21b5a Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 04:02:53 +0000 Subject: [PATCH 193/219] Mark kdb_active as __read_frequently and switch to bool to eat less space. --- sys/kern/subr_kdb.c | 2 +- sys/sys/kdb.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/kern/subr_kdb.c b/sys/kern/subr_kdb.c index d20c56b85ef4..121dc20e8b19 100644 --- a/sys/kern/subr_kdb.c +++ b/sys/kern/subr_kdb.c @@ -50,7 +50,7 @@ __FBSDID("$FreeBSD$"); #include #endif -int kdb_active = 0; +bool __read_frequently kdb_active = 0; static void *kdb_jmpbufp = NULL; struct kdb_dbbe *kdb_dbbe = NULL; static struct pcb kdb_pcb; diff --git a/sys/sys/kdb.h b/sys/sys/kdb.h index 49c8c32071d8..27d2475cc224 100644 --- a/sys/sys/kdb.h +++ b/sys/sys/kdb.h @@ -59,7 +59,7 @@ struct kdb_dbbe { }; \ DATA_SET(kdb_dbbe_set, name##_dbbe) -extern int kdb_active; /* Non-zero while in debugger. */ +extern bool kdb_active; /* Non-zero while in debugger. */ extern int debugger_on_panic; /* enter the debugger on panic. */ extern struct kdb_dbbe *kdb_dbbe; /* Default debugger backend or NULL. */ extern struct trapframe *kdb_frame; /* Frame to kdb_trap(). */ From d05554bb997c3b1b58ddcf45cfc16252093b56dc Mon Sep 17 00:00:00 2001 From: Hans Petter Selasky Date: Fri, 20 Oct 2017 08:20:15 +0000 Subject: [PATCH 194/219] The remote DMA TCP portspace selector, RDMA_PS_TCP, is used for both iWarp and RoCE in ibcore. The selection of RDMA_PS_TCP can not be used to indicate iWarp protocol use. Backport the proper IB device capabilities from Linux upstream to distinguish between iWarp and RoCE. Only allocate the additional socket required for iWarp for RDMA IDs when at least one iWarp device present. This resolves interopability issues between iWarp and RoCE in ibcore Reviewed by: np @ Differential Revision: https://reviews.freebsd.org/D12563 Sponsored by: Mellanox Technologies MFC after: 3 days --- sys/dev/cxgbe/iw_cxgbe/provider.c | 19 ++ sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c | 33 ++ sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c | 52 +++ sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c | 2 +- sys/ofed/drivers/infiniband/core/cma.c | 137 +++----- sys/ofed/drivers/infiniband/core/device.c | 92 +++-- .../infiniband/hw/mthca/mthca_provider.c | 20 ++ sys/ofed/include/rdma/ib_mad.h | 1 + sys/ofed/include/rdma/ib_verbs.h | 319 +++++++++++++++++- 9 files changed, 540 insertions(+), 135 deletions(-) diff --git a/sys/dev/cxgbe/iw_cxgbe/provider.c b/sys/dev/cxgbe/iw_cxgbe/provider.c index ad47891f1ba0..0cc698a7e38f 100644 --- a/sys/dev/cxgbe/iw_cxgbe/provider.c +++ b/sys/dev/cxgbe/iw_cxgbe/provider.c @@ -388,6 +388,24 @@ c4iw_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr *props) return 0; } +static int c4iw_port_immutable(struct ib_device *ibdev, u8 port_num, + struct ib_port_immutable *immutable) +{ + struct ib_port_attr attr; + int err; + + immutable->core_cap_flags = RDMA_CORE_PORT_IWARP; + + err = ib_query_port(ibdev, port_num, &attr); + if (err) + return err; + + immutable->pkey_tbl_len = attr.pkey_tbl_len; + immutable->gid_tbl_len = attr.gid_tbl_len; + + return 0; +} + /* * Returns -errno on error. */ @@ -471,6 +489,7 @@ c4iw_register_device(struct c4iw_dev *dev) ibdev->post_send = c4iw_post_send; ibdev->post_recv = c4iw_post_receive; ibdev->uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION; + ibdev->get_port_immutable = c4iw_port_immutable; iwcm = kmalloc(sizeof(*iwcm), GFP_KERNEL); if (iwcm == NULL) diff --git a/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c b/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c index 4ceaa6d77b17..298e7e698937 100644 --- a/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c +++ b/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c @@ -2229,6 +2229,38 @@ static int mlx4_ib_dev_idx(struct mlx4_dev *dev) return -1; } +static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, + struct ib_port_immutable *immutable) +{ + struct ib_port_attr attr; + struct mlx4_ib_dev *mdev = to_mdev(ibdev); + int err; + + if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { + immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; + immutable->max_mad_size = IB_MGMT_MAD_SIZE; + } else { + if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) + immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; + if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCEV2) + immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | + RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; + immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; + if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | + RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) + immutable->max_mad_size = IB_MGMT_MAD_SIZE; + } + + err = ib_query_port(ibdev, port_num, &attr); + if (err) + return err; + + immutable->pkey_tbl_len = attr.pkey_tbl_len; + immutable->gid_tbl_len = attr.gid_tbl_len; + + return 0; +} + static void *mlx4_ib_add(struct mlx4_dev *dev) { struct mlx4_ib_dev *ibdev; @@ -2360,6 +2392,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; ibdev->ib_dev.process_mad = mlx4_ib_process_mad; + ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev; ibdev->ib_dev.ioctl = mlx4_ib_ioctl; ibdev->ib_dev.query_values = mlx4_ib_query_values; diff --git a/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c b/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c index 6b8cf0cf40ec..ac1bb7a916a5 100644 --- a/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c +++ b/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c @@ -1670,6 +1670,57 @@ static void destroy_dev_resources(struct mlx5_ib_resources *devr) mlx5_ib_dealloc_pd(devr->p0); } +static u32 get_core_cap_flags(struct ib_device *ibdev) +{ + struct mlx5_ib_dev *dev = to_mdev(ibdev); + enum rdma_link_layer ll = mlx5_ib_port_link_layer(ibdev, 1); + u8 l3_type_cap = MLX5_CAP_ROCE(dev->mdev, l3_type); + u8 roce_version_cap = MLX5_CAP_ROCE(dev->mdev, roce_version); + u32 ret = 0; + + if (ll == IB_LINK_LAYER_INFINIBAND) + return RDMA_CORE_PORT_IBA_IB; + + ret = RDMA_CORE_PORT_RAW_PACKET; + + if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV4_CAP)) + return ret; + + if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV6_CAP)) + return ret; + + if (roce_version_cap & MLX5_ROCE_VERSION_1_CAP) + ret |= RDMA_CORE_PORT_IBA_ROCE; + + if (roce_version_cap & MLX5_ROCE_VERSION_2_CAP) + ret |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; + + return ret; +} + +static int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, + struct ib_port_immutable *immutable) +{ + struct ib_port_attr attr; + struct mlx5_ib_dev *dev = to_mdev(ibdev); + enum rdma_link_layer ll = mlx5_ib_port_link_layer(ibdev, port_num); + int err; + + immutable->core_cap_flags = get_core_cap_flags(ibdev); + + err = ib_query_port(ibdev, port_num, &attr); + if (err) + return err; + + immutable->pkey_tbl_len = attr.pkey_tbl_len; + immutable->gid_tbl_len = attr.gid_tbl_len; + immutable->core_cap_flags = get_core_cap_flags(ibdev); + if ((ll == IB_LINK_LAYER_INFINIBAND) || MLX5_CAP_GEN(dev->mdev, roce)) + immutable->max_mad_size = IB_MGMT_MAD_SIZE; + + return 0; +} + static void enable_dc_tracer(struct mlx5_ib_dev *dev) { struct device *device = dev->ib_dev.dma_device; @@ -2115,6 +2166,7 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev) dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; dev->ib_dev.process_mad = mlx5_ib_process_mad; + dev->ib_dev.get_port_immutable = mlx5_port_immutable; dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; diff --git a/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c b/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c index 3e691dc206c4..cdbf1a7382fc 100644 --- a/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c +++ b/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c @@ -1576,7 +1576,7 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, const struct ib_ah_attr *ah, int gid_type; if ((ll == IB_LINK_LAYER_ETHERNET) || (ah->ah_flags & IB_AH_GRH)) { - int len = dev->ib_dev.gid_tbl_len[port - 1]; + int len = dev->mdev->port_caps[port - 1].gid_table_len; if (ah->grh.sgid_index >= len) { printf("mlx5_ib: ERR: ""sgid_index (%u) too large. max is %d\n", ah->grh.sgid_index, len - 1); return -EINVAL; diff --git a/sys/ofed/drivers/infiniband/core/cma.c b/sys/ofed/drivers/infiniband/core/cma.c index 1d172016fc64..fed28cc85f9e 100644 --- a/sys/ofed/drivers/infiniband/core/cma.c +++ b/sys/ofed/drivers/infiniband/core/cma.c @@ -75,11 +75,6 @@ static int def_prec2sl = 3; module_param_named(def_prec2sl, def_prec2sl, int, 0644); MODULE_PARM_DESC(def_prec2sl, "Default value for SL priority with RoCE. Valid values 0 - 7"); -static int unify_tcp_port_space = 1; -module_param(unify_tcp_port_space, int, 0644); -MODULE_PARM_DESC(unify_tcp_port_space, "Unify the host TCP and RDMA port " - "space allocation (default=1)"); - static int debug_level = 0; #define cma_pr(level, priv, format, arg...) \ printk(level "CMA: %p: %s: " format, ((struct rdma_id_priv *) priv) , __func__, ## arg) @@ -198,6 +193,7 @@ struct rdma_id_private { /* cache for mc record params */ struct ib_sa_mcmember_rec rec; int is_valid_rec; + int unify_ps_tcp; }; struct cma_multicast { @@ -822,29 +818,24 @@ int rdma_init_qp_attr(struct rdma_cm_id *id, struct ib_qp_attr *qp_attr, int ret = 0; id_priv = container_of(id, struct rdma_id_private, id); - switch (rdma_node_get_transport(id_priv->id.device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, id->port_num)) { if (!id_priv->cm_id.ib || (id_priv->id.qp_type == IB_QPT_UD)) ret = cma_ib_init_qp_attr(id_priv, qp_attr, qp_attr_mask); else ret = ib_cm_init_qp_attr(id_priv->cm_id.ib, qp_attr, qp_attr_mask); + if (qp_attr->qp_state == IB_QPS_RTR) qp_attr->rq_psn = id_priv->seq_num; - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, id->port_num)) { if (!id_priv->cm_id.iw) { qp_attr->qp_access_flags = 0; *qp_attr_mask = IB_QP_STATE | IB_QP_ACCESS_FLAGS; } else ret = iw_cm_init_qp_attr(id_priv->cm_id.iw, qp_attr, qp_attr_mask); - break; - default: + } else ret = -ENOSYS; - break; - } return ret; } @@ -1105,6 +1096,10 @@ static void __rdma_free(struct work_struct *work) if (id_priv->internal_id) cma_deref_id(id_priv->id.context); + if (id_priv->sock != NULL && !id_priv->internal_id && + !id_priv->unify_ps_tcp) + sock_release(id_priv->sock); + kfree(id_priv->id.route.path_rec); kfree(id_priv); } @@ -1128,8 +1123,7 @@ void rdma_destroy_id(struct rdma_cm_id *id) mutex_unlock(&id_priv->handler_mutex); if (id_priv->cma_dev) { - switch (rdma_node_get_transport(id_priv->id.device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id_priv->id.device, 1)) { spin_lock_irqsave(&id_priv->cm_lock, flags); if (id_priv->cm_id.ib && !IS_ERR(id_priv->cm_id.ib)) { ib = id_priv->cm_id.ib; @@ -1138,14 +1132,9 @@ void rdma_destroy_id(struct rdma_cm_id *id) ib_destroy_cm_id(ib); } else spin_unlock_irqrestore(&id_priv->cm_lock, flags); - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id_priv->id.device, 1)) { if (id_priv->cm_id.iw) iw_destroy_cm_id(id_priv->cm_id.iw); - break; - default: - break; } cma_leave_mc_groups(id_priv); cma_release_dev(id_priv); @@ -2141,27 +2130,15 @@ int rdma_resolve_route(struct rdma_cm_id *id, int timeout_ms) return -EINVAL; atomic_inc(&id_priv->refcount); - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: - switch (rdma_port_get_link_layer(id->device, id->port_num)) { - case IB_LINK_LAYER_INFINIBAND: - ret = cma_resolve_ib_route(id_priv, timeout_ms); - break; - case IB_LINK_LAYER_ETHERNET: - ret = cma_resolve_iboe_route(id_priv); - break; - default: - ret = -ENOSYS; - } - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + if (rdma_cap_ib_sa(id->device, id->port_num)) + ret = cma_resolve_ib_route(id_priv, timeout_ms); + else if (rdma_protocol_roce(id->device, id->port_num)) + ret = cma_resolve_iboe_route(id_priv); + else if (rdma_protocol_iwarp(id->device, id->port_num)) ret = cma_resolve_iw_route(id_priv, timeout_ms); - break; - default: + else ret = -ENOSYS; - break; - } + if (ret) goto err; @@ -2608,6 +2585,10 @@ static int cma_get_tcp_port(struct rdma_id_private *id_priv) (struct sockaddr *) &id_priv->id.route.addr.src_addr, ip_addr_size((struct sockaddr *) &id_priv->id.route.addr.src_addr)); #else + SOCK_LOCK(sock); + sock->so_options |= SO_REUSEADDR; + SOCK_UNLOCK(sock); + ret = -sobind(sock, (struct sockaddr *)&id_priv->id.route.addr.src_addr, curthread); @@ -2632,6 +2613,7 @@ static int cma_get_tcp_port(struct rdma_id_private *id_priv) static int cma_get_port(struct rdma_id_private *id_priv) { + struct cma_device *cma_dev; struct idr *ps; int ret; @@ -2641,7 +2623,18 @@ static int cma_get_port(struct rdma_id_private *id_priv) break; case RDMA_PS_TCP: ps = &tcp_ps; - if (unify_tcp_port_space) { + + mutex_lock(&lock); + /* check if there are any iWarp IB devices present */ + list_for_each_entry(cma_dev, &dev_list, list) { + if (rdma_protocol_iwarp(cma_dev->device, 1)) { + id_priv->unify_ps_tcp = 1; + break; + } + } + mutex_unlock(&lock); + + if (id_priv->unify_ps_tcp) { ret = cma_get_tcp_port(id_priv); if (ret) goto out; @@ -2713,19 +2706,15 @@ int rdma_listen(struct rdma_cm_id *id, int backlog) id_priv->backlog = backlog; if (id->device) { - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, 1)) { ret = cma_ib_listen(id_priv); if (ret) goto err; - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, 1)) { ret = cma_iw_listen(id_priv, backlog); if (ret) goto err; - break; - default: + } else { ret = -ENOSYS; goto err; } @@ -3094,21 +3083,15 @@ int rdma_connect(struct rdma_cm_id *id, struct rdma_conn_param *conn_param) id_priv->srq = conn_param->srq; } - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, id->port_num)) { if (id->qp_type == IB_QPT_UD) ret = cma_resolve_ib_udp(id_priv, conn_param); else ret = cma_connect_ib(id_priv, conn_param); - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, id->port_num)) ret = cma_connect_iw(id_priv, conn_param); - break; - default: + else ret = -ENOSYS; - break; - } if (ret) goto err; @@ -3214,8 +3197,7 @@ int rdma_accept(struct rdma_cm_id *id, struct rdma_conn_param *conn_param) id_priv->srq = conn_param->srq; } - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, id->port_num)) { if (id->qp_type == IB_QPT_UD) { if (conn_param) ret = cma_send_sidr_rep(id_priv, IB_SIDR_SUCCESS, @@ -3230,15 +3212,10 @@ int rdma_accept(struct rdma_cm_id *id, struct rdma_conn_param *conn_param) else ret = cma_rep_recv(id_priv); } - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, id->port_num)) ret = cma_accept_iw(id_priv, conn_param); - break; - default: + else ret = -ENOSYS; - break; - } if (ret) goto reject; @@ -3282,8 +3259,7 @@ int rdma_reject(struct rdma_cm_id *id, const void *private_data, if (!id_priv->cm_id.ib) return -EINVAL; - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, id->port_num)) { if (id->qp_type == IB_QPT_UD) ret = cma_send_sidr_rep(id_priv, IB_SIDR_REJECT, private_data, private_data_len); @@ -3293,16 +3269,12 @@ int rdma_reject(struct rdma_cm_id *id, const void *private_data, IB_CM_REJ_CONSUMER_DEFINED, NULL, 0, private_data, private_data_len); } - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, id->port_num)) { ret = iw_cm_reject(id_priv->cm_id.iw, private_data, private_data_len); - break; - default: + } else ret = -ENOSYS; - break; - } + return ret; } EXPORT_SYMBOL(rdma_reject); @@ -3316,8 +3288,7 @@ int rdma_disconnect(struct rdma_cm_id *id) if (!id_priv->cm_id.ib) return -EINVAL; - switch (rdma_node_get_transport(id->device->node_type)) { - case RDMA_TRANSPORT_IB: + if (rdma_cap_ib_cm(id->device, id->port_num)) { ret = cma_modify_qp_err(id_priv); if (ret) goto out; @@ -3327,15 +3298,11 @@ int rdma_disconnect(struct rdma_cm_id *id) cma_dbg(id_priv, "sending DREP\n"); ib_send_cm_drep(id_priv->cm_id.ib, NULL, 0); } - break; - case RDMA_TRANSPORT_IWARP: - case RDMA_TRANSPORT_SCIF: + } else if (rdma_cap_iw_cm(id->device, id->port_num)) { ret = iw_cm_disconnect(id_priv->cm_id.iw, 0); - break; - default: + } else ret = -EINVAL; - break; - } + out: return ret; } diff --git a/sys/ofed/drivers/infiniband/core/device.c b/sys/ofed/drivers/infiniband/core/device.c index a3aee411e39d..bb580edf0040 100644 --- a/sys/ofed/drivers/infiniband/core/device.c +++ b/sys/ofed/drivers/infiniband/core/device.c @@ -90,7 +90,8 @@ static int ib_device_check_mandatory(struct ib_device *device) IB_MANDATORY_FUNC(poll_cq), IB_MANDATORY_FUNC(req_notify_cq), IB_MANDATORY_FUNC(get_dma_mr), - IB_MANDATORY_FUNC(dereg_mr) + IB_MANDATORY_FUNC(dereg_mr), + IB_MANDATORY_FUNC(get_port_immutable) }; int i; @@ -149,13 +150,13 @@ static int alloc_name(char *name) return 0; } -static int start_port(struct ib_device *device) +static int rdma_start_port(struct ib_device *device) { return (device->node_type == RDMA_NODE_IB_SWITCH) ? 0 : 1; } -static int end_port(struct ib_device *device) +static int rdma_end_port(struct ib_device *device) { return (device->node_type == RDMA_NODE_IB_SWITCH) ? 0 : device->phys_port_cnt; @@ -193,6 +194,7 @@ EXPORT_SYMBOL(ib_alloc_device); void ib_dealloc_device(struct ib_device *device) { if (device->reg_state == IB_DEV_UNINITIALIZED) { + kfree(device->port_immutable); kfree(device); return; } @@ -225,43 +227,42 @@ static int add_client_context(struct ib_device *device, struct ib_client *client return 0; } -static int read_port_table_lengths(struct ib_device *device) +static int verify_immutable(const struct ib_device *dev, u8 port) { - struct ib_port_attr *tprops = NULL; - int num_ports, ret = -ENOMEM; - u8 port_index; + return WARN_ON(!rdma_cap_ib_mad(dev, port) && + rdma_max_mad_size(dev, port) != 0); +} - tprops = kmalloc(sizeof *tprops, GFP_KERNEL); - if (!tprops) - goto out; +static int read_port_immutable(struct ib_device *device) +{ + int ret; + u8 start_port = rdma_start_port(device); + u8 end_port = rdma_end_port(device); + u8 port; - num_ports = end_port(device) - start_port(device) + 1; + /** + * device->port_immutable is indexed directly by the port number to make + * access to this data as efficient as possible. + * + * Therefore port_immutable is declared as a 1 based array with + * potential empty slots at the beginning. + */ + device->port_immutable = kzalloc(sizeof(*device->port_immutable) + * (end_port + 1), + GFP_KERNEL); + if (!device->port_immutable) + return -ENOMEM; - device->pkey_tbl_len = kmalloc(sizeof *device->pkey_tbl_len * num_ports, - GFP_KERNEL); - device->gid_tbl_len = kmalloc(sizeof *device->gid_tbl_len * num_ports, - GFP_KERNEL); - if (!device->pkey_tbl_len || !device->gid_tbl_len) - goto err; - - for (port_index = 0; port_index < num_ports; ++port_index) { - ret = ib_query_port(device, port_index + start_port(device), - tprops); + for (port = start_port; port <= end_port; ++port) { + ret = device->get_port_immutable(device, port, + &device->port_immutable[port]); if (ret) - goto err; - device->pkey_tbl_len[port_index] = tprops->pkey_tbl_len; - device->gid_tbl_len[port_index] = tprops->gid_tbl_len; + return ret; + + if (verify_immutable(device, port)) + return -EINVAL; } - - ret = 0; - goto out; - -err: - kfree(device->gid_tbl_len); - kfree(device->pkey_tbl_len); -out: - kfree(tprops); - return ret; + return 0; } /** @@ -297,10 +298,11 @@ int ib_register_device(struct ib_device *device, spin_lock_init(&device->event_handler_lock); spin_lock_init(&device->client_data_lock); - ret = read_port_table_lengths(device); + + ret = read_port_immutable(device); if (ret) { - printk(KERN_WARNING "Couldn't create table lengths cache for device %s\n", - device->name); + printk(KERN_WARNING "Couldn't create per port immutable data %s\n", + device->name); goto out; } @@ -308,8 +310,7 @@ int ib_register_device(struct ib_device *device, if (ret) { printk(KERN_WARNING "Couldn't register device %s with driver model\n", device->name); - kfree(device->gid_tbl_len); - kfree(device->pkey_tbl_len); + kfree(device->port_immutable); goto out; } @@ -351,9 +352,6 @@ void ib_unregister_device(struct ib_device *device) list_del(&device->core_list); - kfree(device->gid_tbl_len); - kfree(device->pkey_tbl_len); - mutex_unlock(&device_mutex); ib_device_unregister_sysfs(device); @@ -578,7 +576,7 @@ int ib_query_port(struct ib_device *device, u8 port_num, struct ib_port_attr *port_attr) { - if (port_num < start_port(device) || port_num > end_port(device)) + if (port_num < rdma_start_port(device) || port_num > rdma_end_port(device)) return -EINVAL; return device->query_port(device, port_num, port_attr); @@ -656,7 +654,7 @@ int ib_modify_port(struct ib_device *device, if (!device->modify_port) return -ENOSYS; - if (port_num < start_port(device) || port_num > end_port(device)) + if (port_num < rdma_start_port(device) || port_num > rdma_end_port(device)) return -EINVAL; return device->modify_port(device, port_num, port_modify_mask, @@ -679,8 +677,8 @@ int ib_find_gid(struct ib_device *device, union ib_gid *gid, union ib_gid tmp_gid; int ret, port, i; - for (port = start_port(device); port <= end_port(device); ++port) { - for (i = 0; i < device->gid_tbl_len[port - start_port(device)]; ++i) { + for (port = rdma_start_port(device); port <= rdma_end_port(device); ++port) { + for (i = 0; i < device->port_immutable[port].gid_tbl_len; ++i) { ret = ib_query_gid(device, port, i, &tmp_gid); if (ret) return ret; @@ -712,7 +710,7 @@ int ib_find_pkey(struct ib_device *device, u16 tmp_pkey; int partial_ix = -1; - for (i = 0; i < device->pkey_tbl_len[port_num - start_port(device)]; ++i) { + for (i = 0; i < device->port_immutable[port_num].pkey_tbl_len; ++i) { ret = ib_query_pkey(device, port_num, i, &tmp_pkey); if (ret) return ret; diff --git a/sys/ofed/drivers/infiniband/hw/mthca/mthca_provider.c b/sys/ofed/drivers/infiniband/hw/mthca/mthca_provider.c index adc24aae6e9b..264db51e7758 100644 --- a/sys/ofed/drivers/infiniband/hw/mthca/mthca_provider.c +++ b/sys/ofed/drivers/infiniband/hw/mthca/mthca_provider.c @@ -1297,6 +1297,25 @@ static int mthca_init_node_data(struct mthca_dev *dev) return err; } +static int mthca_port_immutable(struct ib_device *ibdev, u8 port_num, + struct ib_port_immutable *immutable) +{ + struct ib_port_attr attr; + int err; + + immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; + + err = ib_query_port(ibdev, port_num, &attr); + if (err) + return err; + + immutable->pkey_tbl_len = attr.pkey_tbl_len; + immutable->gid_tbl_len = attr.gid_tbl_len; + immutable->max_mad_size = IB_MGMT_MAD_SIZE; + + return 0; +} + int mthca_register_device(struct mthca_dev *dev) { int ret; @@ -1376,6 +1395,7 @@ int mthca_register_device(struct mthca_dev *dev) dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr; dev->ib_dev.reg_user_mr = mthca_reg_user_mr; dev->ib_dev.dereg_mr = mthca_dereg_mr; + dev->ib_dev.get_port_immutable = mthca_port_immutable; if (dev->mthca_flags & MTHCA_FLAG_FMR) { dev->ib_dev.alloc_fmr = mthca_alloc_fmr; diff --git a/sys/ofed/include/rdma/ib_mad.h b/sys/ofed/include/rdma/ib_mad.h index 3d81b90cc315..1a7fb1ae564c 100644 --- a/sys/ofed/include/rdma/ib_mad.h +++ b/sys/ofed/include/rdma/ib_mad.h @@ -134,6 +134,7 @@ enum { IB_MGMT_SA_DATA = 200, IB_MGMT_DEVICE_HDR = 64, IB_MGMT_DEVICE_DATA = 192, + IB_MGMT_MAD_SIZE = IB_MGMT_MAD_HDR + IB_MGMT_MAD_DATA, }; struct ib_mad_hdr { diff --git a/sys/ofed/include/rdma/ib_verbs.h b/sys/ofed/include/rdma/ib_verbs.h index 21fe2ffdb3bb..8363b095b232 100644 --- a/sys/ofed/include/rdma/ib_verbs.h +++ b/sys/ofed/include/rdma/ib_verbs.h @@ -348,6 +348,56 @@ union rdma_protocol_stats { struct iw_protocol_stats iw; }; +/* Define bits for the various functionality this port needs to be supported by + * the core. + */ +/* Management 0x00000FFF */ +#define RDMA_CORE_CAP_IB_MAD 0x00000001 +#define RDMA_CORE_CAP_IB_SMI 0x00000002 +#define RDMA_CORE_CAP_IB_CM 0x00000004 +#define RDMA_CORE_CAP_IW_CM 0x00000008 +#define RDMA_CORE_CAP_IB_SA 0x00000010 +#define RDMA_CORE_CAP_OPA_MAD 0x00000020 + +/* Address format 0x000FF000 */ +#define RDMA_CORE_CAP_AF_IB 0x00001000 +#define RDMA_CORE_CAP_ETH_AH 0x00002000 +#define RDMA_CORE_CAP_OPA_AH 0x00004000 + +/* Protocol 0xFFF00000 */ +#define RDMA_CORE_CAP_PROT_IB 0x00100000 +#define RDMA_CORE_CAP_PROT_ROCE 0x00200000 +#define RDMA_CORE_CAP_PROT_IWARP 0x00400000 +#define RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP 0x00800000 +#define RDMA_CORE_CAP_PROT_RAW_PACKET 0x01000000 +#define RDMA_CORE_CAP_PROT_USNIC 0x02000000 + +#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \ + | RDMA_CORE_CAP_IB_MAD \ + | RDMA_CORE_CAP_IB_SMI \ + | RDMA_CORE_CAP_IB_CM \ + | RDMA_CORE_CAP_IB_SA \ + | RDMA_CORE_CAP_AF_IB) +#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \ + | RDMA_CORE_CAP_IB_MAD \ + | RDMA_CORE_CAP_IB_CM \ + | RDMA_CORE_CAP_AF_IB \ + | RDMA_CORE_CAP_ETH_AH) +#define RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP \ + (RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP \ + | RDMA_CORE_CAP_IB_MAD \ + | RDMA_CORE_CAP_IB_CM \ + | RDMA_CORE_CAP_AF_IB \ + | RDMA_CORE_CAP_ETH_AH) +#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \ + | RDMA_CORE_CAP_IW_CM) +#define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \ + | RDMA_CORE_CAP_OPA_MAD) + +#define RDMA_CORE_PORT_RAW_PACKET (RDMA_CORE_CAP_PROT_RAW_PACKET) + +#define RDMA_CORE_PORT_USNIC (RDMA_CORE_CAP_PROT_USNIC) + struct ib_port_attr { enum ib_port_state state; enum ib_mtu max_mtu; @@ -1623,6 +1673,14 @@ struct ib_dma_mapping_ops { }; struct iw_cm_verbs; + +struct ib_port_immutable { + int pkey_tbl_len; + int gid_tbl_len; + u32 core_cap_flags; + u32 max_mad_size; +}; + struct ib_exp_device_attr; struct ib_exp_qp_init_attr; @@ -1639,8 +1697,10 @@ struct ib_device { struct list_head client_data_list; struct ib_cache cache; - int *pkey_tbl_len; - int *gid_tbl_len; + /** + * port_immutable is indexed by port number + */ + struct ib_port_immutable *port_immutable; int num_comp_vectors; @@ -1845,6 +1905,15 @@ struct ib_device { u32 cmd_n; spinlock_t cmd_perf_lock; + + /** + * The following mandatory functions are used only at device + * registration. Keep functions such as these at the end of this + * structure to avoid cache line misses when accessing struct ib_device + * in fast paths. + */ + int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *); + /* * Experimental data and functions */ @@ -1928,6 +1997,252 @@ int ib_query_port(struct ib_device *device, enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num); +static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB; +} + +static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & + (RDMA_CORE_CAP_PROT_ROCE | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP); +} + +static inline bool rdma_protocol_roce_udp_encap(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP; +} + +static inline bool rdma_protocol_roce_eth_encap(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE; +} + +static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP; +} + +static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num) +{ + return rdma_protocol_ib(device, port_num) || + rdma_protocol_roce(device, port_num); +} + +/** + * rdma_cap_ib_mad - Check if the port of a device supports Infiniband + * Management Datagrams. + * @device: Device to check + * @port_num: Port number to check + * + * Management Datagrams (MAD) are a required part of the InfiniBand + * specification and are supported on all InfiniBand devices. A slightly + * extended version are also supported on OPA interfaces. + * + * Return: true if the port supports sending/receiving of MAD packets. + */ +static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD; +} + +/** + * rdma_cap_opa_mad - Check if the port of device provides support for OPA + * Management Datagrams. + * @device: Device to check + * @port_num: Port number to check + * + * Intel OmniPath devices extend and/or replace the InfiniBand Management + * datagrams with their own versions. These OPA MADs share many but not all of + * the characteristics of InfiniBand MADs. + * + * OPA MADs differ in the following ways: + * + * 1) MADs are variable size up to 2K + * IBTA defined MADs remain fixed at 256 bytes + * 2) OPA SMPs must carry valid PKeys + * 3) OPA SMP packets are a different format + * + * Return: true if the port supports OPA MAD packet formats. + */ +static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num) +{ + return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD) + == RDMA_CORE_CAP_OPA_MAD; +} + +/** + * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband + * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI). + * @device: Device to check + * @port_num: Port number to check + * + * Each InfiniBand node is required to provide a Subnet Management Agent + * that the subnet manager can access. Prior to the fabric being fully + * configured by the subnet manager, the SMA is accessed via a well known + * interface called the Subnet Management Interface (SMI). This interface + * uses directed route packets to communicate with the SM to get around the + * chicken and egg problem of the SM needing to know what's on the fabric + * in order to configure the fabric, and needing to configure the fabric in + * order to send packets to the devices on the fabric. These directed + * route packets do not need the fabric fully configured in order to reach + * their destination. The SMI is the only method allowed to send + * directed route packets on an InfiniBand fabric. + * + * Return: true if the port provides an SMI. + */ +static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI; +} + +/** + * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband + * Communication Manager. + * @device: Device to check + * @port_num: Port number to check + * + * The InfiniBand Communication Manager is one of many pre-defined General + * Service Agents (GSA) that are accessed via the General Service + * Interface (GSI). It's role is to facilitate establishment of connections + * between nodes as well as other management related tasks for established + * connections. + * + * Return: true if the port supports an IB CM (this does not guarantee that + * a CM is actually running however). + */ +static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM; +} + +/** + * rdma_cap_iw_cm - Check if the port of device has the capability IWARP + * Communication Manager. + * @device: Device to check + * @port_num: Port number to check + * + * Similar to above, but specific to iWARP connections which have a different + * managment protocol than InfiniBand. + * + * Return: true if the port supports an iWARP CM (this does not guarantee that + * a CM is actually running however). + */ +static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM; +} + +/** + * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband + * Subnet Administration. + * @device: Device to check + * @port_num: Port number to check + * + * An InfiniBand Subnet Administration (SA) service is a pre-defined General + * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand + * fabrics, devices should resolve routes to other hosts by contacting the + * SA to query the proper route. + * + * Return: true if the port should act as a client to the fabric Subnet + * Administration interface. This does not imply that the SA service is + * running locally. + */ +static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA; +} + +/** + * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband + * Multicast. + * @device: Device to check + * @port_num: Port number to check + * + * InfiniBand multicast registration is more complex than normal IPv4 or + * IPv6 multicast registration. Each Host Channel Adapter must register + * with the Subnet Manager when it wishes to join a multicast group. It + * should do so only once regardless of how many queue pairs it subscribes + * to this group. And it should leave the group only after all queue pairs + * attached to the group have been detached. + * + * Return: true if the port must undertake the additional adminstrative + * overhead of registering/unregistering with the SM and tracking of the + * total number of queue pairs attached to the multicast group. + */ +static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num) +{ + return rdma_cap_ib_sa(device, port_num); +} + +/** + * rdma_cap_af_ib - Check if the port of device has the capability + * Native Infiniband Address. + * @device: Device to check + * @port_num: Port number to check + * + * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default + * GID. RoCE uses a different mechanism, but still generates a GID via + * a prescribed mechanism and port specific data. + * + * Return: true if the port uses a GID address to identify devices on the + * network. + */ +static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB; +} + +/** + * rdma_cap_eth_ah - Check if the port of device has the capability + * Ethernet Address Handle. + * @device: Device to check + * @port_num: Port number to check + * + * RoCE is InfiniBand over Ethernet, and it uses a well defined technique + * to fabricate GIDs over Ethernet/IP specific addresses native to the + * port. Normally, packet headers are generated by the sending host + * adapter, but when sending connectionless datagrams, we must manually + * inject the proper headers for the fabric we are communicating over. + * + * Return: true if we are running as a RoCE port and must force the + * addition of a Global Route Header built from our Ethernet Address + * Handle into our header list for connectionless packets. + */ +static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH; +} + +/** + * rdma_max_mad_size - Return the max MAD size required by this RDMA Port. + * + * @device: Device + * @port_num: Port number + * + * This MAD size includes the MAD headers and MAD payload. No other headers + * are included. + * + * Return the max MAD size required by the Port. Will return 0 if the port + * does not support MADs + */ +static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num) +{ + return device->port_immutable[port_num].max_mad_size; +} + +/* + * Check if the device supports READ W/ INVALIDATE. + */ +static inline bool rdma_cap_read_inv(struct ib_device *dev, u32 port_num) +{ + /* + * iWarp drivers must support READ W/ INVALIDATE. No other protocol + * has support for it yet. + */ + return rdma_protocol_iwarp(dev, port_num); +} + int ib_query_gid(struct ib_device *device, u8 port_num, int index, union ib_gid *gid); From 43139893607b9db3e20726d0fa6096583f7f93c7 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 20 Oct 2017 08:25:49 +0000 Subject: [PATCH 195/219] In vm_page_free_phys_pglist(), do not take vm_page_queue_free_mtx if there is nothing to do. Suggested by: mjg Reviewed by: alc Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/vm/vm_page.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/vm/vm_page.c b/sys/vm/vm_page.c index 31553bdc380a..dafcab4e2d7d 100644 --- a/sys/vm/vm_page.c +++ b/sys/vm/vm_page.c @@ -2857,6 +2857,8 @@ vm_page_free_phys_pglist(struct pglist *tq) { vm_page_t m; + if (TAILQ_EMPTY(tq)) + return; mtx_lock(&vm_page_queue_free_mtx); TAILQ_FOREACH(m, tq, listq) vm_page_free_phys(m); From 05877a85952c436e051b19a323af704e0a85e13d Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 20 Oct 2017 08:32:37 +0000 Subject: [PATCH 196/219] Do not overwrite clean blocks on pageout. If filesystem block size is less than the page size, it is possible that the page-out run contains partially clean pages. E.g., the chunk of the page might be bdwrite()-ed, or some thread performed bwrite() on a buffer which references a chunk of the paged out page. As result, the assertion added in r319975, which checked that all pages in the run are dirty, does not hold on such filesystems. One solution is to remove the assert, but it is undesirable, because we do overwrite the valid on-disk content. I cannot provide a scenario where such write would corrupt the file data, but I do not like it on principle. Another, in my opinion proper, solution is to only write parts of the pages still marked dirty. The patch implements this, it skips clean blocks and only writes the dirty block runs. Note that due to clustering, write one page might clean other pages in the run, so the next write range must be calculated only after the current range is written out. More, due to a possible invalidation, and the fact that the object lock is dropped and reacquired before the checks, it is possible that the whole page-out pages run appears to consist of only clean pages. For this reason, it is impossible to assert that there is some work for the pageout method to do (i.e. assert that there is at least one dirty page in the run). But such clearing can only occur due to invalidation, and not due to a parallel write, because we own the vnode lock exclusive. Reported by: fsu In collaboration with: pho Reviewed by: alc, markj Sponsored by: The FreeBSD Foundation MFC after: 3 weeks Differential revision: https://reviews.freebsd.org/D12668 --- sys/vm/vnode_pager.c | 131 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 109 insertions(+), 22 deletions(-) diff --git a/sys/vm/vnode_pager.c b/sys/vm/vnode_pager.c index e5bb3c2ff8db..83f10f75eace 100644 --- a/sys/vm/vnode_pager.c +++ b/sys/vm/vnode_pager.c @@ -1179,6 +1179,23 @@ vnode_pager_putpages(vm_object_t object, vm_page_t *m, int count, VM_OBJECT_WLOCK(object); } +static int +vn_off2bidx(vm_ooffset_t offset) +{ + + return ((offset & PAGE_MASK) / DEV_BSIZE); +} + +static bool +vn_dirty_blk(vm_page_t m, vm_ooffset_t offset) +{ + + KASSERT(IDX_TO_OFF(m->pindex) <= offset && + offset < IDX_TO_OFF(m->pindex + 1), + ("page %p pidx %ju offset %ju", m, (uintmax_t)m->pindex, + (uintmax_t)offset)); + return ((m->dirty & ((vm_page_bits_t)1 << vn_off2bidx(offset))) != 0); +} /* * This is now called from local media FS's to operate against their @@ -1195,10 +1212,12 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, { vm_object_t object; vm_page_t m; - vm_ooffset_t poffset; + vm_ooffset_t maxblksz, next_offset, poffset, prev_offset; struct uio auio; struct iovec aiov; + off_t prev_resid, wrsz; int count, error, i, maxsize, ncount, pgoff, ppscheck; + bool in_hole; static struct timeval lastfail; static int curfail; @@ -1260,34 +1279,102 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, for (i = ncount; i < count; i++) rtvals[i] = VM_PAGER_BAD; } - for (i = 0; i < ncount - ((btoc(maxsize) & PAGE_MASK) != 0); i++) - MPASS(ma[i]->dirty == VM_PAGE_BITS_ALL); - VM_OBJECT_WUNLOCK(object); - aiov.iov_base = NULL; - aiov.iov_len = maxsize; auio.uio_iov = &aiov; - auio.uio_iovcnt = 1; - auio.uio_offset = poffset; auio.uio_segflg = UIO_NOCOPY; auio.uio_rw = UIO_WRITE; - auio.uio_resid = maxsize; auio.uio_td = NULL; - error = VOP_WRITE(vp, &auio, vnode_pager_putpages_ioflags(flags), - curthread->td_ucred); - VM_CNT_INC(v_vnodeout); - VM_CNT_ADD(v_vnodepgsout, ncount); + maxblksz = roundup2(poffset + maxsize, DEV_BSIZE); - ppscheck = 0; - if (error != 0 && (ppscheck = ppsratecheck(&lastfail, &curfail, 1)) - != 0) - printf("vnode_pager_putpages: I/O error %d\n", error); - if (auio.uio_resid != 0 && (ppscheck != 0 || - ppsratecheck(&lastfail, &curfail, 1) != 0)) - printf("vnode_pager_putpages: residual I/O %zd at %ju\n", - auio.uio_resid, (uintmax_t)ma[0]->pindex); - for (i = 0; i < ncount; i++) + for (prev_offset = poffset; prev_offset < maxblksz;) { + /* Skip clean blocks. */ + for (in_hole = true; in_hole && prev_offset < maxblksz;) { + m = ma[OFF_TO_IDX(prev_offset - poffset)]; + for (i = vn_off2bidx(prev_offset); + i < sizeof(vm_page_bits_t) * NBBY && + prev_offset < maxblksz; i++) { + if (vn_dirty_blk(m, prev_offset)) { + in_hole = false; + break; + } + prev_offset += DEV_BSIZE; + } + } + if (in_hole) + goto write_done; + + /* Find longest run of dirty blocks. */ + for (next_offset = prev_offset; next_offset < maxblksz;) { + m = ma[OFF_TO_IDX(next_offset - poffset)]; + for (i = vn_off2bidx(next_offset); + i < sizeof(vm_page_bits_t) * NBBY && + next_offset < maxblksz; i++) { + if (!vn_dirty_blk(m, next_offset)) + goto start_write; + next_offset += DEV_BSIZE; + } + } +start_write: + if (next_offset > poffset + maxsize) + next_offset = poffset + maxsize; + + /* + * Getting here requires finding a dirty block in the + * 'skip clean blocks' loop. + */ + MPASS(prev_offset < next_offset); + + VM_OBJECT_WUNLOCK(object); + aiov.iov_base = NULL; + auio.uio_iovcnt = 1; + auio.uio_offset = prev_offset; + prev_resid = auio.uio_resid = aiov.iov_len = next_offset - + prev_offset; + error = VOP_WRITE(vp, &auio, + vnode_pager_putpages_ioflags(flags), curthread->td_ucred); + + wrsz = prev_resid - auio.uio_resid; + if (wrsz == 0) { + if (ppsratecheck(&lastfail, &curfail, 1) != 0) { + vn_printf(vp, "vnode_pager_putpages: " + "zero-length write at %ju resid %zd\n", + auio.uio_offset, auio.uio_resid); + } + VM_OBJECT_WLOCK(object); + break; + } + + /* Adjust the starting offset for next iteration. */ + prev_offset += wrsz; + MPASS(auio.uio_offset == prev_offset); + + ppscheck = 0; + if (error != 0 && (ppscheck = ppsratecheck(&lastfail, + &curfail, 1)) != 0) + vn_printf(vp, "vnode_pager_putpages: I/O error %d\n", + error); + if (auio.uio_resid != 0 && (ppscheck != 0 || + ppsratecheck(&lastfail, &curfail, 1) != 0)) + vn_printf(vp, "vnode_pager_putpages: residual I/O %zd " + "at %ju\n", auio.uio_resid, + (uintmax_t)ma[0]->pindex); + VM_OBJECT_WLOCK(object); + if (error != 0 || auio.uio_resid != 0) + break; + } +write_done: + /* Mark completely processed pages. */ + for (i = 0; i < OFF_TO_IDX(prev_offset - poffset); i++) rtvals[i] = VM_PAGER_OK; + /* Mark partial EOF page. */ + if (prev_offset == poffset + maxsize && (prev_offset & PAGE_MASK) != 0) + rtvals[i++] = VM_PAGER_OK; + /* Unwritten pages in range, free bonus if the page is clean. */ + for (; i < ncount; i++) + rtvals[i] = ma[i]->dirty == 0 ? VM_PAGER_OK : VM_PAGER_ERROR; + VM_OBJECT_WUNLOCK(object); + VM_CNT_ADD(v_vnodepgsout, i); + VM_CNT_INC(v_vnodeout); return (rtvals[0]); } From ac04195ba6b53ea368879cc68b146a9477486cb2 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 20 Oct 2017 09:10:49 +0000 Subject: [PATCH 197/219] Move swapout code into vm/vm_swapout.c. There is no NO_SWAPPING #ifdef left in the code. Requested by: alc Reviewed by: alc, markj Sponsored by: The FreeBSD Foundation MFC after: 3 weeks Differential revision: https://reviews.freebsd.org/D12663 --- sys/conf/files | 4 +- sys/sys/_kstack_cache.h | 4 + sys/vm/vm_extern.h | 1 - sys/vm/vm_glue.c | 501 -------------------- sys/vm/vm_pageout.c | 395 +-------------- sys/vm/vm_pageout.h | 9 +- sys/vm/vm_swapout.c | 975 ++++++++++++++++++++++++++++++++++++++ sys/vm/vm_swapout_dummy.c | 122 +++++ 8 files changed, 1111 insertions(+), 900 deletions(-) create mode 100644 sys/vm/vm_swapout.c create mode 100644 sys/vm/vm_swapout_dummy.c diff --git a/sys/conf/files b/sys/conf/files index bd185588eee0..043bc6f98c16 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -4828,6 +4828,7 @@ vm/swap_pager.c standard vm/uma_core.c standard vm/uma_dbg.c standard vm/memguard.c optional DEBUG_MEMGUARD +vm/vm_domain.c standard vm/vm_fault.c standard vm/vm_glue.c standard vm/vm_init.c standard @@ -4842,7 +4843,8 @@ vm/vm_pager.c standard vm/vm_phys.c standard vm/vm_radix.c standard vm/vm_reserv.c standard -vm/vm_domain.c standard +vm/vm_swapout.c optional !NO_SWAPPING +vm/vm_swapout_dummy.c optional NO_SWAPPING vm/vm_unix.c standard vm/vnode_pager.c standard xen/features.c optional xenhvm diff --git a/sys/sys/_kstack_cache.h b/sys/sys/_kstack_cache.h index 0ad8f5081891..7271206c1503 100644 --- a/sys/sys/_kstack_cache.h +++ b/sys/sys/_kstack_cache.h @@ -38,6 +38,10 @@ struct kstack_cache_entry { extern struct kstack_cache_entry *kstack_cache; +#ifndef KSTACK_MAX_PAGES +#define KSTACK_MAX_PAGES 32 +#endif + #endif diff --git a/sys/vm/vm_extern.h b/sys/vm/vm_extern.h index a95a1bf395d5..d67ba18c94a5 100644 --- a/sys/vm/vm_extern.h +++ b/sys/vm/vm_extern.h @@ -71,7 +71,6 @@ void kmem_init(vm_offset_t, vm_offset_t); void kmem_init_zero_region(void); void kmeminit(void); -void swapout_procs(int); int kernacc(void *, int, int); int useracc(void *, int, int); int vm_fault(vm_map_t, vm_offset_t, vm_prot_t, int); diff --git a/sys/vm/vm_glue.c b/sys/vm/vm_glue.c index 3da7263f04a6..da4200f1caa8 100644 --- a/sys/vm/vm_glue.c +++ b/sys/vm/vm_glue.c @@ -101,13 +101,6 @@ __FBSDID("$FreeBSD$"); #include -#ifndef NO_SWAPPING -static int swapout(struct proc *); -static void swapclear(struct proc *); -static void vm_thread_swapin(struct thread *td); -static void vm_thread_swapout(struct thread *td); -#endif - /* * MPSAFE * @@ -308,10 +301,6 @@ SYSCTL_INT(_vm, OID_AUTO, kstack_cache_size, CTLFLAG_RW, &kstack_cache_size, 0, SYSCTL_INT(_vm, OID_AUTO, kstacks, CTLFLAG_RD, &kstacks, 0, ""); -#ifndef KSTACK_MAX_PAGES -#define KSTACK_MAX_PAGES 32 -#endif - /* * Create the kernel stack (including pcb for i386) for a new thread. * This routine directly affects the fork perf for a process and @@ -527,79 +516,6 @@ intr_prof_stack_use(struct thread *td, struct trapframe *frame) } #endif /* KSTACK_USAGE_PROF */ -#ifndef NO_SWAPPING -/* - * Allow a thread's kernel stack to be paged out. - */ -static void -vm_thread_swapout(struct thread *td) -{ - vm_object_t ksobj; - vm_page_t m; - int i, pages; - - cpu_thread_swapout(td); - pages = td->td_kstack_pages; - ksobj = td->td_kstack_obj; - pmap_qremove(td->td_kstack, pages); - VM_OBJECT_WLOCK(ksobj); - for (i = 0; i < pages; i++) { - m = vm_page_lookup(ksobj, i); - if (m == NULL) - panic("vm_thread_swapout: kstack already missing?"); - vm_page_dirty(m); - vm_page_lock(m); - vm_page_unwire(m, PQ_INACTIVE); - vm_page_unlock(m); - } - VM_OBJECT_WUNLOCK(ksobj); -} - -/* - * Bring the kernel stack for a specified thread back in. - */ -static void -vm_thread_swapin(struct thread *td) -{ - vm_object_t ksobj; - vm_page_t ma[KSTACK_MAX_PAGES]; - int pages; - - pages = td->td_kstack_pages; - ksobj = td->td_kstack_obj; - VM_OBJECT_WLOCK(ksobj); - (void)vm_page_grab_pages(ksobj, 0, VM_ALLOC_NORMAL | VM_ALLOC_WIRED, ma, - pages); - for (int i = 0; i < pages;) { - int j, a, count, rv; - - vm_page_assert_xbusied(ma[i]); - if (ma[i]->valid == VM_PAGE_BITS_ALL) { - vm_page_xunbusy(ma[i]); - i++; - continue; - } - vm_object_pip_add(ksobj, 1); - for (j = i + 1; j < pages; j++) - if (ma[j]->valid == VM_PAGE_BITS_ALL) - break; - rv = vm_pager_has_page(ksobj, ma[i]->pindex, NULL, &a); - KASSERT(rv == 1, ("%s: missing page %p", __func__, ma[i])); - count = min(a + 1, j - i); - rv = vm_pager_get_pages(ksobj, ma + i, count, NULL, NULL); - KASSERT(rv == VM_PAGER_OK, ("%s: cannot get kstack for proc %d", - __func__, td->td_proc->p_pid)); - vm_object_pip_wakeup(ksobj); - for (j = i; j < i + count; j++) - vm_page_xunbusy(ma[j]); - i += count; - } - VM_OBJECT_WUNLOCK(ksobj); - pmap_qenter(td->td_kstack, ma, pages); - cpu_thread_swapin(td); -} -#endif /* !NO_SWAPPING */ - /* * Implement fork's actions on an address space. * Here we arrange for the address space to be copied or referenced, @@ -672,426 +588,9 @@ vm_waitproc(p) vmspace_exitfree(p); /* and clean-out the vmspace */ } -void -faultin(p) - struct proc *p; -{ -#ifdef NO_SWAPPING - - PROC_LOCK_ASSERT(p, MA_OWNED); - if ((p->p_flag & P_INMEM) == 0) - panic("faultin: proc swapped out with NO_SWAPPING!"); -#else /* !NO_SWAPPING */ - struct thread *td; - - PROC_LOCK_ASSERT(p, MA_OWNED); - /* - * If another process is swapping in this process, - * just wait until it finishes. - */ - if (p->p_flag & P_SWAPPINGIN) { - while (p->p_flag & P_SWAPPINGIN) - msleep(&p->p_flag, &p->p_mtx, PVM, "faultin", 0); - return; - } - if ((p->p_flag & P_INMEM) == 0) { - /* - * Don't let another thread swap process p out while we are - * busy swapping it in. - */ - ++p->p_lock; - p->p_flag |= P_SWAPPINGIN; - PROC_UNLOCK(p); - - /* - * We hold no lock here because the list of threads - * can not change while all threads in the process are - * swapped out. - */ - FOREACH_THREAD_IN_PROC(p, td) - vm_thread_swapin(td); - PROC_LOCK(p); - swapclear(p); - p->p_swtick = ticks; - - wakeup(&p->p_flag); - - /* Allow other threads to swap p out now. */ - --p->p_lock; - } -#endif /* NO_SWAPPING */ -} - -/* - * This swapin algorithm attempts to swap-in processes only if there - * is enough space for them. Of course, if a process waits for a long - * time, it will be swapped in anyway. - */ -void -swapper(void) -{ - struct proc *p; - struct thread *td; - struct proc *pp; - int slptime; - int swtime; - int ppri; - int pri; - -loop: - if (vm_page_count_min()) { - VM_WAIT; - goto loop; - } - - pp = NULL; - ppri = INT_MIN; - sx_slock(&allproc_lock); - FOREACH_PROC_IN_SYSTEM(p) { - PROC_LOCK(p); - if (p->p_state == PRS_NEW || - p->p_flag & (P_SWAPPINGOUT | P_SWAPPINGIN | P_INMEM)) { - PROC_UNLOCK(p); - continue; - } - swtime = (ticks - p->p_swtick) / hz; - FOREACH_THREAD_IN_PROC(p, td) { - /* - * An otherwise runnable thread of a process - * swapped out has only the TDI_SWAPPED bit set. - * - */ - thread_lock(td); - if (td->td_inhibitors == TDI_SWAPPED) { - slptime = (ticks - td->td_slptick) / hz; - pri = swtime + slptime; - if ((td->td_flags & TDF_SWAPINREQ) == 0) - pri -= p->p_nice * 8; - /* - * if this thread is higher priority - * and there is enough space, then select - * this process instead of the previous - * selection. - */ - if (pri > ppri) { - pp = p; - ppri = pri; - } - } - thread_unlock(td); - } - PROC_UNLOCK(p); - } - sx_sunlock(&allproc_lock); - - /* - * Nothing to do, back to sleep. - */ - if ((p = pp) == NULL) { - tsleep(&proc0, PVM, "swapin", MAXSLP * hz / 2); - goto loop; - } - PROC_LOCK(p); - - /* - * Another process may be bringing or may have already - * brought this process in while we traverse all threads. - * Or, this process may even be being swapped out again. - */ - if (p->p_flag & (P_INMEM | P_SWAPPINGOUT | P_SWAPPINGIN)) { - PROC_UNLOCK(p); - goto loop; - } - - /* - * We would like to bring someone in. (only if there is space). - * [What checks the space? ] - */ - faultin(p); - PROC_UNLOCK(p); - goto loop; -} - void kick_proc0(void) { wakeup(&proc0); } - -#ifndef NO_SWAPPING - -/* - * Swap_idle_threshold1 is the guaranteed swapped in time for a process - */ -static int swap_idle_threshold1 = 2; -SYSCTL_INT(_vm, OID_AUTO, swap_idle_threshold1, CTLFLAG_RW, - &swap_idle_threshold1, 0, "Guaranteed swapped in time for a process"); - -/* - * Swap_idle_threshold2 is the time that a process can be idle before - * it will be swapped out, if idle swapping is enabled. - */ -static int swap_idle_threshold2 = 10; -SYSCTL_INT(_vm, OID_AUTO, swap_idle_threshold2, CTLFLAG_RW, - &swap_idle_threshold2, 0, "Time before a process will be swapped out"); - -/* - * First, if any processes have been sleeping or stopped for at least - * "swap_idle_threshold1" seconds, they are swapped out. If, however, - * no such processes exist, then the longest-sleeping or stopped - * process is swapped out. Finally, and only as a last resort, if - * there are no sleeping or stopped processes, the longest-resident - * process is swapped out. - */ -void -swapout_procs(action) -int action; -{ - struct proc *p; - struct thread *td; - int didswap = 0; - -retry: - sx_slock(&allproc_lock); - FOREACH_PROC_IN_SYSTEM(p) { - struct vmspace *vm; - int minslptime = 100000; - int slptime; - - PROC_LOCK(p); - /* - * Watch out for a process in - * creation. It may have no - * address space or lock yet. - */ - if (p->p_state == PRS_NEW) { - PROC_UNLOCK(p); - continue; - } - /* - * An aio daemon switches its - * address space while running. - * Perform a quick check whether - * a process has P_SYSTEM. - * Filter out exiting processes. - */ - if ((p->p_flag & (P_SYSTEM | P_WEXIT)) != 0) { - PROC_UNLOCK(p); - continue; - } - _PHOLD_LITE(p); - PROC_UNLOCK(p); - sx_sunlock(&allproc_lock); - - /* - * Do not swapout a process that - * is waiting for VM data - * structures as there is a possible - * deadlock. Test this first as - * this may block. - * - * Lock the map until swapout - * finishes, or a thread of this - * process may attempt to alter - * the map. - */ - vm = vmspace_acquire_ref(p); - if (vm == NULL) - goto nextproc2; - if (!vm_map_trylock(&vm->vm_map)) - goto nextproc1; - - PROC_LOCK(p); - if (p->p_lock != 1 || (p->p_flag & (P_STOPPED_SINGLE | - P_TRACED | P_SYSTEM)) != 0) - goto nextproc; - - /* - * only aiod changes vmspace, however it will be - * skipped because of the if statement above checking - * for P_SYSTEM - */ - if ((p->p_flag & (P_INMEM|P_SWAPPINGOUT|P_SWAPPINGIN)) != P_INMEM) - goto nextproc; - - switch (p->p_state) { - default: - /* Don't swap out processes in any sort - * of 'special' state. */ - break; - - case PRS_NORMAL: - /* - * do not swapout a realtime process - * Check all the thread groups.. - */ - FOREACH_THREAD_IN_PROC(p, td) { - thread_lock(td); - if (PRI_IS_REALTIME(td->td_pri_class)) { - thread_unlock(td); - goto nextproc; - } - slptime = (ticks - td->td_slptick) / hz; - /* - * Guarantee swap_idle_threshold1 - * time in memory. - */ - if (slptime < swap_idle_threshold1) { - thread_unlock(td); - goto nextproc; - } - - /* - * Do not swapout a process if it is - * waiting on a critical event of some - * kind or there is a thread whose - * pageable memory may be accessed. - * - * This could be refined to support - * swapping out a thread. - */ - if (!thread_safetoswapout(td)) { - thread_unlock(td); - goto nextproc; - } - /* - * If the system is under memory stress, - * or if we are swapping - * idle processes >= swap_idle_threshold2, - * then swap the process out. - */ - if (((action & VM_SWAP_NORMAL) == 0) && - (((action & VM_SWAP_IDLE) == 0) || - (slptime < swap_idle_threshold2))) { - thread_unlock(td); - goto nextproc; - } - - if (minslptime > slptime) - minslptime = slptime; - thread_unlock(td); - } - - /* - * If the pageout daemon didn't free enough pages, - * or if this process is idle and the system is - * configured to swap proactively, swap it out. - */ - if ((action & VM_SWAP_NORMAL) || - ((action & VM_SWAP_IDLE) && - (minslptime > swap_idle_threshold2))) { - _PRELE(p); - if (swapout(p) == 0) - didswap++; - PROC_UNLOCK(p); - vm_map_unlock(&vm->vm_map); - vmspace_free(vm); - goto retry; - } - } -nextproc: - PROC_UNLOCK(p); - vm_map_unlock(&vm->vm_map); -nextproc1: - vmspace_free(vm); -nextproc2: - sx_slock(&allproc_lock); - PRELE(p); - } - sx_sunlock(&allproc_lock); - /* - * If we swapped something out, and another process needed memory, - * then wakeup the sched process. - */ - if (didswap) - wakeup(&proc0); -} - -static void -swapclear(p) - struct proc *p; -{ - struct thread *td; - - PROC_LOCK_ASSERT(p, MA_OWNED); - - FOREACH_THREAD_IN_PROC(p, td) { - thread_lock(td); - td->td_flags |= TDF_INMEM; - td->td_flags &= ~TDF_SWAPINREQ; - TD_CLR_SWAPPED(td); - if (TD_CAN_RUN(td)) - if (setrunnable(td)) { -#ifdef INVARIANTS - /* - * XXX: We just cleared TDI_SWAPPED - * above and set TDF_INMEM, so this - * should never happen. - */ - panic("not waking up swapper"); -#endif - } - thread_unlock(td); - } - p->p_flag &= ~(P_SWAPPINGIN|P_SWAPPINGOUT); - p->p_flag |= P_INMEM; -} - -static int -swapout(p) - struct proc *p; -{ - struct thread *td; - - PROC_LOCK_ASSERT(p, MA_OWNED); -#if defined(SWAP_DEBUG) - printf("swapping out %d\n", p->p_pid); -#endif - - /* - * The states of this process and its threads may have changed - * by now. Assuming that there is only one pageout daemon thread, - * this process should still be in memory. - */ - KASSERT((p->p_flag & (P_INMEM|P_SWAPPINGOUT|P_SWAPPINGIN)) == P_INMEM, - ("swapout: lost a swapout race?")); - - /* - * remember the process resident count - */ - p->p_vmspace->vm_swrss = vmspace_resident_count(p->p_vmspace); - /* - * Check and mark all threads before we proceed. - */ - p->p_flag &= ~P_INMEM; - p->p_flag |= P_SWAPPINGOUT; - FOREACH_THREAD_IN_PROC(p, td) { - thread_lock(td); - if (!thread_safetoswapout(td)) { - thread_unlock(td); - swapclear(p); - return (EBUSY); - } - td->td_flags &= ~TDF_INMEM; - TD_SET_SWAPPED(td); - thread_unlock(td); - } - td = FIRST_THREAD_IN_PROC(p); - ++td->td_ru.ru_nswap; - PROC_UNLOCK(p); - - /* - * This list is stable because all threads are now prevented from - * running. The list is only modified in the context of a running - * thread in this process. - */ - FOREACH_THREAD_IN_PROC(p, td) - vm_thread_swapout(td); - - PROC_LOCK(p); - p->p_flag &= ~P_SWAPPINGOUT; - p->p_swtick = ticks; - return (0); -} -#endif /* !NO_SWAPPING */ diff --git a/sys/vm/vm_pageout.c b/sys/vm/vm_pageout.c index 921c003047b0..2872aeb49028 100644 --- a/sys/vm/vm_pageout.c +++ b/sys/vm/vm_pageout.c @@ -141,19 +141,6 @@ SYSINIT(pagedaemon, SI_SUB_KTHREAD_PAGE, SI_ORDER_SECOND, kproc_start, SDT_PROVIDER_DEFINE(vm); SDT_PROBE_DEFINE(vm, , , vm__lowmem_scan); -#if !defined(NO_SWAPPING) -/* the kernel process "vm_daemon"*/ -static void vm_daemon(void); -static struct proc *vmproc; - -static struct kproc_desc vm_kp = { - "vmdaemon", - vm_daemon, - &vmproc -}; -SYSINIT(vmdaemon, SI_SUB_KTHREAD_VM, SI_ORDER_FIRST, kproc_start, &vm_kp); -#endif - /* Pagedaemon activity rates, in subdivisions of one second. */ #define VM_LAUNDER_RATE 10 #define VM_INACT_SCAN_RATE 2 @@ -171,27 +158,12 @@ static enum { VM_LAUNDRY_SHORTFALL } vm_laundry_request = VM_LAUNDRY_IDLE; -#if !defined(NO_SWAPPING) -static int vm_pageout_req_swapout; /* XXX */ -static int vm_daemon_needed; -static struct mtx vm_daemon_mtx; -/* Allow for use by vm_pageout before vm_daemon is initialized. */ -MTX_SYSINIT(vm_daemon, &vm_daemon_mtx, "vm daemon", MTX_DEF); -#endif static int vm_pageout_update_period; static int disable_swap_pageouts; static int lowmem_period = 10; static time_t lowmem_uptime; static int swapdev_enabled; -#if defined(NO_SWAPPING) -static int vm_swap_enabled = 0; -static int vm_swap_idle_enabled = 0; -#else -static int vm_swap_enabled = 1; -static int vm_swap_idle_enabled = 0; -#endif - static int vm_panic_on_oom = 0; SYSCTL_INT(_vm, OID_AUTO, panic_on_oom, @@ -209,18 +181,6 @@ SYSCTL_INT(_vm, OID_AUTO, pageout_update_period, SYSCTL_INT(_vm, OID_AUTO, lowmem_period, CTLFLAG_RW, &lowmem_period, 0, "Low memory callback period"); -#if defined(NO_SWAPPING) -SYSCTL_INT(_vm, VM_SWAPPING_ENABLED, swap_enabled, - CTLFLAG_RD, &vm_swap_enabled, 0, "Enable entire process swapout"); -SYSCTL_INT(_vm, OID_AUTO, swap_idle_enabled, - CTLFLAG_RD, &vm_swap_idle_enabled, 0, "Allow swapout on idle criteria"); -#else -SYSCTL_INT(_vm, VM_SWAPPING_ENABLED, swap_enabled, - CTLFLAG_RW, &vm_swap_enabled, 0, "Enable entire process swapout"); -SYSCTL_INT(_vm, OID_AUTO, swap_idle_enabled, - CTLFLAG_RW, &vm_swap_idle_enabled, 0, "Allow swapout on idle criteria"); -#endif - SYSCTL_INT(_vm, OID_AUTO, disable_swapspace_pageouts, CTLFLAG_RW, &disable_swap_pageouts, 0, "Disallow swapout of dirty pages"); @@ -262,11 +222,6 @@ static boolean_t vm_pageout_fallback_object_lock(vm_page_t, vm_page_t *); static int vm_pageout_launder(struct vm_domain *vmd, int launder, bool in_shortfall); static void vm_pageout_laundry_worker(void *arg); -#if !defined(NO_SWAPPING) -static void vm_pageout_map_deactivate_pages(vm_map_t, long); -static void vm_pageout_object_deactivate_pages(pmap_t, vm_object_t, long); -static void vm_req_vmdaemon(int req); -#endif static boolean_t vm_pageout_page_lock(vm_page_t, vm_page_t *); /* @@ -632,171 +587,6 @@ vm_pageout_swapoff(void *arg __unused, struct swdevt *sp __unused) atomic_store_rel_int(&swapdev_enabled, 0); } -#if !defined(NO_SWAPPING) -/* - * vm_pageout_object_deactivate_pages - * - * Deactivate enough pages to satisfy the inactive target - * requirements. - * - * The object and map must be locked. - */ -static void -vm_pageout_object_deactivate_pages(pmap_t pmap, vm_object_t first_object, - long desired) -{ - vm_object_t backing_object, object; - vm_page_t p; - int act_delta, remove_mode; - - VM_OBJECT_ASSERT_LOCKED(first_object); - if ((first_object->flags & OBJ_FICTITIOUS) != 0) - return; - for (object = first_object;; object = backing_object) { - if (pmap_resident_count(pmap) <= desired) - goto unlock_return; - VM_OBJECT_ASSERT_LOCKED(object); - if ((object->flags & OBJ_UNMANAGED) != 0 || - object->paging_in_progress != 0) - goto unlock_return; - - remove_mode = 0; - if (object->shadow_count > 1) - remove_mode = 1; - /* - * Scan the object's entire memory queue. - */ - TAILQ_FOREACH(p, &object->memq, listq) { - if (pmap_resident_count(pmap) <= desired) - goto unlock_return; - if (vm_page_busied(p)) - continue; - VM_CNT_INC(v_pdpages); - vm_page_lock(p); - if (p->wire_count != 0 || p->hold_count != 0 || - !pmap_page_exists_quick(pmap, p)) { - vm_page_unlock(p); - continue; - } - act_delta = pmap_ts_referenced(p); - if ((p->aflags & PGA_REFERENCED) != 0) { - if (act_delta == 0) - act_delta = 1; - vm_page_aflag_clear(p, PGA_REFERENCED); - } - if (!vm_page_active(p) && act_delta != 0) { - vm_page_activate(p); - p->act_count += act_delta; - } else if (vm_page_active(p)) { - if (act_delta == 0) { - p->act_count -= min(p->act_count, - ACT_DECLINE); - if (!remove_mode && p->act_count == 0) { - pmap_remove_all(p); - vm_page_deactivate(p); - } else - vm_page_requeue(p); - } else { - vm_page_activate(p); - if (p->act_count < ACT_MAX - - ACT_ADVANCE) - p->act_count += ACT_ADVANCE; - vm_page_requeue(p); - } - } else if (vm_page_inactive(p)) - pmap_remove_all(p); - vm_page_unlock(p); - } - if ((backing_object = object->backing_object) == NULL) - goto unlock_return; - VM_OBJECT_RLOCK(backing_object); - if (object != first_object) - VM_OBJECT_RUNLOCK(object); - } -unlock_return: - if (object != first_object) - VM_OBJECT_RUNLOCK(object); -} - -/* - * deactivate some number of pages in a map, try to do it fairly, but - * that is really hard to do. - */ -static void -vm_pageout_map_deactivate_pages(map, desired) - vm_map_t map; - long desired; -{ - vm_map_entry_t tmpe; - vm_object_t obj, bigobj; - int nothingwired; - - if (!vm_map_trylock(map)) - return; - - bigobj = NULL; - nothingwired = TRUE; - - /* - * first, search out the biggest object, and try to free pages from - * that. - */ - tmpe = map->header.next; - while (tmpe != &map->header) { - if ((tmpe->eflags & MAP_ENTRY_IS_SUB_MAP) == 0) { - obj = tmpe->object.vm_object; - if (obj != NULL && VM_OBJECT_TRYRLOCK(obj)) { - if (obj->shadow_count <= 1 && - (bigobj == NULL || - bigobj->resident_page_count < obj->resident_page_count)) { - if (bigobj != NULL) - VM_OBJECT_RUNLOCK(bigobj); - bigobj = obj; - } else - VM_OBJECT_RUNLOCK(obj); - } - } - if (tmpe->wired_count > 0) - nothingwired = FALSE; - tmpe = tmpe->next; - } - - if (bigobj != NULL) { - vm_pageout_object_deactivate_pages(map->pmap, bigobj, desired); - VM_OBJECT_RUNLOCK(bigobj); - } - /* - * Next, hunt around for other pages to deactivate. We actually - * do this search sort of wrong -- .text first is not the best idea. - */ - tmpe = map->header.next; - while (tmpe != &map->header) { - if (pmap_resident_count(vm_map_pmap(map)) <= desired) - break; - if ((tmpe->eflags & MAP_ENTRY_IS_SUB_MAP) == 0) { - obj = tmpe->object.vm_object; - if (obj != NULL) { - VM_OBJECT_RLOCK(obj); - vm_pageout_object_deactivate_pages(map->pmap, obj, desired); - VM_OBJECT_RUNLOCK(obj); - } - } - tmpe = tmpe->next; - } - - /* - * Remove all mappings if a process is swapped out, this will free page - * table pages. - */ - if (desired == 0 && nothingwired) { - pmap_remove(vm_map_pmap(map), vm_map_min(map), - vm_map_max(map)); - } - - vm_map_unlock(map); -} -#endif /* !defined(NO_SWAPPING) */ - /* * Attempt to acquire all of the necessary locks to launder a page and * then call through the clustering layer to PUTPAGES. Wait a short @@ -1563,14 +1353,12 @@ vm_pageout_scan(struct vm_domain *vmd, int pass) vm_pagequeue_unlock(pq); } -#if !defined(NO_SWAPPING) /* * Wakeup the swapout daemon if we didn't free the targeted number of * pages. */ - if (vm_swap_enabled && page_shortage > 0) - vm_req_vmdaemon(VM_SWAP_NORMAL); -#endif + if (page_shortage > 0) + vm_swapout_run(); /* * If the inactive queue scan fails repeatedly to meet its @@ -1720,19 +1508,8 @@ vm_pageout_scan(struct vm_domain *vmd, int pass) vm_page_unlock(m); } vm_pagequeue_unlock(pq); -#if !defined(NO_SWAPPING) - /* - * Idle process swapout -- run once per second when we are reclaiming - * pages. - */ - if (vm_swap_idle_enabled && pass > 0) { - static long lsec; - if (time_second != lsec) { - vm_req_vmdaemon(VM_SWAP_IDLE); - lsec = time_second; - } - } -#endif + if (pass > 0) + vm_swapout_run_idle(); return (page_shortage <= 0); } @@ -2158,167 +1935,3 @@ pagedaemon_wakeup(void) wakeup(&vm_pageout_wanted); } } - -#if !defined(NO_SWAPPING) -static void -vm_req_vmdaemon(int req) -{ - static int lastrun = 0; - - mtx_lock(&vm_daemon_mtx); - vm_pageout_req_swapout |= req; - if ((ticks > (lastrun + hz)) || (ticks < lastrun)) { - wakeup(&vm_daemon_needed); - lastrun = ticks; - } - mtx_unlock(&vm_daemon_mtx); -} - -static void -vm_daemon(void) -{ - struct rlimit rsslim; - struct proc *p; - struct thread *td; - struct vmspace *vm; - int breakout, swapout_flags, tryagain, attempts; -#ifdef RACCT - uint64_t rsize, ravailable; -#endif - - while (TRUE) { - mtx_lock(&vm_daemon_mtx); - msleep(&vm_daemon_needed, &vm_daemon_mtx, PPAUSE, "psleep", -#ifdef RACCT - racct_enable ? hz : 0 -#else - 0 -#endif - ); - swapout_flags = vm_pageout_req_swapout; - vm_pageout_req_swapout = 0; - mtx_unlock(&vm_daemon_mtx); - if (swapout_flags) - swapout_procs(swapout_flags); - - /* - * scan the processes for exceeding their rlimits or if - * process is swapped out -- deactivate pages - */ - tryagain = 0; - attempts = 0; -again: - attempts++; - sx_slock(&allproc_lock); - FOREACH_PROC_IN_SYSTEM(p) { - vm_pindex_t limit, size; - - /* - * if this is a system process or if we have already - * looked at this process, skip it. - */ - PROC_LOCK(p); - if (p->p_state != PRS_NORMAL || - p->p_flag & (P_INEXEC | P_SYSTEM | P_WEXIT)) { - PROC_UNLOCK(p); - continue; - } - /* - * if the process is in a non-running type state, - * don't touch it. - */ - breakout = 0; - FOREACH_THREAD_IN_PROC(p, td) { - thread_lock(td); - if (!TD_ON_RUNQ(td) && - !TD_IS_RUNNING(td) && - !TD_IS_SLEEPING(td) && - !TD_IS_SUSPENDED(td)) { - thread_unlock(td); - breakout = 1; - break; - } - thread_unlock(td); - } - if (breakout) { - PROC_UNLOCK(p); - continue; - } - /* - * get a limit - */ - lim_rlimit_proc(p, RLIMIT_RSS, &rsslim); - limit = OFF_TO_IDX( - qmin(rsslim.rlim_cur, rsslim.rlim_max)); - - /* - * let processes that are swapped out really be - * swapped out set the limit to nothing (will force a - * swap-out.) - */ - if ((p->p_flag & P_INMEM) == 0) - limit = 0; /* XXX */ - vm = vmspace_acquire_ref(p); - _PHOLD_LITE(p); - PROC_UNLOCK(p); - if (vm == NULL) { - PRELE(p); - continue; - } - sx_sunlock(&allproc_lock); - - size = vmspace_resident_count(vm); - if (size >= limit) { - vm_pageout_map_deactivate_pages( - &vm->vm_map, limit); - size = vmspace_resident_count(vm); - } -#ifdef RACCT - if (racct_enable) { - rsize = IDX_TO_OFF(size); - PROC_LOCK(p); - if (p->p_state == PRS_NORMAL) - racct_set(p, RACCT_RSS, rsize); - ravailable = racct_get_available(p, RACCT_RSS); - PROC_UNLOCK(p); - if (rsize > ravailable) { - /* - * Don't be overly aggressive; this - * might be an innocent process, - * and the limit could've been exceeded - * by some memory hog. Don't try - * to deactivate more than 1/4th - * of process' resident set size. - */ - if (attempts <= 8) { - if (ravailable < rsize - - (rsize / 4)) { - ravailable = rsize - - (rsize / 4); - } - } - vm_pageout_map_deactivate_pages( - &vm->vm_map, - OFF_TO_IDX(ravailable)); - /* Update RSS usage after paging out. */ - size = vmspace_resident_count(vm); - rsize = IDX_TO_OFF(size); - PROC_LOCK(p); - if (p->p_state == PRS_NORMAL) - racct_set(p, RACCT_RSS, rsize); - PROC_UNLOCK(p); - if (rsize > ravailable) - tryagain = 1; - } - } -#endif - vmspace_free(vm); - sx_slock(&allproc_lock); - PRELE(p); - } - sx_sunlock(&allproc_lock); - if (tryagain != 0 && attempts <= 10) - goto again; - } -} -#endif /* !defined(NO_SWAPPING) */ diff --git a/sys/vm/vm_pageout.h b/sys/vm/vm_pageout.h index adc32a23817b..f0c28835eba5 100644 --- a/sys/vm/vm_pageout.h +++ b/sys/vm/vm_pageout.h @@ -77,12 +77,6 @@ extern int vm_pageout_page_count; extern bool vm_pageout_wanted; extern bool vm_pages_needed; -/* - * Swap out requests - */ -#define VM_SWAP_NORMAL 1 -#define VM_SWAP_IDLE 2 - #define VM_OOM_MEM 1 #define VM_OOM_SWAPZ 2 @@ -109,5 +103,8 @@ extern void vm_waitpfault(void); #ifdef _KERNEL int vm_pageout_flush(vm_page_t *, int, int, int, int *, boolean_t *); void vm_pageout_oom(int shortage); + +void vm_swapout_run(void); +void vm_swapout_run_idle(void); #endif #endif /* _VM_VM_PAGEOUT_H_ */ diff --git a/sys/vm/vm_swapout.c b/sys/vm/vm_swapout.c new file mode 100644 index 000000000000..726c2e2f91a0 --- /dev/null +++ b/sys/vm/vm_swapout.c @@ -0,0 +1,975 @@ +/*- + * Copyright (c) 1991 Regents of the University of California. + * All rights reserved. + * Copyright (c) 1994 John S. Dyson + * All rights reserved. + * Copyright (c) 1994 David Greenman + * All rights reserved. + * Copyright (c) 2005 Yahoo! Technologies Norway AS + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * The Mach Operating System project at Carnegie-Mellon University. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)vm_pageout.c 7.4 (Berkeley) 5/7/91 + * + * + * Copyright (c) 1987, 1990 Carnegie-Mellon University. + * All rights reserved. + * + * Authors: Avadis Tevanian, Jr., Michael Wayne Young + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_kstack_pages.h" +#include "opt_kstack_max_pages.h" +#include "opt_vm.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* the kernel process "vm_daemon" */ +static void vm_daemon(void); +static struct proc *vmproc; + +static struct kproc_desc vm_kp = { + "vmdaemon", + vm_daemon, + &vmproc +}; +SYSINIT(vmdaemon, SI_SUB_KTHREAD_VM, SI_ORDER_FIRST, kproc_start, &vm_kp); + +static int vm_swap_enabled = 1; +static int vm_swap_idle_enabled = 0; + +SYSCTL_INT(_vm, VM_SWAPPING_ENABLED, swap_enabled, CTLFLAG_RW, + &vm_swap_enabled, 0, + "Enable entire process swapout"); +SYSCTL_INT(_vm, OID_AUTO, swap_idle_enabled, CTLFLAG_RW, + &vm_swap_idle_enabled, 0, + "Allow swapout on idle criteria"); + +/* + * Swap_idle_threshold1 is the guaranteed swapped in time for a process + */ +static int swap_idle_threshold1 = 2; +SYSCTL_INT(_vm, OID_AUTO, swap_idle_threshold1, CTLFLAG_RW, + &swap_idle_threshold1, 0, + "Guaranteed swapped in time for a process"); + +/* + * Swap_idle_threshold2 is the time that a process can be idle before + * it will be swapped out, if idle swapping is enabled. + */ +static int swap_idle_threshold2 = 10; +SYSCTL_INT(_vm, OID_AUTO, swap_idle_threshold2, CTLFLAG_RW, + &swap_idle_threshold2, 0, + "Time before a process will be swapped out"); + +static int vm_pageout_req_swapout; /* XXX */ +static int vm_daemon_needed; +static struct mtx vm_daemon_mtx; +/* Allow for use by vm_pageout before vm_daemon is initialized. */ +MTX_SYSINIT(vm_daemon, &vm_daemon_mtx, "vm daemon", MTX_DEF); + +static void swapclear(struct proc *); +static int swapout(struct proc *); +static void vm_swapout_map_deactivate_pages(vm_map_t, long); +static void vm_swapout_object_deactivate_pages(pmap_t, vm_object_t, long); +static void swapout_procs(int action); +static void vm_req_vmdaemon(int req); +static void vm_thread_swapin(struct thread *td); +static void vm_thread_swapout(struct thread *td); + +/* + * vm_swapout_object_deactivate_pages + * + * Deactivate enough pages to satisfy the inactive target + * requirements. + * + * The object and map must be locked. + */ +static void +vm_swapout_object_deactivate_pages(pmap_t pmap, vm_object_t first_object, + long desired) +{ + vm_object_t backing_object, object; + vm_page_t p; + int act_delta, remove_mode; + + VM_OBJECT_ASSERT_LOCKED(first_object); + if ((first_object->flags & OBJ_FICTITIOUS) != 0) + return; + for (object = first_object;; object = backing_object) { + if (pmap_resident_count(pmap) <= desired) + goto unlock_return; + VM_OBJECT_ASSERT_LOCKED(object); + if ((object->flags & OBJ_UNMANAGED) != 0 || + object->paging_in_progress != 0) + goto unlock_return; + + remove_mode = 0; + if (object->shadow_count > 1) + remove_mode = 1; + /* + * Scan the object's entire memory queue. + */ + TAILQ_FOREACH(p, &object->memq, listq) { + if (pmap_resident_count(pmap) <= desired) + goto unlock_return; + if (vm_page_busied(p)) + continue; + VM_CNT_INC(v_pdpages); + vm_page_lock(p); + if (p->wire_count != 0 || p->hold_count != 0 || + !pmap_page_exists_quick(pmap, p)) { + vm_page_unlock(p); + continue; + } + act_delta = pmap_ts_referenced(p); + if ((p->aflags & PGA_REFERENCED) != 0) { + if (act_delta == 0) + act_delta = 1; + vm_page_aflag_clear(p, PGA_REFERENCED); + } + if (!vm_page_active(p) && act_delta != 0) { + vm_page_activate(p); + p->act_count += act_delta; + } else if (vm_page_active(p)) { + if (act_delta == 0) { + p->act_count -= min(p->act_count, + ACT_DECLINE); + if (!remove_mode && p->act_count == 0) { + pmap_remove_all(p); + vm_page_deactivate(p); + } else + vm_page_requeue(p); + } else { + vm_page_activate(p); + if (p->act_count < ACT_MAX - + ACT_ADVANCE) + p->act_count += ACT_ADVANCE; + vm_page_requeue(p); + } + } else if (vm_page_inactive(p)) + pmap_remove_all(p); + vm_page_unlock(p); + } + if ((backing_object = object->backing_object) == NULL) + goto unlock_return; + VM_OBJECT_RLOCK(backing_object); + if (object != first_object) + VM_OBJECT_RUNLOCK(object); + } +unlock_return: + if (object != first_object) + VM_OBJECT_RUNLOCK(object); +} + +/* + * deactivate some number of pages in a map, try to do it fairly, but + * that is really hard to do. + */ +static void +vm_swapout_map_deactivate_pages(vm_map_t map, long desired) +{ + vm_map_entry_t tmpe; + vm_object_t obj, bigobj; + int nothingwired; + + if (!vm_map_trylock(map)) + return; + + bigobj = NULL; + nothingwired = TRUE; + + /* + * first, search out the biggest object, and try to free pages from + * that. + */ + tmpe = map->header.next; + while (tmpe != &map->header) { + if ((tmpe->eflags & MAP_ENTRY_IS_SUB_MAP) == 0) { + obj = tmpe->object.vm_object; + if (obj != NULL && VM_OBJECT_TRYRLOCK(obj)) { + if (obj->shadow_count <= 1 && + (bigobj == NULL || + bigobj->resident_page_count < + obj->resident_page_count)) { + if (bigobj != NULL) + VM_OBJECT_RUNLOCK(bigobj); + bigobj = obj; + } else + VM_OBJECT_RUNLOCK(obj); + } + } + if (tmpe->wired_count > 0) + nothingwired = FALSE; + tmpe = tmpe->next; + } + + if (bigobj != NULL) { + vm_swapout_object_deactivate_pages(map->pmap, bigobj, desired); + VM_OBJECT_RUNLOCK(bigobj); + } + /* + * Next, hunt around for other pages to deactivate. We actually + * do this search sort of wrong -- .text first is not the best idea. + */ + tmpe = map->header.next; + while (tmpe != &map->header) { + if (pmap_resident_count(vm_map_pmap(map)) <= desired) + break; + if ((tmpe->eflags & MAP_ENTRY_IS_SUB_MAP) == 0) { + obj = tmpe->object.vm_object; + if (obj != NULL) { + VM_OBJECT_RLOCK(obj); + vm_swapout_object_deactivate_pages(map->pmap, + obj, desired); + VM_OBJECT_RUNLOCK(obj); + } + } + tmpe = tmpe->next; + } + + /* + * Remove all mappings if a process is swapped out, this will free page + * table pages. + */ + if (desired == 0 && nothingwired) { + pmap_remove(vm_map_pmap(map), vm_map_min(map), + vm_map_max(map)); + } + + vm_map_unlock(map); +} + +/* + * Swap out requests + */ +#define VM_SWAP_NORMAL 1 +#define VM_SWAP_IDLE 2 + +void +vm_swapout_run(void) +{ + + if (vm_swap_enabled) + vm_req_vmdaemon(VM_SWAP_NORMAL); +} + +/* + * Idle process swapout -- run once per second when pagedaemons are + * reclaiming pages. + */ +void +vm_swapout_run_idle(void) +{ + static long lsec; + + if (!vm_swap_idle_enabled || time_second == lsec) + return; + vm_req_vmdaemon(VM_SWAP_IDLE); + lsec = time_second; +} + +static void +vm_req_vmdaemon(int req) +{ + static int lastrun = 0; + + mtx_lock(&vm_daemon_mtx); + vm_pageout_req_swapout |= req; + if ((ticks > (lastrun + hz)) || (ticks < lastrun)) { + wakeup(&vm_daemon_needed); + lastrun = ticks; + } + mtx_unlock(&vm_daemon_mtx); +} + +static void +vm_daemon(void) +{ + struct rlimit rsslim; + struct proc *p; + struct thread *td; + struct vmspace *vm; + int breakout, swapout_flags, tryagain, attempts; +#ifdef RACCT + uint64_t rsize, ravailable; +#endif + + while (TRUE) { + mtx_lock(&vm_daemon_mtx); + msleep(&vm_daemon_needed, &vm_daemon_mtx, PPAUSE, "psleep", +#ifdef RACCT + racct_enable ? hz : 0 +#else + 0 +#endif + ); + swapout_flags = vm_pageout_req_swapout; + vm_pageout_req_swapout = 0; + mtx_unlock(&vm_daemon_mtx); + if (swapout_flags) + swapout_procs(swapout_flags); + + /* + * scan the processes for exceeding their rlimits or if + * process is swapped out -- deactivate pages + */ + tryagain = 0; + attempts = 0; +again: + attempts++; + sx_slock(&allproc_lock); + FOREACH_PROC_IN_SYSTEM(p) { + vm_pindex_t limit, size; + + /* + * if this is a system process or if we have already + * looked at this process, skip it. + */ + PROC_LOCK(p); + if (p->p_state != PRS_NORMAL || + p->p_flag & (P_INEXEC | P_SYSTEM | P_WEXIT)) { + PROC_UNLOCK(p); + continue; + } + /* + * if the process is in a non-running type state, + * don't touch it. + */ + breakout = 0; + FOREACH_THREAD_IN_PROC(p, td) { + thread_lock(td); + if (!TD_ON_RUNQ(td) && + !TD_IS_RUNNING(td) && + !TD_IS_SLEEPING(td) && + !TD_IS_SUSPENDED(td)) { + thread_unlock(td); + breakout = 1; + break; + } + thread_unlock(td); + } + if (breakout) { + PROC_UNLOCK(p); + continue; + } + /* + * get a limit + */ + lim_rlimit_proc(p, RLIMIT_RSS, &rsslim); + limit = OFF_TO_IDX( + qmin(rsslim.rlim_cur, rsslim.rlim_max)); + + /* + * let processes that are swapped out really be + * swapped out set the limit to nothing (will force a + * swap-out.) + */ + if ((p->p_flag & P_INMEM) == 0) + limit = 0; /* XXX */ + vm = vmspace_acquire_ref(p); + _PHOLD_LITE(p); + PROC_UNLOCK(p); + if (vm == NULL) { + PRELE(p); + continue; + } + sx_sunlock(&allproc_lock); + + size = vmspace_resident_count(vm); + if (size >= limit) { + vm_swapout_map_deactivate_pages( + &vm->vm_map, limit); + size = vmspace_resident_count(vm); + } +#ifdef RACCT + if (racct_enable) { + rsize = IDX_TO_OFF(size); + PROC_LOCK(p); + if (p->p_state == PRS_NORMAL) + racct_set(p, RACCT_RSS, rsize); + ravailable = racct_get_available(p, RACCT_RSS); + PROC_UNLOCK(p); + if (rsize > ravailable) { + /* + * Don't be overly aggressive; this + * might be an innocent process, + * and the limit could've been exceeded + * by some memory hog. Don't try + * to deactivate more than 1/4th + * of process' resident set size. + */ + if (attempts <= 8) { + if (ravailable < rsize - + (rsize / 4)) { + ravailable = rsize - + (rsize / 4); + } + } + vm_swapout_map_deactivate_pages( + &vm->vm_map, + OFF_TO_IDX(ravailable)); + /* Update RSS usage after paging out. */ + size = vmspace_resident_count(vm); + rsize = IDX_TO_OFF(size); + PROC_LOCK(p); + if (p->p_state == PRS_NORMAL) + racct_set(p, RACCT_RSS, rsize); + PROC_UNLOCK(p); + if (rsize > ravailable) + tryagain = 1; + } + } +#endif + vmspace_free(vm); + sx_slock(&allproc_lock); + PRELE(p); + } + sx_sunlock(&allproc_lock); + if (tryagain != 0 && attempts <= 10) + goto again; + } +} + +/* + * Allow a thread's kernel stack to be paged out. + */ +static void +vm_thread_swapout(struct thread *td) +{ + vm_object_t ksobj; + vm_page_t m; + int i, pages; + + cpu_thread_swapout(td); + pages = td->td_kstack_pages; + ksobj = td->td_kstack_obj; + pmap_qremove(td->td_kstack, pages); + VM_OBJECT_WLOCK(ksobj); + for (i = 0; i < pages; i++) { + m = vm_page_lookup(ksobj, i); + if (m == NULL) + panic("vm_thread_swapout: kstack already missing?"); + vm_page_dirty(m); + vm_page_lock(m); + vm_page_unwire(m, PQ_INACTIVE); + vm_page_unlock(m); + } + VM_OBJECT_WUNLOCK(ksobj); +} + +/* + * Bring the kernel stack for a specified thread back in. + */ +static void +vm_thread_swapin(struct thread *td) +{ + vm_object_t ksobj; + vm_page_t ma[KSTACK_MAX_PAGES]; + int pages; + + pages = td->td_kstack_pages; + ksobj = td->td_kstack_obj; + VM_OBJECT_WLOCK(ksobj); + (void)vm_page_grab_pages(ksobj, 0, VM_ALLOC_NORMAL | VM_ALLOC_WIRED, ma, + pages); + for (int i = 0; i < pages;) { + int j, a, count, rv; + + vm_page_assert_xbusied(ma[i]); + if (ma[i]->valid == VM_PAGE_BITS_ALL) { + vm_page_xunbusy(ma[i]); + i++; + continue; + } + vm_object_pip_add(ksobj, 1); + for (j = i + 1; j < pages; j++) + if (ma[j]->valid == VM_PAGE_BITS_ALL) + break; + rv = vm_pager_has_page(ksobj, ma[i]->pindex, NULL, &a); + KASSERT(rv == 1, ("%s: missing page %p", __func__, ma[i])); + count = min(a + 1, j - i); + rv = vm_pager_get_pages(ksobj, ma + i, count, NULL, NULL); + KASSERT(rv == VM_PAGER_OK, ("%s: cannot get kstack for proc %d", + __func__, td->td_proc->p_pid)); + vm_object_pip_wakeup(ksobj); + for (j = i; j < i + count; j++) + vm_page_xunbusy(ma[j]); + i += count; + } + VM_OBJECT_WUNLOCK(ksobj); + pmap_qenter(td->td_kstack, ma, pages); + cpu_thread_swapin(td); +} + +void +faultin(struct proc *p) +{ + struct thread *td; + + PROC_LOCK_ASSERT(p, MA_OWNED); + /* + * If another process is swapping in this process, + * just wait until it finishes. + */ + if (p->p_flag & P_SWAPPINGIN) { + while (p->p_flag & P_SWAPPINGIN) + msleep(&p->p_flag, &p->p_mtx, PVM, "faultin", 0); + return; + } + if ((p->p_flag & P_INMEM) == 0) { + /* + * Don't let another thread swap process p out while we are + * busy swapping it in. + */ + ++p->p_lock; + p->p_flag |= P_SWAPPINGIN; + PROC_UNLOCK(p); + + /* + * We hold no lock here because the list of threads + * can not change while all threads in the process are + * swapped out. + */ + FOREACH_THREAD_IN_PROC(p, td) + vm_thread_swapin(td); + PROC_LOCK(p); + swapclear(p); + p->p_swtick = ticks; + + wakeup(&p->p_flag); + + /* Allow other threads to swap p out now. */ + --p->p_lock; + } +} + +/* + * This swapin algorithm attempts to swap-in processes only if there + * is enough space for them. Of course, if a process waits for a long + * time, it will be swapped in anyway. + */ +void +swapper(void) +{ + struct proc *p; + struct thread *td; + struct proc *pp; + int slptime; + int swtime; + int ppri; + int pri; + +loop: + if (vm_page_count_min()) { + VM_WAIT; + goto loop; + } + + pp = NULL; + ppri = INT_MIN; + sx_slock(&allproc_lock); + FOREACH_PROC_IN_SYSTEM(p) { + PROC_LOCK(p); + if (p->p_state == PRS_NEW || + p->p_flag & (P_SWAPPINGOUT | P_SWAPPINGIN | P_INMEM)) { + PROC_UNLOCK(p); + continue; + } + swtime = (ticks - p->p_swtick) / hz; + FOREACH_THREAD_IN_PROC(p, td) { + /* + * An otherwise runnable thread of a process + * swapped out has only the TDI_SWAPPED bit set. + */ + thread_lock(td); + if (td->td_inhibitors == TDI_SWAPPED) { + slptime = (ticks - td->td_slptick) / hz; + pri = swtime + slptime; + if ((td->td_flags & TDF_SWAPINREQ) == 0) + pri -= p->p_nice * 8; + /* + * if this thread is higher priority + * and there is enough space, then select + * this process instead of the previous + * selection. + */ + if (pri > ppri) { + pp = p; + ppri = pri; + } + } + thread_unlock(td); + } + PROC_UNLOCK(p); + } + sx_sunlock(&allproc_lock); + + /* + * Nothing to do, back to sleep. + */ + if ((p = pp) == NULL) { + tsleep(&proc0, PVM, "swapin", MAXSLP * hz / 2); + goto loop; + } + PROC_LOCK(p); + + /* + * Another process may be bringing or may have already + * brought this process in while we traverse all threads. + * Or, this process may even be being swapped out again. + */ + if (p->p_flag & (P_INMEM | P_SWAPPINGOUT | P_SWAPPINGIN)) { + PROC_UNLOCK(p); + goto loop; + } + + /* + * We would like to bring someone in. (only if there is space). + * [What checks the space? ] + */ + faultin(p); + PROC_UNLOCK(p); + goto loop; +} + +/* + * First, if any processes have been sleeping or stopped for at least + * "swap_idle_threshold1" seconds, they are swapped out. If, however, + * no such processes exist, then the longest-sleeping or stopped + * process is swapped out. Finally, and only as a last resort, if + * there are no sleeping or stopped processes, the longest-resident + * process is swapped out. + */ +static void +swapout_procs(int action) +{ + struct proc *p; + struct thread *td; + int didswap = 0; + +retry: + sx_slock(&allproc_lock); + FOREACH_PROC_IN_SYSTEM(p) { + struct vmspace *vm; + int minslptime = 100000; + int slptime; + + PROC_LOCK(p); + /* + * Watch out for a process in + * creation. It may have no + * address space or lock yet. + */ + if (p->p_state == PRS_NEW) { + PROC_UNLOCK(p); + continue; + } + /* + * An aio daemon switches its + * address space while running. + * Perform a quick check whether + * a process has P_SYSTEM. + * Filter out exiting processes. + */ + if ((p->p_flag & (P_SYSTEM | P_WEXIT)) != 0) { + PROC_UNLOCK(p); + continue; + } + _PHOLD_LITE(p); + PROC_UNLOCK(p); + sx_sunlock(&allproc_lock); + + /* + * Do not swapout a process that + * is waiting for VM data + * structures as there is a possible + * deadlock. Test this first as + * this may block. + * + * Lock the map until swapout + * finishes, or a thread of this + * process may attempt to alter + * the map. + */ + vm = vmspace_acquire_ref(p); + if (vm == NULL) + goto nextproc2; + if (!vm_map_trylock(&vm->vm_map)) + goto nextproc1; + + PROC_LOCK(p); + if (p->p_lock != 1 || (p->p_flag & (P_STOPPED_SINGLE | + P_TRACED | P_SYSTEM)) != 0) + goto nextproc; + + /* + * only aiod changes vmspace, however it will be + * skipped because of the if statement above checking + * for P_SYSTEM + */ + if ((p->p_flag & (P_INMEM|P_SWAPPINGOUT|P_SWAPPINGIN)) != P_INMEM) + goto nextproc; + + switch (p->p_state) { + default: + /* Don't swap out processes in any sort + * of 'special' state. */ + break; + + case PRS_NORMAL: + /* + * do not swapout a realtime process + * Check all the thread groups.. + */ + FOREACH_THREAD_IN_PROC(p, td) { + thread_lock(td); + if (PRI_IS_REALTIME(td->td_pri_class)) { + thread_unlock(td); + goto nextproc; + } + slptime = (ticks - td->td_slptick) / hz; + /* + * Guarantee swap_idle_threshold1 + * time in memory. + */ + if (slptime < swap_idle_threshold1) { + thread_unlock(td); + goto nextproc; + } + + /* + * Do not swapout a process if it is + * waiting on a critical event of some + * kind or there is a thread whose + * pageable memory may be accessed. + * + * This could be refined to support + * swapping out a thread. + */ + if (!thread_safetoswapout(td)) { + thread_unlock(td); + goto nextproc; + } + /* + * If the system is under memory stress, + * or if we are swapping + * idle processes >= swap_idle_threshold2, + * then swap the process out. + */ + if (((action & VM_SWAP_NORMAL) == 0) && + (((action & VM_SWAP_IDLE) == 0) || + (slptime < swap_idle_threshold2))) { + thread_unlock(td); + goto nextproc; + } + + if (minslptime > slptime) + minslptime = slptime; + thread_unlock(td); + } + + /* + * If the pageout daemon didn't free enough pages, + * or if this process is idle and the system is + * configured to swap proactively, swap it out. + */ + if ((action & VM_SWAP_NORMAL) || + ((action & VM_SWAP_IDLE) && + (minslptime > swap_idle_threshold2))) { + _PRELE(p); + if (swapout(p) == 0) + didswap++; + PROC_UNLOCK(p); + vm_map_unlock(&vm->vm_map); + vmspace_free(vm); + goto retry; + } + } +nextproc: + PROC_UNLOCK(p); + vm_map_unlock(&vm->vm_map); +nextproc1: + vmspace_free(vm); +nextproc2: + sx_slock(&allproc_lock); + PRELE(p); + } + sx_sunlock(&allproc_lock); + /* + * If we swapped something out, and another process needed memory, + * then wakeup the sched process. + */ + if (didswap) + wakeup(&proc0); +} + +static void +swapclear(struct proc *p) +{ + struct thread *td; + + PROC_LOCK_ASSERT(p, MA_OWNED); + + FOREACH_THREAD_IN_PROC(p, td) { + thread_lock(td); + td->td_flags |= TDF_INMEM; + td->td_flags &= ~TDF_SWAPINREQ; + TD_CLR_SWAPPED(td); + if (TD_CAN_RUN(td)) + if (setrunnable(td)) { +#ifdef INVARIANTS + /* + * XXX: We just cleared TDI_SWAPPED + * above and set TDF_INMEM, so this + * should never happen. + */ + panic("not waking up swapper"); +#endif + } + thread_unlock(td); + } + p->p_flag &= ~(P_SWAPPINGIN | P_SWAPPINGOUT); + p->p_flag |= P_INMEM; +} + +static int +swapout(struct proc *p) +{ + struct thread *td; + + PROC_LOCK_ASSERT(p, MA_OWNED); + + /* + * The states of this process and its threads may have changed + * by now. Assuming that there is only one pageout daemon thread, + * this process should still be in memory. + */ + KASSERT((p->p_flag & (P_INMEM | P_SWAPPINGOUT | P_SWAPPINGIN)) == + P_INMEM, ("swapout: lost a swapout race?")); + + /* + * remember the process resident count + */ + p->p_vmspace->vm_swrss = vmspace_resident_count(p->p_vmspace); + /* + * Check and mark all threads before we proceed. + */ + p->p_flag &= ~P_INMEM; + p->p_flag |= P_SWAPPINGOUT; + FOREACH_THREAD_IN_PROC(p, td) { + thread_lock(td); + if (!thread_safetoswapout(td)) { + thread_unlock(td); + swapclear(p); + return (EBUSY); + } + td->td_flags &= ~TDF_INMEM; + TD_SET_SWAPPED(td); + thread_unlock(td); + } + td = FIRST_THREAD_IN_PROC(p); + ++td->td_ru.ru_nswap; + PROC_UNLOCK(p); + + /* + * This list is stable because all threads are now prevented from + * running. The list is only modified in the context of a running + * thread in this process. + */ + FOREACH_THREAD_IN_PROC(p, td) + vm_thread_swapout(td); + + PROC_LOCK(p); + p->p_flag &= ~P_SWAPPINGOUT; + p->p_swtick = ticks; + return (0); +} diff --git a/sys/vm/vm_swapout_dummy.c b/sys/vm/vm_swapout_dummy.c new file mode 100644 index 000000000000..9cdfcb8ac954 --- /dev/null +++ b/sys/vm/vm_swapout_dummy.c @@ -0,0 +1,122 @@ +/*- + * Copyright (c) 1991 Regents of the University of California. + * All rights reserved. + * Copyright (c) 1994 John S. Dyson + * All rights reserved. + * Copyright (c) 1994 David Greenman + * All rights reserved. + * Copyright (c) 2005 Yahoo! Technologies Norway AS + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * The Mach Operating System project at Carnegie-Mellon University. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)vm_pageout.c 7.4 (Berkeley) 5/7/91 + * + * + * Copyright (c) 1987, 1990 Carnegie-Mellon University. + * All rights reserved. + * + * Authors: Avadis Tevanian, Jr., Michael Wayne Young + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static int vm_swap_enabled = 0; +SYSCTL_INT(_vm, VM_SWAPPING_ENABLED, swap_enabled, CTLFLAG_RD, + &vm_swap_enabled, 0, + "Enable entire process swapout"); + +static int vm_swap_idle_enabled = 0; +SYSCTL_INT(_vm, OID_AUTO, swap_idle_enabled, CTLFLAG_RD, + &vm_swap_idle_enabled, 0, + "Allow swapout on idle criteria"); + +void +vm_swapout_run(void) +{ +} + +void +vm_swapout_run_idle(void) +{ +} + +void +faultin(struct proc *p) +{ + + PROC_LOCK_ASSERT(p, MA_OWNED); + if ((p->p_flag & P_INMEM) == 0) + panic("faultin: proc %p swapped out with NO_SWAPPING", p); +} + +void +swapper(void) +{ + + for (;;) + tsleep(&proc0, PVM, "swapin", MAXSLP * hz); +} From 62bf13cbf9d6733dc904cee665a4eb5cf3d56d43 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 14:04:01 +0000 Subject: [PATCH 198/219] mtx: fix up UP build after r324778 Reported by: Michael Butler --- sys/kern/kern_mutex.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c index 3e125f34d8ec..8aeca58b4a15 100644 --- a/sys/kern/kern_mutex.c +++ b/sys/kern/kern_mutex.c @@ -289,7 +289,9 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, int line) { struct mtx *m; +#ifdef SMP uintptr_t tid, v; +#endif m = mtxlock2mtx(c); @@ -306,6 +308,7 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, opts &= ~MTX_RECURSE; WITNESS_CHECKORDER(&m->lock_object, opts | LOP_NEWORDER | LOP_EXCLUSIVE, file, line, NULL); +#ifdef SMP spinlock_enter(); tid = (uintptr_t)curthread; v = MTX_UNOWNED; @@ -314,6 +317,9 @@ __mtx_lock_spin_flags(volatile uintptr_t *c, int opts, const char *file, else LOCKSTAT_PROFILE_OBTAIN_LOCK_SUCCESS(spin__acquire, m, 0, 0, file, line); +#else + __mtx_lock_spin(m, curthread, opts, file, line); +#endif LOCK_LOG_LOCK("LOCK", &m->lock_object, opts, m->mtx_recurse, file, line); WITNESS_LOCK(&m->lock_object, opts | LOP_EXCLUSIVE, file, line); From a3e8a25a5294c888570541ea37ff4cb478de2f49 Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Fri, 20 Oct 2017 14:56:13 +0000 Subject: [PATCH 199/219] Avoid the nbp lookup in the final loop iteration in flushbuflist(). The end of the loop must re-lookup the next buf since the bufobj lock is dropped in the loop body. If the lookup fails, the loop is restarted. This mechanism non-obviously also terminates the loop when the end of the buf list is reached. Split up the two loops termination cases to make the code a bit less fragile. No functional change intended. Reviewed by: kib MFC after: 1 week Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12730 --- sys/kern/vfs_subr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/kern/vfs_subr.c b/sys/kern/vfs_subr.c index 0bac7667731b..53ec47b525e9 100644 --- a/sys/kern/vfs_subr.c +++ b/sys/kern/vfs_subr.c @@ -1746,8 +1746,6 @@ flushbuflist(struct bufv *bufv, int flags, struct bufobj *bo, int slpflag, ((flags & V_ALT) && (bp->b_xflags & BX_ALTDATA) == 0)) { continue; } - lblkno = 0; - xflags = 0; if (nbp != NULL) { lblkno = nbp->b_lblkno; xflags = nbp->b_xflags & (BX_VNDIRTY | BX_VNCLEAN); @@ -1782,6 +1780,8 @@ flushbuflist(struct bufv *bufv, int flags, struct bufobj *bo, int slpflag, bp->b_flags &= ~B_ASYNC; brelse(bp); BO_LOCK(bo); + if (nbp == NULL) + break; nbp = gbincore(bo, lblkno); if (nbp == NULL || (nbp->b_xflags & (BX_VNDIRTY | BX_VNCLEAN)) != xflags) From 05bc55f222b61da3155b8fd8c472abdbb6e32ec3 Mon Sep 17 00:00:00 2001 From: Alan Somers Date: Fri, 20 Oct 2017 15:24:28 +0000 Subject: [PATCH 200/219] Fix the mps(4) HISTORY section. Looks like a copy/paste error from r302673. MFC after: 3 weeks Sponsored by: Spectra Logic Corp --- share/man/man4/mps.4 | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/share/man/man4/mps.4 b/share/man/man4/mps.4 index efafccb9c467..f40596a7d30a 100644 --- a/share/man/man4/mps.4 +++ b/share/man/man4/mps.4 @@ -369,7 +369,8 @@ The following levels are available: .Sh HISTORY The .Nm -driver first appeared in FreeBSD 9.3. +driver first appeared in +.Fx 9.0 . .Sh AUTHORS The .Nm From 9e9a610115acc70f5d3e4dd87ddc1733b0bd2fdb Mon Sep 17 00:00:00 2001 From: Alan Somers Date: Fri, 20 Oct 2017 15:29:28 +0000 Subject: [PATCH 201/219] Use the .Fx macro consistently. Sponsored by: Spectra Logic Corp --- share/man/man4/mpr.4 | 3 ++- share/man/man4/usfs.4 | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/share/man/man4/mpr.4 b/share/man/man4/mpr.4 index 66846c8b5169..12039f8e0bfb 100644 --- a/share/man/man4/mpr.4 +++ b/share/man/man4/mpr.4 @@ -393,7 +393,8 @@ The following levels are available: .Sh HISTORY The .Nm -driver first appeared in FreeBSD 9.3. +driver first appeared in +.Fx 9.3 . .Sh AUTHORS The .Nm diff --git a/share/man/man4/usfs.4 b/share/man/man4/usfs.4 index e8610beb9b7b..a81f6717b79c 100644 --- a/share/man/man4/usfs.4 +++ b/share/man/man4/usfs.4 @@ -65,4 +65,5 @@ Upon attach the driver creates a RAM disk which can be read and written. .Sh HISTORY The .Nm -driver appeared in FreeBSD 8. +driver appeared in +.Fx 8.0 . From b3d4ab6645064828aa342dd6cc652ed248c82ff2 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 20 Oct 2017 18:40:29 +0000 Subject: [PATCH 202/219] Take the vm object lock in read mode in vnode_generic_putpages(). Only upgrade it to write mode if we need to clear dirty bits of the partially valid page after EOF. Suggested and reviewed by: alc Sponsored by: The FreeBSD Foundation MFC after: 3 weeks --- sys/vm/vnode_pager.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/sys/vm/vnode_pager.c b/sys/vm/vnode_pager.c index 83f10f75eace..e569503cc74d 100644 --- a/sys/vm/vnode_pager.c +++ b/sys/vm/vnode_pager.c @@ -1252,8 +1252,14 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, * We do not under any circumstances truncate the valid bits, as * this will screw up bogus page replacement. */ - VM_OBJECT_WLOCK(object); + VM_OBJECT_RLOCK(object); if (maxsize + poffset > object->un_pager.vnp.vnp_size) { + if (!VM_OBJECT_TRYUPGRADE(object)) { + VM_OBJECT_RUNLOCK(object); + VM_OBJECT_WLOCK(object); + if (maxsize + poffset <= object->un_pager.vnp.vnp_size) + goto downgrade; + } if (object->un_pager.vnp.vnp_size > poffset) { maxsize = object->un_pager.vnp.vnp_size - poffset; ncount = btoc(maxsize); @@ -1278,6 +1284,8 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, } for (i = ncount; i < count; i++) rtvals[i] = VM_PAGER_BAD; +downgrade: + VM_OBJECT_LOCK_DOWNGRADE(object); } auio.uio_iov = &aiov; @@ -1324,7 +1332,7 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, */ MPASS(prev_offset < next_offset); - VM_OBJECT_WUNLOCK(object); + VM_OBJECT_RUNLOCK(object); aiov.iov_base = NULL; auio.uio_iovcnt = 1; auio.uio_offset = prev_offset; @@ -1340,7 +1348,7 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, "zero-length write at %ju resid %zd\n", auio.uio_offset, auio.uio_resid); } - VM_OBJECT_WLOCK(object); + VM_OBJECT_RLOCK(object); break; } @@ -1358,7 +1366,7 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, vn_printf(vp, "vnode_pager_putpages: residual I/O %zd " "at %ju\n", auio.uio_resid, (uintmax_t)ma[0]->pindex); - VM_OBJECT_WLOCK(object); + VM_OBJECT_RLOCK(object); if (error != 0 || auio.uio_resid != 0) break; } @@ -1372,7 +1380,7 @@ vnode_pager_generic_putpages(struct vnode *vp, vm_page_t *ma, int bytecount, /* Unwritten pages in range, free bonus if the page is clean. */ for (; i < ncount; i++) rtvals[i] = ma[i]->dirty == 0 ? VM_PAGER_OK : VM_PAGER_ERROR; - VM_OBJECT_WUNLOCK(object); + VM_OBJECT_RUNLOCK(object); VM_CNT_ADD(v_vnodepgsout, i); VM_CNT_INC(v_vnodeout); return (rtvals[0]); From e66167764ad581f687a52272ec30301b50441423 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Fri, 20 Oct 2017 18:58:11 +0000 Subject: [PATCH 203/219] amd64: plug missed dt_lock in cpu_fork --- sys/amd64/amd64/vm_machdep.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/amd64/amd64/vm_machdep.c b/sys/amd64/amd64/vm_machdep.c index 3100bf830333..5f4f43c23526 100644 --- a/sys/amd64/amd64/vm_machdep.c +++ b/sys/amd64/amd64/vm_machdep.c @@ -244,6 +244,10 @@ cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags) /* Copy the LDT, if necessary. */ mdp1 = &td1->td_proc->p_md; mdp2 = &p2->p_md; + if (mdp1->md_ldt == NULL) { + mdp2->md_ldt = NULL; + return; + } mtx_lock(&dt_lock); if (mdp1->md_ldt != NULL) { if (flags & RFMEM) { From eadbeae5e7c26bbdaf7daa29baf51a6696021254 Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Fri, 20 Oct 2017 21:13:19 +0000 Subject: [PATCH 204/219] Free the right address range if kmem_back() fails in memguard_alloc(). MFC after: 1 week Sponsored by: Dell EMC Isilon --- sys/vm/memguard.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/sys/vm/memguard.c b/sys/vm/memguard.c index e22a313dfb03..5d59f7d1a6d0 100644 --- a/sys/vm/memguard.c +++ b/sys/vm/memguard.c @@ -284,7 +284,7 @@ v2sizev(vm_offset_t va) void * memguard_alloc(unsigned long req_size, int flags) { - vm_offset_t addr; + vm_offset_t addr, origaddr; u_long size_p, size_v; int do_guard, rv; @@ -328,7 +328,7 @@ memguard_alloc(unsigned long req_size, int flags) for (;;) { if (vmem_xalloc(memguard_arena, size_v, 0, 0, 0, memguard_cursor, VMEM_ADDR_MAX, - M_BESTFIT | M_NOWAIT, &addr) == 0) + M_BESTFIT | M_NOWAIT, &origaddr) == 0) break; /* * The map has no space. This may be due to @@ -343,11 +343,12 @@ memguard_alloc(unsigned long req_size, int flags) memguard_wrap++; memguard_cursor = memguard_base; } + addr = origaddr; if (do_guard) addr += PAGE_SIZE; rv = kmem_back(kmem_object, addr, size_p, flags); if (rv != KERN_SUCCESS) { - vmem_xfree(memguard_arena, addr, size_v); + vmem_xfree(memguard_arena, origaddr, size_v); memguard_fail_pgs++; addr = (vm_offset_t)NULL; goto out; From 8e94025b413ebc581da6b27887f6d408bc8a757e Mon Sep 17 00:00:00 2001 From: "Bjoern A. Zeeb" Date: Fri, 20 Oct 2017 21:40:59 +0000 Subject: [PATCH 205/219] With r181803 on 2008-08-17 23:27:27Z the first VIMAGE commit went into HEAD. Enable VIMAGE in GENERIC kernels and some others (where GENERIC does not exist) on HEAD. Disable building LINT-VIMAGE with VIMAGE being default. This should give it a lot more exposure in the run-up to 12 to help us evaluate whether to keep it on by default or not. We are also hoping to get better performance testing. The feature can be disabled using nooptions. Requested by: many Reviewed by: kristof, emaste, hiren X-MFC after: never Relnotes: yes Differential Revision: https://reviews.freebsd.org/D12639 --- sys/amd64/conf/GENERIC | 1 + sys/arm/conf/std.armv6 | 1 + sys/arm/conf/std.armv7 | 1 + sys/arm64/conf/GENERIC | 1 + sys/conf/NOTES | 4 ++-- sys/conf/makeLINT.mk | 5 +---- sys/i386/conf/GENERIC | 1 + sys/mips/conf/GXEMUL | 1 + sys/mips/conf/GXEMUL32 | 1 + sys/mips/conf/QEMU | 6 ++++++ sys/net/vnet.c | 5 ++--- sys/powerpc/conf/GENERIC | 1 + sys/powerpc/conf/GENERIC64 | 1 + sys/riscv/conf/GENERIC | 1 + sys/sparc64/conf/GENERIC | 1 + 15 files changed, 22 insertions(+), 9 deletions(-) diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index bf5e209ad3bd..18bace27aa06 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -26,6 +26,7 @@ makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security diff --git a/sys/arm/conf/std.armv6 b/sys/arm/conf/std.armv6 index 5a733104b481..123fbca7efe6 100644 --- a/sys/arm/conf/std.armv6 +++ b/sys/arm/conf/std.armv6 @@ -5,6 +5,7 @@ options HZ=1000 options ARM_L2_PIPT # Only L2 PIPT is supported options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/arm/conf/std.armv7 b/sys/arm/conf/std.armv7 index 260d9fdce87f..d1e42e15ebeb 100644 --- a/sys/arm/conf/std.armv7 +++ b/sys/arm/conf/std.armv7 @@ -5,6 +5,7 @@ options HZ=1000 options ARM_L2_PIPT # Only L2 PIPT is supported options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/arm64/conf/GENERIC b/sys/arm64/conf/GENERIC index 77080fdddc09..a67ed7c0233d 100644 --- a/sys/arm64/conf/GENERIC +++ b/sys/arm64/conf/GENERIC @@ -26,6 +26,7 @@ makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security diff --git a/sys/conf/NOTES b/sys/conf/NOTES index ce9991d1e956..00cec21bb96d 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -802,8 +802,8 @@ options NGATM_CCATM device mn # Munich32x/Falc54 Nx64kbit/sec cards. # Network stack virtualization. -#options VIMAGE -#options VNET_DEBUG # debug for VIMAGE +options VIMAGE +options VNET_DEBUG # debug for VIMAGE # # Network interfaces: diff --git a/sys/conf/makeLINT.mk b/sys/conf/makeLINT.mk index 04dfcee05b9c..65ab59579aac 100644 --- a/sys/conf/makeLINT.mk +++ b/sys/conf/makeLINT.mk @@ -6,16 +6,13 @@ all: clean: rm -f LINT .if ${TARGET} == "amd64" || ${TARGET} == "i386" - rm -f LINT-VIMAGE LINT-NOINET LINT-NOINET6 LINT-NOIP + rm -f LINT-NOINET LINT-NOINET6 LINT-NOIP .endif NOTES= ../../conf/NOTES NOTES LINT: ${NOTES} ../../conf/makeLINT.sed cat ${NOTES} | sed -E -n -f ../../conf/makeLINT.sed > ${.TARGET} .if ${TARGET} == "amd64" || ${TARGET} == "i386" - echo "include ${.TARGET}" > ${.TARGET}-VIMAGE - echo "ident ${.TARGET}-VIMAGE" >> ${.TARGET}-VIMAGE - echo "options VIMAGE" >> ${.TARGET}-VIMAGE echo "include ${.TARGET}" > ${.TARGET}-NOINET echo "ident ${.TARGET}-NOINET" >> ${.TARGET}-NOINET echo 'makeoptions MKMODULESENV+="WITHOUT_INET_SUPPORT="' >> ${.TARGET}-NOINET diff --git a/sys/i386/conf/GENERIC b/sys/i386/conf/GENERIC index 8bf157ce7071..b8ce47d0f1c8 100644 --- a/sys/i386/conf/GENERIC +++ b/sys/i386/conf/GENERIC @@ -28,6 +28,7 @@ makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security diff --git a/sys/mips/conf/GXEMUL b/sys/mips/conf/GXEMUL index dcfa3d3af276..4ad01b96ad7f 100644 --- a/sys/mips/conf/GXEMUL +++ b/sys/mips/conf/GXEMUL @@ -30,6 +30,7 @@ options KDB options SMP # Symmetric MultiProcessor Kernel options SCHED_ULE +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/mips/conf/GXEMUL32 b/sys/mips/conf/GXEMUL32 index da3e71a67eed..c6c3f25a6a97 100644 --- a/sys/mips/conf/GXEMUL32 +++ b/sys/mips/conf/GXEMUL32 @@ -28,6 +28,7 @@ options KDB options SMP # Symmetric MultiProcessor Kernel options SCHED_ULE +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/mips/conf/QEMU b/sys/mips/conf/QEMU index b8f33fe92f42..479e7ea3c2de 100644 --- a/sys/mips/conf/QEMU +++ b/sys/mips/conf/QEMU @@ -31,6 +31,7 @@ options DDB options KDB options SCHED_4BSD #4BSD scheduler +options VIMAGE # Subsystem virtualization, e.g. VNET options INET #InterNETworking options TCP_HHOOK # hhook(9) framework for TCP options NFSCL #Network Filesystem Client @@ -45,6 +46,11 @@ options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions #options WITNESS #Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + device loop device ether device md diff --git a/sys/net/vnet.c b/sys/net/vnet.c index b2cad6302253..eb07efbf4fb3 100644 --- a/sys/net/vnet.c +++ b/sys/net/vnet.c @@ -312,9 +312,8 @@ static void vnet0_init(void *arg __unused) { - /* Warn people before take off - in case we crash early. */ - printf("WARNING: VIMAGE (virtualized network stack) is a highly " - "experimental feature.\n"); + if (bootverbose) + printf("VIMAGE (virtualized network stack) enabled\n"); /* * We MUST clear curvnet in vi_init_done() before going SMP, diff --git a/sys/powerpc/conf/GENERIC b/sys/powerpc/conf/GENERIC index e1284345dd42..accafae213a0 100644 --- a/sys/powerpc/conf/GENERIC +++ b/sys/powerpc/conf/GENERIC @@ -35,6 +35,7 @@ options PSERIES #PAPR-compliant systems options FDT options SCHED_ULE #ULE scheduler options PREEMPTION #Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET #InterNETworking options INET6 #IPv6 communications protocols options IPSEC # IP (v4/v6) security diff --git a/sys/powerpc/conf/GENERIC64 b/sys/powerpc/conf/GENERIC64 index 2325bb059d78..f2285601a3f4 100644 --- a/sys/powerpc/conf/GENERIC64 +++ b/sys/powerpc/conf/GENERIC64 @@ -35,6 +35,7 @@ options PSERIES #PAPR-compliant systems (e.g. IBM p) options FDT #Flattened Device Tree options SCHED_ULE #ULE scheduler options PREEMPTION #Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET #InterNETworking options INET6 #IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC index 486838119a36..8f9afdc31f53 100644 --- a/sys/riscv/conf/GENERIC +++ b/sys/riscv/conf/GENERIC @@ -30,6 +30,7 @@ makeoptions WITHOUT_MODULES="usb otusfw mwlfw ispfw mwlfw ralfw rtwnfw" options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options TCP_HHOOK # hhook(9) framework for TCP diff --git a/sys/sparc64/conf/GENERIC b/sys/sparc64/conf/GENERIC index f13f71d7a5e4..cf7573811993 100644 --- a/sys/sparc64/conf/GENERIC +++ b/sys/sparc64/conf/GENERIC @@ -28,6 +28,7 @@ makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption +options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security From 2efbd10aded4018c33c9938c5acc151021370d3a Mon Sep 17 00:00:00 2001 From: Ryan Libby Date: Sat, 21 Oct 2017 07:23:45 +0000 Subject: [PATCH 206/219] pms/freebsd: fix compiler warnings - A number of unused variable warnings, - a missing prototype warning (actually a dead function), - and a potential use of an uninitialized variable. Reviewed by: pfg Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12683 --- sys/dev/pms/freebsd/driver/common/lxencrypt.c | 2 +- sys/dev/pms/freebsd/driver/ini/src/agtiapi.c | 30 ++++--------------- sys/dev/pms/freebsd/driver/ini/src/osapi.c | 1 - 3 files changed, 6 insertions(+), 27 deletions(-) diff --git a/sys/dev/pms/freebsd/driver/common/lxencrypt.c b/sys/dev/pms/freebsd/driver/common/lxencrypt.c index 92e4ce1aae34..c53c52fb2378 100644 --- a/sys/dev/pms/freebsd/driver/common/lxencrypt.c +++ b/sys/dev/pms/freebsd/driver/common/lxencrypt.c @@ -41,8 +41,8 @@ #include -static atomic_t ioerr_queue_count; #ifdef ENCRYPT_ENHANCE +static atomic_t ioerr_queue_count; /****************************************************************************** careful_write(): diff --git a/sys/dev/pms/freebsd/driver/ini/src/agtiapi.c b/sys/dev/pms/freebsd/driver/ini/src/agtiapi.c index ac96eada9752..ef7dc19c05ce 100644 --- a/sys/dev/pms/freebsd/driver/ini/src/agtiapi.c +++ b/sys/dev/pms/freebsd/driver/ini/src/agtiapi.c @@ -533,9 +533,6 @@ static int agtiapi_CharIoctl( struct cdev *dev, tiIOCTLPayload_t *pIoctlPayload; struct agtiapi_softc *pCard; pCard=dev->si_drv1; - void *param1 = NULL; - void *param2 = NULL; - void *param3 = NULL; U32 status = 0; U32 retValue; int err = 0; @@ -649,8 +646,8 @@ static int agtiapi_CharIoctl( struct cdev *dev, status = tiCOMMgntIOCTL( &pCard->tiRoot, pIoctlPayload, pCard, - param2, - param3 ); + NULL, + NULL ); if (status == IOCTL_CALL_PENDING) { ostiIOCTLWaitForSignal(&pCard->tiRoot,NULL, NULL, NULL); @@ -2069,17 +2066,14 @@ int agtiapi_QueueCmnd_(struct agtiapi_softc *pmcsc, union ccb * ccb) /* get a ccb */ if ((pccb = agtiapi_GetCCB(pmcsc)) == NULL) { - ag_device_t *targ; AGTIAPI_PRINTK("agtiapi_QueueCmnd_: GetCCB ERROR\n"); if (pmcsc != NULL) { + ag_device_t *targ; TID = INDEX(pmcsc, TID); targ = &pmcsc->pDevList[TID]; - } - if (targ != NULL) - { agtiapi_adjust_queue_depth(ccb->ccb_h.path,targ->qdepth); - } + } ccb->ccb_h.status &= ~CAM_SIM_QUEUED; ccb->ccb_h.status &= ~CAM_STATUS_MASK; ccb->ccb_h.status |= CAM_REQUEUE_REQ; @@ -3089,7 +3083,6 @@ STATIC void agtiapi_StartIO( struct agtiapi_softc *pmcsc ) ccb_t *pccb; int TID; ag_device_t *targ; - struct ccb_relsim crs; AGTIAPI_IO( "agtiapi_StartIO: start\n" ); @@ -4345,18 +4338,6 @@ int agtiapi_eh_HostReset( struct agtiapi_softc *pmcsc, union ccb *cmnd ) } -int agtiapi_eh_DeviceReset( struct agtiapi_softc *pmcsc, union ccb *cmnd ) -{ - AGTIAPI_PRINTK( "agtiapi_eh_HostReset: ccb pointer %p\n", - cmnd ); - - if( cmnd == NULL ) - { - printf( "agtiapi_eh_HostReset: null command, skipping reset.\n" ); - return tiInvalidHandle; - } - return agtiapi_DoSoftReset( pmcsc ); -} /****************************************************************************** agtiapi_QueueCCB() @@ -5661,8 +5642,7 @@ agtiapi_scan() static void agtiapi_scan(struct agtiapi_softc *pmcsc) { union ccb *ccb; - int bus, tid, lun, card_no; - static int num=0; + int bus, tid, lun; AGTIAPI_PRINTK("agtiapi_scan: start cardNO %d \n", pmcsc->cardNo); diff --git a/sys/dev/pms/freebsd/driver/ini/src/osapi.c b/sys/dev/pms/freebsd/driver/ini/src/osapi.c index 2faaff8126f0..a70ada46f20a 100644 --- a/sys/dev/pms/freebsd/driver/ini/src/osapi.c +++ b/sys/dev/pms/freebsd/driver/ini/src/osapi.c @@ -764,7 +764,6 @@ ostiSetDeviceQueueDepth( tiRoot_t *tiRoot, ) { bit32 retVal = 0; - struct agtiapi_softc *pCard = TIROOT_TO_CARD(tiRoot); ccb_t *pccb = (ccb_t *) tiIORequest->osData; tiDeviceHandle_t *tiDeviceHandle = pccb->devHandle; ag_device_t *pDevice = (ag_device_t *)tiDeviceHandle->osData; From 904d8c492f72fa98fc3b1e417799d575e6e38525 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Sat, 21 Oct 2017 12:05:01 +0000 Subject: [PATCH 207/219] Add AT_HWCAP2 ELF auxiliary vector. - allocate value for new AT_HWCAP2 auxiliary vector on all platforms. - expand 'struct sysentvec' by new 'u_long *sv_hwcap2', in exactly same way as for AT_HWCAP. MFC after: 1 month Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D12699 --- sys/arm/include/elf.h | 3 ++- sys/arm64/include/elf.h | 3 ++- sys/kern/imgact_elf.c | 2 ++ sys/mips/include/elf.h | 3 ++- sys/powerpc/include/elf.h | 3 ++- sys/riscv/include/elf.h | 3 ++- sys/sparc64/include/elf.h | 3 ++- sys/sys/sysent.h | 1 + sys/x86/include/elf.h | 6 ++++-- 9 files changed, 19 insertions(+), 8 deletions(-) diff --git a/sys/arm/include/elf.h b/sys/arm/include/elf.h index 2429fb2835ce..7e1564720026 100644 --- a/sys/arm/include/elf.h +++ b/sys/arm/include/elf.h @@ -86,8 +86,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ #define R_ARM_COUNT 33 /* Count of defined relocation types. */ diff --git a/sys/arm64/include/elf.h b/sys/arm64/include/elf.h index 33041efcda52..ed85d3a92485 100644 --- a/sys/arm64/include/elf.h +++ b/sys/arm64/include/elf.h @@ -92,8 +92,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* Define "machine" characteristics */ #define ELF_TARG_CLASS ELFCLASS64 diff --git a/sys/kern/imgact_elf.c b/sys/kern/imgact_elf.c index 57ea9112ef4b..8ff3d58c1af2 100644 --- a/sys/kern/imgact_elf.c +++ b/sys/kern/imgact_elf.c @@ -1133,6 +1133,8 @@ __elfN(freebsd_fixup)(register_t **stack_base, struct image_params *imgp) imgp->sysent->sv_stackprot); if (imgp->sysent->sv_hwcap != NULL) AUXARGS_ENTRY(pos, AT_HWCAP, *imgp->sysent->sv_hwcap); + if (imgp->sysent->sv_hwcap2 != NULL) + AUXARGS_ENTRY(pos, AT_HWCAP2, *imgp->sysent->sv_hwcap2); AUXARGS_ENTRY(pos, AT_NULL, 0); free(imgp->auxargs, M_TEMP); diff --git a/sys/mips/include/elf.h b/sys/mips/include/elf.h index b6b699682abf..26c4799cec5e 100644 --- a/sys/mips/include/elf.h +++ b/sys/mips/include/elf.h @@ -146,8 +146,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ #define ET_DYN_LOAD_ADDR 0x0120000 diff --git a/sys/powerpc/include/elf.h b/sys/powerpc/include/elf.h index 28f8d7e5874f..aa36caff65fd 100644 --- a/sys/powerpc/include/elf.h +++ b/sys/powerpc/include/elf.h @@ -109,8 +109,9 @@ __ElfType(Auxinfo); #define AT_TIMEKEEP 22 /* Pointer to timehands. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* * Relocation types. diff --git a/sys/riscv/include/elf.h b/sys/riscv/include/elf.h index 1a0d067a2526..ee09e3ce5bbc 100644 --- a/sys/riscv/include/elf.h +++ b/sys/riscv/include/elf.h @@ -92,8 +92,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* Define "machine" characteristics */ #define ELF_TARG_CLASS ELFCLASS64 diff --git a/sys/sparc64/include/elf.h b/sys/sparc64/include/elf.h index 22ee3cb46e75..745cf55efeb6 100644 --- a/sys/sparc64/include/elf.h +++ b/sys/sparc64/include/elf.h @@ -94,8 +94,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* Define "machine" characteristics */ #if __ELF_WORD_SIZE == 32 diff --git a/sys/sys/sysent.h b/sys/sys/sysent.h index c03f9b4c9f7d..329268494219 100644 --- a/sys/sys/sysent.h +++ b/sys/sys/sysent.h @@ -130,6 +130,7 @@ struct sysentvec { void (*sv_thread_detach)(struct thread *); int (*sv_trap)(struct thread *); u_long *sv_hwcap; /* Value passed in AT_HWCAP. */ + u_long *sv_hwcap2; /* Value passed in AT_HWCAP2. */ }; #define SV_ILP32 0x000100 /* 32-bit executable. */ diff --git a/sys/x86/include/elf.h b/sys/x86/include/elf.h index 0cbb38f31b47..6273360d7d0e 100644 --- a/sys/x86/include/elf.h +++ b/sys/x86/include/elf.h @@ -102,8 +102,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* * Relocation types. @@ -189,8 +190,9 @@ __ElfType(Auxinfo); #define AT_STACKPROT 23 /* Initial stack protection. */ #define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ #define AT_HWCAP 25 /* CPU feature flags. */ +#define AT_HWCAP2 26 /* CPU feature flags 2. */ -#define AT_COUNT 26 /* Count of defined aux entry types. */ +#define AT_COUNT 27 /* Count of defined aux entry types. */ /* * Relocation types. From 0b08ae2120cdd08c20a2b806e2fcef4d0a36c470 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Sat, 21 Oct 2017 12:06:18 +0000 Subject: [PATCH 208/219] Make elf_aux_info() as public libc function. - Teach elf aux vector functions about newly added AT_HWCAP and AT_HWCAP2 vectors. - Export _elf_aux_info() as new public libc function elf_aux_info(3) The elf_aux_info(3) should be considered as FreeBSD counterpart of glibc getauxval() with more robust interface. Note: We cannot name this new function as getauxval(), with glibc compatible interface. Some ports autodetect its existence and then expects that all Linux specific AT_<*> vectors are defined and implemented. MFC after: 1 month Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D12743 --- lib/libc/gen/Symbol.map | 1 + lib/libc/gen/auxv.c | 30 +++++++++++++++++++++++++++++- sys/sys/auxv.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+), 1 deletion(-) create mode 100644 sys/sys/auxv.h diff --git a/lib/libc/gen/Symbol.map b/lib/libc/gen/Symbol.map index 3108f822b675..459657cf4535 100644 --- a/lib/libc/gen/Symbol.map +++ b/lib/libc/gen/Symbol.map @@ -398,6 +398,7 @@ FBSD_1.5 { devname; devname_r; dirname; + elf_aux_info; fts_children; fts_close; fts_get_clientptr; diff --git a/lib/libc/gen/auxv.c b/lib/libc/gen/auxv.c index 3767ac0a263c..816b6891dd87 100644 --- a/lib/libc/gen/auxv.c +++ b/lib/libc/gen/auxv.c @@ -33,6 +33,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "un-namespace.h" #include "libc_private.h" @@ -65,8 +66,10 @@ __init_elf_aux_vector(void) static pthread_once_t aux_once = PTHREAD_ONCE_INIT; static int pagesize, osreldate, canary_len, ncpus, pagesizes_len; +static int hwcap_present, hwcap2_present; static char *canary, *pagesizes; static void *timekeep; +static u_long hwcap, hwcap2; static void init_aux(void) @@ -83,6 +86,16 @@ init_aux(void) canary_len = aux->a_un.a_val; break; + case AT_HWCAP: + hwcap_present = 1; + hwcap = (u_long)(aux->a_un.a_val); + break; + + case AT_HWCAP2: + hwcap2_present = 1; + hwcap2 = (u_long)(aux->a_un.a_val); + break; + case AT_PAGESIZES: pagesizes = (char *)(aux->a_un.a_ptr); break; @@ -110,6 +123,8 @@ init_aux(void) } } +__weak_reference(_elf_aux_info, elf_aux_info); + int _elf_aux_info(int aux, void *buf, int buflen) { @@ -130,6 +145,20 @@ _elf_aux_info(int aux, void *buf, int buflen) } else res = ENOENT; break; + case AT_HWCAP: + if (hwcap_present && buflen == sizeof(u_long)) { + *(u_long *)buf = hwcap; + res = 0; + } else + res = ENOENT; + break; + case AT_HWCAP2: + if (hwcap2_present && buflen == sizeof(u_long)) { + *(u_long *)buf = hwcap2; + res = 0; + } else + res = ENOENT; + break; case AT_PAGESIZES: if (pagesizes != NULL && pagesizes_len >= buflen) { memcpy(buf, pagesizes, buflen); @@ -137,7 +166,6 @@ _elf_aux_info(int aux, void *buf, int buflen) } else res = ENOENT; break; - case AT_PAGESZ: if (buflen == sizeof(int)) { if (pagesize != 0) { diff --git a/sys/sys/auxv.h b/sys/sys/auxv.h new file mode 100644 index 000000000000..7c95d5f83aa8 --- /dev/null +++ b/sys/sys/auxv.h @@ -0,0 +1,37 @@ +/*- + * Copyright (c) 2017 Michal Meloun + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _SYS_AUXV_H_ +#define _SYS_AUXV_H_ + +#include +#include + +int elf_aux_info(int aux, void *buf, int buflen); + +#endif /* !_SYS_AUXV_H_ */ From c8759f09966dfedc75faea567c2f159582436709 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Sat, 21 Oct 2017 12:15:12 +0000 Subject: [PATCH 209/219] Add C++ decoration to auxv.v forgotten in r324815. MFC after: 1 month --- sys/sys/auxv.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/sys/auxv.h b/sys/sys/auxv.h index 7c95d5f83aa8..d389bac49623 100644 --- a/sys/sys/auxv.h +++ b/sys/sys/auxv.h @@ -32,6 +32,8 @@ #include #include +__BEGIN_DECLS int elf_aux_info(int aux, void *buf, int buflen); +__END_DECLS #endif /* !_SYS_AUXV_H_ */ From 0cbf724ed03571bc90ed22c3b4bf8c6c7b2da564 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Sat, 21 Oct 2017 12:16:21 +0000 Subject: [PATCH 210/219] Fullify implementation of AT_HWCAP and AT_HWCAP2 for ARMv6,7. This makes elf_aux_info(3) useable for ARM ports. MFC after: 1 month --- sys/arm/arm/cpuinfo.c | 46 +++++++++++++++++++++++++++++++++++++++ sys/arm/arm/elf_machdep.c | 2 ++ sys/arm/arm/vfp.c | 2 ++ sys/arm/include/elf.h | 26 ++++++++++++++++++++++ sys/arm/include/md_var.h | 1 + sys/arm/include/vfp.h | 6 +++++ 6 files changed, 83 insertions(+) diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c index 5dceab37be00..0566f999bdbb 100644 --- a/sys/arm/arm/cpuinfo.c +++ b/sys/arm/arm/cpuinfo.c @@ -35,6 +35,8 @@ __FBSDID("$FreeBSD$"); #include #include +#include +#include #if __ARM_ARCH >= 6 void reinit_mmu(uint32_t ttb, uint32_t aux_clr, uint32_t aux_set); @@ -77,6 +79,9 @@ SYSCTL_INT(_hw_cpu_quirks, OID_AUTO, actlr_set, void cpuinfo_init(void) { +#if __ARM_ARCH >= 6 + uint32_t tmp; +#endif /* * Prematurely fetch CPU quirks. Standard fetch for tunable @@ -190,6 +195,47 @@ cpuinfo_init(void) } cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1; cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1; + + /* Fill AT_HWCAP bits. */ + elf_hwcap |= HWCAP_HALF | HWCAP_FAST_MULT; /* Requierd for all CPUs */ + elf_hwcap |= HWCAP_TLS | HWCAP_EDSP; /* Requierd for v6+ CPUs */ + + tmp = (cpuinfo.id_isar0 >> 24) & 0xF; /* Divide_instrs */ + if (tmp >= 1) + elf_hwcap |= HWCAP_IDIVT; + if (tmp >= 2) + elf_hwcap |= HWCAP_IDIVA; + + tmp = (cpuinfo.id_pfr0 >> 4) & 0xF; /* State1 */ + if (tmp >= 1) + elf_hwcap |= HWCAP_THUMB; + + tmp = (cpuinfo.id_pfr0 >> 12) & 0xF; /* State3 */ + if (tmp >= 1) + elf_hwcap |= HWCAP_THUMBEE; + + tmp = (cpuinfo.id_mmfr0 >> 0) & 0xF; /* VMSA */ + if (tmp >= 5) + elf_hwcap |= HWCAP_LPAE; + + /* Fill AT_HWCAP2 bits. */ + tmp = (cpuinfo.id_isar5 >> 4) & 0xF; /* AES */ + if (tmp >= 1) + elf_hwcap2 |= HWCAP2_AES; + if (tmp >= 2) + elf_hwcap2 |= HWCAP2_PMULL; + + tmp = (cpuinfo.id_isar5 >> 8) & 0xF; /* SHA1 */ + if (tmp >= 1) + elf_hwcap2 |= HWCAP2_SHA1; + + tmp = (cpuinfo.id_isar5 >> 12) & 0xF; /* SHA2 */ + if (tmp >= 1) + elf_hwcap2 |= HWCAP2_SHA2; + + tmp = (cpuinfo.id_isar5 >> 16) & 0xF; /* CRC32 */ + if (tmp >= 1) + elf_hwcap2 |= HWCAP2_CRC32; #endif } diff --git a/sys/arm/arm/elf_machdep.c b/sys/arm/arm/elf_machdep.c index fba35eb159c6..cc8ef9994f0f 100644 --- a/sys/arm/arm/elf_machdep.c +++ b/sys/arm/arm/elf_machdep.c @@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$"); static boolean_t elf32_arm_abi_supported(struct image_params *); u_long elf_hwcap; +u_long elf_hwcap2; struct sysentvec elf32_freebsd_sysvec = { .sv_size = SYS_MAXSYSCALL, @@ -92,6 +93,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_thread_detach = NULL, .sv_trap = NULL, .sv_hwcap = &elf_hwcap, + .sv_hwcap2 = &elf_hwcap2, }; INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); diff --git a/sys/arm/arm/vfp.c b/sys/arm/arm/vfp.c index 6a07a5595513..7e3e728ce1d2 100644 --- a/sys/arm/arm/vfp.c +++ b/sys/arm/arm/vfp.c @@ -149,6 +149,8 @@ vfp_init(void) (tmp & VMVFR1_I_MASK) >> VMVFR1_I_OFF == 1 && (tmp & VMVFR1_SP_MASK) >> VMVFR1_SP_OFF == 1) elf_hwcap |= HWCAP_NEON; + if ((tmp & VMVFR1_FMAC_MASK) >> VMVFR1_FMAC_OFF == 1) + elf_hwcap |= HWCAP_VFPv4; } /* initialize the coprocess 10 and 11 calls diff --git a/sys/arm/include/elf.h b/sys/arm/include/elf.h index 7e1564720026..ee854f76adde 100644 --- a/sys/arm/include/elf.h +++ b/sys/arm/include/elf.h @@ -117,10 +117,36 @@ __ElfType(Auxinfo); #define ET_DYN_LOAD_ADDR 0x12000 /* Flags passed in AT_HWCAP. */ +#define HWCAP_SWP 0x00000001 /* Unsupported, never set. */ +#define HWCAP_HALF 0x00000002 /* Always set. */ +#define HWCAP_THUMB 0x00000004 +#define HWCAP_26BIT 0x00000008 /* Unsupported, never set. */ +#define HWCAP_FAST_MULT 0x00000010 /* Always set. */ +#define HWCAP_FPA 0x00000020 /* Unsupported, never set. */ #define HWCAP_VFP 0x00000040 +#define HWCAP_EDSP 0x00000080 /* Always set for ARMv6+. */ +#define HWCAP_JAVA 0x00000100 /* Unsupported, never set. */ +#define HWCAP_IWMMXT 0x00000200 /* Unsupported, never set. */ +#define HWCAP_CRUNCH 0x00000400 /* Unsupported, never set. */ +#define HWCAP_THUMBEE 0x00000800 #define HWCAP_NEON 0x00001000 #define HWCAP_VFPv3 0x00002000 #define HWCAP_VFPv3D16 0x00004000 +#define HWCAP_TLS 0x00008000 /* Always set for ARMv6+. */ +#define HWCAP_VFPv4 0x00010000 +#define HWCAP_IDIVA 0x00020000 +#define HWCAP_IDIVT 0x00040000 #define HWCAP_VFPD32 0x00080000 +#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) +#define HWCAP_LPAE 0x00100000 +#define HWCAP_EVTSTRM 0x00200000 /* Not implemented yet. */ + + +/* Flags passed in AT_HWCAP2. */ +#define HWCAP2_AES 0x00000001 +#define HWCAP2_PMULL 0x00000002 +#define HWCAP2_SHA1 0x00000004 +#define HWCAP2_SHA2 0x00000008 +#define HWCAP2_CRC32 0x00000010 #endif /* !_MACHINE_ELF_H_ */ diff --git a/sys/arm/include/md_var.h b/sys/arm/include/md_var.h index 46d834b9ba36..39a174ee7a42 100644 --- a/sys/arm/include/md_var.h +++ b/sys/arm/include/md_var.h @@ -39,6 +39,7 @@ extern int szsigcode; extern uint32_t *vm_page_dump; extern int vm_page_dump_size; extern u_long elf_hwcap; +extern u_long elf_hwcap2; extern int (*_arm_memcpy)(void *, void *, int, int); extern int (*_arm_bzero)(void *, int, int); diff --git a/sys/arm/include/vfp.h b/sys/arm/include/vfp.h index 94e7a2d20a88..15ae54030005 100644 --- a/sys/arm/include/vfp.h +++ b/sys/arm/include/vfp.h @@ -119,6 +119,12 @@ #define VMVFR0_RB_MASK (0x0000000f) /* VFP 64 bit media support */ /* VMVFR1 */ +#define VMVFR1_FMAC_OFF 28 +#define VMVFR1_FMAC_MASK (0xf0000000) /* Neon FMAC support */ +#define VMVFR1_VFP_HP_OFF 24 +#define VMVFR1_VFP_HP_MASK (0x0f000000) /* VFP half prec support */ +#define VMVFR1_HP_OFF 20 +#define VMVFR1_HP_MASK (0x00f00000) /* Neon half prec support */ #define VMVFR1_SP_OFF 16 #define VMVFR1_SP_MASK (0x000f0000) /* Neon single prec support */ #define VMVFR1_I_OFF 12 From d5464ff11700ac44568e6816e00d1d1427cc46ae Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Sat, 21 Oct 2017 15:18:20 +0000 Subject: [PATCH 211/219] dts: Update the Device Tree Sources to Linux 4.13 --- .gitignore | 4 - Bindings/arm/actions.txt | 39 + Bindings/arm/amlogic.txt | 23 +- Bindings/arm/atmel-at91.txt | 30 + Bindings/arm/bcm/brcm,stingray.txt | 12 + Bindings/arm/cci.txt | 15 +- Bindings/arm/ccn.txt | 1 + Bindings/arm/coresight-cpu-debug.txt | 49 ++ Bindings/arm/cpus.txt | 18 +- Bindings/arm/gemini.txt | 24 +- Bindings/arm/hisilicon/hisilicon.txt | 4 + Bindings/arm/idle-states.txt | 4 +- Bindings/arm/keystone/keystone.txt | 3 + Bindings/arm/l2c2x0.txt | 4 +- .../arm/marvell/ap806-system-controller.txt | 85 +- .../arm/marvell/cp110-system-controller0.txt | 144 +++- Bindings/arm/mediatek.txt | 8 + Bindings/arm/realtek.txt | 20 + Bindings/arm/rockchip.txt | 8 +- Bindings/arm/shmobile.txt | 13 +- Bindings/arm/tegra.txt | 1 - Bindings/arm/topology.txt | 4 +- Bindings/ata/ahci-fsl-qoriq.txt | 2 +- Bindings/ata/cortina,gemini-sata-bridge.txt | 55 ++ Bindings/ata/faraday,ftide010.txt | 38 + Bindings/ata/sata_rcar.txt | 14 +- Bindings/bus/brcm,gisb-arb.txt | 3 +- Bindings/bus/simple-pm-bus.txt | 2 +- Bindings/chosen.txt | 3 +- Bindings/clock/amlogic,meson8b-clkc.txt | 11 +- Bindings/clock/brcm,iproc-clocks.txt | 76 ++ Bindings/clock/hi6220-clock.txt | 1 + Bindings/clock/img,boston-clock.txt | 31 + Bindings/clock/qcom,gcc.txt | 1 + Bindings/clock/qoriq-clock.txt | 6 + Bindings/clock/renesas,cpg-mssr.txt | 10 +- Bindings/clock/rockchip,rk3128-cru.txt | 56 ++ Bindings/clock/sun8i-de2.txt | 31 + Bindings/clock/sunxi-ccu.txt | 5 +- Bindings/clock/ti,sci-clk.txt | 37 + Bindings/clock/ti-clkctrl.txt | 56 ++ Bindings/common-properties.txt | 2 +- Bindings/cpufreq/ti-cpufreq.txt | 20 +- Bindings/crypto/fsl-sec4.txt | 4 +- Bindings/crypto/fsl-sec6.txt | 4 +- Bindings/crypto/inside-secure-safexcel.txt | 27 + Bindings/crypto/mediatek-crypto.txt | 8 +- Bindings/display/brcm,bcm-vc4.txt | 7 +- Bindings/display/bridge/adi,adv7511.txt | 8 + Bindings/display/bridge/renesas,dw-hdmi.txt | 9 +- Bindings/display/exynos/exynos5433-decon.txt | 13 +- Bindings/display/panel/auo,p320hvn03.txt | 8 + Bindings/display/panel/display-timing.txt | 16 +- Bindings/display/panel/innolux,p079zca.txt | 23 + Bindings/display/panel/nec,nl12880b20-05.txt | 8 + .../display/panel/nlt,nl192108ac18-02d.txt | 8 + Bindings/display/panel/samsung,s6e3ha2.txt | 5 +- Bindings/display/st,stm32-ltdc.txt | 36 + Bindings/display/sunxi/sun4i-drm.txt | 127 ++- Bindings/display/zte,vou.txt | 21 + Bindings/dma/arm-pl08x.txt | 9 +- Bindings/dma/brcm,iproc-sba.txt | 29 + Bindings/dma/renesas,rcar-dmac.txt | 5 +- Bindings/dma/shdma.txt | 2 +- Bindings/fsi/fsi-master-gpio.txt | 24 + Bindings/gpio/gpio-exar.txt | 5 + Bindings/gpio/gpio-mvebu.txt | 24 +- Bindings/gpio/gpio.txt | 13 +- Bindings/gpio/gpio_atmel.txt | 10 +- Bindings/gpio/ingenic,gpio.txt | 46 ++ Bindings/gpio/renesas,gpio-rcar.txt | 1 + Bindings/gpu/arm,mali-midgard.txt | 86 ++ Bindings/graph.txt | 13 +- Bindings/hwlock/sprd-hwspinlock.txt | 23 + Bindings/i2c/i2c-aspeed.txt | 48 ++ Bindings/i2c/i2c-designware.txt | 16 +- Bindings/i2c/{i2c-mt6577.txt => i2c-mtk.txt} | 10 +- Bindings/i2c/i2c-mux-gpmux.txt | 99 +++ Bindings/i2c/i2c-pca-platform.txt | 29 + Bindings/i2c/i2c-zx2967.txt | 22 + Bindings/iio/adc/amlogic,meson-saradc.txt | 2 + Bindings/iio/adc/renesas,gyroadc.txt | 9 +- Bindings/iio/adc/st,stm32-adc.txt | 28 +- Bindings/iio/adc/ti-adc084s021.txt | 19 + Bindings/iio/adc/ti-adc108s102.txt | 18 + Bindings/iio/imu/st_lsm6dsx.txt | 3 +- Bindings/iio/multiplexer/io-channel-mux.txt | 39 + Bindings/iio/proximity/as3935.txt | 2 + Bindings/input/dlink,dir685-touchkeys.txt | 21 + Bindings/input/touchscreen/st,stmfts.txt | 43 + .../allwinner,sunxi-nmi.txt | 7 +- .../aspeed,ast2400-i2c-ic.txt | 25 + .../aspeed,ast2400-vic.txt | 9 +- .../interrupt-controller/marvell,gicp.txt | 27 + Bindings/interrupt-controller/marvell,icu.txt | 51 ++ .../interrupt-controller/mediatek,sysirq.txt | 28 +- Bindings/interrupt-controller/open-pic.txt | 5 +- Bindings/iommu/arm,smmu-v3.txt | 12 + Bindings/leds/common.txt | 35 +- Bindings/leds/pca963x.txt | 1 + Bindings/mailbox/qcom,apcs-kpss-global.txt | 46 ++ Bindings/media/cec.txt | 8 + Bindings/media/i2c/adv7180.txt | 15 + Bindings/media/i2c/max2175.txt | 59 ++ Bindings/media/i2c/ov5640.txt | 45 ++ Bindings/media/imx.txt | 53 ++ Bindings/media/mediatek-mdp.txt | 12 +- Bindings/media/qcom,venus.txt | 107 +++ Bindings/media/rcar_vin.txt | 4 +- Bindings/media/renesas,drif.txt | 176 ++++ Bindings/media/s5p-cec.txt | 6 +- Bindings/media/st,stm32-cec.txt | 19 + Bindings/media/st,stm32-dcmi.txt | 45 ++ Bindings/media/stih-cec.txt | 2 +- Bindings/media/video-mux.txt | 60 ++ Bindings/mfd/arizona.txt | 3 +- Bindings/mfd/hi6421.txt | 4 +- Bindings/mfd/lp87565.txt | 43 + Bindings/mfd/tps65910.txt | 4 + Bindings/misc/allwinner,syscon.txt | 20 + Bindings/mmc/exynos-dw-mshc.txt | 1 - Bindings/mmc/fsl-esdhc.txt | 14 + Bindings/mmc/img-dw-mshc.txt | 1 - Bindings/mmc/k3-dw-mshc.txt | 3 +- Bindings/mmc/rockchip-dw-mshc.txt | 5 + Bindings/mmc/synopsys-dw-mshc.txt | 16 +- Bindings/mmc/ti-omap-hsmmc.txt | 2 +- Bindings/mmc/zx-dw-mshc.txt | 1 - Bindings/mtd/atmel-nand.txt | 14 + Bindings/mtd/denali-nand.txt | 13 + Bindings/mtd/elm.txt | 2 +- Bindings/mtd/gpmc-nand.txt | 2 +- Bindings/mtd/gpmc-nor.txt | 4 +- Bindings/mtd/gpmc-onenand.txt | 2 +- Bindings/mtd/gpmi-nand.txt | 14 +- Bindings/mtd/microchip,mchp23k256.txt | 18 + Bindings/mtd/mtk-nand.txt | 5 +- Bindings/mtd/nand.txt | 2 +- Bindings/mtd/partition.txt | 32 +- Bindings/mux/adi,adg792a.txt | 75 ++ Bindings/mux/gpio-mux.txt | 69 ++ Bindings/mux/mmio-mux.txt | 60 ++ Bindings/mux/mux-controller.txt | 157 ++++ Bindings/net/brcm,amac.txt | 1 + Bindings/net/brcm,bgmac-nsp.txt | 24 - Bindings/net/cortina.txt | 21 + Bindings/net/dsa/b53.txt | 3 + Bindings/net/dsa/ksz.txt | 72 ++ Bindings/net/ethernet.txt | 12 +- .../fsl/fman.txt => net/fsl-fman.txt} | 0 Bindings/net/gpmc-eth.txt | 4 +- Bindings/net/macb.txt | 1 + Bindings/net/marvell-orion-mdio.txt | 10 +- Bindings/net/nfc/trf7970a.txt | 10 +- Bindings/net/qca,qca7000.txt | 88 ++ Bindings/net/qca-qca7000-spi.txt | 47 -- Bindings/net/ti,dp83867.txt | 7 + Bindings/net/ti,wilink-st.txt | 12 + Bindings/net/wireless/brcm,bcm43xx-fmac.txt | 2 +- Bindings/net/wireless/ti,wlcore.txt | 1 + Bindings/nvmem/rockchip-efuse.txt | 1 + Bindings/opp/opp.txt | 38 +- Bindings/pci/faraday,ftpci100.txt | 7 + Bindings/pci/fsl,imx6q-pcie.txt | 4 + Bindings/pci/kirin-pcie.txt | 50 ++ Bindings/pci/mediatek,mt7623-pcie.txt | 130 +++ Bindings/pci/qcom,pcie.txt | 20 +- Bindings/pci/rcar-pci.txt | 2 +- Bindings/pci/tango-pcie.txt | 29 + Bindings/phy/bcm-ns-usb3-phy.txt | 27 +- Bindings/phy/brcm,ns2-drd-phy.txt | 30 + Bindings/phy/brcm-sata-phy.txt | 7 +- Bindings/phy/meson-gxl-usb2-phy.txt | 17 + Bindings/phy/meson8b-usb2-phy.txt | 3 +- Bindings/phy/phy-cpcap-usb.txt | 40 + Bindings/phy/phy-rockchip-inno-usb2.txt | 1 + Bindings/phy/rcar-gen3-phy-usb3.txt | 46 ++ Bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 + Bindings/pinctrl/ingenic,pinctrl.txt | 41 + Bindings/pinctrl/pinctrl-bindings.txt | 25 +- Bindings/pinctrl/pinctrl-zx.txt | 85 ++ Bindings/pinctrl/qcom,ipq8074-pinctrl.txt | 172 ++++ Bindings/pinctrl/renesas,pfc-pinctrl.txt | 2 + Bindings/pinctrl/renesas,rza1-pinctrl.txt | 221 ++++++ Bindings/power/actions,owl-sps.txt | 17 + Bindings/power/rockchip-io-domain.txt | 7 + Bindings/power/supply/battery.txt | 57 ++ Bindings/power/supply/bq27xxx.txt | 31 +- Bindings/power/supply/cpcap-battery.txt | 31 + Bindings/power/supply/ltc3651-charger.txt | 27 + .../power/{ => supply}/max8903-charger.txt | 0 .../supply}/maxim,max14656.txt | 0 Bindings/powerpc/fsl/cpus.txt | 6 +- Bindings/powerpc/fsl/l2cache.txt | 2 +- Bindings/powerpc/fsl/srio-rmu.txt | 4 +- Bindings/powerpc/fsl/srio.txt | 3 +- Bindings/property-units.txt | 3 + Bindings/ptp/brcm,ptp-dte.txt | 20 + Bindings/pwm/pwm-meson.txt | 4 +- Bindings/pwm/pwm-stm32.txt | 2 +- Bindings/pwm/renesas,pwm-rcar.txt | 1 + Bindings/regulator/regulator.txt | 8 + Bindings/remoteproc/ti,keystone-rproc.txt | 133 ++++ Bindings/reserved-memory/reserved-memory.txt | 3 + Bindings/reset/ti,sci-reset.txt | 62 ++ Bindings/rng/mtk-rng.txt | 4 +- Bindings/rng/timeriomem_rng.txt | 7 + Bindings/rtc/brcm,brcmstb-waketimer.txt | 22 + Bindings/rtc/cortina,gemini.txt | 14 - Bindings/rtc/faraday,ftrtc010.txt | 28 + Bindings/rtc/st,stm32-rtc.txt | 32 +- Bindings/serial/8250.txt | 3 + Bindings/serial/actions,owl-uart.txt | 16 + Bindings/serial/amlogic,meson-uart.txt | 38 + Bindings/serial/fsl-lpuart.txt | 2 + Bindings/serial/mtk-uart.txt | 2 + Bindings/serial/slave-device.txt | 9 + Bindings/soc/mediatek/scpsys.txt | 6 +- Bindings/soc/qcom/qcom,glink.txt | 73 ++ Bindings/sound/audio-graph-card.txt | 129 +++ Bindings/sound/audio-graph-scu-card.txt | 122 +++ Bindings/sound/cs35l35.txt | 3 + Bindings/sound/nau8825.txt | 3 + Bindings/sound/renesas,rsnd.txt | 37 +- Bindings/sound/rockchip,pdm.txt | 39 + Bindings/sound/rockchip-spdif.txt | 2 + Bindings/sound/samsung,odroid.txt | 15 +- Bindings/sound/simple-scu-card.txt | 67 +- Bindings/sound/st,stm32-i2s.txt | 62 ++ Bindings/sound/st,stm32-sai.txt | 41 +- Bindings/sound/st,stm32-spdifrx.txt | 56 ++ Bindings/sound/sun4i-codec.txt | 11 +- Bindings/sound/sun8i-codec-analog.txt | 1 + Bindings/sound/zte,zx-aud96p22.txt | 24 + Bindings/spi/sh-msiof.txt | 2 + Bindings/spi/spi-bus.txt | 76 +- Bindings/spi/spi-meson.txt | 31 + Bindings/spi/spi-mt65xx.txt | 2 + Bindings/spi/spi-stm32.txt | 59 ++ .../{brcm,ns-thermal => brcm,ns-thermal.txt} | 0 Bindings/timer/actions,owl-timer.txt | 20 + Bindings/timer/faraday,fttmr010.txt | 6 +- Bindings/timer/moxa,moxart-timer.txt | 19 - Bindings/trivial-devices.txt | 1 + Bindings/usb/dwc3.txt | 2 + Bindings/usb/exynos-usb.txt | 4 + Bindings/usb/iproc-udc.txt | 21 + Bindings/usb/usb-ohci.txt | 1 + Bindings/vendor-prefixes.txt | 13 + Bindings/watchdog/da9062-wdt.txt | 23 + Bindings/watchdog/dw_wdt.txt | 3 + Bindings/watchdog/renesas-wdt.txt | 4 +- Bindings/watchdog/st,stm32-iwdg.txt | 19 + Bindings/watchdog/uniphier-wdt.txt | 20 + include/dt-bindings/clock/bcm-sr.h | 101 +++ include/dt-bindings/clock/boston-clock.h | 14 + .../dt-bindings/clock/cortina,gemini-clock.h | 29 + include/dt-bindings/clock/exynos5420.h | 3 + include/dt-bindings/clock/gxbb-clkc.h | 10 +- include/dt-bindings/clock/hi3660-clock.h | 17 + include/dt-bindings/clock/hi6220-clock.h | 4 + include/dt-bindings/clock/histb-clock.h | 9 +- include/dt-bindings/clock/imx7d-clock.h | 4 +- include/dt-bindings/clock/meson8b-clkc.h | 10 + include/dt-bindings/clock/mt2701-clk.h | 3 +- include/dt-bindings/clock/mt8173-clk.h | 4 +- include/dt-bindings/clock/omap4.h | 146 ++++ include/dt-bindings/clock/qcom,gcc-ipq8074.h | 152 ++++ include/dt-bindings/clock/r7s72100-clock.h | 53 ++ include/dt-bindings/clock/r8a7790-cpg-mssr.h | 52 ++ include/dt-bindings/clock/r8a7791-clock.h | 1 + include/dt-bindings/clock/r8a7791-cpg-mssr.h | 48 ++ include/dt-bindings/clock/r8a7792-cpg-mssr.h | 43 + include/dt-bindings/clock/r8a7793-cpg-mssr.h | 48 ++ include/dt-bindings/clock/r8a7794-cpg-mssr.h | 47 ++ include/dt-bindings/clock/rk3128-cru.h | 282 +++++++ include/dt-bindings/clock/rk3228-cru.h | 47 ++ include/dt-bindings/clock/rk3399-cru.h | 2 + include/dt-bindings/clock/sun5i-ccu.h | 3 + include/dt-bindings/clock/sun8i-a83t-ccu.h | 140 ++++ include/dt-bindings/clock/sun8i-de2.h | 18 + include/dt-bindings/clock/zx296718-clock.h | 6 +- include/dt-bindings/gpio/gpio.h | 4 + include/dt-bindings/input/linux-event-codes.h | 1 + .../interrupt-controller/mvebu-icu.h | 15 + include/dt-bindings/mux/mux.h | 16 + .../pinctrl/brcm,pinctrl-stingray.h | 68 ++ .../dt-bindings/pinctrl/r7s72100-pinctrl.h | 16 + include/dt-bindings/power/mt6797-power.h | 30 + .../dt-bindings/power/owl-s500-powergate.h | 19 + include/dt-bindings/reset/altr,rst-mgr-s10.h | 108 +++ .../dt-bindings/reset/cortina,gemini-reset.h | 36 + include/dt-bindings/reset/sun8i-a83t-ccu.h | 98 +++ include/dt-bindings/reset/sun8i-de2.h | 14 + src/arc/axc001.dtsi | 20 +- src/arc/axc003.dtsi | 21 +- src/arc/axc003_idu.dtsi | 21 +- src/arc/axs10x_mb.dtsi | 2 +- src/arm/aks-cdu.dts | 52 +- src/arm/am335x-baltos.dtsi | 2 +- src/arm/am335x-base0033.dts | 2 +- src/arm/am335x-bone-common.dtsi | 10 +- src/arm/am335x-boneblack-wireless.dts | 5 + src/arm/am335x-boneblack.dts | 2 +- src/arm/am335x-boneblue.dts | 460 +++++++++++ src/arm/am335x-bonegreen-wireless.dts | 5 + src/arm/am335x-nano.dts | 2 +- src/arm/am335x-pepper.dts | 2 +- src/arm/am335x-phycore-som.dtsi | 2 +- src/arm/am335x-shc.dts | 2 +- src/arm/am335x-sl50.dts | 2 +- src/arm/am33xx.dtsi | 26 +- src/arm/am4372.dtsi | 10 +- src/arm/am437x-gp-evm.dts | 2 - src/arm/am437x-idk-evm.dts | 2 +- src/arm/am437x-sk-evm.dts | 4 +- src/arm/am43x-epos-evm.dts | 4 +- src/arm/am43xx-clocks.dtsi | 36 + src/arm/am571x-idk.dts | 17 + src/arm/am572x-idk.dts | 20 + src/arm/am57xx-beagle-x15-common.dtsi | 2 +- src/arm/animeo_ip.dts | 49 +- src/arm/armada-370.dtsi | 19 +- src/arm/armada-385-linksys-caiman.dts | 181 +++-- src/arm/armada-385-linksys-cobra.dts | 181 +++-- src/arm/armada-385-linksys-rango.dts | 203 +++++ src/arm/armada-385-linksys-shelby.dts | 181 +++-- src/arm/armada-385-linksys.dtsi | 362 +++------ src/arm/armada-385-turris-omnia.dts | 2 +- src/arm/armada-388-gp.dts | 4 +- src/arm/armada-38x.dtsi | 16 +- src/arm/armada-xp-98dx3236.dtsi | 4 + src/arm/armada-xp-98dx4251.dtsi | 1 + src/arm/armada-xp-linksys-mamba.dts | 8 +- src/arm/armada-xp-mv78230.dtsi | 16 +- src/arm/armada-xp-mv78260.dtsi | 19 +- src/arm/armada-xp-mv78460.dtsi | 19 +- src/arm/aspeed-g4.dtsi | 7 +- src/arm/aspeed-g5.dtsi | 7 +- src/arm/at91-cosino.dtsi | 75 +- src/arm/at91-kizbox.dts | 40 +- src/arm/at91-kizbox2.dts | 45 +- src/arm/at91-kizboxmini.dts | 52 +- src/arm/at91-linea.dtsi | 27 +- src/arm/at91-qil_a9260.dts | 89 ++- src/arm/at91-sama5d2_xplained.dts | 32 +- src/arm/at91-sama5d3_xplained.dts | 97 ++- src/arm/at91-sama5d4_ma5d4.dtsi | 4 +- src/arm/at91-sama5d4_xplained.dts | 75 +- src/arm/at91-sama5d4ek.dts | 75 +- src/arm/at91-tse850-3.dts | 72 +- src/arm/at91sam9260.dtsi | 65 +- src/arm/at91sam9261.dtsi | 48 +- src/arm/at91sam9261ek.dts | 73 +- src/arm/at91sam9263.dtsi | 89 ++- src/arm/at91sam9263ek.dts | 89 ++- src/arm/at91sam9g20ek_common.dtsi | 89 ++- src/arm/at91sam9g45.dtsi | 64 +- src/arm/at91sam9m10g45ek.dts | 49 +- src/arm/at91sam9n12.dtsi | 74 +- src/arm/at91sam9n12ek.dts | 26 +- src/arm/at91sam9rl.dtsi | 73 +- src/arm/at91sam9rlek.dts | 77 +- src/arm/at91sam9x5.dtsi | 130 +-- src/arm/at91sam9x5cm.dtsi | 75 +- src/arm/axp209.dtsi | 5 + src/arm/axp22x.dtsi | 5 + src/arm/bcm-cygnus.dtsi | 71 ++ src/arm/bcm-nsp.dtsi | 26 + src/arm/bcm2835-rpi-zero.dts | 2 +- src/arm/bcm2835-rpi.dtsi | 2 +- src/arm/bcm2835.dtsi | 4 + src/arm/bcm2836.dtsi | 4 + src/arm/bcm2837-rpi-3-b.dts | 1 + src/arm/bcm283x-rpi-usb-otg.dtsi | 10 + src/arm/bcm283x.dtsi | 27 + src/arm/bcm5301x.dtsi | 34 + src/arm/bcm911360_entphn.dts | 20 + src/arm/da850-evm.dts | 23 +- src/arm/da850-lcdk.dts | 7 - src/arm/da850-lego-ev3.dts | 28 + src/arm/da850.dtsi | 29 +- src/arm/dm8168-evm.dts | 34 +- src/arm/dm816x.dtsi | 2 +- src/arm/dra7-evm.dts | 3 +- src/arm/dra7.dtsi | 4 +- src/arm/dra71-evm.dts | 4 +- src/arm/dra72-evm-common.dtsi | 3 +- src/arm/dra7xx-clocks.dtsi | 20 + src/arm/emev2.dtsi | 2 +- src/arm/ethernut5.dts | 43 +- src/arm/exynos3250-monk.dts | 6 +- src/arm/exynos3250-rinato.dts | 8 +- src/arm/exynos4.dtsi | 3 + src/arm/exynos4210-origen.dts | 2 +- src/arm/exynos4210-trats.dts | 4 +- src/arm/exynos4412-odroid-common.dtsi | 6 +- src/arm/exynos4412-odroidu3.dts | 4 + src/arm/exynos4412-odroidx.dts | 2 +- src/arm/exynos4412-trats2.dts | 8 +- src/arm/exynos5.dtsi | 84 +- src/arm/exynos5250-arndale.dts | 1 - src/arm/exynos5250-pinctrl.dtsi | 7 + src/arm/exynos5250-smdk5250.dts | 1 - src/arm/exynos5250-snow-common.dtsi | 4 + src/arm/exynos5250-spring.dts | 1 - src/arm/exynos5250.dtsi | 21 +- src/arm/exynos5420-arndale-octa.dts | 1 - src/arm/exynos5420-peach-pit.dts | 5 +- src/arm/exynos5420-pinctrl.dtsi | 7 + src/arm/exynos5420-smdk5420.dts | 1 - src/arm/exynos5420.dtsi | 89 ++- src/arm/exynos5422-odroidxu3-audio.dtsi | 2 +- src/arm/exynos5422-odroidxu3-common.dtsi | 6 +- src/arm/exynos5440.dtsi | 2 +- src/arm/exynos5800-peach-pi.dts | 5 +- src/arm/ge863-pro3.dtsi | 41 +- src/arm/gemini-nas4220b.dts | 10 + src/arm/gemini-sq201.dts | 10 + src/arm/gemini.dtsi | 81 +- src/arm/imx23-sansa.dts | 7 +- src/arm/imx25-karo-tx25.dts | 2 +- src/arm/imx25-pdk.dts | 2 +- src/arm/imx25.dtsi | 2 + src/arm/imx27-phytec-phycard-s-som.dtsi | 2 +- src/arm/imx27-phytec-phycore-som.dtsi | 2 +- src/arm/imx28-cfa10037.dts | 2 +- src/arm/imx28-cfa10049.dts | 2 +- src/arm/imx28-cfa10057.dts | 2 +- src/arm/imx28-cfa10058.dts | 2 +- src/arm/imx28-eukrea-mbmx287lc.dts | 2 +- src/arm/imx28-evk.dts | 4 +- src/arm/imx28-m28cu3.dts | 2 +- src/arm/imx50-evk.dts | 2 +- src/arm/imx50.dtsi | 1 + src/arm/imx51-apf51.dts | 2 +- src/arm/imx53-mba53.dts | 2 +- src/arm/imx53-qsb-common.dtsi | 2 +- src/arm/imx53-smd.dts | 2 +- src/arm/imx53-tqma53.dtsi | 2 +- src/arm/imx53-tx53.dtsi | 2 +- src/arm/imx53-voipac-dmm-668.dtsi | 2 +- src/arm/imx6dl-gw560x.dts | 55 ++ src/arm/imx6dl-riotboard.dts | 2 +- src/arm/imx6dl-sabrelite.dts | 5 + src/arm/imx6dl-sabresd.dts | 5 + src/arm/imx6dl.dtsi | 189 +++++ src/arm/imx6q-ba16.dtsi | 2 +- src/arm/imx6q-cm-fx6.dts | 43 +- src/arm/imx6q-dmo-edmqmx6.dts | 4 +- src/arm/imx6q-evi.dts | 2 +- src/arm/imx6q-gw5400-a.dts | 7 +- src/arm/imx6q-gw560x.dts | 59 ++ src/arm/imx6q-novena.dts | 4 +- src/arm/imx6q-sabrelite.dts | 5 + src/arm/imx6q-sabresd.dts | 5 + src/arm/imx6q-utilite-pro.dts | 2 +- src/arm/imx6q-zii-rdu2.dts | 4 +- src/arm/imx6q.dtsi | 127 ++- src/arm/imx6qdl-apf6dev.dtsi | 2 +- src/arm/imx6qdl-aristainetos.dtsi | 2 +- src/arm/imx6qdl-aristainetos2.dtsi | 4 +- src/arm/imx6qdl-colibri.dtsi | 1 + src/arm/imx6qdl-gw53xx.dtsi | 5 - src/arm/imx6qdl-gw54xx.dtsi | 5 - src/arm/imx6qdl-gw560x.dtsi | 749 ++++++++++++++++++ src/arm/imx6qdl-microsom-ar8035.dtsi | 2 +- src/arm/imx6qdl-nitrogen6_max.dtsi | 2 +- src/arm/imx6qdl-nitrogen6_som2.dtsi | 6 +- src/arm/imx6qdl-nitrogen6x.dtsi | 2 +- src/arm/imx6qdl-phytec-pfla02.dtsi | 2 +- src/arm/imx6qdl-sabreauto.dtsi | 131 ++- src/arm/imx6qdl-sabrelite.dtsi | 152 +++- src/arm/imx6qdl-sabresd.dtsi | 116 ++- src/arm/imx6qdl-tx6.dtsi | 5 +- src/arm/imx6qdl-wandboard.dtsi | 3 +- src/arm/imx6qdl.dtsi | 60 +- src/arm/imx6qp-zii-rdu2.dts | 4 +- src/arm/imx6qp.dtsi | 4 + src/arm/imx6sl.dtsi | 3 + src/arm/imx6sx-nitrogen6sx.dts | 4 +- src/arm/imx6sx-sdb.dts | 8 + src/arm/imx6sx.dtsi | 3 + src/arm/imx6ul-opos6ul.dtsi | 2 +- src/arm/imx6ul-tx6ul-mainboard.dts | 2 +- src/arm/imx6ul-tx6ul.dtsi | 7 +- src/arm/imx6ul.dtsi | 1 + src/arm/imx7-colibri.dtsi | 2 +- src/arm/imx7d-nitrogen7.dts | 6 +- src/arm/imx7d-pico.dts | 403 ++++++++++ src/arm/imx7d-pinfunc.h | 6 +- src/arm/imx7d-sdb.dts | 133 +++- src/arm/imx7d.dtsi | 37 + src/arm/imx7s-warp.dts | 3 +- src/arm/imx7s.dtsi | 50 +- src/arm/keystone-k2g-evm.dts | 2 +- src/arm/keystone-k2g-ice.dts | 35 + src/arm/keystone-k2g.dtsi | 3 +- src/arm/kirkwood-openblocks_a6.dts | 2 +- src/arm/logicpd-torpedo-som.dtsi | 4 + src/arm/ls1021a.dtsi | 90 +-- src/arm/meson.dtsi | 217 +++-- src/arm/meson6-atv1200.dts | 2 +- src/arm/meson6.dtsi | 4 +- src/arm/meson8.dtsi | 256 ++++-- src/arm/meson8b.dtsi | 288 +++---- src/arm/motorola-cpcap-mapphone.dtsi | 16 + src/arm/moxart.dtsi | 3 +- src/arm/mt2701-evb.dts | 132 +++ src/arm/mt2701.dtsi | 179 ++++- src/arm/mt7623.dtsi | 546 ++++++++++++- src/arm/omap3-cm-t3x.dtsi | 2 +- src/arm/omap3-devkit8000-common.dtsi | 9 +- src/arm/omap3-evm-37xx.dts | 102 +++ src/arm/omap3-evm-common.dtsi | 34 +- src/arm/omap3-gta04.dtsi | 2 +- src/arm/omap3-overo-base.dtsi | 11 - src/arm/omap3-sb-t35.dtsi | 3 +- src/arm/omap3-tao3530.dtsi | 1 - src/arm/omap4-droid4-xt894.dts | 39 +- src/arm/omap4-duovero.dtsi | 4 + src/arm/omap4-var-som-om44.dtsi | 2 +- src/arm/omap4.dtsi | 22 +- src/arm/omap44xx-clocks.dtsi | 22 +- src/arm/omap5-cm-t54.dts | 2 +- src/arm/omap5-sbc-t54.dts | 2 +- src/arm/omap5-uevm.dts | 13 + src/arm/omap54xx-clocks.dtsi | 6 + src/arm/owl-s500-guitar-bb-rev-b.dts | 26 + src/arm/owl-s500-guitar.dtsi | 22 + src/arm/owl-s500.dtsi | 186 +++++ src/arm/pm9g45.dts | 89 ++- src/arm/pxa25x.dtsi | 8 +- src/arm/pxa27x.dtsi | 14 +- src/arm/qcom-apq8060-dragonboard.dts | 129 +++ src/arm/qcom-apq8064-arrow-sd-600eval.dts | 48 +- src/arm/qcom-apq8064-asus-nexus7-flo.dts | 20 +- src/arm/qcom-apq8064-cm-qs600.dts | 53 +- src/arm/qcom-apq8064-ifc6410.dts | 53 +- src/arm/qcom-apq8064-sony-xperia-yuga.dts | 16 +- src/arm/qcom-apq8064.dtsi | 154 ++-- src/arm/qcom-apq8074-dragonboard.dts | 20 + src/arm/qcom-ipq4019.dtsi | 4 +- src/arm/qcom-ipq8064.dtsi | 23 + src/arm/qcom-msm8660.dtsi | 84 ++ src/arm/qcom-msm8974-sony-xperia-honami.dts | 1 - src/arm/qcom-msm8974.dtsi | 54 +- src/arm/qcom-pm8941.dtsi | 36 +- src/arm/r7s72100-gr-peach.dts | 66 ++ src/arm/r7s72100.dtsi | 6 +- src/arm/r8a73a4.dtsi | 2 +- src/arm/r8a7740-armadillo800eva.dts | 2 + src/arm/r8a7740.dtsi | 2 +- src/arm/r8a7743-iwg20d-q7.dts | 25 + src/arm/r8a7743-iwg20m.dtsi | 29 + src/arm/r8a7778.dtsi | 2 +- src/arm/r8a7779.dtsi | 2 +- src/arm/r8a7790.dtsi | 18 +- src/arm/r8a7791.dtsi | 32 +- src/arm/r8a7793-gose.dts | 161 +++- src/arm/r8a7793.dtsi | 5 +- src/arm/r8a7794.dtsi | 16 +- src/arm/r8a77xx-aa104xd12-panel.dtsi | 3 +- src/arm/r8a77xx-aa121td01-panel.dtsi | 3 +- src/arm/rk3229-evb.dts | 74 ++ src/arm/rk322x.dtsi | 211 ++++- src/arm/rk3288-firefly-reload.dts | 17 + src/arm/rk3288-firefly.dtsi | 18 + src/arm/rk3288-rock2-som.dtsi | 5 + src/arm/rk3288-rock2-square.dts | 8 +- src/arm/rk3288-veyron.dtsi | 5 + src/arm/rk3288.dtsi | 43 + src/arm/{rk1108-evb.dts => rv1108-evb.dts} | 6 +- src/arm/{rk1108.dtsi => rv1108.dtsi} | 20 +- src/arm/sama5d2.dtsi | 117 +++ src/arm/sama5d3.dtsi | 131 ++- src/arm/sama5d3xcm.dtsi | 97 ++- src/arm/sama5d3xcm_cmp.dtsi | 77 +- src/arm/sama5d4.dtsi | 177 ++++- src/arm/sh73a0.dtsi | 2 +- src/arm/socfpga.dtsi | 4 +- src/arm/socfpga_arria10_socdk.dtsi | 2 +- src/arm/socfpga_cyclone5_de0_sockit.dts | 2 +- src/arm/socfpga_cyclone5_mcvevk.dts | 2 +- src/arm/socfpga_cyclone5_vining_fpga.dts | 101 +-- src/arm/stm32429i-eval.dts | 88 ++ src/arm/stm32f429-disco.dts | 4 + src/arm/stm32f429.dtsi | 121 ++- src/arm/stm32f746-disco.dts | 74 ++ src/arm/stm32f746.dtsi | 36 + src/arm/stm32f769-disco.dts | 74 ++ src/arm/stm32h743-pinctrl.dtsi | 13 + src/arm/stm32h743.dtsi | 8 + src/arm/stm32h743i-disco.dts | 73 ++ src/arm/sun4i-a10-a1000.dts | 2 +- src/arm/sun4i-a10-ba10-tvbox.dts | 2 +- src/arm/sun4i-a10-chuwi-v7-cw0825.dts | 2 +- src/arm/sun4i-a10-cubieboard.dts | 6 +- src/arm/sun4i-a10-dserve-dsrv9703c.dts | 2 +- src/arm/sun4i-a10-gemei-g9.dts | 2 +- src/arm/sun4i-a10-hackberry.dts | 2 +- src/arm/sun4i-a10-hyundai-a7hd.dts | 6 +- src/arm/sun4i-a10-inet1.dts | 2 +- src/arm/sun4i-a10-inet97fv2.dts | 2 +- src/arm/sun4i-a10-inet9f-rev03.dts | 2 +- src/arm/sun4i-a10-itead-iteaduino-plus.dts | 2 +- src/arm/sun4i-a10-jesurun-q5.dts | 2 +- src/arm/sun4i-a10-marsboard.dts | 2 +- src/arm/sun4i-a10-mini-xplus.dts | 2 +- src/arm/sun4i-a10-mk802.dts | 2 +- src/arm/sun4i-a10-mk802ii.dts | 2 +- src/arm/sun4i-a10-olinuxino-lime.dts | 2 +- src/arm/sun4i-a10-pcduino.dts | 2 +- src/arm/sun4i-a10-pov-protab2-ips9.dts | 2 +- src/arm/sun4i-a10.dtsi | 6 - src/arm/sun5i-a10s-auxtek-t003.dts | 8 - src/arm/sun5i-a10s-auxtek-t004.dts | 4 - src/arm/sun5i-a10s-olinuxino-micro.dts | 33 +- src/arm/sun5i-a10s-wobo-i5.dts | 4 - src/arm/sun5i-a10s.dtsi | 47 ++ src/arm/sun5i-a13-empire-electronix-d709.dts | 4 - src/arm/sun5i-a13-hsg-h702.dts | 5 - src/arm/sun5i-a13-olinuxino.dts | 4 - src/arm/sun5i-r8-chip.dts | 4 + src/arm/sun5i.dtsi | 10 + src/arm/sun6i-a31-hummingbird.dts | 10 +- src/arm/sun6i-a31.dtsi | 172 +++- src/arm/sun6i-a31s-primo81.dts | 20 +- src/arm/sun6i-a31s-sinovoip-bpi-m2.dts | 2 +- src/arm/sun7i-a20-bananapi-m1-plus.dts | 6 +- src/arm/sun7i-a20-bananapi.dts | 51 ++ src/arm/sun7i-a20-bananapro.dts | 2 +- src/arm/sun7i-a20-cubieboard2.dts | 14 +- src/arm/sun7i-a20-cubietruck.dts | 5 +- src/arm/sun7i-a20-hummingbird.dts | 2 +- src/arm/sun7i-a20-i12-tvbox.dts | 4 +- src/arm/sun7i-a20-icnova-swac.dts | 2 +- src/arm/sun7i-a20-itead-ibox.dts | 2 +- src/arm/sun7i-a20-lamobo-r1.dts | 8 - src/arm/sun7i-a20-m3.dts | 2 +- src/arm/sun7i-a20-mk808c.dts | 2 +- src/arm/sun7i-a20-olimex-som-evb.dts | 2 +- src/arm/sun7i-a20-olinuxino-lime.dts | 2 +- src/arm/sun7i-a20-olinuxino-lime2.dts | 2 +- src/arm/sun7i-a20-olinuxino-micro.dts | 2 +- src/arm/sun7i-a20-pcduino3-nano.dts | 2 +- src/arm/sun7i-a20-pcduino3.dts | 6 +- src/arm/sun7i-a20-wexler-tab7200.dts | 2 +- src/arm/sun7i-a20-wits-pro-a20-dkt.dts | 4 +- src/arm/sun7i-a20.dtsi | 9 +- src/arm/sun8i-a33-sinlinx-sina33.dts | 8 +- src/arm/sun8i-a33.dtsi | 30 +- src/arm/sun8i-a83t-allwinner-h8homlet-v2.dts | 2 +- src/arm/sun8i-a83t-cubietruck-plus.dts | 50 +- src/arm/sun8i-a83t.dtsi | 113 ++- src/arm/sun8i-h2-plus-orangepi-zero.dts | 14 +- src/arm/sun8i-h3-bananapi-m2-plus.dts | 36 +- src/arm/sun8i-h3-nanopi-m1-plus.dts | 64 ++ src/arm/sun8i-h3-orangepi-2.dts | 13 +- src/arm/sun8i-h3-orangepi-pc.dts | 24 +- src/arm/sun8i-h3-orangepi-plus.dts | 10 + src/arm/sun8i-h3-orangepi-plus2e.dts | 10 + src/arm/sun8i-v3s-licheepi-zero-dock.dts | 96 +++ src/arm/sun8i-v3s.dtsi | 183 ++++- src/arm/sunxi-common-regulators.dtsi | 30 - src/arm/sunxi-h3-h5.dtsi | 22 +- src/arm/tango4-vantage-1172.dts | 2 +- src/arm/tegra124-apalis-eval.dts | 2 +- src/arm/tegra124-apalis.dtsi | 2 +- src/arm/tegra124-jetson-tk1.dts | 2 +- src/arm/tegra124.dtsi | 4 +- src/arm/tegra20-harmony.dts | 2 +- src/arm/tegra20-tamonten.dtsi | 2 +- src/arm/tegra20-tec.dts | 2 +- src/arm/tegra20-trimslice.dts | 2 +- src/arm/tegra20-whistler.dts | 636 --------------- src/arm/tegra20.dtsi | 4 +- src/arm/tegra30-apalis-eval.dts | 2 +- src/arm/tegra30-apalis.dtsi | 2 +- src/arm/tegra30-beaver.dts | 2 +- src/arm/tegra30-cardhu.dtsi | 2 +- src/arm/tegra30.dtsi | 5 +- src/arm/tny_a9260_common.dtsi | 89 ++- src/arm/tny_a9263.dts | 89 ++- src/arm/twl4030.dtsi | 2 + src/arm/uniphier-ld4-ref.dts | 38 +- src/arm/uniphier-ld4.dtsi | 40 +- src/arm/uniphier-ld6b-ref.dts | 38 +- src/arm/uniphier-ld6b.dtsi | 38 +- src/arm/uniphier-pro4-ace.dts | 40 +- src/arm/uniphier-pro4-ref.dts | 38 +- src/arm/uniphier-pro4-sanji.dts | 40 +- src/arm/uniphier-pro4.dtsi | 40 +- src/arm/uniphier-pro5.dtsi | 34 +- src/arm/uniphier-pxs2-gentil.dts | 40 +- src/arm/uniphier-pxs2-vodka.dts | 38 +- src/arm/uniphier-pxs2.dtsi | 56 +- src/arm/uniphier-ref-daughter.dtsi | 38 +- src/arm/uniphier-sld3-ref.dts | 38 +- src/arm/uniphier-sld3.dtsi | 40 +- src/arm/uniphier-sld8-ref.dts | 38 +- src/arm/uniphier-sld8.dtsi | 40 +- src/arm/uniphier-support-card.dtsi | 42 +- src/arm/usb_a9260_common.dtsi | 89 ++- src/arm/usb_a9263.dts | 89 ++- src/arm/vf610-zii-dev-rev-b.dts | 2 + src/arm64/actions/s900-bubblegum-96.dts | 35 + src/arm64/actions/s900.dtsi | 164 ++++ .../allwinner/sun50i-a64-orangepi-win.dts | 95 +++ .../allwinner/sun50i-a64-pine64-plus.dts | 2 +- src/arm64/allwinner/sun50i-a64-pine64.dts | 41 + .../allwinner/sun50i-a64-sopine-baseboard.dts | 111 +++ src/arm64/allwinner/sun50i-a64-sopine.dtsi | 65 ++ src/arm64/allwinner/sun50i-a64.dtsi | 117 ++- src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts | 144 ++++ .../allwinner/sun50i-h5-orangepi-pc2.dts | 10 + .../allwinner/sun50i-h5-orangepi-prime.dts | 215 +++++ .../sun50i-h5-orangepi-zero-plus2.dts | 92 +++ src/arm64/allwinner/sun50i-h5.dtsi | 3 + src/arm64/amlogic/meson-gx-p23x-q20x.dtsi | 60 +- src/arm64/amlogic/meson-gx.dtsi | 13 +- src/arm64/amlogic/meson-gxbb-nanopi-k2.dts | 291 +++++++ src/arm64/amlogic/meson-gxbb-nexbox-a95x.dts | 52 +- src/arm64/amlogic/meson-gxbb-odroidc2.dts | 108 +-- src/arm64/amlogic/meson-gxbb-p20x.dtsi | 78 +- src/arm64/amlogic/meson-gxbb-vega-s95.dtsi | 56 +- src/arm64/amlogic/meson-gxbb-wetek-hub.dts | 6 +- src/arm64/amlogic/meson-gxbb-wetek-play2.dts | 40 + src/arm64/amlogic/meson-gxbb.dtsi | 220 +++-- src/arm64/amlogic/meson-gxl-s905d-p230.dts | 24 + .../amlogic/meson-gxl-s905x-khadas-vim.dts | 29 +- .../amlogic/meson-gxl-s905x-libretech-cc.dts | 171 ++++ .../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 52 +- src/arm64/amlogic/meson-gxl-s905x-p212.dts | 23 + src/arm64/amlogic/meson-gxl-s905x.dtsi | 2 +- src/arm64/amlogic/meson-gxl.dtsi | 127 ++- src/arm64/amlogic/meson-gxm-nexbox-a1.dts | 87 +- src/arm64/amlogic/meson-gxm-rbox-pro.dts | 240 ++++++ src/arm64/arm/juno-base.dtsi | 58 +- src/arm64/arm/juno-r1.dts | 24 + src/arm64/arm/juno-r2.dts | 24 + src/arm64/arm/juno.dts | 24 + src/arm64/broadcom/bcm2835-rpi.dtsi | 2 +- src/arm64/broadcom/bcm2837-rpi-3-b.dts | 17 + src/arm64/broadcom/bcm2837.dtsi | 4 + src/arm64/broadcom/bcm283x.dtsi | 27 + src/arm64/broadcom/ns2.dtsi | 14 + .../broadcom/stingray/bcm958742-base.dtsi | 131 +++ src/arm64/broadcom/stingray/bcm958742k.dts | 78 ++ src/arm64/broadcom/stingray/bcm958742t.dts | 40 + .../broadcom/stingray/stingray-clock.dtsi | 170 ++++ .../broadcom/stingray/stingray-pinctrl.dtsi | 345 ++++++++ src/arm64/broadcom/stingray/stingray.dtsi | 460 +++++++++++ src/arm64/exynos/exynos5433-tm2.dts | 1 - src/arm64/freescale/fsl-ls1012a-frdm.dts | 2 +- src/arm64/freescale/fsl-ls1012a-qds.dts | 10 +- src/arm64/freescale/fsl-ls1012a-rdb.dts | 15 +- src/arm64/freescale/fsl-ls1012a.dtsi | 39 +- src/arm64/freescale/fsl-ls1043-post.dtsi | 45 ++ src/arm64/freescale/fsl-ls1043a-qds.dts | 4 +- src/arm64/freescale/fsl-ls1043a-rdb.dts | 79 +- src/arm64/freescale/fsl-ls1043a.dtsi | 69 +- src/arm64/freescale/fsl-ls1046-post.dtsi | 48 ++ src/arm64/freescale/fsl-ls1046a-qds.dts | 4 +- src/arm64/freescale/fsl-ls1046a-rdb.dts | 70 +- src/arm64/freescale/fsl-ls1046a.dtsi | 75 +- src/arm64/freescale/fsl-ls1088a-qds.dts | 28 + src/arm64/freescale/fsl-ls1088a-rdb.dts | 20 + src/arm64/freescale/fsl-ls1088a.dtsi | 111 ++- src/arm64/freescale/fsl-ls2080a-qds.dts | 3 +- src/arm64/freescale/fsl-ls2080a-rdb.dts | 3 +- src/arm64/freescale/fsl-ls2080a-simu.dts | 2 +- src/arm64/freescale/fsl-ls2080a.dtsi | 2 +- src/arm64/freescale/fsl-ls2088a-qds.dts | 3 +- src/arm64/freescale/fsl-ls2088a-rdb.dts | 3 +- src/arm64/freescale/fsl-ls2088a.dtsi | 3 +- src/arm64/freescale/fsl-ls208xa-qds.dtsi | 4 +- src/arm64/freescale/fsl-ls208xa-rdb.dtsi | 3 +- src/arm64/freescale/fsl-ls208xa.dtsi | 5 +- src/arm64/freescale/qoriq-bman-portals.dtsi | 71 ++ src/arm64/freescale/qoriq-fman3-0-10g-0.dtsi | 42 + src/arm64/freescale/qoriq-fman3-0-10g-1.dtsi | 42 + src/arm64/freescale/qoriq-fman3-0-1g-0.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0-1g-1.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0-1g-2.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0-1g-3.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0-1g-4.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0-1g-5.dtsi | 41 + src/arm64/freescale/qoriq-fman3-0.dtsi | 81 ++ src/arm64/freescale/qoriq-qman-portals.dtsi | 80 ++ src/arm64/hisilicon/hi3660-hikey960.dts | 217 ++++- src/arm64/hisilicon/hi3660.dtsi | 706 ++++++++++++++++- src/arm64/hisilicon/hi6220-hikey.dts | 36 +- src/arm64/hisilicon/hi6220.dtsi | 90 +++ src/arm64/hisilicon/hikey960-pinctrl.dtsi | 730 ++++++++++++++++- src/arm64/marvell/armada-3720-db.dts | 122 +-- src/arm64/marvell/armada-37xx.dtsi | 39 +- src/arm64/marvell/armada-7020.dtsi | 2 +- src/arm64/marvell/armada-7040-db.dts | 6 +- src/arm64/marvell/armada-7040.dtsi | 2 +- src/arm64/marvell/armada-70x0.dtsi | 68 ++ src/arm64/marvell/armada-8020.dtsi | 3 +- src/arm64/marvell/armada-8040-db.dts | 24 +- src/arm64/marvell/armada-8040-mcbin.dts | 42 + src/arm64/marvell/armada-8040.dtsi | 3 +- src/arm64/marvell/armada-80x0.dtsi | 76 ++ src/arm64/marvell/armada-ap806.dtsi | 48 +- src/arm64/marvell/armada-cp110-master.dtsi | 146 ++-- src/arm64/marvell/armada-cp110-slave.dtsi | 149 ++-- src/arm64/mediatek/mt6797-evb.dts | 36 + src/arm64/mediatek/mt6797.dtsi | 244 ++++++ src/arm64/mediatek/mt8173.dtsi | 153 ++-- src/arm64/nvidia/tegra132.dtsi | 4 +- src/arm64/nvidia/tegra186.dtsi | 7 + src/arm64/nvidia/tegra210-p2371-2180.dts | 2 +- src/arm64/nvidia/tegra210.dtsi | 4 +- src/arm64/qcom/apq8016-sbc.dtsi | 36 +- src/arm64/qcom/msm8916.dtsi | 94 ++- src/arm64/qcom/msm8992.dtsi | 53 ++ src/arm64/qcom/msm8996.dtsi | 6 + src/arm64/realtek/rtd1295-zidoo-x9s.dts | 42 + src/arm64/realtek/rtd1295.dtsi | 131 +++ src/arm64/renesas/r8a7795-es1-h3ulcb.dts | 42 + src/arm64/renesas/r8a7795-es1-salvator-x.dts | 115 +++ src/arm64/renesas/r8a7795-es1.dtsi | 84 ++ src/arm64/renesas/r8a7795-h3ulcb.dts | 342 +------- src/arm64/renesas/r8a7795-salvator-x.dts | 579 ++------------ src/arm64/renesas/r8a7795-salvator-xs.dts | 109 +++ src/arm64/renesas/r8a7795.dtsi | 133 ++-- src/arm64/renesas/r8a7796-m3ulcb.dts | 168 +--- src/arm64/renesas/r8a7796-salvator-x.dts | 244 +----- src/arm64/renesas/r8a7796.dtsi | 421 ++++++++++ src/arm64/renesas/salvator-common.dtsi | 629 +++++++++++++++ src/arm64/renesas/salvator-x.dtsi | 30 + src/arm64/renesas/salvator-xs.dtsi | 20 + src/arm64/renesas/ulcb.dtsi | 367 +++++++++ src/arm64/rockchip/rk3328.dtsi | 33 + src/arm64/rockchip/rk3399-firefly.dts | 718 +++++++++++++++++ src/arm64/rockchip/rk3399-gru.dtsi | 2 +- src/arm64/rockchip/rk3399-op1-opp.dtsi | 145 ++++ src/arm64/rockchip/rk3399-opp.dtsi | 18 +- src/arm64/rockchip/rk3399.dtsi | 165 +++- src/arm64/socionext/uniphier-ld11-global.dts | 70 ++ src/arm64/socionext/uniphier-ld11-ref.dts | 38 +- src/arm64/socionext/uniphier-ld11.dtsi | 61 +- src/arm64/socionext/uniphier-ld20-global.dts | 52 ++ src/arm64/socionext/uniphier-ld20-ref.dts | 38 +- src/arm64/socionext/uniphier-ld20.dtsi | 79 +- .../socionext/uniphier-ref-daughter.dtsi | 38 +- .../socionext/uniphier-support-card.dtsi | 42 +- src/arm64/zte/zx296718.dtsi | 10 +- src/mips/img/boston.dts | 224 ++++++ src/mips/ingenic/ci20.dts | 60 ++ src/mips/ingenic/jz4740.dtsi | 68 ++ src/mips/ingenic/jz4780.dtsi | 98 +++ src/mips/ingenic/qi_lb60.dts | 13 + src/mips/mti/sead3.dts | 24 +- src/powerpc/ac14xx.dts | 2 +- src/powerpc/digsy_mtc.dts | 2 +- src/powerpc/fsl/b4qds.dtsi | 8 +- src/powerpc/fsl/c293pcie.dts | 2 +- src/powerpc/fsl/kmcent2.dts | 4 +- src/powerpc/fsl/p1010rdb.dtsi | 2 +- src/powerpc/fsl/p1023rdb.dts | 2 +- src/powerpc/fsl/p2041rdb.dts | 4 +- src/powerpc/fsl/p3041ds.dts | 4 +- src/powerpc/fsl/p4080ds.dts | 4 +- src/powerpc/fsl/p5020ds.dts | 4 +- src/powerpc/fsl/p5040ds.dts | 4 +- src/powerpc/fsl/t208xqds.dtsi | 8 +- src/powerpc/fsl/t4240qds.dts | 12 +- src/powerpc/fsl/t4240rdb.dts | 6 +- src/powerpc/fsp2.dts | 608 ++++++++++++++ src/powerpc/mpc5121ads.dts | 4 +- src/powerpc/mpc8308_p1m.dts | 2 +- src/powerpc/mpc8349emitx.dts | 4 +- src/powerpc/mpc8377_rdb.dts | 2 +- src/powerpc/mpc8377_wlan.dts | 2 +- src/powerpc/mpc8378_rdb.dts | 2 +- src/powerpc/mpc8379_rdb.dts | 2 +- src/powerpc/pcm030.dts | 2 +- src/powerpc/pcm032.dts | 2 +- src/powerpc/pdm360ng.dts | 2 +- src/powerpc/sequoia.dts | 2 +- src/powerpc/warp.dts | 2 +- 885 files changed, 30770 insertions(+), 7130 deletions(-) delete mode 100644 .gitignore create mode 100644 Bindings/arm/actions.txt create mode 100644 Bindings/arm/bcm/brcm,stingray.txt create mode 100644 Bindings/arm/coresight-cpu-debug.txt create mode 100644 Bindings/arm/realtek.txt create mode 100644 Bindings/ata/cortina,gemini-sata-bridge.txt create mode 100644 Bindings/ata/faraday,ftide010.txt create mode 100644 Bindings/clock/img,boston-clock.txt create mode 100644 Bindings/clock/rockchip,rk3128-cru.txt create mode 100644 Bindings/clock/sun8i-de2.txt create mode 100644 Bindings/clock/ti,sci-clk.txt create mode 100644 Bindings/clock/ti-clkctrl.txt create mode 100644 Bindings/crypto/inside-secure-safexcel.txt create mode 100644 Bindings/display/panel/auo,p320hvn03.txt create mode 100644 Bindings/display/panel/innolux,p079zca.txt create mode 100644 Bindings/display/panel/nec,nl12880b20-05.txt create mode 100644 Bindings/display/panel/nlt,nl192108ac18-02d.txt create mode 100644 Bindings/display/st,stm32-ltdc.txt create mode 100644 Bindings/dma/brcm,iproc-sba.txt create mode 100644 Bindings/fsi/fsi-master-gpio.txt create mode 100644 Bindings/gpio/gpio-exar.txt create mode 100644 Bindings/gpio/ingenic,gpio.txt create mode 100644 Bindings/gpu/arm,mali-midgard.txt create mode 100644 Bindings/hwlock/sprd-hwspinlock.txt create mode 100644 Bindings/i2c/i2c-aspeed.txt rename Bindings/i2c/{i2c-mt6577.txt => i2c-mtk.txt} (77%) create mode 100644 Bindings/i2c/i2c-mux-gpmux.txt create mode 100644 Bindings/i2c/i2c-pca-platform.txt create mode 100644 Bindings/i2c/i2c-zx2967.txt create mode 100644 Bindings/iio/adc/ti-adc084s021.txt create mode 100644 Bindings/iio/adc/ti-adc108s102.txt create mode 100644 Bindings/iio/multiplexer/io-channel-mux.txt create mode 100644 Bindings/input/dlink,dir685-touchkeys.txt create mode 100644 Bindings/input/touchscreen/st,stmfts.txt create mode 100644 Bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt create mode 100644 Bindings/interrupt-controller/marvell,gicp.txt create mode 100644 Bindings/interrupt-controller/marvell,icu.txt create mode 100644 Bindings/mailbox/qcom,apcs-kpss-global.txt create mode 100644 Bindings/media/cec.txt create mode 100644 Bindings/media/i2c/max2175.txt create mode 100644 Bindings/media/i2c/ov5640.txt create mode 100644 Bindings/media/imx.txt create mode 100644 Bindings/media/qcom,venus.txt create mode 100644 Bindings/media/renesas,drif.txt create mode 100644 Bindings/media/st,stm32-cec.txt create mode 100644 Bindings/media/st,stm32-dcmi.txt create mode 100644 Bindings/media/video-mux.txt create mode 100644 Bindings/mfd/lp87565.txt create mode 100644 Bindings/misc/allwinner,syscon.txt create mode 100644 Bindings/mtd/microchip,mchp23k256.txt create mode 100644 Bindings/mux/adi,adg792a.txt create mode 100644 Bindings/mux/gpio-mux.txt create mode 100644 Bindings/mux/mmio-mux.txt create mode 100644 Bindings/mux/mux-controller.txt delete mode 100644 Bindings/net/brcm,bgmac-nsp.txt create mode 100644 Bindings/net/cortina.txt create mode 100644 Bindings/net/dsa/ksz.txt rename Bindings/{powerpc/fsl/fman.txt => net/fsl-fman.txt} (100%) create mode 100644 Bindings/net/qca,qca7000.txt delete mode 100644 Bindings/net/qca-qca7000-spi.txt create mode 100644 Bindings/pci/kirin-pcie.txt create mode 100644 Bindings/pci/mediatek,mt7623-pcie.txt create mode 100644 Bindings/pci/tango-pcie.txt create mode 100644 Bindings/phy/brcm,ns2-drd-phy.txt create mode 100644 Bindings/phy/meson-gxl-usb2-phy.txt create mode 100644 Bindings/phy/phy-cpcap-usb.txt create mode 100644 Bindings/phy/rcar-gen3-phy-usb3.txt create mode 100644 Bindings/pinctrl/ingenic,pinctrl.txt create mode 100644 Bindings/pinctrl/pinctrl-zx.txt create mode 100644 Bindings/pinctrl/qcom,ipq8074-pinctrl.txt create mode 100644 Bindings/pinctrl/renesas,rza1-pinctrl.txt create mode 100644 Bindings/power/actions,owl-sps.txt create mode 100644 Bindings/power/supply/battery.txt create mode 100644 Bindings/power/supply/cpcap-battery.txt create mode 100644 Bindings/power/supply/ltc3651-charger.txt rename Bindings/power/{ => supply}/max8903-charger.txt (100%) rename Bindings/{power_supply => power/supply}/maxim,max14656.txt (100%) create mode 100644 Bindings/ptp/brcm,ptp-dte.txt create mode 100644 Bindings/remoteproc/ti,keystone-rproc.txt create mode 100644 Bindings/reset/ti,sci-reset.txt create mode 100644 Bindings/rtc/brcm,brcmstb-waketimer.txt delete mode 100644 Bindings/rtc/cortina,gemini.txt create mode 100644 Bindings/rtc/faraday,ftrtc010.txt create mode 100644 Bindings/serial/actions,owl-uart.txt create mode 100644 Bindings/serial/amlogic,meson-uart.txt create mode 100644 Bindings/soc/qcom/qcom,glink.txt create mode 100644 Bindings/sound/audio-graph-card.txt create mode 100644 Bindings/sound/audio-graph-scu-card.txt create mode 100644 Bindings/sound/rockchip,pdm.txt create mode 100644 Bindings/sound/st,stm32-i2s.txt create mode 100644 Bindings/sound/st,stm32-spdifrx.txt create mode 100644 Bindings/sound/zte,zx-aud96p22.txt create mode 100644 Bindings/spi/spi-stm32.txt rename Bindings/thermal/{brcm,ns-thermal => brcm,ns-thermal.txt} (100%) create mode 100644 Bindings/timer/actions,owl-timer.txt delete mode 100644 Bindings/timer/moxa,moxart-timer.txt create mode 100644 Bindings/usb/iproc-udc.txt create mode 100644 Bindings/watchdog/da9062-wdt.txt create mode 100644 Bindings/watchdog/st,stm32-iwdg.txt create mode 100644 Bindings/watchdog/uniphier-wdt.txt create mode 100644 include/dt-bindings/clock/bcm-sr.h create mode 100644 include/dt-bindings/clock/boston-clock.h create mode 100644 include/dt-bindings/clock/cortina,gemini-clock.h create mode 100644 include/dt-bindings/clock/omap4.h create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq8074.h create mode 100644 include/dt-bindings/clock/r8a7790-cpg-mssr.h create mode 100644 include/dt-bindings/clock/r8a7791-cpg-mssr.h create mode 100644 include/dt-bindings/clock/r8a7792-cpg-mssr.h create mode 100644 include/dt-bindings/clock/r8a7793-cpg-mssr.h create mode 100644 include/dt-bindings/clock/r8a7794-cpg-mssr.h create mode 100644 include/dt-bindings/clock/rk3128-cru.h create mode 100644 include/dt-bindings/clock/sun8i-a83t-ccu.h create mode 100644 include/dt-bindings/clock/sun8i-de2.h create mode 100644 include/dt-bindings/interrupt-controller/mvebu-icu.h create mode 100644 include/dt-bindings/mux/mux.h create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-stingray.h create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h create mode 100644 include/dt-bindings/power/mt6797-power.h create mode 100644 include/dt-bindings/power/owl-s500-powergate.h create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h create mode 100644 include/dt-bindings/reset/cortina,gemini-reset.h create mode 100644 include/dt-bindings/reset/sun8i-a83t-ccu.h create mode 100644 include/dt-bindings/reset/sun8i-de2.h create mode 100644 src/arm/am335x-boneblue.dts create mode 100644 src/arm/armada-385-linksys-rango.dts create mode 100644 src/arm/bcm2837-rpi-3-b.dts create mode 100644 src/arm/bcm283x-rpi-usb-otg.dtsi create mode 100644 src/arm/imx6dl-gw560x.dts create mode 100644 src/arm/imx6q-gw560x.dts create mode 100644 src/arm/imx6qdl-gw560x.dtsi create mode 100644 src/arm/imx7d-pico.dts create mode 100644 src/arm/keystone-k2g-ice.dts create mode 100644 src/arm/owl-s500-guitar-bb-rev-b.dts create mode 100644 src/arm/owl-s500-guitar.dtsi create mode 100644 src/arm/owl-s500.dtsi create mode 100644 src/arm/r7s72100-gr-peach.dts create mode 100644 src/arm/r8a7743-iwg20d-q7.dts create mode 100644 src/arm/r8a7743-iwg20m.dtsi rename src/arm/{rk1108-evb.dts => rv1108-evb.dts} (94%) rename src/arm/{rk1108.dtsi => rv1108.dtsi} (95%) create mode 100644 src/arm/stm32f746-disco.dts create mode 100644 src/arm/stm32f769-disco.dts create mode 100644 src/arm/stm32h743i-disco.dts create mode 100644 src/arm/sun8i-h3-nanopi-m1-plus.dts create mode 100644 src/arm/sun8i-v3s-licheepi-zero-dock.dts delete mode 100644 src/arm/tegra20-whistler.dts create mode 100644 src/arm64/actions/s900-bubblegum-96.dts create mode 100644 src/arm64/actions/s900.dtsi create mode 100644 src/arm64/allwinner/sun50i-a64-orangepi-win.dts create mode 100644 src/arm64/allwinner/sun50i-a64-sopine-baseboard.dts create mode 100644 src/arm64/allwinner/sun50i-a64-sopine.dtsi create mode 100644 src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts create mode 100644 src/arm64/allwinner/sun50i-h5-orangepi-prime.dts create mode 100644 src/arm64/allwinner/sun50i-h5-orangepi-zero-plus2.dts create mode 100644 src/arm64/amlogic/meson-gxbb-nanopi-k2.dts create mode 100644 src/arm64/amlogic/meson-gxl-s905x-libretech-cc.dts create mode 100644 src/arm64/amlogic/meson-gxm-rbox-pro.dts create mode 100644 src/arm64/broadcom/stingray/bcm958742-base.dtsi create mode 100644 src/arm64/broadcom/stingray/bcm958742k.dts create mode 100644 src/arm64/broadcom/stingray/bcm958742t.dts create mode 100644 src/arm64/broadcom/stingray/stingray-clock.dtsi create mode 100644 src/arm64/broadcom/stingray/stingray-pinctrl.dtsi create mode 100644 src/arm64/broadcom/stingray/stingray.dtsi create mode 100644 src/arm64/freescale/fsl-ls1043-post.dtsi create mode 100644 src/arm64/freescale/fsl-ls1046-post.dtsi create mode 100644 src/arm64/freescale/qoriq-bman-portals.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-10g-0.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-10g-1.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-0.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-1.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-2.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-3.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-4.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0-1g-5.dtsi create mode 100644 src/arm64/freescale/qoriq-fman3-0.dtsi create mode 100644 src/arm64/freescale/qoriq-qman-portals.dtsi create mode 100644 src/arm64/marvell/armada-70x0.dtsi create mode 100644 src/arm64/marvell/armada-80x0.dtsi create mode 100644 src/arm64/mediatek/mt6797-evb.dts create mode 100644 src/arm64/mediatek/mt6797.dtsi create mode 100644 src/arm64/realtek/rtd1295-zidoo-x9s.dts create mode 100644 src/arm64/realtek/rtd1295.dtsi create mode 100644 src/arm64/renesas/r8a7795-es1-h3ulcb.dts create mode 100644 src/arm64/renesas/r8a7795-es1-salvator-x.dts create mode 100644 src/arm64/renesas/r8a7795-es1.dtsi create mode 100644 src/arm64/renesas/r8a7795-salvator-xs.dts create mode 100644 src/arm64/renesas/salvator-common.dtsi create mode 100644 src/arm64/renesas/salvator-x.dtsi create mode 100644 src/arm64/renesas/salvator-xs.dtsi create mode 100644 src/arm64/renesas/ulcb.dtsi create mode 100644 src/arm64/rockchip/rk3399-firefly.dts create mode 100644 src/arm64/rockchip/rk3399-op1-opp.dtsi create mode 100644 src/arm64/socionext/uniphier-ld11-global.dts create mode 100644 src/arm64/socionext/uniphier-ld20-global.dts create mode 100644 src/mips/img/boston.dts create mode 100644 src/powerpc/fsp2.dts diff --git a/.gitignore b/.gitignore deleted file mode 100644 index 5023c8e066cb..000000000000 --- a/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -.* -!.gitignore -*.dtb - diff --git a/Bindings/arm/actions.txt b/Bindings/arm/actions.txt new file mode 100644 index 000000000000..3bc7ea575564 --- /dev/null +++ b/Bindings/arm/actions.txt @@ -0,0 +1,39 @@ +Actions Semi platforms device tree bindings +------------------------------------------- + + +S500 SoC +======== + +Required root node properties: + + - compatible : must contain "actions,s500" + + +Modules: + +Root node property compatible must contain, depending on module: + + - LeMaker Guitar: "lemaker,guitar" + + +Boards: + +Root node property compatible must contain, depending on board: + + - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar" + + +S900 SoC +======== + +Required root node properties: + +- compatible : must contain "actions,s900" + + +Boards: + +Root node property compatible must contain, depending on board: + + - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96" diff --git a/Bindings/arm/amlogic.txt b/Bindings/arm/amlogic.txt index bfd5b558477d..0fff40a6330d 100644 --- a/Bindings/arm/amlogic.txt +++ b/Bindings/arm/amlogic.txt @@ -29,26 +29,35 @@ Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: Required root node property: compatible: "amlogic,s912", "amlogic,meson-gxm"; -Board compatible values: +Board compatible values (alphabetically, grouped by SoC): + - "geniatech,atv1200" (Meson6) + - "minix,neo-x8" (Meson8) - - "tronfy,mxq" (Meson8b) + - "hardkernel,odroid-c1" (Meson8b) + - "tronfy,mxq" (Meson8b) + + - "amlogic,p200" (Meson gxbb) + - "amlogic,p201" (Meson gxbb) + - "friendlyarm,nanopi-k2" (Meson gxbb) + - "hardkernel,odroid-c2" (Meson gxbb) + - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb) - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb) - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb) - - "hardkernel,odroid-c2" (Meson gxbb) - - "amlogic,p200" (Meson gxbb) - - "amlogic,p201" (Meson gxbb) - "wetek,hub" (Meson gxbb) - "wetek,play2" (Meson gxbb) + - "amlogic,p212" (Meson gxl s905x) + - "hwacom,amazetv" (Meson gxl s905x) - "khadas,vim" (Meson gxl s905x) + - "libretech,cc" (Meson gxl s905x) - "amlogic,p230" (Meson gxl s905d) - "amlogic,p231" (Meson gxl s905d) - - "hwacom,amazetv" (Meson gxl s905x) + - "amlogic,q200" (Meson gxm s912) - "amlogic,q201" (Meson gxm s912) - - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) + - "kingnovel,r-box-pro" (Meson gxm S912) - "nexbox,a1" (Meson gxm s912) diff --git a/Bindings/arm/atmel-at91.txt b/Bindings/arm/atmel-at91.txt index 799af90dd75b..91cb8e4f2a4f 100644 --- a/Bindings/arm/atmel-at91.txt +++ b/Bindings/arm/atmel-at91.txt @@ -41,6 +41,36 @@ compatible: must be one of: - "atmel,sama5d43" - "atmel,sama5d44" + * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific + SoC family: + o "atmel,sams70" shall be extended with the specific MCU compatible: + - "atmel,sams70j19" + - "atmel,sams70j20" + - "atmel,sams70j21" + - "atmel,sams70n19" + - "atmel,sams70n20" + - "atmel,sams70n21" + - "atmel,sams70q19" + - "atmel,sams70q20" + - "atmel,sams70q21" + o "atmel,samv70" shall be extended with the specific MCU compatible: + - "atmel,samv70j19" + - "atmel,samv70j20" + - "atmel,samv70n19" + - "atmel,samv70n20" + - "atmel,samv70q19" + - "atmel,samv70q20" + o "atmel,samv71" shall be extended with the specific MCU compatible: + - "atmel,samv71j19" + - "atmel,samv71j20" + - "atmel,samv71j21" + - "atmel,samv71n19" + - "atmel,samv71n20" + - "atmel,samv71n21" + - "atmel,samv71q19" + - "atmel,samv71q20" + - "atmel,samv71q21" + Chipid required properties: - compatible: Should be "atmel,sama5d2-chipid" - reg : Should contain registers location and length diff --git a/Bindings/arm/bcm/brcm,stingray.txt b/Bindings/arm/bcm/brcm,stingray.txt new file mode 100644 index 000000000000..23a02178dd44 --- /dev/null +++ b/Bindings/arm/bcm/brcm,stingray.txt @@ -0,0 +1,12 @@ +Broadcom Stingray device tree bindings +------------------------------------------------ + +Boards with Stingray shall have the following properties: + +Required root node property: + +Stingray Combo SVK board +compatible = "brcm,bcm958742k", "brcm,stingray"; + +Stingray SST100 board +compatible = "brcm,bcm958742t", "brcm,stingray"; diff --git a/Bindings/arm/cci.txt b/Bindings/arm/cci.txt index 0f2153e8fa7e..9600761f2d5b 100644 --- a/Bindings/arm/cci.txt +++ b/Bindings/arm/cci.txt @@ -11,13 +11,6 @@ clusters, through memory mapped interface, with a global control register space and multiple sets of interface control registers, one per slave interface. -Bindings for the CCI node follow the ePAPR standard, available from: - -www.power.org/documentation/epapr-version-1-1/ - -with the addition of the bindings described in this document which are -specific to ARM. - * CCI interconnect node Description: Describes a CCI cache coherent Interconnect component @@ -50,10 +43,10 @@ specific to ARM. as a tuple of cells, containing child address, parent address and the size of the region in the child address space. - Definition: A standard property. Follow rules in the ePAPR for - hierarchical bus addressing. CCI interfaces - addresses refer to the parent node addressing - scheme to declare their register bases. + Definition: A standard property. Follow rules in the Devicetree + Specification for hierarchical bus addressing. CCI + interfaces addresses refer to the parent node + addressing scheme to declare their register bases. CCI interconnect node can define the following child nodes: diff --git a/Bindings/arm/ccn.txt b/Bindings/arm/ccn.txt index b100d3847d88..29801456c9ee 100644 --- a/Bindings/arm/ccn.txt +++ b/Bindings/arm/ccn.txt @@ -3,6 +3,7 @@ Required properties: - compatible: (standard compatible string) should be one of: + "arm,ccn-502" "arm,ccn-504" "arm,ccn-508" diff --git a/Bindings/arm/coresight-cpu-debug.txt b/Bindings/arm/coresight-cpu-debug.txt new file mode 100644 index 000000000000..298291211ea4 --- /dev/null +++ b/Bindings/arm/coresight-cpu-debug.txt @@ -0,0 +1,49 @@ +* CoreSight CPU Debug Component: + +CoreSight CPU debug component are compliant with the ARMv8 architecture +reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The +external debug module is mainly used for two modes: self-hosted debug and +external debug, and it can be accessed from mmio region from Coresight +and eventually the debug module connects with CPU for debugging. And the +debug module provides sample-based profiling extension, which can be used +to sample CPU program counter, secure state and exception level, etc; +usually every CPU has one dedicated debug module to be connected. + +Required properties: + +- compatible : should be "arm,coresight-cpu-debug"; supplemented with + "arm,primecell" since this driver is using the AMBA bus + interface. + +- reg : physical base address and length of the register set. + +- clocks : the clock associated to this component. + +- clock-names : the name of the clock referenced by the code. Since we are + using the AMBA framework, the name of the clock providing + the interconnect should be "apb_pclk" and the clock is + mandatory. The interface between the debug logic and the + processor core is clocked by the internal CPU clock, so it + is enabled with CPU clock by default. + +- cpu : the CPU phandle the debug module is affined to. When omitted + the module is considered to belong to CPU0. + +Optional properties: + +- power-domains: a phandle to the debug power domain. We use "power-domains" + binding to turn on the debug logic if it has own dedicated + power domain and if necessary to use "cpuidle.off=1" or + "nohlt" in the kernel command line or sysfs node to + constrain idle states to ensure registers in the CPU power + domain are accessible. + +Example: + + debug@f6590000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6590000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; diff --git a/Bindings/arm/cpus.txt b/Bindings/arm/cpus.txt index 1030f5f50207..a44253cad269 100644 --- a/Bindings/arm/cpus.txt +++ b/Bindings/arm/cpus.txt @@ -6,9 +6,9 @@ The device tree allows to describe the layout of CPUs in a system through the "cpus" node, which in turn contains a number of subnodes (ie "cpu") defining properties for every cpu. -Bindings for CPU nodes follow the ePAPR v1.1 standard, available from: +Bindings for CPU nodes follow the Devicetree Specification, available from: -https://www.power.org/documentation/epapr-version-1-1/ +https://www.devicetree.org/specifications/ with updates for 32-bit and 64-bit ARM systems provided in this document. @@ -16,8 +16,8 @@ with updates for 32-bit and 64-bit ARM systems provided in this document. Convention used in this document ================================ -This document follows the conventions described in the ePAPR v1.1, with -the addition: +This document follows the conventions described in the Devicetree +Specification, with the addition: - square brackets define bitfields, eg reg[7:0] value of the bitfield in the reg property contained in bits 7 down to 0 @@ -26,8 +26,9 @@ the addition: cpus and cpu node bindings definition ===================================== -The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu -nodes to be present and contain the properties described below. +The ARM architecture, in accordance with the Devicetree Specification, +requires the cpus and cpu nodes to be present and contain the properties +described below. - cpus node @@ -193,6 +194,7 @@ nodes to be present and contain the properties described below. "spin-table" # On ARM 32-bit systems this property is optional and can be one of: + "actions,s500-smp" "allwinner,sun6i-a31" "allwinner,sun8i-a23" "arm,realview-smp" @@ -249,7 +251,7 @@ nodes to be present and contain the properties described below. Usage: Optional Value type: Definition: - # u32 value representing CPU capacity [3] in + # u32 value representing CPU capacity [4] in DMIPS/MHz, relative to highest capacity-dmips-mhz in the system. @@ -476,5 +478,5 @@ cpus { [2] arm/msm/qcom,kpss-acc.txt [3] ARM Linux kernel documentation - idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt -[3] ARM Linux kernel documentation - cpu capacity bindings +[4] ARM Linux kernel documentation - cpu capacity bindings Documentation/devicetree/bindings/arm/cpu-capacity.txt diff --git a/Bindings/arm/gemini.txt b/Bindings/arm/gemini.txt index 0041eb031116..55bf7ce96c44 100644 --- a/Bindings/arm/gemini.txt +++ b/Bindings/arm/gemini.txt @@ -24,6 +24,19 @@ Required nodes: global control registers, with the compatible string "cortina,gemini-syscon", "syscon"; + Required properties on the syscon: + - reg: syscon register location and size. + - #clock-cells: should be set to <1> - the system controller is also a + clock provider. + - #reset-cells: should be set to <1> - the system controller is also a + reset line provider. + + The clock sources have shorthand defines in the include file: + + + The reset lines have shorthand defines in the include file: + + - timer: the soc bus node must have a timer node pointing to the SoC timer block, with the compatible string "cortina,gemini-timer" See: clocksource/cortina,gemini-timer.txt @@ -56,12 +69,15 @@ Example: syscon: syscon@40000000 { compatible = "cortina,gemini-syscon", "syscon"; reg = <0x40000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; }; uart0: serial@42000000 { compatible = "ns16550a"; reg = <0x42000000 0x100>; - clock-frequency = <48000000>; + resets = <&syscon GEMINI_RESET_UART>; + clocks = <&syscon GEMINI_CLK_UART>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; }; @@ -73,12 +89,18 @@ Example: interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */ <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */ <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */ + resets = <&syscon GEMINI_RESET_TIMER>; + /* APB clock or RTC clock */ + clocks = <&syscon GEMINI_CLK_APB>, + <&syscon GEMINI_CLK_RTC>; + clock-names = "PCLK", "EXTCLK"; syscon = <&syscon>; }; intcon: interrupt-controller@48000000 { compatible = "cortina,gemini-interrupt-controller"; reg = <0x48000000 0x1000>; + resets = <&syscon GEMINI_RESET_INTCON0>; interrupt-controller; #interrupt-cells = <2>; }; diff --git a/Bindings/arm/hisilicon/hisilicon.txt b/Bindings/arm/hisilicon/hisilicon.txt index 2e732152064b..7111fbc82a4e 100644 --- a/Bindings/arm/hisilicon/hisilicon.txt +++ b/Bindings/arm/hisilicon/hisilicon.txt @@ -4,6 +4,10 @@ Hi3660 SoC Required root node properties: - compatible = "hisilicon,hi3660"; +HiKey960 Board +Required root node properties: + - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; + Hi3798cv200 SoC Required root node properties: - compatible = "hisilicon,hi3798cv200"; diff --git a/Bindings/arm/idle-states.txt b/Bindings/arm/idle-states.txt index b8e41c148a3c..7a591333f2b1 100644 --- a/Bindings/arm/idle-states.txt +++ b/Bindings/arm/idle-states.txt @@ -695,5 +695,5 @@ cpus { [4] ARM Architecture Reference Manuals http://infocenter.arm.com/help/index.jsp -[5] ePAPR standard - https://www.power.org/documentation/epapr-version-1-1/ +[5] Devicetree Specification + https://www.devicetree.org/specifications/ diff --git a/Bindings/arm/keystone/keystone.txt b/Bindings/arm/keystone/keystone.txt index 48f6703a28c8..f310bad04483 100644 --- a/Bindings/arm/keystone/keystone.txt +++ b/Bindings/arm/keystone/keystone.txt @@ -37,3 +37,6 @@ Boards: - K2G EVM compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone" + +- K2G Industrial Communication Engine EVM + compatible = "ti,k2g-ice", "ti,k2g", "ti-keystone" diff --git a/Bindings/arm/l2c2x0.txt b/Bindings/arm/l2c2x0.txt index d9650c1788f4..fbe6cb21f4cf 100644 --- a/Bindings/arm/l2c2x0.txt +++ b/Bindings/arm/l2c2x0.txt @@ -4,8 +4,8 @@ ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/PL220/ PL310 and variants) based level 2 cache controller. All these various implementations of the L2 cache controller have compatible programming models (Note 1). Some of the properties that are just prefixed "cache-*" are taken from section -3.7.3 of the ePAPR v1.1 specification which can be found at: -https://www.power.org/wp-content/uploads/2012/06/Power_ePAPR_APPROVED_v1.1.pdf +3.7.3 of the Devicetree Specification which can be found at: +https://www.devicetree.org/specifications/ The ARM L2 cache representation in the device tree should be done as follows: diff --git a/Bindings/arm/marvell/ap806-system-controller.txt b/Bindings/arm/marvell/ap806-system-controller.txt index 8968371d84e2..0b887440e08a 100644 --- a/Bindings/arm/marvell/ap806-system-controller.txt +++ b/Bindings/arm/marvell/ap806-system-controller.txt @@ -7,6 +7,14 @@ registers giving access to numerous features: clocks, pin-muxing and many other SoC configuration items. This DT binding allows to describe this system controller. +For the top level node: + - compatible: must be: "syscon", "simple-mfd"; + - reg: register area of the AP806 system controller + +Clocks: +------- + + The Device Tree node representing the AP806 system controller provides a number of clocks: @@ -17,19 +25,76 @@ a number of clocks: Required properties: - - compatible: must be: - "marvell,ap806-system-controller", "syscon" - - reg: register area of the AP806 system controller + - compatible: must be: "marvell,ap806-clock" - #clock-cells: must be set to 1 - - clock-output-names: must be defined to: - "ap-cpu-cluster-0", "ap-cpu-cluster-1", "ap-fixed", "ap-mss" + +Pinctrl: +-------- + +For common binding part and usage, refer to +Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. + +Required properties: +- compatible must be "marvell,ap806-pinctrl", + +Available mpp pins/groups and functions: +Note: brackets (x) are not part of the mpp name for marvell,function and given +only for more detailed description in this document. + +name pins functions +================================================================================ +mpp0 0 gpio, sdio(clk), spi0(clk) +mpp1 1 gpio, sdio(cmd), spi0(miso) +mpp2 2 gpio, sdio(d0), spi0(mosi) +mpp3 3 gpio, sdio(d1), spi0(cs0n) +mpp4 4 gpio, sdio(d2), i2c0(sda) +mpp5 5 gpio, sdio(d3), i2c0(sdk) +mpp6 6 gpio, sdio(ds) +mpp7 7 gpio, sdio(d4), uart1(rxd) +mpp8 8 gpio, sdio(d5), uart1(txd) +mpp9 9 gpio, sdio(d6), spi0(cs1n) +mpp10 10 gpio, sdio(d7) +mpp11 11 gpio, uart0(txd) +mpp12 12 gpio, sdio(pw_off), sdio(hw_rst) +mpp13 13 gpio +mpp14 14 gpio +mpp15 15 gpio +mpp16 16 gpio +mpp17 17 gpio +mpp18 18 gpio +mpp19 19 gpio, uart0(rxd), sdio(pw_off) + +GPIO: +----- +For common binding part and usage, refer to +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. + +Required properties: + +- compatible: "marvell,armada-8k-gpio" + +- offset: offset address inside the syscon block Example: +ap_syscon: system-controller@6f4000 { + compatible = "syscon", "simple-mfd"; + reg = <0x6f4000 0x1000>; - syscon: system-controller@6f4000 { - compatible = "marvell,ap806-system-controller", "syscon"; + ap_clk: clock { + compatible = "marvell,ap806-clock"; #clock-cells = <1>; - clock-output-names = "ap-cpu-cluster-0", "ap-cpu-cluster-1", - "ap-fixed", "ap-mss"; - reg = <0x6f4000 0x1000>; }; + + ap_pinctrl: pinctrl { + compatible = "marvell,ap806-pinctrl"; + }; + + ap_gpio: gpio { + compatible = "marvell,armada-8k-gpio"; + offset = <0x1040>; + ngpios = <19>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ap_pinctrl 0 0 19>; + }; +}; diff --git a/Bindings/arm/marvell/cp110-system-controller0.txt b/Bindings/arm/marvell/cp110-system-controller0.txt index 07dbb358182c..171d02cadea4 100644 --- a/Bindings/arm/marvell/cp110-system-controller0.txt +++ b/Bindings/arm/marvell/cp110-system-controller0.txt @@ -7,6 +7,13 @@ Controller 0 and System Controller 1. This Device Tree binding allows to describe the first system controller, which provides registers to configure various aspects of the SoC. +For the top level node: + - compatible: must be: "syscon", "simple-mfd"; + - reg: register area of the CP110 system controller 0 + +Clocks: +------- + The Device Tree node representing this System Controller 0 provides a number of clocks: @@ -27,6 +34,7 @@ The following clocks are available: - 0 2 EIP - 0 3 Core - 0 4 NAND core + - 0 5 SDIO core - Gatable clocks - 1 0 Audio - 1 1 Comm Unit @@ -56,28 +64,126 @@ The following clocks are available: Required properties: - compatible: must be: - "marvell,cp110-system-controller0", "syscon"; - - reg: register area of the CP110 system controller 0 + "marvell,cp110-clock" - #clock-cells: must be set to 2 - - core-clock-output-names must be set to: - "cpm-apll", "cpm-ppv2-core", "cpm-eip", "cpm-core", "cpm-nand-core" - - gate-clock-output-names must be set to: - "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", - "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", - "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", - "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io", - "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; + +Pinctrl: +-------- + +For common binding part and usage, refer to the file +Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. + +Required properties: + +- compatible: "marvell,armada-7k-pinctrl", + "marvell,armada-8k-cpm-pinctrl" or "marvell,armada-8k-cps-pinctrl" + depending on the specific variant of the SoC being used. + +Available mpp pins/groups and functions: +Note: brackets (x) are not part of the mpp name for marvell,function and given +only for more detailed description in this document. + +name pins functions +================================================================================ +mpp0 0 gpio, dev(ale1), au(i2smclk), ge0(rxd3), tdm(pclk), ptp(pulse), mss_i2c(sda), uart0(rxd), sata0(present_act), ge(mdio) +mpp1 1 gpio, dev(ale0), au(i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), sata1(present_act), ge(mdc) +mpp2 2 gpio, dev(ad15), au(i2sextclk), ge0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc) +mpp3 3 gpio, dev(ad14), au(i2slrclk), ge0(rxd0), tdm(fsync), mss_uart(txd), pcie(rstoutn), i2c1(sda), uart1(txd), sata1(present_act), xg(mdio) +mpp4 4 gpio, dev(ad13), au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc) +mpp5 5 gpio, dev(ad12), au(i2sdi), ge0(rxclk), tdm(intn), mss_uart(txd), uart1(rts), pcie1(clkreq), uart3(txd), ge(mdio) +mpp6 6 gpio, dev(ad11), ge0(txd3), spi0(csn2), au(i2sextclk), sata1(present_act), pcie2(clkreq), uart0(rxd), ptp(pulse) +mpp7 7 gpio, dev(ad10), ge0(txd2), spi0(csn1), spi1(csn1), sata0(present_act), led(data), uart0(txd), ptp(clk) +mpp8 8 gpio, dev(ad9), ge0(txd1), spi0(csn0), spi1(csn0), uart0(cts), led(stb), uart2(rxd), ptp(pclk_out), synce1(clk) +mpp9 9 gpio, dev(ad8), ge0(txd0), spi0(mosi), spi1(mosi), pcie(rstoutn), synce2(clk) +mpp10 10 gpio, dev(readyn), ge0(txctl), spi0(miso), spi1(miso), uart0(cts), sata1(present_act) +mpp11 11 gpio, dev(wen1), ge0(txclkout), spi0(clk), spi1(clk), uart0(rts), led(clk), uart2(txd), sata0(present_act) +mpp12 12 gpio, dev(clk_out), nf(rbn1), spi1(csn1), ge0(rxclk) +mpp13 13 gpio, dev(burstn), nf(rbn0), spi1(miso), ge0(rxctl), mss_spi(miso) +mpp14 14 gpio, dev(bootcsn), dev(csn0), spi1(csn0), spi0(csn3), au(i2sextclk), spi0(miso), sata0(present_act), mss_spi(csn) +mpp15 15 gpio, dev(ad7), spi1(mosi), spi0(mosi), mss_spi(mosi), ptp(pulse_cp2cp) +mpp16 16 gpio, dev(ad6), spi1(clk), mss_spi(clk) +mpp17 17 gpio, dev(ad5), ge0(txd3) +mpp18 18 gpio, dev(ad4), ge0(txd2), ptp(clk_cp2cp) +mpp19 19 gpio, dev(ad3), ge0(txd1), wakeup(out_cp2cp) +mpp20 20 gpio, dev(ad2), ge0(txd0) +mpp21 21 gpio, dev(ad1), ge0(txctl), sei(in_cp2cp) +mpp22 22 gpio, dev(ad0), ge0(txclkout), wakeup(in_cp2cp) +mpp23 23 gpio, dev(a1), au(i2smclk), link(rd_in_cp2cp) +mpp24 24 gpio, dev(a0), au(i2slrclk) +mpp25 25 gpio, dev(oen), au(i2sdo_spdifo) +mpp26 26 gpio, dev(wen0), au(i2sbclk) +mpp27 27 gpio, dev(csn0), spi1(miso), mss_gpio4, ge0(rxd3), spi0(csn4), ge(mdio), sata0(present_act), uart0(rts), rei(in_cp2cp) +mpp28 28 gpio, dev(csn1), spi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act), uart0(cts), led(data) +mpp29 29 gpio, dev(csn2), spi1(mosi), mss_gpio6, ge0(rxd1), spi0(csn6), pcie1(clkreq), ptp(clk), mss_i2c(sda), sata0(present_act), uart0(rxd), led(stb) +mpp30 30 gpio, dev(csn3), spi1(clk), mss_gpio7, ge0(rxd0), spi0(csn7), pcie0(clkreq), ptp(pclk_out), mss_i2c(sck), sata1(present_act), uart0(txd), led(clk) +mpp31 31 gpio, dev(a2), mss_gpio4, pcie(rstoutn), ge(mdc) +mpp32 32 gpio, mii(col), mii(txerr), mss_spi(miso), tdm(drx), au(i2sextclk), au(i2sdi), ge(mdio), sdio(v18_en), pcie1(clkreq), mss_gpio0 +mpp33 33 gpio, mii(txclk), sdio(pwr10), mss_spi(csn), tdm(fsync), au(i2smclk), sdio(bus_pwr), xg(mdio), pcie2(clkreq), mss_gpio1 +mpp34 34 gpio, mii(rxerr), sdio(pwr11), mss_spi(mosi), tdm(dtx), au(i2slrclk), sdio(wr_protect), ge(mdc), pcie0(clkreq), mss_gpio2 +mpp35 35 gpio, sata1(present_act), i2c1(sda), mss_spi(clk), tdm(pclk), au(i2sdo_spdifo), sdio(card_detect), xg(mdio), ge(mdio), pcie(rstoutn), mss_gpio3 +mpp36 36 gpio, synce2(clk), i2c1(sck), ptp(clk), synce1(clk), au(i2sbclk), sata0(present_act), xg(mdc), ge(mdc), pcie2(clkreq), mss_gpio5 +mpp37 37 gpio, uart2(rxd), i2c0(sck), ptp(pclk_out), tdm(intn), mss_i2c(sck), sata1(present_act), ge(mdc), xg(mdc), pcie1(clkreq), mss_gpio6, link(rd_out_cp2cp) +mpp38 38 gpio, uart2(txd), i2c0(sda), ptp(pulse), tdm(rstn), mss_i2c(sda), sata0(present_act), ge(mdio), xg(mdio), au(i2sextclk), mss_gpio7, ptp(pulse_cp2cp) +mpp39 39 gpio, sdio(wr_protect), au(i2sbclk), ptp(clk), spi0(csn1), sata1(present_act), mss_gpio0 +mpp40 40 gpio, sdio(pwr11), synce1(clk), mss_i2c(sda), au(i2sdo_spdifo), ptp(pclk_out), spi0(clk), uart1(txd), ge(mdio), sata0(present_act), mss_gpio1 +mpp41 41 gpio, sdio(pwr10), sdio(bus_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart1(rxd), ge(mdc), sata1(present_act), mss_gpio2, rei(out_cp2cp) +mpp42 42 gpio, sdio(v18_en), sdio(wr_protect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso), uart1(cts), xg(mdc), sata0(present_act), mss_gpio4 +mpp43 43 gpio, sdio(card_detect), synce1(clk), au(i2sextclk), mss_uart(rxd), spi0(csn0), uart1(rts), xg(mdio), sata1(present_act), mss_gpio5, wakeup(out_cp2cp) +mpp44 44 gpio, ge1(txd2), uart0(rts), ptp(clk_cp2cp) +mpp45 45 gpio, ge1(txd3), uart0(txd), pcie(rstoutn) +mpp46 46 gpio, ge1(txd1), uart1(rts) +mpp47 47 gpio, ge1(txd0), spi1(clk), uart1(txd), ge(mdc) +mpp48 48 gpio, ge1(txctl_txen), spi1(mosi), xg(mdc), wakeup(in_cp2cp) +mpp49 49 gpio, ge1(txclkout), mii(crs), spi1(miso), uart1(rxd), ge(mdio), pcie0(clkreq), sdio(v18_en), sei(out_cp2cp) +mpp50 50 gpio, ge1(rxclk), mss_i2c(sda), spi1(csn0), uart2(txd), uart0(rxd), xg(mdio), sdio(pwr11) +mpp51 51 gpio, ge1(rxd0), mss_i2c(sck), spi1(csn1), uart2(rxd), uart0(cts), sdio(pwr10) +mpp52 52 gpio, ge1(rxd1), synce1(clk), synce2(clk), spi1(csn2), uart1(cts), led(clk), pcie(rstoutn), pcie0(clkreq) +mpp53 53 gpio, ge1(rxd2), ptp(clk), spi1(csn3), uart1(rxd), led(stb), sdio(led) +mpp54 54 gpio, ge1(rxd3), synce2(clk), ptp(pclk_out), synce1(clk), led(data), sdio(hw_rst), sdio(wr_protect) +mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio(card_detect) +mpp56 56 gpio, tdm(drx), au(i2sdo_spdifo), spi0(clk), uart1(rxd), sata1(present_act), sdio(clk) +mpp57 57 gpio, mss_i2c(sda), ptp(pclk_out), tdm(intn), au(i2sbclk), spi0(mosi), uart1(txd), sata0(present_act), sdio(cmd) +mpp58 58 gpio, mss_i2c(sck), ptp(clk), tdm(rstn), au(i2sdi), spi0(miso), uart1(cts), led(clk), sdio(d0) +mpp59 59 gpio, mss_gpio7, synce2(clk), tdm(fsync), au(i2slrclk), spi0(csn0), uart0(cts), led(stb), uart1(txd), sdio(d1) +mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(rts), led(data), uart1(rxd), sdio(d2) +mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3) +mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc) + +GPIO: +----- + +For common binding part and usage, refer to +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. + +Required properties: + +- compatible: "marvell,armada-8k-gpio" + +- offset: offset address inside the syscon block Example: - cpm_syscon0: system-controller@440000 { - compatible = "marvell,cp110-system-controller0", "syscon"; - reg = <0x440000 0x1000>; +cpm_syscon0: system-controller@440000 { + compatible = "syscon", "simple-mfd"; + reg = <0x440000 0x1000>; + + cpm_clk: clock { + compatible = "marvell,cp110-clock"; #clock-cells = <2>; - core-clock-output-names = "cpm-apll", "cpm-ppv2-core", "cpm-eip", "cpm-core", "cpm-nand-core"; - gate-clock-output-names = "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", - "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", - "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", - "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io", - "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; }; + + cpm_pinctrl: pinctrl { + compatible = "marvell,armada-8k-cpm-pinctrl"; + }; + + cpm_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 0 32>; + status = "disabled"; + }; + +}; diff --git a/Bindings/arm/mediatek.txt b/Bindings/arm/mediatek.txt index c860b245d8c8..da7bd138e6f2 100644 --- a/Bindings/arm/mediatek.txt +++ b/Bindings/arm/mediatek.txt @@ -12,6 +12,8 @@ compatible: Must contain one of "mediatek,mt6592" "mediatek,mt6755" "mediatek,mt6795" + "mediatek,mt6797" + "mediatek,mt7622" "mediatek,mt7623" "mediatek,mt8127" "mediatek,mt8135" @@ -38,6 +40,12 @@ Supported boards: - Evaluation board for MT6795(Helio X10): Required root node properties: - compatible = "mediatek,mt6795-evb", "mediatek,mt6795"; +- Evaluation board for MT6797(Helio X20): + Required root node properties: + - compatible = "mediatek,mt6797-evb", "mediatek,mt6797"; +- Reference board variant 1 for MT7622: + Required root node properties: + - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; - Evaluation board for MT7623: Required root node properties: - compatible = "mediatek,mt7623-evb", "mediatek,mt7623"; diff --git a/Bindings/arm/realtek.txt b/Bindings/arm/realtek.txt new file mode 100644 index 000000000000..13d755787b4f --- /dev/null +++ b/Bindings/arm/realtek.txt @@ -0,0 +1,20 @@ +Realtek platforms device tree bindings +-------------------------------------- + + +RTD1295 SoC +=========== + +Required root node properties: + + - compatible : must contain "realtek,rtd1295" + + +Root node property compatible must contain, depending on board: + + - Zidoo X9S: "zidoo,x9s" + + +Example: + + compatible = "zidoo,x9s", "realtek,rtd1295"; diff --git a/Bindings/arm/rockchip.txt b/Bindings/arm/rockchip.txt index c965d99e86c2..11c0ac4a2d56 100644 --- a/Bindings/arm/rockchip.txt +++ b/Bindings/arm/rockchip.txt @@ -42,6 +42,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288"; +- Firefly Firefly-RK3399 board: + Required root node properties: + - compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; + - ChipSPARK PopMetal-RK3288 board: Required root node properties: - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; @@ -138,9 +142,9 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368"; -- Rockchip RK1108 Evaluation board +- Rockchip RV1108 Evaluation board Required root node properties: - - compatible = "rockchip,rk1108-evb", "rockchip,rk1108"; + - compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; - Rockchip RK3368 evb: Required root node properties: diff --git a/Bindings/arm/shmobile.txt b/Bindings/arm/shmobile.txt index 170fe0562c63..1a671e329864 100644 --- a/Bindings/arm/shmobile.txt +++ b/Bindings/arm/shmobile.txt @@ -55,12 +55,19 @@ Boards: compatible = "renesas,bockw", "renesas,r8a7778" - Genmai (RTK772100BC00000BR) compatible = "renesas,genmai", "renesas,r7s72100" + - GR-Peach (X28A-M01-E/F) + compatible = "renesas,gr-peach", "renesas,r7s72100" - Gose (RTP0RC7793SEB00010S) compatible = "renesas,gose", "renesas,r8a7793" - - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S) + - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1)) + H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0)) compatible = "renesas,h3ulcb", "renesas,r8a7795"; - Henninger compatible = "renesas,henninger", "renesas,r8a7791" + - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) + compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743" + - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) + compatible = "iwave,g20m", "renesas,r8a7743" - Koelsch (RTP0RC7791SEB00010S) compatible = "renesas,koelsch", "renesas,r8a7791" - Kyoto Microcomputer Co. KZM-A9-Dual @@ -69,7 +76,7 @@ Boards: compatible = "renesas,kzm9g", "renesas,sh73a0" - Lager (RTP0RC7790SEB00010S) compatible = "renesas,lager", "renesas,r8a7790" - - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S) + - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0)) compatible = "renesas,m3ulcb", "renesas,r8a7796"; - Marzen (R0P7779A00010S) compatible = "renesas,marzen", "renesas,r8a7779" @@ -81,6 +88,8 @@ Boards: compatible = "renesas,salvator-x", "renesas,r8a7795"; - Salvator-X (RTP0RC7796SIPB0011S) compatible = "renesas,salvator-x", "renesas,r8a7796"; + - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S) + compatible = "renesas,salvator-xs", "renesas,r8a7795"; - SILK (RTP0RC7794LCB00011S) compatible = "renesas,silk", "renesas,r8a7794" - SK-RZG1E (YR8A77450S000BE) diff --git a/Bindings/arm/tegra.txt b/Bindings/arm/tegra.txt index b5a4342c1d46..7f1411bbabf7 100644 --- a/Bindings/arm/tegra.txt +++ b/Bindings/arm/tegra.txt @@ -29,7 +29,6 @@ board-specific compatible values: nvidia,harmony nvidia,seaboard nvidia,ventana - nvidia,whistler toradex,apalis_t30 toradex,apalis_t30-eval toradex,apalis-tk1 diff --git a/Bindings/arm/topology.txt b/Bindings/arm/topology.txt index 1061faf5f602..de9eb0486630 100644 --- a/Bindings/arm/topology.txt +++ b/Bindings/arm/topology.txt @@ -29,9 +29,9 @@ corresponding to the system hierarchy; syntactically they are defined as device tree nodes. The remainder of this document provides the topology bindings for ARM, based -on the ePAPR standard, available from: +on the Devicetree Specification, available from: -http://www.power.org/documentation/epapr-version-1-1/ +https://www.devicetree.org/specifications/ If not stated otherwise, whenever a reference to a cpu node phandle is made its value must point to a cpu node compliant with the cpu node bindings as diff --git a/Bindings/ata/ahci-fsl-qoriq.txt b/Bindings/ata/ahci-fsl-qoriq.txt index fc33ca01e9ba..7c3ca0e13de0 100644 --- a/Bindings/ata/ahci-fsl-qoriq.txt +++ b/Bindings/ata/ahci-fsl-qoriq.txt @@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller Required properties: - reg: Physical base address and size of the controller's register area. - compatible: Compatibility string. Must be 'fsl,-ahci', where - chip could be ls1021a, ls1043a, ls1046a, ls2080a etc. + chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc. - clocks: Input clock specifier. Refer to common clock bindings. - interrupts: Interrupt specifier. Refer to interrupt binding. diff --git a/Bindings/ata/cortina,gemini-sata-bridge.txt b/Bindings/ata/cortina,gemini-sata-bridge.txt new file mode 100644 index 000000000000..1c3d3cc70051 --- /dev/null +++ b/Bindings/ata/cortina,gemini-sata-bridge.txt @@ -0,0 +1,55 @@ +* Cortina Systems Gemini SATA Bridge + +The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that +takes two Faraday Technology FTIDE010 PATA controllers and bridges +them in different configurations to two SATA ports. + +Required properties: +- compatible: should be + "cortina,gemini-sata-bridge" +- reg: registers and size for the block +- resets: phandles to the reset lines for both SATA bridges +- reset-names: must be "sata0", "sata1" +- clocks: phandles to the compulsory peripheral clocks +- clock-names: must be "SATA0_PCLK", "SATA1_PCLK" +- syscon: a phandle to the global Gemini system controller +- cortina,gemini-ata-muxmode: tell the desired multiplexing mode for + the ATA controller and SATA bridges. Values 0..3: + Mode 0: ata0 master <-> sata0 + ata1 master <-> sata1 + ata0 slave interface brought out on IDE pads + Mode 1: ata0 master <-> sata0 + ata1 master <-> sata1 + ata1 slave interface brought out on IDE pads + Mode 2: ata1 master <-> sata1 + ata1 slave <-> sata0 + ata0 master and slave interfaces brought out + on IDE pads + Mode 3: ata0 master <-> sata0 + ata0 slave <-> sata1 + ata1 master and slave interfaces brought out + on IDE pads + +Optional boolean properties: +- cortina,gemini-enable-ide-pins: enables the PATA to IDE connection. + The muxmode setting decides whether ATA0 or ATA1 is brought out, + and whether master, slave or both interfaces get brought out. +- cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge + inside the Gemnini SoC. The Muxmode decides what PATA blocks will + be muxed out and how. + +Example: + +sata: sata@46000000 { + compatible = "cortina,gemini-sata-bridge"; + reg = <0x46000000 0x100>; + resets = <&rcon 26>, <&rcon 27>; + reset-names = "sata0", "sata1"; + clocks = <&gcc GEMINI_CLK_GATE_SATA0>, + <&gcc GEMINI_CLK_GATE_SATA1>; + clock-names = "SATA0_PCLK", "SATA1_PCLK"; + syscon = <&syscon>; + cortina,gemini-ata-muxmode = <3>; + cortina,gemini-enable-ide-pins; + cortina,gemini-enable-sata-bridge; +}; diff --git a/Bindings/ata/faraday,ftide010.txt b/Bindings/ata/faraday,ftide010.txt new file mode 100644 index 000000000000..a0c64a29104d --- /dev/null +++ b/Bindings/ata/faraday,ftide010.txt @@ -0,0 +1,38 @@ +* Faraday Technology FTIDE010 PATA controller + +This controller is the first Faraday IDE interface block, used in the +StorLink SL2312 and SL3516, later known as the Cortina Systems Gemini +platform. The controller can do PIO modes 0 through 4, Multi-word DMA +(MWDM)modes 0 through 2 and Ultra DMA modes 0 through 6. + +On the Gemini platform, this PATA block is accompanied by a PATA to +SATA bridge in order to support SATA. This is why a phandle to that +controller is compulsory on that platform. + +The timing properties are unique per-SoC, not per-board. + +Required properties: +- compatible: should be one of + "cortina,gemini-pata", "faraday,ftide010" + "faraday,ftide010" +- interrupts: interrupt for the block +- reg: registers and size for the block + +Optional properties: +- clocks: a SoC clock running the peripheral. +- clock-names: should be set to "PCLK" for the peripheral clock. + +Required properties for "cortina,gemini-pata" compatible: +- sata: a phande to the Gemini PATA to SATA bridge, see + cortina,gemini-sata-bridge.txt for details. + +Example: + +ata@63000000 { + compatible = "cortina,gemini-pata", "faraday,ftide010"; + reg = <0x63000000 0x100>; + interrupts = <4 IRQ_TYPE_EDGE_RISING>; + clocks = <&gcc GEMINI_CLK_GATE_IDE>; + clock-names = "PCLK"; + sata = <&sata>; +}; diff --git a/Bindings/ata/sata_rcar.txt b/Bindings/ata/sata_rcar.txt index 0764f9ab63dc..e20eac7a3087 100644 --- a/Bindings/ata/sata_rcar.txt +++ b/Bindings/ata/sata_rcar.txt @@ -1,14 +1,22 @@ * Renesas R-Car SATA Required properties: -- compatible : should contain one of the following: +- compatible : should contain one or more of the following: - "renesas,sata-r8a7779" for R-Car H1 - ("renesas,rcar-sata" is deprecated) - "renesas,sata-r8a7790-es1" for R-Car H2 ES1 - "renesas,sata-r8a7790" for R-Car H2 other than ES1 - "renesas,sata-r8a7791" for R-Car M2-W - "renesas,sata-r8a7793" for R-Car M2-N - "renesas,sata-r8a7795" for R-Car H3 + - "renesas,rcar-gen2-sata" for a generic R-Car Gen2 compatible device + - "renesas,rcar-gen3-sata" for a generic R-Car Gen3 compatible device + - "renesas,rcar-sata" is deprecated + + When compatible with the generic version nodes + must list the SoC-specific version corresponding + to the platform first followed by the generic + version. + - reg : address and length of the SATA registers; - interrupts : must consist of one interrupt specifier. - clocks : must contain a reference to the functional clock. @@ -16,7 +24,7 @@ Required properties: Example: sata0: sata@ee300000 { - compatible = "renesas,sata-r8a7791"; + compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; reg = <0 0xee300000 0 0x2000>; interrupt-parent = <&gic>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; diff --git a/Bindings/bus/brcm,gisb-arb.txt b/Bindings/bus/brcm,gisb-arb.txt index 1eceefb20f01..8a6c3c2e58fe 100644 --- a/Bindings/bus/brcm,gisb-arb.txt +++ b/Bindings/bus/brcm,gisb-arb.txt @@ -3,7 +3,8 @@ Broadcom GISB bus Arbiter controller Required properties: - compatible: - "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for 28nm chips + "brcm,bcm7278-gisb-arb" for V7 28nm chips + "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for other 28nm chips "brcm,bcm7435-gisb-arb" for newer 40nm chips "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips "brcm,bcm7038-gisb-arb" for 130nm chips diff --git a/Bindings/bus/simple-pm-bus.txt b/Bindings/bus/simple-pm-bus.txt index d032237512c2..6f15037131ed 100644 --- a/Bindings/bus/simple-pm-bus.txt +++ b/Bindings/bus/simple-pm-bus.txt @@ -10,7 +10,7 @@ enabled for child devices connected to the bus (either on-SoC or externally) to function. While "simple-pm-bus" follows the "simple-bus" set of properties, as specified -in ePAPR, it is not an extension of "simple-bus". +in the Devicetree Specification, it is not an extension of "simple-bus". Required properties: diff --git a/Bindings/chosen.txt b/Bindings/chosen.txt index b5e39af4ddc0..dee3f5d9df26 100644 --- a/Bindings/chosen.txt +++ b/Bindings/chosen.txt @@ -10,7 +10,8 @@ stdout-path property -------------------- Device trees may specify the device to be used for boot console output -with a stdout-path property under /chosen, as described in ePAPR, e.g. +with a stdout-path property under /chosen, as described in the Devicetree +Specification, e.g. / { chosen { diff --git a/Bindings/clock/amlogic,meson8b-clkc.txt b/Bindings/clock/amlogic,meson8b-clkc.txt index 2b7b3fa588d7..606da38c0959 100644 --- a/Bindings/clock/amlogic,meson8b-clkc.txt +++ b/Bindings/clock/amlogic,meson8b-clkc.txt @@ -1,11 +1,14 @@ -* Amlogic Meson8b Clock and Reset Unit +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit -The Amlogic Meson8b clock controller generates and supplies clock to various -controllers within the SoC. +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and +supplies clock to various controllers within the SoC. Required Properties: -- compatible: should be "amlogic,meson8b-clkc" +- compatible: must be one of: + - "amlogic,meson8-clkc" for Meson8 (S802) SoCs + - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs + - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs - reg: it must be composed by two tuples: 0) physical base address of the xtal register and length of memory mapped region. diff --git a/Bindings/clock/brcm,iproc-clocks.txt b/Bindings/clock/brcm,iproc-clocks.txt index 6f66e9aa354c..f2c5f0e4a363 100644 --- a/Bindings/clock/brcm,iproc-clocks.txt +++ b/Bindings/clock/brcm,iproc-clocks.txt @@ -219,3 +219,79 @@ BCM63138 -------- PLL and leaf clock compatible strings for BCM63138 are: "brcm,bcm63138-armpll" + +Stingray +----------- +PLL and leaf clock compatible strings for Stingray are: + "brcm,sr-genpll0" + "brcm,sr-genpll1" + "brcm,sr-genpll2" + "brcm,sr-genpll3" + "brcm,sr-genpll4" + "brcm,sr-genpll5" + "brcm,sr-genpll6" + + "brcm,sr-lcpll0" + "brcm,sr-lcpll1" + "brcm,sr-lcpll-pcie" + + +The following table defines the set of PLL/clock index and ID for Stingray. +These clock IDs are defined in: + "include/dt-bindings/clock/bcm-sr.h" + + Clock Source Index ID + --- ----- ----- --------- + crystal N/A N/A N/A + crmu_ref25m crystal N/A N/A + + genpll0 crystal 0 BCM_SR_GENPLL0 + clk_125m genpll0 1 BCM_SR_GENPLL0_125M_CLK + clk_scr genpll0 2 BCM_SR_GENPLL0_SCR_CLK + clk_250 genpll0 3 BCM_SR_GENPLL0_250M_CLK + clk_pcie_axi genpll0 4 BCM_SR_GENPLL0_PCIE_AXI_CLK + clk_paxc_axi_x2 genpll0 5 BCM_SR_GENPLL0_PAXC_AXI_X2_CLK + clk_paxc_axi genpll0 6 BCM_SR_GENPLL0_PAXC_AXI_CLK + + genpll1 crystal 0 BCM_SR_GENPLL1 + clk_pcie_tl genpll1 1 BCM_SR_GENPLL1_PCIE_TL_CLK + clk_mhb_apb genpll1 2 BCM_SR_GENPLL1_MHB_APB_CLK + + genpll2 crystal 0 BCM_SR_GENPLL2 + clk_nic genpll2 1 BCM_SR_GENPLL2_NIC_CLK + clk_ts_500_ref genpll2 2 BCM_SR_GENPLL2_TS_500_REF_CLK + clk_125_nitro genpll2 3 BCM_SR_GENPLL2_125_NITRO_CLK + clk_chimp genpll2 4 BCM_SR_GENPLL2_CHIMP_CLK + clk_nic_flash genpll2 5 BCM_SR_GENPLL2_NIC_FLASH + + genpll3 crystal 0 BCM_SR_GENPLL3 + clk_hsls genpll3 1 BCM_SR_GENPLL3_HSLS_CLK + clk_sdio genpll3 2 BCM_SR_GENPLL3_SDIO_CLK + + genpll4 crystal 0 BCM_SR_GENPLL4 + ccn genpll4 1 BCM_SR_GENPLL4_CCN_CLK + clk_tpiu_pll genpll4 2 BCM_SR_GENPLL4_TPIU_PLL_CLK + noc_clk genpll4 3 BCM_SR_GENPLL4_NOC_CLK + clk_chclk_fs4 genpll4 4 BCM_SR_GENPLL4_CHCLK_FS4_CLK + clk_bridge_fscpu genpll4 5 BCM_SR_GENPLL4_BRIDGE_FSCPU_CLK + + + genpll5 crystal 0 BCM_SR_GENPLL5 + fs4_hf_clk genpll5 1 BCM_SR_GENPLL5_FS4_HF_CLK + crypto_ae_clk genpll5 2 BCM_SR_GENPLL5_CRYPTO_AE_CLK + raid_ae_clk genpll5 3 BCM_SR_GENPLL5_RAID_AE_CLK + + genpll6 crystal 0 BCM_SR_GENPLL6 + 48_usb genpll6 1 BCM_SR_GENPLL6_48_USB_CLK + + lcpll0 crystal 0 BCM_SR_LCPLL0 + clk_sata_refp lcpll0 1 BCM_SR_LCPLL0_SATA_REFP_CLK + clk_sata_refn lcpll0 2 BCM_SR_LCPLL0_SATA_REFN_CLK + clk_usb_ref lcpll0 3 BCM_SR_LCPLL0_USB_REF_CLK + sata_refpn lcpll0 3 BCM_SR_LCPLL0_SATA_REFPN_CLK + + lcpll1 crystal 0 BCM_SR_LCPLL1 + wan lcpll1 1 BCM_SR_LCPLL0_WAN_CLK + + lcpll_pcie crystal 0 BCM_SR_LCPLL_PCIE + pcie_phy_ref lcpll1 1 BCM_SR_LCPLL_PCIE_PHY_REF_CLK diff --git a/Bindings/clock/hi6220-clock.txt b/Bindings/clock/hi6220-clock.txt index e4d5feaebc29..ef3deb7b86ea 100644 --- a/Bindings/clock/hi6220-clock.txt +++ b/Bindings/clock/hi6220-clock.txt @@ -11,6 +11,7 @@ Required Properties: - compatible: the compatible should be one of the following strings to indicate the clock controller functionality. + - "hisilicon,hi6220-acpu-sctrl" - "hisilicon,hi6220-aoctrl" - "hisilicon,hi6220-sysctrl" - "hisilicon,hi6220-mediactrl" diff --git a/Bindings/clock/img,boston-clock.txt b/Bindings/clock/img,boston-clock.txt new file mode 100644 index 000000000000..7bc5e9ffb624 --- /dev/null +++ b/Bindings/clock/img,boston-clock.txt @@ -0,0 +1,31 @@ +Binding for Imagination Technologies MIPS Boston clock sources. + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +The device node must be a child node of the syscon node corresponding to the +Boston system's platform registers. + +Required properties: +- compatible : Should be "img,boston-clock". +- #clock-cells : Should be set to 1. + Values available for clock consumers can be found in the header file: + + +Example: + + system-controller@17ffd000 { + compatible = "img,boston-platform-regs", "syscon"; + reg = <0x17ffd000 0x1000>; + + clk_boston: clock { + compatible = "img,boston-clock"; + #clock-cells = <1>; + }; + }; + + uart0: uart@17ffe000 { + /* ... */ + clocks = <&clk_boston BOSTON_CLK_SYS>; + }; diff --git a/Bindings/clock/qcom,gcc.txt b/Bindings/clock/qcom,gcc.txt index 5b4dfc1ea54f..551d03be9665 100644 --- a/Bindings/clock/qcom,gcc.txt +++ b/Bindings/clock/qcom,gcc.txt @@ -8,6 +8,7 @@ Required properties : "qcom,gcc-apq8084" "qcom,gcc-ipq8064" "qcom,gcc-ipq4019" + "qcom,gcc-ipq8074" "qcom,gcc-msm8660" "qcom,gcc-msm8916" "qcom,gcc-msm8960" diff --git a/Bindings/clock/qoriq-clock.txt b/Bindings/clock/qoriq-clock.txt index 6ed469c66b32..6498e1fdbb33 100644 --- a/Bindings/clock/qoriq-clock.txt +++ b/Bindings/clock/qoriq-clock.txt @@ -57,6 +57,11 @@ Optional properties: - clocks: If clock-frequency is not specified, sysclk may be provided as an input clock. Either clock-frequency or clocks must be provided. + A second input clock, called "coreclk", may be provided if + core PLLs are based on a different input clock from the + platform PLL. +- clock-names: Required if a coreclk is present. Valid names are + "sysclk" and "coreclk". 2. Clock Provider @@ -73,6 +78,7 @@ second cell is the clock index for the specified type. 2 hwaccel index (n in CLKCGnHWACSR) 3 fman 0 for fm1, 1 for fm2 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4 + 5 coreclk must be 0 3. Example diff --git a/Bindings/clock/renesas,cpg-mssr.txt b/Bindings/clock/renesas,cpg-mssr.txt index f4f944d81308..0cd894f987a3 100644 --- a/Bindings/clock/renesas,cpg-mssr.txt +++ b/Bindings/clock/renesas,cpg-mssr.txt @@ -15,6 +15,11 @@ Required Properties: - compatible: Must be one of: - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M) - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E) + - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2) + - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W) + - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H) + - "renesas,r8a7793-cpg-mssr" for the r8a7793 SoC (R-Car M2-N) + - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2) - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W) @@ -24,9 +29,10 @@ Required Properties: - clocks: References to external parent clocks, one entry for each entry in clock-names - clock-names: List of external parent clock names. Valid names are: - - "extal" (r8a7743, r8a7745, r8a7795, r8a7796) + - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794, + r8a7795, r8a7796) - "extalr" (r8a7795, r8a7796) - - "usb_extal" (r8a7743, r8a7745) + - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794) - #clock-cells: Must be 2 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" diff --git a/Bindings/clock/rockchip,rk3128-cru.txt b/Bindings/clock/rockchip,rk3128-cru.txt new file mode 100644 index 000000000000..455a9a00a623 --- /dev/null +++ b/Bindings/clock/rockchip,rk3128-cru.txt @@ -0,0 +1,56 @@ +* Rockchip RK3128 Clock and Reset Unit + +The RK3128 clock controller generates and supplies clock to various +controllers within the SoC and also implements a reset controller for SoC +peripherals. + +Required Properties: + +- compatible: should be "rockchip,rk3128-cru" +- reg: physical base address of the controller and length of memory mapped + region. +- #clock-cells: should be 1. +- #reset-cells: should be 1. + +Optional Properties: + +- rockchip,grf: phandle to the syscon managing the "general register files" + If missing pll rates are not changeable, due to the missing pll lock status. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. All available clocks are defined as +preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be +used in device tree sources. Similar macros exist for the reset sources in +these files. + +External clocks: + +There are several clocks that are generated outside the SoC. It is expected +that they are defined using standard clock bindings with following +clock-output-names: + - "xin24m" - crystal input - required, + - "ext_i2s" - external I2S clock - optional, + - "gmac_clkin" - external GMAC clock - optional + +Example: Clock controller node: + + cru: cru@20000000 { + compatible = "rockchip,rk3128-cru"; + reg = <0x20000000 0x1000>; + rockchip,grf = <&grf>; + + #clock-cells = <1>; + #reset-cells = <1>; + }; + +Example: UART controller node that consumes the clock generated by the clock + controller: + + uart2: serial@20068000 { + compatible = "rockchip,serial"; + reg = <0x20068000 0x100>; + interrupts = ; + clock-frequency = <24000000>; + clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; + clock-names = "sclk_uart", "pclk_uart"; + }; diff --git a/Bindings/clock/sun8i-de2.txt b/Bindings/clock/sun8i-de2.txt new file mode 100644 index 000000000000..631d27cd89d6 --- /dev/null +++ b/Bindings/clock/sun8i-de2.txt @@ -0,0 +1,31 @@ +Allwinner Display Engine 2.0 Clock Control Binding +-------------------------------------------------- + +Required properties : +- compatible: must contain one of the following compatibles: + - "allwinner,sun8i-a83t-de2-clk" + - "allwinner,sun8i-v3s-de2-clk" + - "allwinner,sun50i-h5-de2-clk" + +- reg: Must contain the registers base address and length +- clocks: phandle to the clocks feeding the display engine subsystem. + Three are needed: + - "mod": the display engine module clock + - "bus": the bus clock for the whole display engine subsystem +- clock-names: Must contain the clock names described just above +- resets: phandle to the reset control for the display engine subsystem. +- #clock-cells : must contain 1 +- #reset-cells : must contain 1 + +Example: +de2_clocks: clock@1000000 { + compatible = "allwinner,sun8i-a83t-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_BUS_DE>, + <&ccu CLK_DE>; + clock-names = "bus", + "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; +}; diff --git a/Bindings/clock/sunxi-ccu.txt b/Bindings/clock/sunxi-ccu.txt index f465647a4dd2..df9fad58facd 100644 --- a/Bindings/clock/sunxi-ccu.txt +++ b/Bindings/clock/sunxi-ccu.txt @@ -6,6 +6,8 @@ Required properties : - "allwinner,sun6i-a31-ccu" - "allwinner,sun8i-a23-ccu" - "allwinner,sun8i-a33-ccu" + - "allwinner,sun8i-a83t-ccu" + - "allwinner,sun8i-a83t-r-ccu" - "allwinner,sun8i-h3-ccu" - "allwinner,sun8i-h3-r-ccu" - "allwinner,sun8i-v3s-ccu" @@ -18,11 +20,12 @@ Required properties : - clocks: phandle to the oscillators feeding the CCU. Two are needed: - "hosc": the high frequency oscillator (usually at 24MHz) - "losc": the low frequency oscillator (usually at 32kHz) + On the A83T, this is the internal 16MHz oscillator divided by 512 - clock-names: Must contain the clock names described just above - #clock-cells : must contain 1 - #reset-cells : must contain 1 -For the PRCM CCUs on H3/A64, two more clocks are needed: +For the PRCM CCUs on A83T/H3/A64, two more clocks are needed: - "pll-periph": the SoC's peripheral PLL from the main CCU - "iosc": the SoC's internal frequency oscillator diff --git a/Bindings/clock/ti,sci-clk.txt b/Bindings/clock/ti,sci-clk.txt new file mode 100644 index 000000000000..1e884c40ab50 --- /dev/null +++ b/Bindings/clock/ti,sci-clk.txt @@ -0,0 +1,37 @@ +Texas Instruments TI-SCI Clocks +=============================== + +All clocks on Texas Instruments' SoCs that contain a System Controller, +are only controlled by this entity. Communication between a host processor +running an OS and the System Controller happens through a protocol known +as TI-SCI[1]. This clock implementation plugs into the common clock +framework and makes use of the TI-SCI protocol on clock API requests. + +[1] Documentation/devicetree/bindings/arm/keystone/ti,sci.txt + +Required properties: +------------------- +- compatible: Must be "ti,k2g-sci-clk" +- #clock-cells: Shall be 2. + In clock consumers, this cell represents the device ID and clock ID + exposed by the PM firmware. The assignments can be found in the header + files .h> (which covers the device IDs) and + .h> (which covers the clock IDs), where + is the SoC involved, for example 'k2g'. + +Examples: +-------- + +pmmc: pmmc { + compatible = "ti,k2g-sci"; + + k2g_clks: clocks { + compatible = "ti,k2g-sci-clk"; + #clock-cells = <2>; + }; +}; + +uart0: serial@2530c00 { + compatible = "ns16550a"; + clocks = <&k2g_clks 0x2c 0>; +}; diff --git a/Bindings/clock/ti-clkctrl.txt b/Bindings/clock/ti-clkctrl.txt new file mode 100644 index 000000000000..48ee6991f2cc --- /dev/null +++ b/Bindings/clock/ti-clkctrl.txt @@ -0,0 +1,56 @@ +Texas Instruments clkctrl clock binding + +Texas Instruments SoCs can have a clkctrl clock controller for each +interconnect target module. The clkctrl clock controller manages functional +and interface clocks for each module. Each clkctrl controller can also +gate one or more optional functional clocks for a module, and can have one +or more clock muxes. There is a clkctrl clock controller typically for each +interconnect target module on omap4 and later variants. + +The clock consumers can specify the index of the clkctrl clock using +the hardware offset from the clkctrl instance register space. The optional +clocks can be specified by clkctrl hardware offset and the index of the +optional clock. + +For more information, please see the Linux clock framework binding at +Documentation/devicetree/bindings/clock/clock-bindings.txt. + +Required properties : +- compatible : shall be "ti,clkctrl" +- #clock-cells : shall contain 2 with the first entry being the instance + offset from the clock domain base and the second being the + clock index + +Example: Clock controller node on omap 4430: + +&cm2 { + l4per: cm@1400 { + cm_l4per@0 { + cm_l4per_clkctrl: clk@20 { + compatible = "ti,clkctrl"; + reg = <0x20 0x1b0>; + #clock-cells = <2>; + }; + }; + }; +}; + +Example: Preprocessor helper macros in dt-bindings/clock/ti-clkctrl.h + +#define OMAP4_CLKCTRL_OFFSET 0x20 +#define OMAP4_CLKCTRL_INDEX(offset) ((offset) - OMAP4_CLKCTRL_OFFSET) +#define MODULEMODE_HWCTRL 1 +#define MODULEMODE_SWCTRL 2 + +#define OMAP4_GPTIMER10_CLKTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_GPTIMER11_CLKTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_GPTIMER2_CLKTRL OMAP4_CLKCTRL_INDEX(0x38) +... +#define OMAP4_GPIO2_CLKCTRL OMAP_CLKCTRL_INDEX(0x60) + +Example: Clock consumer node for GPIO2: + +&gpio2 { + clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0 + &cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 8>; +}; diff --git a/Bindings/common-properties.txt b/Bindings/common-properties.txt index 3193979b1d05..697714f8d75c 100644 --- a/Bindings/common-properties.txt +++ b/Bindings/common-properties.txt @@ -1,6 +1,6 @@ Common properties -The ePAPR specification does not define any properties related to hardware +The Devicetree Specification does not define any properties related to hardware byteswapping, but endianness issues show up frequently in porting Linux to different machine types. This document attempts to provide a consistent way of handling byteswapping across drivers. diff --git a/Bindings/cpufreq/ti-cpufreq.txt b/Bindings/cpufreq/ti-cpufreq.txt index ba0e15ad5bd9..0c38e4b8fc51 100644 --- a/Bindings/cpufreq/ti-cpufreq.txt +++ b/Bindings/cpufreq/ti-cpufreq.txt @@ -63,64 +63,64 @@ cpu0_opp_table: opp-table { * because they can not be enabled simultaneously on a * single SoC. */ - opp50@300000000 { + opp50-300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; opp-supported-hw = <0x06 0x0010>; opp-suspend; }; - opp100@275000000 { + opp100-275000000 { opp-hz = /bits/ 64 <275000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0x00FF>; opp-suspend; }; - opp100@300000000 { + opp100-300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0020>; opp-suspend; }; - opp100@500000000 { + opp100-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp100@600000000 { + opp100-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0040>; }; - opp120@600000000 { + opp120-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp120@720000000 { + opp120-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x06 0x0080>; }; - oppturbo@720000000 { + oppturbo-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x01 0xFFFF>; }; - oppturbo@800000000 { + oppturbo-800000000 { opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x06 0x0100>; }; - oppnitro@1000000000 { + oppnitro-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1325000 1298500 1351500>; opp-supported-hw = <0x04 0x0200>; diff --git a/Bindings/crypto/fsl-sec4.txt b/Bindings/crypto/fsl-sec4.txt index 10a425f451fc..7aef0eae58d4 100644 --- a/Bindings/crypto/fsl-sec4.txt +++ b/Bindings/crypto/fsl-sec4.txt @@ -118,8 +118,8 @@ PROPERTIES Definition: A list of clock name strings in the same order as the clocks property. - Note: All other standard properties (see the ePAPR) are allowed - but are optional. + Note: All other standard properties (see the Devicetree Specification) + are allowed but are optional. EXAMPLE diff --git a/Bindings/crypto/fsl-sec6.txt b/Bindings/crypto/fsl-sec6.txt index baf8a3c1b469..73b0eb950bb3 100644 --- a/Bindings/crypto/fsl-sec6.txt +++ b/Bindings/crypto/fsl-sec6.txt @@ -55,8 +55,8 @@ PROPERTIES triplet that includes the child address, parent address, & length. - Note: All other standard properties (see the ePAPR) are allowed - but are optional. + Note: All other standard properties (see the Devicetree Specification) + are allowed but are optional. EXAMPLE crypto@a0000 { diff --git a/Bindings/crypto/inside-secure-safexcel.txt b/Bindings/crypto/inside-secure-safexcel.txt new file mode 100644 index 000000000000..941bb6a6fb13 --- /dev/null +++ b/Bindings/crypto/inside-secure-safexcel.txt @@ -0,0 +1,27 @@ +Inside Secure SafeXcel cryptographic engine + +Required properties: +- compatible: Should be "inside-secure,safexcel-eip197". +- reg: Base physical address of the engine and length of memory mapped region. +- interrupts: Interrupt numbers for the rings and engine. +- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". + +Optional properties: +- clocks: Reference to the crypto engine clock. + +Example: + + crypto: crypto@800000 { + compatible = "inside-secure,safexcel-eip197"; + reg = <0x800000 0x200000>; + interrupts = , + , + , + , + , + ; + interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", + "eip"; + clocks = <&cpm_syscon0 1 26>; + status = "disabled"; + }; diff --git a/Bindings/crypto/mediatek-crypto.txt b/Bindings/crypto/mediatek-crypto.txt index c204725e5873..450da3661cad 100644 --- a/Bindings/crypto/mediatek-crypto.txt +++ b/Bindings/crypto/mediatek-crypto.txt @@ -6,8 +6,7 @@ Required properties: - interrupts: Should contain the five crypto engines interrupts in numeric order. These are global system and four descriptor rings. - clocks: the clock used by the core -- clock-names: the names of the clock listed in the clocks property. These are - "ethif", "cryp" +- clock-names: Must contain "cryp". - power-domains: Must contain a reference to the PM domain. @@ -20,8 +19,7 @@ Example: , , ; - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, - <ðsys CLK_ETHSYS_CRYPTO>; - clock-names = "ethif","cryp"; + clocks = <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "cryp"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; }; diff --git a/Bindings/display/brcm,bcm-vc4.txt b/Bindings/display/brcm,bcm-vc4.txt index ca02d3e4db91..284e2b14cfbe 100644 --- a/Bindings/display/brcm,bcm-vc4.txt +++ b/Bindings/display/brcm,bcm-vc4.txt @@ -5,7 +5,7 @@ with HDMI output and the HVS (Hardware Video Scaler) for compositing display planes. Required properties for VC4: -- compatible: Should be "brcm,bcm2835-vc4" +- compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4" Required properties for Pixel Valve: - compatible: Should be one of "brcm,bcm2835-pixelvalve0", @@ -54,11 +54,14 @@ Required properties for VEC: See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt Required properties for V3D: -- compatible: Should be "brcm,bcm2835-v3d" +- compatible: Should be "brcm,bcm2835-v3d" or "brcm,cygnus-v3d" - reg: Physical base address and length of the V3D's registers - interrupts: The interrupt number See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +Optional properties for V3D: +- clocks: The clock the unit runs on + Required properties for DSI: - compatible: Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1" - reg: Physical base address and length of the DSI block's registers diff --git a/Bindings/display/bridge/adi,adv7511.txt b/Bindings/display/bridge/adi,adv7511.txt index 00ea670b8c4d..06668bca7ffc 100644 --- a/Bindings/display/bridge/adi,adv7511.txt +++ b/Bindings/display/bridge/adi,adv7511.txt @@ -78,6 +78,7 @@ graph bindings specified in Documentation/devicetree/bindings/graph.txt. remote endpoint phandle should be a reference to a valid mipi_dsi_host device node. - Video port 1 for the HDMI output +- Audio port 2 for the HDMI audio input Example @@ -112,5 +113,12 @@ Example remote-endpoint = <&hdmi_connector_in>; }; }; + + port@2 { + reg = <2>; + codec_endpoint: endpoint { + remote-endpoint = <&i2s0_cpu_endpoint>; + }; + }; }; }; diff --git a/Bindings/display/bridge/renesas,dw-hdmi.txt b/Bindings/display/bridge/renesas,dw-hdmi.txt index f6b3f36d422b..81b68580e199 100644 --- a/Bindings/display/bridge/renesas,dw-hdmi.txt +++ b/Bindings/display/bridge/renesas,dw-hdmi.txt @@ -25,7 +25,8 @@ Required properties: - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt. - ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0 corresponding to the video input of the controller and one port numbered 1 - corresponding to its HDMI output. Each port shall have a single endpoint. + corresponding to its HDMI output, and one port numbered 2 corresponding to + sound input of the controller. Each port shall have a single endpoint. Optional properties: @@ -59,6 +60,12 @@ Example: remote-endpoint = <&hdmi0_con>; }; }; + port@2 { + reg = <2>; + rcar_dw_hdmi0_sound_in: endpoint { + remote-endpoint = <&hdmi_sound_out>; + }; + }; }; }; diff --git a/Bindings/display/exynos/exynos5433-decon.txt b/Bindings/display/exynos/exynos5433-decon.txt index c9fd7b3807e7..549c538b38a5 100644 --- a/Bindings/display/exynos/exynos5433-decon.txt +++ b/Bindings/display/exynos/exynos5433-decon.txt @@ -8,12 +8,13 @@ Required properties: - compatible: value should be one of: "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv"; - reg: physical base address and length of the DECON registers set. -- interrupts: should contain a list of all DECON IP block interrupts in the - order: VSYNC, LCD_SYSTEM. The interrupt specifier format - depends on the interrupt controller used. -- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys" - in the same order as they were listed in the interrupts - property. +- interrupt-names: should contain the interrupt names depending on mode of work: + video mode: "vsync", + command mode: "lcd_sys", + command mode with software trigger: "lcd_sys", "te". +- interrupts or interrupts-extended: list of interrupt specifiers corresponding + to names privided in interrupt-names, as described in + interrupt-controller/interrupts.txt - clocks: must include clock specifiers corresponding to entries in the clock-names property. - clock-names: list of clock names sorted in the same order as the clocks diff --git a/Bindings/display/panel/auo,p320hvn03.txt b/Bindings/display/panel/auo,p320hvn03.txt new file mode 100644 index 000000000000..59bb6cd8aa75 --- /dev/null +++ b/Bindings/display/panel/auo,p320hvn03.txt @@ -0,0 +1,8 @@ +AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel + +Required properties: +- compatible: should be "auo,p320hvn03" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/Bindings/display/panel/display-timing.txt b/Bindings/display/panel/display-timing.txt index 81a75893d1b8..58fa3e48481d 100644 --- a/Bindings/display/panel/display-timing.txt +++ b/Bindings/display/panel/display-timing.txt @@ -57,11 +57,11 @@ can be specified. The parameters are defined as: +----------+-------------------------------------+----------+-------+ - | | ↑ | | | + | | ^ | | | | | |vback_porch | | | - | | ↓ | | | + | | v | | | +----------#######################################----------+-------+ - | # ↑ # | | + | # ^ # | | | # | # | | | hback # | # hfront | hsync | | porch # | hactive # porch | len | @@ -69,15 +69,15 @@ The parameters are defined as: | # | # | | | # |vactive # | | | # | # | | - | # ↓ # | | + | # v # | | +----------#######################################----------+-------+ - | | ↑ | | | + | | ^ | | | | | |vfront_porch | | | - | | ↓ | | | + | | v | | | +----------+-------------------------------------+----------+-------+ - | | ↑ | | | + | | ^ | | | | | |vsync_len | | | - | | ↓ | | | + | | v | | | +----------+-------------------------------------+----------+-------+ Example: diff --git a/Bindings/display/panel/innolux,p079zca.txt b/Bindings/display/panel/innolux,p079zca.txt new file mode 100644 index 000000000000..5c70a8380e58 --- /dev/null +++ b/Bindings/display/panel/innolux,p079zca.txt @@ -0,0 +1,23 @@ +Innolux P079ZCA 7.85" 768x1024 TFT LCD panel + +Required properties: +- compatible: should be "innolux,p079zca" +- reg: DSI virtual channel of the peripheral +- power-supply: phandle of the regulator that provides the supply voltage +- enable-gpios: panel enable gpio + +Optional properties: +- backlight: phandle of the backlight device attached to the panel + +Example: + + &mipi_dsi { + panel { + compatible = "innolux,p079zca"; + reg = <0>; + power-supply = <...>; + backlight = <&backlight>; + enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + }; diff --git a/Bindings/display/panel/nec,nl12880b20-05.txt b/Bindings/display/panel/nec,nl12880b20-05.txt new file mode 100644 index 000000000000..71cbc49ecfab --- /dev/null +++ b/Bindings/display/panel/nec,nl12880b20-05.txt @@ -0,0 +1,8 @@ +NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel + +Required properties: +- compatible: should be "nec,nl12880bc20-05" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/Bindings/display/panel/nlt,nl192108ac18-02d.txt b/Bindings/display/panel/nlt,nl192108ac18-02d.txt new file mode 100644 index 000000000000..1a639fd8778d --- /dev/null +++ b/Bindings/display/panel/nlt,nl192108ac18-02d.txt @@ -0,0 +1,8 @@ +NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel + +Required properties: +- compatible: should be "nlt,nl192108ac18-02d" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/Bindings/display/panel/samsung,s6e3ha2.txt b/Bindings/display/panel/samsung,s6e3ha2.txt index 18854f4c8376..4acea25c244b 100644 --- a/Bindings/display/panel/samsung,s6e3ha2.txt +++ b/Bindings/display/panel/samsung,s6e3ha2.txt @@ -1,7 +1,10 @@ Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel +Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel Required properties: - - compatible: "samsung,s6e3ha2" + - compatible: should be one of: + "samsung,s6e3ha2", + "samsung,s6e3hf2". - reg: the virtual channel number of a DSI peripheral - vdd3-supply: I/O voltage supply - vci-supply: voltage supply for analog circuits diff --git a/Bindings/display/st,stm32-ltdc.txt b/Bindings/display/st,stm32-ltdc.txt new file mode 100644 index 000000000000..8e1476941c0f --- /dev/null +++ b/Bindings/display/st,stm32-ltdc.txt @@ -0,0 +1,36 @@ +* STMicroelectronics STM32 lcd-tft display controller + +- ltdc: lcd-tft display controller host + must be a sub-node of st-display-subsystem + Required properties: + - compatible: "st,stm32-ltdc" + - reg: Physical base address of the IP registers and length of memory mapped region. + - clocks: A list of phandle + clock-specifier pairs, one for each + entry in 'clock-names'. + - clock-names: A list of clock names. For ltdc it should contain: + - "lcd" for the clock feeding the output pixel clock & IP clock. + - resets: reset to be used by the device (defined by use of RCC macro). + Required nodes: + - Video port for RGB output. + +Example: + +/ { + ... + soc { + ... + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F4_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + + port { + ltdc_out_rgb: endpoint { + }; + }; + }; + }; +}; diff --git a/Bindings/display/sunxi/sun4i-drm.txt b/Bindings/display/sunxi/sun4i-drm.txt index 57a8d0610062..b83e6018041d 100644 --- a/Bindings/display/sunxi/sun4i-drm.txt +++ b/Bindings/display/sunxi/sun4i-drm.txt @@ -4,6 +4,44 @@ Allwinner A10 Display Pipeline The Allwinner A10 Display pipeline is composed of several components that are going to be documented below: +For the input port of all components up to the TCON in the display +pipeline, if there are multiple components, the local endpoint IDs +must correspond to the index of the upstream block. For example, if +the remote endpoint is Frontend 1, then the local endpoint ID must +be 1. + +Conversely, for the output ports of the same group, the remote endpoint +ID must be the index of the local hardware block. If the local backend +is backend 1, then the remote endpoint ID must be 1. + +HDMI Encoder +------------ + +The HDMI Encoder supports the HDMI video and audio outputs, and does +CEC. It is one end of the pipeline. + +Required properties: + - compatible: value must be one of: + * allwinner,sun5i-a10s-hdmi + - reg: base address and size of memory-mapped region + - interrupts: interrupt associated to this IP + - clocks: phandles to the clocks feeding the HDMI encoder + * ahb: the HDMI interface clock + * mod: the HDMI module clock + * pll-0: the first video PLL + * pll-1: the second video PLL + - clock-names: the clock names mentioned above + - dmas: phandles to the DMA channels used by the HDMI encoder + * ddc-tx: The channel for DDC transmission + * ddc-rx: The channel for DDC reception + * audio-tx: The channel used for audio transmission + - dma-names: the channel names mentioned above + + - ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoint. The second should be the + output, usually to an HDMI connector. + TV Encoder ---------- @@ -31,6 +69,7 @@ Required properties: * allwinner,sun6i-a31-tcon * allwinner,sun6i-a31s-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the TCON. Three are needed: @@ -47,12 +86,15 @@ Required properties: Documentation/devicetree/bindings/media/video-interfaces.txt. The first port should be the input endpoint, the second one the output - The output should have two endpoints. The first is the block - connected to the TCON channel 0 (usually a panel or a bridge), the - second the block connected to the TCON channel 1 (usually the TV - encoder) + The output may have multiple endpoints. The TCON has two channels, + usually with the first channel being used for the panels interfaces + (RGB, LVDS, etc.), and the second being used for the outputs that + require another controller (TV Encoder, HDMI, etc.). The endpoints + will take an extra property, allwinner,tcon-channel, to specify the + channel the endpoint is associated to. If that property is not + present, the endpoint number will be used as the channel number. -On SoCs other than the A33, there is one more clock required: +On SoCs other than the A33 and V3s, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 DRC @@ -138,6 +180,26 @@ Required properties: Documentation/devicetree/bindings/media/video-interfaces.txt. The first port should be the input endpoints, the second one the outputs +Display Engine 2.0 Mixer +------------------------ + +The DE2 mixer have many functionalities, currently only layer blending is +supported. + +Required properties: + - compatible: value must be one of: + * allwinner,sun8i-v3s-de2-mixer + - reg: base address and size of the memory-mapped region. + - clocks: phandles to the clocks feeding the mixer + * bus: the mixer interface clock + * mod: the mixer module clock + - clock-names: the clock names mentioned above + - resets: phandles to the reset controllers driving the mixer + +- ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoints, the second one the output + Display Engine Pipeline ----------------------- @@ -148,13 +210,15 @@ extra node. Required properties: - compatible: value must be one of: + * allwinner,sun5i-a10s-display-engine * allwinner,sun5i-a13-display-engine * allwinner,sun6i-a31-display-engine * allwinner,sun6i-a31s-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine - frontends available. + frontends (DE 1.0) or mixers (DE 2.0) available. Example: @@ -173,6 +237,57 @@ panel: panel { }; }; +connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; +}; + +hdmi: hdmi@01c16000 { + compatible = "allwinner,sun5i-a10s-hdmi"; + reg = <0x01c16000 0x1000>; + interrupts = <58>; + clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, + <&ccu CLK_PLL_VIDEO0_2X>, + <&ccu CLK_PLL_VIDEO1_2X>; + clock-names = "ahb", "mod", "pll-0", "pll-1"; + dmas = <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_DEDICATED 24>; + dma-names = "ddc-tx", "ddc-rx", "audio-tx"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + hdmi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_hdmi>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; + }; + }; +}; + tve0: tv-encoder@01c0a000 { compatible = "allwinner,sun4i-a10-tv-encoder"; reg = <0x01c0a000 0x1000>; diff --git a/Bindings/display/zte,vou.txt b/Bindings/display/zte,vou.txt index 9c356284232b..38476475fd60 100644 --- a/Bindings/display/zte,vou.txt +++ b/Bindings/display/zte,vou.txt @@ -58,6 +58,18 @@ Required properties: integer cells. The first cell is the offset of SYSCTRL register used to control TV Encoder DAC power, and the second cell is the bit mask. +* VGA output device + +Required properties: + - compatible: should be "zte,zx296718-vga" + - reg: Physical base address and length of the VGA device IO region + - interrupts : VGA interrupt number to CPU + - clocks: Phandle with clock-specifier pointing to VGA I2C clock. + - clock-names: Must be "i2c_wclk". + - zte,vga-power-control: the phandle to SYSCTRL block followed by two + integer cells. The first cell is the offset of SYSCTRL register used + to control VGA DAC power, and the second cell is the bit mask. + Example: vou: vou@1440000 { @@ -81,6 +93,15 @@ vou: vou@1440000 { "main_wclk", "aux_wclk"; }; + vga: vga@8000 { + compatible = "zte,zx296718-vga"; + reg = <0x8000 0x1000>; + interrupts = ; + clocks = <&topcrm VGA_I2C_WCLK>; + clock-names = "i2c_wclk"; + zte,vga-power-control = <&sysctrl 0x170 0xe0>; + }; + hdmi: hdmi@c000 { compatible = "zte,zx296718-hdmi"; reg = <0xc000 0x4000>; diff --git a/Bindings/dma/arm-pl08x.txt b/Bindings/dma/arm-pl08x.txt index 8a0097a029d3..0ba81f79266f 100644 --- a/Bindings/dma/arm-pl08x.txt +++ b/Bindings/dma/arm-pl08x.txt @@ -3,6 +3,11 @@ Required properties: - compatible: "arm,pl080", "arm,primecell"; "arm,pl081", "arm,primecell"; + "faraday,ftdmac020", "arm,primecell" +- arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded + in the hardware and must be specified here as <0x0003b080>. This number + follows the PrimeCell standard numbering using the JEP106 vendor code 0x38 + for Faraday Technology. - reg: Address range of the PL08x registers - interrupt: The PL08x interrupt number - clocks: The clock running the IP core clock @@ -20,8 +25,8 @@ Optional properties: - dma-requests: contains the total number of DMA requests supported by the DMAC - memcpy-burst-size: the size of the bursts for memcpy: 1, 4, 8, 16, 32 64, 128 or 256 bytes are legal values -- memcpy-bus-width: the bus width used for memcpy: 8, 16 or 32 are legal - values +- memcpy-bus-width: the bus width used for memcpy in bits: 8, 16 or 32 are legal + values, the Faraday FTDMAC020 can also accept 64 bits Clients Required properties: diff --git a/Bindings/dma/brcm,iproc-sba.txt b/Bindings/dma/brcm,iproc-sba.txt new file mode 100644 index 000000000000..092913a28457 --- /dev/null +++ b/Bindings/dma/brcm,iproc-sba.txt @@ -0,0 +1,29 @@ +* Broadcom SBA RAID engine + +Required properties: +- compatible: Should be one of the following + "brcm,iproc-sba" + "brcm,iproc-sba-v2" + The "brcm,iproc-sba" has support for only 6 PQ coefficients + The "brcm,iproc-sba-v2" has support for only 30 PQ coefficients +- mboxes: List of phandle and mailbox channel specifiers + +Example: + +raid_mbox: mbox@67400000 { + ... + #mbox-cells = <3>; + ... +}; + +raid0 { + compatible = "brcm,iproc-sba-v2"; + mboxes = <&raid_mbox 0 0x1 0xffff>, + <&raid_mbox 1 0x1 0xffff>, + <&raid_mbox 2 0x1 0xffff>, + <&raid_mbox 3 0x1 0xffff>, + <&raid_mbox 4 0x1 0xffff>, + <&raid_mbox 5 0x1 0xffff>, + <&raid_mbox 6 0x1 0xffff>, + <&raid_mbox 7 0x1 0xffff>; +}; diff --git a/Bindings/dma/renesas,rcar-dmac.txt b/Bindings/dma/renesas,rcar-dmac.txt index 3316a9c2e638..79a204d50234 100644 --- a/Bindings/dma/renesas,rcar-dmac.txt +++ b/Bindings/dma/renesas,rcar-dmac.txt @@ -30,8 +30,9 @@ Required Properties: - interrupts: interrupt specifiers for the DMAC, one for each entry in interrupt-names. -- interrupt-names: one entry per channel, named "ch%u", where %u is the - channel number ranging from zero to the number of channels minus one. +- interrupt-names: one entry for the error interrupt, named "error", plus one + entry per channel, named "ch%u", where %u is the channel number ranging from + zero to the number of channels minus one. - clock-names: "fck" for the functional clock - clocks: a list of phandle + clock-specifier pairs, one for each entry diff --git a/Bindings/dma/shdma.txt b/Bindings/dma/shdma.txt index 2a3f3b8946b9..a91920a49433 100644 --- a/Bindings/dma/shdma.txt +++ b/Bindings/dma/shdma.txt @@ -1,6 +1,6 @@ * SHDMA Device Tree bindings -Sh-/r-mobile and r-car systems often have multiple identical DMA controller +Sh-/r-mobile and R-Car systems often have multiple identical DMA controller instances, capable of serving any of a common set of DMA slave devices, using the same configuration. To describe this topology we require all compatible SHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible diff --git a/Bindings/fsi/fsi-master-gpio.txt b/Bindings/fsi/fsi-master-gpio.txt new file mode 100644 index 000000000000..a767259dedad --- /dev/null +++ b/Bindings/fsi/fsi-master-gpio.txt @@ -0,0 +1,24 @@ +Device-tree bindings for gpio-based FSI master driver +----------------------------------------------------- + +Required properties: + - compatible = "fsi-master-gpio"; + - clock-gpios = ; : GPIO for FSI clock + - data-gpios = ; : GPIO for FSI data signal + +Optional properties: + - enable-gpios = ; : GPIO for enable signal + - trans-gpios = ; : GPIO for voltage translator enable + - mux-gpios = ; : GPIO for pin multiplexing with other + functions (eg, external FSI masters) + +Examples: + + fsi-master { + compatible = "fsi-master-gpio", "fsi-master"; + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + } diff --git a/Bindings/gpio/gpio-exar.txt b/Bindings/gpio/gpio-exar.txt new file mode 100644 index 000000000000..4540d61824af --- /dev/null +++ b/Bindings/gpio/gpio-exar.txt @@ -0,0 +1,5 @@ +Exportable MPIO interface of Exar UART chips + +Required properties of the device: + - exar,first-pin: first exportable pins (0..15) + - ngpios: number of exportable pins (1..16) diff --git a/Bindings/gpio/gpio-mvebu.txt b/Bindings/gpio/gpio-mvebu.txt index 01e331a5f3e7..38ca2201e8ae 100644 --- a/Bindings/gpio/gpio-mvebu.txt +++ b/Bindings/gpio/gpio-mvebu.txt @@ -2,17 +2,27 @@ Required properties: -- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada - 370. "marvell,mv78200-gpio" should be used for the Discovery - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP - SoCs (MV78230, MV78260, MV78460). +- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". + + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" + should be used for the Discovery MV78200. + + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs + (MV78230, MV78260, MV78460). + + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K + SoCs (either from AP or CP), see + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt + and + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt + for specific details about the offset property. - reg: Address and length of the register set for the device. Only one entry is expected, except for the "marvell,armadaxp-gpio" variant for which two entries are expected: one for the general registers, - one for the per-cpu registers. + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. - interrupts: The list of interrupts that are used for all the pins managed by this GPIO bank. There can be more than one interrupt diff --git a/Bindings/gpio/gpio.txt b/Bindings/gpio/gpio.txt index 84ede036f73d..802402f6cc5d 100644 --- a/Bindings/gpio/gpio.txt +++ b/Bindings/gpio/gpio.txt @@ -74,11 +74,14 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. Optional standard bitfield specifiers for the last cell: - Bit 0: 0 means active high, 1 means active low -- Bit 1: 1 means single-ended wiring, see: +- Bit 1: 0 mean push-pull wiring, see: + https://en.wikipedia.org/wiki/Push-pull_output + 1 means single-ended wiring, see: https://en.wikipedia.org/wiki/Single-ended_triode - When used with active-low, this means open drain/collector, see: +- Bit 2: 0 means open-source, 1 means open drain, see: https://en.wikipedia.org/wiki/Open_collector - When used with active-high, this means open source/emitter +- Bit 3: 0 means the output should be maintained during sleep/low-power mode + 1 means the output state can be lost during sleep/low-power mode 1.1) GPIO specifier best practices ---------------------------------- @@ -282,8 +285,8 @@ Example 1: }; Here, a single GPIO controller has GPIOs 0..9 routed to pin controller -pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's -pins 50..59. +pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's +pins 50..69. Example 2: diff --git a/Bindings/gpio/gpio_atmel.txt b/Bindings/gpio/gpio_atmel.txt index 85f8c0d084fa..29416f9c3220 100644 --- a/Bindings/gpio/gpio_atmel.txt +++ b/Bindings/gpio/gpio_atmel.txt @@ -5,9 +5,13 @@ Required properties: - reg: Should contain GPIO controller registers location and length - interrupts: Should be the port interrupt shared by all the pins. - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify optional parameters (currently - unused). + the second cell is used to specify optional parameters to declare if the GPIO + is active high or low. See gpio.txt. - gpio-controller: Marks the device node as a GPIO controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be two. The first cell is the pin number and the + second cell is used to specify irq type flags, see the two cell description + in interrupt-controller/interrupts.txt for details. optional properties: - #gpio-lines: Number of gpio if absent 32. @@ -21,5 +25,7 @@ Example: #gpio-cells = <2>; gpio-controller; #gpio-lines = <19>; + interrupt-controller; + #interrupt-cells = <2>; }; diff --git a/Bindings/gpio/ingenic,gpio.txt b/Bindings/gpio/ingenic,gpio.txt new file mode 100644 index 000000000000..7988aeb725f4 --- /dev/null +++ b/Bindings/gpio/ingenic,gpio.txt @@ -0,0 +1,46 @@ +Ingenic jz47xx GPIO controller + +That the Ingenic GPIO driver node must be a sub-node of the Ingenic pinctrl +driver node. + +Required properties: +-------------------- + + - compatible: Must contain one of: + - "ingenic,jz4740-gpio" + - "ingenic,jz4770-gpio" + - "ingenic,jz4780-gpio" + - reg: The GPIO bank number. + - interrupt-controller: Marks the device node as an interrupt controller. + - interrupts: Interrupt specifier for the controllers interrupt. + - #interrupt-cells: Should be 2. Refer to + ../interrupt-controller/interrupts.txt for more details. + - gpio-controller: Marks the device node as a GPIO controller. + - #gpio-cells: Should be 2. The first cell is the GPIO number and the second + cell specifies GPIO flags, as defined in . Only the + GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. + - gpio-ranges: Range of pins managed by the GPIO controller. Refer to + 'gpio.txt' in this directory for more details. + +Example: +-------- + +&pinctrl { + #address-cells = <1>; + #size-cells = <0>; + + gpa: gpio@0 { + compatible = "ingenic,jz4740-gpio"; + reg = <0>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <28>; + }; +}; diff --git a/Bindings/gpio/renesas,gpio-rcar.txt b/Bindings/gpio/renesas,gpio-rcar.txt index 7c1ab3b3254f..6826a371fb69 100644 --- a/Bindings/gpio/renesas,gpio-rcar.txt +++ b/Bindings/gpio/renesas,gpio-rcar.txt @@ -3,6 +3,7 @@ Required Properties: - compatible: should contain one of the following. + - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller. - "renesas,gpio-r8a7778": for R8A7778 (R-Mobile M1) compatible GPIO controller. - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller. - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller. diff --git a/Bindings/gpu/arm,mali-midgard.txt b/Bindings/gpu/arm,mali-midgard.txt new file mode 100644 index 000000000000..5aa5926029ee --- /dev/null +++ b/Bindings/gpu/arm,mali-midgard.txt @@ -0,0 +1,86 @@ +ARM Mali Midgard GPU +==================== + +Required properties: + +- compatible : + * Must contain one of the following: + + "arm,mali-t604" + + "arm,mali-t624" + + "arm,mali-t628" + + "arm,mali-t720" + + "arm,mali-t760" + + "arm,mali-t820" + + "arm,mali-t830" + + "arm,mali-t860" + + "arm,mali-t880" + * which must be preceded by one of the following vendor specifics: + + "amlogic,meson-gxm-mali" + + "rockchip,rk3288-mali" + +- reg : Physical base address of the device and length of the register area. + +- interrupts : Contains the three IRQ lines required by Mali Midgard devices. + +- interrupt-names : Contains the names of IRQ resources in the order they were + provided in the interrupts property. Must contain: "job", "mmu", "gpu". + + +Optional properties: + +- clocks : Phandle to clock for the Mali Midgard device. + +- mali-supply : Phandle to regulator for the Mali device. Refer to + Documentation/devicetree/bindings/regulator/regulator.txt for details. + +- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt + for details. + + +Example for a Mali-T760: + +gpu@ffa30000 { + compatible = "rockchip,rk3288-mali", "arm,mali-t760"; + reg = <0xffa30000 0x10000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru ACLK_GPU>; + mali-supply = <&vdd_gpu>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3288_PD_GPU>; +}; + +gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; +}; diff --git a/Bindings/graph.txt b/Bindings/graph.txt index fcb1c6a4787b..0415e2c53ba0 100644 --- a/Bindings/graph.txt +++ b/Bindings/graph.txt @@ -34,7 +34,7 @@ remote device, an 'endpoint' child node must be provided for each link. If more than one port is present in a device node or there is more than one endpoint at a port, or a port node needs to be associated with a selected hardware interface, a common scheme using '#address-cells', '#size-cells' -and 'reg' properties is used number the nodes. +and 'reg' properties is used to number the nodes. device { ... @@ -89,9 +89,9 @@ Links between endpoints Each endpoint should contain a 'remote-endpoint' phandle property that points to the corresponding endpoint in the port of the remote device. In turn, the -remote endpoint should contain a 'remote-endpoint' property. If it has one, -it must not point to another than the local endpoint. Two endpoints with their -'remote-endpoint' phandles pointing at each other form a link between the +remote endpoint should contain a 'remote-endpoint' property. If it has one, it +must not point to anything other than the local endpoint. Two endpoints with +their 'remote-endpoint' phandles pointing at each other form a link between the containing ports. device-1 { @@ -110,13 +110,12 @@ device-2 { }; }; - Required properties ------------------- If there is more than one 'port' or more than one 'endpoint' node or 'reg' -property is present in port and/or endpoint nodes the following properties -are required in a relevant parent node: +property present in the port and/or endpoint nodes then the following +properties are required in a relevant parent node: - #address-cells : number of cells required to define port/endpoint identifier, should be 1. diff --git a/Bindings/hwlock/sprd-hwspinlock.txt b/Bindings/hwlock/sprd-hwspinlock.txt new file mode 100644 index 000000000000..581db9d941ba --- /dev/null +++ b/Bindings/hwlock/sprd-hwspinlock.txt @@ -0,0 +1,23 @@ +SPRD Hardware Spinlock Device Binding +------------------------------------- + +Required properties : +- compatible : should be "sprd,hwspinlock-r3p0". +- reg : the register address of hwspinlock. +- #hwlock-cells : hwlock users only use the hwlock id to represent a specific + hwlock, so the number of cells should be <1> here. +- clock-names : Must contain "enable". +- clocks : Must contain a phandle entry for the clock in clock-names, see the + common clock bindings. + +Please look at the generic hwlock binding for usage information for consumers, +"Documentation/devicetree/bindings/hwlock/hwlock.txt" + +Example of hwlock provider: + hwspinlock@40500000 { + compatible = "sprd,hwspinlock-r3p0"; + reg = <0 0x40500000 0 0x1000>; + #hwlock-cells = <1>; + clock-names = "enable"; + clocks = <&clk_aon_apb_gates0 22>; + }; diff --git a/Bindings/i2c/i2c-aspeed.txt b/Bindings/i2c/i2c-aspeed.txt new file mode 100644 index 000000000000..bd6480b19535 --- /dev/null +++ b/Bindings/i2c/i2c-aspeed.txt @@ -0,0 +1,48 @@ +Device tree configuration for the I2C busses on the AST24XX and AST25XX SoCs. + +Required Properties: +- #address-cells : should be 1 +- #size-cells : should be 0 +- reg : address offset and range of bus +- compatible : should be "aspeed,ast2400-i2c-bus" + or "aspeed,ast2500-i2c-bus" +- clocks : root clock of bus, should reference the APB + clock +- interrupts : interrupt number +- interrupt-parent : interrupt controller for bus, should reference a + aspeed,ast2400-i2c-ic or aspeed,ast2500-i2c-ic + interrupt controller + +Optional Properties: +- bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not + specified +- multi-master : states that there is another master active on this bus. + +Example: + +i2c { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e78a000 0x1000>; + + i2c_ic: interrupt-controller@0 { + #interrupt-cells = <1>; + compatible = "aspeed,ast2400-i2c-ic"; + reg = <0x0 0x40>; + interrupts = <12>; + interrupt-controller; + }; + + i2c0: i2c-bus@40 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x40 0x40>; + compatible = "aspeed,ast2400-i2c-bus"; + clocks = <&clk_apb>; + bus-frequency = <100000>; + interrupts = <0>; + interrupt-parent = <&i2c_ic>; + }; +}; diff --git a/Bindings/i2c/i2c-designware.txt b/Bindings/i2c/i2c-designware.txt index fee26dc3e858..fbb0a6d8b964 100644 --- a/Bindings/i2c/i2c-designware.txt +++ b/Bindings/i2c/i2c-designware.txt @@ -20,7 +20,7 @@ Optional properties : - i2c-sda-falling-time-ns : should contain the SDA falling time in nanoseconds. This value which is by default 300ns is used to compute the tHIGH period. -Example : +Examples : i2c@f0000 { #address-cells = <1>; @@ -43,3 +43,17 @@ Example : i2c-sda-falling-time-ns = <300>; i2c-scl-falling-time-ns = <300>; }; + + i2c@1120000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2000 0x100>; + clock-frequency = <400000>; + clocks = <&i2cclk>; + interrupts = <0>; + + eeprom@64 { + compatible = "linux,slave-24c02"; + reg = <0x40000064>; + }; + }; diff --git a/Bindings/i2c/i2c-mt6577.txt b/Bindings/i2c/i2c-mtk.txt similarity index 77% rename from Bindings/i2c/i2c-mt6577.txt rename to Bindings/i2c/i2c-mtk.txt index 0ce6fa3242f0..bd5a7befd951 100644 --- a/Bindings/i2c/i2c-mt6577.txt +++ b/Bindings/i2c/i2c-mtk.txt @@ -4,11 +4,11 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: value should be either of the following. - (a) "mediatek,mt6577-i2c", for i2c compatible with mt6577 i2c. - (b) "mediatek,mt6589-i2c", for i2c compatible with mt6589 i2c. - (c) "mediatek,mt8127-i2c", for i2c compatible with mt8127 i2c. - (d) "mediatek,mt8135-i2c", for i2c compatible with mt8135 i2c. - (e) "mediatek,mt8173-i2c", for i2c compatible with mt8173 i2c. + "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for Mediatek mt2701 + "mediatek,mt6577-i2c": for i2c compatible with mt6577. + "mediatek,mt6589-i2c": for i2c compatible with mt6589. + "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for i2c compatible with mt7623. + "mediatek,mt8173-i2c": for i2c compatible with mt8173. - reg: physical base address of the controller and dma base, length of memory mapped region. - interrupts: interrupt number to the cpu. diff --git a/Bindings/i2c/i2c-mux-gpmux.txt b/Bindings/i2c/i2c-mux-gpmux.txt new file mode 100644 index 000000000000..2907dab56298 --- /dev/null +++ b/Bindings/i2c/i2c-mux-gpmux.txt @@ -0,0 +1,99 @@ +General Purpose I2C Bus Mux + +This binding describes an I2C bus multiplexer that uses a mux controller +from the mux subsystem to route the I2C signals. + + .-----. .-----. + | dev | | dev | + .------------. '-----' '-----' + | SoC | | | + | | .--------+--------' + | .------. | .------+ child bus A, on MUX value set to 0 + | | I2C |-|--| Mux | + | '------' | '--+---+ child bus B, on MUX value set to 1 + | .------. | | '----------+--------+--------. + | | MUX- | | | | | | + | | Ctrl |-|-----+ .-----. .-----. .-----. + | '------' | | dev | | dev | | dev | + '------------' '-----' '-----' '-----' + +Required properties: +- compatible: i2c-mux +- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side + port is connected to. +- mux-controls: The phandle of the mux controller to use for operating the + mux. +* Standard I2C mux properties. See i2c-mux.txt in this directory. +* I2C child bus nodes. See i2c-mux.txt in this directory. The sub-bus number + is also the mux-controller state described in ../mux/mux-controller.txt + +Optional properties: +- mux-locked: If present, explicitly allow unrelated I2C transactions on the + parent I2C adapter at these times: + + during setup of the multiplexer + + between setup of the multiplexer and the child bus I2C transaction + + between the child bus I2C transaction and releasing of the multiplexer + + during releasing of the multiplexer + However, I2C transactions to devices behind all I2C multiplexers connected + to the same parent adapter that this multiplexer is connected to are blocked + for the full duration of the complete multiplexed I2C transaction (i.e. + including the times covered by the above list). + If mux-locked is not present, the multiplexer is assumed to be parent-locked. + This means that no unrelated I2C transactions are allowed on the parent I2C + adapter for the complete multiplexed I2C transaction. + The properties of mux-locked and parent-locked multiplexers are discussed + in more detail in Documentation/i2c/i2c-topology. + +For each i2c child node, an I2C child bus will be created. They will +be numbered based on their order in the device tree. + +Whenever an access is made to a device on a child bus, the value set +in the relevant node's reg property will be set as the state in the +mux controller. + +Example: + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, + <&pioA 1 GPIO_ACTIVE_HIGH>; + }; + + i2c-mux { + compatible = "i2c-mux"; + mux-locked; + i2c-parent = <&i2c1>; + + mux-controls = <&mux>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ssd1307: oled@3c { + compatible = "solomon,ssd1307fb-i2c"; + reg = <0x3c>; + pwms = <&pwm 4 3000>; + reset-gpios = <&gpio2 7 1>; + reset-active-low; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + pca9555: pca9555@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; diff --git a/Bindings/i2c/i2c-pca-platform.txt b/Bindings/i2c/i2c-pca-platform.txt new file mode 100644 index 000000000000..f1f3876bb8e8 --- /dev/null +++ b/Bindings/i2c/i2c-pca-platform.txt @@ -0,0 +1,29 @@ +* NXP PCA PCA9564/PCA9665 I2C controller + +The PCA9564/PCA9665 serves as an interface between most standard +parallel-bus microcontrollers/microprocessors and the serial I2C-bus +and allows the parallel bus system to communicate bi-directionally +with the I2C-bus. + +Required properties : + + - reg : Offset and length of the register set for the device + - compatible : one of "nxp,pca9564" or "nxp,pca9665" + +Optional properties + - interrupts : the interrupt number + - interrupt-parent : the phandle for the interrupt controller. + If an interrupt is not specified polling will be used. + - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line + is active low, it should be marked GPIO_ACTIVE_LOW. + - clock-frequency : I2C bus frequency. + +Example: + i2c0: i2c@80000 { + compatible = "nxp,pca9564"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x80000 0x4>; + reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + clock-frequency = <100000>; + }; diff --git a/Bindings/i2c/i2c-zx2967.txt b/Bindings/i2c/i2c-zx2967.txt new file mode 100644 index 000000000000..cb806d1ae4c9 --- /dev/null +++ b/Bindings/i2c/i2c-zx2967.txt @@ -0,0 +1,22 @@ +ZTE zx2967 I2C controller + +Required properties: + - compatible: must be "zte,zx296718-i2c" + - reg: physical address and length of the device registers + - interrupts: a single interrupt specifier + - clocks: clock for the device + - #address-cells: should be <1> + - #size-cells: should be <0> + - clock-frequency: the desired I2C bus clock frequency. + +Examples: + + i2c@112000 { + compatible = "zte,zx296718-i2c"; + reg = <0x00112000 0x1000>; + interrupts = ; + clocks = <&osc24m>; + #address-cells = <1> + #size-cells = <0>; + clock-frequency = <1600000>; + }; diff --git a/Bindings/iio/adc/amlogic,meson-saradc.txt b/Bindings/iio/adc/amlogic,meson-saradc.txt index 047189192aec..f413e82c8b83 100644 --- a/Bindings/iio/adc/amlogic,meson-saradc.txt +++ b/Bindings/iio/adc/amlogic,meson-saradc.txt @@ -2,6 +2,8 @@ Required properties: - compatible: depending on the SoC this should be one of: + - "amlogic,meson8-saradc" for Meson8 + - "amlogic,meson8b-saradc" for Meson8b - "amlogic,meson-gxbb-saradc" for GXBB - "amlogic,meson-gxl-saradc" for GXL - "amlogic,meson-gxm-saradc" for GXM diff --git a/Bindings/iio/adc/renesas,gyroadc.txt b/Bindings/iio/adc/renesas,gyroadc.txt index f5b0adae6010..df5b9f2ad8d8 100644 --- a/Bindings/iio/adc/renesas,gyroadc.txt +++ b/Bindings/iio/adc/renesas,gyroadc.txt @@ -1,4 +1,4 @@ -* Renesas RCar GyroADC device driver +* Renesas R-Car GyroADC device driver The GyroADC block is a reduced SPI block with up to 8 chipselect lines, which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs @@ -16,8 +16,7 @@ Required properties: - clocks: References to all the clocks specified in the clock-names property as specified in Documentation/devicetree/bindings/clock/clock-bindings.txt. -- clock-names: Shall contain "fck" and "if". The "fck" is the GyroADC block - clock, the "if" is the interface clock. +- clock-names: Shall contain "fck". The "fck" is the GyroADC block clock. - power-domains: Must contain a reference to the PM domain, if available. - #address-cells: Should be <1> (setting for the subnodes) for all ADCs except for "fujitsu,mb88101a". Should be <0> (setting for @@ -75,8 +74,8 @@ Example: adc@e6e54000 { compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; reg = <0 0xe6e54000 0 64>; - clocks = <&mstp9_clks R8A7791_CLK_GYROADC>, <&clk_65m>; - clock-names = "fck", "if"; + clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; + clock-names = "fck"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; pinctrl-0 = <&adc_pins>; diff --git a/Bindings/iio/adc/st,stm32-adc.txt b/Bindings/iio/adc/st,stm32-adc.txt index e35f9f1b3200..8310073f14e1 100644 --- a/Bindings/iio/adc/st,stm32-adc.txt +++ b/Bindings/iio/adc/st,stm32-adc.txt @@ -21,11 +21,19 @@ own configurable sequence and trigger: Contents of a stm32 adc root node: ----------------------------------- Required properties: -- compatible: Should be "st,stm32f4-adc-core". +- compatible: Should be one of: + "st,stm32f4-adc-core" + "st,stm32h7-adc-core" - reg: Offset and length of the ADC block register set. - interrupts: Must contain the interrupt for ADC block. -- clocks: Clock for the analog circuitry (common to all ADCs). -- clock-names: Must be "adc". +- clocks: Core can use up to two clocks, depending on part used: + - "adc" clock: for the analog circuitry, common to all ADCs. + It's required on stm32f4. + It's optional on stm32h7. + - "bus" clock: for registers access, common to all ADCs. + It's not present on stm32f4. + It's required on stm32h7. +- clock-names: Must be "adc" and/or "bus" depending on part used. - interrupt-controller: Identifies the controller node as interrupt-parent - vref-supply: Phandle to the vref input analog reference voltage. - #interrupt-cells = <1>; @@ -42,14 +50,18 @@ An ADC block node should contain at least one subnode, representing an ADC instance available on the machine. Required properties: -- compatible: Should be "st,stm32f4-adc". +- compatible: Should be one of: + "st,stm32f4-adc" + "st,stm32h7-adc" - reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). -- clocks: Input clock private to this ADC instance. +- clocks: Input clock private to this ADC instance. It's required only on + stm32f4, that has per instance clock input for registers access. - interrupt-parent: Phandle to the parent interrupt controller. - interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or 2 for adc@200). - st,adc-channels: List of single-ended channels muxed for this ADC. - It can have up to 16 channels, numbered from 0 to 15 (resp. for in0..in15). + It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered + from 0 to 15 or 19 (resp. for in0..in15 or in0..in19). - #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in Documentation/devicetree/bindings/iio/iio-bindings.txt @@ -58,7 +70,9 @@ Optional properties: See ../../dma/dma.txt for details. - dma-names: Must be "rx" when dmas property is being used. - assigned-resolution-bits: Resolution (bits) to use for conversions. Must - match device available resolutions (e.g. can be 6, 8, 10 or 12 on stm32f4). + match device available resolutions: + * can be 6, 8, 10 or 12 on stm32f4 + * can be 8, 10, 12, 14 or 16 on stm32h7 Default is maximum resolution if unset. Example: diff --git a/Bindings/iio/adc/ti-adc084s021.txt b/Bindings/iio/adc/ti-adc084s021.txt new file mode 100644 index 000000000000..4259e50620bc --- /dev/null +++ b/Bindings/iio/adc/ti-adc084s021.txt @@ -0,0 +1,19 @@ +* Texas Instruments' ADC084S021 + +Required properties: + - compatible : Must be "ti,adc084s021" + - reg : SPI chip select number for the device + - vref-supply : The regulator supply for ADC reference voltage + - spi-cpol : Per spi-bus bindings + - spi-cpha : Per spi-bus bindings + - spi-max-frequency : Per spi-bus bindings + +Example: +adc@0 { + compatible = "ti,adc084s021"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-cpol; + spi-cpha; + spi-max-frequency = <16000000>; +}; diff --git a/Bindings/iio/adc/ti-adc108s102.txt b/Bindings/iio/adc/ti-adc108s102.txt new file mode 100644 index 000000000000..bbbbb4a9f58f --- /dev/null +++ b/Bindings/iio/adc/ti-adc108s102.txt @@ -0,0 +1,18 @@ +* Texas Instruments' ADC108S102 and ADC128S102 ADC chip + +Required properties: + - compatible: Should be "ti,adc108s102" + - reg: spi chip select number for the device + - vref-supply: The regulator supply for ADC reference voltage + +Recommended properties: + - spi-max-frequency: Definition as per + Documentation/devicetree/bindings/spi/spi-bus.txt + +Example: +adc@0 { + compatible = "ti,adc108s102"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; +}; diff --git a/Bindings/iio/imu/st_lsm6dsx.txt b/Bindings/iio/imu/st_lsm6dsx.txt index 8305fb05ffda..6f28ff55f3ec 100644 --- a/Bindings/iio/imu/st_lsm6dsx.txt +++ b/Bindings/iio/imu/st_lsm6dsx.txt @@ -13,7 +13,8 @@ Optional properties: "data ready" (valid values: 1 or 2). - interrupt-parent: should be the phandle for the interrupt controller - interrupts: interrupt mapping for IRQ. It should be configured with - flags IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING. + flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or + IRQ_TYPE_EDGE_FALLING. Refer to interrupt-controller/interrupts.txt for generic interrupt client node bindings. diff --git a/Bindings/iio/multiplexer/io-channel-mux.txt b/Bindings/iio/multiplexer/io-channel-mux.txt new file mode 100644 index 000000000000..c82794002595 --- /dev/null +++ b/Bindings/iio/multiplexer/io-channel-mux.txt @@ -0,0 +1,39 @@ +I/O channel multiplexer bindings + +If a multiplexer is used to select which hardware signal is fed to +e.g. an ADC channel, these bindings describe that situation. + +Required properties: +- compatible : "io-channel-mux" +- io-channels : Channel node of the parent channel that has multiplexed + input. +- io-channel-names : Should be "parent". +- #address-cells = <1>; +- #size-cells = <0>; +- mux-controls : Mux controller node to use for operating the mux +- channels : List of strings, labeling the mux controller states. + +For each non-empty string in the channels property, an io-channel will +be created. The number of this io-channel is the same as the index into +the list of strings in the channels property, and also matches the mux +controller state. The mux controller state is described in +../mux/mux-controller.txt + +Example: + mux: mux-controller { + compatible = "mux-gpio"; + #mux-control-cells = <0>; + + mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, + <&pioA 1 GPIO_ACTIVE_HIGH>; + }; + + adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&mux>; + + channels = "sync", "in", "system-regulator"; + }; diff --git a/Bindings/iio/proximity/as3935.txt b/Bindings/iio/proximity/as3935.txt index ae23dd8da736..38d74314b7ab 100644 --- a/Bindings/iio/proximity/as3935.txt +++ b/Bindings/iio/proximity/as3935.txt @@ -3,6 +3,7 @@ Austrian Microsystems AS3935 Franklin lightning sensor device driver Required properties: - compatible: must be "ams,as3935" - reg: SPI chip select number for the device + - spi-max-frequency: specifies maximum SPI clock frequency - spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI slave node bindings. - interrupt-parent : should be the phandle for the interrupt controller @@ -21,6 +22,7 @@ Example: as3935@0 { compatible = "ams,as3935"; reg = <0>; + spi-max-frequency = <400000>; spi-cpha; interrupt-parent = <&gpio1>; interrupts = <16 1>; diff --git a/Bindings/input/dlink,dir685-touchkeys.txt b/Bindings/input/dlink,dir685-touchkeys.txt new file mode 100644 index 000000000000..10dec1c57abf --- /dev/null +++ b/Bindings/input/dlink,dir685-touchkeys.txt @@ -0,0 +1,21 @@ +* D-Link DIR-685 Touchkeys + +This is a I2C one-off touchkey controller based on the Cypress Semiconductor +CY8C214 MCU with some firmware in its internal 8KB flash. The circuit +board inside the router is named E119921. + +The touchkey device node should be placed inside an I2C bus node. + +Required properties: +- compatible: must be "dlink,dir685-touchkeys" +- reg: the I2C address of the touchkeys +- interrupts: reference to the interrupt number + +Example: + +touchkeys@26 { + compatible = "dlink,dir685-touchkeys"; + reg = <0x26>; + interrupt-parent = <&gpio0>; + interrupts = <17 IRQ_TYPE_EDGE_FALLING>; +}; diff --git a/Bindings/input/touchscreen/st,stmfts.txt b/Bindings/input/touchscreen/st,stmfts.txt new file mode 100644 index 000000000000..9683595cd0f5 --- /dev/null +++ b/Bindings/input/touchscreen/st,stmfts.txt @@ -0,0 +1,43 @@ +* ST-Microelectronics FingerTip touchscreen controller + +The ST-Microelectronics FingerTip device provides a basic touchscreen +functionality. Along with it the user can enable the touchkey which can work as +a basic HOME and BACK key for phones. + +The driver supports also hovering as an absolute single touch event with x, y, z +coordinates. + +Required properties: +- compatible : must be "st,stmfts" +- reg : I2C slave address, (e.g. 0x49) +- interrupt-parent : the phandle to the interrupt controller which provides + the interrupt +- interrupts : interrupt specification +- avdd-supply : analogic power supply +- vdd-supply : power supply +- touchscreen-size-x : see touchscreen.txt +- touchscreen-size-y : see touchscreen.txt + +Optional properties: +- touch-key-connected : specifies whether the touchkey feature is connected +- ledvdd-supply : power supply to the touch key leds + +Example: + +i2c@00000000 { + + /* ... */ + + touchscreen@49 { + compatible = "st,stmfts"; + reg = <0x49>; + interrupt-parent = <&gpa1>; + interrupts = <1 IRQ_TYPE_NONE>; + touchscreen-size-x = <1599>; + touchscreen-size-y = <2559>; + touch-key-connected; + avdd-supply = <&ldo30_reg>; + vdd-supply = <&ldo31_reg>; + ledvdd-supply = <&ldo33_reg>; + }; +}; diff --git a/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt b/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt index 81cd3692405e..4ae553eb333d 100644 --- a/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt +++ b/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt @@ -3,8 +3,11 @@ Allwinner Sunxi NMI Controller Required properties: -- compatible : should be "allwinner,sun7i-a20-sc-nmi" or - "allwinner,sun6i-a31-sc-nmi" or "allwinner,sun9i-a80-nmi" +- compatible : should be one of the following: + - "allwinner,sun7i-a20-sc-nmi" + - "allwinner,sun6i-a31-sc-nmi" (deprecated) + - "allwinner,sun6i-a31-r-intc" + - "allwinner,sun9i-a80-nmi" - reg : Specifies base physical address and size of the registers. - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an diff --git a/Bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt b/Bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt new file mode 100644 index 000000000000..033cc82e5684 --- /dev/null +++ b/Bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt @@ -0,0 +1,25 @@ +Device tree configuration for the I2C Interrupt Controller on the AST24XX and +AST25XX SoCs. + +Required Properties: +- #address-cells : should be 1 +- #size-cells : should be 1 +- #interrupt-cells : should be 1 +- compatible : should be "aspeed,ast2400-i2c-ic" + or "aspeed,ast2500-i2c-ic" +- reg : address start and range of controller +- interrupts : interrupt number +- interrupt-controller : denotes that the controller receives and fires + new interrupts for child busses + +Example: + +i2c_ic: interrupt-controller@0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + compatible = "aspeed,ast2400-i2c-ic"; + reg = <0x0 0x40>; + interrupts = <12>; + interrupt-controller; +}; diff --git a/Bindings/interrupt-controller/aspeed,ast2400-vic.txt b/Bindings/interrupt-controller/aspeed,ast2400-vic.txt index 6c6e85324b9d..e3fea0758d25 100644 --- a/Bindings/interrupt-controller/aspeed,ast2400-vic.txt +++ b/Bindings/interrupt-controller/aspeed,ast2400-vic.txt @@ -1,12 +1,13 @@ Aspeed Vectored Interrupt Controller -These bindings are for the Aspeed AST2400 interrupt controller register layout. -The SoC has an legacy register layout, but this driver does not support that -mode of operation. +These bindings are for the Aspeed interrupt controller. The AST2400 and +AST2500 SoC families include a legacy register layout before a re-designed +layout, but the bindings do not prescribe the use of one or the other. Required properties: -- compatible : should be "aspeed,ast2400-vic". +- compatible : "aspeed,ast2400-vic" + "aspeed,ast2500-vic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an diff --git a/Bindings/interrupt-controller/marvell,gicp.txt b/Bindings/interrupt-controller/marvell,gicp.txt new file mode 100644 index 000000000000..64a00ceb7da4 --- /dev/null +++ b/Bindings/interrupt-controller/marvell,gicp.txt @@ -0,0 +1,27 @@ +Marvell GICP Controller +----------------------- + +GICP is a Marvell extension of the GIC that allows to trigger GIC SPI +interrupts by doing a memory transaction. It is used by the ICU +located in the Marvell CP110 to turn wired interrupts inside the CP +into GIC SPI interrupts. + +Required properties: + +- compatible: Must be "marvell,ap806-gicp" + +- reg: Must be the address and size of the GICP SPI registers + +- marvell,spi-ranges: tuples of GIC SPI interrupts ranges available + for this GICP + +- msi-controller: indicates that this is an MSI controller + +Example: + +gicp_spi: gicp-spi@3f0040 { + compatible = "marvell,ap806-gicp"; + reg = <0x3f0040 0x10>; + marvell,spi-ranges = <64 64>, <288 64>; + msi-controller; +}; diff --git a/Bindings/interrupt-controller/marvell,icu.txt b/Bindings/interrupt-controller/marvell,icu.txt new file mode 100644 index 000000000000..aa8bf2ec8905 --- /dev/null +++ b/Bindings/interrupt-controller/marvell,icu.txt @@ -0,0 +1,51 @@ +Marvell ICU Interrupt Controller +-------------------------------- + +The Marvell ICU (Interrupt Consolidation Unit) controller is +responsible for collecting all wired-interrupt sources in the CP and +communicating them to the GIC in the AP, the unit translates interrupt +requests on input wires to MSG memory mapped transactions to the GIC. + +Required properties: + +- compatible: Should be "marvell,cp110-icu" + +- reg: Should contain ICU registers location and length. + +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value shall be 3. + + The 1st cell is the group type of the ICU interrupt. Possible group + types are: + + ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure + ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure + ICU_GRP_SEI (0x4) : System error interrupt + ICU_GRP_REI (0x5) : RAM error interrupt + + The 2nd cell is the index of the interrupt in the ICU unit. + + The 3rd cell is the type of the interrupt. See arm,gic.txt for + details. + +- interrupt-controller: Identifies the node as an interrupt + controller. + +- msi-parent: Should point to the GICP controller, the GIC extension + that allows to trigger interrupts using MSG memory mapped + transactions. + +Example: + +icu: interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + msi-parent = <&gicp>; +}; + +usb3h0: usb3@500000 { + interrupt-parent = <&icu>; + interrupts = ; +}; diff --git a/Bindings/interrupt-controller/mediatek,sysirq.txt b/Bindings/interrupt-controller/mediatek,sysirq.txt index a89c03bb1a81..11cc87aeb276 100644 --- a/Bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Bindings/interrupt-controller/mediatek,sysirq.txt @@ -1,21 +1,23 @@ -+Mediatek 65xx/67xx/81xx sysirq ++Mediatek MT65xx/MT67xx/MT81xx sysirq Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI interrupt. Required properties: -- compatible: should be one of: - "mediatek,mt8173-sysirq" - "mediatek,mt8135-sysirq" - "mediatek,mt8127-sysirq" - "mediatek,mt6795-sysirq" - "mediatek,mt6755-sysirq" - "mediatek,mt6592-sysirq" - "mediatek,mt6589-sysirq" - "mediatek,mt6582-sysirq" - "mediatek,mt6580-sysirq" - "mediatek,mt6577-sysirq" - "mediatek,mt2701-sysirq" +- compatible: should be + "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 + "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 + "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 + "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 + "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 + "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 + "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 + "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 + "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589 + "mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582 + "mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580 + "mediatek,mt6577-sysirq": for MT6577 + "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. - interrupt-parent: phandle of irq parent for sysirq. The parent must diff --git a/Bindings/interrupt-controller/open-pic.txt b/Bindings/interrupt-controller/open-pic.txt index 909a902dff85..ccbbfdc53c72 100644 --- a/Bindings/interrupt-controller/open-pic.txt +++ b/Bindings/interrupt-controller/open-pic.txt @@ -92,7 +92,6 @@ Example 2: * References -[1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform - Requirements (ePAPR), Version 1.0, July 2008. - (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf) +[1] Devicetree Specification + (https://www.devicetree.org/specifications/) diff --git a/Bindings/iommu/arm,smmu-v3.txt b/Bindings/iommu/arm,smmu-v3.txt index be57550e14e4..c9abbf3e4f68 100644 --- a/Bindings/iommu/arm,smmu-v3.txt +++ b/Bindings/iommu/arm,smmu-v3.txt @@ -26,6 +26,12 @@ the PCIe specification. * "priq" - PRI Queue not empty * "cmdq-sync" - CMD_SYNC complete * "gerror" - Global Error activated + * "combined" - The combined interrupt is optional, + and should only be provided if the + hardware supports just a single, + combined interrupt line. + If provided, then the combined interrupt + will be used in preference to any others. - #iommu-cells : See the generic IOMMU binding described in devicetree/bindings/pci/pci-iommu.txt @@ -49,6 +55,12 @@ the PCIe specification. - hisilicon,broken-prefetch-cmd : Avoid sending CMD_PREFETCH_* commands to the SMMU. +- cavium,cn9900-broken-page1-regspace + : Replaces all page 1 offsets used for EVTQ_PROD/CONS, + PRIQ_PROD/CONS register access with page 0 offsets. + Set for Cavium ThunderX2 silicon that doesn't support + SMMU page1 register space. + ** Example smmu@2b400000 { diff --git a/Bindings/leds/common.txt b/Bindings/leds/common.txt index 24b656014089..1d4afe9644b6 100644 --- a/Bindings/leds/common.txt +++ b/Bindings/leds/common.txt @@ -1,4 +1,4 @@ -Common leds properties. +* Common leds properties. LED and flash LED devices provide the same basic functionality as current regulators, but extended with LED and flash LED specific features like @@ -49,6 +49,22 @@ Optional properties for child nodes: - panic-indicator : This property specifies that the LED should be used, if at all possible, as a panic indicator. +- trigger-sources : List of devices which should be used as a source triggering + this LED activity. Some LEDs can be related to a specific + device and should somehow indicate its state. E.g. USB 2.0 + LED may react to device(s) in a USB 2.0 port(s). + Another common example is switch or router with multiple + Ethernet ports each of them having its own LED assigned + (assuming they are not hardwired). In such cases this + property should contain phandle(s) of related source + device(s). + In many cases LED can be related to more than one device + (e.g. one USB LED vs. multiple USB ports). Each source + should be represented by a node in the device tree and be + referenced by a phandle and a set of phandle arguments. A + length of arguments should be specified by the + #trigger-source-cells property in the source node. + Required properties for flash LED child nodes: - flash-max-microamp : Maximum flash LED supply current in microamperes. - flash-max-timeout-us : Maximum timeout in microseconds after which the flash @@ -59,7 +75,17 @@ property can be omitted. For controllers that have no configurable timeout the flash-max-timeout-us property can be omitted. -Examples: +* Trigger source providers + +Each trigger source should be represented by a device tree node. It may be e.g. +a USB port or an Ethernet device. + +Required properties for trigger source: +- #trigger-source-cells : Number of cells in a source trigger. Typically 0 for + nodes of simple trigger sources (e.g. a specific USB + port). + +* Examples gpio-leds { compatible = "gpio-leds"; @@ -69,6 +95,11 @@ gpio-leds { linux,default-trigger = "heartbeat"; gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; }; + + usb { + gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + }; }; max77693-led { diff --git a/Bindings/leds/pca963x.txt b/Bindings/leds/pca963x.txt index dfbdb123a9bf..4eee41482041 100644 --- a/Bindings/leds/pca963x.txt +++ b/Bindings/leds/pca963x.txt @@ -10,6 +10,7 @@ Optional properties: - nxp,period-scale : In some configurations, the chip blinks faster than expected. This parameter provides a scaling ratio (fixed point, decimal divided by 1000) to compensate, e.g. 1300=1.3x and 750=0.75x. +- nxp,inverted-out: invert the polarity of the generated PWM Each led is represented as a sub-node of the nxp,pca963x device. diff --git a/Bindings/mailbox/qcom,apcs-kpss-global.txt b/Bindings/mailbox/qcom,apcs-kpss-global.txt new file mode 100644 index 000000000000..fb961c310f44 --- /dev/null +++ b/Bindings/mailbox/qcom,apcs-kpss-global.txt @@ -0,0 +1,46 @@ +Binding for the Qualcomm APCS global block +========================================== + +This binding describes the APCS "global" block found in various Qualcomm +platforms. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,msm8916-apcs-kpss-global", + "qcom,msm8996-apcs-hmss-global" + +- reg: + Usage: required + Value type: + Definition: must specify the base address and size of the global block + +- #mbox-cells: + Usage: required + Value type: + Definition: as described in mailbox.txt, must be 1 + + += EXAMPLE +The following example describes the APCS HMSS found in MSM8996 and part of the +GLINK RPM referencing the "rpm_hlos" doorbell therein. + + apcs_glb: mailbox@9820000 { + compatible = "qcom,msm8996-apcs-hmss-global"; + reg = <0x9820000 0x1000>; + + #mbox-cells = <1>; + }; + + rpm-glink { + compatible = "qcom,glink-rpm"; + + interrupts = ; + + qcom,rpm-msg-ram = <&rpm_msg_ram>; + + mboxes = <&apcs_glb 0>; + mbox-names = "rpm_hlos"; + }; + diff --git a/Bindings/media/cec.txt b/Bindings/media/cec.txt new file mode 100644 index 000000000000..22d7aae3d3d7 --- /dev/null +++ b/Bindings/media/cec.txt @@ -0,0 +1,8 @@ +Common bindings for HDMI CEC adapters + +- hdmi-phandle: phandle to the HDMI controller. + +- needs-hpd: if present the CEC support is only available when the HPD + is high. Some boards only let the CEC pin through if the HPD is high, + for example if there is a level converter that uses the HPD to power + up or down. diff --git a/Bindings/media/i2c/adv7180.txt b/Bindings/media/i2c/adv7180.txt index 4da486f96ff6..552b6a82cb1f 100644 --- a/Bindings/media/i2c/adv7180.txt +++ b/Bindings/media/i2c/adv7180.txt @@ -6,6 +6,8 @@ digital interfaces like MIPI CSI-2 or parallel video. Required Properties : - compatible : value must be one of "adi,adv7180" + "adi,adv7180cp" + "adi,adv7180st" "adi,adv7182" "adi,adv7280" "adi,adv7280-m" @@ -15,6 +17,19 @@ Required Properties : "adi,adv7282" "adi,adv7282-m" +Device nodes of "adi,adv7180cp" and "adi,adv7180st" must contain one +'port' child node per device input and output port, in accordance with the +video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. The port +nodes are numbered as follows. + + Port adv7180cp adv7180st +------------------------------------------------------------------- + Input 0-2 0-5 + Output 3 6 + +The digital output port node must contain at least one endpoint. + Optional Properties : - powerdown-gpios: reference to the GPIO connected to the powerdown pin, if any. diff --git a/Bindings/media/i2c/max2175.txt b/Bindings/media/i2c/max2175.txt new file mode 100644 index 000000000000..02b4e9cd7b1b --- /dev/null +++ b/Bindings/media/i2c/max2175.txt @@ -0,0 +1,59 @@ +Maxim Integrated MAX2175 RF to Bits tuner +----------------------------------------- + +The MAX2175 IC is an advanced analog/digital hybrid-radio receiver with +RF to Bits® front-end designed for software-defined radio solutions. + +Required properties: +-------------------- +- compatible: "maxim,max2175" for MAX2175 RF-to-bits tuner. +- clocks: clock specifier. +- port: child port node corresponding to the I2S output, in accordance with + the video interface bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The port + node must contain at least one endpoint. + +Optional properties: +-------------------- +- maxim,master : phandle to the master tuner if it is a slave. This + is used to define two tuners in diversity mode + (1 master, 1 slave). By default each tuner is an + individual master. +- maxim,refout-load : load capacitance value (in picofarads) on reference + output drive level. The possible load values are: + 0 (default - refout disabled) + 10 + 20 + 30 + 40 + 60 + 70 +- maxim,am-hiz-filter : empty property indicates the AM Hi-Z filter is used + in this hardware for AM antenna input. + +Example: +-------- + +Board specific DTS file + +/* Fixed XTAL clock node */ +maxim_xtal: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <36864000>; +}; + +/* A tuner device instance under i2c bus */ +max2175_0: tuner@60 { + compatible = "maxim,max2175"; + reg = <0x60>; + clocks = <&maxim_xtal>; + maxim,refout-load = <10>; + + port { + max2175_0_ep: endpoint { + remote-endpoint = <&slave_rx_device>; + }; + }; + +}; diff --git a/Bindings/media/i2c/ov5640.txt b/Bindings/media/i2c/ov5640.txt new file mode 100644 index 000000000000..540b36c4b1f2 --- /dev/null +++ b/Bindings/media/i2c/ov5640.txt @@ -0,0 +1,45 @@ +* Omnivision OV5640 MIPI CSI-2 sensor + +Required Properties: +- compatible: should be "ovti,ov5640" +- clocks: reference to the xclk input clock. +- clock-names: should be "xclk". +- DOVDD-supply: Digital I/O voltage supply, 1.8 volts +- AVDD-supply: Analog voltage supply, 2.8 volts +- DVDD-supply: Digital core voltage supply, 1.5 volts + +Optional Properties: +- reset-gpios: reference to the GPIO connected to the reset pin, if any. + This is an active low signal to the OV5640. +- powerdown-gpios: reference to the GPIO connected to the powerdown pin, + if any. This is an active high signal to the OV5640. + +The device node must contain one 'port' child node for its digital output +video port, in accordance with the video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + +&i2c1 { + ov5640: camera@3c { + compatible = "ovti,ov5640"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640>; + reg = <0x3c>; + clocks = <&clks IMX6QDL_CLK_CKO>; + clock-names = "xclk"; + DOVDD-supply = <&vgen4_reg>; /* 1.8v */ + AVDD-supply = <&vgen3_reg>; /* 2.8v */ + DVDD-supply = <&vgen2_reg>; /* 1.5v */ + powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + + port { + ov5640_to_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_from_ov5640>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; diff --git a/Bindings/media/imx.txt b/Bindings/media/imx.txt new file mode 100644 index 000000000000..77f4b0a7fd2b --- /dev/null +++ b/Bindings/media/imx.txt @@ -0,0 +1,53 @@ +Freescale i.MX Media Video Device +================================= + +Video Media Controller node +--------------------------- + +This is the media controller node for video capture support. It is a +virtual device that lists the camera serial interface nodes that the +media device will control. + +Required properties: +- compatible : "fsl,imx-capture-subsystem"; +- ports : Should contain a list of phandles pointing to camera + sensor interface ports of IPU devices + +example: + +capture-subsystem { + compatible = "fsl,imx-capture-subsystem"; + ports = <&ipu1_csi0>, <&ipu1_csi1>; +}; + + +mipi_csi2 node +-------------- + +This is the device node for the MIPI CSI-2 Receiver core in the i.MX +SoC. This is a Synopsys Designware MIPI CSI-2 host controller core +combined with a D-PHY core mixed into the same register block. In +addition this device consists of an i.MX-specific "CSI2IPU gasket" +glue logic, also controlled from the same register block. The CSI2IPU +gasket demultiplexes the four virtual channel streams from the host +controller's 32-bit output image bus onto four 16-bit parallel busses +to the i.MX IPU CSIs. + +Required properties: +- compatible : "fsl,imx6-mipi-csi2"; +- reg : physical base address and length of the register set; +- clocks : the MIPI CSI-2 receiver requires three clocks: hsi_tx + (the D-PHY clock), video_27m (D-PHY PLL reference + clock), and eim_podf; +- clock-names : must contain "dphy", "ref", "pix"; +- port@* : five port nodes must exist, containing endpoints + connecting to the source and sink devices according to + of_graph bindings. The first port is an input port, + connecting with a MIPI CSI-2 source, and ports 1 + through 4 are output ports connecting with parallel + bus sink endpoint nodes and correspond to the four + MIPI CSI-2 virtual channel outputs. + +Optional properties: +- interrupts : must contain two level-triggered interrupts, + in order: 100 and 101; diff --git a/Bindings/media/mediatek-mdp.txt b/Bindings/media/mediatek-mdp.txt index 4182063a54db..0d03e3ae2be2 100644 --- a/Bindings/media/mediatek-mdp.txt +++ b/Bindings/media/mediatek-mdp.txt @@ -2,7 +2,7 @@ Media Data Path is used for scaling and color space conversion. -Required properties (controller (parent) node): +Required properties (controller node): - compatible: "mediatek,mt8173-mdp" - mediatek,vpu: the node of video processor unit, see Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. @@ -32,21 +32,16 @@ Required properties (DMA function blocks, child node): for details. Example: -mdp { - compatible = "mediatek,mt8173-mdp"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - mediatek,vpu = <&vpu>; - mdp_rdma0: rdma@14001000 { compatible = "mediatek,mt8173-mdp-rdma"; + "mediatek,mt8173-mdp"; reg = <0 0x14001000 0 0x1000>; clocks = <&mmsys CLK_MM_MDP_RDMA0>, <&mmsys CLK_MM_MUTEX_32K>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_RDMA0>; mediatek,larb = <&larb0>; + mediatek,vpu = <&vpu>; }; mdp_rdma1: rdma@14002000 { @@ -106,4 +101,3 @@ mdp { iommus = <&iommu M4U_PORT_MDP_WROT1>; mediatek,larb = <&larb4>; }; -}; diff --git a/Bindings/media/qcom,venus.txt b/Bindings/media/qcom,venus.txt new file mode 100644 index 000000000000..2693449daf73 --- /dev/null +++ b/Bindings/media/qcom,venus.txt @@ -0,0 +1,107 @@ +* Qualcomm Venus video encoder/decoder accelerators + +- compatible: + Usage: required + Value type: + Definition: Value should contain one of: + - "qcom,msm8916-venus" + - "qcom,msm8996-venus" +- reg: + Usage: required + Value type: + Definition: Register base address and length of the register map. +- interrupts: + Usage: required + Value type: + Definition: Should contain interrupt line number. +- clocks: + Usage: required + Value type: + Definition: A List of phandle and clock specifier pairs as listed + in clock-names property. +- clock-names: + Usage: required for msm8916 + Value type: + Definition: Should contain the following entries: + - "core" Core video accelerator clock + - "iface" Video accelerator AHB clock + - "bus" Video accelerator AXI clock +- clock-names: + Usage: required for msm8996 + Value type: + Definition: Should contain the following entries: + - "core" Core video accelerator clock + - "iface" Video accelerator AHB clock + - "bus" Video accelerator AXI clock + - "mbus" Video MAXI clock +- power-domains: + Usage: required + Value type: + Definition: A phandle and power domain specifier pairs to the + power domain which is responsible for collapsing + and restoring power to the peripheral. +- iommus: + Usage: required + Value type: + Definition: A list of phandle and IOMMU specifier pairs. +- memory-region: + Usage: required + Value type: + Definition: reference to the reserved-memory for the firmware + memory region. + +* Subnodes +The Venus video-codec node must contain two subnodes representing +video-decoder and video-encoder. + +Every of video-encoder or video-decoder subnode should have: + +- compatible: + Usage: required + Value type: + Definition: Value should contain "venus-decoder" or "venus-encoder" +- clocks: + Usage: required for msm8996 + Value type: + Definition: A List of phandle and clock specifier pairs as listed + in clock-names property. +- clock-names: + Usage: required for msm8996 + Value type: + Definition: Should contain the following entries: + - "core" Subcore video accelerator clock + +- power-domains: + Usage: required for msm8996 + Value type: + Definition: A phandle and power domain specifier pairs to the + power domain which is responsible for collapsing + and restoring power to the subcore. + +* An Example + video-codec@1d00000 { + compatible = "qcom,msm8916-venus"; + reg = <0x01d00000 0xff000>; + interrupts = ; + clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, + <&gcc GCC_VENUS0_AHB_CLK>, + <&gcc GCC_VENUS0_AXI_CLK>; + clock-names = "core", "iface", "bus"; + power-domains = <&gcc VENUS_GDSC>; + iommus = <&apps_iommu 5>; + memory-region = <&venus_mem>; + + video-decoder { + compatible = "venus-decoder"; + clocks = <&mmcc VIDEO_SUBCORE0_CLK>; + clock-names = "core"; + power-domains = <&mmcc VENUS_CORE0_GDSC>; + }; + + video-encoder { + compatible = "venus-encoder"; + clocks = <&mmcc VIDEO_SUBCORE1_CLK>; + clock-names = "core"; + power-domains = <&mmcc VENUS_CORE1_GDSC>; + }; + }; diff --git a/Bindings/media/rcar_vin.txt b/Bindings/media/rcar_vin.txt index 6a4e61cbe011..6e4ef8caf759 100644 --- a/Bindings/media/rcar_vin.txt +++ b/Bindings/media/rcar_vin.txt @@ -1,5 +1,5 @@ -Renesas RCar Video Input driver (rcar_vin) ------------------------------------------- +Renesas R-Car Video Input driver (rcar_vin) +------------------------------------------- The rcar_vin device provides video input capabilities for the Renesas R-Car family of devices. The current blocks are always slaves and suppot one input diff --git a/Bindings/media/renesas,drif.txt b/Bindings/media/renesas,drif.txt new file mode 100644 index 000000000000..39516b94c28f --- /dev/null +++ b/Bindings/media/renesas,drif.txt @@ -0,0 +1,176 @@ +Renesas R-Car Gen3 Digital Radio Interface controller (DRIF) +------------------------------------------------------------ + +R-Car Gen3 DRIF is a SPI like receive only slave device. A general +representation of DRIF interfacing with a master device is shown below. + ++---------------------+ +---------------------+ +| |-----SCK------->|CLK | +| Master |-----SS-------->|SYNC DRIFn (slave) | +| |-----SD0------->|D0 | +| |-----SD1------->|D1 | ++---------------------+ +---------------------+ + +As per datasheet, each DRIF channel (drifn) is made up of two internal +channels (drifn0 & drifn1). These two internal channels share the common +CLK & SYNC. Each internal channel has its own dedicated resources like +irq, dma channels, address space & clock. This internal split is not +visible to the external master device. + +The device tree model represents each internal channel as a separate node. +The internal channels sharing the CLK & SYNC are tied together by their +phandles using a property called "renesas,bonding". For the rest of +the documentation, unless explicitly stated, the word channel implies an +internal channel. + +When both internal channels are enabled they need to be managed together +as one (i.e.) they cannot operate alone as independent devices. Out of the +two, one of them needs to act as a primary device that accepts common +properties of both the internal channels. This channel is identified by a +property called "renesas,primary-bond". + +To summarize, + - When both the internal channels that are bonded together are enabled, + the zeroth channel is selected as primary-bond. This channels accepts + properties common to all the members of the bond. + - When only one of the bonded channels need to be enabled, the property + "renesas,bonding" or "renesas,primary-bond" will have no effect. That + enabled channel can act alone as any other independent device. + +Required properties of an internal channel: +------------------------------------------- +- compatible: "renesas,r8a7795-drif" if DRIF controller is a part of R8A7795 SoC. + "renesas,rcar-gen3-drif" for a generic R-Car Gen3 compatible device. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + +- reg: offset and length of that channel. +- interrupts: associated with that channel. +- clocks: phandle and clock specifier of that channel. +- clock-names: clock input name string: "fck". +- dmas: phandles to the DMA channels. +- dma-names: names of the DMA channel: "rx". +- renesas,bonding: phandle to the other channel. + +Optional properties of an internal channel: +------------------------------------------- +- power-domains: phandle to the respective power domain. + +Required properties of an internal channel when: + - It is the only enabled channel of the bond (or) + - If it acts as primary among enabled bonds +-------------------------------------------------------- +- pinctrl-0: pin control group to be used for this channel. +- pinctrl-names: must be "default". +- renesas,primary-bond: empty property indicating the channel acts as primary + among the bonded channels. +- port: child port node corresponding to the data input, in accordance with + the video interface bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The port + node must contain at least one endpoint. + +Optional endpoint property: +--------------------------- +- sync-active: Indicates sync signal polarity, 0/1 for low/high respectively. + This property maps to SYNCAC bit in the hardware manual. The + default is 1 (active high). + +Example: +-------- + +(1) Both internal channels enabled: +----------------------------------- + +When interfacing with a third party tuner device with two data pins as shown +below. + ++---------------------+ +---------------------+ +| |-----SCK------->|CLK | +| Master |-----SS-------->|SYNC DRIFn (slave) | +| |-----SD0------->|D0 | +| |-----SD1------->|D1 | ++---------------------+ +---------------------+ + + drif00: rif@e6f40000 { + compatible = "renesas,r8a7795-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f40000 0 0x64>; + interrupts = ; + clocks = <&cpg CPG_MOD 515>; + clock-names = "fck"; + dmas = <&dmac1 0x20>, <&dmac2 0x20>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + renesas,bonding = <&drif01>; + renesas,primary-bond; + pinctrl-0 = <&drif0_pins>; + pinctrl-names = "default"; + port { + drif0_ep: endpoint { + remote-endpoint = <&tuner_ep>; + }; + }; + }; + + drif01: rif@e6f50000 { + compatible = "renesas,r8a7795-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f50000 0 0x64>; + interrupts = ; + clocks = <&cpg CPG_MOD 514>; + clock-names = "fck"; + dmas = <&dmac1 0x22>, <&dmac2 0x22>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + renesas,bonding = <&drif00>; + }; + + +(2) Internal channel 1 alone is enabled: +---------------------------------------- + +When interfacing with a third party tuner device with one data pin as shown +below. + ++---------------------+ +---------------------+ +| |-----SCK------->|CLK | +| Master |-----SS-------->|SYNC DRIFn (slave) | +| | |D0 (unused) | +| |-----SD-------->|D1 | ++---------------------+ +---------------------+ + + drif00: rif@e6f40000 { + compatible = "renesas,r8a7795-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f40000 0 0x64>; + interrupts = ; + clocks = <&cpg CPG_MOD 515>; + clock-names = "fck"; + dmas = <&dmac1 0x20>, <&dmac2 0x20>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + renesas,bonding = <&drif01>; + }; + + drif01: rif@e6f50000 { + compatible = "renesas,r8a7795-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f50000 0 0x64>; + interrupts = ; + clocks = <&cpg CPG_MOD 514>; + clock-names = "fck"; + dmas = <&dmac1 0x22>, <&dmac2 0x22>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + renesas,bonding = <&drif00>; + pinctrl-0 = <&drif0_pins>; + pinctrl-names = "default"; + port { + drif0_ep: endpoint { + remote-endpoint = <&tuner_ep>; + sync-active = <0>; + }; + }; + }; diff --git a/Bindings/media/s5p-cec.txt b/Bindings/media/s5p-cec.txt index 4bb08d9d940b..1b1a10ba48ce 100644 --- a/Bindings/media/s5p-cec.txt +++ b/Bindings/media/s5p-cec.txt @@ -15,7 +15,11 @@ Required properties: - clock-names : from common clock binding: must contain "hdmicec", corresponding to entry in the clocks property. - samsung,syscon-phandle - phandle to the PMU system controller - - hdmi-phandle - phandle to the HDMI controller + - hdmi-phandle - phandle to the HDMI controller, see also cec.txt. + +Optional: + - needs-hpd : if present the CEC support is only available when the HPD + is high. See cec.txt for more details. Example: diff --git a/Bindings/media/st,stm32-cec.txt b/Bindings/media/st,stm32-cec.txt new file mode 100644 index 000000000000..6be2381c180d --- /dev/null +++ b/Bindings/media/st,stm32-cec.txt @@ -0,0 +1,19 @@ +STMicroelectronics STM32 CEC driver + +Required properties: + - compatible : value should be "st,stm32-cec" + - reg : Physical base address of the IP registers and length of memory + mapped region. + - clocks : from common clock binding: handle to CEC clocks + - clock-names : from common clock binding: must be "cec" and "hdmi-cec". + - interrupts : CEC interrupt number to the CPU. + +Example for stm32f746: + +cec: cec@40006c00 { + compatible = "st,stm32-cec"; + reg = <0x40006C00 0x400>; + interrupts = <94>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>; + clock-names = "cec", "hdmi-cec"; +}; diff --git a/Bindings/media/st,stm32-dcmi.txt b/Bindings/media/st,stm32-dcmi.txt new file mode 100644 index 000000000000..249790a93017 --- /dev/null +++ b/Bindings/media/st,stm32-dcmi.txt @@ -0,0 +1,45 @@ +STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) + +Required properties: +- compatible: "st,stm32-dcmi" +- reg: physical base address and length of the registers set for the device +- interrupts: should contain IRQ line for the DCMI +- resets: reference to a reset controller, + see Documentation/devicetree/bindings/reset/st,stm32-rcc.txt +- clocks: list of clock specifiers, corresponding to entries in + the clock-names property +- clock-names: must contain "mclk", which is the DCMI peripherial clock +- pinctrl: the pincontrol settings to configure muxing properly + for pins that connect to DCMI device. + See Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt. +- dmas: phandle to DMA controller node, + see Documentation/devicetree/bindings/dma/stm32-dma.txt +- dma-names: must contain "tx", which is the transmit channel from DCMI to DMA + +DCMI supports a single port node with parallel bus. It should contain one +'port' child node with child 'endpoint' node. Please refer to the bindings +defined in Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + dcmi: dcmi@50050000 { + compatible = "st,stm32-dcmi"; + reg = <0x50050000 0x400>; + interrupts = <78>; + resets = <&rcc STM32F4_AHB2_RESET(DCMI)>; + clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&dcmi_pins>; + dmas = <&dma2 1 1 0x414 0x3>; + dma-names = "tx"; + port { + dcmi_0: endpoint { + remote-endpoint = <...>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + }; + }; + }; diff --git a/Bindings/media/stih-cec.txt b/Bindings/media/stih-cec.txt index 289a08b33651..8be2a040c6c6 100644 --- a/Bindings/media/stih-cec.txt +++ b/Bindings/media/stih-cec.txt @@ -9,7 +9,7 @@ Required properties: - pinctrl-names: Contains only one value - "default" - pinctrl-0: Specifies the pin control groups used for CEC hardware. - resets: Reference to a reset controller - - hdmi-phandle: Phandle to the HDMI controller + - hdmi-phandle: Phandle to the HDMI controller, see also cec.txt. Example for STIH407: diff --git a/Bindings/media/video-mux.txt b/Bindings/media/video-mux.txt new file mode 100644 index 000000000000..63b9dc913e45 --- /dev/null +++ b/Bindings/media/video-mux.txt @@ -0,0 +1,60 @@ +Video Multiplexer +================= + +Video multiplexers allow to select between multiple input ports. Video received +on the active input port is passed through to the output port. Muxes described +by this binding are controlled by a multiplexer controller that is described by +the bindings in Documentation/devicetree/bindings/mux/mux-controller.txt + +Required properties: +- compatible : should be "video-mux" +- mux-controls : mux controller node to use for operating the mux +- #address-cells: should be <1> +- #size-cells: should be <0> +- port@*: at least three port nodes containing endpoints connecting to the + source and sink devices according to of_graph bindings. The last port is + the output port, all others are inputs. + +Optionally, #address-cells, #size-cells, and port nodes can be grouped under a +ports node as described in Documentation/devicetree/bindings/graph.txt. + +Example: + + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + + video-mux { + compatible = "video-mux"; + mux-controls = <&mux>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mux_in0: endpoint { + remote-endpoint = <&video_source0_out>; + }; + }; + + port@1 { + reg = <1>; + + mux_in1: endpoint { + remote-endpoint = <&video_source1_out>; + }; + }; + + port@2 { + reg = <2>; + + mux_out: endpoint { + remote-endpoint = <&capture_interface_in>; + }; + }; + }; +}; diff --git a/Bindings/mfd/arizona.txt b/Bindings/mfd/arizona.txt index 8f2e2822238d..b37bdde5cfda 100644 --- a/Bindings/mfd/arizona.txt +++ b/Bindings/mfd/arizona.txt @@ -30,7 +30,8 @@ Required properties: - gpio-controller : Indicates this device is a GPIO controller. - #gpio-cells : Must be 2. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). + second cell is used to specify optional parameters, see ../gpio/gpio.txt + for details. - AVDD-supply, DBVDD1-supply, CPVDD-supply : Power supplies for the device, as covered in Documentation/devicetree/bindings/regulator/regulator.txt diff --git a/Bindings/mfd/hi6421.txt b/Bindings/mfd/hi6421.txt index 0d5a4466a494..22da96d344a7 100644 --- a/Bindings/mfd/hi6421.txt +++ b/Bindings/mfd/hi6421.txt @@ -1,7 +1,9 @@ * HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd. Required parent device properties: -- compatible : contains "hisilicon,hi6421-pmic"; +- compatible : One of the following chip-specific strings: + "hisilicon,hi6421-pmic"; + "hisilicon,hi6421v530-pmic"; - reg : register range space of hi6421; Supported Hi6421 sub-devices include: diff --git a/Bindings/mfd/lp87565.txt b/Bindings/mfd/lp87565.txt new file mode 100644 index 000000000000..a48df7c08ab0 --- /dev/null +++ b/Bindings/mfd/lp87565.txt @@ -0,0 +1,43 @@ +TI LP87565 PMIC MFD driver + +Required properties: + - compatible: "ti,lp87565", "ti,lp87565-q1" + - reg: I2C slave address. + - gpio-controller: Marks the device node as a GPIO Controller. + - #gpio-cells: Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../gpio/gpio.txt for more information. + - xxx-in-supply: Phandle to parent supply node of each regulator + populated under regulators node. xxx should match + the supply_name populated in driver. +Example: + +lp87565_pmic: pmic@60 { + compatible = "ti,lp87565-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck10-in-supply = <&vsys_3v3>; + buck23-in-supply = <&vsys_3v3>; + + regulators: regulators { + buck10_reg: buck10 { + /* VDD_MPU */ + regulator-name = "buck10"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + buck23_reg: buck23 { + /* VDD_GPU */ + regulator-name = "buck23"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + }; +}; diff --git a/Bindings/mfd/tps65910.txt b/Bindings/mfd/tps65910.txt index 38833e63a59f..8af1202b381d 100644 --- a/Bindings/mfd/tps65910.txt +++ b/Bindings/mfd/tps65910.txt @@ -61,6 +61,10 @@ Optional properties: There should be 9 entries here, one for each gpio. - ti,system-power-controller: Telling whether or not this pmic is controlling the system power. +- ti,sleep-enable: Enable SLEEP state. +- ti,sleep-keep-therm: Keep thermal monitoring on in sleep state. +- ti,sleep-keep-ck32k: Keep the 32KHz clock output on in sleep state. +- ti,sleep-keep-hsclk: Keep high speed internal clock on in sleep state. Regulator Optional properties: - ti,regulator-ext-sleep-control: enable external sleep diff --git a/Bindings/misc/allwinner,syscon.txt b/Bindings/misc/allwinner,syscon.txt new file mode 100644 index 000000000000..31494a24fe69 --- /dev/null +++ b/Bindings/misc/allwinner,syscon.txt @@ -0,0 +1,20 @@ +* Allwinner sun8i system controller + +This file describes the bindings for the system controller present in +Allwinner SoC H3, A83T and A64. +The principal function of this syscon is to control EMAC PHY choice and +config. + +Required properties for the system controller: +- reg: address and length of the register for the device. +- compatible: should be "syscon" and one of the following string: + "allwinner,sun8i-h3-system-controller" + "allwinner,sun8i-v3s-system-controller" + "allwinner,sun50i-a64-system-controller" + "allwinner,sun8i-a83t-system-controller" + +Example: +syscon: syscon@1c00000 { + compatible = "allwinner,sun8i-h3-system-controller", "syscon"; + reg = <0x01c00000 0x1000>; +}; diff --git a/Bindings/mmc/exynos-dw-mshc.txt b/Bindings/mmc/exynos-dw-mshc.txt index aad98442788b..a58c173b7ab9 100644 --- a/Bindings/mmc/exynos-dw-mshc.txt +++ b/Bindings/mmc/exynos-dw-mshc.txt @@ -78,7 +78,6 @@ Example: }; dwmmc0@12200000 { - num-slots = <1>; cap-mmc-highspeed; cap-sd-highspeed; broken-cd; diff --git a/Bindings/mmc/fsl-esdhc.txt b/Bindings/mmc/fsl-esdhc.txt index dedfb02c744a..a2cf5e1c87d8 100644 --- a/Bindings/mmc/fsl-esdhc.txt +++ b/Bindings/mmc/fsl-esdhc.txt @@ -7,6 +7,20 @@ This file documents differences between the core properties described by mmc.txt and the properties used by the sdhci-esdhc driver. Required properties: + - compatible : should be "fsl,esdhc", or "fsl,-esdhc". + Possible compatibles for PowerPC: + "fsl,mpc8536-esdhc" + "fsl,mpc8378-esdhc" + "fsl,p2020-esdhc" + "fsl,p4080-esdhc" + "fsl,t1040-esdhc" + "fsl,t4240-esdhc" + Possible compatibles for ARM: + "fsl,ls1012a-esdhc" + "fsl,ls1088a-esdhc" + "fsl,ls1043a-esdhc" + "fsl,ls1046a-esdhc" + "fsl,ls2080a-esdhc" - interrupt-parent : interrupt source phandle. - clock-frequency : specifies eSDHC base clock frequency. diff --git a/Bindings/mmc/img-dw-mshc.txt b/Bindings/mmc/img-dw-mshc.txt index 85de99fcaa2f..c54e577eea07 100644 --- a/Bindings/mmc/img-dw-mshc.txt +++ b/Bindings/mmc/img-dw-mshc.txt @@ -24,6 +24,5 @@ Example: fifo-depth = <0x20>; bus-width = <4>; - num-slots = <1>; disable-wp; }; diff --git a/Bindings/mmc/k3-dw-mshc.txt b/Bindings/mmc/k3-dw-mshc.txt index df370585cbcc..07242d141773 100644 --- a/Bindings/mmc/k3-dw-mshc.txt +++ b/Bindings/mmc/k3-dw-mshc.txt @@ -12,6 +12,7 @@ extensions to the Synopsys Designware Mobile Storage Host Controller. Required Properties: * compatible: should be one of the following. + - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. @@ -35,7 +36,6 @@ Example: /* Board portion */ dwmmc0@fcd03000 { - num-slots = <1>; vmmc-supply = <&ldo12>; fifo-depth = <0x100>; pinctrl-names = "default"; @@ -51,7 +51,6 @@ Example: dwmmc_1: dwmmc1@f723e000 { compatible = "hisilicon,hi6220-dw-mshc"; - num-slots = <0x1>; bus-width = <0x4>; disable-wp; cap-sd-highspeed; diff --git a/Bindings/mmc/rockchip-dw-mshc.txt b/Bindings/mmc/rockchip-dw-mshc.txt index 520d61dad6dd..49ed3ad2524a 100644 --- a/Bindings/mmc/rockchip-dw-mshc.txt +++ b/Bindings/mmc/rockchip-dw-mshc.txt @@ -15,6 +15,7 @@ Required Properties: - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 + - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399 @@ -31,6 +32,10 @@ Optional Properties: probing, low speeds or in case where all phases work at tuning time. If not specified 0 deg will be used. +* rockchip,desired-num-phases: The desired number of times that the host + execute tuning when needed. If not specified, the host will do tuning + for 360 times, namely tuning for each degree. + Example: rkdwmmc0@12200000 { diff --git a/Bindings/mmc/synopsys-dw-mshc.txt b/Bindings/mmc/synopsys-dw-mshc.txt index 9cb55ca57461..ef3e5f14067a 100644 --- a/Bindings/mmc/synopsys-dw-mshc.txt +++ b/Bindings/mmc/synopsys-dw-mshc.txt @@ -12,12 +12,12 @@ Required Properties: * #address-cells: should be 1. * #size-cells: should be 0. -# Slots: The slot specific information are contained within child-nodes with - each child-node representing a supported slot. There should be atleast one - child node representing a card slot. The name of the child node representing - the slot is recommended to be slot@n where n is the unique number of the slot - connected to the controller. The following are optional properties which - can be included in the slot child node. +# Slots (DEPRECATED): The slot specific information are contained within + child-nodes with each child-node representing a supported slot. There should + be atleast one child node representing a card slot. The name of the child node + representing the slot is recommended to be slot@n where n is the unique number + of the slot connected to the controller. The following are optional properties + which can be included in the slot child node. * reg: specifies the physical slot number. The valid values of this property is 0 to (num-slots -1), where num-slots is the value @@ -63,7 +63,7 @@ Optional properties: clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default. (Use the "max-frequency" instead of "clock-freq-min-max".) -* num-slots: specifies the number of slots supported by the controller. +* num-slots (DEPRECATED): specifies the number of slots supported by the controller. The number of physical slots actually used could be equal or less than the value specified by num-slots. If this property is not specified, the value of num-slot property is assumed to be 1. @@ -124,7 +124,6 @@ board specific portions as listed below. dwmmc0@12200000 { clock-frequency = <400000000>; clock-freq-min-max = <400000 200000000>; - num-slots = <1>; broken-cd; fifo-depth = <0x80>; card-detect-delay = <200>; @@ -139,7 +138,6 @@ board specific portions as listed below. dwmmc0@12200000 { clock-frequency = <400000000>; clock-freq-min-max = <400000 200000000>; - num-slots = <1>; broken-cd; fifo-depth = <0x80>; card-detect-delay = <200>; diff --git a/Bindings/mmc/ti-omap-hsmmc.txt b/Bindings/mmc/ti-omap-hsmmc.txt index 74166a0d460d..0e026c151c1c 100644 --- a/Bindings/mmc/ti-omap-hsmmc.txt +++ b/Bindings/mmc/ti-omap-hsmmc.txt @@ -18,7 +18,7 @@ Required properties: Optional properties: ti,dual-volt: boolean, supports dual voltage cards -supply: phandle to the regulator device tree node -"supply-name" examples are "vmmc", "vmmc_aux" etc +"supply-name" examples are "vmmc", "vmmc_aux"(deprecated)/"vqmmc" etc ti,non-removable: non-removable slot (like eMMC) ti,needs-special-reset: Requires a special softreset sequence ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed diff --git a/Bindings/mmc/zx-dw-mshc.txt b/Bindings/mmc/zx-dw-mshc.txt index eaade0e5adeb..906819a90c2b 100644 --- a/Bindings/mmc/zx-dw-mshc.txt +++ b/Bindings/mmc/zx-dw-mshc.txt @@ -25,7 +25,6 @@ Example: clock-frequency = <50000000>; clocks = <&topcrm SD0_AHB>, <&topcrm SD0_WCLK>; clock-names = "biu", "ciu"; - num-slots = <1>; max-frequency = <50000000>; cap-sdio-irq; cap-sd-highspeed; diff --git a/Bindings/mtd/atmel-nand.txt b/Bindings/mtd/atmel-nand.txt index f6bee57e453a..9bb66e476672 100644 --- a/Bindings/mtd/atmel-nand.txt +++ b/Bindings/mtd/atmel-nand.txt @@ -59,8 +59,22 @@ Required properties: - reg: should contain 2 register ranges. The first one is pointing to the PMECC block, and the second one to the PMECC_ERRLOC block. +* SAMA5 NFC I/O bindings: + +SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page +operations. This interface to this logic is placed in a separate I/O range and +should thus have its own DT node. + +- compatible: should be "atmel,sama5d3-nfc-io", "syscon". +- reg: should contain the I/O range used to interact with the NFC logic. + Example: + nfc_io: nfc-io@70000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0x70000000 0x8000000>; + }; + pmecc: ecc-engine@ffffc070 { compatible = "atmel,at91sam9g45-pmecc"; reg = <0xffffc070 0x490>, diff --git a/Bindings/mtd/denali-nand.txt b/Bindings/mtd/denali-nand.txt index e593bbeb2115..504291d2e5c2 100644 --- a/Bindings/mtd/denali-nand.txt +++ b/Bindings/mtd/denali-nand.txt @@ -3,10 +3,23 @@ Required properties: - compatible : should be one of the following: "altr,socfpga-denali-nand" - for Altera SOCFPGA + "socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a) + "socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b) - reg : should contain registers location and length for data and reg. - reg-names: Should contain the reg names "nand_data" and "denali_reg" - interrupts : The interrupt number. +Optional properties: + - nand-ecc-step-size: see nand.txt for details. If present, the value must be + 512 for "altr,socfpga-denali-nand" + 1024 for "socionext,uniphier-denali-nand-v5a" + 1024 for "socionext,uniphier-denali-nand-v5b" + - nand-ecc-strength: see nand.txt for details. Valid values are: + 8, 15 for "altr,socfpga-denali-nand" + 8, 16, 24 for "socionext,uniphier-denali-nand-v5a" + 8, 16 for "socionext,uniphier-denali-nand-v5b" + - nand-ecc-maximize: see nand.txt for details + The device tree may optionally contain sub-nodes describing partitions of the address space. See partition.txt for more detail. diff --git a/Bindings/mtd/elm.txt b/Bindings/mtd/elm.txt index 8c1528c421d4..59ddc61c1076 100644 --- a/Bindings/mtd/elm.txt +++ b/Bindings/mtd/elm.txt @@ -1,7 +1,7 @@ Error location module Required properties: -- compatible: Must be "ti,am33xx-elm" +- compatible: Must be "ti,am3352-elm" - reg: physical base address and size of the registers map. - interrupts: Interrupt number for the elm. diff --git a/Bindings/mtd/gpmc-nand.txt b/Bindings/mtd/gpmc-nand.txt index 174f68c26c1b..dd559045593d 100644 --- a/Bindings/mtd/gpmc-nand.txt +++ b/Bindings/mtd/gpmc-nand.txt @@ -5,7 +5,7 @@ the GPMC controller with a name of "nand". All timing relevant properties as well as generic gpmc child properties are explained in a separate documents - please refer to -Documentation/devicetree/bindings/bus/ti-gpmc.txt +Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt For NAND specific properties such as ECC modes or bus width, please refer to Documentation/devicetree/bindings/mtd/nand.txt diff --git a/Bindings/mtd/gpmc-nor.txt b/Bindings/mtd/gpmc-nor.txt index 4828c17bb784..131d3a74d0bd 100644 --- a/Bindings/mtd/gpmc-nor.txt +++ b/Bindings/mtd/gpmc-nor.txt @@ -5,7 +5,7 @@ child nodes of the GPMC controller with a name of "nor". All timing relevant properties as well as generic GPMC child properties are explained in a separate documents. Please refer to -Documentation/devicetree/bindings/bus/ti-gpmc.txt +Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt Required properties: - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and @@ -28,7 +28,7 @@ Required properties: Optional properties: - gpmc,XXX Additional GPMC timings and settings parameters. See - Documentation/devicetree/bindings/bus/ti-gpmc.txt + Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt Optional properties for partition table parsing: - #address-cells: should be set to 1 diff --git a/Bindings/mtd/gpmc-onenand.txt b/Bindings/mtd/gpmc-onenand.txt index 5d8fa527c496..b6e8bfd024f4 100644 --- a/Bindings/mtd/gpmc-onenand.txt +++ b/Bindings/mtd/gpmc-onenand.txt @@ -5,7 +5,7 @@ the GPMC controller with a name of "onenand". All timing relevant properties as well as generic gpmc child properties are explained in a separate documents - please refer to -Documentation/devicetree/bindings/bus/ti-gpmc.txt +Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt Required properties: diff --git a/Bindings/mtd/gpmi-nand.txt b/Bindings/mtd/gpmi-nand.txt index d02acaff3c35..b289ef3c1b7e 100644 --- a/Bindings/mtd/gpmi-nand.txt +++ b/Bindings/mtd/gpmi-nand.txt @@ -4,7 +4,12 @@ The GPMI nand controller provides an interface to control the NAND flash chips. Required properties: - - compatible : should be "fsl,-gpmi-nand" + - compatible : should be "fsl,-gpmi-nand", chip can be: + * imx23 + * imx28 + * imx6q + * imx6sx + * imx7d - reg : should contain registers location and length for gpmi and bch. - reg-names: Should contain the reg names "gpmi-nand" and "bch" - interrupts : BCH interrupt number. @@ -13,6 +18,13 @@ Required properties: and GPMI DMA channel ID. Refer to dma.txt and fsl-mxs-dma.txt for details. - dma-names: Must be "rx-tx". + - clocks : clocks phandle and clock specifier corresponding to each clock + specified in clock-names. + - clock-names : The "gpmi_io" clock is always required. Which clocks are + exactly required depends on chip: + * imx23/imx28 : "gpmi_io" + * imx6q/sx : "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch" + * imx7d : "gpmi_io", "gpmi_bch_apb" Optional properties: - nand-on-flash-bbt: boolean to enable on flash bbt option if not diff --git a/Bindings/mtd/microchip,mchp23k256.txt b/Bindings/mtd/microchip,mchp23k256.txt new file mode 100644 index 000000000000..7328eb92a03c --- /dev/null +++ b/Bindings/mtd/microchip,mchp23k256.txt @@ -0,0 +1,18 @@ +* MTD SPI driver for Microchip 23K256 (and similar) serial SRAM + +Required properties: +- #address-cells, #size-cells : Must be present if the device has sub-nodes + representing partitions. +- compatible : Must be one of "microchip,mchp23k256" or "microchip,mchp23lcv1024" +- reg : Chip-Select number +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at + +Example: + + spi-sram@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "microchip,mchp23k256"; + reg = <0>; + spi-max-frequency = <20000000>; + }; diff --git a/Bindings/mtd/mtk-nand.txt b/Bindings/mtd/mtk-nand.txt index 069c192ed5c2..dbf9e054c11c 100644 --- a/Bindings/mtd/mtk-nand.txt +++ b/Bindings/mtd/mtk-nand.txt @@ -12,7 +12,8 @@ tree nodes. The first part of NFC is NAND Controller Interface (NFI) HW. Required NFI properties: -- compatible: Should be "mediatek,mtxxxx-nfc". +- compatible: Should be one of "mediatek,mt2701-nfc", + "mediatek,mt2712-nfc". - reg: Base physical address and size of NFI. - interrupts: Interrupts of NFI. - clocks: NFI required clocks. @@ -141,7 +142,7 @@ Example: ============== Required BCH properties: -- compatible: Should be "mediatek,mtxxxx-ecc". +- compatible: Should be one of "mediatek,mt2701-ecc", "mediatek,mt2712-ecc". - reg: Base physical address and size of ECC. - interrupts: Interrupts of ECC. - clocks: ECC required clocks. diff --git a/Bindings/mtd/nand.txt b/Bindings/mtd/nand.txt index b05601600083..133f3813719c 100644 --- a/Bindings/mtd/nand.txt +++ b/Bindings/mtd/nand.txt @@ -21,7 +21,7 @@ Optional NAND chip properties: - nand-ecc-mode : String, operation mode of the NAND ecc mode. Supported values are: "none", "soft", "hw", "hw_syndrome", - "hw_oob_first". + "hw_oob_first", "on-die". Deprecated values: "soft_bch": use "soft" and nand-ecc-algo instead - nand-ecc-algo: string, algorithm of NAND ECC. diff --git a/Bindings/mtd/partition.txt b/Bindings/mtd/partition.txt index 81a224da63be..36f3b769a626 100644 --- a/Bindings/mtd/partition.txt +++ b/Bindings/mtd/partition.txt @@ -1,29 +1,49 @@ -Representing flash partitions in devicetree +Flash partitions in device tree +=============================== -Partitions can be represented by sub-nodes of an mtd device. This can be used +Flash devices can be partitioned into one or more functional ranges (e.g. "boot +code", "nvram", "kernel"). + +Different devices may be partitioned in a different ways. Some may use a fixed +flash layout set at production time. Some may use on-flash table that describes +the geometry and naming/purpose of each functional region. It is also possible +to see these methods mixed. + +To assist system software in locating partitions, we allow describing which +method is used for a given flash device. To describe the method there should be +a subnode of the flash device that is named 'partitions'. It must have a +'compatible' property, which is used to identify the method to use. + +We currently only document a binding for fixed layouts. + + +Fixed Partitions +================ + +Partitions can be represented by sub-nodes of a flash device. This can be used on platforms which have strong conventions about which portions of a flash are used for what purposes, but which don't use an on-flash partition table such as RedBoot. -The partition table should be a subnode of the mtd node and should be named +The partition table should be a subnode of the flash node and should be named 'partitions'. This node should have the following property: - compatible : (required) must be "fixed-partitions" Partitions are then defined in subnodes of the partitions node. -For backwards compatibility partitions as direct subnodes of the mtd device are +For backwards compatibility partitions as direct subnodes of the flash device are supported. This use is discouraged. NOTE: also for backwards compatibility, direct subnodes that have a compatible string are not considered partitions, as they may be used for other bindings. #address-cells & #size-cells must both be present in the partitions subnode of the -mtd device. There are two valid values for both: +flash device. There are two valid values for both: <1>: for partitions that require a single 32-bit cell to represent their size/address (aka the value is below 4 GiB) <2>: for partitions that require two 32-bit cells to represent their size/address (aka the value is 4 GiB or greater). Required properties: -- reg : The partition's offset and size within the mtd bank. +- reg : The partition's offset and size within the flash Optional properties: - label : The label / name for this partition. If omitted, the label is taken diff --git a/Bindings/mux/adi,adg792a.txt b/Bindings/mux/adi,adg792a.txt new file mode 100644 index 000000000000..96b787a69f50 --- /dev/null +++ b/Bindings/mux/adi,adg792a.txt @@ -0,0 +1,75 @@ +Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers + +Required properties: +- compatible : "adi,adg792a" or "adi,adg792g" +- #mux-control-cells : <0> if parallel (the three muxes are bound together + with a single mux controller controlling all three muxes), or <1> if + not (one mux controller for each mux). +* Standard mux-controller bindings as described in mux-controller.txt + +Optional properties for ADG792G: +- gpio-controller : if present, #gpio-cells below is required. +- #gpio-cells : should be <2> + - First cell is the GPO line number, i.e. 0 or 1 + - Second cell is used to specify active high (0) + or active low (1) + +Optional properties: +- idle-state : if present, array of states that the mux controllers will have + when idle. The special state MUX_IDLE_AS_IS is the default and + MUX_IDLE_DISCONNECT is also supported. + +States 0 through 3 correspond to signals A through D in the datasheet. + +Example: + + /* + * Three independent mux controllers (of which one is used). + * Mux 0 is disconnected when idle, mux 1 idles in the previously + * selected state and mux 2 idles with signal B. + */ + &i2c0 { + mux: mux-controller@50 { + compatible = "adi,adg792a"; + reg = <0x50>; + #mux-control-cells = <1>; + + idle-state = ; + }; + }; + + adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&mux 2>; + + channels = "sync-1", "", "out"; + }; + + + /* + * Three parallel muxes with one mux controller, useful e.g. if + * the adc is differential, thus needing two signals to be muxed + * simultaneously for correct operation. + */ + &i2c0 { + pmux: mux-controller@50 { + compatible = "adi,adg792a"; + reg = <0x50>; + #mux-control-cells = <0>; + + idle-state = <1>; + }; + }; + + diff-adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&pmux>; + + channels = "sync-1", "", "out"; + }; diff --git a/Bindings/mux/gpio-mux.txt b/Bindings/mux/gpio-mux.txt new file mode 100644 index 000000000000..b8f746344d80 --- /dev/null +++ b/Bindings/mux/gpio-mux.txt @@ -0,0 +1,69 @@ +GPIO-based multiplexer controller bindings + +Define what GPIO pins are used to control a multiplexer. Or several +multiplexers, if the same pins control more than one multiplexer. + +Required properties: +- compatible : "gpio-mux" +- mux-gpios : list of gpios used to control the multiplexer, least + significant bit first. +- #mux-control-cells : <0> +* Standard mux-controller bindings as decribed in mux-controller.txt + +Optional properties: +- idle-state : if present, the state the mux will have when idle. The + special state MUX_IDLE_AS_IS is the default. + +The multiplexer state is defined as the number represented by the +multiplexer GPIO pins, where the first pin is the least significant +bit. An active pin is a binary 1, an inactive pin is a binary 0. + +Example: + + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, + <&pioA 1 GPIO_ACTIVE_HIGH>; + }; + + adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&mux>; + + channels = "sync-1", "in", "out", "sync-2"; + }; + + i2c-mux { + compatible = "i2c-mux"; + i2c-parent = <&i2c1>; + + mux-controls = <&mux>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssd1307: oled@3c { + /* ... */ + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + pca9555: pca9555@20 { + /* ... */ + }; + }; + }; diff --git a/Bindings/mux/mmio-mux.txt b/Bindings/mux/mmio-mux.txt new file mode 100644 index 000000000000..a9bfb4d8b6ac --- /dev/null +++ b/Bindings/mux/mmio-mux.txt @@ -0,0 +1,60 @@ +MMIO register bitfield-based multiplexer controller bindings + +Define register bitfields to be used to control multiplexers. The parent +device tree node must be a syscon node to provide register access. + +Required properties: +- compatible : "mmio-mux" +- #mux-control-cells : <1> +- mux-reg-masks : an array of register offset and pre-shifted bitfield mask + pairs, each describing a single mux control. +* Standard mux-controller bindings as decribed in mux-controller.txt + +Optional properties: +- idle-states : if present, the state the muxes will have when idle. The + special state MUX_IDLE_AS_IS is the default. + +The multiplexer state of each multiplexer is defined as the value of the +bitfield described by the corresponding register offset and bitfield mask pair +in the mux-reg-masks array, accessed through the parent syscon. + +Example: + + syscon { + compatible = "syscon"; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + + mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */ + <0x3 0x40>, /* 1: reg 0x3, bit 6 */ + idle-states = , <0>; + }; + }; + + video-mux { + compatible = "video-mux"; + mux-controls = <&mux 0>; + + ports { + /* inputs 0..3 */ + port@0 { + reg = <0>; + }; + port@1 { + reg = <1>; + }; + port@2 { + reg = <2>; + }; + port@3 { + reg = <3>; + }; + + /* output */ + port@4 { + reg = <4>; + }; + }; + }; diff --git a/Bindings/mux/mux-controller.txt b/Bindings/mux/mux-controller.txt new file mode 100644 index 000000000000..4f47e4bd2fa0 --- /dev/null +++ b/Bindings/mux/mux-controller.txt @@ -0,0 +1,157 @@ +Common multiplexer controller bindings +====================================== + +A multiplexer (or mux) controller will have one, or several, consumer devices +that uses the mux controller. Thus, a mux controller can possibly control +several parallel multiplexers. Presumably there will be at least one +multiplexer needed by each consumer, but a single mux controller can of course +control several multiplexers for a single consumer. + +A mux controller provides a number of states to its consumers, and the state +space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer, +0-7 for an 8-way multiplexer, etc. + + +Consumers +--------- + +Mux controller consumers should specify a list of mux controllers that they +want to use with a property containing a 'mux-ctrl-list': + + mux-ctrl-list ::= [mux-ctrl-list] + single-mux-ctrl ::= [mux-ctrl-specifier] + mux-ctrl-phandle : phandle to mux controller node + mux-ctrl-specifier : array of #mux-control-cells specifying the + given mux controller (controller specific) + +Mux controller properties should be named "mux-controls". The exact meaning of +each mux controller property must be documented in the device tree binding for +each consumer. An optional property "mux-control-names" may contain a list of +strings to label each of the mux controllers listed in the "mux-controls" +property. + +Drivers for devices that use more than a single mux controller can use the +"mux-control-names" property to map the name of the requested mux controller +to an index into the list given by the "mux-controls" property. + +mux-ctrl-specifier typically encodes the chip-relative mux controller number. +If the mux controller chip only provides a single mux controller, the +mux-ctrl-specifier can typically be left out. + +Example: + + /* One consumer of a 2-way mux controller (one GPIO-line) */ + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>; + }; + + adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&mux>; + mux-control-names = "adc"; + + channels = "sync", "in"; + }; + +Note that in the example above, specifying the "mux-control-names" is redundant +because there is only one mux controller in the list. However, if the driver +for the consumer node in fact asks for a named mux controller, that name is of +course still required. + + /* + * Two consumers (one for an ADC line and one for an i2c bus) of + * parallel 4-way multiplexers controlled by the same two GPIO-lines. + */ + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, + <&pioA 1 GPIO_ACTIVE_HIGH>; + }; + + adc-mux { + compatible = "io-channel-mux"; + io-channels = <&adc 0>; + io-channel-names = "parent"; + + mux-controls = <&mux>; + + channels = "sync-1", "in", "out", "sync-2"; + }; + + i2c-mux { + compatible = "i2c-mux"; + i2c-parent = <&i2c1>; + + mux-controls = <&mux>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssd1307: oled@3c { + /* ... */ + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + pca9555: pca9555@20 { + /* ... */ + }; + }; + }; + + +Mux controller nodes +-------------------- + +Mux controller nodes must specify the number of cells used for the +specifier using the '#mux-control-cells' property. + +Optionally, mux controller nodes can also specify the state the mux should +have when it is idle. The idle-state property is used for this. If the +idle-state is not present, the mux controller is typically left as is when +it is idle. For multiplexer chips that expose several mux controllers, the +idle-state property is an array with one idle state for each mux controller. + +The special value (-1) may be used to indicate that the mux should be left +as is when it is idle. This is the default, but can still be useful for +mux controller chips with more than one mux controller, particularly when +there is a need to "step past" a mux controller and set some other idle +state for a mux controller with a higher index. + +Some mux controllers have the ability to disconnect the input/output of the +multiplexer. Using this disconnected high-impedance state as the idle state +is indicated with idle state (-2). + +These constants are available in + + #include + +as MUX_IDLE_AS_IS (-1) and MUX_IDLE_DISCONNECT (-2). + +An example mux controller node look like this (the adg972a chip is a triple +4-way multiplexer): + + mux: mux-controller@50 { + compatible = "adi,adg792a"; + reg = <0x50>; + #mux-control-cells = <1>; + + idle-state = ; + }; diff --git a/Bindings/net/brcm,amac.txt b/Bindings/net/brcm,amac.txt index 2fefa1a44afd..ad16c1f481f7 100644 --- a/Bindings/net/brcm,amac.txt +++ b/Bindings/net/brcm,amac.txt @@ -11,6 +11,7 @@ Required properties: - reg-names: Names of the registers. "amac_base": Address and length of the GMAC registers "idm_base": Address and length of the GMAC IDM registers + (required for NSP and Northstar2) "nicpm_base": Address and length of the NIC Port Manager registers (required for Northstar2) - interrupts: Interrupt number diff --git a/Bindings/net/brcm,bgmac-nsp.txt b/Bindings/net/brcm,bgmac-nsp.txt deleted file mode 100644 index 022946caa7e2..000000000000 --- a/Bindings/net/brcm,bgmac-nsp.txt +++ /dev/null @@ -1,24 +0,0 @@ -Broadcom GMAC Ethernet Controller Device Tree Bindings -------------------------------------------------------------- - -Required properties: - - compatible: "brcm,bgmac-nsp" - - reg: Address and length of the GMAC registers, - Address and length of the GMAC IDM registers - - reg-names: Names of the registers. Must have both "gmac_base" and - "idm_base" - - interrupts: Interrupt number - -Optional properties: -- mac-address: See ethernet.txt file in the same directory - -Examples: - -gmac0: ethernet@18022000 { - compatible = "brcm,bgmac-nsp"; - reg = <0x18022000 0x1000>, - <0x18110000 0x1000>; - reg-names = "gmac_base", "idm_base"; - interrupts = ; - status = "disabled"; -}; diff --git a/Bindings/net/cortina.txt b/Bindings/net/cortina.txt new file mode 100644 index 000000000000..40d0bd984113 --- /dev/null +++ b/Bindings/net/cortina.txt @@ -0,0 +1,21 @@ +Cortina Phy Driver Device Tree Bindings +--------------------------------------- + +CORTINA is a registered trademark of Cortina Systems, Inc. + +The driver supports the Cortina Electronic Dispersion Compensation (EDC) +devices, equipped with clock and data recovery (CDR) circuits. These +devices make use of registers that are not compatible with Clause 45 or +Clause 22, therefore they need to be described using the +"ethernet-phy-id" compatible. + +Since the driver only implements polling mode support, interrupts info +can be skipped. + +Example (CS4340 phy): + mdio { + cs4340_phy@10 { + compatible = "ethernet-phy-id13e5.1002"; + reg = <0x10>; + }; + }; diff --git a/Bindings/net/dsa/b53.txt b/Bindings/net/dsa/b53.txt index 8ec2ca21adeb..8acf51a4dfa8 100644 --- a/Bindings/net/dsa/b53.txt +++ b/Bindings/net/dsa/b53.txt @@ -13,6 +13,9 @@ Required properties: "brcm,bcm5397" "brcm,bcm5398" + For the BCM11360 SoC, must be: + "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab" string + For the BCM5310x SoCs with an integrated switch, must be one of: "brcm,bcm53010-srab" "brcm,bcm53011-srab" diff --git a/Bindings/net/dsa/ksz.txt b/Bindings/net/dsa/ksz.txt new file mode 100644 index 000000000000..0ab8b39d0b30 --- /dev/null +++ b/Bindings/net/dsa/ksz.txt @@ -0,0 +1,72 @@ +Microchip KSZ Series Ethernet switches +================================== + +Required properties: + +- compatible: For external switch chips, compatible string must be exactly one + of: "microchip,ksz9477" + +See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional +required and optional properties. + +Examples: + +Ethernet switch connected via SPI to the host, CPU port wired to eth0: + + eth0: ethernet@10001000 { + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + spi1: spi@f8008000 { + pinctrl-0 = <&pinctrl_spi_ksz>; + cs-gpios = <&pioC 25 0>; + id = <1>; + status = "okay"; + + ksz9477: ksz9477@0 { + compatible = "microchip,ksz9477"; + reg = <0>; + + spi-max-frequency = <44000000>; + spi-cpha; + spi-cpol; + + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "lan5"; + }; + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/Bindings/net/ethernet.txt b/Bindings/net/ethernet.txt index 3a6916909d90..7da86f22a13b 100644 --- a/Bindings/net/ethernet.txt +++ b/Bindings/net/ethernet.txt @@ -8,9 +8,11 @@ The following properties are common to the Ethernet controllers: property; - max-speed: number, specifies maximum speed in Mbit/s supported by the device; - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than - the maximum frame size (there's contradiction in ePAPR). + the maximum frame size (there's contradiction in the Devicetree + Specification). - phy-mode: string, operation mode of the PHY interface. This is now a de-facto standard property; supported values are: + * "internal" * "mii" * "gmii" * "sgmii" @@ -32,9 +34,13 @@ The following properties are common to the Ethernet controllers: * "2000base-x", * "2500base-x", * "rxaui" -- phy-connection-type: the same as "phy-mode" property but described in ePAPR; + * "xaui" + * "10gbase-kr" (10GBASE-KR, XFI, SFI) +- phy-connection-type: the same as "phy-mode" property but described in the + Devicetree Specification; - phy-handle: phandle, specifies a reference to a node representing a PHY - device; this property is described in ePAPR and so preferred; + device; this property is described in the Devicetree Specification and so + preferred; - phy: the same as "phy-handle" property, not recommended for new bindings. - phy-device: the same as "phy-handle" property, not recommended for new bindings. diff --git a/Bindings/powerpc/fsl/fman.txt b/Bindings/net/fsl-fman.txt similarity index 100% rename from Bindings/powerpc/fsl/fman.txt rename to Bindings/net/fsl-fman.txt diff --git a/Bindings/net/gpmc-eth.txt b/Bindings/net/gpmc-eth.txt index ace4a64b3695..f7da3d73ca1b 100644 --- a/Bindings/net/gpmc-eth.txt +++ b/Bindings/net/gpmc-eth.txt @@ -9,7 +9,7 @@ the GPMC controller with an "ethernet" name. All timing relevant properties as well as generic GPMC child properties are explained in a separate documents. Please refer to -Documentation/devicetree/bindings/bus/ti-gpmc.txt +Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt For the properties relevant to the ethernet controller connected to the GPMC refer to the binding documentation of the device. For example, the documentation @@ -43,7 +43,7 @@ Required properties: Optional properties: - gpmc,XXX Additional GPMC timings and settings parameters. See - Documentation/devicetree/bindings/bus/ti-gpmc.txt + Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt Example: diff --git a/Bindings/net/macb.txt b/Bindings/net/macb.txt index 1506e948610c..27966ae741e0 100644 --- a/Bindings/net/macb.txt +++ b/Bindings/net/macb.txt @@ -22,6 +22,7 @@ Required properties: Required elements: 'pclk', 'hclk' Optional elements: 'tx_clk' Optional elements: 'rx_clk' applies to cdns,zynqmp-gem + Optional elements: 'tsu_clk' - clocks: Phandles to input clocks. Optional properties for PHY child node: diff --git a/Bindings/net/marvell-orion-mdio.txt b/Bindings/net/marvell-orion-mdio.txt index ccdabdcc8618..42cd81090a2c 100644 --- a/Bindings/net/marvell-orion-mdio.txt +++ b/Bindings/net/marvell-orion-mdio.txt @@ -1,12 +1,14 @@ * Marvell MDIO Ethernet Controller interface The Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x, -MV78xx0, Armada 370 and Armada XP have an identical unit that provides -an interface with the MDIO bus. This driver handles this MDIO -interface. +MV78xx0, Armada 370, Armada XP, Armada 7k and Armada 8k have an +identical unit that provides an interface with the MDIO bus. +Additionally, Armada 7k and Armada 8k has a second unit which +provides an interface with the xMDIO bus. This driver handles +these interfaces. Required properties: -- compatible: "marvell,orion-mdio" +- compatible: "marvell,orion-mdio" or "marvell,xmdio" - reg: address and length of the MDIO registers. When an interrupt is not present, the length is the size of the SMI register (4 bytes) otherwise it must be 0x84 bytes to cover the interrupt control diff --git a/Bindings/net/nfc/trf7970a.txt b/Bindings/net/nfc/trf7970a.txt index c627bbb3009e..60c833d62181 100644 --- a/Bindings/net/nfc/trf7970a.txt +++ b/Bindings/net/nfc/trf7970a.txt @@ -13,14 +13,10 @@ Optional SoC Specific Properties: - pinctrl-names: Contains only one value - "default". - pintctrl-0: Specifies the pin control groups used for this controller. - autosuspend-delay: Specify autosuspend delay in milliseconds. -- vin-voltage-override: Specify voltage of VIN pin in microvolts. - irq-status-read-quirk: Specify that the trf7970a being used has the "IRQ Status Read" erratum. - en2-rf-quirk: Specify that the trf7970a being used has the "EN2 RF" erratum. -- t5t-rmb-extra-byte-quirk: Specify that the trf7970a has the erratum - where an extra byte is returned by Read Multiple Block commands issued - to Type 5 tags. - vdd-io-supply: Regulator specifying voltage for vdd-io - clock-frequency: Set to specify that the input frequency to the trf7970a is 13560000Hz or 27120000Hz @@ -37,15 +33,13 @@ Example (for ARM-based BeagleBone with TRF7970A on SPI1): spi-max-frequency = <2000000>; interrupt-parent = <&gpio2>; interrupts = <14 0>; - ti,enable-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>, - <&gpio2 5 GPIO_ACTIVE_LOW>; + ti,enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>, + <&gpio2 5 GPIO_ACTIVE_HIGH>; vin-supply = <&ldo3_reg>; - vin-voltage-override = <5000000>; vdd-io-supply = <&ldo2_reg>; autosuspend-delay = <30000>; irq-status-read-quirk; en2-rf-quirk; - t5t-rmb-extra-byte-quirk; clock-frequency = <27120000>; status = "okay"; }; diff --git a/Bindings/net/qca,qca7000.txt b/Bindings/net/qca,qca7000.txt new file mode 100644 index 000000000000..6d9efb2eb9a5 --- /dev/null +++ b/Bindings/net/qca,qca7000.txt @@ -0,0 +1,88 @@ +* Qualcomm QCA7000 + +The QCA7000 is a serial-to-powerline bridge with a host interface which could +be configured either as SPI or UART slave. This configuration is done by +the QCA7000 firmware. + +(a) Ethernet over SPI + +In order to use the QCA7000 as SPI device it must be defined as a child of a +SPI master in the device tree. + +Required properties: +- compatible : Should be "qca,qca7000" +- reg : Should specify the SPI chip select +- interrupts : The first cell should specify the index of the source + interrupt and the second cell should specify the trigger + type as rising edge +- spi-cpha : Must be set +- spi-cpol : Must be set + +Optional properties: +- interrupt-parent : Specify the pHandle of the source interrupt +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at. + Numbers smaller than 1000000 or greater than 16000000 + are invalid. Missing the property will set the SPI + frequency to 8000000 Hertz. +- local-mac-address : see ./ethernet.txt +- qca,legacy-mode : Set the SPI data transfer of the QCA7000 to legacy mode. + In this mode the SPI master must toggle the chip select + between each data word. In burst mode these gaps aren't + necessary, which is faster. This setting depends on how + the QCA7000 is setup via GPIO pin strapping. If the + property is missing the driver defaults to burst mode. + +SPI Example: + +/* Freescale i.MX28 SPI master*/ +ssp2: spi@80014000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx28-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "okay"; + + qca7000: ethernet@0 { + compatible = "qca,qca7000"; + reg = <0x0>; + interrupt-parent = <&gpio3>; /* GPIO Bank 3 */ + interrupts = <25 0x1>; /* Index: 25, rising edge */ + spi-cpha; /* SPI mode: CPHA=1 */ + spi-cpol; /* SPI mode: CPOL=1 */ + spi-max-frequency = <8000000>; /* freq: 8 MHz */ + local-mac-address = [ A0 B0 C0 D0 E0 F0 ]; + }; +}; + +(b) Ethernet over UART + +In order to use the QCA7000 as UART slave it must be defined as a child of a +UART master in the device tree. It is possible to preconfigure the UART +settings of the QCA7000 firmware, but it's not possible to change them during +runtime. + +Required properties: +- compatible : Should be "qca,qca7000" + +Optional properties: +- local-mac-address : see ./ethernet.txt +- current-speed : current baud rate of QCA7000 which defaults to 115200 + if absent, see also ../serial/slave-device.txt + +UART Example: + +/* Freescale i.MX28 UART */ +auart0: serial@8006a000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; + reg = <0x8006a000 0x2000>; + pinctrl-names = "default"; + pinctrl-0 = <&auart0_2pins_a>; + status = "okay"; + + qca7000: ethernet { + compatible = "qca,qca7000"; + local-mac-address = [ A0 B0 C0 D0 E0 F0 ]; + current-speed = <38400>; + }; +}; diff --git a/Bindings/net/qca-qca7000-spi.txt b/Bindings/net/qca-qca7000-spi.txt deleted file mode 100644 index c74989c0d8ac..000000000000 --- a/Bindings/net/qca-qca7000-spi.txt +++ /dev/null @@ -1,47 +0,0 @@ -* Qualcomm QCA7000 (Ethernet over SPI protocol) - -Note: The QCA7000 is useable as a SPI device. In this case it must be defined -as a child of a SPI master in the device tree. - -Required properties: -- compatible : Should be "qca,qca7000" -- reg : Should specify the SPI chip select -- interrupts : The first cell should specify the index of the source interrupt - and the second cell should specify the trigger type as rising edge -- spi-cpha : Must be set -- spi-cpol: Must be set - -Optional properties: -- interrupt-parent : Specify the pHandle of the source interrupt -- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at. - Numbers smaller than 1000000 or greater than 16000000 are invalid. Missing - the property will set the SPI frequency to 8000000 Hertz. -- local-mac-address: 6 bytes, MAC address -- qca,legacy-mode : Set the SPI data transfer of the QCA7000 to legacy mode. - In this mode the SPI master must toggle the chip select between each data - word. In burst mode these gaps aren't necessary, which is faster. - This setting depends on how the QCA7000 is setup via GPIO pin strapping. - If the property is missing the driver defaults to burst mode. - -Example: - -/* Freescale i.MX28 SPI master*/ -ssp2: spi@80014000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx28-spi"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_a>; - status = "okay"; - - qca7000: ethernet@0 { - compatible = "qca,qca7000"; - reg = <0x0>; - interrupt-parent = <&gpio3>; /* GPIO Bank 3 */ - interrupts = <25 0x1>; /* Index: 25, rising edge */ - spi-cpha; /* SPI mode: CPHA=1 */ - spi-cpol; /* SPI mode: CPOL=1 */ - spi-max-frequency = <8000000>; /* freq: 8 MHz */ - local-mac-address = [ A0 B0 C0 D0 E0 F0 ]; - }; -}; diff --git a/Bindings/net/ti,dp83867.txt b/Bindings/net/ti,dp83867.txt index afe9630a5e7d..02c4353b5cf2 100644 --- a/Bindings/net/ti,dp83867.txt +++ b/Bindings/net/ti,dp83867.txt @@ -18,6 +18,13 @@ Optional property: - ti,max-output-impedance - MAC Interface Impedance control to set the programmable output impedance to maximum value (70 ohms). + - ti,dp83867-rxctrl-strap-quirk - This denotes the fact that the + board has RX_DV/RX_CTRL pin strapped in + mode 1 or 2. To ensure PHY operation, + there are specific actions that + software needs to take when this pin is + strapped in these modes. See data manual + for details. Note: ti,min-output-impedance and ti,max-output-impedance are mutually exclusive. When both properties are present ti,max-output-impedance diff --git a/Bindings/net/ti,wilink-st.txt b/Bindings/net/ti,wilink-st.txt index cbad73a84ac4..1649c1f66b07 100644 --- a/Bindings/net/ti,wilink-st.txt +++ b/Bindings/net/ti,wilink-st.txt @@ -14,6 +14,12 @@ Required properties: - compatible: should be one of the following: "ti,wl1271-st" "ti,wl1273-st" + "ti,wl1281-st" + "ti,wl1283-st" + "ti,wl1285-st" + "ti,wl1801-st" + "ti,wl1805-st" + "ti,wl1807-st" "ti,wl1831-st" "ti,wl1835-st" "ti,wl1837-st" @@ -22,6 +28,10 @@ Optional properties: - enable-gpios : GPIO signal controlling enabling of BT. Active high. - vio-supply : Vio input supply (1.8V) - vbat-supply : Vbat input supply (2.9-4.8V) + - clocks : Must contain an entry, for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names : Must include the following entry: + "ext_clock" (External clock provided to the TI combo chip). Example: @@ -31,5 +41,7 @@ Example: bluetooth { compatible = "ti,wl1835-st"; enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + clocks = <&clk32k_wl18xx>; + clock-names = "ext_clock"; }; }; diff --git a/Bindings/net/wireless/brcm,bcm43xx-fmac.txt b/Bindings/net/wireless/brcm,bcm43xx-fmac.txt index 5dbf169cd81c..590f622188de 100644 --- a/Bindings/net/wireless/brcm,bcm43xx-fmac.txt +++ b/Bindings/net/wireless/brcm,bcm43xx-fmac.txt @@ -31,7 +31,7 @@ mmc3: mmc@01c12000 { non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/Bindings/net/wireless/ti,wlcore.txt b/Bindings/net/wireless/ti,wlcore.txt index 2a3d90de18ee..7b2cbb14113e 100644 --- a/Bindings/net/wireless/ti,wlcore.txt +++ b/Bindings/net/wireless/ti,wlcore.txt @@ -10,6 +10,7 @@ Required properties: * "ti,wl1273" * "ti,wl1281" * "ti,wl1283" + * "ti,wl1285" * "ti,wl1801" * "ti,wl1805" * "ti,wl1807" diff --git a/Bindings/nvmem/rockchip-efuse.txt b/Bindings/nvmem/rockchip-efuse.txt index 94aeeeabadd5..1ff02afdc55a 100644 --- a/Bindings/nvmem/rockchip-efuse.txt +++ b/Bindings/nvmem/rockchip-efuse.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Should be one of the following. - "rockchip,rk3066a-efuse" - for RK3066a SoCs. - "rockchip,rk3188-efuse" - for RK3188 SoCs. + - "rockchip,rk3228-efuse" - for RK3228 SoCs. - "rockchip,rk3288-efuse" - for RK3288 SoCs. - "rockchip,rk3399-efuse" - for RK3399 SoCs. - reg: Should contain the registers location and exact eFuse size diff --git a/Bindings/opp/opp.txt b/Bindings/opp/opp.txt index 63725498bd20..e36d261b9ba6 100644 --- a/Bindings/opp/opp.txt +++ b/Bindings/opp/opp.txt @@ -186,20 +186,20 @@ Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together. compatible = "operating-points-v2"; opp-shared; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000 970000 985000>; opp-microamp = <70000>; clock-latency-ns = <300000>; opp-suspend; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <1000000 980000 1010000>; opp-microamp = <80000>; clock-latency-ns = <310000>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; clock-latency-ns = <290000>; @@ -265,20 +265,20 @@ independently. * independently. */ - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000 970000 985000>; opp-microamp = <70000>; clock-latency-ns = <300000>; opp-suspend; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <1000000 980000 1010000>; opp-microamp = <80000>; clock-latency-ns = <310000>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microamp = <90000; @@ -341,20 +341,20 @@ DVFS state together. compatible = "operating-points-v2"; opp-shared; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000 970000 985000>; opp-microamp = <70000>; clock-latency-ns = <300000>; opp-suspend; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <1000000 980000 1010000>; opp-microamp = <80000>; clock-latency-ns = <310000>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microamp = <90000>; @@ -367,20 +367,20 @@ DVFS state together. compatible = "operating-points-v2"; opp-shared; - opp@1300000000 { + opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; opp-microvolt = <1050000 1045000 1055000>; opp-microamp = <95000>; clock-latency-ns = <400000>; opp-suspend; }; - opp@1400000000 { + opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; opp-microvolt = <1075000>; opp-microamp = <100000>; clock-latency-ns = <400000>; }; - opp@1500000000 { + opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1100000 1010000 1110000>; opp-microamp = <95000>; @@ -409,7 +409,7 @@ Example 4: Handling multiple regulators compatible = "operating-points-v2"; opp-shared; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000>, /* Supply 0 */ <960000>, /* Supply 1 */ @@ -422,7 +422,7 @@ Example 4: Handling multiple regulators /* OR */ - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000 970000 985000>, /* Supply 0 */ <965000 960000 975000>, /* Supply 1 */ @@ -435,7 +435,7 @@ Example 4: Handling multiple regulators /* OR */ - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000 970000 985000>, /* Supply 0 */ <965000 960000 975000>, /* Supply 1 */ @@ -467,7 +467,7 @@ Example 5: opp-supported-hw status = "okay"; opp-shared; - opp@600000000 { + opp-600000000 { /* * Supports all substrate and process versions for 0xF * cuts, i.e. only first four cuts. @@ -478,7 +478,7 @@ Example 5: opp-supported-hw ... }; - opp@800000000 { + opp-800000000 { /* * Supports: * - cuts: only one, 6th cut (represented by 6th bit). @@ -510,7 +510,7 @@ Example 6: opp-microvolt-, opp-microamp-: compatible = "operating-points-v2"; opp-shared; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt-slow = <915000 900000 925000>; opp-microvolt-fast = <975000 970000 985000>; @@ -518,7 +518,7 @@ Example 6: opp-microvolt-, opp-microamp-: opp-microamp-fast = <71000>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt-slow = <915000 900000 925000>, /* Supply vcc0 */ <925000 910000 935000>; /* Supply vcc1 */ diff --git a/Bindings/pci/faraday,ftpci100.txt b/Bindings/pci/faraday,ftpci100.txt index 35d4a979bb7b..89a84f8aa621 100644 --- a/Bindings/pci/faraday,ftpci100.txt +++ b/Bindings/pci/faraday,ftpci100.txt @@ -30,6 +30,13 @@ Mandatory properties: 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as pre-fetchable. +Optional properties: +- clocks: when present, this should contain the peripheral clock (PCLK) and the + PCI clock (PCICLK). If these are not present, they are assumed to be + hard-wired enabled and always on. The PCI clock will be 33 or 66 MHz. +- clock-names: when present, this should contain "PCLK" for the peripheral + clock and "PCICLK" for the PCI-side clock. + Mandatory subnodes: - For "faraday,ftpci100" a node representing the interrupt-controller inside the host bridge is mandatory. It has the following mandatory properties: diff --git a/Bindings/pci/fsl,imx6q-pcie.txt b/Bindings/pci/fsl,imx6q-pcie.txt index e3d5680875b1..cf92d3ba5a26 100644 --- a/Bindings/pci/fsl,imx6q-pcie.txt +++ b/Bindings/pci/fsl,imx6q-pcie.txt @@ -33,6 +33,10 @@ Optional properties: - reset-gpio-active-high: If present then the reset sequence using the GPIO specified in the "reset-gpio" property is reversed (H=reset state, L=operation state). +- vpcie-supply: Should specify the regulator in charge of PCIe port power. + The regulator will be enabled when initializing the PCIe host and + disabled either as part of the init process or when shutting down the + host. Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: diff --git a/Bindings/pci/kirin-pcie.txt b/Bindings/pci/kirin-pcie.txt new file mode 100644 index 000000000000..68ffa0fbcd73 --- /dev/null +++ b/Bindings/pci/kirin-pcie.txt @@ -0,0 +1,50 @@ +HiSilicon Kirin SoCs PCIe host DT description + +Kirin PCIe host controller is based on Designware PCI core. +It shares common functions with PCIe Designware core driver +and inherits common properties defined in +Documentation/devicetree/bindings/pci/designware-pci.txt. + +Additional properties are described here: + +Required properties +- compatible: + "hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC +- reg: Should contain rc_dbi, apb, phy, config registers location and length. +- reg-names: Must include the following entries: + "dbi": controller configuration registers; + "apb": apb Ctrl register defined by Kirin; + "phy": apb PHY register defined by Kirin; + "config": PCIe configuration space registers. +- reset-gpios: The gpio to generate PCIe perst assert and deassert signal. + +Optional properties: + +Example based on kirin960: + + pcie@f4000000 { + compatible = "hisilicon,kirin-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>, + <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>; + reg-names = "dbi","apb","phy", "config"; + bus-range = <0x0 0x1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>, + <0x0 0 0 2 &gic 0 0 0 283 4>, + <0x0 0 0 3 &gic 0 0 0 284 4>, + <0x0 0 0 4 &gic 0 0 0 285 4>; + clocks = <&crg_ctrl HI3660_PCIEPHY_REF>, + <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3660_ACLK_GATE_PCIE>; + clock-names = "pcie_phy_ref", "pcie_aux", + "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk"; + reset-gpios = <&gpio11 1 0 >; + }; diff --git a/Bindings/pci/mediatek,mt7623-pcie.txt b/Bindings/pci/mediatek,mt7623-pcie.txt new file mode 100644 index 000000000000..fe80dda9bf73 --- /dev/null +++ b/Bindings/pci/mediatek,mt7623-pcie.txt @@ -0,0 +1,130 @@ +MediaTek Gen2 PCIe controller which is available on MT7623 series SoCs + +PCIe subsys supports single root complex (RC) with 3 Root Ports. Each root +ports supports a Gen2 1-lane Link and has PIPE interface to PHY. + +Required properties: +- compatible: Should contain "mediatek,mt7623-pcie". +- device_type: Must be "pci" +- reg: Base addresses and lengths of the PCIe controller. +- #address-cells: Address representation for root ports (must be 3) +- #size-cells: Size representation for root ports (must be 2) +- #interrupt-cells: Size representation for interrupts (must be 1) +- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties + Please refer to the standard PCI bus binding document for a more detailed + explanation. +- clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - free_ck :for reference clock of PCIe subsys + - sys_ck0 :for clock of Port0 + - sys_ck1 :for clock of Port1 + - sys_ck2 :for clock of Port2 +- resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must include the following entries: + - pcie-rst0 :port0 reset + - pcie-rst1 :port1 reset + - pcie-rst2 :port2 reset +- phys: List of PHY specifiers (used by generic PHY framework). +- phy-names : Must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the + number of PHYs as specified in *phys* property. +- power-domains: A phandle and power domain specifier pair to the power domain + which is responsible for collapsing and restoring power to the peripheral. +- bus-range: Range of bus numbers associated with this controller. +- ranges: Ranges for the PCI memory and I/O regions. + +In addition, the device tree node must have sub-nodes describing each +PCIe port interface, having the following mandatory properties: + +Required properties: +- device_type: Must be "pci" +- reg: Only the first four bytes are used to refer to the correct bus number + and device number. +- #address-cells: Must be 3 +- #size-cells: Must be 2 +- #interrupt-cells: Must be 1 +- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties + Please refer to the standard PCI bus binding document for a more detailed + explanation. +- ranges: Sub-ranges distributed from the PCIe controller node. An empty + property is sufficient. +- num-lanes: Number of lanes to use for this port. + +Examples: + + hifsys: syscon@1a000000 { + compatible = "mediatek,mt7623-hifsys", + "mediatek,mt2701-hifsys", + "syscon"; + reg = <0 0x1a000000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pcie: pcie-controller@1a140000 { + compatible = "mediatek,mt7623-pcie"; + device_type = "pci"; + reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */ + <0 0x1a142000 0 0x1000>, /* Port0 registers */ + <0 0x1a143000 0 0x1000>, /* Port1 registers */ + <0 0x1a144000 0 0x1000>; /* Port2 registers */ + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 0>; + interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <&hifsys CLK_HIFSYS_PCIE0>, + <&hifsys CLK_HIFSYS_PCIE1>, + <&hifsys CLK_HIFSYS_PCIE2>; + clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2"; + resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, + <&hifsys MT2701_HIFSYS_PCIE1_RST>, + <&hifsys MT2701_HIFSYS_PCIE2_RST>; + reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2"; + phys = <&pcie0_phy>, <&pcie1_phy>, <&pcie2_phy>; + phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* I/O space */ + 0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */ + + pcie@0,0 { + device_type = "pci"; + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>; + ranges; + num-lanes = <1>; + }; + + pcie@1,0 { + device_type = "pci"; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + ranges; + num-lanes = <1>; + }; + + pcie@2,0 { + device_type = "pci"; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; + ranges; + num-lanes = <1>; + }; + }; diff --git a/Bindings/pci/qcom,pcie.txt b/Bindings/pci/qcom,pcie.txt index e15f9b19901f..9d418b71774f 100644 --- a/Bindings/pci/qcom,pcie.txt +++ b/Bindings/pci/qcom,pcie.txt @@ -8,6 +8,7 @@ - "qcom,pcie-apq8064" for apq8064 - "qcom,pcie-apq8084" for apq8084 - "qcom,pcie-msm8996" for msm8996 or apq8096 + - "qcom,pcie-ipq4019" for ipq4019 - reg: Usage: required @@ -87,7 +88,7 @@ - "core" Clocks the pcie hw block - "phy" Clocks the pcie PHY block - clock-names: - Usage: required for apq8084 + Usage: required for apq8084/ipq4019 Value type: Definition: Should contain the following entries - "aux" Auxiliary (AUX) clock @@ -126,6 +127,23 @@ Definition: Should contain the following entries - "core" Core reset +- reset-names: + Usage: required for ipq/apq8064 + Value type: + Definition: Should contain the following entries + - "axi_m" AXI master reset + - "axi_s" AXI slave reset + - "pipe" PIPE reset + - "axi_m_vmid" VMID reset + - "axi_s_xpu" XPU reset + - "parf" PARF reset + - "phy" PHY reset + - "axi_m_sticky" AXI sticky reset + - "pipe_sticky" PIPE sticky reset + - "pwr" PWR reset + - "ahb" AHB reset + - "phy_ahb" PHY AHB reset + - power-domains: Usage: required for apq8084 and msm8996/apq8096 Value type: diff --git a/Bindings/pci/rcar-pci.txt b/Bindings/pci/rcar-pci.txt index 34712d6fd253..bd27428dda61 100644 --- a/Bindings/pci/rcar-pci.txt +++ b/Bindings/pci/rcar-pci.txt @@ -1,4 +1,4 @@ -* Renesas RCar PCIe interface +* Renesas R-Car PCIe interface Required properties: compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; diff --git a/Bindings/pci/tango-pcie.txt b/Bindings/pci/tango-pcie.txt new file mode 100644 index 000000000000..244683836a79 --- /dev/null +++ b/Bindings/pci/tango-pcie.txt @@ -0,0 +1,29 @@ +Sigma Designs Tango PCIe controller + +Required properties: + +- compatible: "sigma,smp8759-pcie" +- reg: address/size of PCI configuration space, address/size of register area +- bus-range: defined by size of PCI configuration space +- device_type: "pci" +- #size-cells: <2> +- #address-cells: <3> +- msi-controller +- ranges: translation from system to bus addresses +- interrupts: spec for misc interrupts, spec for MSI + +Example: + + pcie@2e000 { + compatible = "sigma,smp8759-pcie"; + reg = <0x50000000 0x400000>, <0x2e000 0x100>; + bus-range = <0 3>; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + msi-controller; + ranges = <0x02000000 0x0 0x00400000 0x50400000 0x0 0x3c00000>; + interrupts = + <54 IRQ_TYPE_LEVEL_HIGH>, /* misc interrupts */ + <55 IRQ_TYPE_LEVEL_HIGH>; /* MSI */ + }; diff --git a/Bindings/phy/bcm-ns-usb3-phy.txt b/Bindings/phy/bcm-ns-usb3-phy.txt index 09aeba94538d..32f057260351 100644 --- a/Bindings/phy/bcm-ns-usb3-phy.txt +++ b/Bindings/phy/bcm-ns-usb3-phy.txt @@ -3,9 +3,10 @@ Driver for Broadcom Northstar USB 3.0 PHY Required properties: - compatible: one of: "brcm,ns-ax-usb3-phy", "brcm,ns-bx-usb3-phy". -- reg: register mappings for DMP (Device Management Plugin) and ChipCommon B - MMI. -- reg-names: "dmp" and "ccb-mii" +- reg: address of MDIO bus device +- usb3-dmp-syscon: phandle to syscon with DMP (Device Management Plugin) + registers +- #phy-cells: must be 0 Initialization of USB 3.0 PHY depends on Northstar version. There are currently three known series: Ax, Bx and Cx. @@ -15,9 +16,19 @@ Known B1: BCM4707 rev 6 Known C0: BCM47094 rev 0 Example: - usb3-phy { - compatible = "brcm,ns-ax-usb3-phy"; - reg = <0x18105000 0x1000>, <0x18003000 0x1000>; - reg-names = "dmp", "ccb-mii"; - #phy-cells = <0>; + mdio: mdio@0 { + reg = <0x0>; + #size-cells = <1>; + #address-cells = <0>; + + usb3-phy@10 { + compatible = "brcm,ns-ax-usb3-phy"; + reg = <0x10>; + usb3-dmp-syscon = <&usb3_dmp>; + #phy-cells = <0>; + }; + }; + + usb3_dmp: syscon@18105000 { + reg = <0x18105000 0x1000>; }; diff --git a/Bindings/phy/brcm,ns2-drd-phy.txt b/Bindings/phy/brcm,ns2-drd-phy.txt new file mode 100644 index 000000000000..04f063aa7883 --- /dev/null +++ b/Bindings/phy/brcm,ns2-drd-phy.txt @@ -0,0 +1,30 @@ +BROADCOM NORTHSTAR2 USB2 (DUAL ROLE DEVICE) PHY + +Required properties: + - compatible: brcm,ns2-drd-phy + - reg: offset and length of the NS2 PHY related registers. + - reg-names + The below registers must be provided. + icfg - for DRD ICFG configurations + rst-ctrl - for DRD IDM reset + crmu-ctrl - for CRMU core vdd, PHY and PHY PLL reset + usb2-strap - for port over current polarity reversal + - #phy-cells: Must be 0. No args required. + - vbus-gpios: vbus gpio binding + - id-gpios: id gpio binding + +Refer to phy/phy-bindings.txt for the generic PHY binding properties + +Example: + usbdrd_phy: phy@66000960 { + #phy-cells = <0>; + compatible = "brcm,ns2-drd-phy"; + reg = <0x66000960 0x24>, + <0x67012800 0x4>, + <0x6501d148 0x4>, + <0x664d0700 0x4>; + reg-names = "icfg", "rst-ctrl", + "crmu-ctrl", "usb2-strap"; + id-gpios = <&gpio_g 30 0>; + vbus-gpios = <&gpio_g 31 0>; + }; diff --git a/Bindings/phy/brcm-sata-phy.txt b/Bindings/phy/brcm-sata-phy.txt index 6ccce09d8bbf..97977cd29a98 100644 --- a/Bindings/phy/brcm-sata-phy.txt +++ b/Bindings/phy/brcm-sata-phy.txt @@ -7,12 +7,13 @@ Required properties: "brcm,iproc-ns2-sata-phy" "brcm,iproc-nsp-sata-phy" "brcm,phy-sata3" + "brcm,iproc-sr-sata-phy" - address-cells: should be 1 - size-cells: should be 0 - reg: register ranges for the PHY PCB interface - reg-names: should be "phy" and "phy-ctrl" The "phy-ctrl" registers are only required for - "brcm,iproc-ns2-sata-phy". + "brcm,iproc-ns2-sata-phy" and "brcm,iproc-sr-sata-phy". Sub-nodes: Each port's PHY should be represented as a sub-node. @@ -23,8 +24,8 @@ Sub-nodes required properties: Sub-nodes optional properties: - brcm,enable-ssc: use spread spectrum clocking (SSC) on this port - This property is not applicable for "brcm,iproc-ns2-sata-phy" and - "brcm,iproc-nsp-sata-phy". + This property is not applicable for "brcm,iproc-ns2-sata-phy", + "brcm,iproc-nsp-sata-phy" and "brcm,iproc-sr-sata-phy". Example: sata-phy@f0458100 { diff --git a/Bindings/phy/meson-gxl-usb2-phy.txt b/Bindings/phy/meson-gxl-usb2-phy.txt new file mode 100644 index 000000000000..a105494a0fc9 --- /dev/null +++ b/Bindings/phy/meson-gxl-usb2-phy.txt @@ -0,0 +1,17 @@ +* Amlogic Meson GXL and GXM USB2 PHY binding + +Required properties: +- compatible: Should be "amlogic,meson-gxl-usb2-phy" +- reg: The base address and length of the registers +- #phys-cells: must be 0 (see phy-bindings.txt in this directory) + +Optional properties: +- phy-supply: see phy-bindings.txt in this directory + + +Example: + usb2_phy0: phy@78000 { + compatible = "amlogic,meson-gxl-usb2-phy"; + #phy-cells = <0>; + reg = <0x0 0x78000 0x0 0x20>; + }; diff --git a/Bindings/phy/meson8b-usb2-phy.txt b/Bindings/phy/meson8b-usb2-phy.txt index 5fa73b9d20f5..d81d73aea608 100644 --- a/Bindings/phy/meson8b-usb2-phy.txt +++ b/Bindings/phy/meson8b-usb2-phy.txt @@ -1,7 +1,8 @@ -* Amlogic Meson8b and GXBB USB2 PHY +* Amlogic Meson8, Meson8b and GXBB USB2 PHY Required properties: - compatible: Depending on the platform this should be one of: + "amlogic,meson8-usb2-phy" "amlogic,meson8b-usb2-phy" "amlogic,meson-gxbb-usb2-phy" - reg: The base address and length of the registers diff --git a/Bindings/phy/phy-cpcap-usb.txt b/Bindings/phy/phy-cpcap-usb.txt new file mode 100644 index 000000000000..2eb9b2b69037 --- /dev/null +++ b/Bindings/phy/phy-cpcap-usb.txt @@ -0,0 +1,40 @@ +Motorola CPCAP PMIC USB PHY binding + +Required properties: +compatible: Shall be either "motorola,cpcap-usb-phy" or + "motorola,mapphone-cpcap-usb-phy" +#phy-cells: Shall be 0 +interrupts: CPCAP PMIC interrupts used by the USB PHY +interrupt-names: Interrupt names +io-channels: IIO ADC channels used by the USB PHY +io-channel-names: IIO ADC channel names +vusb-supply: Regulator for the PHY + +Optional properties: +pinctrl: Optional alternate pin modes for the PHY +pinctrl-names: Names for optional pin modes +mode-gpios: Optional GPIOs for configuring alternate modes + +Example: +cpcap_usb2_phy: phy { + compatible = "motorola,mapphone-cpcap-usb-phy"; + pinctrl-0 = <&usb_gpio_mux_sel1 &usb_gpio_mux_sel2>; + pinctrl-1 = <&usb_ulpi_pins>; + pinctrl-2 = <&usb_utmi_pins>; + pinctrl-3 = <&uart3_pins>; + pinctrl-names = "default", "ulpi", "utmi", "uart"; + #phy-cells = <0>; + interrupts-extended = < + &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0 + &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0 + &cpcap 48 1 + >; + interrupt-names = + "id_ground", "id_float", "se0conn", "vbusvld", + "sessvld", "sessend", "se1", "dm", "dp"; + mode-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH + &gpio1 0 GPIO_ACTIVE_HIGH>; + io-channels = <&cpcap_adc 2>, <&cpcap_adc 7>; + io-channel-names = "vbus", "id"; + vusb-supply = <&vusb>; +}; diff --git a/Bindings/phy/phy-rockchip-inno-usb2.txt b/Bindings/phy/phy-rockchip-inno-usb2.txt index e71a8d23f4a8..84d59b0db8df 100644 --- a/Bindings/phy/phy-rockchip-inno-usb2.txt +++ b/Bindings/phy/phy-rockchip-inno-usb2.txt @@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK Required properties (phy (parent) node): - compatible : should be one of the listed compatibles: + * "rockchip,rk3228-usb2phy" * "rockchip,rk3328-usb2phy" * "rockchip,rk3366-usb2phy" * "rockchip,rk3399-usb2phy" diff --git a/Bindings/phy/rcar-gen3-phy-usb3.txt b/Bindings/phy/rcar-gen3-phy-usb3.txt new file mode 100644 index 000000000000..f94cea48f6b1 --- /dev/null +++ b/Bindings/phy/rcar-gen3-phy-usb3.txt @@ -0,0 +1,46 @@ +* Renesas R-Car generation 3 USB 3.0 PHY + +This file provides information on what the device node for the R-Car generation +3 USB 3.0 PHY contains. +If you want to enable spread spectrum clock (ssc), you should use USB_EXTAL +instead of USB3_CLK. However, if you don't want to these features, you don't +need this driver. + +Required properties: +- compatible: "renesas,r8a7795-usb3-phy" if the device is a part of an R8A7795 + SoC. + "renesas,r8a7796-usb3-phy" if the device is a part of an R8A7796 + SoC. + "renesas,rcar-gen3-usb3-phy" for a generic R-Car Gen3 compatible + device. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + +- reg: offset and length of the USB 3.0 PHY register block. +- clocks: A list of phandles and clock-specifier pairs. +- clock-names: Name of the clocks. + - The funcional clock must be "usb3-if". + - The usb3's external clock must be "usb3s_clk". + - The usb2's external clock must be "usb_extal". If you want to use the ssc, + the clock-frequency must not be 0. +- #phy-cells: see phy-bindings.txt in the same directory, must be <0>. + +Optional properties: +- renesas,ssc-range: Enable/disable spread spectrum clock (ssc) by using + the following values as u32: + - 0 (or the property doesn't exist): disable the ssc + - 4980: enable the ssc as -4980 ppm + - 4492: enable the ssc as -4492 ppm + - 4003: enable the ssc as -4003 ppm + +Example (R-Car H3): + + usb-phy@e65ee000 { + compatible = "renesas,r8a7795-usb3-phy", + "renesas,rcar-gen3-usb3-phy"; + reg = <0 0xe65ee000 0 0x90>; + clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, <&usb_extal>; + clock-names = "usb3-if", "usb3s_clk", "usb_extal"; + }; diff --git a/Bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Bindings/pinctrl/allwinner,sunxi-pinctrl.txt index b53224473672..6f2ec9af0de2 100644 --- a/Bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -20,8 +20,10 @@ Required properties: "allwinner,sun9i-a80-pinctrl" "allwinner,sun9i-a80-r-pinctrl" "allwinner,sun8i-a83t-pinctrl" + "allwinner,sun8i-a83t-r-pinctrl" "allwinner,sun8i-h3-pinctrl" "allwinner,sun8i-h3-r-pinctrl" + "allwinner,sun8i-r40-pinctrl" "allwinner,sun50i-a64-pinctrl" "allwinner,sun50i-a64-r-pinctrl" "allwinner,sun50i-h5-pinctrl" diff --git a/Bindings/pinctrl/ingenic,pinctrl.txt b/Bindings/pinctrl/ingenic,pinctrl.txt new file mode 100644 index 000000000000..ca313a7aeaff --- /dev/null +++ b/Bindings/pinctrl/ingenic,pinctrl.txt @@ -0,0 +1,41 @@ +Ingenic jz47xx pin controller + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + +For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may +be used as GPIOs, multiplexed device functions are configured within the +GPIO port configuration registers and it is typical to refer to pins using the +naming scheme "PxN" where x is a character identifying the GPIO port with +which the pin is associated and N is an integer from 0 to 31 identifying the +pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and +PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to +PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a +total of 192 pins. + + +Required properties: +-------------------- + + - compatible: One of: + - "ingenic,jz4740-pinctrl" + - "ingenic,jz4770-pinctrl" + - "ingenic,jz4780-pinctrl" + - reg: Address range of the pinctrl registers. + + +GPIO sub-nodes +-------------- + +The pinctrl node can have optional sub-nodes for the Ingenic GPIO driver; +please refer to ../gpio/ingenic,gpio.txt. + + +Example: +-------- + +pinctrl: pin-controller@10010000 { + compatible = "ingenic,jz4740-pinctrl"; + reg = <0x10010000 0x400>; +}; diff --git a/Bindings/pinctrl/pinctrl-bindings.txt b/Bindings/pinctrl/pinctrl-bindings.txt index f01d154090da..62d0f33fa65e 100644 --- a/Bindings/pinctrl/pinctrl-bindings.txt +++ b/Bindings/pinctrl/pinctrl-bindings.txt @@ -204,21 +204,22 @@ each single pin the number of required sub-nodes containing "pin" and maintain. For cases like this, the pin controller driver may use the pinmux helper -property, where the pin identifier is packed with mux configuration settings -in a single integer. +property, where the pin identifier is provided with mux configuration settings +in a pinmux group. A pinmux group consists of the pin identifier and mux +settings represented as a single integer or an array of integers. -The pinmux property accepts an array of integers, each of them describing +The pinmux property accepts an array of pinmux groups, each of them describing a single pin multiplexing configuration. pincontroller { state_0_node_a { - pinmux = , , ...; + pinmux = , , ...; }; }; Each individual pin controller driver bindings documentation shall specify -how those values (pin IDs and pin multiplexing configuration) are defined and -assembled together. +how pin IDs and pin multiplexing configuration are defined and assembled +together in a pinmux group. == Generic pin configuration node content == @@ -251,14 +252,20 @@ drive-push-pull - drive actively high and low drive-open-drain - drive with open drain drive-open-source - drive with open source drive-strength - sink or source at most X mA -input-enable - enable input on pin (no effect on output) -input-disable - disable input on pin (no effect on output) +input-enable - enable input on pin (no effect on output, such as + enabling an input buffer) +input-disable - disable input on pin (no effect on output, such as + disabling an input buffer) input-schmitt-enable - enable schmitt-trigger mode input-schmitt-disable - disable schmitt-trigger mode input-debounce - debounce mode with debound time X power-source - select between different power supplies low-power-enable - enable low power mode low-power-disable - disable low power mode +output-disable - disable output on a pin (such as disable an output + buffer) +output-enable - enable output on a pin without actively driving it + (such as enabling an output buffer) output-low - set the pin to output mode with low level output-high - set the pin to output mode with high level slew-rate - set the slew rate @@ -300,7 +307,7 @@ arguments are described below. - pinmux takes a list of pin IDs and mux settings as required argument. The specific bindings for the hardware defines: - How pin IDs and mux settings are defined and assembled together in a single - integer. + integer or an array of integers. - bias-pull-up, -down and -pin-default take as optional argument on hardware supporting it the pull strength in Ohm. bias-disable will disable the pull. diff --git a/Bindings/pinctrl/pinctrl-zx.txt b/Bindings/pinctrl/pinctrl-zx.txt new file mode 100644 index 000000000000..e219849b21ca --- /dev/null +++ b/Bindings/pinctrl/pinctrl-zx.txt @@ -0,0 +1,85 @@ +* ZTE ZX Pin Controller + +The pin controller on ZTE ZX platforms is kinda of hybrid. It consists of +a main controller and an auxiliary one. For example, on ZX296718 SoC, the +main controller is TOP_PMM and the auxiliary one is AON_IOCFG. Both +controllers work together to control pin multiplexing and configuration in +the way illustrated as below. + + + GMII_RXD3 ---+ + | + DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin) + | + BGPIO16 ---+ ^ + | pinconf + ^ | + | pinmux | + | | + + TOP_PMM (main) AON_IOCFG (aux) + + | | | + | pinmux | | + | pinmux v | + v | pinconf + KEY_ROW2 ---+ v + PORT1_LCD_TE ---+ | + | AGPIO10 ---+------ KEY_ROW2 (AON pin) + I2S0_DOUT3 ---+ | + |-----------------------+ + PWM_OUT3 ---+ + | + VGA_VS1 ---+ + + +For most of pins like GMII_RXD3 in the figure, the pinmux function is +controlled by TOP_PMM block only, and this type of pins are meant by term +'TOP pins'. For pins like KEY_ROW2, the pinmux is controlled by both +TOP_PMM and AON_IOCFG blocks, as the available multiplexing functions for +the pin spread in both controllers. This type of pins are called 'AON pins'. +Though pinmux implementation is quite different, pinconf is same for both +types of pins. Both are controlled by auxiliary controller, i.e. AON_IOCFG +on ZX296718. + +Required properties: +- compatible: should be "zte,zx296718-pmm". +- reg: the register physical address and length. +- zte,auxiliary-controller: phandle to the auxiliary pin controller which + implements pinmux for AON pins and pinconf for all pins. + +The following pin configuration are supported. Please refer to +pinctrl-bindings.txt in this directory for more details of the common +pinctrl bindings used by client devices. + +- bias-pull-up +- bias-pull-down +- drive-strength +- input-enable +- slew-rate + +Examples: + +iocfg: pin-controller@119000 { + compatible = "zte,zx296718-iocfg"; + reg = <0x119000 0x1000>; +}; + +pmm: pin-controller@1462000 { + compatible = "zte,zx296718-pmm"; + reg = <0x1462000 0x1000>; + zte,auxiliary-controller = <&iocfg>; +}; + +&pmm { + vga_pins: vga { + pins = "KEY_COL1", "KEY_COL2", "KEY_ROW1", "KEY_ROW2"; + function = "VGA"; + }; +}; + +&vga { + pinctrl-names = "default"; + pinctrl-0 = <&vga_pins>; + status = "okay"; +}; diff --git a/Bindings/pinctrl/qcom,ipq8074-pinctrl.txt b/Bindings/pinctrl/qcom,ipq8074-pinctrl.txt new file mode 100644 index 000000000000..407b9443629d --- /dev/null +++ b/Bindings/pinctrl/qcom,ipq8074-pinctrl.txt @@ -0,0 +1,172 @@ +Qualcomm Technologies, Inc. IPQ8074 TLMM block + +This binding describes the Top Level Mode Multiplexer block found in the +IPQ8074 platform. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,ipq8074-pinctrl" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the TLMM register space. + +- interrupts: + Usage: required + Value type: + Definition: should specify the TLMM summary IRQ. + +- interrupt-controller: + Usage: required + Value type: + Definition: identifies this node as an interrupt controller + +- #interrupt-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +- gpio-controller: + Usage: required + Value type: + Definition: identifies this node as a gpio controller + +- #gpio-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for +a general description of GPIO and interrupt bindings. + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + +The pin configuration nodes act as a container for an arbitrary number of +subnodes. Each of these subnodes represents some desired configuration for a +pin, a group, or a list of pins or groups. This configuration can include the +mux function to select on those pin(s)/group(s), and various pin configuration +parameters, such as pull-up, drive strength, etc. + + +PIN CONFIGURATION NODES: + +The name of each subnode is not important; all subnodes should be enumerated +and processed purely based on their content. + +Each subnode only affects those parameters that are explicitly listed. In +other words, a subnode that lists a mux function but no pin configuration +parameters implies no information about any pin configuration parameters. +Similarly, a pin subnode that describes a pullup parameter implies no +information about e.g. the mux function. + + +The following generic properties as defined in pinctrl-bindings.txt are valid +to specify in a pin configuration subnode: + +- pins: + Usage: required + Value type: + Definition: List of gpio pins affected by the properties specified in + this subnode. Valid pins are: + gpio0-gpio69 + +- function: + Usage: required + Value type: + Definition: Specify the alternative function to be configured for the + specified pins. Functions are only valid for gpio pins. + Valid values are: + atest_char, atest_char0, atest_char1, atest_char2, + atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync, + audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync, + audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c, + blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart, + blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2, + blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0, + blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi, + blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1, + cxc0, cxc1, dbg_out, gcc_plltest, gcc_tlmm, gpio, ldo_en, + ldo_update, led0, led1, led2, mac0_sa0, mac0_sa1, mac1_sa0, + mac1_sa1, mac1_sa2, mac1_sa3, mac2_sa0, mac2_sa1, mdc, + mdio, pcie0_clk, pcie0_rst, pcie0_wake, pcie1_clk, + pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx, pcm_fsync, + pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0, pta1_1, + pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3, + qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, + qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, + qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, + qpic, rx0, rx1, rx2, sd_card, sd_write, tsens_max, wci2a, + wci2b, wci2c, wci2d + +- bias-disable: + Usage: optional + Value type: + Definition: The specified pins should be configued as no pull. + +- bias-pull-down: + Usage: optional + Value type: + Definition: The specified pins should be configued as pull down. + +- bias-pull-up: + Usage: optional + Value type: + Definition: The specified pins should be configued as pull up. + +- output-high: + Usage: optional + Value type: + Definition: The specified pins are configured in output mode, driven + high. + +- output-low: + Usage: optional + Value type: + Definition: The specified pins are configured in output mode, driven + low. + +- drive-strength: + Usage: optional + Value type: + Definition: Selects the drive strength for the specified pins, in mA. + Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 + +Example: + + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq8074-pinctrl"; + reg = <0x1000000 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + uart2: uart2-default { + mux { + pins = "gpio23", "gpio24"; + function = "blsp4_uart1"; + }; + + rx { + pins = "gpio23"; + drive-strength = <4>; + bias-disable; + }; + + tx { + pins = "gpio24"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; diff --git a/Bindings/pinctrl/renesas,pfc-pinctrl.txt b/Bindings/pinctrl/renesas,pfc-pinctrl.txt index 13df9498311a..645082f03259 100644 --- a/Bindings/pinctrl/renesas,pfc-pinctrl.txt +++ b/Bindings/pinctrl/renesas,pfc-pinctrl.txt @@ -13,6 +13,8 @@ Required Properties: - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller. - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller. - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller. + - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller. + - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller. - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller. - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller. - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller. diff --git a/Bindings/pinctrl/renesas,rza1-pinctrl.txt b/Bindings/pinctrl/renesas,rza1-pinctrl.txt new file mode 100644 index 000000000000..43e21474528a --- /dev/null +++ b/Bindings/pinctrl/renesas,rza1-pinctrl.txt @@ -0,0 +1,221 @@ +Renesas RZ/A1 combined Pin and GPIO controller + +The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO controller, +named "Ports" in the hardware reference manual. +Pin multiplexing and GPIO configuration is performed on a per-pin basis +writing configuration values to per-port register sets. +Each "port" features up to 16 pins, each of them configurable for GPIO +function (port mode) or in alternate function mode. +Up to 8 different alternate function modes exist for each single pin. + +Pin controller node +------------------- + +Required properties: + - compatible + this shall be "renesas,r7s72100-ports". + + - reg + address base and length of the memory area where the pin controller + hardware is mapped to. + +Example: +Pin controller node for RZ/A1H SoC (r7s72100) + +pinctrl: pin-controller@fcfe3000 { + compatible = "renesas,r7s72100-ports"; + + reg = <0xfcfe3000 0x4230>; +}; + +Sub-nodes +--------- + +The child nodes of the pin controller node describe a pin multiplexing +function or a GPIO controller alternatively. + +- Pin multiplexing sub-nodes: + A pin multiplexing sub-node describes how to configure a set of + (or a single) pin in some desired alternate function mode. + A single sub-node may define several pin configurations. + A few alternate function require special pin configuration flags to be + supplied along with the alternate function configuration number. + The hardware reference manual specifies when a pin function requires + "software IO driven" mode to be specified. To do so use the generic + properties from the header file + to instruct the pin controller to perform the desired pin configuration + operation. + Please refer to pinctrl-bindings.txt to get to know more on generic + pin properties usage. + + The allowed generic formats for a pin multiplexing sub-node are the + following ones: + + node-1 { + pinmux = , , ... ; + GENERIC_PINCONFIG; + }; + + node-2 { + sub-node-1 { + pinmux = , , ... ; + GENERIC_PINCONFIG; + }; + + sub-node-2 { + pinmux = , , ... ; + GENERIC_PINCONFIG; + }; + + ... + + sub-node-n { + pinmux = , , ... ; + GENERIC_PINCONFIG; + }; + }; + + Use the second format when pins part of the same logical group need to have + different generic pin configuration flags applied. + + Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle + of the most external one. + + Eg. + + client-1 { + ... + pinctrl-0 = <&node-1>; + ... + }; + + client-2 { + ... + pinctrl-0 = <&node-2>; + ... + }; + + Required properties: + - pinmux: + integer array representing pin number and pin multiplexing configuration. + When a pin has to be configured in alternate function mode, use this + property to identify the pin by its global index, and provide its + alternate function configuration number along with it. + When multiple pins are required to be configured as part of the same + alternate function they shall be specified as members of the same + argument list of a single "pinmux" property. + Helper macros to ease assembling the pin index from its position + (port where it sits on and pin number) and alternate function identifier + are provided by the pin controller header file at: + + Integers values in "pinmux" argument list are assembled as: + ((PORT * 16 + PIN) | MUX_FUNC << 16) + + Optional generic properties: + - input-enable: + enable input bufer for pins requiring software driven IO input + operations. + - output-high: + enable output buffer for pins requiring software driven IO output + operations. output-low can be used alternatively, as line value is + ignored by the driver. + + The hardware reference manual specifies when a pin has to be configured to + work in bi-directional mode and when the IO direction has to be specified + by software. Bi-directional pins are managed by the pin controller driver + internally, while software driven IO direction has to be explicitly + selected when multiple options are available. + + Example: + A serial communication interface with a TX output pin and an RX input pin. + + &pinctrl { + scif2_pins: serial2 { + pinmux = , ; + }; + }; + + Pin #0 on port #3 is configured as alternate function #6. + Pin #2 on port #3 is configured as alternate function #4. + + Example 2: + I2c master: both SDA and SCL pins need bi-directional operations + + &pinctrl { + i2c2_pins: i2c2 { + pinmux = , ; + }; + }; + + Pin #4 on port #1 is configured as alternate function #1. + Pin #5 on port #1 is configured as alternate function #1. + Both need to work in bi-directional mode, the driver manages this internally. + + Example 3: + Multi-function timer input and output compare pins. + Configure TIOC0A as software driven input and TIOC0B as software driven + output. + + &pinctrl { + tioc0_pins: tioc0 { + tioc0_input_pins { + pinumx = ; + input-enable; + }; + + tioc0_output_pins { + pinmux = ; + output-enable; + }; + }; + }; + + &tioc0 { + ... + pinctrl-0 = <&tioc0_pins>; + ... + }; + + Pin #0 on port #4 is configured as alternate function #2 with IO direction + specified by software as input. + Pin #1 on port #4 is configured as alternate function #1 with IO direction + specified by software as output. + +- GPIO controller sub-nodes: + Each port of the r7s72100 pin controller hardware is itself a GPIO controller. + Different SoCs have different numbers of available pins per port, but + generally speaking, each of them can be configured in GPIO ("port") mode + on this hardware. + Describe GPIO controllers using sub-nodes with the following properties. + + Required properties: + - gpio-controller + empty property as defined by the GPIO bindings documentation. + - #gpio-cells + number of cells required to identify and configure a GPIO. + Shall be 2. + - gpio-ranges + Describes a GPIO controller specifying its specific pin base, the pin + base in the global pin numbering space, and the number of controlled + pins, as defined by the GPIO bindings documentation. Refer to + Documentation/devicetree/bindings/gpio/gpio.txt file for a more detailed + description. + + Example: + A GPIO controller node, controlling 16 pins indexed from 0. + The GPIO controller base in the global pin indexing space is pin 48, thus + pins [0 - 15] on this controller map to pins [48 - 63] in the global pin + indexing space. + + port3: gpio-3 { + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + A device node willing to use pins controlled by this GPIO controller, shall + refer to it as follows: + + led1 { + gpios = <&port3 10 GPIO_ACTIVE_LOW>; + }; diff --git a/Bindings/power/actions,owl-sps.txt b/Bindings/power/actions,owl-sps.txt new file mode 100644 index 000000000000..007b9a7ae723 --- /dev/null +++ b/Bindings/power/actions,owl-sps.txt @@ -0,0 +1,17 @@ +Actions Semi Owl Smart Power System (SPS) + +Required properties: +- compatible : "actions,s500-sps" for S500 +- reg : Offset and length of the register set for the device. +- #power-domain-cells : Must be 1. + See macros in: + include/dt-bindings/power/owl-s500-powergate.h for S500 + + +Example: + + sps: power-controller@b01b0100 { + compatible = "actions,s500-sps"; + reg = <0xb01b0100 0x100>; + #power-domain-cells = <1>; + }; diff --git a/Bindings/power/rockchip-io-domain.txt b/Bindings/power/rockchip-io-domain.txt index d3a5a93a65cd..43c21fb04564 100644 --- a/Bindings/power/rockchip-io-domain.txt +++ b/Bindings/power/rockchip-io-domain.txt @@ -32,6 +32,7 @@ SoC is on the same page. Required properties: - compatible: should be one of: - "rockchip,rk3188-io-voltage-domain" for rk3188 + - "rockchip,rk3228-io-voltage-domain" for rk3228 - "rockchip,rk3288-io-voltage-domain" for rk3288 - "rockchip,rk3328-io-voltage-domain" for rk3328 - "rockchip,rk3368-io-voltage-domain" for rk3368 @@ -59,6 +60,12 @@ Possible supplies for rk3188: - vccio1-supply: The supply connected to VCCIO1. Sometimes also labeled VCCIO1 and VCCIO2. +Possible supplies for rk3228: +- vccio1-supply: The supply connected to VCCIO1. +- vccio2-supply: The supply connected to VCCIO2. +- vccio3-supply: The supply connected to VCCIO3. +- vccio4-supply: The supply connected to VCCIO4. + Possible supplies for rk3288: - audio-supply: The supply connected to APIO4_VDD. - bb-supply: The supply connected to APIO5_VDD. diff --git a/Bindings/power/supply/battery.txt b/Bindings/power/supply/battery.txt new file mode 100644 index 000000000000..f4d3b4a10b43 --- /dev/null +++ b/Bindings/power/supply/battery.txt @@ -0,0 +1,57 @@ +Battery Characteristics + +The devicetree battery node provides static battery characteristics. +In smart batteries, these are typically stored in non-volatile memory +on a fuel gauge chip. The battery node should be used where there is +no appropriate non-volatile memory, or it is unprogrammed/incorrect. + +Upstream dts files should not include battery nodes, unless the battery +represented cannot easily be replaced in the system by one of a +different type. This prevents unpredictable, potentially harmful, +behavior should a replacement that changes the battery type occur +without a corresponding update to the dtb. + +Required Properties: + - compatible: Must be "simple-battery" + +Optional Properties: + - voltage-min-design-microvolt: drained battery voltage + - energy-full-design-microwatt-hours: battery design energy + - charge-full-design-microamp-hours: battery design capacity + - precharge-current-microamp: current for pre-charge phase + - charge-term-current-microamp: current for charge termination phase + - constant-charge-current-max-microamp: maximum constant input current + - constant-charge-voltage-max-microvolt: maximum constant input voltage + +Battery properties are named, where possible, for the corresponding +elements in enum power_supply_property, defined in +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/power_supply.h + +Batteries must be referenced by chargers and/or fuel-gauges +using a phandle. The phandle's property should be named +"monitored-battery". + +Example: + + bat: battery { + compatible = "simple-battery"; + voltage-min-design-microvolt = <3200000>; + energy-full-design-microwatt-hours = <5290000>; + charge-full-design-microamp-hours = <1430000>; + precharge-current-microamp = <256000>; + charge-term-current-microamp = <128000>; + constant-charge-current-max-microamp = <900000>; + constant-charge-voltage-max-microvolt = <4200000>; + }; + + charger: charger@11 { + .... + monitored-battery = <&bat>; + ... + }; + + fuel_gauge: fuel-gauge@22 { + .... + monitored-battery = <&bat>; + ... + }; diff --git a/Bindings/power/supply/bq27xxx.txt b/Bindings/power/supply/bq27xxx.txt index b0c95ef63e68..6858e1a804ad 100644 --- a/Bindings/power/supply/bq27xxx.txt +++ b/Bindings/power/supply/bq27xxx.txt @@ -1,7 +1,7 @@ -Binding for TI BQ27XXX fuel gauge family +TI BQ27XXX fuel gauge family Required properties: -- compatible: Should contain one of the following: +- compatible: contains one of the following: * "ti,bq27200" - BQ27200 * "ti,bq27210" - BQ27210 * "ti,bq27500" - deprecated, use revision specific property below @@ -26,11 +26,28 @@ Required properties: * "ti,bq27425" - BQ27425 * "ti,bq27441" - BQ27441 * "ti,bq27621" - BQ27621 -- reg: integer, i2c address of the device. +- reg: integer, I2C address of the fuel gauge. + +Optional properties: +- monitored-battery: phandle of battery characteristics node + The fuel gauge uses the following battery properties: + + energy-full-design-microwatt-hours + + charge-full-design-microamp-hours + + voltage-min-design-microvolt + Both or neither of the *-full-design-*-hours properties must be set. + See Documentation/devicetree/bindings/power/supply/battery.txt Example: -bq27510g3 { - compatible = "ti,bq27510g3"; - reg = <0x55>; -}; + bat: battery { + compatible = "simple-battery"; + voltage-min-design-microvolt = <3200000>; + energy-full-design-microwatt-hours = <5290000>; + charge-full-design-microamp-hours = <1430000>; + }; + + bq27510g3: fuel-gauge@55 { + compatible = "ti,bq27510g3"; + reg = <0x55>; + monitored-battery = <&bat>; + }; diff --git a/Bindings/power/supply/cpcap-battery.txt b/Bindings/power/supply/cpcap-battery.txt new file mode 100644 index 000000000000..a04efa22da01 --- /dev/null +++ b/Bindings/power/supply/cpcap-battery.txt @@ -0,0 +1,31 @@ +Motorola CPCAP PMIC battery driver binding + +Required properties: +- compatible: Shall be "motorola,cpcap-battery" +- interrupts: Interrupt specifier for each name in interrupt-names +- interrupt-names: Should contain the following entries: + "lowbph", "lowbpl", "chrgcurr1", "battdetb" +- io-channels: IIO ADC channel specifier for each name in io-channel-names +- io-channel-names: Should contain the following entries: + "battdetb", "battp", "chg_isense", "batti" +- power-supplies: List of phandles for power-supplying devices, as + described in power_supply.txt. Typically a reference + to cpcap_charger. + +Example: + +cpcap_battery: battery { + compatible = "motorola,cpcap-battery"; + interrupts-extended = < + &cpcap 5 0 &cpcap 3 0 + &cpcap 20 0 &cpcap 54 0 + >; + interrupt-names = + "lowbph", "lowbpl", + "chrgcurr1", "battdetb"; + io-channels = <&cpcap_adc 0 &cpcap_adc 1 + &cpcap_adc 5 &cpcap_adc 6>; + io-channel-names = "battdetb", "battp", + "chg_isense", "batti"; + power-supplies = <&cpcap_charger>; +}; diff --git a/Bindings/power/supply/ltc3651-charger.txt b/Bindings/power/supply/ltc3651-charger.txt new file mode 100644 index 000000000000..71f2840e8209 --- /dev/null +++ b/Bindings/power/supply/ltc3651-charger.txt @@ -0,0 +1,27 @@ +ltc3651-charger + +Required properties: + - compatible: "lltc,ltc3651-charger" + - lltc,acpr-gpios: Connect to ACPR output. See remark below. + +Optional properties: + - lltc,fault-gpios: Connect to FAULT output. See remark below. + - lltc,chrg-gpios: Connect to CHRG output. See remark below. + +The ltc3651 outputs are open-drain type and active low. The driver assumes the +GPIO reports "active" when the output is asserted, so if the pins have been +connected directly, the GPIO flags should be set to active low also. + +The driver will attempt to aquire interrupts for all GPIOs to detect changes in +line state. If the system is not capabale of providing interrupts, the driver +cannot report changes and userspace will need to periodically read the sysfs +attributes to detect changes. + +Example: + + charger: battery-charger { + compatible = "lltc,ltc3651-charger"; + lltc,acpr-gpios = <&gpio0 68 GPIO_ACTIVE_LOW>; + lltc,fault-gpios = <&gpio0 64 GPIO_ACTIVE_LOW>; + lltc,chrg-gpios = <&gpio0 63 GPIO_ACTIVE_LOW>; + }; diff --git a/Bindings/power/max8903-charger.txt b/Bindings/power/supply/max8903-charger.txt similarity index 100% rename from Bindings/power/max8903-charger.txt rename to Bindings/power/supply/max8903-charger.txt diff --git a/Bindings/power_supply/maxim,max14656.txt b/Bindings/power/supply/maxim,max14656.txt similarity index 100% rename from Bindings/power_supply/maxim,max14656.txt rename to Bindings/power/supply/maxim,max14656.txt diff --git a/Bindings/powerpc/fsl/cpus.txt b/Bindings/powerpc/fsl/cpus.txt index f8cd2397aa04..d63ab1dec16d 100644 --- a/Bindings/powerpc/fsl/cpus.txt +++ b/Bindings/powerpc/fsl/cpus.txt @@ -3,10 +3,10 @@ Power Architecture CPU Binding Copyright 2013 Freescale Semiconductor Inc. Power Architecture CPUs in Freescale SOCs are represented in device trees as -per the definition in ePAPR. +per the definition in the Devicetree Specification. -In addition to the ePAPR definitions, the properties defined below may be -present on CPU nodes. +In addition to the the Devicetree Specification definitions, the properties +defined below may be present on CPU nodes. PROPERTIES diff --git a/Bindings/powerpc/fsl/l2cache.txt b/Bindings/powerpc/fsl/l2cache.txt index dc9bb3182525..8a70696395a7 100644 --- a/Bindings/powerpc/fsl/l2cache.txt +++ b/Bindings/powerpc/fsl/l2cache.txt @@ -1,7 +1,7 @@ Freescale L2 Cache Controller L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms. -The cache bindings explained below are ePAPR compliant +The cache bindings explained below are Devicetree Specification compliant Required Properties: diff --git a/Bindings/powerpc/fsl/srio-rmu.txt b/Bindings/powerpc/fsl/srio-rmu.txt index b9a8a2bcfae7..0496ada4bba4 100644 --- a/Bindings/powerpc/fsl/srio-rmu.txt +++ b/Bindings/powerpc/fsl/srio-rmu.txt @@ -124,8 +124,8 @@ Port-Write Unit: A single IRQ that handles port-write conditions is specified by this property. (Typically shared with error). - Note: All other standard properties (see the ePAPR) are allowed - but are optional. + Note: All other standard properties (see the Devicetree Specification) + are allowed but are optional. Example: rmu: rmu@d3000 { diff --git a/Bindings/powerpc/fsl/srio.txt b/Bindings/powerpc/fsl/srio.txt index 07abf0f2f440..86ee6ea73754 100644 --- a/Bindings/powerpc/fsl/srio.txt +++ b/Bindings/powerpc/fsl/srio.txt @@ -72,7 +72,8 @@ the following properties: represents the LIODN associated with maintenance transactions for the port. -Note: All other standard properties (see ePAPR) are allowed but are optional. +Note: All other standard properties (see the Devicetree Specification) +are allowed but are optional. Example: diff --git a/Bindings/property-units.txt b/Bindings/property-units.txt index 12278d79f6c0..45ce054d844d 100644 --- a/Bindings/property-units.txt +++ b/Bindings/property-units.txt @@ -25,9 +25,12 @@ Distance Electricity ---------------------------------------- -microamp : micro amps +-microamp-hours : micro amp-hours -ohms : Ohms -micro-ohms : micro Ohms +-microwatt-hours: micro Watt-hours -microvolt : micro volts +-picofarads : picofarads Temperature ---------------------------------------- diff --git a/Bindings/ptp/brcm,ptp-dte.txt b/Bindings/ptp/brcm,ptp-dte.txt new file mode 100644 index 000000000000..7c04e22a5d6a --- /dev/null +++ b/Bindings/ptp/brcm,ptp-dte.txt @@ -0,0 +1,20 @@ +* Broadcom Digital Timing Engine(DTE) based PTP clock + +Required properties: +- compatible: should contain the core compatibility string + and the SoC compatibility string. The SoC + compatibility string is to handle SoC specific + hardware differences. + Core compatibility string: + "brcm,ptp-dte" + SoC compatibility strings: + "brcm,iproc-ptp-dte" - for iproc based SoC's +- reg: address and length of the DTE block's NCO registers + +Example: + +ptp: ptp-dte@180af650 { + compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte"; + reg = <0x180af650 0x10>; + status = "okay"; +}; diff --git a/Bindings/pwm/pwm-meson.txt b/Bindings/pwm/pwm-meson.txt index 5376a4468cb6..5b07bebbf6f7 100644 --- a/Bindings/pwm/pwm-meson.txt +++ b/Bindings/pwm/pwm-meson.txt @@ -2,7 +2,9 @@ Amlogic Meson PWM Controller ============================ Required properties: -- compatible: Shall contain "amlogic,meson8b-pwm" or "amlogic,meson-gxbb-pwm". +- compatible: Shall contain "amlogic,meson8b-pwm" + or "amlogic,meson-gxbb-pwm" + or "amlogic,meson-gxbb-ao-pwm" - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. diff --git a/Bindings/pwm/pwm-stm32.txt b/Bindings/pwm/pwm-stm32.txt index 6dd040363e5e..3e6d55018d7a 100644 --- a/Bindings/pwm/pwm-stm32.txt +++ b/Bindings/pwm/pwm-stm32.txt @@ -24,7 +24,7 @@ Example: compatible = "st,stm32-timers"; reg = <0x40010000 0x400>; clocks = <&rcc 0 160>; - clock-names = "clk_int"; + clock-names = "int"; pwm { compatible = "st,stm32-pwm"; diff --git a/Bindings/pwm/renesas,pwm-rcar.txt b/Bindings/pwm/renesas,pwm-rcar.txt index d6de64335022..7e94b802395d 100644 --- a/Bindings/pwm/renesas,pwm-rcar.txt +++ b/Bindings/pwm/renesas,pwm-rcar.txt @@ -8,6 +8,7 @@ Required Properties: - "renesas,pwm-r8a7791": for R-Car M2-W - "renesas,pwm-r8a7794": for R-Car E2 - "renesas,pwm-r8a7795": for R-Car H3 + - "renesas,pwm-r8a7796": for R-Car M3-W - reg: base address and length of the registers block for the PWM. - #pwm-cells: should be 2. See pwm.txt in this directory for a description of the cells format. diff --git a/Bindings/regulator/regulator.txt b/Bindings/regulator/regulator.txt index d18edb075e1c..378f6dc8b8bd 100644 --- a/Bindings/regulator/regulator.txt +++ b/Bindings/regulator/regulator.txt @@ -24,6 +24,14 @@ Optional properties: - regulator-settling-time-us: Settling time, in microseconds, for voltage change if regulator have the constant time for any level voltage change. This is useful when regulator have exponential voltage change. +- regulator-settling-time-up-us: Settling time, in microseconds, for voltage + increase if the regulator needs a constant time to settle after voltage + increases of any level. This is useful for regulators with exponential + voltage changes. +- regulator-settling-time-down-us: Settling time, in microseconds, for voltage + decrease if the regulator needs a constant time to settle after voltage + decreases of any level. This is useful for regulators with exponential + voltage changes. - regulator-soft-start: Enable soft start so that voltage ramps slowly - regulator-state-mem sub-root node for Suspend-to-RAM mode : suspend to memory, the device goes to sleep, but all data stored in memory, diff --git a/Bindings/remoteproc/ti,keystone-rproc.txt b/Bindings/remoteproc/ti,keystone-rproc.txt new file mode 100644 index 000000000000..2aac1aa4123d --- /dev/null +++ b/Bindings/remoteproc/ti,keystone-rproc.txt @@ -0,0 +1,133 @@ +TI Keystone DSP devices +======================= + +The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core +sub-systems that are used to offload some of the processor-intensive tasks or +algorithms, for achieving various system level goals. + +These processor sub-systems usually contain additional sub-modules like L1 +and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller, +a dedicated local power/sleep controller etc. The DSP processor core in +Keystone 2 SoCs is usually a TMS320C66x CorePac processor. + +DSP Device Node: +================ +Each DSP Core sub-system is represented as a single DT node, and should also +have an alias with the stem 'rproc' defined. Each node has a number of required +or optional properties that enable the OS running on the host processor (ARM +CorePac) to perform the device management of the remote processor and to +communicate with the remote processor. + +Required properties: +-------------------- +The following are the mandatory properties: + +- compatible: Should be one of the following, + "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs + "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs + "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs + +- reg: Should contain an entry for each value in 'reg-names'. + Each entry should have the memory region's start address + and the size of the region, the representation matching + the parent node's '#address-cells' and '#size-cells' values. + +- reg-names: Should contain strings with the following names, each + representing a specific internal memory region, and + should be defined in this order, + "l2sram", "l1pram", "l1dram" + +- clocks: Should contain the device's input clock, and should be + defined as per the bindings in, + Documentation/devicetree/bindings/clock/keystone-gate.txt + +- ti,syscon-dev: Should be a pair of the phandle to the Keystone Device + State Control node, and the register offset of the DSP + boot address register within that node's address space. + +- resets: Should contain the phandle to the reset controller node + managing the resets for this device, and a reset + specifier. Please refer to the following reset bindings + for the reset argument specifier as per SoC, + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt + for 66AK2HK/66AK2L/66AK2E SoCs + +- interrupt-parent: Should contain a phandle to the Keystone 2 IRQ controller + IP node that is used by the ARM CorePac processor to + receive interrupts from the DSP remote processors. See + Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt + for details. + +- interrupts: Should contain an entry for each value in 'interrupt-names'. + Each entry should have the interrupt source number used by + the remote processor to the host processor. The values should + follow the interrupt-specifier format as dictated by the + 'interrupt-parent' node. The purpose of each is as per the + description in the 'interrupt-names' property. + +- interrupt-names: Should contain strings with the following names, each + representing a specific interrupt, + "vring" - interrupt for virtio based IPC + "exception" - interrupt for exception notification + +- kick-gpios: Should specify the gpio device needed for the virtio IPC + stack. This will be used to interrupt the remote processor. + The gpio device to be used is as per the bindings in, + Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt + +Optional properties: +-------------------- + +- memory-region: phandle to the reserved memory node to be associated + with the remoteproc device. The reserved memory node + can be a CMA memory node, and should be defined as + per the bindings in + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + + +Example: +-------- + /* 66AK2H/K DSP aliases */ + aliases { + rproc0 = &dsp0; + rproc1 = &dsp1; + rproc2 = &dsp2; + rproc3 = &dsp3; + rproc4 = &dsp4; + rproc5 = &dsp5; + rproc6 = &dsp6; + rproc7 = &dsp7; + }; + + /* 66AK2H/K DSP memory node */ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dsp_common_memory: dsp-common-memory@81f800000 { + compatible = "shared-dma-pool"; + reg = <0x00000008 0x1f800000 0x00000000 0x800000>; + reusable; + }; + }; + + /* 66AK2H/K DSP node */ + soc { + dsp0: dsp@10800000 { + compatible = "ti,k2hk-dsp"; + reg = <0x10800000 0x00100000>, + <0x10e00000 0x00008000>, + <0x10f00000 0x00008000>; + reg-names = "l2sram", "l1pram", "l1dram"; + clocks = <&clkgem0>; + ti,syscon-dev = <&devctrl 0x40>; + resets = <&pscrst 0>; + interrupt-parent = <&kirq0>; + interrupts = <0 8>; + interrupt-names = "vring", "exception"; + kick-gpios = <&dspgpio0 27 0>; + memory-region = <&dsp_common_memory>; + }; + + }; diff --git a/Bindings/reserved-memory/reserved-memory.txt b/Bindings/reserved-memory/reserved-memory.txt index 3da0ebdba8d9..16291f2a4688 100644 --- a/Bindings/reserved-memory/reserved-memory.txt +++ b/Bindings/reserved-memory/reserved-memory.txt @@ -68,6 +68,9 @@ Linux implementation note: - If a "linux,cma-default" property is present, then Linux will use the region for the default pool of the contiguous memory allocator. +- If a "linux,dma-default" property is present, then Linux will use the + region for the default pool of the consistent DMA allocator. + Device node references to reserved memory ----------------------------------------- Regions in the /reserved-memory node may be referenced by other device diff --git a/Bindings/reset/ti,sci-reset.txt b/Bindings/reset/ti,sci-reset.txt new file mode 100644 index 000000000000..8b1cf022f18a --- /dev/null +++ b/Bindings/reset/ti,sci-reset.txt @@ -0,0 +1,62 @@ +Texas Instruments System Control Interface (TI-SCI) Reset Controller +===================================================================== + +Some TI SoCs contain a system controller (like the Power Management Micro +Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling +the state of the various hardware modules present on the SoC. Communication +between the host processor running an OS and the system controller happens +through a protocol called TI System Control Interface (TI-SCI protocol). +For TI SCI details, please refer to the document, +Documentation/devicetree/bindings/arm/keystone/ti,sci.txt + +TI-SCI Reset Controller Node +============================ +This reset controller node uses the TI SCI protocol to perform the reset +management of various hardware modules present on the SoC. Must be a child +node of the associated TI-SCI system controller node. + +Required properties: +-------------------- + - compatible : Should be "ti,sci-reset" + - #reset-cells : Should be 2. Please see the reset consumer node below for + usage details. + +TI-SCI Reset Consumer Nodes +=========================== +Each of the reset consumer nodes should have the following properties, +in addition to their own properties. + +Required properties: +-------------------- + - resets : A phandle and reset specifier pair, one pair for each reset + signal that affects the device, or that the device manages. + The phandle should point to the TI-SCI reset controller node, + and the reset specifier should have 2 cell-values. The first + cell should contain the device ID. The second cell should + contain the reset mask value used by system controller. + Please refer to the protocol documentation for these values + to be used for different devices, + http://processors.wiki.ti.com/index.php/TISCI#66AK2G02_Data + +Please also refer to Documentation/devicetree/bindings/reset/reset.txt for +common reset controller usage by consumers. + +Example: +-------- +The following example demonstrates both a TI-SCI reset controller node and a +consumer (a DSP device) on the 66AK2G SoC. + +pmmc: pmmc { + compatible = "ti,k2g-sci"; + + k2g_reset: reset-controller { + compatible = "ti,sci-reset"; + #reset-cells = <2>; + }; +}; + +dsp0: dsp@10800000 { + ... + resets = <&k2g_reset 0x0046 0x1>; + ... +}; diff --git a/Bindings/rng/mtk-rng.txt b/Bindings/rng/mtk-rng.txt index a6d62a2abd39..366b99bff8cd 100644 --- a/Bindings/rng/mtk-rng.txt +++ b/Bindings/rng/mtk-rng.txt @@ -2,7 +2,9 @@ Device-Tree bindings for Mediatek random number generator found in Mediatek SoC family Required properties: -- compatible : Should be "mediatek,mt7623-rng" +- compatible : Should be + "mediatek,mt7622-rng", "mediatek,mt7623-rng" : for MT7622 + "mediatek,mt7623-rng" : for MT7623 - clocks : list of clock specifiers, corresponding to entries in clock-names property; - clock-names : Should contain "rng" entries; diff --git a/Bindings/rng/timeriomem_rng.txt b/Bindings/rng/timeriomem_rng.txt index 6616d15866a3..214940093b55 100644 --- a/Bindings/rng/timeriomem_rng.txt +++ b/Bindings/rng/timeriomem_rng.txt @@ -5,6 +5,13 @@ Required properties: - reg : base address to sample from - period : wait time in microseconds to use between samples +Optional properties: +- quality : estimated number of bits of true entropy per 1024 bits read from the + rng. Defaults to zero which causes the kernel's default quality to + be used instead. Note that the default quality is usually zero + which disables using this rng to automatically fill the kernel's + entropy pool. + N.B. currently 'reg' must be four bytes wide and aligned Example: diff --git a/Bindings/rtc/brcm,brcmstb-waketimer.txt b/Bindings/rtc/brcm,brcmstb-waketimer.txt new file mode 100644 index 000000000000..1d990bcc0baf --- /dev/null +++ b/Bindings/rtc/brcm,brcmstb-waketimer.txt @@ -0,0 +1,22 @@ +Broadcom STB wake-up Timer + +The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the +ability to wake up the system from low-power suspend/standby modes. + +Required properties: +- compatible : should contain "brcm,brcmstb-waketimer" +- reg : the register start and length for the WKTMR block +- interrupts : The TIMER interrupt +- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2 + interrupt controller node +- clocks : The phandle to the UPG fixed clock (27Mhz domain) + +Example: + +waketimer@f0411580 { + compatible = "brcm,brcmstb-waketimer"; + reg = <0xf0411580 0x14>; + interrupts = <0x3>; + interrupt-parent = <&aon_pm_l2_intc>; + clocks = <&upg_fixed>; +}; diff --git a/Bindings/rtc/cortina,gemini.txt b/Bindings/rtc/cortina,gemini.txt deleted file mode 100644 index 4ce4e794ddbb..000000000000 --- a/Bindings/rtc/cortina,gemini.txt +++ /dev/null @@ -1,14 +0,0 @@ -* Cortina Systems Gemini RTC - -Gemini SoC real-time clock. - -Required properties: -- compatible : Should be "cortina,gemini-rtc" - -Examples: - -rtc@45000000 { - compatible = "cortina,gemini-rtc"; - reg = <0x45000000 0x100>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; -}; diff --git a/Bindings/rtc/faraday,ftrtc010.txt b/Bindings/rtc/faraday,ftrtc010.txt new file mode 100644 index 000000000000..e3938f5e0b6c --- /dev/null +++ b/Bindings/rtc/faraday,ftrtc010.txt @@ -0,0 +1,28 @@ +* Faraday Technology FTRTC010 Real Time Clock + +This RTC appears in for example the Storlink Gemini family of +SoCs. + +Required properties: +- compatible : Should be one of: + "faraday,ftrtc010" + "cortina,gemini-rtc", "faraday,ftrtc010" + +Optional properties: +- clocks: when present should contain clock references to the + PCLK and EXTCLK clocks. Faraday calls the later CLK1HZ and + says the clock should be 1 Hz, but implementers actually seem + to choose different clocks here, like Cortina who chose + 32768 Hz (a typical low-power clock). +- clock-names: should name the clocks "PCLK" and "EXTCLK" + respectively. + +Examples: + +rtc@45000000 { + compatible = "cortina,gemini-rtc"; + reg = <0x45000000 0x100>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&foo 0>, <&foo 1>; + clock-names = "PCLK", "EXTCLK"; +}; diff --git a/Bindings/rtc/st,stm32-rtc.txt b/Bindings/rtc/st,stm32-rtc.txt index e2837b951237..0a4c371a9b7a 100644 --- a/Bindings/rtc/st,stm32-rtc.txt +++ b/Bindings/rtc/st,stm32-rtc.txt @@ -1,17 +1,25 @@ STM32 Real Time Clock Required properties: -- compatible: "st,stm32-rtc". +- compatible: can be either "st,stm32-rtc" or "st,stm32h7-rtc", depending on + the device is compatible with stm32(f4/f7) or stm32h7. - reg: address range of rtc register set. -- clocks: reference to the clock entry ck_rtc. +- clocks: can use up to two clocks, depending on part used: + - "rtc_ck": RTC clock source. + It is required on stm32(f4/f7) and stm32h7. + - "pclk": RTC APB interface clock. + It is not present on stm32(f4/f7). + It is required on stm32h7. +- clock-names: must be "rtc_ck" and "pclk". + It is required only on stm32h7. - interrupt-parent: phandle for the interrupt controller. - interrupts: rtc alarm interrupt. - st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain (RTC registers) write protection. -Optional properties (to override default ck_rtc parent clock): -- assigned-clocks: reference to the ck_rtc clock entry. -- assigned-clock-parents: phandle of the new parent clock of ck_rtc. +Optional properties (to override default rtc_ck parent clock): +- assigned-clocks: reference to the rtc_ck clock entry. +- assigned-clock-parents: phandle of the new parent clock of rtc_ck. Example: @@ -25,3 +33,17 @@ Example: interrupts = <17 1>; st,syscfg = <&pwrcfg>; }; + + rtc: rtc@58004000 { + compatible = "st,stm32h7-rtc"; + reg = <0x58004000 0x400>; + clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>; + clock-names = "pclk", "rtc_ck"; + assigned-clocks = <&rcc RTC_CK>; + assigned-clock-parents = <&rcc LSE_CK>; + interrupt-parent = <&exti>; + interrupts = <17 1>; + interrupt-names = "alarm"; + st,syscfg = <&pwrcfg>; + status = "disabled"; + }; diff --git a/Bindings/serial/8250.txt b/Bindings/serial/8250.txt index 10276a46ecef..419ff6c0a47f 100644 --- a/Bindings/serial/8250.txt +++ b/Bindings/serial/8250.txt @@ -20,6 +20,8 @@ Required properties: - "fsl,16550-FIFO64" - "fsl,ns16550" - "ti,da830-uart" + - "aspeed,ast2400-vuart" + - "aspeed,ast2500-vuart" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt. @@ -45,6 +47,7 @@ Optional properties: property. - tx-threshold: Specify the TX FIFO low water indication for parts with programmable TX FIFO thresholds. +- resets : phandle + reset specifier pairs Note: * fsl,ns16550: diff --git a/Bindings/serial/actions,owl-uart.txt b/Bindings/serial/actions,owl-uart.txt new file mode 100644 index 000000000000..aa873eada02d --- /dev/null +++ b/Bindings/serial/actions,owl-uart.txt @@ -0,0 +1,16 @@ +Actions Semi Owl UART + +Required properties: +- compatible : "actions,s500-uart", "actions,owl-uart" for S500 + "actions,s900-uart", "actions,owl-uart" for S900 +- reg : Offset and length of the register set for the device. +- interrupts : Should contain UART interrupt. + + +Example: + + uart3: serial@b0126000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0126000 0x1000>; + interrupts = ; + }; diff --git a/Bindings/serial/amlogic,meson-uart.txt b/Bindings/serial/amlogic,meson-uart.txt new file mode 100644 index 000000000000..8ff65fa632fd --- /dev/null +++ b/Bindings/serial/amlogic,meson-uart.txt @@ -0,0 +1,38 @@ +Amlogic Meson SoC UART Serial Interface +======================================= + +The Amlogic Meson SoC UART Serial Interface is present on a large range +of SoCs, and can be present either in the "Always-On" power domain or the +"Everything-Else" power domain. + +The particularity of the "Always-On" Serial Interface is that the hardware +is active since power-on and does not need any clock gating and is usable +as very early serial console. + +Required properties: +- compatible : compatible: value should be different for each SoC family as : + - Meson6 : "amlogic,meson6-uart" + - Meson8 : "amlogic,meson8-uart" + - Meson8b : "amlogic,meson8b-uart" + - GX (GXBB, GXL, GXM) : "amlogic,meson-gx-uart" + eventually followed by : "amlogic,meson-ao-uart" if this UART interface + is in the "Always-On" power domain. +- reg : offset and length of the register set for the device. +- interrupts : identifier to the device interrupt +- clocks : a list of phandle + clock-specifier pairs, one for each + entry in clock names. +- clocks-names : + * "xtal" for external xtal clock identifier + * "pclk" for the bus core clock, either the clk81 clock or the gate clock + * "baud" for the source of the baudrate generator, can be either the xtal + or the pclk. + +e.g. +uart_A: serial@84c0 { + compatible = "amlogic,meson-gx-uart"; + reg = <0x0 0x84c0 0x0 0x14>; + interrupts = ; + /* Use xtal as baud rate clock source */ + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; +}; diff --git a/Bindings/serial/fsl-lpuart.txt b/Bindings/serial/fsl-lpuart.txt index c95005efbcb8..a1252a047f78 100644 --- a/Bindings/serial/fsl-lpuart.txt +++ b/Bindings/serial/fsl-lpuart.txt @@ -6,6 +6,8 @@ Required properties: on Vybrid vf610 SoC with 8-bit register organization - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated on LS1021A SoC with 32-bit big-endian register organization + - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated + on i.MX7ULP SoC with 32-bit little-endian register organization - reg : Address and length of the register set for the device - interrupts : Should contain uart interrupt - clocks : phandle + clock specifier pairs, one for each entry in clock-names diff --git a/Bindings/serial/mtk-uart.txt b/Bindings/serial/mtk-uart.txt index 0015c722be7b..b6cf384597e1 100644 --- a/Bindings/serial/mtk-uart.txt +++ b/Bindings/serial/mtk-uart.txt @@ -8,6 +8,8 @@ Required properties: * "mediatek,mt6589-uart" for MT6589 compatible UARTS * "mediatek,mt6755-uart" for MT6755 compatible UARTS * "mediatek,mt6795-uart" for MT6795 compatible UARTS + * "mediatek,mt6797-uart" for MT6797 compatible UARTS + * "mediatek,mt7622-uart" for MT7622 compatible UARTS * "mediatek,mt7623-uart" for MT7623 compatible UARTS * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS diff --git a/Bindings/serial/slave-device.txt b/Bindings/serial/slave-device.txt index f66037928f5f..40110e019620 100644 --- a/Bindings/serial/slave-device.txt +++ b/Bindings/serial/slave-device.txt @@ -21,6 +21,15 @@ Optional Properties: can support. For example, a particular board has some signal quality issue or the host processor can't support higher baud rates. +- current-speed : The current baud rate the device operates at. This should + only be present in case a driver has no chance to know + the baud rate of the slave device. + Examples: + * device supports auto-baud + * the rate is setup by a bootloader and there is no + way to reset the device + * device baud rate is configured by its firmware but + there is no way to request the actual settings Example: diff --git a/Bindings/soc/mediatek/scpsys.txt b/Bindings/soc/mediatek/scpsys.txt index 16fe94d7783c..b1d165b4d4b3 100644 --- a/Bindings/soc/mediatek/scpsys.txt +++ b/Bindings/soc/mediatek/scpsys.txt @@ -9,11 +9,14 @@ domain control. The driver implements the Generic PM domain bindings described in power/power_domain.txt. It provides the power domains defined in -include/dt-bindings/power/mt8173-power.h and mt2701-power.h. +- include/dt-bindings/power/mt8173-power.h +- include/dt-bindings/power/mt6797-power.h +- include/dt-bindings/power/mt2701-power.h Required properties: - compatible: Should be one of: - "mediatek,mt2701-scpsys" + - "mediatek,mt6797-scpsys" - "mediatek,mt8173-scpsys" - #power-domain-cells: Must be 1 - reg: Address range of the SCPSYS unit @@ -22,6 +25,7 @@ Required properties: These are clocks which hardware needs to be enabled before enabling certain power domains. Required clocks for MT2701: "mm", "mfg", "ethif" + Required clocks for MT6797: "mm", "mfg", "vdec" Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt" Optional properties: diff --git a/Bindings/soc/qcom/qcom,glink.txt b/Bindings/soc/qcom/qcom,glink.txt new file mode 100644 index 000000000000..50fc20c6ce91 --- /dev/null +++ b/Bindings/soc/qcom/qcom,glink.txt @@ -0,0 +1,73 @@ +Qualcomm RPM GLINK binding + +This binding describes the Qualcomm RPM GLINK, a fifo based mechanism for +communication with the Resource Power Management system on various Qualcomm +platforms. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,glink-rpm" + +- interrupts: + Usage: required + Value type: + Definition: should specify the IRQ used by the remote processor to + signal this processor about communication related events + +- qcom,rpm-msg-ram: + Usage: required + Value type: + Definition: handle to RPM message memory resource + +- mboxes: + Usage: required + Value type: + Definition: reference to the "rpm_hlos" mailbox in APCS, as described + in mailbox/mailbox.txt + += GLINK DEVICES +Each subnode of the GLINK node represent function tied to a virtual +communication channel. The name of the nodes are not important. The properties +of these nodes are defined by the individual bindings for the specific function +- but must contain the following property: + +- qcom,glink-channels: + Usage: required + Value type: + Definition: a list of channels tied to this function, used for matching + the function to a set of virtual channels + += EXAMPLE +The following example represents the GLINK RPM node on a MSM8996 device, with +the function for the "rpm_request" channel defined, which is used for +regualtors and root clocks. + + apcs_glb: mailbox@9820000 { + compatible = "qcom,msm8996-apcs-hmss-global"; + reg = <0x9820000 0x1000>; + + #mbox-cells = <1>; + }; + + rpm_msg_ram: memory@68000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x68000 0x6000>; + }; + + rpm-glink { + compatible = "qcom,glink-rpm"; + + interrupts = ; + + qcom,rpm-msg-ram = <&rpm_msg_ram>; + + mboxes = <&apcs_glb 0>; + + rpm-requests { + compatible = "qcom,rpm-msm8996"; + qcom,glink-channels = "rpm_requests"; + + ... + }; + }; diff --git a/Bindings/sound/audio-graph-card.txt b/Bindings/sound/audio-graph-card.txt new file mode 100644 index 000000000000..6e6720aa33f1 --- /dev/null +++ b/Bindings/sound/audio-graph-card.txt @@ -0,0 +1,129 @@ +Audio Graph Card: + +Audio Graph Card specifies audio DAI connections of SoC <-> codec. +It is based on common bindings for device graphs. +see ${LINUX}/Documentation/devicetree/bindings/graph.txt + +Basically, Audio Graph Card property is same as Simple Card. +see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt + +Below are same as Simple-Card. + +- label +- widgets +- routing +- dai-format +- frame-master +- bitclock-master +- bitclock-inversion +- frame-inversion +- dai-tdm-slot-num +- dai-tdm-slot-width +- clocks / system-clock-frequency + +Required properties: + +- compatible : "audio-graph-card"; +- dais : list of CPU DAI port{s} + +Optional properties: +- pa-gpios: GPIO used to control external amplifier. + +Example: Single DAI case + + sound_card { + compatible = "audio-graph-card"; + + dais = <&cpu_port>; + }; + + dai-controller { + ... + cpu_port: port { + cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + + dai-format = "left_j"; + ... + }; + }; + }; + + audio-codec { + ... + port { + codec_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint>; + }; + }; + }; + +Example: Multi DAI case + + sound-card { + compatible = "audio-graph-card"; + + label = "sound-card"; + + dais = <&cpu_port0 + &cpu_port1 + &cpu_port2>; + }; + + audio-codec@0 { + ... + port { + codec0_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint0>; + }; + }; + }; + + audio-codec@1 { + ... + port { + codec1_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint1>; + }; + }; + }; + + audio-codec@2 { + ... + port { + codec2_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint2>; + }; + }; + }; + + dai-controller { + ... + ports { + cpu_port0: port@0 { + cpu_endpoint0: endpoint { + remote-endpoint = <&codec0_endpoint>; + + dai-format = "left_j"; + ... + }; + }; + cpu_port1: port@1 { + cpu_endpoint1: endpoint { + remote-endpoint = <&codec1_endpoint>; + + dai-format = "i2s"; + ... + }; + }; + cpu_port2: port@2 { + cpu_endpoint2: endpoint { + remote-endpoint = <&codec2_endpoint>; + + dai-format = "i2s"; + ... + }; + }; + }; + }; + diff --git a/Bindings/sound/audio-graph-scu-card.txt b/Bindings/sound/audio-graph-scu-card.txt new file mode 100644 index 000000000000..8b8afe9fcb31 --- /dev/null +++ b/Bindings/sound/audio-graph-scu-card.txt @@ -0,0 +1,122 @@ +Audio-Graph-SCU-Card: + +Audio-Graph-SCU-Card is "Audio-Graph-Card" + "ALSA DPCM". + +It is based on common bindings for device graphs. +see ${LINUX}/Documentation/devicetree/bindings/graph.txt + +Basically, Audio-Graph-SCU-Card property is same as +Simple-Card / Simple-SCU-Card / Audio-Graph-Card. +see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt + ${LINUX}/Documentation/devicetree/bindings/sound/simple-scu-card.txt + ${LINUX}/Documentation/devicetree/bindings/sound/audio-graph-card.txt + +Below are same as Simple-Card / Audio-Graph-Card. + +- label +- dai-format +- frame-master +- bitclock-master +- bitclock-inversion +- frame-inversion +- dai-tdm-slot-num +- dai-tdm-slot-width +- clocks / system-clock-frequency + +Below are same as Simple-SCU-Card. + +- convert-rate +- convert-channels +- prefix +- routing + +Required properties: + +- compatible : "audio-graph-scu-card"; +- dais : list of CPU DAI port{s} + +Example 1. Sampling Rate Conversion + + sound_card { + compatible = "audio-graph-scu-card"; + + label = "sound-card"; + prefix = "codec"; + routing = "codec Playback", "DAI0 Playback", + "codec Playback", "DAI1 Playback"; + convert-rate = <48000>; + + dais = <&cpu_port>; + }; + + audio-codec { + ... + + port { + codec_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint>; + }; + }; + }; + + dai-controller { + ... + cpu_port: port { + cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + + dai-format = "left_j"; + ... + }; + }; + }; + +Example 2. 2 CPU 1 Codec (Mixing) + + sound_card { + compatible = "audio-graph-scu-card"; + + label = "sound-card"; + prefix = "codec"; + routing = "codec Playback", "DAI0 Playback", + "codec Playback", "DAI1 Playback"; + convert-rate = <48000>; + + dais = <&cpu_port0 + &cpu_port1>; + }; + + audio-codec { + ... + + port { + codec_endpoint0: endpoint { + remote-endpoint = <&cpu_endpoint0>; + }; + codec_endpoint1: endpoint { + remote-endpoint = <&cpu_endpoint1>; + }; + }; + }; + + dai-controller { + ... + ports { + cpu_port0: port { + cpu_endpoint0: endpoint { + remote-endpoint = <&codec_endpoint0>; + + dai-format = "left_j"; + ... + }; + }; + cpu_port1: port { + cpu_endpoint1: endpoint { + remote-endpoint = <&codec_endpoint1>; + + dai-format = "left_j"; + ... + }; + }; + }; + }; diff --git a/Bindings/sound/cs35l35.txt b/Bindings/sound/cs35l35.txt index 016b768bc722..77ee75c39233 100644 --- a/Bindings/sound/cs35l35.txt +++ b/Bindings/sound/cs35l35.txt @@ -16,6 +16,9 @@ Required properties: (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for further information relating to interrupt properties) + - cirrus,boost-ind-nanohenry: Inductor value for boost converter. The value is + in nH and they can be values of 1000nH, 1200nH, 1500nH, and 2200nH. + Optional properties: - reset-gpios : gpio used to reset the amplifier diff --git a/Bindings/sound/nau8825.txt b/Bindings/sound/nau8825.txt index d3374231c871..2f5e973285a6 100644 --- a/Bindings/sound/nau8825.txt +++ b/Bindings/sound/nau8825.txt @@ -69,6 +69,8 @@ Optional properties: - nuvoton,jack-insert-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms - nuvoton,jack-eject-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms + - nuvoton,crosstalk-bypass: make crosstalk function bypass if set. + - clocks: list of phandle and clock specifier pairs according to common clock bindings for the clocks described in clock-names - clock-names: should include "mclk" for the MCLK master clock @@ -96,6 +98,7 @@ Example: nuvoton,short-key-debounce = <2>; nuvoton,jack-insert-debounce = <7>; nuvoton,jack-eject-debounce = <7>; + nuvoton,crosstalk-bypass; clock-names = "mclk"; clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>; diff --git a/Bindings/sound/renesas,rsnd.txt b/Bindings/sound/renesas,rsnd.txt index 15a7316e4c91..7246bb268bf9 100644 --- a/Bindings/sound/renesas,rsnd.txt +++ b/Bindings/sound/renesas,rsnd.txt @@ -83,11 +83,11 @@ SRC can convert [xx]Hz to [yy]Hz. Then, it has below 2 modes ** Asynchronous mode ------------------ -You need to use "renesas,rsrc-card" sound card for it. +You need to use "simple-scu-audio-card" sound card for it. example) sound { - compatible = "renesas,rsrc-card"; + compatible = "simple-scu-audio-card"; ... /* * SRC Asynchronous mode setting @@ -97,12 +97,12 @@ example) * Inputed 48kHz data will be converted to * system specified Hz */ - convert-rate = <48000>; + simple-audio-card,convert-rate = <48000>; ... - cpu { + simple-audio-card,cpu { sound-dai = <&rcar_sound>; }; - codec { + simple-audio-card,codec { ... }; }; @@ -141,23 +141,23 @@ For more detail information, see below ${LINUX}/sound/soc/sh/rcar/ctu.c - comment of header -You need to use "renesas,rsrc-card" sound card for it. +You need to use "simple-scu-audio-card" sound card for it. example) sound { - compatible = "renesas,rsrc-card"; + compatible = "simple-scu-audio-card"; ... /* * CTU setting * All input data will be converted to 2ch * as output data */ - convert-channels = <2>; + simple-audio-card,convert-channels = <2>; ... - cpu { + simple-audio-card,cpu { sound-dai = <&rcar_sound>; }; - codec { + simple-audio-card,codec { ... }; }; @@ -190,22 +190,22 @@ and these sounds will be merged by MIX. aplay -D plughw:0,0 xxxx.wav & aplay -D plughw:0,1 yyyy.wav -You need to use "renesas,rsrc-card" sound card for it. +You need to use "simple-scu-audio-card" sound card for it. Ex) [MEM] -> [SRC1] -> [CTU02] -+-> [MIX0] -> [DVC0] -> [SSI0] | [MEM] -> [SRC2] -> [CTU03] -+ sound { - compatible = "renesas,rsrc-card"; + compatible = "simple-scu-audio-card"; ... - cpu@0 { + simple-audio-card,cpu@0 { sound-dai = <&rcar_sound 0>; }; - cpu@1 { + simple-audio-card,cpu@1 { sound-dai = <&rcar_sound 1>; }; - codec { + simple-audio-card,codec { ... }; }; @@ -368,6 +368,10 @@ Required properties: see below for detail. - #sound-dai-cells : it must be 0 if your system is using single DAI it must be 1 if your system is using multi DAI +- clocks : References to SSI/SRC/MIX/CTU/DVC/AUDIO_CLK clocks. +- clock-names : List of necessary clock names. + "ssi-all", "ssi.X", "src.X", "mix.X", "ctu.X", + "dvc.X", "clk_a", "clk_b", "clk_c", "clk_i" Optional properties: - #clock-cells : it must be 0 if your system has audio_clkout @@ -375,6 +379,9 @@ Optional properties: - clock-frequency : for all audio_clkout0/1/2/3 - clkout-lr-asynchronous : boolean property. it indicates that audio_clkoutn is asynchronizes with lr-clock. +- resets : References to SSI resets. +- reset-names : List of valid reset names. + "ssi-all", "ssi.X" SSI subnode properties: - interrupts : Should contain SSI interrupt for PIO transfer diff --git a/Bindings/sound/rockchip,pdm.txt b/Bindings/sound/rockchip,pdm.txt new file mode 100644 index 000000000000..921729de7346 --- /dev/null +++ b/Bindings/sound/rockchip,pdm.txt @@ -0,0 +1,39 @@ +* Rockchip PDM controller + +Required properties: + +- compatible: "rockchip,pdm" +- reg: physical base address of the controller and length of memory mapped + region. +- dmas: DMA specifiers for rx dma. See the DMA client binding, + Documentation/devicetree/bindings/dma/dma.txt +- dma-names: should include "rx". +- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. +- clock-names: should contain following: + - "pdm_hclk": clock for PDM BUS + - "pdm_clk" : clock for PDM controller +- pinctrl-names: Must contain a "default" entry. +- pinctrl-N: One property must exist for each entry in + pinctrl-names. See ../pinctrl/pinctrl-bindings.txt + for details of the property values. + +Example for rk3328 PDM controller: + +pdm: pdm@ff040000 { + compatible = "rockchip,pdm"; + reg = <0x0 0xff040000 0x0 0x1000>; + clocks = <&clk_pdm>, <&clk_gates28 0>; + clock-names = "pdm_clk", "pdm_hclk"; + dmas = <&pdma 16>; + #dma-cells = <1>; + dma-names = "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pdmm0_clk + &pdmm0_fsync + &pdmm0_sdi0 + &pdmm0_sdi1 + &pdmm0_sdi2 + &pdmm0_sdi3>; + pinctrl-1 = <&pdmm0_sleep>; + status = "disabled"; +}; diff --git a/Bindings/sound/rockchip-spdif.txt b/Bindings/sound/rockchip-spdif.txt index 11046429a118..4706b96d450b 100644 --- a/Bindings/sound/rockchip-spdif.txt +++ b/Bindings/sound/rockchip-spdif.txt @@ -9,7 +9,9 @@ Required properties: - compatible: should be one of the following: - "rockchip,rk3066-spdif" - "rockchip,rk3188-spdif" + - "rockchip,rk3228-spdif" - "rockchip,rk3288-spdif" + - "rockchip,rk3328-spdif" - "rockchip,rk3366-spdif" - "rockchip,rk3368-spdif" - "rockchip,rk3399-spdif" diff --git a/Bindings/sound/samsung,odroid.txt b/Bindings/sound/samsung,odroid.txt index c1ac70cb0afb..c30934dd975b 100644 --- a/Bindings/sound/samsung,odroid.txt +++ b/Bindings/sound/samsung,odroid.txt @@ -5,11 +5,6 @@ Required properties: - compatible - "samsung,odroidxu3-audio" - for Odroid XU3 board, "samsung,odroidxu4-audio" - for Odroid XU4 board - model - the user-visible name of this sound complex - - 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S - controller - - 'codec' subnode with a 'sound-dai' property containing list of phandles - to the CODEC nodes, first entry must be corresponding to the MAX98090 - CODEC and the second entry must be the phandle of the HDMI IP block node - clocks - should contain entries matching clock names in the clock-names property - clock-names - should contain following entries: @@ -32,12 +27,18 @@ Required properties: For Odroid XU4: no entries +Required sub-nodes: + + - 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S + controller + - 'codec' subnode with a 'sound-dai' property containing list of phandles + to the CODEC nodes, first entry must be corresponding to the MAX98090 + CODEC and the second entry must be the phandle of the HDMI IP block node + Example: sound { compatible = "samsung,odroidxu3-audio"; - samsung,cpu-dai = <&i2s0>; - samsung,codec-dai = <&max98090>; model = "Odroid-XU3"; samsung,audio-routing = "Headphone Jack", "HPL", diff --git a/Bindings/sound/simple-scu-card.txt b/Bindings/sound/simple-scu-card.txt index d6fe47ed09af..327d229a51b2 100644 --- a/Bindings/sound/simple-scu-card.txt +++ b/Bindings/sound/simple-scu-card.txt @@ -1,35 +1,29 @@ -ASoC simple SCU Sound Card +ASoC Simple SCU Sound Card -Simple-Card specifies audio DAI connections of SoC <-> codec. +Simple SCU Sound Card is "Simple Sound Card" + "ALSA DPCM". +For example, you can use this driver if you want to exchange sampling rate convert, +Mixing, etc... Required properties: - compatible : "simple-scu-audio-card" "renesas,rsrc-card" - Optional properties: -- simple-audio-card,name : User specified audio sound card name, one string - property. -- simple-audio-card,cpu : CPU sub-node -- simple-audio-card,codec : CODEC sub-node +- simple-audio-card,name : see simple-audio-card.txt +- simple-audio-card,cpu : see simple-audio-card.txt +- simple-audio-card,codec : see simple-audio-card.txt Optional subnode properties: -- simple-audio-card,format : CPU/CODEC common audio format. - "i2s", "right_j", "left_j" , "dsp_a" - "dsp_b", "ac97", "pdm", "msb", "lsb" -- simple-audio-card,frame-master : Indicates dai-link frame master. - phandle to a cpu or codec subnode. -- simple-audio-card,bitclock-master : Indicates dai-link bit clock master. - phandle to a cpu or codec subnode. -- simple-audio-card,bitclock-inversion : bool property. Add this if the - dai-link uses bit clock inversion. -- simple-audio-card,frame-inversion : bool property. Add this if the - dai-link uses frame clock inversion. +- simple-audio-card,format : see simple-audio-card.txt +- simple-audio-card,frame-master : see simple-audio-card.txt +- simple-audio-card,bitclock-master : see simple-audio-card.txt +- simple-audio-card,bitclock-inversion : see simple-audio-card.txt +- simple-audio-card,frame-inversion : see simple-audio-card.txt - simple-audio-card,convert-rate : platform specified sampling rate convert - simple-audio-card,convert-channels : platform specified converted channel size (2 - 8 ch) -- simple-audio-card,prefix : see audio-routing +- simple-audio-card,prefix : see routing - simple-audio-card,routing : A list of the connections between audio components. Each entry is a pair of strings, the first being the connection's sink, the second being the connection's source. Valid names for sources. @@ -38,32 +32,23 @@ Optional subnode properties: Required CPU/CODEC subnodes properties: -- sound-dai : phandle and port of CPU/CODEC +- sound-dai : see simple-audio-card.txt Optional CPU/CODEC subnodes properties: -- clocks / system-clock-frequency : specify subnode's clock if needed. - it can be specified via "clocks" if system has - clock node (= common clock), or "system-clock-frequency" - (if system doens't support common clock) - If a clock is specified, it is - enabled with clk_prepare_enable() - in dai startup() and disabled with - clk_disable_unprepare() in dai - shutdown(). +- clocks / system-clock-frequency : see simple-audio-card.txt -Example 1. Sampling Rate Covert +Example 1. Sampling Rate Conversion sound { compatible = "simple-scu-audio-card"; simple-audio-card,name = "rsnd-ak4643"; simple-audio-card,format = "left_j"; - simple-audio-card,format = "left_j"; simple-audio-card,bitclock-master = <&sndcodec>; simple-audio-card,frame-master = <&sndcodec>; - simple-audio-card,convert-rate = <48000>; /* see audio_clk_a */ + simple-audio-card,convert-rate = <48000>; simple-audio-card,prefix = "ak4642"; simple-audio-card,routing = "ak4642 Playback", "DAI0 Playback", @@ -79,20 +64,18 @@ sound { }; }; -Example 2. 2 CPU 1 Codec +Example 2. 2 CPU 1 Codec (Mixing) sound { - compatible = "renesas,rsrc-card"; + compatible = "simple-scu-audio-card"; - card-name = "rsnd-ak4643"; - format = "left_j"; - bitclock-master = <&dpcmcpu>; - frame-master = <&dpcmcpu>; + simple-audio-card,name = "rsnd-ak4643"; + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&dpcmcpu>; + simple-audio-card,frame-master = <&dpcmcpu>; - convert-rate = <48000>; /* see audio_clk_a */ - - audio-prefix = "ak4642"; - audio-routing = "ak4642 Playback", "DAI0 Playback", + simple-audio-card,prefix = "ak4642"; + simple-audio-card,routing = "ak4642 Playback", "DAI0 Playback", "ak4642 Playback", "DAI1 Playback"; dpcmcpu: cpu@0 { diff --git a/Bindings/sound/st,stm32-i2s.txt b/Bindings/sound/st,stm32-i2s.txt new file mode 100644 index 000000000000..4bda52042402 --- /dev/null +++ b/Bindings/sound/st,stm32-i2s.txt @@ -0,0 +1,62 @@ +STMicroelectronics STM32 SPI/I2S Controller + +The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode. +Only some SPI instances support I2S. + +Required properties: + - compatible: Must be "st,stm32h7-i2s" + - reg: Offset and length of the device's register set. + - interrupts: Must contain the interrupt line id. + - clocks: Must contain phandle and clock specifier pairs for each entry + in clock-names. + - clock-names: Must contain "i2sclk", "pclk", "x8k" and "x11k". + "i2sclk": clock which feeds the internal clock generator + "pclk": clock which feeds the peripheral bus interface + "x8k": I2S parent clock for sampling rates multiple of 8kHz. + "x11k": I2S parent clock for sampling rates multiple of 11.025kHz. + - dmas: DMA specifiers for tx and rx dma. + See Documentation/devicetree/bindings/dma/stm32-dma.txt. + - dma-names: Identifier for each DMA request line. Must be "tx" and "rx". + - pinctrl-names: should contain only value "default" + - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/pinctrl-stm32.txt + +Optional properties: + - resets: Reference to a reset controller asserting the reset controller + +The device node should contain one 'port' child node with one child 'endpoint' +node, according to the bindings defined in Documentation/devicetree/bindings/ +graph.txt. + +Example: +sound_card { + compatible = "audio-graph-card"; + dais = <&i2s2_port>; +}; + +i2s2: audio-controller@40003800 { + compatible = "st,stm32h7-i2s"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc PCLK1>, <&rcc SPI2_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>; + clock-names = "pclk", "i2sclk", "x8k", "x11k"; + dmas = <&dmamux2 2 39 0x400 0x1>, + <&dmamux2 3 40 0x400 0x1>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s2>; + + i2s2_port: port@0 { + cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + format = "i2s"; + }; + }; +}; + +audio-codec { + codec_port: port@0 { + codec_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint>; + }; + }; +}; diff --git a/Bindings/sound/st,stm32-sai.txt b/Bindings/sound/st,stm32-sai.txt index c59a3d779e06..f1c5ae59e7c9 100644 --- a/Bindings/sound/st,stm32-sai.txt +++ b/Bindings/sound/st,stm32-sai.txt @@ -6,7 +6,7 @@ The SAI contains two independent audio sub-blocks. Each sub-block has its own clock generator and I/O lines controller. Required properties: - - compatible: Should be "st,stm32f4-sai" + - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai" - reg: Base address and size of SAI common register set. - clocks: Must contain phandle and clock specifier pairs for each entry in clock-names. @@ -36,6 +36,10 @@ SAI subnodes required properties: - pinctrl-names: should contain only value "default" - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/pinctrl-stm32.txt +The device node should contain one 'port' child node with one child 'endpoint' +node, according to the bindings defined in Documentation/devicetree/bindings/ +graph.txt. + Example: sound_card { compatible = "audio-graph-card"; @@ -43,38 +47,29 @@ sound_card { }; sai1: sai1@40015800 { - compatible = "st,stm32f4-sai"; + compatible = "st,stm32h7-sai"; #address-cells = <1>; #size-cells = <1>; - ranges; + ranges = <0 0x40015800 0x400>; reg = <0x40015800 0x4>; - clocks = <&rcc 1 CLK_SAIQ_PDIV>, <&rcc 1 CLK_I2SQ_PDIV>; + clocks = <&rcc PLL1_Q>, <&rcc PLL2_P>; clock-names = "x8k", "x11k"; interrupts = <87>; - sai1b: audio-controller@40015824 { - #sound-dai-cells = <0>; - compatible = "st,stm32-sai-sub-b"; - reg = <0x40015824 0x1C>; - clocks = <&rcc 1 CLK_SAI2>; + sai1a: audio-controller@40015804 { + compatible = "st,stm32-sai-sub-a"; + reg = <0x4 0x1C>; + clocks = <&rcc SAI1_CK>; clock-names = "sai_ck"; - dmas = <&dma2 5 0 0x400 0x0>; + dmas = <&dmamux1 1 87 0x400 0x0>; dma-names = "tx"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai1b>; + pinctrl-0 = <&pinctrl_sai1a>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - sai1b_port: port@0 { - reg = <0>; - cpu_endpoint: endpoint { - remote-endpoint = <&codec_endpoint>; - audio-graph-card,format = "i2s"; - audio-graph-card,bitclock-master = <&codec_endpoint>; - audio-graph-card,frame-master = <&codec_endpoint>; - }; + sai1b_port: port { + cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + format = "i2s"; }; }; }; diff --git a/Bindings/sound/st,stm32-spdifrx.txt b/Bindings/sound/st,stm32-spdifrx.txt new file mode 100644 index 000000000000..33826f2459fa --- /dev/null +++ b/Bindings/sound/st,stm32-spdifrx.txt @@ -0,0 +1,56 @@ +STMicroelectronics STM32 S/PDIF receiver (SPDIFRX). + +The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with +IEC-60958 and IEC-61937. + +Required properties: + - compatible: should be "st,stm32h7-spdifrx" + - reg: cpu DAI IP base address and size + - clocks: must contain an entry for kclk (used as S/PDIF signal reference) + - clock-names: must contain "kclk" + - interrupts: cpu DAI interrupt line + - dmas: DMA specifiers for audio data DMA and iec control flow DMA + See STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt + - dma-names: two dmas have to be defined, "rx" and "rx-ctrl" + +Optional properties: + - resets: Reference to a reset controller asserting the SPDIFRX + +The device node should contain one 'port' child node with one child 'endpoint' +node, according to the bindings defined in Documentation/devicetree/bindings/ +graph.txt. + +Example: +spdifrx: spdifrx@40004000 { + compatible = "st,stm32h7-spdifrx"; + reg = <0x40004000 0x400>; + clocks = <&rcc SPDIFRX_CK>; + clock-names = "kclk"; + interrupts = <97>; + dmas = <&dmamux1 2 93 0x400 0x0>, + <&dmamux1 3 94 0x400 0x0>; + dma-names = "rx", "rx-ctrl"; + pinctrl-0 = <&spdifrx_pins>; + pinctrl-names = "default"; + + spdifrx_port: port { + cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + }; + }; +}; + +spdif_in: spdif-in { + compatible = "linux,spdif-dir"; + + codec_port: port { + codec_endpoint: endpoint { + remote-endpoint = <&cpu_endpoint>; + }; + }; +}; + +soundcard { + compatible = "audio-graph-card"; + dais = <&spdifrx_port>; +}; diff --git a/Bindings/sound/sun4i-codec.txt b/Bindings/sound/sun4i-codec.txt index 3863531d1e6d..2d4e10deb6f4 100644 --- a/Bindings/sound/sun4i-codec.txt +++ b/Bindings/sound/sun4i-codec.txt @@ -7,6 +7,7 @@ Required properties: - "allwinner,sun7i-a20-codec" - "allwinner,sun8i-a23-codec" - "allwinner,sun8i-h3-codec" + - "allwinner,sun8i-v3s-codec" - reg: must contain the registers location and length - interrupts: must contain the codec interrupt - dmas: DMA channels for tx and rx dma. See the DMA client binding, @@ -25,6 +26,7 @@ Required properties for the following compatibles: - "allwinner,sun6i-a31-codec" - "allwinner,sun8i-a23-codec" - "allwinner,sun8i-h3-codec" + - "allwinner,sun8i-v3s-codec" - resets: phandle to the reset control for this device - allwinner,audio-routing: A list of the connections between audio components. Each entry is a pair of strings, the first being the @@ -34,15 +36,15 @@ Required properties for the following compatibles: Audio pins on the SoC: "HP" "HPCOM" - "LINEIN" - "LINEOUT" (not on sun8i-a23) + "LINEIN" (not on sun8i-v3s) + "LINEOUT" (not on sun8i-a23 or sun8i-v3s) "MIC1" - "MIC2" + "MIC2" (not on sun8i-v3s) "MIC3" (sun6i-a31 only) Microphone biases from the SoC: "HBIAS" - "MBIAS" + "MBIAS" (not on sun8i-v3s) Board connectors: "Headphone" @@ -55,6 +57,7 @@ Required properties for the following compatibles: Required properties for the following compatibles: - "allwinner,sun8i-a23-codec" - "allwinner,sun8i-h3-codec" + - "allwinner,sun8i-v3s-codec" - allwinner,codec-analog-controls: A phandle to the codec analog controls block in the PRCM. diff --git a/Bindings/sound/sun8i-codec-analog.txt b/Bindings/sound/sun8i-codec-analog.txt index 779b735781ba..1b6e7c4e50ab 100644 --- a/Bindings/sound/sun8i-codec-analog.txt +++ b/Bindings/sound/sun8i-codec-analog.txt @@ -4,6 +4,7 @@ Required properties: - compatible: must be one of the following compatibles: - "allwinner,sun8i-a23-codec-analog" - "allwinner,sun8i-h3-codec-analog" + - "allwinner,sun8i-v3s-codec-analog" Required properties if not a sub-node of the PRCM node: - reg: must contain the registers location and length diff --git a/Bindings/sound/zte,zx-aud96p22.txt b/Bindings/sound/zte,zx-aud96p22.txt new file mode 100644 index 000000000000..41bb1040eb71 --- /dev/null +++ b/Bindings/sound/zte,zx-aud96p22.txt @@ -0,0 +1,24 @@ +ZTE ZX AUD96P22 Audio Codec + +Required properties: + - compatible: Must be "zte,zx-aud96p22" + - #sound-dai-cells: Should be 0 + - reg: I2C bus slave address of AUD96P22 + +Example: + + i2c0: i2c@1486000 { + compatible = "zte,zx296718-i2c"; + reg = <0x01486000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&audiocrm AUDIO_I2C0_WCLK>; + clock-frequency = <1600000>; + + aud96p22: codec@22 { + compatible = "zte,zx-aud96p22"; + #sound-dai-cells = <0>; + reg = <0x22>; + }; + }; diff --git a/Bindings/spi/sh-msiof.txt b/Bindings/spi/sh-msiof.txt index dc975064fa27..64ee489571c4 100644 --- a/Bindings/spi/sh-msiof.txt +++ b/Bindings/spi/sh-msiof.txt @@ -38,6 +38,8 @@ Optional properties: specifiers, one for transmission, and one for reception. - dma-names : Must contain a list of two DMA names, "tx" and "rx". +- spi-slave : Empty property indicating the SPI controller is used + in slave mode. - renesas,dtdl : delay sync signal (setup) in transmit mode. Must contain one of the following values: 0 (no bit delay) diff --git a/Bindings/spi/spi-bus.txt b/Bindings/spi/spi-bus.txt index 4b1d6e74c744..1f6e86f787ef 100644 --- a/Bindings/spi/spi-bus.txt +++ b/Bindings/spi/spi-bus.txt @@ -1,17 +1,23 @@ SPI (Serial Peripheral Interface) busses -SPI busses can be described with a node for the SPI master device -and a set of child nodes for each SPI slave on the bus. For this -discussion, it is assumed that the system's SPI controller is in -SPI master mode. This binding does not describe SPI controllers -in slave mode. +SPI busses can be described with a node for the SPI controller device +and a set of child nodes for each SPI slave on the bus. The system's SPI +controller may be described for use in SPI master mode or in SPI slave mode, +but not for both at the same time. -The SPI master node requires the following properties: +The SPI controller node requires the following properties: +- compatible - Name of SPI bus controller following generic names + recommended practice. + +In master mode, the SPI controller node requires the following additional +properties: - #address-cells - number of cells required to define a chip select address on the SPI bus. - #size-cells - should be zero. -- compatible - name of SPI bus controller following generic names - recommended practice. + +In slave mode, the SPI controller node requires one additional property: +- spi-slave - Empty property. + No other properties are required in the SPI bus node. It is assumed that a driver for an SPI bus device will understand that it is an SPI bus. However, the binding does not attempt to define the specific method for @@ -21,7 +27,7 @@ assumption that board specific platform code will be used to manage chip selects. Individual drivers can define additional properties to support describing the chip select layout. -Optional properties: +Optional properties (master mode only): - cs-gpios - gpios chip select. - num-cs - total number of chipselects. @@ -41,28 +47,36 @@ cs1 : native cs2 : &gpio1 1 0 cs3 : &gpio1 2 0 -SPI slave nodes must be children of the SPI master node and can -contain the following properties. -- reg - (required) chip select address of device. -- compatible - (required) name of SPI device following generic names - recommended practice. -- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz. -- spi-cpol - (optional) Empty property indicating device requires - inverse clock polarity (CPOL) mode. -- spi-cpha - (optional) Empty property indicating device requires - shifted clock phase (CPHA) mode. -- spi-cs-high - (optional) Empty property indicating device requires - chip select active high. -- spi-3wire - (optional) Empty property indicating device requires - 3-wire mode. -- spi-lsb-first - (optional) Empty property indicating device requires - LSB first mode. -- spi-tx-bus-width - (optional) The bus width (number of data wires) that is - used for MOSI. Defaults to 1 if not present. -- spi-rx-bus-width - (optional) The bus width (number of data wires) that is - used for MISO. Defaults to 1 if not present. -- spi-rx-delay-us - (optional) Microsecond delay after a read transfer. -- spi-tx-delay-us - (optional) Microsecond delay after a write transfer. + +SPI slave nodes must be children of the SPI controller node. + +In master mode, one or more slave nodes (up to the number of chip selects) can +be present. Required properties are: +- compatible - Name of SPI device following generic names recommended + practice. +- reg - Chip select address of device. +- spi-max-frequency - Maximum SPI clocking speed of device in Hz. + +In slave mode, the (single) slave node is optional. +If present, it must be called "slave". Required properties are: +- compatible - Name of SPI device following generic names recommended + practice. + +All slave nodes can contain the following optional properties: +- spi-cpol - Empty property indicating device requires inverse clock + polarity (CPOL) mode. +- spi-cpha - Empty property indicating device requires shifted clock + phase (CPHA) mode. +- spi-cs-high - Empty property indicating device requires chip select + active high. +- spi-3wire - Empty property indicating device requires 3-wire mode. +- spi-lsb-first - Empty property indicating device requires LSB first mode. +- spi-tx-bus-width - The bus width (number of data wires) that is used for MOSI. + Defaults to 1 if not present. +- spi-rx-bus-width - The bus width (number of data wires) that is used for MISO. + Defaults to 1 if not present. +- spi-rx-delay-us - Microsecond delay after a read transfer. +- spi-tx-delay-us - Microsecond delay after a write transfer. Some SPI controllers and devices support Dual and Quad SPI transfer mode. It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4 diff --git a/Bindings/spi/spi-meson.txt b/Bindings/spi/spi-meson.txt index dc6d0313324a..825c39cae74a 100644 --- a/Bindings/spi/spi-meson.txt +++ b/Bindings/spi/spi-meson.txt @@ -20,3 +20,34 @@ Required properties: #address-cells = <1>; #size-cells = <0>; }; + +* SPICC (SPI Communication Controller) + +The Meson SPICC is generic SPI controller for general purpose Full-Duplex +communications with dedicated 16 words RX/TX PIO FIFOs. + +Required properties: + - compatible: should be "amlogic,meson-gx-spicc" on Amlogic GX SoCs. + - reg: physical base address and length of the controller registers + - interrupts: The interrupt specifier + - clock-names: Must contain "core" + - clocks: phandle of the input clock for the baud rate generator + - #address-cells: should be 1 + - #size-cells: should be 0 + +Optional properties: + - resets: phandle of the internal reset line + +See ../spi/spi-bus.txt for more details on SPI bus master and slave devices +required and optional properties. + +Example : + spi@c1108d80 { + compatible = "amlogic,meson-gx-spicc"; + reg = <0xc1108d80 0x80>; + interrupts = ; + clock-names = "core"; + clocks = <&clk81>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Bindings/spi/spi-mt65xx.txt b/Bindings/spi/spi-mt65xx.txt index e43f4cf4cf35..e0318cf92d73 100644 --- a/Bindings/spi/spi-mt65xx.txt +++ b/Bindings/spi/spi-mt65xx.txt @@ -3,7 +3,9 @@ Binding for MTK SPI controller Required properties: - compatible: should be one of the following. - mediatek,mt2701-spi: for mt2701 platforms + - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms + - mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms diff --git a/Bindings/spi/spi-stm32.txt b/Bindings/spi/spi-stm32.txt new file mode 100644 index 000000000000..1b3fa2c119d5 --- /dev/null +++ b/Bindings/spi/spi-stm32.txt @@ -0,0 +1,59 @@ +STMicroelectronics STM32 SPI Controller + +The STM32 SPI controller is used to communicate with external devices using +the Serial Peripheral Interface. It supports full-duplex, half-duplex and +simplex synchronous serial communication with external devices. It supports +from 4 to 32-bit data size. Although it can be configured as master or slave, +only master is supported by the driver. + +Required properties: +- compatible: Must be "st,stm32h7-spi". +- reg: Offset and length of the device's register set. +- interrupts: Must contain the interrupt id. +- clocks: Must contain an entry for spiclk (which feeds the internal clock + generator). +- #address-cells: Number of cells required to define a chip select address. +- #size-cells: Should be zero. + +Optional properties: +- resets: Must contain the phandle to the reset controller. +- A pinctrl state named "default" may be defined to set pins in mode of + operation for SPI transfer. +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the + STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt. +- dma-names: DMA request names should include "tx" and "rx" if present. +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, + Documentation/devicetree/bindings/spi/spi-bus.txt + + +Child nodes represent devices on the SPI bus + See ../spi/spi-bus.txt + +Optional properties: +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in + nanoseconds inserted between two consecutive data frames. + + +Example: + spi2: spi@40003800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32h7-spi"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc SPI2_CK>; + resets = <&rcc 1166>; + dmas = <&dmamux1 0 39 0x400 0x01>, + <&dmamux1 1 40 0x400 0x01>; + dma-names = "rx", "tx"; + pinctrl-0 = <&spi2_pins_b>; + pinctrl-names = "default"; + cs-gpios = <&gpioa 11 0>; + + aardvark@0 { + compatible = "totalphase,aardvark"; + reg = <0>; + spi-max-frequency = <4000000>; + st,spi-midi-ns = <4000>; + }; + }; diff --git a/Bindings/thermal/brcm,ns-thermal b/Bindings/thermal/brcm,ns-thermal.txt similarity index 100% rename from Bindings/thermal/brcm,ns-thermal rename to Bindings/thermal/brcm,ns-thermal.txt diff --git a/Bindings/timer/actions,owl-timer.txt b/Bindings/timer/actions,owl-timer.txt new file mode 100644 index 000000000000..e3c28da80cb2 --- /dev/null +++ b/Bindings/timer/actions,owl-timer.txt @@ -0,0 +1,20 @@ +Actions Semi Owl Timer + +Required properties: +- compatible : "actions,s500-timer" for S500 + "actions,s900-timer" for S900 +- reg : Offset and length of the register set for the device. +- interrupts : Should contain the interrupts. +- interrupt-names : Valid names are: "2hz0", "2hz1", + "timer0", "timer1", "timer2", "timer3" + See ../resource-names.txt + +Example: + + timer@b0168000 { + compatible = "actions,s500-timer"; + reg = <0xb0168000 0x100>; + interrupts = , + ; + interrupt-names = "timer0", "timer1"; + }; diff --git a/Bindings/timer/faraday,fttmr010.txt b/Bindings/timer/faraday,fttmr010.txt index b73ca6cd07f8..195792270414 100644 --- a/Bindings/timer/faraday,fttmr010.txt +++ b/Bindings/timer/faraday,fttmr010.txt @@ -7,7 +7,11 @@ Required properties: - compatible : Must be one of "faraday,fttmr010" - "cortina,gemini-timer" + "cortina,gemini-timer", "faraday,fttmr010" + "moxa,moxart-timer", "faraday,fttmr010" + "aspeed,ast2400-timer" + "aspeed,ast2500-timer" + - reg : Should contain registers location and length - interrupts : Should contain the three timer interrupts usually with flags for falling edge diff --git a/Bindings/timer/moxa,moxart-timer.txt b/Bindings/timer/moxa,moxart-timer.txt deleted file mode 100644 index e207c11630af..000000000000 --- a/Bindings/timer/moxa,moxart-timer.txt +++ /dev/null @@ -1,19 +0,0 @@ -MOXA ART timer - -Required properties: - -- compatible : Must be one of: - - "moxa,moxart-timer" - - "aspeed,ast2400-timer" -- reg : Should contain registers location and length -- interrupts : Should contain the timer interrupt number -- clocks : Should contain phandle for the clock that drives the counter - -Example: - - timer: timer@98400000 { - compatible = "moxa,moxart-timer"; - reg = <0x98400000 0x42>; - interrupts = <19 1>; - clocks = <&coreclk>; - }; diff --git a/Bindings/trivial-devices.txt b/Bindings/trivial-devices.txt index 3e0a34c88e07..35f406dd86b6 100644 --- a/Bindings/trivial-devices.txt +++ b/Bindings/trivial-devices.txt @@ -55,6 +55,7 @@ gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire In infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz) isil,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor +isil,isl29030 Intersil ISL29030 Ambient Light and Proximity Sensor maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface diff --git a/Bindings/usb/dwc3.txt b/Bindings/usb/dwc3.txt index f658f394c2d3..52fb41046b34 100644 --- a/Bindings/usb/dwc3.txt +++ b/Bindings/usb/dwc3.txt @@ -45,6 +45,8 @@ Optional properties: a free-running PHY clock. - snps,dis-del-phy-power-chg-quirk: when set core will change PHY power from P0 to P1/P2/P3 without delay. + - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check + during HS transmit. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold diff --git a/Bindings/usb/exynos-usb.txt b/Bindings/usb/exynos-usb.txt index 9b4dbe3b2acc..78ebebb66dad 100644 --- a/Bindings/usb/exynos-usb.txt +++ b/Bindings/usb/exynos-usb.txt @@ -92,6 +92,8 @@ Required properties: parent's address space - clocks: Clock IDs array as required by the controller. - clock-names: names of clocks correseponding to IDs in the clock property + - vdd10-supply: 1.0V powr supply + - vdd33-supply: 3.0V/3.3V power supply Sub-nodes: The dwc3 core should be added as subnode to Exynos dwc3 glue. @@ -107,6 +109,8 @@ Example: #address-cells = <1>; #size-cells = <1>; ranges; + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; dwc3 { compatible = "synopsys,dwc3"; diff --git a/Bindings/usb/iproc-udc.txt b/Bindings/usb/iproc-udc.txt new file mode 100644 index 000000000000..272d7faf1a97 --- /dev/null +++ b/Bindings/usb/iproc-udc.txt @@ -0,0 +1,21 @@ +Broadcom IPROC USB Device controller. + +The device node is used for UDCs integrated into Broadcom's +iProc family (Northstar2, Cygnus) of SoCs'. The UDC is based +on Synopsys Designware Cores AHB Subsystem Device Controller +IP. + +Required properties: + - compatible: Add the compatibility strings for supported platforms. + For Broadcom NS2 platform, add "brcm,ns2-udc","brcm,iproc-udc". + For Broadcom Cygnus platform, add "brcm,cygnus-udc", "brcm,iproc-udc". + - reg: Offset and length of UDC register set + - interrupts: description of interrupt line + - phys: phandle to phy node. + +Example: + udc_dwc: usb@664e0000 { + compatible = "brcm,ns2-udc", "brcm,iproc-udc"; + reg = <0x664e0000 0x2000>; + interrupts = ; + phys = <&usbdrd_phy>; diff --git a/Bindings/usb/usb-ohci.txt b/Bindings/usb/usb-ohci.txt index 9df456968596..e8766b08c93b 100644 --- a/Bindings/usb/usb-ohci.txt +++ b/Bindings/usb/usb-ohci.txt @@ -10,6 +10,7 @@ Optional properties: - big-endian-desc : boolean, set this for hcds with big-endian descriptors - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc - no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA +- remote-wakeup-connected: remote wakeup is wired on the platform - num-ports : u32, to override the detected port count - clocks : a list of phandle + clock specifier pairs - phys : phandle + phy specifier pair diff --git a/Bindings/vendor-prefixes.txt b/Bindings/vendor-prefixes.txt index c03d20140366..daf465bef758 100644 --- a/Bindings/vendor-prefixes.txt +++ b/Bindings/vendor-prefixes.txt @@ -5,6 +5,7 @@ using them to avoid name-space collisions. abcn Abracon Corporation abilis Abilis Systems +actions Actions Semiconductor Co., Ltd. active-semi Active-Semi International Inc ad Avionic Design GmbH adapteva Adapteva, Inc. @@ -28,6 +29,7 @@ andestech Andes Technology Corporation apm Applied Micro Circuits Corporation (APM) aptina Aptina Imaging arasan Arasan Chip Systems +arctic Arctic Sand aries Aries Embedded GmbH arm ARM Ltd. armadeus ARMadeus Systems SARL @@ -44,6 +46,7 @@ avia avia semiconductor avic Shanghai AVIC Optoelectronics Co., Ltd. axentia Axentia Technologies AB axis Axis Communications AB +bananapi BIPAI KEJI LIMITED boe BOE Technology Group Co., Ltd. bosch Bosch Sensortec GmbH boundary Boundary Devices Inc. @@ -158,6 +161,8 @@ iom Iomega Corporation isee ISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. +itead ITEAD Intelligent Systems Co.Ltd +iwave iWave Systems Technologies Pvt. Ltd. jdi Japan Display Inc. jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH @@ -165,6 +170,7 @@ keithkoep Keith & Koep GmbH keymile Keymile GmbH khadas Khadas kinetic Kinetic Technologies +kingnovel Kingnovel Technology Co., Ltd. kosagi Sutajio Ko-Usagi PTE Ltd. kyo Kyocera Corporation lacie LaCie @@ -172,8 +178,10 @@ lantiq Lantiq Semiconductor lego LEGO Systems A/S lenovo Lenovo Group Ltd. lg LG Corporation +libretech Shenzhen Libre Technology Co., Ltd licheepi Lichee Pi linaro Linaro Limited +linksys Belkin International, Inc. (Linksys) linux Linux-specific binding lltc Linear Technology Corporation lsi LSI Corp. (LSI Logic) @@ -219,6 +227,7 @@ nexbox Nexbox newhaven Newhaven Display International ni National Instruments nintendo Nintendo +nlt NLT Technologies, Ltd. nokia Nokia nordic Nordic Semiconductor nuvoton Nuvoton Technology Corporation @@ -266,8 +275,10 @@ renesas Renesas Electronics Corporation richtek Richtek Technology Corporation ricoh Ricoh Co. Ltd. rikomagic Rikomagic Tech Corp. Ltd +riscv RISC-V Foundation rockchip Fuzhou Rockchip Electronics Co., Ltd rohm ROHM Semiconductor Co., Ltd +roofull Shenzhen Roofull Technology Co, Ltd samsung Samsung Semiconductor samtec Samtec/Softing company sandisk Sandisk Corporation @@ -331,6 +342,7 @@ tronfy Tronfy tronsmart Tronsmart truly Truly Semiconductors Limited tyan Tyan Computer Corporation +ucrobotics uCRobotics udoo Udoo uniwest United Western Technologies Corp (UniWest) upisemi uPI Semiconductor Corp. @@ -356,6 +368,7 @@ xlnx Xilinx xunlong Shenzhen Xunlong Software CO.,Limited zarlink Zarlink Semiconductor zeitec ZEITEC Semiconductor Co., LTD. +zidoo Shenzhen Zidoo Technology Co., Ltd. zii Zodiac Inflight Innovations zte ZTE Corp. zyxel ZyXEL Communications Corp. diff --git a/Bindings/watchdog/da9062-wdt.txt b/Bindings/watchdog/da9062-wdt.txt new file mode 100644 index 000000000000..b935b526d2f3 --- /dev/null +++ b/Bindings/watchdog/da9062-wdt.txt @@ -0,0 +1,23 @@ +* Dialog Semiconductor DA9062/61 Watchdog Timer + +Required properties: + +- compatible: should be one of the following valid compatible string lines: + "dlg,da9061-watchdog", "dlg,da9062-watchdog" + "dlg,da9062-watchdog" + +Example: DA9062 + + pmic0: da9062@58 { + watchdog { + compatible = "dlg,da9062-watchdog"; + }; + }; + +Example: DA9061 using a fall-back compatible for the DA9062 watchdog driver + + pmic0: da9061@58 { + watchdog { + compatible = "dlg,da9061-watchdog", "dlg,da9062-watchdog"; + }; + }; diff --git a/Bindings/watchdog/dw_wdt.txt b/Bindings/watchdog/dw_wdt.txt index 08e16f684f2d..eb0914420c7c 100644 --- a/Bindings/watchdog/dw_wdt.txt +++ b/Bindings/watchdog/dw_wdt.txt @@ -10,6 +10,8 @@ Required Properties: Optional Properties: - interrupts : The interrupt used for the watchdog timeout warning. +- resets : phandle pointing to the system reset controller with + line index for the watchdog. Example: @@ -18,4 +20,5 @@ Example: reg = <0xffd02000 0x1000>; interrupts = <0 171 4>; clocks = <&per_base_clk>; + resets = <&rst WDT0_RESET>; }; diff --git a/Bindings/watchdog/renesas-wdt.txt b/Bindings/watchdog/renesas-wdt.txt index da24e3133417..9e306afbbd49 100644 --- a/Bindings/watchdog/renesas-wdt.txt +++ b/Bindings/watchdog/renesas-wdt.txt @@ -2,10 +2,11 @@ Renesas Watchdog Timer (WDT) Controller Required properties: - compatible : Should be "renesas,-wdt", and - "renesas,rcar-gen3-wdt" as fallback. + "renesas,rcar-gen3-wdt" or "renesas,rza-wdt" as fallback. Examples with soctypes are: - "renesas,r8a7795-wdt" (R-Car H3) - "renesas,r8a7796-wdt" (R-Car M3-W) + - "renesas,r7s72100-wdt" (RZ/A1) When compatible with the generic version, nodes must list the SoC-specific version corresponding to the platform first, followed by the generic @@ -17,6 +18,7 @@ Required properties: Optional properties: - timeout-sec : Contains the watchdog timeout in seconds - power-domains : the power domain the WDT belongs to +- interrupts: Some WDTs have an interrupt when used in interval timer mode Examples: diff --git a/Bindings/watchdog/st,stm32-iwdg.txt b/Bindings/watchdog/st,stm32-iwdg.txt new file mode 100644 index 000000000000..cc13b10a3f82 --- /dev/null +++ b/Bindings/watchdog/st,stm32-iwdg.txt @@ -0,0 +1,19 @@ +STM32 Independent WatchDoG (IWDG) +--------------------------------- + +Required properties: +- compatible: "st,stm32-iwdg" +- reg: physical base address and length of the registers set for the device +- clocks: must contain a single entry describing the clock input + +Optional Properties: +- timeout-sec: Watchdog timeout value in seconds. + +Example: + +iwdg: watchdog@40003000 { + compatible = "st,stm32-iwdg"; + reg = <0x40003000 0x400>; + clocks = <&clk_lsi>; + timeout-sec = <32>; +}; diff --git a/Bindings/watchdog/uniphier-wdt.txt b/Bindings/watchdog/uniphier-wdt.txt new file mode 100644 index 000000000000..bf6337546dd1 --- /dev/null +++ b/Bindings/watchdog/uniphier-wdt.txt @@ -0,0 +1,20 @@ +UniPhier watchdog timer controller + +This UniPhier watchdog timer controller must be under sysctrl node. + +Required properties: +- compatible: should be "socionext,uniphier-wdt" + +Example: + + sysctrl@61840000 { + compatible = "socionext,uniphier-ld11-sysctrl", + "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + watchdog { + compatible = "socionext,uniphier-wdt"; + } + + other nodes ... + }; diff --git a/include/dt-bindings/clock/bcm-sr.h b/include/dt-bindings/clock/bcm-sr.h new file mode 100644 index 000000000000..cff6c6fe2947 --- /dev/null +++ b/include/dt-bindings/clock/bcm-sr.h @@ -0,0 +1,101 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _CLOCK_BCM_SR_H +#define _CLOCK_BCM_SR_H + +/* GENPLL 0 clock channel ID SCR HSLS FS PCIE */ +#define BCM_SR_GENPLL0 0 +#define BCM_SR_GENPLL0_SATA_CLK 1 +#define BCM_SR_GENPLL0_SCR_CLK 2 +#define BCM_SR_GENPLL0_250M_CLK 3 +#define BCM_SR_GENPLL0_PCIE_AXI_CLK 4 +#define BCM_SR_GENPLL0_PAXC_AXI_X2_CLK 5 +#define BCM_SR_GENPLL0_PAXC_AXI_CLK 6 + +/* GENPLL 1 clock channel ID MHB PCIE NITRO */ +#define BCM_SR_GENPLL1 0 +#define BCM_SR_GENPLL1_PCIE_TL_CLK 1 +#define BCM_SR_GENPLL1_MHB_APB_CLK 2 + +/* GENPLL 2 clock channel ID NITRO MHB*/ +#define BCM_SR_GENPLL2 0 +#define BCM_SR_GENPLL2_NIC_CLK 1 +#define BCM_SR_GENPLL2_250_NITRO_CLK 2 +#define BCM_SR_GENPLL2_125_NITRO_CLK 3 +#define BCM_SR_GENPLL2_CHIMP_CLK 4 + +/* GENPLL 3 HSLS clock channel ID */ +#define BCM_SR_GENPLL3 0 +#define BCM_SR_GENPLL3_HSLS_CLK 1 +#define BCM_SR_GENPLL3_SDIO_CLK 2 + +/* GENPLL 4 SCR clock channel ID */ +#define BCM_SR_GENPLL4 0 +#define BCM_SR_GENPLL4_CCN_CLK 1 + +/* GENPLL 5 FS4 clock channel ID */ +#define BCM_SR_GENPLL5 0 +#define BCM_SR_GENPLL5_FS_CLK 1 +#define BCM_SR_GENPLL5_SPU_CLK 2 + +/* GENPLL 6 NITRO clock channel ID */ +#define BCM_SR_GENPLL6 0 +#define BCM_SR_GENPLL6_48_USB_CLK 1 + +/* LCPLL0 clock channel ID */ +#define BCM_SR_LCPLL0 0 +#define BCM_SR_LCPLL0_SATA_REF_CLK 1 +#define BCM_SR_LCPLL0_USB_REF_CLK 2 +#define BCM_SR_LCPLL0_SATA_REFPN_CLK 3 + +/* LCPLL1 clock channel ID */ +#define BCM_SR_LCPLL1 0 +#define BCM_SR_LCPLL1_WAN_CLK 1 + +/* LCPLL PCIE clock channel ID */ +#define BCM_SR_LCPLL_PCIE 0 +#define BCM_SR_LCPLL_PCIE_PHY_REF_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL0 0 +#define BCM_SR_EMEMPLL0_EMEM_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL1 0 +#define BCM_SR_EMEMPLL1_EMEM_CLK 1 + +/* GENPLL EMEM0 clock channel ID */ +#define BCM_SR_EMEMPLL2 0 +#define BCM_SR_EMEMPLL2_EMEM_CLK 1 + +#endif /* _CLOCK_BCM_SR_H */ diff --git a/include/dt-bindings/clock/boston-clock.h b/include/dt-bindings/clock/boston-clock.h new file mode 100644 index 000000000000..a6f009821137 --- /dev/null +++ b/include/dt-bindings/clock/boston-clock.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ +#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ + +#define BOSTON_CLK_INPUT 0 +#define BOSTON_CLK_SYS 1 +#define BOSTON_CLK_CPU 2 + +#endif /* __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ */ diff --git a/include/dt-bindings/clock/cortina,gemini-clock.h b/include/dt-bindings/clock/cortina,gemini-clock.h new file mode 100644 index 000000000000..acf5cd550b0c --- /dev/null +++ b/include/dt-bindings/clock/cortina,gemini-clock.h @@ -0,0 +1,29 @@ +#ifndef DT_BINDINGS_CORTINA_GEMINI_CLOCK_H +#define DT_BINDINGS_CORTINA_GEMINI_CLOCK_H + +/* RTC, AHB, APB, CPU, PCI, TVC, UART clocks and 13 gates */ +#define GEMINI_NUM_CLKS 20 + +#define GEMINI_CLK_RTC 0 +#define GEMINI_CLK_AHB 1 +#define GEMINI_CLK_APB 2 +#define GEMINI_CLK_CPU 3 +#define GEMINI_CLK_PCI 4 +#define GEMINI_CLK_TVC 5 +#define GEMINI_CLK_UART 6 +#define GEMINI_CLK_GATES 7 +#define GEMINI_CLK_GATE_SECURITY 7 +#define GEMINI_CLK_GATE_GMAC0 8 +#define GEMINI_CLK_GATE_GMAC1 9 +#define GEMINI_CLK_GATE_SATA0 10 +#define GEMINI_CLK_GATE_SATA1 11 +#define GEMINI_CLK_GATE_USB0 12 +#define GEMINI_CLK_GATE_USB1 13 +#define GEMINI_CLK_GATE_IDE 14 +#define GEMINI_CLK_GATE_PCI 15 +#define GEMINI_CLK_GATE_DDR 16 +#define GEMINI_CLK_GATE_FLASH 17 +#define GEMINI_CLK_GATE_TVC 18 +#define GEMINI_CLK_GATE_BOOT 19 + +#endif /* DT_BINDINGS_CORTINA_GEMINI_CLOCK_H */ diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 6fd21c291416..2740ae0424a9 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -217,6 +217,9 @@ #define CLK_MOUT_MCLK_CDREX 654 #define CLK_MOUT_BPLL 655 #define CLK_MOUT_MX_MSPLL_CCORE 656 +#define CLK_MOUT_EPLL 657 +#define CLK_MOUT_MAU_EPLL 658 +#define CLK_MOUT_USER_MAU_EPLL 659 /* divider clocks */ #define CLK_DOUT_PIXEL 768 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 3190e30b9398..e3e9f7919c31 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -5,7 +5,6 @@ #ifndef __GXBB_CLKC_H #define __GXBB_CLKC_H -#define CLKID_CPUCLK 1 #define CLKID_HDMI_PLL 2 #define CLKID_FCLK_DIV2 4 #define CLKID_FCLK_DIV3 5 @@ -13,24 +12,30 @@ #define CLKID_GP0_PLL 9 #define CLKID_CLK81 12 #define CLKID_MPLL2 15 +#define CLKID_SPICC 21 #define CLKID_I2C 22 #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 +#define CLKID_UART0 26 #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 +#define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 +#define CLKID_UART1 48 #define CLKID_USB0 50 #define CLKID_USB1 51 #define CLKID_USB 55 #define CLKID_HDMI_PCLK 63 #define CLKID_USB1_DDR_BRIDGE 64 #define CLKID_USB0_DDR_BRIDGE 65 +#define CLKID_UART2 68 #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 +#define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95 @@ -42,5 +47,8 @@ #define CLKID_MALI_1_SEL 103 #define CLKID_MALI_1 105 #define CLKID_MALI 106 +#define CLKID_CTS_AMCLK 107 +#define CLKID_CTS_MCLK_I958 110 +#define CLKID_CTS_I958 113 #endif /* __GXBB_CLKC_H */ diff --git a/include/dt-bindings/clock/hi3660-clock.h b/include/dt-bindings/clock/hi3660-clock.h index 1c00b7fe296f..adb768d447a5 100644 --- a/include/dt-bindings/clock/hi3660-clock.h +++ b/include/dt-bindings/clock/hi3660-clock.h @@ -154,6 +154,23 @@ #define HI3660_CLK_DIV_UFSPERI 137 #define HI3660_CLK_DIV_AOMM 138 #define HI3660_CLK_DIV_IOPERI 139 +#define HI3660_VENC_VOLT_HOLD 140 +#define HI3660_PERI_VOLT_HOLD 141 +#define HI3660_CLK_GATE_VENC 142 +#define HI3660_CLK_GATE_VDEC 143 +#define HI3660_CLK_ANDGT_VENC 144 +#define HI3660_CLK_ANDGT_VDEC 145 +#define HI3660_CLK_MUX_VENC 146 +#define HI3660_CLK_MUX_VDEC 147 +#define HI3660_CLK_DIV_VENC 148 +#define HI3660_CLK_DIV_VDEC 149 +#define HI3660_CLK_FAC_ISP_SNCLK 150 +#define HI3660_CLK_GATE_ISP_SNCLK0 151 +#define HI3660_CLK_GATE_ISP_SNCLK1 152 +#define HI3660_CLK_GATE_ISP_SNCLK2 153 +#define HI3660_CLK_ANGT_ISP_SNCLK 154 +#define HI3660_CLK_MUX_ISP_SNCLK 155 +#define HI3660_CLK_DIV_ISP_SNCLK 156 /* clk in pmuctrl */ #define HI3660_GATE_ABB_192 0 diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h index b8ba665aab7b..409cc02cd844 100644 --- a/include/dt-bindings/clock/hi6220-clock.h +++ b/include/dt-bindings/clock/hi6220-clock.h @@ -174,4 +174,8 @@ #define HI6220_DDRC_AXI1 7 #define HI6220_POWER_NR_CLKS 8 + +/* clk in Hi6220 acpu sctrl */ +#define HI6220_ACPU_SFT_AT_S 0 + #endif diff --git a/include/dt-bindings/clock/histb-clock.h b/include/dt-bindings/clock/histb-clock.h index 181c0f070f7c..067f5e501b0c 100644 --- a/include/dt-bindings/clock/histb-clock.h +++ b/include/dt-bindings/clock/histb-clock.h @@ -53,7 +53,14 @@ #define HISTB_ETH1_MAC_CLK 31 #define HISTB_ETH1_MACIF_CLK 32 #define HISTB_COMBPHY1_CLK 33 - +#define HISTB_USB2_BUS_CLK 34 +#define HISTB_USB2_PHY_CLK 35 +#define HISTB_USB2_UTMI_CLK 36 +#define HISTB_USB2_12M_CLK 37 +#define HISTB_USB2_48M_CLK 38 +#define HISTB_USB2_OTG_UTMI_CLK 39 +#define HISTB_USB2_PHY1_REF_CLK 40 +#define HISTB_USB2_PHY2_REF_CLK 41 /* clocks provided by mcu CRG */ #define HISTB_MCE_CLK 1 diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h index a7a1a50f33ef..de62a83b6c80 100644 --- a/include/dt-bindings/clock/imx7d-clock.h +++ b/include/dt-bindings/clock/imx7d-clock.h @@ -450,5 +450,7 @@ #define IMX7D_CLK_ARM 437 #define IMX7D_CKIL 438 #define IMX7D_OCOTP_CLK 439 -#define IMX7D_CLK_END 440 +#define IMX7D_NAND_RAWNAND_CLK 440 +#define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441 +#define IMX7D_CLK_END 442 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */ diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index a55ff8c9b30f..e29227fb52a1 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -21,5 +21,15 @@ #define CLKID_ZERO 13 #define CLKID_MPEG_SEL 14 #define CLKID_MPEG_DIV 15 +#define CLKID_SAR_ADC 23 +#define CLKID_RNG0 25 +#define CLKID_SDIO 30 +#define CLKID_ETH 36 +#define CLKID_USB0 50 +#define CLKID_USB1 51 +#define CLKID_USB 55 +#define CLKID_USB1_DDR_BRIDGE 64 +#define CLKID_USB0_DDR_BRIDGE 65 +#define CLKID_SANA 69 #endif /* __MESON8B_CLKC_H */ diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h index 2062c67e2e51..551f7600ab58 100644 --- a/include/dt-bindings/clock/mt2701-clk.h +++ b/include/dt-bindings/clock/mt2701-clk.h @@ -221,7 +221,8 @@ #define CLK_INFRA_PMICWRAP 17 #define CLK_INFRA_DDCCI 18 #define CLK_INFRA_CLK_13M 19 -#define CLK_INFRA_NR 20 +#define CLK_INFRA_CPUSEL 20 +#define CLK_INFRA_NR 21 /* PERICFG */ diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 6094bf7e50ab..8aea623dd518 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -193,7 +193,9 @@ #define CLK_INFRA_PMICSPI 10 #define CLK_INFRA_PMICWRAP 11 #define CLK_INFRA_CLK_13M 12 -#define CLK_INFRA_NR_CLK 13 +#define CLK_INFRA_CA53SEL 13 +#define CLK_INFRA_CA57SEL 14 +#define CLK_INFRA_NR_CLK 15 /* PERI_SYS */ diff --git a/include/dt-bindings/clock/omap4.h b/include/dt-bindings/clock/omap4.h new file mode 100644 index 000000000000..e86c758e50ce --- /dev/null +++ b/include/dt-bindings/clock/omap4.h @@ -0,0 +1,146 @@ +/* + * Copyright 2017 Texas Instruments, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __DT_BINDINGS_CLK_OMAP4_H +#define __DT_BINDINGS_CLK_OMAP4_H + +#define OMAP4_CLKCTRL_OFFSET 0x20 +#define OMAP4_CLKCTRL_INDEX(offset) ((offset) - OMAP4_CLKCTRL_OFFSET) + +/* mpuss clocks */ +#define OMAP4_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* tesla clocks */ +#define OMAP4_DSP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* abe clocks */ +#define OMAP4_L4_ABE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_AESS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_MCPDM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_DMIC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) +#define OMAP4_MCASP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) +#define OMAP4_MCBSP1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x48) +#define OMAP4_MCBSP2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50) +#define OMAP4_MCBSP3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x58) +#define OMAP4_SLIMBUS1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x60) +#define OMAP4_TIMER5_CLKCTRL OMAP4_CLKCTRL_INDEX(0x68) +#define OMAP4_TIMER6_CLKCTRL OMAP4_CLKCTRL_INDEX(0x70) +#define OMAP4_TIMER7_CLKCTRL OMAP4_CLKCTRL_INDEX(0x78) +#define OMAP4_TIMER8_CLKCTRL OMAP4_CLKCTRL_INDEX(0x80) +#define OMAP4_WD_TIMER3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x88) + +/* l4_ao clocks */ +#define OMAP4_SMARTREFLEX_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_SMARTREFLEX_IVA_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_SMARTREFLEX_CORE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) + +/* l3_1 clocks */ +#define OMAP4_L3_MAIN_1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l3_2 clocks */ +#define OMAP4_L3_MAIN_2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_GPMC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_OCMC_RAM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) + +/* ducati clocks */ +#define OMAP4_IPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l3_dma clocks */ +#define OMAP4_DMA_SYSTEM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l3_emif clocks */ +#define OMAP4_DMM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_EMIF1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_EMIF2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) + +/* d2d clocks */ +#define OMAP4_C2C_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l4_cfg clocks */ +#define OMAP4_L4_CFG_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_SPINLOCK_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_MAILBOX_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) + +/* l3_instr clocks */ +#define OMAP4_L3_MAIN_3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_L3_INSTR_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_OCP_WP_NOC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) + +/* ivahd clocks */ +#define OMAP4_IVA_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_SL2IF_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) + +/* iss clocks */ +#define OMAP4_ISS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_FDIF_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) + +/* l3_dss clocks */ +#define OMAP4_DSS_CORE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l3_gfx clocks */ +#define OMAP4_GPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +/* l3_init clocks */ +#define OMAP4_MMC1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_MMC2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_HSI_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) +#define OMAP4_USB_HOST_HS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x58) +#define OMAP4_USB_OTG_HS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x60) +#define OMAP4_USB_TLL_HS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x68) +#define OMAP4_USB_HOST_FS_CLKCTRL OMAP4_CLKCTRL_INDEX(0xd0) +#define OMAP4_OCP2SCP_USB_PHY_CLKCTRL OMAP4_CLKCTRL_INDEX(0xe0) + +/* l4_per clocks */ +#define OMAP4_TIMER10_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) +#define OMAP4_TIMER11_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_TIMER2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) +#define OMAP4_TIMER3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) +#define OMAP4_TIMER4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x48) +#define OMAP4_TIMER9_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50) +#define OMAP4_ELM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x58) +#define OMAP4_GPIO2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x60) +#define OMAP4_GPIO3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x68) +#define OMAP4_GPIO4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x70) +#define OMAP4_GPIO5_CLKCTRL OMAP4_CLKCTRL_INDEX(0x78) +#define OMAP4_GPIO6_CLKCTRL OMAP4_CLKCTRL_INDEX(0x80) +#define OMAP4_HDQ1W_CLKCTRL OMAP4_CLKCTRL_INDEX(0x88) +#define OMAP4_I2C1_CLKCTRL OMAP4_CLKCTRL_INDEX(0xa0) +#define OMAP4_I2C2_CLKCTRL OMAP4_CLKCTRL_INDEX(0xa8) +#define OMAP4_I2C3_CLKCTRL OMAP4_CLKCTRL_INDEX(0xb0) +#define OMAP4_I2C4_CLKCTRL OMAP4_CLKCTRL_INDEX(0xb8) +#define OMAP4_L4_PER_CLKCTRL OMAP4_CLKCTRL_INDEX(0xc0) +#define OMAP4_MCBSP4_CLKCTRL OMAP4_CLKCTRL_INDEX(0xe0) +#define OMAP4_MCSPI1_CLKCTRL OMAP4_CLKCTRL_INDEX(0xf0) +#define OMAP4_MCSPI2_CLKCTRL OMAP4_CLKCTRL_INDEX(0xf8) +#define OMAP4_MCSPI3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x100) +#define OMAP4_MCSPI4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x108) +#define OMAP4_MMC3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x120) +#define OMAP4_MMC4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x128) +#define OMAP4_SLIMBUS2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x138) +#define OMAP4_UART1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x140) +#define OMAP4_UART2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x148) +#define OMAP4_UART3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x150) +#define OMAP4_UART4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x158) +#define OMAP4_MMC5_CLKCTRL OMAP4_CLKCTRL_INDEX(0x160) + +/* l4_wkup clocks */ +#define OMAP4_L4_WKUP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) +#define OMAP4_WD_TIMER2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) +#define OMAP4_GPIO1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) +#define OMAP4_TIMER1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) +#define OMAP4_COUNTER_32K_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50) +#define OMAP4_KBD_CLKCTRL OMAP4_CLKCTRL_INDEX(0x78) + +/* emu_sys clocks */ +#define OMAP4_DEBUGSS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) + +#endif diff --git a/include/dt-bindings/clock/qcom,gcc-ipq8074.h b/include/dt-bindings/clock/qcom,gcc-ipq8074.h new file mode 100644 index 000000000000..370c83c3bccc --- /dev/null +++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H +#define _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H + +#define GPLL0 0 +#define GPLL0_MAIN 1 +#define GCC_SLEEP_CLK_SRC 2 +#define BLSP1_QUP1_I2C_APPS_CLK_SRC 3 +#define BLSP1_QUP1_SPI_APPS_CLK_SRC 4 +#define BLSP1_QUP2_I2C_APPS_CLK_SRC 5 +#define BLSP1_QUP2_SPI_APPS_CLK_SRC 6 +#define BLSP1_QUP3_I2C_APPS_CLK_SRC 7 +#define BLSP1_QUP3_SPI_APPS_CLK_SRC 8 +#define BLSP1_QUP4_I2C_APPS_CLK_SRC 9 +#define BLSP1_QUP4_SPI_APPS_CLK_SRC 10 +#define BLSP1_QUP5_I2C_APPS_CLK_SRC 11 +#define BLSP1_QUP5_SPI_APPS_CLK_SRC 12 +#define BLSP1_QUP6_I2C_APPS_CLK_SRC 13 +#define BLSP1_QUP6_SPI_APPS_CLK_SRC 14 +#define BLSP1_UART1_APPS_CLK_SRC 15 +#define BLSP1_UART2_APPS_CLK_SRC 16 +#define BLSP1_UART3_APPS_CLK_SRC 17 +#define BLSP1_UART4_APPS_CLK_SRC 18 +#define BLSP1_UART5_APPS_CLK_SRC 19 +#define BLSP1_UART6_APPS_CLK_SRC 20 +#define GCC_BLSP1_AHB_CLK 21 +#define GCC_BLSP1_QUP1_I2C_APPS_CLK 22 +#define GCC_BLSP1_QUP1_SPI_APPS_CLK 23 +#define GCC_BLSP1_QUP2_I2C_APPS_CLK 24 +#define GCC_BLSP1_QUP2_SPI_APPS_CLK 25 +#define GCC_BLSP1_QUP3_I2C_APPS_CLK 26 +#define GCC_BLSP1_QUP3_SPI_APPS_CLK 27 +#define GCC_BLSP1_QUP4_I2C_APPS_CLK 28 +#define GCC_BLSP1_QUP4_SPI_APPS_CLK 29 +#define GCC_BLSP1_QUP5_I2C_APPS_CLK 30 +#define GCC_BLSP1_QUP5_SPI_APPS_CLK 31 +#define GCC_BLSP1_QUP6_I2C_APPS_CLK 32 +#define GCC_BLSP1_QUP6_SPI_APPS_CLK 33 +#define GCC_BLSP1_UART1_APPS_CLK 34 +#define GCC_BLSP1_UART2_APPS_CLK 35 +#define GCC_BLSP1_UART3_APPS_CLK 36 +#define GCC_BLSP1_UART4_APPS_CLK 37 +#define GCC_BLSP1_UART5_APPS_CLK 38 +#define GCC_BLSP1_UART6_APPS_CLK 39 +#define GCC_PRNG_AHB_CLK 40 +#define GCC_QPIC_AHB_CLK 41 +#define GCC_QPIC_CLK 42 +#define PCNOC_BFDCD_CLK_SRC 43 + +#define GCC_BLSP1_BCR 0 +#define GCC_BLSP1_QUP1_BCR 1 +#define GCC_BLSP1_UART1_BCR 2 +#define GCC_BLSP1_QUP2_BCR 3 +#define GCC_BLSP1_UART2_BCR 4 +#define GCC_BLSP1_QUP3_BCR 5 +#define GCC_BLSP1_UART3_BCR 6 +#define GCC_BLSP1_QUP4_BCR 7 +#define GCC_BLSP1_UART4_BCR 8 +#define GCC_BLSP1_QUP5_BCR 9 +#define GCC_BLSP1_UART5_BCR 10 +#define GCC_BLSP1_QUP6_BCR 11 +#define GCC_BLSP1_UART6_BCR 12 +#define GCC_IMEM_BCR 13 +#define GCC_SMMU_BCR 14 +#define GCC_APSS_TCU_BCR 15 +#define GCC_SMMU_XPU_BCR 16 +#define GCC_PCNOC_TBU_BCR 17 +#define GCC_SMMU_CFG_BCR 18 +#define GCC_PRNG_BCR 19 +#define GCC_BOOT_ROM_BCR 20 +#define GCC_CRYPTO_BCR 21 +#define GCC_WCSS_BCR 22 +#define GCC_WCSS_Q6_BCR 23 +#define GCC_NSS_BCR 24 +#define GCC_SEC_CTRL_BCR 25 +#define GCC_ADSS_BCR 26 +#define GCC_DDRSS_BCR 27 +#define GCC_SYSTEM_NOC_BCR 28 +#define GCC_PCNOC_BCR 29 +#define GCC_TCSR_BCR 30 +#define GCC_QDSS_BCR 31 +#define GCC_DCD_BCR 32 +#define GCC_MSG_RAM_BCR 33 +#define GCC_MPM_BCR 34 +#define GCC_SPMI_BCR 35 +#define GCC_SPDM_BCR 36 +#define GCC_RBCPR_BCR 37 +#define GCC_RBCPR_MX_BCR 38 +#define GCC_TLMM_BCR 39 +#define GCC_RBCPR_WCSS_BCR 40 +#define GCC_USB0_PHY_BCR 41 +#define GCC_USB3PHY_0_PHY_BCR 42 +#define GCC_USB0_BCR 43 +#define GCC_USB1_PHY_BCR 44 +#define GCC_USB3PHY_1_PHY_BCR 45 +#define GCC_USB1_BCR 46 +#define GCC_QUSB2_0_PHY_BCR 47 +#define GCC_QUSB2_1_PHY_BCR 48 +#define GCC_SDCC1_BCR 49 +#define GCC_SDCC2_BCR 50 +#define GCC_SNOC_BUS_TIMEOUT0_BCR 51 +#define GCC_SNOC_BUS_TIMEOUT2_BCR 52 +#define GCC_SNOC_BUS_TIMEOUT3_BCR 53 +#define GCC_PCNOC_BUS_TIMEOUT0_BCR 54 +#define GCC_PCNOC_BUS_TIMEOUT1_BCR 55 +#define GCC_PCNOC_BUS_TIMEOUT2_BCR 56 +#define GCC_PCNOC_BUS_TIMEOUT3_BCR 57 +#define GCC_PCNOC_BUS_TIMEOUT4_BCR 58 +#define GCC_PCNOC_BUS_TIMEOUT5_BCR 59 +#define GCC_PCNOC_BUS_TIMEOUT6_BCR 60 +#define GCC_PCNOC_BUS_TIMEOUT7_BCR 61 +#define GCC_PCNOC_BUS_TIMEOUT8_BCR 62 +#define GCC_PCNOC_BUS_TIMEOUT9_BCR 63 +#define GCC_UNIPHY0_BCR 64 +#define GCC_UNIPHY1_BCR 65 +#define GCC_UNIPHY2_BCR 66 +#define GCC_CMN_12GPLL_BCR 67 +#define GCC_QPIC_BCR 68 +#define GCC_MDIO_BCR 69 +#define GCC_PCIE1_TBU_BCR 70 +#define GCC_WCSS_CORE_TBU_BCR 71 +#define GCC_WCSS_Q6_TBU_BCR 72 +#define GCC_USB0_TBU_BCR 73 +#define GCC_USB1_TBU_BCR 74 +#define GCC_PCIE0_TBU_BCR 75 +#define GCC_NSS_NOC_TBU_BCR 76 +#define GCC_PCIE0_BCR 77 +#define GCC_PCIE0_PHY_BCR 78 +#define GCC_PCIE0PHY_PHY_BCR 79 +#define GCC_PCIE0_LINK_DOWN_BCR 80 +#define GCC_PCIE1_BCR 81 +#define GCC_PCIE1_PHY_BCR 82 +#define GCC_PCIE1PHY_PHY_BCR 83 +#define GCC_PCIE1_LINK_DOWN_BCR 84 +#define GCC_DCC_BCR 85 +#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR 86 +#define GCC_APC1_VOLTAGE_DROOP_DETECTOR_BCR 87 +#define GCC_SMMU_CATS_BCR 88 + +#endif diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h index bc256d31099a..7dd8bc0c3cd0 100644 --- a/include/dt-bindings/clock/r7s72100-clock.h +++ b/include/dt-bindings/clock/r7s72100-clock.h @@ -12,8 +12,18 @@ #define R7S72100_CLK_PLL 0 +/* MSTP2 */ +#define R7S72100_CLK_CORESIGHT 0 + /* MSTP3 */ +#define R7S72100_CLK_IEBUS 7 +#define R7S72100_CLK_IRDA 6 +#define R7S72100_CLK_LIN0 5 +#define R7S72100_CLK_LIN1 4 #define R7S72100_CLK_MTU2 3 +#define R7S72100_CLK_CAN 2 +#define R7S72100_CLK_ADCPWR 1 +#define R7S72100_CLK_PWM 0 /* MSTP4 */ #define R7S72100_CLK_SCIF0 7 @@ -26,23 +36,51 @@ #define R7S72100_CLK_SCIF7 0 /* MSTP5 */ +#define R7S72100_CLK_SCI0 7 +#define R7S72100_CLK_SCI1 6 +#define R7S72100_CLK_SG0 5 +#define R7S72100_CLK_SG1 4 +#define R7S72100_CLK_SG2 3 +#define R7S72100_CLK_SG3 2 #define R7S72100_CLK_OSTM0 1 #define R7S72100_CLK_OSTM1 0 /* MSTP6 */ +#define R7S72100_CLK_ADC 7 +#define R7S72100_CLK_CEU 6 +#define R7S72100_CLK_DOC0 5 +#define R7S72100_CLK_DOC1 4 +#define R7S72100_CLK_DRC0 3 +#define R7S72100_CLK_DRC1 2 +#define R7S72100_CLK_JCU 1 #define R7S72100_CLK_RTC 0 /* MSTP7 */ +#define R7S72100_CLK_VDEC0 7 +#define R7S72100_CLK_VDEC1 6 #define R7S72100_CLK_ETHER 4 +#define R7S72100_CLK_NAND 3 +#define R7S72100_CLK_USB0 1 +#define R7S72100_CLK_USB1 0 /* MSTP8 */ +#define R7S72100_CLK_IMR0 7 +#define R7S72100_CLK_IMR1 6 +#define R7S72100_CLK_IMRDISP 5 #define R7S72100_CLK_MMCIF 4 +#define R7S72100_CLK_MLB 3 +#define R7S72100_CLK_ETHAVB 2 +#define R7S72100_CLK_SCUX 1 /* MSTP9 */ #define R7S72100_CLK_I2C0 7 #define R7S72100_CLK_I2C1 6 #define R7S72100_CLK_I2C2 5 #define R7S72100_CLK_I2C3 4 +#define R7S72100_CLK_SPIBSC0 3 +#define R7S72100_CLK_SPIBSC1 2 +#define R7S72100_CLK_VDC50 1 /* and LVDS */ +#define R7S72100_CLK_VDC51 0 /* MSTP10 */ #define R7S72100_CLK_SPI0 7 @@ -50,6 +88,17 @@ #define R7S72100_CLK_SPI2 5 #define R7S72100_CLK_SPI3 4 #define R7S72100_CLK_SPI4 3 +#define R7S72100_CLK_CDROM 2 +#define R7S72100_CLK_SPDIF 1 +#define R7S72100_CLK_RGPVG2 0 + +/* MSTP11 */ +#define R7S72100_CLK_SSI0 5 +#define R7S72100_CLK_SSI1 4 +#define R7S72100_CLK_SSI2 3 +#define R7S72100_CLK_SSI3 2 +#define R7S72100_CLK_SSI4 1 +#define R7S72100_CLK_SSI5 0 /* MSTP12 */ #define R7S72100_CLK_SDHI00 3 @@ -57,4 +106,8 @@ #define R7S72100_CLK_SDHI10 1 #define R7S72100_CLK_SDHI11 0 +/* MSTP13 */ +#define R7S72100_CLK_PIX1 2 +#define R7S72100_CLK_PIX0 1 + #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */ diff --git a/include/dt-bindings/clock/r8a7790-cpg-mssr.h b/include/dt-bindings/clock/r8a7790-cpg-mssr.h new file mode 100644 index 000000000000..1625b8bf3482 --- /dev/null +++ b/include/dt-bindings/clock/r8a7790-cpg-mssr.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7790_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7790_CPG_MSSR_H__ + +#include + +/* r8a7790 CPG Core Clocks */ +#define R8A7790_CLK_Z 0 +#define R8A7790_CLK_Z2 1 +#define R8A7790_CLK_ZG 2 +#define R8A7790_CLK_ZTR 3 +#define R8A7790_CLK_ZTRD2 4 +#define R8A7790_CLK_ZT 5 +#define R8A7790_CLK_ZX 6 +#define R8A7790_CLK_ZS 7 +#define R8A7790_CLK_HP 8 +#define R8A7790_CLK_I 9 +#define R8A7790_CLK_B 10 +#define R8A7790_CLK_LB 11 +#define R8A7790_CLK_P 12 +#define R8A7790_CLK_CL 13 +#define R8A7790_CLK_M2 14 +#define R8A7790_CLK_ADSP 15 +#define R8A7790_CLK_IMP 16 +#define R8A7790_CLK_ZB3 17 +#define R8A7790_CLK_ZB3D2 18 +#define R8A7790_CLK_DDR 19 +#define R8A7790_CLK_SDH 20 +#define R8A7790_CLK_SD0 21 +#define R8A7790_CLK_SD1 22 +#define R8A7790_CLK_SD2 23 +#define R8A7790_CLK_SD3 24 +#define R8A7790_CLK_MMC0 25 +#define R8A7790_CLK_MMC1 26 +#define R8A7790_CLK_MP 27 +#define R8A7790_CLK_SSP 28 +#define R8A7790_CLK_SSPRS 29 +#define R8A7790_CLK_QSPI 30 +#define R8A7790_CLK_CP 31 +#define R8A7790_CLK_RCAN 32 +#define R8A7790_CLK_R 33 +#define R8A7790_CLK_OSC 34 + +#endif /* __DT_BINDINGS_CLOCK_R8A7790_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index adc50dc31ab3..ef692134146b 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -109,6 +109,7 @@ #define R8A7791_CLK_SATA0 15 /* MSTP9 */ +#define R8A7791_CLK_GYROADC 1 #define R8A7791_CLK_GPIO7 4 #define R8A7791_CLK_GPIO6 5 #define R8A7791_CLK_GPIO5 7 diff --git a/include/dt-bindings/clock/r8a7791-cpg-mssr.h b/include/dt-bindings/clock/r8a7791-cpg-mssr.h new file mode 100644 index 000000000000..e8823410c01c --- /dev/null +++ b/include/dt-bindings/clock/r8a7791-cpg-mssr.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ + +#include + +/* r8a7791 CPG Core Clocks */ +#define R8A7791_CLK_Z 0 +#define R8A7791_CLK_ZG 1 +#define R8A7791_CLK_ZTR 2 +#define R8A7791_CLK_ZTRD2 3 +#define R8A7791_CLK_ZT 4 +#define R8A7791_CLK_ZX 5 +#define R8A7791_CLK_ZS 6 +#define R8A7791_CLK_HP 7 +#define R8A7791_CLK_I 8 +#define R8A7791_CLK_B 9 +#define R8A7791_CLK_LB 10 +#define R8A7791_CLK_P 11 +#define R8A7791_CLK_CL 12 +#define R8A7791_CLK_M2 13 +#define R8A7791_CLK_ADSP 14 +#define R8A7791_CLK_ZB3 15 +#define R8A7791_CLK_ZB3D2 16 +#define R8A7791_CLK_DDR 17 +#define R8A7791_CLK_SDH 18 +#define R8A7791_CLK_SD0 19 +#define R8A7791_CLK_SD2 20 +#define R8A7791_CLK_SD3 21 +#define R8A7791_CLK_MMC0 22 +#define R8A7791_CLK_MP 23 +#define R8A7791_CLK_SSP 24 +#define R8A7791_CLK_SSPRS 25 +#define R8A7791_CLK_QSPI 26 +#define R8A7791_CLK_CP 27 +#define R8A7791_CLK_RCAN 28 +#define R8A7791_CLK_R 29 +#define R8A7791_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a7792-cpg-mssr.h b/include/dt-bindings/clock/r8a7792-cpg-mssr.h new file mode 100644 index 000000000000..72ce85cb2f94 --- /dev/null +++ b/include/dt-bindings/clock/r8a7792-cpg-mssr.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__ + +#include + +/* r8a7792 CPG Core Clocks */ +#define R8A7792_CLK_Z 0 +#define R8A7792_CLK_ZG 1 +#define R8A7792_CLK_ZTR 2 +#define R8A7792_CLK_ZTRD2 3 +#define R8A7792_CLK_ZT 4 +#define R8A7792_CLK_ZX 5 +#define R8A7792_CLK_ZS 6 +#define R8A7792_CLK_HP 7 +#define R8A7792_CLK_I 8 +#define R8A7792_CLK_B 9 +#define R8A7792_CLK_LB 10 +#define R8A7792_CLK_P 11 +#define R8A7792_CLK_CL 12 +#define R8A7792_CLK_M2 13 +#define R8A7792_CLK_IMP 14 +#define R8A7792_CLK_ZB3 15 +#define R8A7792_CLK_ZB3D2 16 +#define R8A7792_CLK_DDR 17 +#define R8A7792_CLK_SD 18 +#define R8A7792_CLK_MP 19 +#define R8A7792_CLK_QSPI 20 +#define R8A7792_CLK_CP 21 +#define R8A7792_CLK_CPEX 22 +#define R8A7792_CLK_RCAN 23 +#define R8A7792_CLK_R 24 +#define R8A7792_CLK_OSC 25 + +#endif /* __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a7793-cpg-mssr.h b/include/dt-bindings/clock/r8a7793-cpg-mssr.h new file mode 100644 index 000000000000..8809b0f62d61 --- /dev/null +++ b/include/dt-bindings/clock/r8a7793-cpg-mssr.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ + +#include + +/* r8a7793 CPG Core Clocks */ +#define R8A7793_CLK_Z 0 +#define R8A7793_CLK_ZG 1 +#define R8A7793_CLK_ZTR 2 +#define R8A7793_CLK_ZTRD2 3 +#define R8A7793_CLK_ZT 4 +#define R8A7793_CLK_ZX 5 +#define R8A7793_CLK_ZS 6 +#define R8A7793_CLK_HP 7 +#define R8A7793_CLK_I 8 +#define R8A7793_CLK_B 9 +#define R8A7793_CLK_LB 10 +#define R8A7793_CLK_P 11 +#define R8A7793_CLK_CL 12 +#define R8A7793_CLK_M2 13 +#define R8A7793_CLK_ADSP 14 +#define R8A7793_CLK_ZB3 15 +#define R8A7793_CLK_ZB3D2 16 +#define R8A7793_CLK_DDR 17 +#define R8A7793_CLK_SDH 18 +#define R8A7793_CLK_SD0 19 +#define R8A7793_CLK_SD2 20 +#define R8A7793_CLK_SD3 21 +#define R8A7793_CLK_MMC0 22 +#define R8A7793_CLK_MP 23 +#define R8A7793_CLK_SSP 24 +#define R8A7793_CLK_SSPRS 25 +#define R8A7793_CLK_QSPI 26 +#define R8A7793_CLK_CP 27 +#define R8A7793_CLK_RCAN 28 +#define R8A7793_CLK_R 29 +#define R8A7793_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a7794-cpg-mssr.h b/include/dt-bindings/clock/r8a7794-cpg-mssr.h new file mode 100644 index 000000000000..9d720311ae3a --- /dev/null +++ b/include/dt-bindings/clock/r8a7794-cpg-mssr.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ + +#include + +/* r8a7794 CPG Core Clocks */ +#define R8A7794_CLK_Z2 0 +#define R8A7794_CLK_ZG 1 +#define R8A7794_CLK_ZTR 2 +#define R8A7794_CLK_ZTRD2 3 +#define R8A7794_CLK_ZT 4 +#define R8A7794_CLK_ZX 5 +#define R8A7794_CLK_ZS 6 +#define R8A7794_CLK_HP 7 +#define R8A7794_CLK_I 8 +#define R8A7794_CLK_B 9 +#define R8A7794_CLK_LB 10 +#define R8A7794_CLK_P 11 +#define R8A7794_CLK_CL 12 +#define R8A7794_CLK_CP 13 +#define R8A7794_CLK_M2 14 +#define R8A7794_CLK_ADSP 15 +#define R8A7794_CLK_ZB3 16 +#define R8A7794_CLK_ZB3D2 17 +#define R8A7794_CLK_DDR 18 +#define R8A7794_CLK_SDH 19 +#define R8A7794_CLK_SD0 20 +#define R8A7794_CLK_SD2 21 +#define R8A7794_CLK_SD3 22 +#define R8A7794_CLK_MMC0 23 +#define R8A7794_CLK_MP 24 +#define R8A7794_CLK_QSPI 25 +#define R8A7794_CLK_CPEX 26 +#define R8A7794_CLK_RCAN 27 +#define R8A7794_CLK_R 28 +#define R8A7794_CLK_OSC 29 + +#endif /* __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h new file mode 100644 index 000000000000..92894f4306cf --- /dev/null +++ b/include/dt-bindings/clock/rk3128-cru.h @@ -0,0 +1,282 @@ +/* + * Copyright (c) 2017 Rockchip Electronics Co. Ltd. + * Author: Elaine + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H +#define _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H + +/* core clocks */ +#define PLL_APLL 1 +#define PLL_DPLL 2 +#define PLL_CPLL 3 +#define PLL_GPLL 4 +#define ARMCLK 5 +#define PLL_GPLL_DIV2 6 +#define PLL_GPLL_DIV3 7 + +/* sclk gates (special clocks) */ +#define SCLK_SPI0 65 +#define SCLK_NANDC 67 +#define SCLK_SDMMC 68 +#define SCLK_SDIO 69 +#define SCLK_EMMC 71 +#define SCLK_UART0 77 +#define SCLK_UART1 78 +#define SCLK_UART2 79 +#define SCLK_I2S0 80 +#define SCLK_I2S1 81 +#define SCLK_SPDIF 83 +#define SCLK_TIMER0 85 +#define SCLK_TIMER1 86 +#define SCLK_TIMER2 87 +#define SCLK_TIMER3 88 +#define SCLK_TIMER4 89 +#define SCLK_TIMER5 90 +#define SCLK_SARADC 91 +#define SCLK_I2S_OUT 113 +#define SCLK_SDMMC_DRV 114 +#define SCLK_SDIO_DRV 115 +#define SCLK_EMMC_DRV 117 +#define SCLK_SDMMC_SAMPLE 118 +#define SCLK_SDIO_SAMPLE 119 +#define SCLK_EMMC_SAMPLE 121 +#define SCLK_VOP 122 +#define SCLK_MAC_SRC 124 +#define SCLK_MAC 126 +#define SCLK_MAC_REFOUT 127 +#define SCLK_MAC_REF 128 +#define SCLK_MAC_RX 129 +#define SCLK_MAC_TX 130 +#define SCLK_HEVC_CORE 134 +#define SCLK_RGA 135 +#define SCLK_CRYPTO 138 +#define SCLK_TSP 139 +#define SCLK_OTGPHY0 142 +#define SCLK_OTGPHY1 143 +#define SCLK_DDRC 144 +#define SCLK_PVTM_FUNC 145 +#define SCLK_PVTM_CORE 146 +#define SCLK_PVTM_GPU 147 +#define SCLK_MIPI_24M 148 +#define SCLK_PVTM 149 +#define SCLK_CIF_SRC 150 +#define SCLK_CIF_OUT_SRC 151 +#define SCLK_CIF_OUT 152 +#define SCLK_SFC 153 +#define SCLK_USB480M 154 + +/* dclk gates */ +#define DCLK_VOP 190 +#define DCLK_EBC 191 + +/* aclk gates */ +#define ACLK_VIO0 192 +#define ACLK_VIO1 193 +#define ACLK_DMAC 194 +#define ACLK_CPU 195 +#define ACLK_VEPU 196 +#define ACLK_VDPU 197 +#define ACLK_CIF 198 +#define ACLK_IEP 199 +#define ACLK_LCDC0 204 +#define ACLK_RGA 205 +#define ACLK_PERI 210 +#define ACLK_VOP 211 +#define ACLK_GMAC 212 +#define ACLK_GPU 213 + +/* pclk gates */ +#define PCLK_SARADC 318 +#define PCLK_WDT 319 +#define PCLK_GPIO0 320 +#define PCLK_GPIO1 321 +#define PCLK_GPIO2 322 +#define PCLK_GPIO3 323 +#define PCLK_VIO_H2P 324 +#define PCLK_MIPI 325 +#define PCLK_EFUSE 326 +#define PCLK_HDMI 327 +#define PCLK_ACODEC 328 +#define PCLK_GRF 329 +#define PCLK_I2C0 332 +#define PCLK_I2C1 333 +#define PCLK_I2C2 334 +#define PCLK_I2C3 335 +#define PCLK_SPI0 338 +#define PCLK_UART0 341 +#define PCLK_UART1 342 +#define PCLK_UART2 343 +#define PCLK_TSADC 344 +#define PCLK_PWM 350 +#define PCLK_TIMER 353 +#define PCLK_CPU 354 +#define PCLK_PERI 363 +#define PCLK_GMAC 367 +#define PCLK_PMU_PRE 368 +#define PCLK_SIM_CARD 369 + +/* hclk gates */ +#define HCLK_SPDIF 440 +#define HCLK_GPS 441 +#define HCLK_USBHOST 442 +#define HCLK_I2S_8CH 443 +#define HCLK_I2S_2CH 444 +#define HCLK_VOP 452 +#define HCLK_NANDC 453 +#define HCLK_SDMMC 456 +#define HCLK_SDIO 457 +#define HCLK_EMMC 459 +#define HCLK_CPU 460 +#define HCLK_VEPU 461 +#define HCLK_VDPU 462 +#define HCLK_LCDC0 463 +#define HCLK_EBC 465 +#define HCLK_VIO 466 +#define HCLK_RGA 467 +#define HCLK_IEP 468 +#define HCLK_VIO_H2P 469 +#define HCLK_CIF 470 +#define HCLK_HOST2 473 +#define HCLK_OTG 474 +#define HCLK_TSP 475 +#define HCLK_CRYPTO 476 +#define HCLK_PERI 478 + +#define CLK_NR_CLKS (HCLK_PERI + 1) + +/* soft-reset indices */ +#define SRST_CORE0_PO 0 +#define SRST_CORE1_PO 1 +#define SRST_CORE2_PO 2 +#define SRST_CORE3_PO 3 +#define SRST_CORE0 4 +#define SRST_CORE1 5 +#define SRST_CORE2 6 +#define SRST_CORE3 7 +#define SRST_CORE0_DBG 8 +#define SRST_CORE1_DBG 9 +#define SRST_CORE2_DBG 10 +#define SRST_CORE3_DBG 11 +#define SRST_TOPDBG 12 +#define SRST_ACLK_CORE 13 +#define SRST_STRC_SYS_A 14 +#define SRST_L2C 15 + +#define SRST_CPUSYS_H 18 +#define SRST_AHB2APBSYS_H 19 +#define SRST_SPDIF 20 +#define SRST_INTMEM 21 +#define SRST_ROM 22 +#define SRST_PERI_NIU 23 +#define SRST_I2S_2CH 24 +#define SRST_I2S_8CH 25 +#define SRST_GPU_PVTM 26 +#define SRST_FUNC_PVTM 27 +#define SRST_CORE_PVTM 29 +#define SRST_EFUSE_P 30 +#define SRST_ACODEC_P 31 + +#define SRST_GPIO0 32 +#define SRST_GPIO1 33 +#define SRST_GPIO2 34 +#define SRST_GPIO3 35 +#define SRST_MIPIPHY_P 36 +#define SRST_UART0 39 +#define SRST_UART1 40 +#define SRST_UART2 41 +#define SRST_I2C0 43 +#define SRST_I2C1 44 +#define SRST_I2C2 45 +#define SRST_I2C3 46 +#define SRST_SFC 47 + +#define SRST_PWM 48 +#define SRST_DAP_PO 50 +#define SRST_DAP 51 +#define SRST_DAP_SYS 52 +#define SRST_CRYPTO 53 +#define SRST_GRF 55 +#define SRST_GMAC 56 +#define SRST_PERIPH_SYS_A 57 +#define SRST_PERIPH_SYS_H 58 +#define SRST_PERIPH_SYS_P 59 +#define SRST_SMART_CARD 60 +#define SRST_CPU_PERI 61 +#define SRST_EMEM_PERI 62 +#define SRST_USB_PERI 63 + +#define SRST_DMA 64 +#define SRST_GPS 67 +#define SRST_NANDC 68 +#define SRST_USBOTG0 69 +#define SRST_OTGC0 71 +#define SRST_USBOTG1 72 +#define SRST_OTGC1 74 +#define SRST_DDRMSCH 79 + +#define SRST_SDMMC 81 +#define SRST_SDIO 82 +#define SRST_EMMC 83 +#define SRST_SPI 84 +#define SRST_WDT 86 +#define SRST_SARADC 87 +#define SRST_DDRPHY 88 +#define SRST_DDRPHY_P 89 +#define SRST_DDRCTRL 90 +#define SRST_DDRCTRL_P 91 +#define SRST_TSP 92 +#define SRST_TSP_CLKIN 93 +#define SRST_HOST0_ECHI 94 + +#define SRST_HDMI_P 96 +#define SRST_VIO_ARBI_H 97 +#define SRST_VIO0_A 98 +#define SRST_VIO_BUS_H 99 +#define SRST_VOP_A 100 +#define SRST_VOP_H 101 +#define SRST_VOP_D 102 +#define SRST_UTMI0 103 +#define SRST_UTMI1 104 +#define SRST_USBPOR 105 +#define SRST_IEP_A 106 +#define SRST_IEP_H 107 +#define SRST_RGA_A 108 +#define SRST_RGA_H 109 +#define SRST_CIF0 110 +#define SRST_PMU 111 + +#define SRST_VCODEC_A 112 +#define SRST_VCODEC_H 113 +#define SRST_VIO1_A 114 +#define SRST_HEVC_CORE 115 +#define SRST_VCODEC_NIU_A 116 +#define SRST_PMU_NIU_P 117 +#define SRST_LCDC0_S 119 +#define SRST_GPU 120 +#define SRST_GPU_NIU_A 122 +#define SRST_EBC_A 123 +#define SRST_EBC_H 124 + +#define SRST_CORE_DBG 128 +#define SRST_DBG_P 129 +#define SRST_TIMER0 130 +#define SRST_TIMER1 131 +#define SRST_TIMER2 132 +#define SRST_TIMER3 133 +#define SRST_TIMER4 134 +#define SRST_TIMER5 135 +#define SRST_VIO_H2P 136 +#define SRST_VIO_MIPI_DSI 137 + +#endif diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h index b27e2b1a65e3..56f841c22801 100644 --- a/include/dt-bindings/clock/rk3228-cru.h +++ b/include/dt-bindings/clock/rk3228-cru.h @@ -61,6 +61,17 @@ #define SCLK_MAC_TX 130 #define SCLK_MAC_PHY 131 #define SCLK_MAC_OUT 132 +#define SCLK_VDEC_CABAC 133 +#define SCLK_VDEC_CORE 134 +#define SCLK_RGA 135 +#define SCLK_HDCP 136 +#define SCLK_HDMI_CEC 137 +#define SCLK_CRYPTO 138 +#define SCLK_TSP 139 +#define SCLK_HSADC 140 +#define SCLK_WIFI 141 +#define SCLK_OTGPHY0 142 +#define SCLK_OTGPHY1 143 /* dclk gates */ #define DCLK_VOP 190 @@ -68,15 +79,32 @@ /* aclk gates */ #define ACLK_DMAC 194 +#define ACLK_CPU 195 +#define ACLK_VPU_PRE 196 +#define ACLK_RKVDEC_PRE 197 +#define ACLK_RGA_PRE 198 +#define ACLK_IEP_PRE 199 +#define ACLK_HDCP_PRE 200 +#define ACLK_VOP_PRE 201 +#define ACLK_VPU 202 +#define ACLK_RKVDEC 203 +#define ACLK_IEP 204 +#define ACLK_RGA 205 +#define ACLK_HDCP 206 #define ACLK_PERI 210 #define ACLK_VOP 211 #define ACLK_GMAC 212 +#define ACLK_GPU 213 /* pclk gates */ #define PCLK_GPIO0 320 #define PCLK_GPIO1 321 #define PCLK_GPIO2 322 #define PCLK_GPIO3 323 +#define PCLK_VIO_H2P 324 +#define PCLK_HDCP 325 +#define PCLK_EFUSE_1024 326 +#define PCLK_EFUSE_256 327 #define PCLK_GRF 329 #define PCLK_I2C0 332 #define PCLK_I2C1 333 @@ -89,6 +117,7 @@ #define PCLK_TSADC 344 #define PCLK_PWM 350 #define PCLK_TIMER 353 +#define PCLK_CPU 354 #define PCLK_PERI 363 #define PCLK_HDMI_CTRL 364 #define PCLK_HDMI_PHY 365 @@ -104,6 +133,24 @@ #define HCLK_SDMMC 456 #define HCLK_SDIO 457 #define HCLK_EMMC 459 +#define HCLK_CPU 460 +#define HCLK_VPU_PRE 461 +#define HCLK_RKVDEC_PRE 462 +#define HCLK_VIO_PRE 463 +#define HCLK_VPU 464 +#define HCLK_RKVDEC 465 +#define HCLK_VIO 466 +#define HCLK_RGA 467 +#define HCLK_IEP 468 +#define HCLK_VIO_H2P 469 +#define HCLK_HDCP_MMU 470 +#define HCLK_HOST0 471 +#define HCLK_HOST1 472 +#define HCLK_HOST2 473 +#define HCLK_OTG 474 +#define HCLK_TSP 475 +#define HCLK_M_CRYPTO 476 +#define HCLK_S_CRYPTO 477 #define HCLK_PERI 478 #define CLK_NR_CLKS (HCLK_PERI + 1) diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 220a60f20d3b..22cb1dfa9004 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h @@ -132,6 +132,8 @@ #define SCLK_RMII_SRC 166 #define SCLK_PCIEPHY_REF100M 167 #define SCLK_DDRC 168 +#define SCLK_TESTCLKOUT1 169 +#define SCLK_TESTCLKOUT2 170 #define DCLK_VOP0 180 #define DCLK_VOP1 181 diff --git a/include/dt-bindings/clock/sun5i-ccu.h b/include/dt-bindings/clock/sun5i-ccu.h index aeb2e2f781fb..81f34d477aeb 100644 --- a/include/dt-bindings/clock/sun5i-ccu.h +++ b/include/dt-bindings/clock/sun5i-ccu.h @@ -19,6 +19,9 @@ #define CLK_HOSC 1 +#define CLK_PLL_VIDEO0_2X 9 + +#define CLK_PLL_VIDEO1_2X 16 #define CLK_CPU 17 #define CLK_AHB_OTG 23 diff --git a/include/dt-bindings/clock/sun8i-a83t-ccu.h b/include/dt-bindings/clock/sun8i-a83t-ccu.h new file mode 100644 index 000000000000..78af5085f630 --- /dev/null +++ b/include/dt-bindings/clock/sun8i-a83t-ccu.h @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2017 Chen-Yu Tsai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_ +#define _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_ + +#define CLK_PLL_PERIPH 6 + +#define CLK_PLL_DE 9 + +#define CLK_C0CPUX 11 +#define CLK_C1CPUX 12 + +#define CLK_BUS_MIPI_DSI 19 +#define CLK_BUS_SS 20 +#define CLK_BUS_DMA 21 +#define CLK_BUS_MMC0 22 +#define CLK_BUS_MMC1 23 +#define CLK_BUS_MMC2 24 +#define CLK_BUS_NAND 25 +#define CLK_BUS_DRAM 26 +#define CLK_BUS_EMAC 27 +#define CLK_BUS_HSTIMER 28 +#define CLK_BUS_SPI0 29 +#define CLK_BUS_SPI1 30 +#define CLK_BUS_OTG 31 +#define CLK_BUS_EHCI0 32 +#define CLK_BUS_EHCI1 33 +#define CLK_BUS_OHCI0 34 + +#define CLK_BUS_VE 35 +#define CLK_BUS_TCON0 36 +#define CLK_BUS_TCON1 37 +#define CLK_BUS_CSI 38 +#define CLK_BUS_HDMI 39 +#define CLK_BUS_DE 40 +#define CLK_BUS_GPU 41 +#define CLK_BUS_MSGBOX 42 +#define CLK_BUS_SPINLOCK 43 + +#define CLK_BUS_SPDIF 44 +#define CLK_BUS_PIO 45 +#define CLK_BUS_I2S0 46 +#define CLK_BUS_I2S1 47 +#define CLK_BUS_I2S2 48 +#define CLK_BUS_TDM 49 + +#define CLK_BUS_I2C0 50 +#define CLK_BUS_I2C1 51 +#define CLK_BUS_I2C2 52 +#define CLK_BUS_UART0 53 +#define CLK_BUS_UART1 54 +#define CLK_BUS_UART2 55 +#define CLK_BUS_UART3 56 +#define CLK_BUS_UART4 57 + +#define CLK_NAND 59 +#define CLK_MMC0 60 +#define CLK_MMC0_SAMPLE 61 +#define CLK_MMC0_OUTPUT 62 +#define CLK_MMC1 63 +#define CLK_MMC1_SAMPLE 64 +#define CLK_MMC1_OUTPUT 65 +#define CLK_MMC2 66 +#define CLK_MMC2_SAMPLE 67 +#define CLK_MMC2_OUTPUT 68 +#define CLK_SS 69 +#define CLK_SPI0 70 +#define CLK_SPI1 71 +#define CLK_I2S0 72 +#define CLK_I2S1 73 +#define CLK_I2S2 74 +#define CLK_TDM 75 +#define CLK_SPDIF 76 +#define CLK_USB_PHY0 77 +#define CLK_USB_PHY1 78 +#define CLK_USB_HSIC 79 +#define CLK_USB_HSIC_12M 80 +#define CLK_USB_OHCI0 81 + +#define CLK_DRAM_VE 83 +#define CLK_DRAM_CSI 84 + +#define CLK_TCON0 85 +#define CLK_TCON1 86 +#define CLK_CSI_MISC 87 +#define CLK_MIPI_CSI 88 +#define CLK_CSI_MCLK 89 +#define CLK_CSI_SCLK 90 +#define CLK_VE 91 +#define CLK_AVS 92 +#define CLK_HDMI 93 +#define CLK_HDMI_SLOW 94 + +#define CLK_MIPI_DSI0 96 +#define CLK_MIPI_DSI1 97 +#define CLK_GPU_CORE 98 +#define CLK_GPU_MEMORY 99 +#define CLK_GPU_HYD 100 + +#endif /* _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_ */ diff --git a/include/dt-bindings/clock/sun8i-de2.h b/include/dt-bindings/clock/sun8i-de2.h new file mode 100644 index 000000000000..3bed63b524aa --- /dev/null +++ b/include/dt-bindings/clock/sun8i-de2.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2016 Icenowy Zheng + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#ifndef _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ +#define _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ + +#define CLK_BUS_MIXER0 0 +#define CLK_BUS_MIXER1 1 +#define CLK_BUS_WB 2 + +#define CLK_MIXER0 6 +#define CLK_MIXER1 7 +#define CLK_WB 8 + +#endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */ diff --git a/include/dt-bindings/clock/zx296718-clock.h b/include/dt-bindings/clock/zx296718-clock.h index 822d52385080..092c9751a697 100644 --- a/include/dt-bindings/clock/zx296718-clock.h +++ b/include/dt-bindings/clock/zx296718-clock.h @@ -157,7 +157,11 @@ #define AUDIO_TDM_WCLK 17 #define AUDIO_TDM_PCLK 18 #define AUDIO_TS_PCLK 19 +#define I2S0_WCLK_MUX 20 +#define I2S1_WCLK_MUX 21 +#define I2S2_WCLK_MUX 22 +#define I2S3_WCLK_MUX 23 -#define AUDIO_NR_CLKS 20 +#define AUDIO_NR_CLKS 24 #endif diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h index b4f54da694eb..c5074584561d 100644 --- a/include/dt-bindings/gpio/gpio.h +++ b/include/dt-bindings/gpio/gpio.h @@ -28,4 +28,8 @@ #define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN) #define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE) +/* Bit 3 express GPIO suspend/resume persistence */ +#define GPIO_SLEEP_MAINTAIN_VALUE 0 +#define GPIO_SLEEP_MAY_LOOSE_VALUE 8 + #endif diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h index f5a8d96e1e09..179891074b3c 100644 --- a/include/dt-bindings/input/linux-event-codes.h +++ b/include/dt-bindings/input/linux-event-codes.h @@ -600,6 +600,7 @@ #define KEY_APPSELECT 0x244 /* AL Select Task/Application */ #define KEY_SCREENSAVER 0x245 /* AL Screen Saver */ #define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */ +#define KEY_ASSISTANT 0x247 /* AL Context-aware desktop assistant */ #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */ #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */ diff --git a/include/dt-bindings/interrupt-controller/mvebu-icu.h b/include/dt-bindings/interrupt-controller/mvebu-icu.h new file mode 100644 index 000000000000..8249558545c7 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/mvebu-icu.h @@ -0,0 +1,15 @@ +/* + * This header provides constants for the MVEBU ICU driver. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MVEBU_ICU_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MVEBU_ICU_H + +/* interrupt specifier cell 0 */ + +#define ICU_GRP_NSR 0x0 +#define ICU_GRP_SR 0x1 +#define ICU_GRP_SEI 0x4 +#define ICU_GRP_REI 0x5 + +#endif diff --git a/include/dt-bindings/mux/mux.h b/include/dt-bindings/mux/mux.h new file mode 100644 index 000000000000..c8e855c4a609 --- /dev/null +++ b/include/dt-bindings/mux/mux.h @@ -0,0 +1,16 @@ +/* + * This header provides constants for most Multiplexer bindings. + * + * Most Multiplexer bindings specify an idle state. In most cases, the + * the multiplexer can be left as is when idle, and in some cases it can + * disconnect the input/output and leave the multiplexer in a high + * impedance state. + */ + +#ifndef _DT_BINDINGS_MUX_MUX_H +#define _DT_BINDINGS_MUX_MUX_H + +#define MUX_IDLE_AS_IS (-1) +#define MUX_IDLE_DISCONNECT (-2) + +#endif diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-stingray.h b/include/dt-bindings/pinctrl/brcm,pinctrl-stingray.h new file mode 100644 index 000000000000..caa6c664b4f6 --- /dev/null +++ b/include/dt-bindings/pinctrl/brcm,pinctrl-stingray.h @@ -0,0 +1,68 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ +#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ + +/* Alternate functions available in MUX controller */ +#define MODE_NITRO 0 +#define MODE_NAND 1 +#define MODE_PNOR 2 +#define MODE_GPIO 3 + +/* Pad configuration attribute */ +#define PAD_SLEW_RATE_ENA (1 << 0) +#define PAD_SLEW_RATE_ENA_MASK (1 << 0) + +#define PAD_DRIVE_STRENGTH_2_MA (0 << 1) +#define PAD_DRIVE_STRENGTH_4_MA (1 << 1) +#define PAD_DRIVE_STRENGTH_6_MA (2 << 1) +#define PAD_DRIVE_STRENGTH_8_MA (3 << 1) +#define PAD_DRIVE_STRENGTH_10_MA (4 << 1) +#define PAD_DRIVE_STRENGTH_12_MA (5 << 1) +#define PAD_DRIVE_STRENGTH_14_MA (6 << 1) +#define PAD_DRIVE_STRENGTH_16_MA (7 << 1) +#define PAD_DRIVE_STRENGTH_MASK (7 << 1) + +#define PAD_PULL_UP_ENA (1 << 4) +#define PAD_PULL_UP_ENA_MASK (1 << 4) + +#define PAD_PULL_DOWN_ENA (1 << 5) +#define PAD_PULL_DOWN_ENA_MASK (1 << 5) + +#define PAD_INPUT_PATH_DIS (1 << 6) +#define PAD_INPUT_PATH_DIS_MASK (1 << 6) + +#define PAD_HYSTERESIS_ENA (1 << 7) +#define PAD_HYSTERESIS_ENA_MASK (1 << 7) + +#endif diff --git a/include/dt-bindings/pinctrl/r7s72100-pinctrl.h b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h new file mode 100644 index 000000000000..6b609fe10910 --- /dev/null +++ b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h @@ -0,0 +1,16 @@ +/* + * Defines macros and constants for Renesas RZ/A1 pin controller pin + * muxing functions. + */ +#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H +#define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H + +#define RZA1_PINS_PER_PORT 16 + +/* + * Create the pin index from its bank and position numbers and store in + * the upper 16 bits the alternate function identifier + */ +#define RZA1_PINMUX(b, p, f) ((b) * RZA1_PINS_PER_PORT + (p) | (f << 16)) + +#endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */ diff --git a/include/dt-bindings/power/mt6797-power.h b/include/dt-bindings/power/mt6797-power.h new file mode 100644 index 000000000000..a60c1d81cf75 --- /dev/null +++ b/include/dt-bindings/power/mt6797-power.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2017 MediaTek Inc. + * Author: Mars.C + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_POWER_MT6797_POWER_H +#define _DT_BINDINGS_POWER_MT6797_POWER_H + +#define MT6797_POWER_DOMAIN_VDEC 0 +#define MT6797_POWER_DOMAIN_VENC 1 +#define MT6797_POWER_DOMAIN_ISP 2 +#define MT6797_POWER_DOMAIN_MM 3 +#define MT6797_POWER_DOMAIN_AUDIO 4 +#define MT6797_POWER_DOMAIN_MFG_ASYNC 5 +#define MT6797_POWER_DOMAIN_MFG 6 +#define MT6797_POWER_DOMAIN_MFG_CORE0 7 +#define MT6797_POWER_DOMAIN_MFG_CORE1 8 +#define MT6797_POWER_DOMAIN_MFG_CORE2 9 +#define MT6797_POWER_DOMAIN_MFG_CORE3 10 +#define MT6797_POWER_DOMAIN_MJC 11 + +#endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */ diff --git a/include/dt-bindings/power/owl-s500-powergate.h b/include/dt-bindings/power/owl-s500-powergate.h new file mode 100644 index 000000000000..0a1c451865ea --- /dev/null +++ b/include/dt-bindings/power/owl-s500-powergate.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ +#ifndef DT_BINDINGS_POWER_OWL_S500_POWERGATE_H +#define DT_BINDINGS_POWER_OWL_S500_POWERGATE_H + +#define S500_PD_VDE 0 +#define S500_PD_VCE_SI 1 +#define S500_PD_USB2_1 2 +#define S500_PD_CPU2 3 +#define S500_PD_CPU3 4 +#define S500_PD_DMA 5 +#define S500_PD_DS 6 +#define S500_PD_USB3 7 +#define S500_PD_USB2_0 8 + +#endif diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h new file mode 100644 index 000000000000..7978c21e4fad --- /dev/null +++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2016 Intel Corporation. All rights reserved + * Copyright (C) 2016 Altera Corporation. All rights reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + * + * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h" + */ + +#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H +#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H + +/* MPUMODRST */ +#define CPU0_RESET 0 +#define CPU1_RESET 1 +#define CPU2_RESET 2 +#define CPU3_RESET 3 + +/* PER0MODRST */ +#define EMAC0_RESET 32 +#define EMAC1_RESET 33 +#define EMAC2_RESET 34 +#define USB0_RESET 35 +#define USB1_RESET 36 +#define NAND_RESET 37 +/* 38 is empty */ +#define SDMMC_RESET 39 +#define EMAC0_OCP_RESET 40 +#define EMAC1_OCP_RESET 41 +#define EMAC2_OCP_RESET 42 +#define USB0_OCP_RESET 43 +#define USB1_OCP_RESET 44 +#define NAND_OCP_RESET 45 +/* 46 is empty */ +#define SDMMC_OCP_RESET 47 +#define DMA_RESET 48 +#define SPIM0_RESET 49 +#define SPIM1_RESET 50 +#define SPIS0_RESET 51 +#define SPIS1_RESET 52 +#define DMA_OCP_RESET 53 +#define EMAC_PTP_RESET 54 +/* 55 is empty*/ +#define DMAIF0_RESET 56 +#define DMAIF1_RESET 57 +#define DMAIF2_RESET 58 +#define DMAIF3_RESET 59 +#define DMAIF4_RESET 60 +#define DMAIF5_RESET 61 +#define DMAIF6_RESET 62 +#define DMAIF7_RESET 63 + +/* PER1MODRST */ +#define WATCHDOG0_RESET 64 +#define WATCHDOG1_RESET 65 +#define WATCHDOG2_RESET 66 +#define WATCHDOG3_RESET 67 +#define L4SYSTIMER0_RESET 68 +#define L4SYSTIMER1_RESET 69 +#define SPTIMER0_RESET 70 +#define SPTIMER1_RESET 71 +#define I2C0_RESET 72 +#define I2C1_RESET 73 +#define I2C2_RESET 74 +#define I2C3_RESET 75 +#define I2C4_RESET 76 +/* 77-79 is empty */ +#define UART0_RESET 80 +#define UART1_RESET 81 +/* 82-87 is empty */ +#define GPIO0_RESET 88 +#define GPIO1_RESET 89 + +/* BRGMODRST */ +#define SOC2FPGA_RESET 96 +#define LWHPS2FPGA_RESET 97 +#define FPGA2SOC_RESET 98 +#define F2SSDRAM0_RESET 99 +#define F2SSDRAM1_RESET 100 +#define F2SSDRAM2_RESET 101 +#define DDRSCH_RESET 102 + +/* COLDMODRST */ +#define CPUPO0_RESET 160 +#define CPUPO1_RESET 161 +#define CPUPO2_RESET 162 +#define CPUPO3_RESET 163 +/* 164-167 is empty */ +#define L2_RESET 168 + +/* DBGMODRST */ +#define DBG_RESET 224 +#define CSDAP_RESET 225 + +/* TAPMODRST */ +#define TAP_RESET 256 + +#endif diff --git a/include/dt-bindings/reset/cortina,gemini-reset.h b/include/dt-bindings/reset/cortina,gemini-reset.h new file mode 100644 index 000000000000..0b886aee65e3 --- /dev/null +++ b/include/dt-bindings/reset/cortina,gemini-reset.h @@ -0,0 +1,36 @@ +#ifndef _DT_BINDINGS_RESET_CORTINA_GEMINI_H +#define _DT_BINDINGS_RESET_CORTINA_GEMINI_H + +#define GEMINI_RESET_DRAM 0 +#define GEMINI_RESET_FLASH 1 +#define GEMINI_RESET_IDE 2 +#define GEMINI_RESET_RAID 3 +#define GEMINI_RESET_SECURITY 4 +#define GEMINI_RESET_GMAC0 5 +#define GEMINI_RESET_GMAC1 6 +#define GEMINI_RESET_PCI 7 +#define GEMINI_RESET_USB0 8 +#define GEMINI_RESET_USB1 9 +#define GEMINI_RESET_DMAC 10 +#define GEMINI_RESET_APB 11 +#define GEMINI_RESET_LPC 12 +#define GEMINI_RESET_LCD 13 +#define GEMINI_RESET_INTCON0 14 +#define GEMINI_RESET_INTCON1 15 +#define GEMINI_RESET_RTC 16 +#define GEMINI_RESET_TIMER 17 +#define GEMINI_RESET_UART 18 +#define GEMINI_RESET_SSP 19 +#define GEMINI_RESET_GPIO0 20 +#define GEMINI_RESET_GPIO1 21 +#define GEMINI_RESET_GPIO2 22 +#define GEMINI_RESET_WDOG 23 +#define GEMINI_RESET_EXTERN 24 +#define GEMINI_RESET_CIR 25 +#define GEMINI_RESET_SATA0 26 +#define GEMINI_RESET_SATA1 27 +#define GEMINI_RESET_TVC 28 +#define GEMINI_RESET_CPU1 30 +#define GEMINI_RESET_GLOBAL 31 + +#endif diff --git a/include/dt-bindings/reset/sun8i-a83t-ccu.h b/include/dt-bindings/reset/sun8i-a83t-ccu.h new file mode 100644 index 000000000000..784f6e11664e --- /dev/null +++ b/include/dt-bindings/reset/sun8i-a83t-ccu.h @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2017 Chen-Yu Tsai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ +#define _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ + +#define RST_USB_PHY0 0 +#define RST_USB_PHY1 1 +#define RST_USB_HSIC 2 + +#define RST_DRAM 3 +#define RST_MBUS 4 + +#define RST_BUS_MIPI_DSI 5 +#define RST_BUS_SS 6 +#define RST_BUS_DMA 7 +#define RST_BUS_MMC0 8 +#define RST_BUS_MMC1 9 +#define RST_BUS_MMC2 10 +#define RST_BUS_NAND 11 +#define RST_BUS_DRAM 12 +#define RST_BUS_EMAC 13 +#define RST_BUS_HSTIMER 14 +#define RST_BUS_SPI0 15 +#define RST_BUS_SPI1 16 +#define RST_BUS_OTG 17 +#define RST_BUS_EHCI0 18 +#define RST_BUS_EHCI1 19 +#define RST_BUS_OHCI0 20 + +#define RST_BUS_VE 21 +#define RST_BUS_TCON0 22 +#define RST_BUS_TCON1 23 +#define RST_BUS_CSI 24 +#define RST_BUS_HDMI0 25 +#define RST_BUS_HDMI1 26 +#define RST_BUS_DE 27 +#define RST_BUS_GPU 28 +#define RST_BUS_MSGBOX 29 +#define RST_BUS_SPINLOCK 30 + +#define RST_BUS_LVDS 31 + +#define RST_BUS_SPDIF 32 +#define RST_BUS_I2S0 33 +#define RST_BUS_I2S1 34 +#define RST_BUS_I2S2 35 +#define RST_BUS_TDM 36 + +#define RST_BUS_I2C0 37 +#define RST_BUS_I2C1 38 +#define RST_BUS_I2C2 39 +#define RST_BUS_UART0 40 +#define RST_BUS_UART1 41 +#define RST_BUS_UART2 42 +#define RST_BUS_UART3 43 +#define RST_BUS_UART4 44 + +#endif /* _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h new file mode 100644 index 000000000000..9526017432f0 --- /dev/null +++ b/include/dt-bindings/reset/sun8i-de2.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2016 Icenowy Zheng + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#ifndef _DT_BINDINGS_RESET_SUN8I_DE2_H_ +#define _DT_BINDINGS_RESET_SUN8I_DE2_H_ + +#define RST_MIXER0 0 +#define RST_MIXER1 1 +#define RST_WB 2 + +#endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ diff --git a/src/arc/axc001.dtsi b/src/arc/axc001.dtsi index 53ce226f77a5..a380ffa1a458 100644 --- a/src/arc/axc001.dtsi +++ b/src/arc/axc001.dtsi @@ -15,15 +15,15 @@ / { compatible = "snps,arc"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; cpu_card { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00000000 0xf0000000 0x10000000>; + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; core_clk: core_clk { #clock-cells = <0>; @@ -91,23 +91,21 @@ mb_intc: dw-apb-ictl@0xe0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; - reg = < 0xe0012000 0x200 >; + reg = < 0x0 0xe0012000 0x0 0x200 >; interrupt-controller; interrupt-parent = <&core_intc>; interrupts = < 7 >; }; memory { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x80000000 0x20000000>; device_type = "memory"; - reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */ }; reserved-memory { - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; ranges; /* * We just move frame buffer area to the very end of @@ -118,7 +116,7 @@ */ frame_buffer: frame_buffer@9e000000 { compatible = "shared-dma-pool"; - reg = <0x9e000000 0x2000000>; + reg = <0x0 0x9e000000 0x0 0x2000000>; no-map; }; }; diff --git a/src/arc/axc003.dtsi b/src/arc/axc003.dtsi index 14df46f141bf..cc9239ef8d08 100644 --- a/src/arc/axc003.dtsi +++ b/src/arc/axc003.dtsi @@ -14,15 +14,15 @@ / { compatible = "snps,arc"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; cpu_card { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00000000 0xf0000000 0x10000000>; + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; core_clk: core_clk { #clock-cells = <0>; @@ -94,30 +94,29 @@ mb_intc: dw-apb-ictl@0xe0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; - reg = < 0xe0012000 0x200 >; + reg = < 0x0 0xe0012000 0x0 0x200 >; interrupt-controller; interrupt-parent = <&core_intc>; interrupts = < 24 >; }; memory { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512MiB */ + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */ + 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */ }; reserved-memory { - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; ranges; /* * Move frame buffer out of IOC aperture (0x8z-0xAz). */ frame_buffer: frame_buffer@be000000 { compatible = "shared-dma-pool"; - reg = <0xbe000000 0x2000000>; + reg = <0x0 0xbe000000 0x0 0x2000000>; no-map; }; }; diff --git a/src/arc/axc003_idu.dtsi b/src/arc/axc003_idu.dtsi index 695f9fa1996b..4ebb2170abec 100644 --- a/src/arc/axc003_idu.dtsi +++ b/src/arc/axc003_idu.dtsi @@ -14,15 +14,15 @@ / { compatible = "snps,arc"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; cpu_card { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00000000 0xf0000000 0x10000000>; + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; core_clk: core_clk { #clock-cells = <0>; @@ -100,30 +100,29 @@ mb_intc: dw-apb-ictl@0xe0012000 { #interrupt-cells = <1>; compatible = "snps,dw-apb-ictl"; - reg = < 0xe0012000 0x200 >; + reg = < 0x0 0xe0012000 0x0 0x200 >; interrupt-controller; interrupt-parent = <&idu_intc>; interrupts = <0>; }; memory { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512MiB */ + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */ + 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */ }; reserved-memory { - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; ranges; /* * Move frame buffer out of IOC aperture (0x8z-0xAz). */ frame_buffer: frame_buffer@be000000 { compatible = "shared-dma-pool"; - reg = <0xbe000000 0x2000000>; + reg = <0x0 0xbe000000 0x0 0x2000000>; no-map; }; }; diff --git a/src/arc/axs10x_mb.dtsi b/src/arc/axs10x_mb.dtsi index 41cfb29b62c1..0ff7e07edcd4 100644 --- a/src/arc/axs10x_mb.dtsi +++ b/src/arc/axs10x_mb.dtsi @@ -13,7 +13,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00000000 0xe0000000 0x10000000>; + ranges = <0x00000000 0x0 0xe0000000 0x10000000>; interrupt-parent = <&mb_intc>; i2sclk: i2sclk@100a0 { diff --git a/src/arm/aks-cdu.dts b/src/arm/aks-cdu.dts index 5b1bf92d927c..888bfcd4a402 100644 --- a/src/arm/aks-cdu.dts +++ b/src/arm/aks-cdu.dts @@ -62,32 +62,36 @@ status = "okay"; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; - status = "okay"; + ebi: ebi@10000000 { + nand_controller: nand-controller { + nand: nand@3 { + partitions { + bootstrap@0 { + label = "bootstrap"; + reg = <0x0 0x40000>; + }; - bootstrap@0 { - label = "bootstrap"; - reg = <0x0 0x40000>; - }; + uboot@40000 { + label = "uboot"; + reg = <0x40000 0x80000>; + }; - uboot@40000 { - label = "uboot"; - reg = <0x40000 0x80000>; - }; - ubootenv@c0000 { - label = "ubootenv"; - reg = <0xc0000 0x40000>; - }; - kernel@100000 { - label = "kernel"; - reg = <0x100000 0x400000>; - }; - rootfs@500000 { - label = "rootfs"; - reg = <0x500000 0x7b00000>; + ubootenv@c0000 { + label = "ubootenv"; + reg = <0xc0000 0x40000>; + }; + + kernel@100000 { + label = "kernel"; + reg = <0x100000 0x400000>; + }; + + rootfs@500000 { + label = "rootfs"; + reg = <0x500000 0x7b00000>; + }; + }; + }; }; }; }; diff --git a/src/arm/am335x-baltos.dtsi b/src/arm/am335x-baltos.dtsi index d42b98f15e8b..ec6052c521ef 100644 --- a/src/arm/am335x-baltos.dtsi +++ b/src/arm/am335x-baltos.dtsi @@ -255,7 +255,7 @@ }; at24@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; pagesize = <8>; reg = <0x50>; }; diff --git a/src/arm/am335x-base0033.dts b/src/arm/am335x-base0033.dts index c2bee452dab8..29782be07605 100644 --- a/src/arm/am335x-base0033.dts +++ b/src/arm/am335x-base0033.dts @@ -89,7 +89,7 @@ &i2c0 { eeprom: eeprom@50 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; }; diff --git a/src/arm/am335x-bone-common.dtsi b/src/arm/am335x-bone-common.dtsi index bf6b26abe35b..1d154444dfef 100644 --- a/src/arm/am335x-bone-common.dtsi +++ b/src/arm/am335x-bone-common.dtsi @@ -232,7 +232,7 @@ }; baseboard_eeprom: baseboard_eeprom@50 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; #address-cells = <1>; @@ -251,7 +251,7 @@ clock-frequency = <100000>; cape_eeprom0: cape_eeprom0@54 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x54>; #address-cells = <1>; #size-cells = <1>; @@ -261,7 +261,7 @@ }; cape_eeprom1: cape_eeprom1@55 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x55>; #address-cells = <1>; #size-cells = <1>; @@ -271,7 +271,7 @@ }; cape_eeprom2: cape_eeprom2@56 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x56>; #address-cells = <1>; #size-cells = <1>; @@ -281,7 +281,7 @@ }; cape_eeprom3: cape_eeprom3@57 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x57>; #address-cells = <1>; #size-cells = <1>; diff --git a/src/arm/am335x-boneblack-wireless.dts b/src/arm/am335x-boneblack-wireless.dts index 105bd10655f7..83f49f616b19 100644 --- a/src/arm/am335x-boneblack-wireless.dts +++ b/src/arm/am335x-boneblack-wireless.dts @@ -97,6 +97,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins &bt_pins>; status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + }; }; &gpio3 { diff --git a/src/arm/am335x-boneblack.dts b/src/arm/am335x-boneblack.dts index 935ed17d22e4..d154d3133c16 100644 --- a/src/arm/am335x-boneblack.dts +++ b/src/arm/am335x-boneblack.dts @@ -22,7 +22,7 @@ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed * to support 1GHz OPP so enable it for PG 2.0 on this board. */ - oppnitro@1000000000 { + oppnitro-1000000000 { opp-supported-hw = <0x06 0x0100>; }; }; diff --git a/src/arm/am335x-boneblue.dts b/src/arm/am335x-boneblue.dts new file mode 100644 index 000000000000..cdc1b2be792f --- /dev/null +++ b/src/arm/am335x-boneblue.dts @@ -0,0 +1,460 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include + +/ { + model = "TI AM335x BeagleBone Blue"; + compatible = "ti,am335x-bone-blue", "ti,am33xx"; + + cpus { + cpu@0 { + cpu0-supply = <&dcdc2_reg>; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + chosen { + stdout-path = &uart0; + }; + + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + + compatible = "gpio-leds"; + + usr_0_led { + label = "beaglebone:green:usr0"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + usr_1_led { + label = "beaglebone:green:usr1"; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + usr_2_led { + label = "beaglebone:green:usr2"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "cpu0"; + default-state = "off"; + }; + + usr_3_led { + label = "beaglebone:green:usr3"; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + wifi_led { + label = "wifi"; + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "phy0assoc"; + }; + + red_led { + label = "red"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + green_led { + label = "green"; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_1_led { + label = "bat25"; + gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_2_led { + label = "bat50"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_3_led { + label = "bat75"; + gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_4_led { + label = "bat100"; + gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + vmmcsd_fixed: fixedregulator0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us= <70000>; + + /* WL_EN */ + gpio = <&gpio3 9 0>; + enable-active-high; + }; +}; + +&am33xx_pinmux { + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */ + AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */ + AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */ + AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */ + AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */ + AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */ + AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */ + AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */ + AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */ + AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */ + AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */ + + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */ + AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */ + AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */ + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */ + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ + >; + }; + + mmc2_pins: pinmux_mmc2_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */ + AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */ + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */ + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */ + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */ + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */ + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */ + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */ + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */ + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */ + >; + }; + + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE6) /* (L15) gmii1_rxd1.mmc2_clk */ + AM33XX_IOPAD(0x914, PIN_INPUT_PULLUP | MUX_MODE6) /* (J16) gmii1_txen.mmc2_cmd */ + AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE5) /* (J17) gmii1_rxdv.mmc2_dat0 */ + AM33XX_IOPAD(0x91c, PIN_INPUT_PULLUP | MUX_MODE5) /* (J18) gmii1_txd3.mmc2_dat1 */ + AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE5) /* (K15) gmii1_txd2.mmc2_dat2 */ + AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE5) /* (H16) gmii1_col.mmc2_dat3 */ + >; + }; + + bt_pins: pinmux_bt_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] - BT_EN */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */ + AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */ + AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3) /* (M17) mdio_data.uart3_ctsn */ + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (M18) mdio_clk.uart3_rtsn */ + >; + }; + + wl18xx_pins: pinmux_wl18xx_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */ + AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (H18) rmii1_refclk.gpio0[29] - WL_IRQ */ + AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */ + >; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb_ctrl_mod { + status = "okay"; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "peripheral"; + interrupts-extended = <&intc 18 &tps 0>; + interrupt-names = "mc", "vbus"; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; +}; + +&cppi41dma { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@24 { + reg = <0x24>; + }; + + baseboard_eeprom: baseboard_eeprom@50 { + compatible = "at,24c256"; + reg = <0x50>; + + #address-cells = <1>; + #size-cells = <1>; + baseboard_data: baseboard_data@0 { + reg = <0 0x100>; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + status = "okay"; + clock-frequency = <400000>; + + mpu9250@68 { + compatible = "invensense,mpu9250"; + reg = <0x68>; + interrupt-parent = <&gpio3>; + interrupts = <21 GPIO_ACTIVE_LOW>; + i2c-gate { + #address-cells = <1>; + #size-cells = <0>; + ax8975@c { + compatible = "ak,ak8975"; + reg = <0x0c>; + }; + }; + }; + + pressure@76 { + compatible = "bosch,bmp280"; + reg = <0x76>; + }; +}; + +/include/ "tps65217.dtsi" + +&tps { + interrupts = <7>; /* NMI */ + interrupt-parent = <&intc>; + + charger { + interrupts = <0>, <1>; + interrupt-names = "USB", "AC"; + status = "okay"; + }; + + pwrbutton { + interrupts = <2>; + status = "okay"; + }; + + regulators { + dcdc1_reg: regulator@0 { + regulator-name = "vdds_dpr"; + regulator-always-on; + }; + + dcdc2_reg: regulator@1 { + /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1351500>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc3_reg: regulator@2 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: regulator@3 { + regulator-name = "vio,vrtc,vdds"; + regulator-always-on; + }; + + ldo2_reg: regulator@4 { + regulator-name = "vdd_3v3aux"; + regulator-always-on; + }; + + ldo3_reg: regulator@5 { + regulator-name = "vdd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: regulator@6 { + regulator-name = "vdd_3v3a"; + regulator-always-on; + }; + }; +}; + +&mmc1 { + status = "okay"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; +}; + +&mmc2 { + status = "okay"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; +}; + +&mmc3 { + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + ti,needs-special-hs-handling; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins &wl18xx_pins>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio0>; + interrupts = <29 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&tscadc { + status = "okay"; + adc { + ti,adc-channels = <0 1 2 3 4 5 6 7>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins &bt_pins>; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + }; +}; + +&aes { + status = "okay"; +}; + +&sham { + status = "okay"; +}; + +&rtc { + system-power-controller; + clocks = <&clk_32768_ck>, <&clkdiv32k_ick>; + clock-names = "ext-clk", "int-clk"; +}; + +&gpio3 { + ls_buf_en { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LS_BUF_EN"; + }; +}; diff --git a/src/arm/am335x-bonegreen-wireless.dts b/src/arm/am335x-bonegreen-wireless.dts index 9d1a0fd555f3..57731f0daf10 100644 --- a/src/arm/am335x-bonegreen-wireless.dts +++ b/src/arm/am335x-bonegreen-wireless.dts @@ -97,6 +97,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins &bt_pins>; status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + }; }; &gpio1 { diff --git a/src/arm/am335x-nano.dts b/src/arm/am335x-nano.dts index 807494bc722b..946d7069f417 100644 --- a/src/arm/am335x-nano.dts +++ b/src/arm/am335x-nano.dts @@ -224,7 +224,7 @@ }; eeprom@53 { - compatible = "microchip,24c02"; + compatible = "microchip,24c02", "atmel,24c02"; reg = <0x53>; pagesize = <8>; }; diff --git a/src/arm/am335x-pepper.dts b/src/arm/am335x-pepper.dts index 30e2f8770aaf..03c7d77023c6 100644 --- a/src/arm/am335x-pepper.dts +++ b/src/arm/am335x-pepper.dts @@ -67,7 +67,7 @@ }; eeprom: eeprom@50 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/arm/am335x-phycore-som.dtsi b/src/arm/am335x-phycore-som.dtsi index 14533ff6d0ad..428a25e952b0 100644 --- a/src/arm/am335x-phycore-som.dtsi +++ b/src/arm/am335x-phycore-som.dtsi @@ -138,7 +138,7 @@ }; i2c_rtc: rtc@68 { - compatible = "rv4162"; + compatible = "microcrystal,rv4162"; reg = <0x68>; status = "disabled"; }; diff --git a/src/arm/am335x-shc.dts b/src/arm/am335x-shc.dts index bf8727a19ece..4f6a286ea293 100644 --- a/src/arm/am335x-shc.dts +++ b/src/arm/am335x-shc.dts @@ -188,7 +188,7 @@ }; at24@50 { - compatible = "at24,24c32"; + compatible = "atmel,24c32"; pagesize = <32>; reg = <0x50>; }; diff --git a/src/arm/am335x-sl50.dts b/src/arm/am335x-sl50.dts index fc864a855991..1bcc60424ecd 100644 --- a/src/arm/am335x-sl50.dts +++ b/src/arm/am335x-sl50.dts @@ -305,7 +305,7 @@ }; eeprom: eeprom@50 { - compatible = "at,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/arm/am33xx.dtsi b/src/arm/am33xx.dtsi index 9e242943dcec..7d7ca054c557 100644 --- a/src/arm/am33xx.dtsi +++ b/src/arm/am33xx.dtsi @@ -64,64 +64,64 @@ * because the can not be enabled simultaneously on a * single SoC. */ - opp50@300000000 { + opp50-300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; opp-supported-hw = <0x06 0x0010>; opp-suspend; }; - opp100@275000000 { + opp100-275000000 { opp-hz = /bits/ 64 <275000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0x00FF>; opp-suspend; }; - opp100@300000000 { + opp100-300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0020>; opp-suspend; }; - opp100@500000000 { + opp100-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp100@600000000 { + opp100-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0040>; }; - opp120@600000000 { + opp120-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp120@720000000 { + opp120-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x06 0x0080>; }; - oppturbo@720000000 { + oppturbo-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x01 0xFFFF>; }; - oppturbo@800000000 { + oppturbo-800000000 { opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x06 0x0100>; }; - oppnitro@1000000000 { + oppnitro-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1325000 1298500 1351500>; opp-supported-hw = <0x04 0x0200>; @@ -431,7 +431,6 @@ &edma_xbar 25 0 0>; dma-names = "tx", "rx"; interrupts = <64>; - interrupt-parent = <&intc>; reg = <0x48060000 0x1000>; status = "disabled"; }; @@ -444,7 +443,6 @@ &edma 3 0>; dma-names = "tx", "rx"; interrupts = <28>; - interrupt-parent = <&intc>; reg = <0x481d8000 0x1000>; status = "disabled"; }; @@ -454,7 +452,6 @@ ti,hwmods = "mmc3"; ti,needs-special-reset; interrupts = <29>; - interrupt-parent = <&intc>; reg = <0x47810000 0x1000>; status = "disabled"; }; @@ -853,7 +850,6 @@ 0x4a101200 0x100>; #address-cells = <1>; #size-cells = <1>; - interrupt-parent = <&intc>; /* * c0_rx_thresh_pend * c0_rx_pend @@ -908,7 +904,6 @@ lcdc: lcdc@4830e000 { compatible = "ti,am33xx-tilcdc"; reg = <0x4830e000 0x1000>; - interrupt-parent = <&intc>; interrupts = <36>; ti,hwmods = "lcdc"; status = "disabled"; @@ -917,7 +912,6 @@ tscadc: tscadc@44e0d000 { compatible = "ti,am3359-tscadc"; reg = <0x44e0d000 0x1000>; - interrupt-parent = <&intc>; interrupts = <16>; ti,hwmods = "adc_tsc"; status = "disabled"; diff --git a/src/arm/am4372.dtsi b/src/arm/am4372.dtsi index 176e09e9a45e..e5b061469bf8 100644 --- a/src/arm/am4372.dtsi +++ b/src/arm/am4372.dtsi @@ -59,32 +59,32 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_conf>; - opp50@300000000 { + opp50-300000000 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; opp-supported-hw = <0xFF 0x01>; opp-suspend; }; - opp100@600000000 { + opp100-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0xFF 0x04>; }; - opp120@720000000 { + opp120-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0xFF 0x08>; }; - oppturbo@800000000 { + oppturbo-800000000 { opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0xFF 0x10>; }; - oppnitro@1000000000 { + oppnitro-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1325000 1298500 1351500>; opp-supported-hw = <0xFF 0x20>; diff --git a/src/arm/am437x-gp-evm.dts b/src/arm/am437x-gp-evm.dts index 397e98b7e246..29a538ecd405 100644 --- a/src/arm/am437x-gp-evm.dts +++ b/src/arm/am437x-gp-evm.dts @@ -549,8 +549,6 @@ dcdc3: regulator-dcdc3 { regulator-name = "vdcdc3"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; regulator-state-mem { diff --git a/src/arm/am437x-idk-evm.dts b/src/arm/am437x-idk-evm.dts index c1f7f9336e64..5e364473067f 100644 --- a/src/arm/am437x-idk-evm.dts +++ b/src/arm/am437x-idk-evm.dts @@ -339,7 +339,7 @@ clock-frequency = <400000>; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; pagesize = <64>; reg = <0x50>; }; diff --git a/src/arm/am437x-sk-evm.dts b/src/arm/am437x-sk-evm.dts index 4dc54bee2f36..2c6bf0684f50 100644 --- a/src/arm/am437x-sk-evm.dts +++ b/src/arm/am437x-sk-evm.dts @@ -451,8 +451,6 @@ dcdc3: regulator-dcdc3 { regulator-name = "vdds_ddr"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; regulator-state-mem { @@ -511,7 +509,7 @@ }; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; pagesize = <64>; reg = <0x50>; }; diff --git a/src/arm/am43x-epos-evm.dts b/src/arm/am43x-epos-evm.dts index 9acd4ccdec4e..54f40f370011 100644 --- a/src/arm/am43x-epos-evm.dts +++ b/src/arm/am43x-epos-evm.dts @@ -442,8 +442,6 @@ dcdc3: regulator-dcdc3 { regulator-name = "vdcdc3"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; }; @@ -477,7 +475,7 @@ }; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; pagesize = <64>; reg = <0x50>; }; diff --git a/src/arm/am43xx-clocks.dtsi b/src/arm/am43xx-clocks.dtsi index d1d73b725f47..430be5829f8f 100644 --- a/src/arm/am43xx-clocks.dtsi +++ b/src/arm/am43xx-clocks.dtsi @@ -833,4 +833,40 @@ ti,bit-shift = <23>; reg = <0x4100>; }; + + clkout2_src_mux_ck: clkout2_src_mux_ck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>, + <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>, + <&dpll_mpu_m2_ck>, <&dpll_extdev_ck>; + reg = <0x4108>; + }; + + clkout2_pre_div_ck: clkout2_pre_div_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&clkout2_src_mux_ck>; + ti,bit-shift = <4>; + ti,max-div = <8>; + reg = <0x4108>; + }; + + clkout2_post_div_ck: clkout2_post_div_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&clkout2_pre_div_ck>; + ti,bit-shift = <8>; + ti,max-div = <32>; + ti,index-power-of-two; + reg = <0x4108>; + }; + + clkout2_ck: clkout2_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&clkout2_post_div_ck>; + ti,bit-shift = <16>; + reg = <0x4108>; + }; }; diff --git a/src/arm/am571x-idk.dts b/src/arm/am571x-idk.dts index ad68d1eb3bc3..7b207835b2d1 100644 --- a/src/arm/am571x-idk.dts +++ b/src/arm/am571x-idk.dts @@ -79,3 +79,20 @@ id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>; vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>; }; + +&mailbox5 { + status = "okay"; + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + status = "okay"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + status = "okay"; + }; +}; + +&mailbox6 { + status = "okay"; + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + status = "okay"; + }; +}; diff --git a/src/arm/am572x-idk.dts b/src/arm/am572x-idk.dts index 8350b4b34b08..9da6d83ca185 100644 --- a/src/arm/am572x-idk.dts +++ b/src/arm/am572x-idk.dts @@ -91,3 +91,23 @@ &pcie1 { gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; }; + +&mailbox5 { + status = "okay"; + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + status = "okay"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + status = "okay"; + }; +}; + +&mailbox6 { + status = "okay"; + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + status = "okay"; + }; + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { + status = "okay"; + }; +}; diff --git a/src/arm/am57xx-beagle-x15-common.dtsi b/src/arm/am57xx-beagle-x15-common.dtsi index 585d792a8fdd..fdfe5b16b806 100644 --- a/src/arm/am57xx-beagle-x15-common.dtsi +++ b/src/arm/am57xx-beagle-x15-common.dtsi @@ -388,7 +388,7 @@ }; eeprom: eeprom@50 { - compatible = "at,24c32"; + compatible = "atmel,24c32"; reg = <0x50>; }; }; diff --git a/src/arm/animeo_ip.dts b/src/arm/animeo_ip.dts index 9cc372b9fb9b..26ade8c0a960 100644 --- a/src/arm/animeo_ip.dts +++ b/src/arm/animeo_ip.dts @@ -83,25 +83,44 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - barebox@0 { - label = "barebox"; - reg = <0x0 0x58000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - u_boot_env@58000 { - label = "u_boot_env"; - reg = <0x58000 0x8000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - ubi@60000 { - label = "ubi"; - reg = <0x60000 0x1FA0000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + barebox@0 { + label = "barebox"; + reg = <0x0 0x58000>; + }; + + u_boot_env@58000 { + label = "u_boot_env"; + reg = <0x58000 0x8000>; + }; + + ubi@60000 { + label = "ubi"; + reg = <0x60000 0x1FA0000>; + }; + }; + }; }; }; diff --git a/src/arm/armada-370.dtsi b/src/arm/armada-370.dtsi index cc011c8bc36b..f9cf1273f35e 100644 --- a/src/arm/armada-370.dtsi +++ b/src/arm/armada-370.dtsi @@ -137,29 +137,38 @@ }; gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; reg = <0x18180 0x40>; ngpios = <2>; gpio-controller; diff --git a/src/arm/armada-385-linksys-caiman.dts b/src/arm/armada-385-linksys-caiman.dts index f3cee918d285..ee669ae61011 100644 --- a/src/arm/armada-385-linksys-caiman.dts +++ b/src/arm/armada-385-linksys-caiman.dts @@ -44,71 +44,128 @@ model = "Linksys WRT1200AC"; compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385", "marvell,armada380"; +}; - soc { - internal-regs{ - i2c@11000 { - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - - wan_amber@0 { - label = "caiman:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "caiman:white:wan"; - reg = <0x1>; - }; - - wlan_2g@2 { - label = "caiman:white:wlan_2g"; - reg = <0x2>; - }; - - wlan_5g@3 { - label = "caiman:white:wlan_5g"; - reg = <0x3>; - }; - - usb2@5 { - label = "caiman:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "caiman:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "caiman:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "caiman:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "caiman:amber:wps"; - reg = <0x9>; - }; - }; - }; - }; +&expander0 { + wan_amber@0 { + label = "caiman:amber:wan"; + reg = <0x0>; }; - gpio-leds { - power { - label = "caiman:white:power"; - }; + wan_white@1 { + label = "caiman:white:wan"; + reg = <0x1>; + }; - sata { - label = "caiman:white:sata"; - }; + wlan_2g@2 { + label = "caiman:white:wlan_2g"; + reg = <0x2>; + }; + + wlan_5g@3 { + label = "caiman:white:wlan_5g"; + reg = <0x3>; + }; + + usb2@5 { + label = "caiman:white:usb2"; + reg = <0x5>; + }; + + usb3_1@6 { + label = "caiman:white:usb3_1"; + reg = <0x6>; + }; + + usb3_2@7 { + label = "caiman:white:usb3_2"; + reg = <0x7>; + }; + + wps_white@8 { + label = "caiman:white:wps"; + reg = <0x8>; + }; + + wps_amber@9 { + label = "caiman:amber:wps"; + reg = <0x9>; + }; +}; + +&gpio_leds { + power { + label = "caiman:white:power"; + }; + + sata { + label = "caiman:white:sata"; + }; +}; + +&nand { + /* 128MiB */ + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x200000>; /* 2MiB */ + read-only; + }; + + partition@100000 { + label = "u_env"; + reg = <0x200000 0x40000>; /* 256KiB */ + }; + + partition@140000 { + label = "s_env"; + reg = <0x240000 0x40000>; /* 256KiB */ + }; + + partition@900000 { + label = "devinfo"; + reg = <0x900000 0x100000>; /* 1MiB */ + read-only; + }; + + /* kernel1 overlaps with rootfs1 by design */ + partition@a00000 { + label = "kernel1"; + reg = <0xa00000 0x2800000>; /* 40MiB */ + }; + + partition@1000000 { + label = "rootfs1"; + reg = <0x1000000 0x2200000>; /* 34MiB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ + partition@3200000 { + label = "kernel2"; + reg = <0x3200000 0x2800000>; /* 40MiB */ + }; + + partition@3800000 { + label = "rootfs2"; + reg = <0x3800000 0x2200000>; /* 34MiB */ + }; + + /* + * 38MiB, last MiB is for the BBT, not writable + */ + partition@5a00000 { + label = "syscfg"; + reg = <0x5a00000 0x2600000>; + }; + + /* + * Unused area between "s_env" and "devinfo". + * Moved here because otherwise the renumbered + * partitions would break the bootloader + * supplied bootargs + */ + partition@180000 { + label = "unused_area"; + reg = <0x280000 0x680000>; /* 6.5MiB */ }; }; diff --git a/src/arm/armada-385-linksys-cobra.dts b/src/arm/armada-385-linksys-cobra.dts index 111071860559..5169ca89c55a 100644 --- a/src/arm/armada-385-linksys-cobra.dts +++ b/src/arm/armada-385-linksys-cobra.dts @@ -44,71 +44,128 @@ model = "Linksys WRT1900ACv2"; compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385", "marvell,armada380"; +}; - soc { - internal-regs{ - i2c@11000 { - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - - wan_amber@0 { - label = "cobra:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "cobra:white:wan"; - reg = <0x1>; - }; - - wlan_2g@2 { - label = "cobra:white:wlan_2g"; - reg = <0x2>; - }; - - wlan_5g@3 { - label = "cobra:white:wlan_5g"; - reg = <0x3>; - }; - - usb2@5 { - label = "cobra:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "cobra:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "cobra:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "cobra:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "cobra:amber:wps"; - reg = <0x9>; - }; - }; - }; - }; +&expander0 { + wan_amber@0 { + label = "cobra:amber:wan"; + reg = <0x0>; }; - gpio-leds { - power { - label = "cobra:white:power"; - }; + wan_white@1 { + label = "cobra:white:wan"; + reg = <0x1>; + }; - sata { - label = "cobra:white:sata"; - }; + wlan_2g@2 { + label = "cobra:white:wlan_2g"; + reg = <0x2>; + }; + + wlan_5g@3 { + label = "cobra:white:wlan_5g"; + reg = <0x3>; + }; + + usb2@5 { + label = "cobra:white:usb2"; + reg = <0x5>; + }; + + usb3_1@6 { + label = "cobra:white:usb3_1"; + reg = <0x6>; + }; + + usb3_2@7 { + label = "cobra:white:usb3_2"; + reg = <0x7>; + }; + + wps_white@8 { + label = "cobra:white:wps"; + reg = <0x8>; + }; + + wps_amber@9 { + label = "cobra:amber:wps"; + reg = <0x9>; + }; +}; + +&gpio_leds { + power { + label = "cobra:white:power"; + }; + + sata { + label = "cobra:white:sata"; + }; +}; + +&nand { + /* 128MiB */ + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x200000>; /* 2MiB */ + read-only; + }; + + partition@100000 { + label = "u_env"; + reg = <0x200000 0x40000>; /* 256KiB */ + }; + + partition@140000 { + label = "s_env"; + reg = <0x240000 0x40000>; /* 256KiB */ + }; + + partition@900000 { + label = "devinfo"; + reg = <0x900000 0x100000>; /* 1MiB */ + read-only; + }; + + /* kernel1 overlaps with rootfs1 by design */ + partition@a00000 { + label = "kernel1"; + reg = <0xa00000 0x2800000>; /* 40MiB */ + }; + + partition@1000000 { + label = "rootfs1"; + reg = <0x1000000 0x2200000>; /* 34MiB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ + partition@3200000 { + label = "kernel2"; + reg = <0x3200000 0x2800000>; /* 40MiB */ + }; + + partition@3800000 { + label = "rootfs2"; + reg = <0x3800000 0x2200000>; /* 34MiB */ + }; + + /* + * 38MiB, last MiB is for the BBT, not writable + */ + partition@5a00000 { + label = "syscfg"; + reg = <0x5a00000 0x2600000>; + }; + + /* + * Unused area between "s_env" and "devinfo". + * Moved here because otherwise the renumbered + * partitions would break the bootloader + * supplied bootargs + */ + partition@180000 { + label = "unused_area"; + reg = <0x280000 0x680000>; /* 6.5MiB */ }; }; diff --git a/src/arm/armada-385-linksys-rango.dts b/src/arm/armada-385-linksys-rango.dts new file mode 100644 index 000000000000..da8a0f3d432b --- /dev/null +++ b/src/arm/armada-385-linksys-rango.dts @@ -0,0 +1,203 @@ +/* + * Device Tree file for the Linksys WRT3200ACM (Rango) + * + * Copyright (C) 2016 Imre Kaloz + * + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include +#include +#include "armada-385-linksys.dtsi" + +/ { + model = "Linksys WRT3200ACM"; + compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", + "marvell,armada380"; +}; + +&expander0 { + wan_amber@0 { + label = "rango:amber:wan"; + reg = <0x0>; + }; + + wan_white@1 { + label = "rango:white:wan"; + reg = <0x1>; + }; + + usb2@5 { + label = "rango:white:usb2"; + reg = <0x5>; + }; + + usb3_1@6 { + label = "rango:white:usb3_1"; + reg = <0x6>; + }; + + usb3_2@7 { + label = "rango:white:usb3_2"; + reg = <0x7>; + }; + + wps_white@8 { + label = "rango:white:wps"; + reg = <0x8>; + }; + + wps_amber@9 { + label = "rango:amber:wps"; + reg = <0x9>; + }; +}; + +&gpio_leds { + power { + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + label = "rango:white:power"; + }; + + sata { + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + label = "rango:white:sata"; + }; + + wlan_2g { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + label = "rango:white:wlan_2g"; + }; + + wlan_5g { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + label = "rango:white:wlan_5g"; + }; +}; + +&gpio_leds_pins { + marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56"; +}; + +&nand { + /* AMD/Spansion S34ML02G2 256MiB, OEM Layout */ + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x200000>; /* 2MiB */ + read-only; + }; + + partition@200000 { + label = "u_env"; + reg = <0x200000 0x20000>; /* 128KiB */ + }; + + partition@220000 { + label = "s_env"; + reg = <0x220000 0x40000>; /* 256KiB */ + }; + + partition@7e0000 { + label = "devinfo"; + reg = <0x7e0000 0x40000>; /* 256KiB */ + read-only; + }; + + partition@820000 { + label = "sysdiag"; + reg = <0x820000 0x1e0000>; /* 1920KiB */ + read-only; + }; + + /* kernel1 overlaps with rootfs1 by design */ + partition@a00000 { + label = "kernel1"; + reg = <0xa00000 0x5000000>; /* 80MiB */ + }; + + partition@1000000 { + label = "rootfs1"; + reg = <0x1000000 0x4a00000>; /* 74MiB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ + partition@5a00000 { + label = "kernel2"; + reg = <0x5a00000 0x5000000>; /* 80MiB */ + }; + + partition@6000000 { + label = "rootfs2"; + reg = <0x6000000 0x4a00000>; /* 74MiB */ + }; + + /* + * 86MiB, last MiB is for the BBT, not writable + */ + partition@aa00000 { + label = "syscfg"; + reg = <0xaa00000 0x5600000>; + }; + + /* + * Unused area between "s_env" and "devinfo". + * Moved here because otherwise the renumbered + * partitions would break the bootloader + * supplied bootargs + */ + partition@180000 { + label = "unused_area"; + reg = <0x260000 0x5c0000>; /* 5.75MiB */ + }; +}; + +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + no-1-8-v; + non-removable; + wp-inverted; + bus-width = <8>; + status = "okay"; +}; + +&usb3_1_vbus { + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; +}; + +&usb3_1_vbus_pins { + marvell,pins = "mpp44"; +}; diff --git a/src/arm/armada-385-linksys-shelby.dts b/src/arm/armada-385-linksys-shelby.dts index c7a8ddd7f9a5..94aa35bc0bff 100644 --- a/src/arm/armada-385-linksys-shelby.dts +++ b/src/arm/armada-385-linksys-shelby.dts @@ -44,71 +44,128 @@ model = "Linksys WRT1900ACS"; compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", "marvell,armada380"; +}; - soc { - internal-regs{ - i2c@11000 { - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - - wan_amber@0 { - label = "shelby:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "shelby:white:wan"; - reg = <0x1>; - }; - - wlan_2g@2 { - label = "shelby:white:wlan_2g"; - reg = <0x2>; - }; - - wlan_5g@3 { - label = "shelby:white:wlan_5g"; - reg = <0x3>; - }; - - usb2@5 { - label = "shelby:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "shelby:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "shelby:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "shelby:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "shelby:amber:wps"; - reg = <0x9>; - }; - }; - }; - }; +&expander0 { + wan_amber@0 { + label = "shelby:amber:wan"; + reg = <0x0>; }; - gpio-leds { - power { - label = "shelby:white:power"; - }; + wan_white@1 { + label = "shelby:white:wan"; + reg = <0x1>; + }; - sata { - label = "shelby:white:sata"; - }; + wlan_2g@2 { + label = "shelby:white:wlan_2g"; + reg = <0x2>; + }; + + wlan_5g@3 { + label = "shelby:white:wlan_5g"; + reg = <0x3>; + }; + + usb2@5 { + label = "shelby:white:usb2"; + reg = <0x5>; + }; + + usb3_1@6 { + label = "shelby:white:usb3_1"; + reg = <0x6>; + }; + + usb3_2@7 { + label = "shelby:white:usb3_2"; + reg = <0x7>; + }; + + wps_white@8 { + label = "shelby:white:wps"; + reg = <0x8>; + }; + + wps_amber@9 { + label = "shelby:amber:wps"; + reg = <0x9>; + }; +}; + +&gpio_leds { + power { + label = "shelby:white:power"; + }; + + sata { + label = "shelby:white:sata"; + }; +}; + +&nand { + /* 128MiB */ + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x200000>; /* 2MiB */ + read-only; + }; + + partition@100000 { + label = "u_env"; + reg = <0x200000 0x40000>; /* 256KiB */ + }; + + partition@140000 { + label = "s_env"; + reg = <0x240000 0x40000>; /* 256KiB */ + }; + + partition@900000 { + label = "devinfo"; + reg = <0x900000 0x100000>; /* 1MiB */ + read-only; + }; + + /* kernel1 overlaps with rootfs1 by design */ + partition@a00000 { + label = "kernel1"; + reg = <0xa00000 0x2800000>; /* 40MiB */ + }; + + partition@1000000 { + label = "rootfs1"; + reg = <0x1000000 0x2200000>; /* 34MiB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ + partition@3200000 { + label = "kernel2"; + reg = <0x3200000 0x2800000>; /* 40MiB */ + }; + + partition@3800000 { + label = "rootfs2"; + reg = <0x3800000 0x2200000>; /* 34MiB */ + }; + + /* + * 38MiB, last MiB is for the BBT, not writable + */ + partition@5a00000 { + label = "syscfg"; + reg = <0x5a00000 0x2600000>; + }; + + /* + * Unused area between "s_env" and "devinfo". + * Moved here because otherwise the renumbered + * partitions would break the bootloader + * supplied bootargs + */ + partition@180000 { + label = "unused_area"; + reg = <0x280000 0x680000>; /* 6.5MiB */ }; }; diff --git a/src/arm/armada-385-linksys.dtsi b/src/arm/armada-385-linksys.dtsi index 2306c45685b1..e1f355ffc8f7 100644 --- a/src/arm/armada-385-linksys.dtsi +++ b/src/arm/armada-385-linksys.dtsi @@ -52,7 +52,7 @@ memory { device_type = "memory"; - reg = <0x00000000 0x20000000>; /* 512 MB */ + reg = <0x00000000 0x20000000>; /* 512 MiB */ }; soc { @@ -61,255 +61,45 @@ MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - tmp421@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,pca9635"; - reg = <0x68>; - }; - }; - - /* J10: VCC, NC, RX, NC, TX, GND */ - serial@12000 { - status = "okay"; - }; - - ethernet@70000 { - status = "okay"; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <2>; - bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - ethernet@34000 { - status = "okay"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <1>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - mdio@72004 { - status = "okay"; - - switch@0 { - compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "lan4"; - }; - - port@1 { - reg = <1>; - label = "lan3"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan1"; - }; - - port@4 { - reg = <4>; - label = "wan"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - ethernet = <ð2>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; - - sata@a8000 { - status = "okay"; - }; - - bm@c8000 { - status = "okay"; - }; - - /* USB part of the eSATA/USB 2.0 port */ - usb@58000 { - status = "okay"; - }; - - usb3@f8000 { - status = "okay"; - usb-phy = <&usb3_phy>; - }; - - flash@d0000 { - status = "okay"; - num-cs = <1>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x200000>; /* 2MB */ - read-only; - }; - - partition@100000 { - label = "u_env"; - reg = <0x200000 0x40000>; /* 256KB */ - }; - - partition@140000 { - label = "s_env"; - reg = <0x240000 0x40000>; /* 256KB */ - }; - - partition@900000 { - label = "devinfo"; - reg = <0x900000 0x100000>; /* 1MB */ - read-only; - }; - - /* kernel1 overlaps with rootfs1 by design */ - partition@a00000 { - label = "kernel1"; - reg = <0xa00000 0x2800000>; /* 40MB */ - }; - - partition@1000000 { - label = "rootfs1"; - reg = <0x1000000 0x2200000>; /* 34MB */ - }; - - /* kernel2 overlaps with rootfs2 by design */ - partition@3200000 { - label = "kernel2"; - reg = <0x3200000 0x2800000>; /* 40MB */ - }; - - partition@3800000 { - label = "rootfs2"; - reg = <0x3800000 0x2200000>; /* 34MB */ - }; - - /* - * 38MB, last MB is for the BBT, not writable - */ - partition@5a00000 { - label = "syscfg"; - reg = <0x5a00000 0x2600000>; - }; - - /* - * Unused area between "s_env" and "devinfo". - * Moved here because otherwise the renumbered - * partitions would break the bootloader - * supplied bootargs - */ - partition@180000 { - label = "unused_area"; - reg = <0x280000 0x680000>; /* 6.5MB */ - }; - }; - }; - - bm-bppi { - status = "okay"; - }; - - pcie-controller { - status = "okay"; - - pcie@1,0 { - /* Marvell 88W8864, 5GHz-only */ - status = "okay"; - }; - - pcie@2,0 { - /* Marvell 88W8864, 2GHz-only */ - status = "okay"; - }; - }; }; - usb3_phy: usb3_phy { + usb3_1_phy: usb3_1-phy { compatible = "usb-nop-xceiv"; - vcc-supply = <®_xhci0_vbus>; + vcc-supply = <&usb3_1_vbus>; }; - reg_xhci0_vbus: xhci0-vbus { + usb3_1_vbus: usb3_1-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-name = "xhci0-vbus"; + pinctrl-0 = <&usb3_1_vbus_pins>; + regulator-name = "usb3_1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; }; - gpio_keys { + gpio_keys: gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&keys_pin>; + pinctrl-0 = <&gpio_keys_pins>; pinctrl-names = "default"; - button@1 { + wps { label = "WPS"; linux,code = ; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; }; - button@2 { + reset { label = "Factory Reset Button"; linux,code = ; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; }; }; - gpio-leds { + gpio_leds: gpio-leds { compatible = "gpio-leds"; - pinctrl-0 = <&power_led_pin &sata_led_pin>; + pinctrl-0 = <&gpio_leds_pins>; pinctrl-names = "default"; power { @@ -323,21 +113,83 @@ linux,default-trigger = "disk-activity"; }; }; +}; - dsa@0 { - status = "disabled"; +&ahci0 { + status = "okay"; +}; - compatible = "marvell,dsa"; - #address-cells = <2>; +&bm { + status = "okay"; +}; + +&bm_bppi { + status = "okay"; +}; + +ð0 { + status = "okay"; + phy-mode = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <1>; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +ð2 { + status = "okay"; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + bm,pool-short = <3>; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + tmp421@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + + expander0: pca9635@68 { + #address-cells = <1>; #size-cells = <0>; + compatible = "nxp,pca9635"; + reg = <0x68>; + }; +}; - dsa,ethernet = <ð2>; - dsa,mii-bus = <&mdio>; +&nand { + /* 128MiB or 256MiB */ + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; +}; - switch@0 { +&mdio { + status = "okay"; + + switch@0 { + compatible = "marvell,mv88e6085"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + ports { #address-cells = <1>; #size-cells = <0>; - reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */ port@0 { reg = <0>; @@ -367,28 +219,45 @@ port@5 { reg = <5>; label = "cpu"; + ethernet = <ð2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; }; }; }; +&pciec { + status = "okay"; +}; + +&pcie1 { + /* Marvell 88W8864, 5GHz-only */ + status = "okay"; +}; + +&pcie2 { + /* Marvell 88W8864, 2GHz-only */ + status = "okay"; +}; + &pinctrl { - keys_pin: keys-pin { + gpio_keys_pins: gpio-keys-pins { + /* mpp24: wps, mpp29: reset */ marvell,pins = "mpp24", "mpp29"; marvell,function = "gpio"; }; - power_led_pin: power-led-pin { - marvell,pins = "mpp55"; + gpio_leds_pins: gpio-leds-pins { + /* mpp54: sata, mpp55: power */ + marvell,pins = "mpp54", "mpp55"; marvell,function = "gpio"; }; - sata_led_pin: sata-led-pin { - marvell,pins = "mpp54"; - marvell,function = "gpio"; - }; - - xhci0_vbus_pins: xhci0-vbus-pins { + usb3_1_vbus_pins: usb3_1-vbus-pins { marvell,pins = "mpp50"; marvell,function = "gpio"; }; @@ -397,3 +266,18 @@ &spi0 { status = "disabled"; }; + +&uart0 { + /* J10: VCC, NC, RX, NC, TX, GND */ + status = "okay"; +}; + +&usb0 { + /* USB part of the eSATA/USB 2.0 port */ + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + usb-phy = <&usb3_1_phy>; +}; diff --git a/src/arm/armada-385-turris-omnia.dts b/src/arm/armada-385-turris-omnia.dts index 28eede180e4f..be16ce39fb3d 100644 --- a/src/arm/armada-385-turris-omnia.dts +++ b/src/arm/armada-385-turris-omnia.dts @@ -171,7 +171,7 @@ /* leds device (in STM32F0) at address 0x2b */ eeprom@54 { - compatible = "at,24c64"; + compatible = "atmel,24c64"; reg = <0x54>; /* The EEPROM contains data for bootloader. diff --git a/src/arm/armada-388-gp.dts b/src/arm/armada-388-gp.dts index 895fa6cfa15a..563901e0ec07 100644 --- a/src/arm/armada-388-gp.dts +++ b/src/arm/armada-388-gp.dts @@ -75,7 +75,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pca0_pins>; interrupt-parent = <&gpio0>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -87,7 +87,7 @@ compatible = "nxp,pca9555"; pinctrl-names = "default"; interrupt-parent = <&gpio0>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/src/arm/armada-38x.dtsi b/src/arm/armada-38x.dtsi index 8b165c31de1e..af31f5d6c0e5 100644 --- a/src/arm/armada-38x.dtsi +++ b/src/arm/armada-38x.dtsi @@ -312,31 +312,39 @@ }; gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = , , , ; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <28>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = , , , ; + clocks = <&coreclk 0>; }; systemc: system-controller@18200 { diff --git a/src/arm/armada-xp-98dx3236.dtsi b/src/arm/armada-xp-98dx3236.dtsi index 84cc232a29e9..be22ec5236ac 100644 --- a/src/arm/armada-xp-98dx3236.dtsi +++ b/src/arm/armada-xp-98dx3236.dtsi @@ -311,6 +311,10 @@ reg = <0x20a00 0x2d0>, <0x21070 0x58>; }; +&rtc { + status = "disabled"; +}; + &timer { compatible = "marvell,armada-xp-timer"; clocks = <&coreclk 2>, <&refclk>; diff --git a/src/arm/armada-xp-98dx4251.dtsi b/src/arm/armada-xp-98dx4251.dtsi index 51de91b31a9d..bc9f824020eb 100644 --- a/src/arm/armada-xp-98dx4251.dtsi +++ b/src/arm/armada-xp-98dx4251.dtsi @@ -87,4 +87,5 @@ &pp0 { compatible = "marvell,prestera-98dx4251"; + interrupts = <33>, <34>, <35>, <36>; }; diff --git a/src/arm/armada-xp-linksys-mamba.dts b/src/arm/armada-xp-linksys-mamba.dts index 9efcf59c9b44..6d705f518254 100644 --- a/src/arm/armada-xp-linksys-mamba.dts +++ b/src/arm/armada-xp-linksys-mamba.dts @@ -308,13 +308,11 @@ }; }; - gpio_fan { + pwm_fan { /* SUNON HA4010V4-0000-C99 */ - compatible = "gpio-fan"; - gpios = <&gpio0 24 0>; - gpio-fan,speed-map = <0 0 - 4500 1>; + compatible = "pwm-fan"; + pwms = <&gpio0 24 4000>; }; dsa { diff --git a/src/arm/armada-xp-mv78230.dtsi b/src/arm/armada-xp-mv78230.dtsi index 07c5090ecd29..9f25814077f2 100644 --- a/src/arm/armada-xp-mv78230.dtsi +++ b/src/arm/armada-xp-mv78230.dtsi @@ -202,25 +202,33 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; }; }; }; diff --git a/src/arm/armada-xp-mv78260.dtsi b/src/arm/armada-xp-mv78260.dtsi index 64e936ae7b22..2bfe07aebf1a 100644 --- a/src/arm/armada-xp-mv78260.dtsi +++ b/src/arm/armada-xp-mv78260.dtsi @@ -285,29 +285,38 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; reg = <0x18180 0x40>; ngpios = <3>; gpio-controller; diff --git a/src/arm/armada-xp-mv78460.dtsi b/src/arm/armada-xp-mv78460.dtsi index d1383dde43eb..6c33935f7074 100644 --- a/src/arm/armada-xp-mv78460.dtsi +++ b/src/arm/armada-xp-mv78460.dtsi @@ -323,29 +323,38 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-gpio", + "marvell,orion-gpio"; reg = <0x18180 0x40>; ngpios = <3>; gpio-controller; diff --git a/src/arm/aspeed-g4.dtsi b/src/arm/aspeed-g4.dtsi index 8c6bc29eb7f6..8a04c7e2d818 100644 --- a/src/arm/aspeed-g4.dtsi +++ b/src/arm/aspeed-g4.dtsi @@ -886,13 +886,12 @@ }; timer: timer@1e782000 { + /* This timer is a Faraday FTTMR010 derivative */ compatible = "aspeed,ast2400-timer"; reg = <0x1e782000 0x90>; - // The moxart_timer driver registers only one - // interrupt and assumes it's for timer 1 - //interrupts = <16 17 18 35 36 37 38 39>; - interrupts = <16>; + interrupts = <16 17 18 35 36 37 38 39>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; wdt1: wdt@1e785000 { diff --git a/src/arm/aspeed-g5.dtsi b/src/arm/aspeed-g5.dtsi index a0bea4a6ec77..9cffe347b828 100644 --- a/src/arm/aspeed-g5.dtsi +++ b/src/arm/aspeed-g5.dtsi @@ -993,13 +993,12 @@ }; timer: timer@1e782000 { + /* This timer is a Faraday FTTMR010 derivative */ compatible = "aspeed,ast2400-timer"; reg = <0x1e782000 0x90>; - // The moxart_timer driver registers only one - // interrupt and assumes it's for timer 1 - //interrupts = <16 17 18 35 36 37 38 39>; - interrupts = <16>; + interrupts = <16 17 18 35 36 37 38 39>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; diff --git a/src/arm/at91-cosino.dtsi b/src/arm/at91-cosino.dtsi index 02d8ef43de3a..89cde175154e 100644 --- a/src/arm/at91-cosino.dtsi +++ b/src/arm/at91-cosino.dtsi @@ -82,38 +82,61 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; /* Enable PMECC */ - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_addr_nand + &pinctrl_ebi_data_0_7>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_oe_we + &pinctrl_nand_cs + &pinctrl_nand_rb>; + pinctrl-names = "default"; - uboot@40000 { - label = "u-boot"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; - ubootenv@c0000 { - label = "U-Boot Env"; - reg = <0xc0000 0x140000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + uboot@40000 { + label = "u-boot"; + reg = <0x40000 0x80000>; + }; + + ubootenv@c0000 { + label = "U-Boot Env"; + reg = <0xc0000 0x140000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-kizbox.dts b/src/arm/at91-kizbox.dts index b4f147c193fd..1f31df846d61 100644 --- a/src/arm/at91-kizbox.dts +++ b/src/arm/at91-kizbox.dts @@ -59,19 +59,39 @@ status = "okay"; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; + ebi: ebi@10000000 { status = "okay"; - bootstrap@0 { - label = "bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - ubi@20000 { - label = "ubi"; - reg = <0x20000 0x7fe0000>; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + bootstrap@0 { + label = "bootstrap"; + reg = <0x0 0x20000>; + }; + + ubi@20000 { + label = "ubi"; + reg = <0x20000 0x7fe0000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-kizbox2.dts b/src/arm/at91-kizbox2.dts index 50a14568f094..4372c0287c1c 100644 --- a/src/arm/at91-kizbox2.dts +++ b/src/arm/at91-kizbox2.dts @@ -141,23 +141,40 @@ status = "okay"; }; - nand0: nand@60000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; status = "okay"; - bootstrap@0 { - label = "bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; - ubi@20000 { - label = "ubi"; - reg = <0x20000 0x7fe0000>; + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + bootstrap@0 { + label = "bootstrap"; + reg = <0x0 0x20000>; + }; + + ubi@20000 { + label = "ubi"; + reg = <0x20000 0x7fe0000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-kizboxmini.dts b/src/arm/at91-kizboxmini.dts index 9682d105d4d8..33238fcb6d0b 100644 --- a/src/arm/at91-kizboxmini.dts +++ b/src/arm/at91-kizboxmini.dts @@ -68,6 +68,49 @@ status = "okay"; }; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_addr_nand + &pinctrl_ebi_data_0_7>; + pinctrl-names = "default"; + status = "okay"; + + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_oe_we + &pinctrl_nand_cs + &pinctrl_nand_rb>; + pinctrl-names = "default"; + + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + bootstrap@0 { + label = "bootstrap"; + reg = <0x0 0x20000>; + }; + + ubi@20000 { + label = "ubi"; + reg = <0x20000 0x7fe0000>; + }; + }; + }; + }; + }; + nand0: nand@40000000 { nand-bus-width = <8>; nand-ecc-mode = "hw"; @@ -77,15 +120,6 @@ nand-on-flash-bbt; status = "okay"; - bootstrap@0 { - label = "bootstrap"; - reg = <0x0 0x20000>; - }; - - ubi@20000 { - label = "ubi"; - reg = <0x20000 0x7fe0000>; - }; }; }; diff --git a/src/arm/at91-linea.dtsi b/src/arm/at91-linea.dtsi index 0721c8472509..87e5090fb4c4 100644 --- a/src/arm/at91-linea.dtsi +++ b/src/arm/at91-linea.dtsi @@ -31,19 +31,30 @@ status = "okay"; eeprom@51 { - compatible = "st,24c64"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x51>; pagesize = <32>; }; }; -&nand0 { +&ebi { + pinctrl-0 = <&pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; + status = "okay"; +}; + + +&nand_controller { status = "okay"; - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + nand: nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; + }; }; diff --git a/src/arm/at91-qil_a9260.dts b/src/arm/at91-qil_a9260.dts index 8f019184fccf..f46352790a41 100644 --- a/src/arm/at91-qil_a9260.dts +++ b/src/arm/at91-qil_a9260.dts @@ -107,50 +107,69 @@ status = "okay"; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@a0000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@c0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4c0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7cc0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@a0000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@c0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4c0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7cc0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-sama5d2_xplained.dts b/src/arm/at91-sama5d2_xplained.dts index 0bef9e0b89c6..2e2c3d1a1fa2 100644 --- a/src/arm/at91-sama5d2_xplained.dts +++ b/src/arm/at91-sama5d2_xplained.dts @@ -56,10 +56,6 @@ stdout-path = "serial0:115200n8"; }; - memory { - reg = <0x20000000 0x80000>; - }; - clocks { slow_xtal { clock-frequency = <32768>; @@ -227,6 +223,10 @@ }; }; + pwm0: pwm@f802c000 { + status = "okay"; + }; + flx0: flexcom@f8034000 { atmel,flexcom-mode = ; status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ @@ -258,6 +258,12 @@ status = "okay"; }; + can0: can@f8054000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; + status = "okay"; + }; + uart3: serial@fc008000 { atmel,use-dma-rx; atmel,use-dma-tx; @@ -322,6 +328,18 @@ bias-disable; }; + pinctrl_can0_default: can0_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can1_default: can1_default { + pinmux = , + ; + bias-disable; + }; + pinctrl_charger_chglev: charger_chglev { pinmux = ; bias-disable; @@ -469,6 +487,12 @@ }; }; + + can1: can@fc050000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; + }; }; }; diff --git a/src/arm/at91-sama5d3_xplained.dts b/src/arm/at91-sama5d3_xplained.dts index 5a53fcf542ab..3af088d2cba7 100644 --- a/src/arm/at91-sama5d3_xplained.dts +++ b/src/arm/at91-sama5d3_xplained.dts @@ -235,46 +235,6 @@ }; }; - nand0: nand@60000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; - status = "okay"; - - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; - - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; - - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; - - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; - - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; - - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; - }; - }; - usb0: gadget@00500000 { atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */ pinctrl-names = "default"; @@ -294,6 +254,63 @@ usb2: ehci@00700000 { status = "okay"; }; + + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; + status = "okay"; + + nand_controller: nand-controller { + status = "okay"; + + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; + + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; + }; + }; }; vcc_mmc0_reg: fixedregulator_mmc0 { diff --git a/src/arm/at91-sama5d4_ma5d4.dtsi b/src/arm/at91-sama5d4_ma5d4.dtsi index b5a5a91bc2ef..b813fdfa2842 100644 --- a/src/arm/at91-sama5d4_ma5d4.dtsi +++ b/src/arm/at91-sama5d4_ma5d4.dtsi @@ -75,7 +75,7 @@ reg = <0>; clocks = <&clk20m>; interrupt-parent = <&pioE>; - interrupts = <6 GPIO_ACTIVE_LOW>; + interrupts = <6 IRQ_TYPE_EDGE_RISING>; spi-max-frequency = <10000000>; }; @@ -84,7 +84,7 @@ reg = <1>; clocks = <&clk20m>; interrupt-parent = <&pioE>; - interrupts = <7 GPIO_ACTIVE_LOW>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; spi-max-frequency = <10000000>; }; }; diff --git a/src/arm/at91-sama5d4_xplained.dts b/src/arm/at91-sama5d4_xplained.dts index 5ab14cedb1db..cf712444b2c2 100644 --- a/src/arm/at91-sama5d4_xplained.dts +++ b/src/arm/at91-sama5d4_xplained.dts @@ -190,41 +190,60 @@ status = "okay"; }; - nand0: nand@80000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - nand-on-flash-bbt; - atmel,has-pmecc; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_cs3 &pinctrl_ebi_nrd_nandoe + &pinctrl_ebi_nwe_nandwe &pinctrl_ebi_nandrdy + &pinctrl_ebi_data_0_7 &pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + label = "atmel_nand"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-sama5d4ek.dts b/src/arm/at91-sama5d4ek.dts index f8b96cef5e1a..bae5248f126e 100644 --- a/src/arm/at91-sama5d4ek.dts +++ b/src/arm/at91-sama5d4ek.dts @@ -236,41 +236,60 @@ status = "okay"; }; - nand0: nand@80000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - nand-on-flash-bbt; - atmel,has-pmecc; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_cs3 &pinctrl_ebi_nrd_nandoe + &pinctrl_ebi_nwe_nandwe &pinctrl_ebi_nandrdy + &pinctrl_ebi_data_0_7 &pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + label = "atmel_nand"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/at91-tse850-3.dts b/src/arm/at91-tse850-3.dts index 498fba3e52b5..5f29010cdbd8 100644 --- a/src/arm/at91-tse850-3.dts +++ b/src/arm/at91-tse850-3.dts @@ -161,45 +161,51 @@ }; }; -&nand0 { - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; +&nand { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - barebox@40000 { - label = "bootloader"; - reg = <0x40000 0x60000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - bareboxenv@c0000 { - label = "bareboxenv"; - reg = <0xc0000 0x40000>; - }; + barebox@40000 { + label = "bootloader"; + reg = <0x40000 0x60000>; + }; - bareboxenv2@100000 { - label = "bareboxenv2"; - reg = <0x100000 0x40000>; - }; + bareboxenv@c0000 { + label = "bareboxenv"; + reg = <0xc0000 0x40000>; + }; - oftree@180000 { - label = "oftree"; - reg = <0x180000 0x20000>; - }; + bareboxenv2@100000 { + label = "bareboxenv2"; + reg = <0x100000 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x500000>; - }; + oftree@180000 { + label = "oftree"; + reg = <0x180000 0x20000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; - }; + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x500000>; + }; - ovlfs@10000000 { - label = "ovlfs"; - reg = <0x10000000 0x10000000>; + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + + ovlfs@10000000 { + label = "ovlfs"; + reg = <0x10000000 0x10000000>; + }; }; }; @@ -239,7 +245,7 @@ }; eeprom@50 { - compatible = "nxp,24c02"; + compatible = "nxp,24c02", "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; diff --git a/src/arm/at91sam9260.dtsi b/src/arm/at91sam9260.dtsi index 9e035b21e1b6..6582f3cca929 100644 --- a/src/arm/at91sam9260.dtsi +++ b/src/arm/at91sam9260.dtsi @@ -99,6 +99,16 @@ reg = <0xffffea00 0x200>; }; + smc: smc@ffffec00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffec00 0x200>; + }; + + matrix: matrix@ffffee00 { + compatible = "atmel,at91sam9260-matrix", "syscon"; + reg = <0xffffee00 0x200>; + }; + pmc: pmc@fffffc00 { compatible = "atmel,at91sam9260-pmc", "syscon"; reg = <0xfffffc00 0x100>; @@ -522,10 +532,14 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PC14 gpio enable pin pull_up */ + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins = + ; }; }; @@ -985,24 +999,6 @@ }; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x40000000 0x10000000 - 0xffffe800 0x200 - >; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioC 13 GPIO_ACTIVE_HIGH - &pioC 14 GPIO_ACTIVE_HIGH - 0 - >; - status = "disabled"; - }; - usb0: ohci@500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; @@ -1011,6 +1007,33 @@ clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; + + ebi: ebi@10000000 { + compatible = "atmel,at91sam9260-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x80000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000 + 0x6 0x0 0x70000000 0x10000000 + 0x7 0x0 0x80000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9260-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; }; i2c-gpio-0 { diff --git a/src/arm/at91sam9261.dtsi b/src/arm/at91sam9261.dtsi index 7e80acda8f69..a05353f96151 100644 --- a/src/arm/at91sam9261.dtsi +++ b/src/arm/at91sam9261.dtsi @@ -91,20 +91,31 @@ status = "disabled"; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; + ebi: ebi@10000000 { + compatible = "atmel,at91sam9261-ebi"; + #address-cells = <2>; #size-cells = <1>; - reg = <0x40000000 0x10000000>; - atmel,nand-addr-offset = <22>; - atmel,nand-cmd-offset = <21>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - - gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, - <&pioC 14 GPIO_ACTIVE_HIGH>, - <0>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x80000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000 + 0x6 0x0 0x70000000 0x10000000 + 0x7 0x0 0x80000000 0x10000000>; + clocks = <&mck>; status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9261-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; }; apb { @@ -262,6 +273,11 @@ reg = <0xffffea00 0x200>; }; + smc: smc@ffffec00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffec00 0x200>; + }; + matrix: matrix@ffffee00 { compatible = "atmel,at91sam9261-matrix", "syscon"; reg = <0xffffee00 0x200>; @@ -362,9 +378,13 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { + atmel,pins = + ; + }; + + pinctrl_nand_cs: nand-cs-0 { atmel,pins = - , ; }; }; diff --git a/src/arm/at91sam9261ek.dts b/src/arm/at91sam9261ek.dts index 55bd51f07fa6..157e1493e6eb 100644 --- a/src/arm/at91sam9261ek.dts +++ b/src/arm/at91sam9261ek.dts @@ -68,40 +68,59 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 15 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; diff --git a/src/arm/at91sam9263.dtsi b/src/arm/at91sam9263.dtsi index a1888f6d892b..ed4b564f8de5 100644 --- a/src/arm/at91sam9263.dtsi +++ b/src/arm/at91sam9263.dtsi @@ -361,11 +361,26 @@ reg = <0xffffe200 0x200>; }; + smc0: smc@ffffe400 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffe400 0x200>; + }; + ramc1: ramc@ffffe800 { compatible = "atmel,at91sam9260-sdramc"; reg = <0xffffe800 0x200>; }; + smc1: smc@ffffea00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffea00 0x200>; + }; + + matrix: matrix@ffffec00 { + compatible = "atmel,at91sam9263-matrix", "syscon"; + reg = <0xffffec00 0x200>; + }; + pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; @@ -472,10 +487,14 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PD15 gpio enable pin pull_up */ + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins = + ; }; }; @@ -991,24 +1010,6 @@ status = "disabled"; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x40000000 0x10000000 - 0xffffe000 0x200 - >; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioA 22 GPIO_ACTIVE_HIGH - &pioD 15 GPIO_ACTIVE_HIGH - 0 - >; - status = "disabled"; - }; - usb0: ohci@00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; @@ -1017,6 +1018,52 @@ clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; + + ebi0: ebi@10000000 { + compatible = "atmel,at91sam9263-ebi0"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc0>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x80000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller0: nand-controller { + compatible = "atmel,at91sam9260-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; + + ebi1: ebi@70000000 { + compatible = "atmel,at91sam9263-ebi1"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc1>; + atmel,matrix = <&matrix>; + reg = <0x80000000 0x20000000>; + ranges = <0x0 0x0 0x80000000 0x10000000 + 0x1 0x0 0x90000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller1: nand-controller { + compatible = "atmel,at91sam9260-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; }; i2c-gpio-0 { diff --git a/src/arm/at91sam9263ek.dts b/src/arm/at91sam9263ek.dts index 127cc42e9e29..10a0925da10e 100644 --- a/src/arm/at91sam9263ek.dts +++ b/src/arm/at91sam9263ek.dts @@ -125,50 +125,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt = <1>; + ebi0: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; diff --git a/src/arm/at91sam9g20ek_common.dtsi b/src/arm/at91sam9g20ek_common.dtsi index 27847a47c108..ac9a1511e239 100644 --- a/src/arm/at91sam9g20ek_common.dtsi +++ b/src/arm/at91sam9g20ek_common.dtsi @@ -123,50 +123,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; diff --git a/src/arm/at91sam9g45.dtsi b/src/arm/at91sam9g45.dtsi index e567d5fd3f9d..a4808c4fbc05 100644 --- a/src/arm/at91sam9g45.dtsi +++ b/src/arm/at91sam9g45.dtsi @@ -113,6 +113,16 @@ clock-names = "ddrck"; }; + smc: smc@ffffe800 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffe800 0x200>; + }; + + matrix: matrix@ffffea00 { + compatible = "atmel,at91sam9g45-matrix", "syscon"; + reg = <0xffffea00 0x200>; + }; + pmc: pmc@fffffc00 { compatible = "atmel,at91sam9g45-pmc", "syscon"; reg = <0xfffffc00 0x100>; @@ -601,10 +611,14 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PC14 gpio enable pin pull_up */ + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins = + ; }; }; @@ -1278,25 +1292,6 @@ status = "disabled"; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x40000000 0x10000000 - 0xffffe200 0x200 - >; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioC 8 GPIO_ACTIVE_HIGH - &pioC 14 GPIO_ACTIVE_HIGH - 0 - >; - status = "disabled"; - }; - usb0: ohci@00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; @@ -1314,6 +1309,31 @@ clock-names = "usb_clk", "ehci_clk"; status = "disabled"; }; + + ebi: ebi@10000000 { + compatible = "atmel,at91sam9g45-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x80000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9g45-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; }; i2c-gpio-0 { diff --git a/src/arm/at91sam9m10g45ek.dts b/src/arm/at91sam9m10g45ek.dts index 2400c99134f7..2522c3308305 100644 --- a/src/arm/at91sam9m10g45ek.dts +++ b/src/arm/at91sam9m10g45ek.dts @@ -245,25 +245,44 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - boot@0 { - label = "bootstrap/uboot/kernel"; - reg = <0x0 0x400000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - rootfs@400000 { - label = "rootfs"; - reg = <0x400000 0x3C00000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 8 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - data@4000000 { - label = "data"; - reg = <0x4000000 0xC000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + label = "bootstrap/uboot/kernel"; + reg = <0x0 0x400000>; + }; + + rootfs@400000 { + label = "rootfs"; + reg = <0x400000 0x3C00000>; + }; + + data@4000000 { + label = "data"; + reg = <0x4000000 0xC000000>; + }; + }; + }; }; }; diff --git a/src/arm/at91sam9n12.dtsi b/src/arm/at91sam9n12.dtsi index f43d7695352d..06516d02d351 100644 --- a/src/arm/at91sam9n12.dtsi +++ b/src/arm/at91sam9n12.dtsi @@ -89,6 +89,17 @@ atmel,external-irqs = <31>; }; + matrix: matrix@ffffde00 { + compatible = "atmel,at91sam9n12-matrix", "syscon"; + reg = <0xffffde00 0x100>; + }; + + pmecc: ecc-engine@ffffe000 { + compatible = "atmel,at91sam9g45-pmecc"; + reg = <0xffffe000 0x600>, + <0xffffe600 0x200>; + }; + ramc0: ramc@ffffe800 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe800 0x200>; @@ -96,6 +107,11 @@ clock-names = "ddrck"; }; + smc: smc@ffffea00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffea00 0x200>; + }; + pmc: pmc@fffffc00 { compatible = "atmel,at91sam9n12-pmc", "syscon"; reg = <0xfffffc00 0x200>; @@ -627,10 +643,14 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PD4 gpio enable pin pull_up */ + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins = + ; }; }; @@ -998,28 +1018,6 @@ }; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x40000000 0x10000000 - 0xffffe000 0x00000600 - 0xffffe600 0x00000200 - 0x00108000 0x00018000 - >; - atmel,pmecc-lookup-table-offset = <0x0 0x8000>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 5 GPIO_ACTIVE_HIGH - &pioD 4 GPIO_ACTIVE_HIGH - 0 - >; - status = "disabled"; - }; - usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; @@ -1028,6 +1026,32 @@ clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; + + ebi: ebi@10000000 { + compatible = "atmel,at91sam9x5-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x60000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9g45-nand-controller"; + ecc-engine = <&pmecc>; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; }; i2c-gpio-0 { diff --git a/src/arm/at91sam9n12ek.dts b/src/arm/at91sam9n12ek.dts index 626c67d66626..5bea8c59b115 100644 --- a/src/arm/at91sam9n12ek.dts +++ b/src/arm/at91sam9n12ek.dts @@ -147,14 +147,26 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <2>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; + + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; + + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-ecc-strength = <2>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; + }; + }; }; usb0: ohci@00500000 { diff --git a/src/arm/at91sam9rl.dtsi b/src/arm/at91sam9rl.dtsi index f4c129a98f17..7768342a6638 100644 --- a/src/arm/at91sam9rl.dtsi +++ b/src/arm/at91sam9rl.dtsi @@ -92,21 +92,29 @@ status = "disabled"; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; + ebi: ebi@10000000 { + compatible = "atmel,at91sam9rl-ebi"; + #address-cells = <2>; #size-cells = <1>; - reg = <0x40000000 0x10000000>, - <0xffffe800 0x200>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 17 GPIO_ACTIVE_HIGH>, - <&pioB 6 GPIO_ACTIVE_HIGH>, - <0>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x80000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000>; + clocks = <&mck>; status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9g45-nand-controller"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; }; apb { @@ -364,6 +372,16 @@ reg = <0xffffea00 0x200>; }; + smc: smc@ffffec00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffec00 0x200>; + }; + + matrix: matrix@ffffee00 { + compatible = "atmel,at91sam9rl-matrix", "syscon"; + reg = <0xffffee00 0x200>; + }; + aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; @@ -443,6 +461,14 @@ }; }; + ebi { + pinctrl_ebi_addr_nand: ebi-addr-0 { + atmel,pins = + , + ; + }; + }; + fb { pinctrl_fb: fb-0 { atmel,pins = @@ -507,28 +533,21 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { + atmel,pins = + ; + }; + + pinctrl_nand_cs: nand-cs-0 { atmel,pins = - , ; }; - pinctrl_nand0_ale_cle: nand_ale_cle-0 { - atmel,pins = - , - ; - }; - - pinctrl_nand0_oe_we: nand_oe_we-0 { + pinctrl_nand_oe_we: nand-oe-we-0 { atmel,pins = , ; }; - - pinctrl_nand0_cs: nand_cs-0 { - atmel,pins = - ; - }; }; pwm0 { diff --git a/src/arm/at91sam9rlek.dts b/src/arm/at91sam9rlek.dts index 2e567d90fba8..9047c168298a 100644 --- a/src/arm/at91sam9rlek.dts +++ b/src/arm/at91sam9rlek.dts @@ -63,40 +63,63 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt = <1>; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_addr_nand>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_oe_we + &pinctrl_nand_cs + &pinctrl_nand_rb>; + pinctrl-names = "default"; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioB 6 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; diff --git a/src/arm/at91sam9x5.dtsi b/src/arm/at91sam9x5.dtsi index f66bae925705..57f307541d2e 100644 --- a/src/arm/at91sam9x5.dtsi +++ b/src/arm/at91sam9x5.dtsi @@ -97,6 +97,17 @@ atmel,external-irqs = <31>; }; + matrix: matrix@ffffde00 { + compatible = "atmel,at91sam9x5-matrix", "syscon"; + reg = <0xffffde00 0x100>; + }; + + pmecc: ecc-engine@ffffe000 { + compatible = "atmel,at91sam9g45-pmecc"; + reg = <0xffffe000 0x600>, + <0xffffe600 0x200>; + }; + ramc0: ramc@ffffe800 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe800 0x200>; @@ -104,6 +115,11 @@ clock-names = "ddrck"; }; + smc: smc@ffffea00 { + compatible = "atmel,at91sam9260-smc", "syscon"; + reg = <0xffffea00 0x200>; + }; + pmc: pmc@fffffc00 { compatible = "atmel,at91sam9x5-pmc", "syscon"; reg = <0xfffffc00 0x200>; @@ -465,6 +481,38 @@ }; }; + ebi { + pinctrl_ebi_data_0_7: ebi-data-lsb-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_data_8_15: ebi-data-msb-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_addr_nand: ebi-addr-0 { + atmel,pins = + ; + }; + }; + usart0 { pinctrl_usart0: usart0-0 { atmel,pins = @@ -551,34 +599,20 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_oe_we: nand-oe-we-0 { atmel,pins = - ; /* PD13 periph A Data bit 7 */ + ; }; - pinctrl_nand_16bits: nand_16bits-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PD21 periph A Data bit 15 */ + ; + }; + + pinctrl_nand_cs: nand-cs-0 { + atmel,pins = + ; }; }; @@ -1197,28 +1231,6 @@ }; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x40000000 0x10000000 - 0xffffe000 0x600 /* PMECC Registers */ - 0xffffe600 0x200 /* PMECC Error Location Registers */ - 0x00108000 0x18000 /* PMECC looup table in ROM code */ - >; - atmel,pmecc-lookup-table-offset = <0x0 0x8000>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 5 GPIO_ACTIVE_HIGH - &pioD 4 GPIO_ACTIVE_HIGH - 0 - >; - status = "disabled"; - }; - usb0: ohci@00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; @@ -1236,6 +1248,32 @@ clock-names = "usb_clk", "ehci_clk"; status = "disabled"; }; + + ebi: ebi@10000000 { + compatible = "atmel,at91sam9x5-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&smc>; + atmel,matrix = <&matrix>; + reg = <0x10000000 0x60000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x20000000 0x10000000 + 0x2 0x0 0x30000000 0x10000000 + 0x3 0x0 0x40000000 0x10000000 + 0x4 0x0 0x50000000 0x10000000 + 0x5 0x0 0x60000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,at91sam9g45-nand-controller"; + ecc-engine = <&pmecc>; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; }; i2c-gpio-0 { diff --git a/src/arm/at91sam9x5cm.dtsi b/src/arm/at91sam9x5cm.dtsi index b098ad8cd93a..bdeaa0b64a5b 100644 --- a/src/arm/at91sam9x5cm.dtsi +++ b/src/arm/at91sam9x5cm.dtsi @@ -37,38 +37,61 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; /* Enable PMECC */ - atmel,pmecc-cap = <2>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_addr_nand + &pinctrl_ebi_data_0_7>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_oe_we + &pinctrl_nand_cs + &pinctrl_nand_rb>; + pinctrl-names = "default"; - uboot@40000 { - label = "u-boot"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <2>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; - ubootenv@c0000 { - label = "U-Boot Env"; - reg = <0xc0000 0x140000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x1f800000>; + uboot@40000 { + label = "u-boot"; + reg = <0x40000 0x80000>; + }; + + ubootenv@c0000 { + label = "U-Boot Env"; + reg = <0xc0000 0x140000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x1f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/axp209.dtsi b/src/arm/axp209.dtsi index 9677dd5cf6b6..3c8fa26e87b7 100644 --- a/src/arm/axp209.dtsi +++ b/src/arm/axp209.dtsi @@ -64,6 +64,11 @@ #gpio-cells = <2>; }; + battery_power_supply: battery-power-supply { + compatible = "x-powers,axp209-battery-power-supply"; + status = "disabled"; + }; + regulators { /* Default work frequency for buck regulators */ x-powers,dcdc-freq = <1500>; diff --git a/src/arm/axp22x.dtsi b/src/arm/axp22x.dtsi index 67331c5f1714..87fb08e812ec 100644 --- a/src/arm/axp22x.dtsi +++ b/src/arm/axp22x.dtsi @@ -57,6 +57,11 @@ status = "disabled"; }; + battery_power_supply: battery-power-supply { + compatible = "x-powers,axp221-battery-power-supply"; + status = "disabled"; + }; + regulators { /* Default work frequency for buck regulators */ x-powers,dcdc-freq = <3000>; diff --git a/src/arm/bcm-cygnus.dtsi b/src/arm/bcm-cygnus.dtsi index 9644fddb5e3c..bf8c83815753 100644 --- a/src/arm/bcm-cygnus.dtsi +++ b/src/arm/bcm-cygnus.dtsi @@ -142,6 +142,55 @@ interrupts = <0>; }; + mdio: mdio@18002000 { + compatible = "brcm,iproc-mdio"; + reg = <0x18002000 0x8>; + #size-cells = <1>; + #address-cells = <0>; + status = "disabled"; + + gphy0: ethernet-phy@0 { + reg = <0>; + }; + + gphy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + switch: switch@18007000 { + compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab"; + reg = <0x18007000 0x1000>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-handle = <&gphy0>; + phy-mode = "rgmii"; + }; + + port@1 { + reg = <1>; + phy-handle = <&gphy1>; + phy-mode = "rgmii"; + }; + + port@8 { + reg = <8>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + i2c0: i2c@18008000 { compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; reg = <0x18008000 0x100>; @@ -295,6 +344,15 @@ status = "disabled"; }; + eth0: ethernet@18042000 { + compatible = "brcm,amac"; + reg = <0x18042000 0x1000>, + <0x18110000 0x1000>; + reg-names = "amac_base", "idm_base"; + interrupts = ; + status = "disabled"; + }; + nand: nand@18046000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x18046000 0x600>, <0xf8105408 0x600>, @@ -386,6 +444,19 @@ status = "disabled"; }; + v3d: v3d@180a2000 { + compatible = "brcm,cygnus-v3d"; + reg = <0x180a2000 0x1000>; + clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + clock-names = "v3d_clk"; + interrupts = ; + status = "disabled"; + }; + + vc4: gpu { + compatible = "brcm,cygnus-vc4"; + }; + adc: adc@180a6000 { compatible = "brcm,iproc-static-adc"; #io-channel-cells = <1>; diff --git a/src/arm/bcm-nsp.dtsi b/src/arm/bcm-nsp.dtsi index fe6cba994a97..7204d1def23d 100644 --- a/src/arm/bcm-nsp.dtsi +++ b/src/arm/bcm-nsp.dtsi @@ -413,6 +413,12 @@ <0x3f408 0x04>; }; + thermal: thermal@3f2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x3f2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + sata_phy: sata_phy@40100 { compatible = "brcm,iproc-nsp-sata-phy"; reg = <0x40100 0x340>; @@ -563,4 +569,24 @@ brcm,pcie-msi-inten; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + coefficients = <(-556) 418000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; }; diff --git a/src/arm/bcm2835-rpi-zero.dts b/src/arm/bcm2835-rpi-zero.dts index cc8b832c4c78..79a20d520931 100644 --- a/src/arm/bcm2835-rpi-zero.dts +++ b/src/arm/bcm2835-rpi-zero.dts @@ -12,7 +12,7 @@ /dts-v1/; #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" -#include "bcm283x-rpi-usb-host.dtsi" +#include "bcm283x-rpi-usb-otg.dtsi" / { compatible = "raspberrypi,model-zero", "brcm,bcm2835"; diff --git a/src/arm/bcm2835-rpi.dtsi b/src/arm/bcm2835-rpi.dtsi index a7b5ce133784..e55b362b9d6e 100644 --- a/src/arm/bcm2835-rpi.dtsi +++ b/src/arm/bcm2835-rpi.dtsi @@ -65,13 +65,13 @@ &sdhci { pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio48>; - status = "okay"; bus-width = <4>; }; &sdhost { pinctrl-names = "default"; pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; bus-width = <4>; }; diff --git a/src/arm/bcm2835.dtsi b/src/arm/bcm2835.dtsi index 0890d97e674d..659b6e9513b1 100644 --- a/src/arm/bcm2835.dtsi +++ b/src/arm/bcm2835.dtsi @@ -24,6 +24,10 @@ }; }; +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + /* enable thermal sensor with the correct compatible property set */ &thermal { compatible = "brcm,bcm2835-thermal"; diff --git a/src/arm/bcm2836.dtsi b/src/arm/bcm2836.dtsi index 519a44f5d25a..da3deeb42592 100644 --- a/src/arm/bcm2836.dtsi +++ b/src/arm/bcm2836.dtsi @@ -77,6 +77,10 @@ interrupts = <8>; }; +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + /* enable thermal sensor with the correct compatible property set */ &thermal { compatible = "brcm,bcm2836-thermal"; diff --git a/src/arm/bcm2837-rpi-3-b.dts b/src/arm/bcm2837-rpi-3-b.dts new file mode 100644 index 000000000000..c72a27d908b6 --- /dev/null +++ b/src/arm/bcm2837-rpi-3-b.dts @@ -0,0 +1 @@ +#include "arm64/broadcom/bcm2837-rpi-3-b.dts" diff --git a/src/arm/bcm283x-rpi-usb-otg.dtsi b/src/arm/bcm283x-rpi-usb-otg.dtsi new file mode 100644 index 000000000000..e7d217c967a1 --- /dev/null +++ b/src/arm/bcm283x-rpi-usb-otg.dtsi @@ -0,0 +1,10 @@ +&usb { + dr_mode = "otg"; + g-rx-fifo-size = <256>; + g-np-tx-fifo-size = <32>; + /* + * According to dwc2 the sum of all device EP + * fifo sizes shouldn't exceed 3776 bytes. + */ + g-tx-fifo-size = <256 256 512 512 512 768 768>; +}; diff --git a/src/arm/bcm283x.dtsi b/src/arm/bcm283x.dtsi index 9444a9a9ba10..431dcfc900c0 100644 --- a/src/arm/bcm283x.dtsi +++ b/src/arm/bcm283x.dtsi @@ -24,6 +24,26 @@ bootargs = "earlyprintk console=ttyAMA0"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <80000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -435,6 +455,7 @@ compatible = "brcm,bcm2835-thermal"; reg = <0x7e212000 0x8>; clocks = <&clocks BCM2835_CLOCK_TSENS>; + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -573,6 +594,8 @@ #size-cells = <0>; clocks = <&clk_usb>; clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; }; v3d: v3d@7ec00000 { @@ -608,4 +631,8 @@ clock-frequency = <480000000>; }; }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; + }; }; diff --git a/src/arm/bcm5301x.dtsi b/src/arm/bcm5301x.dtsi index acee36a61004..98647d22b291 100644 --- a/src/arm/bcm5301x.dtsi +++ b/src/arm/bcm5301x.dtsi @@ -320,6 +320,14 @@ }; }; + mdio: mdio@18003000 { + compatible = "brcm,iproc-mdio"; + reg = <0x18003000 0x8>; + #size-cells = <1>; + #address-cells = <0>; + status = "disabled"; + }; + i2c0: i2c@18009000 { compatible = "brcm,iproc-i2c"; reg = <0x18009000 0x50>; @@ -349,6 +357,12 @@ "sata2"; }; + thermal: thermal@1800c2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x1800c2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + srab: srab@18007000 { compatible = "brcm,bcm5301x-srab"; reg = <0x18007000 0x1000>; @@ -412,4 +426,24 @@ status = "disabled"; }; }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + coefficients = <(-556) 418000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; }; diff --git a/src/arm/bcm911360_entphn.dts b/src/arm/bcm911360_entphn.dts index 8b3800f46288..000f5f19215e 100644 --- a/src/arm/bcm911360_entphn.dts +++ b/src/arm/bcm911360_entphn.dts @@ -57,6 +57,26 @@ }; }; +ð0 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&v3d { + assigned-clocks = + <&mipipll BCM_CYGNUS_MIPIPLL>, + <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + assigned-clock-rates = <525000000>, <300000000>; + status = "okay"; +}; + &uart3 { status = "okay"; }; diff --git a/src/arm/da850-evm.dts b/src/arm/da850-evm.dts index 8d244cd76c36..67e72bc72e80 100644 --- a/src/arm/da850-evm.dts +++ b/src/arm/da850-evm.dts @@ -82,6 +82,8 @@ tca6416: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; }; }; wdt: wdt@21000 { @@ -299,25 +301,4 @@ pinctrl-names = "default"; pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; status = "okay"; - - /* VPIF capture port */ - port@0 { - vpif_input_ch0: endpoint@0 { - reg = <0>; - bus-width = <8>; - }; - - vpif_input_ch1: endpoint@1 { - reg = <1>; - bus-width = <8>; - data-shift = <8>; - }; - }; - - /* VPIF display port */ - port@1 { - vpif_output_ch0: endpoint { - bus-width = <8>; - }; - }; }; diff --git a/src/arm/da850-lcdk.dts b/src/arm/da850-lcdk.dts index b837fec70eec..a0f0916156e6 100644 --- a/src/arm/da850-lcdk.dts +++ b/src/arm/da850-lcdk.dts @@ -318,11 +318,4 @@ pinctrl-names = "default"; pinctrl-0 = <&vpif_capture_pins>; status = "okay"; - - /* VPIF capture port */ - port { - vpif_ch0: endpoint { - bus-width = <8>; - }; - }; }; diff --git a/src/arm/da850-lego-ev3.dts b/src/arm/da850-lego-ev3.dts index 512604ad8b71..45983c04a8a7 100644 --- a/src/arm/da850-lego-ev3.dts +++ b/src/arm/da850-lego-ev3.dts @@ -172,6 +172,18 @@ gpio = <&gpio 111 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + /* + * The EV3 can use 6-AA batteries or a rechargeable Li-ion battery pack. + */ + battery { + pinctrl-names = "default"; + pintctrl-0 = <&battery_pins>; + compatible = "lego,ev3-battery"; + io-channels = <&adc 4>, <&adc 3>; + io-channel-names = "voltage", "current"; + rechargeable-gpios = <&gpio 136 GPIO_ACTIVE_LOW>; + }; }; &pmx_core { @@ -228,6 +240,15 @@ 0x34 0x00000008 0x0000000f >; }; + + battery_pins: pinmux_battery_pins { + pinctrl-single,bits = < + /* GP0[6] */ + 0x04 0x00000080 0x000000f0 + /* GP8[8] */ + 0x4c 0x00000080 0x000000f0 + >; + }; }; &pinconf { @@ -342,6 +363,13 @@ &gpio { status = "okay"; + + /* Don't pull down battery voltage adc io channel */ + batt_volt_en { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-low; + }; }; &usb_phy { diff --git a/src/arm/da850.dtsi b/src/arm/da850.dtsi index 941d455000a7..af68ef7b0caa 100644 --- a/src/arm/da850.dtsi +++ b/src/arm/da850.dtsi @@ -446,13 +446,38 @@ }; usb0: usb@200000 { compatible = "ti,da830-musb"; - reg = <0x200000 0x10000>; + reg = <0x200000 0x1000>; + ranges; interrupts = <58>; interrupt-names = "mc"; dr_mode = "otg"; phys = <&usb_phy 0>; phy-names = "usb-phy"; status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + dmas = <&cppi41dma 0 0 &cppi41dma 1 0 + &cppi41dma 2 0 &cppi41dma 3 0 + &cppi41dma 0 1 &cppi41dma 1 1 + &cppi41dma 2 1 &cppi41dma 3 1>; + dma-names = + "rx1", "rx2", "rx3", "rx4", + "tx1", "tx2", "tx3", "tx4"; + + cppi41dma: dma-controller@201000 { + compatible = "ti,da830-cppi41"; + reg = <0x201000 0x1000 + 0x202000 0x1000 + 0x204000 0x4000>; + reg-names = "controller", + "scheduler", "queuemgr"; + interrupts = <58>; + #dma-cells = <2>; + #dma-channels = <4>; + status = "okay"; + }; }; sata: sata@218000 { compatible = "ti,da850-ahci"; @@ -503,6 +528,8 @@ ti,ngpio = <144>; ti,davinci-gpio-unbanked = <0>; status = "disabled"; + interrupt-controller; + #interrupt-cells = <2>; }; pinconf: pin-controller@22c00c { compatible = "ti,da850-pupd"; diff --git a/src/arm/dm8168-evm.dts b/src/arm/dm8168-evm.dts index 1865976db5f9..c72a2132aa82 100644 --- a/src/arm/dm8168-evm.dts +++ b/src/arm/dm8168-evm.dts @@ -68,6 +68,34 @@ DM816X_IOPAD(0x0d08, MUX_MODE0) /* USB1_DRVVBUS */ >; }; + + nandflash_pins: nandflash_pins { + pinctrl-single,pins = < + DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0) /* PINCTRL207 GPMC_CS0*/ + DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0) /* PINCTRL217 GPMC_ADV_ALE */ + DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0) /* PINCTRL214 GPMC_OE_RE */ + DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0) /* PINCTRL215 GPMC_BE0_CLE */ + DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0) /* PINCTRL213 GPMC_WE */ + DM816X_IOPAD(0x0b6c, MUX_MODE0) /* PINCTRL220 GPMC_WAIT */ + DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0) /* PINCTRL250 GPMC_CLK */ + DM816X_IOPAD(0x0ba4, MUX_MODE0) /* PINCTRL234 GPMC_D0 */ + DM816X_IOPAD(0x0ba8, MUX_MODE0) /* PINCTRL234 GPMC_D1 */ + DM816X_IOPAD(0x0bac, MUX_MODE0) /* PINCTRL234 GPMC_D2 */ + DM816X_IOPAD(0x0bb0, MUX_MODE0) /* PINCTRL234 GPMC_D3 */ + DM816X_IOPAD(0x0bb4, MUX_MODE0) /* PINCTRL234 GPMC_D4 */ + DM816X_IOPAD(0x0bb8, MUX_MODE0) /* PINCTRL234 GPMC_D5 */ + DM816X_IOPAD(0x0bbc, MUX_MODE0) /* PINCTRL234 GPMC_D6 */ + DM816X_IOPAD(0x0bc0, MUX_MODE0) /* PINCTRL234 GPMC_D7 */ + DM816X_IOPAD(0x0bc4, MUX_MODE0) /* PINCTRL234 GPMC_D8 */ + DM816X_IOPAD(0x0bc8, MUX_MODE0) /* PINCTRL234 GPMC_D9 */ + DM816X_IOPAD(0x0bcc, MUX_MODE0) /* PINCTRL234 GPMC_D10 */ + DM816X_IOPAD(0x0bd0, MUX_MODE0) /* PINCTRL234 GPMC_D11 */ + DM816X_IOPAD(0x0bd4, MUX_MODE0) /* PINCTRL234 GPMC_D12 */ + DM816X_IOPAD(0x0bd8, MUX_MODE0) /* PINCTRL234 GPMC_D13 */ + DM816X_IOPAD(0x0bdc, MUX_MODE0) /* PINCTRL234 GPMC_D14 */ + DM816X_IOPAD(0x0be0, MUX_MODE0) /* PINCTRL234 GPMC_D15 */ + >; + }; }; &i2c1 { @@ -90,6 +118,8 @@ &gpmc { ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins>; nand@0,0 { compatible = "ti,omap2-nand"; @@ -98,9 +128,11 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ #address-cells = <1>; #size-cells = <1>; ti,nand-ecc-opt = "bch8"; + ti,elm-id = <&elm>; nand-bus-width = <16>; gpmc,device-width = <2>; gpmc,sync-clk-ps = <0>; @@ -164,7 +196,7 @@ vmmc-supply = <&vmmcsd_fixed>; bus-width = <4>; cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; }; /* At least dm8168-evm rev c won't support multipoint, later may */ diff --git a/src/arm/dm816x.dtsi b/src/arm/dm816x.dtsi index 59cbf958fcc3..566b2a8c8b96 100644 --- a/src/arm/dm816x.dtsi +++ b/src/arm/dm816x.dtsi @@ -145,7 +145,7 @@ }; elm: elm@48080000 { - compatible = "ti,816-elm"; + compatible = "ti,am3352-elm"; ti,hwmods = "elm"; reg = <0x48080000 0x2000>; interrupts = <4>; diff --git a/src/arm/dra7-evm.dts b/src/arm/dra7-evm.dts index 31a9e061ddd0..f47fc4daf062 100644 --- a/src/arm/dra7-evm.dts +++ b/src/arm/dra7-evm.dts @@ -529,7 +529,8 @@ }; &usb1 { - dr_mode = "peripheral"; + dr_mode = "otg"; + extcon = <&extcon_usb1>; }; &usb2 { diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index e7144662af45..0f0f6f58bd18 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -99,14 +99,14 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_wkup>; - opp_nom@1000000000 { + opp_nom-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1060000 850000 1150000>; opp-supported-hw = <0xFF 0x01>; opp-suspend; }; - opp_od@1176000000 { + opp_od-1176000000 { opp-hz = /bits/ 64 <1176000000>; opp-microvolt = <1160000 885000 1160000>; opp-supported-hw = <0xFF 0x02>; diff --git a/src/arm/dra71-evm.dts b/src/arm/dra71-evm.dts index 4d57a55473af..a6298eb56978 100644 --- a/src/arm/dra71-evm.dts +++ b/src/arm/dra71-evm.dts @@ -190,7 +190,7 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; - ti,impedance-control = <0x1f>; + ti,min-output-impedance; }; dp83867_1: ethernet-phy@3 { @@ -198,7 +198,7 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; - ti,impedance-control = <0x1f>; + ti,min-output-impedance; }; }; diff --git a/src/arm/dra72-evm-common.dtsi b/src/arm/dra72-evm-common.dtsi index ad24544adf0f..85780549bc26 100644 --- a/src/arm/dra72-evm-common.dtsi +++ b/src/arm/dra72-evm-common.dtsi @@ -392,7 +392,8 @@ }; &usb1 { - dr_mode = "peripheral"; + dr_mode = "otg"; + extcon = <&extcon_usb1>; }; &usb2 { diff --git a/src/arm/dra7xx-clocks.dtsi b/src/arm/dra7xx-clocks.dtsi index 3330738e4c6e..cf229dfabf61 100644 --- a/src/arm/dra7xx-clocks.dtsi +++ b/src/arm/dra7xx-clocks.dtsi @@ -338,6 +338,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>; reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>; + assigned-clocks = <&dpll_dsp_ck>; + assigned-clock-rates = <600000000>; }; dpll_dsp_m2_ck: dpll_dsp_m2_ck@244 { @@ -349,6 +351,8 @@ reg = <0x0244>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_dsp_m2_ck>; + assigned-clock-rates = <600000000>; }; iva_dpll_hs_clk_div: iva_dpll_hs_clk_div { @@ -372,6 +376,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>; reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; + assigned-clocks = <&dpll_iva_ck>; + assigned-clock-rates = <1165000000>; }; dpll_iva_m2_ck: dpll_iva_m2_ck@1b0 { @@ -383,6 +389,8 @@ reg = <0x01b0>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_iva_m2_ck>; + assigned-clock-rates = <388333334>; }; iva_dclk: iva_dclk { @@ -406,6 +414,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>; reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>; + assigned-clocks = <&dpll_gpu_ck>; + assigned-clock-rates = <1277000000>; }; dpll_gpu_m2_ck: dpll_gpu_m2_ck@2e8 { @@ -417,6 +427,8 @@ reg = <0x02e8>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_gpu_m2_ck>; + assigned-clock-rates = <425666667>; }; dpll_core_m2_ck: dpll_core_m2_ck@130 { @@ -659,6 +671,8 @@ reg = <0x0248>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_dsp_m3x2_ck>; + assigned-clock-rates = <400000000>; }; dpll_gmac_x2_ck: dpll_gmac_x2_ck { @@ -791,6 +805,8 @@ clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>; ti,bit-shift = <24>; reg = <0x0520>; + assigned-clocks = <&ipu1_gfclk_mux>; + assigned-clock-parents = <&dpll_core_h22x2_ck>; }; mcasp1_ahclkr_mux: mcasp1_ahclkr_mux@550 { @@ -1748,6 +1764,8 @@ clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>; ti,bit-shift = <24>; reg = <0x1220>; + assigned-clocks = <&gpu_core_gclk_mux>; + assigned-clock-parents = <&dpll_gpu_m2_ck>; }; gpu_hyd_gclk_mux: gpu_hyd_gclk_mux@1220 { @@ -1756,6 +1774,8 @@ clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>; ti,bit-shift = <26>; reg = <0x1220>; + assigned-clocks = <&gpu_hyd_gclk_mux>; + assigned-clock-parents = <&dpll_gpu_m2_ck>; }; l3instr_ts_gclk_div: l3instr_ts_gclk_div@e50 { diff --git a/src/arm/emev2.dtsi b/src/arm/emev2.dtsi index 0124faf175c8..42ea246e71cb 100644 --- a/src/arm/emev2.dtsi +++ b/src/arm/emev2.dtsi @@ -197,7 +197,7 @@ clock-names = "sclk"; }; - pfc: pfc@e0140200 { + pfc: pin-controller@e0140200 { compatible = "renesas,pfc-emev2"; reg = <0xe0140200 0x100>; }; diff --git a/src/arm/ethernut5.dts b/src/arm/ethernut5.dts index 4687229a3ab9..123b203be06c 100644 --- a/src/arm/ethernut5.dts +++ b/src/arm/ethernut5.dts @@ -55,25 +55,38 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - gpios = <0 - &pioC 14 GPIO_ACTIVE_HIGH - 0 - >; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs>; + pinctrl-names = "default"; - root@0 { - label = "root"; - reg = <0x0 0x08000000>; - }; + nand: nand@3 { + reg = <0x3 0x0 0x800000>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - data@20000 { - label = "data"; - reg = <0x08000000 0x38000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + root@0 { + label = "root"; + reg = <0x0 0x08000000>; + }; + + data@20000 { + label = "data"; + reg = <0x08000000 0x38000000>; + }; + }; + }; }; }; diff --git a/src/arm/exynos3250-monk.dts b/src/arm/exynos3250-monk.dts index cccfe4b791d1..accee81da266 100644 --- a/src/arm/exynos3250-monk.dts +++ b/src/arm/exynos3250-monk.dts @@ -67,7 +67,7 @@ max77836: subpmic@25 { compatible = "maxim,max77836"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; reg = <0x25>; wakeup-source; @@ -191,7 +191,7 @@ s2mps14_pmic@66 { compatible = "samsung,s2mps14-pmic"; interrupt-parent = <&gpx0>; - interrupts = <7 0>; + interrupts = <7 IRQ_TYPE_NONE>; reg = <0x66>; wakeup-source; @@ -414,7 +414,7 @@ fuelgauge@36 { compatible = "maxim,max77836-battery"; interrupt-parent = <&gpx1>; - interrupts = <2 8>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; reg = <0x36>; }; }; diff --git a/src/arm/exynos3250-rinato.dts b/src/arm/exynos3250-rinato.dts index c9f191ca7b9c..443e0c98dc73 100644 --- a/src/arm/exynos3250-rinato.dts +++ b/src/arm/exynos3250-rinato.dts @@ -58,7 +58,7 @@ max77836: subpmic@25 { compatible = "maxim,max77836"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; reg = <0x25>; wakeup-source; @@ -240,7 +240,7 @@ reg = <0>; vdd3-supply = <&ldo16_reg>; vci-supply = <&ldo20_reg>; - reset-gpios = <&gpe0 1 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpe0 1 GPIO_ACTIVE_LOW>; te-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; power-on-delay= <30>; power-off-delay= <120>; @@ -295,7 +295,7 @@ s2mps14_pmic@66 { compatible = "samsung,s2mps14-pmic"; interrupt-parent = <&gpx0>; - interrupts = <7 0>; + interrupts = <7 IRQ_TYPE_NONE>; reg = <0x66>; wakeup-source; @@ -626,7 +626,7 @@ fuelgauge@36 { compatible = "maxim,max77836-battery"; interrupt-parent = <&gpx1>; - interrupts = <2 8>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; reg = <0x36>; }; }; diff --git a/src/arm/exynos4.dtsi b/src/arm/exynos4.dtsi index 497a9470c888..5739389f5bb8 100644 --- a/src/arm/exynos4.dtsi +++ b/src/arm/exynos4.dtsi @@ -59,6 +59,9 @@ compatible = "samsung,exynos4210-audss-clock"; reg = <0x03810000 0x0C>; #clock-cells = <1>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, + <&clock CLK_SCLK_AUDIO0>, <&clock CLK_SCLK_AUDIO0>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; }; i2s0: i2s@03830000 { diff --git a/src/arm/exynos4210-origen.dts b/src/arm/exynos4210-origen.dts index 312650e2450f..084fcc5574ef 100644 --- a/src/arm/exynos4210-origen.dts +++ b/src/arm/exynos4210-origen.dts @@ -151,7 +151,7 @@ compatible = "maxim,max8997-pmic"; reg = <0x66>; interrupt-parent = <&gpx0>; - interrupts = <4 0>, <3 0>; + interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>; max8997,pmic-buck1-dvs-voltage = <1350000>; max8997,pmic-buck2-dvs-voltage = <1100000>; diff --git a/src/arm/exynos4210-trats.dts b/src/arm/exynos4210-trats.dts index 1743ca850070..645feffb9239 100644 --- a/src/arm/exynos4210-trats.dts +++ b/src/arm/exynos4210-trats.dts @@ -281,7 +281,7 @@ compatible = "melfas,mms114"; reg = <0x48>; interrupt-parent = <&gpx0>; - interrupts = <4 2>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; x-size = <720>; y-size = <1280>; avdd-supply = <&tsp_reg>; @@ -302,7 +302,7 @@ reg = <0x66>; interrupt-parent = <&gpx0>; - interrupts = <7 0>; + interrupts = <7 IRQ_TYPE_NONE>; max8997,pmic-buck1-uses-gpio-dvs; max8997,pmic-buck2-uses-gpio-dvs; diff --git a/src/arm/exynos4412-odroid-common.dtsi b/src/arm/exynos4412-odroid-common.dtsi index 0f1ff792fe44..219d587c5a85 100644 --- a/src/arm/exynos4412-odroid-common.dtsi +++ b/src/arm/exynos4412-odroid-common.dtsi @@ -32,7 +32,7 @@ power_key { interrupt-parent = <&gpx1>; - interrupts = <3 0>; + interrupts = <3 IRQ_TYPE_NONE>; gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; linux,code = ; label = "power key"; @@ -266,7 +266,7 @@ max77686: pmic@09 { compatible = "maxim,max77686"; interrupt-parent = <&gpx3>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&max77686_irq>; reg = <0x09>; @@ -484,7 +484,7 @@ compatible = "maxim,max98090"; reg = <0x10>; interrupt-parent = <&gpx0>; - interrupts = <0 0>; + interrupts = <0 IRQ_TYPE_NONE>; clocks = <&i2s0 CLK_I2S_CDCLK>; clock-names = "mclk"; #sound-dai-cells = <0>; diff --git a/src/arm/exynos4412-odroidu3.dts b/src/arm/exynos4412-odroidu3.dts index 7504a5aa538e..44a4de08466b 100644 --- a/src/arm/exynos4412-odroidu3.dts +++ b/src/arm/exynos4412-odroidu3.dts @@ -78,6 +78,10 @@ regulator-max-microvolt = <3300000>; }; +&hdmicec { + needs-hpd; +}; + /* VDDQ for MSHC (eMMC card) */ &ldo22_reg { regulator-name = "LDO22_VDDQ_MMC4_2.8V"; diff --git a/src/arm/exynos4412-odroidx.dts b/src/arm/exynos4412-odroidx.dts index 46b931eec228..97882267ef09 100644 --- a/src/arm/exynos4412-odroidx.dts +++ b/src/arm/exynos4412-odroidx.dts @@ -44,7 +44,7 @@ home_key { interrupt-parent = <&gpx2>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_NONE>; gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>; linux,code = ; label = "home key"; diff --git a/src/arm/exynos4412-trats2.dts b/src/arm/exynos4412-trats2.dts index 82221a00444d..35e9b94b86b8 100644 --- a/src/arm/exynos4412-trats2.dts +++ b/src/arm/exynos4412-trats2.dts @@ -144,7 +144,7 @@ max77693@66 { compatible = "maxim,max77693"; interrupt-parent = <&gpx1>; - interrupts = <5 2>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; reg = <0x66>; regulators { @@ -224,7 +224,7 @@ compatible = "capella,cm36651"; reg = <0x18>; interrupt-parent = <&gpx0>; - interrupts = <2 2>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; vled-supply = <&ps_als_reg>; }; }; @@ -573,7 +573,7 @@ compatible = "melfas,mms114"; reg = <0x48>; interrupt-parent = <&gpm2>; - interrupts = <3 2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; x-size = <720>; y-size = <1280>; avdd-supply = <&ldo23_reg>; @@ -611,7 +611,7 @@ max77686: max77686_pmic@09 { compatible = "maxim,max77686"; interrupt-parent = <&gpx0>; - interrupts = <7 0>; + interrupts = <7 IRQ_TYPE_NONE>; reg = <0x09>; #clock-cells = <1>; diff --git a/src/arm/exynos5.dtsi b/src/arm/exynos5.dtsi index b74c5379ca26..66d22521c976 100644 --- a/src/arm/exynos5.dtsi +++ b/src/arm/exynos5.dtsi @@ -55,38 +55,38 @@ interrupt-controller; samsung,combiner-nr = <32>; reg = <0x10440000 0x1000>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>, - <0 4 IRQ_TYPE_LEVEL_HIGH>, - <0 5 IRQ_TYPE_LEVEL_HIGH>, - <0 6 IRQ_TYPE_LEVEL_HIGH>, - <0 7 IRQ_TYPE_LEVEL_HIGH>, - <0 8 IRQ_TYPE_LEVEL_HIGH>, - <0 9 IRQ_TYPE_LEVEL_HIGH>, - <0 10 IRQ_TYPE_LEVEL_HIGH>, - <0 11 IRQ_TYPE_LEVEL_HIGH>, - <0 12 IRQ_TYPE_LEVEL_HIGH>, - <0 13 IRQ_TYPE_LEVEL_HIGH>, - <0 14 IRQ_TYPE_LEVEL_HIGH>, - <0 15 IRQ_TYPE_LEVEL_HIGH>, - <0 16 IRQ_TYPE_LEVEL_HIGH>, - <0 17 IRQ_TYPE_LEVEL_HIGH>, - <0 18 IRQ_TYPE_LEVEL_HIGH>, - <0 19 IRQ_TYPE_LEVEL_HIGH>, - <0 20 IRQ_TYPE_LEVEL_HIGH>, - <0 21 IRQ_TYPE_LEVEL_HIGH>, - <0 22 IRQ_TYPE_LEVEL_HIGH>, - <0 23 IRQ_TYPE_LEVEL_HIGH>, - <0 24 IRQ_TYPE_LEVEL_HIGH>, - <0 25 IRQ_TYPE_LEVEL_HIGH>, - <0 26 IRQ_TYPE_LEVEL_HIGH>, - <0 27 IRQ_TYPE_LEVEL_HIGH>, - <0 28 IRQ_TYPE_LEVEL_HIGH>, - <0 29 IRQ_TYPE_LEVEL_HIGH>, - <0 30 IRQ_TYPE_LEVEL_HIGH>, - <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; }; gic: interrupt-controller@10481000 { @@ -109,31 +109,31 @@ serial_0: serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; - interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; serial_1: serial@12C10000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C10000 0x100>; - interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; serial_2: serial@12C20000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C20000 0x100>; - interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; serial_3: serial@12C30000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C30000 0x100>; - interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; i2c_0: i2c@12C60000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -143,7 +143,7 @@ i2c_1: i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; - interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -153,7 +153,7 @@ i2c_2: i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; - interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -163,7 +163,7 @@ i2c_3: i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; - interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -180,8 +180,8 @@ rtc: rtc@101E0000 { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; - interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>, - <0 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; status = "disabled"; }; diff --git a/src/arm/exynos5250-arndale.dts b/src/arm/exynos5250-arndale.dts index 6098dacd09f1..6a432460eb77 100644 --- a/src/arm/exynos5250-arndale.dts +++ b/src/arm/exynos5250-arndale.dts @@ -14,7 +14,6 @@ #include #include #include "exynos5250.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Arndale evaluation board based on EXYNOS5250"; diff --git a/src/arm/exynos5250-pinctrl.dtsi b/src/arm/exynos5250-pinctrl.dtsi index 2f6ab32b5954..1fd122db18e6 100644 --- a/src/arm/exynos5250-pinctrl.dtsi +++ b/src/arm/exynos5250-pinctrl.dtsi @@ -589,6 +589,13 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + hdmi_cec: hdmi-cec { + samsung,pins = "gpx3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_1 { diff --git a/src/arm/exynos5250-smdk5250.dts b/src/arm/exynos5250-smdk5250.dts index a97a785ccc6b..6632f657394e 100644 --- a/src/arm/exynos5250-smdk5250.dts +++ b/src/arm/exynos5250-smdk5250.dts @@ -13,7 +13,6 @@ #include #include #include "exynos5250.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; diff --git a/src/arm/exynos5250-snow-common.dtsi b/src/arm/exynos5250-snow-common.dtsi index 8f3a80430748..e1d293dbbe5d 100644 --- a/src/arm/exynos5250-snow-common.dtsi +++ b/src/arm/exynos5250-snow-common.dtsi @@ -272,6 +272,10 @@ vdd_pll-supply = <&ldo8_reg>; }; +&hdmicec { + status = "okay"; +}; + &i2c_0 { status = "okay"; samsung,i2c-sda-delay = <100>; diff --git a/src/arm/exynos5250-spring.dts b/src/arm/exynos5250-spring.dts index 4d7bdb735ed3..95c3bcace9dc 100644 --- a/src/arm/exynos5250-spring.dts +++ b/src/arm/exynos5250-spring.dts @@ -14,7 +14,6 @@ #include #include #include "exynos5250.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Spring"; diff --git a/src/arm/exynos5250.dtsi b/src/arm/exynos5250.dtsi index 79c9c885613a..8dbeb873e99c 100644 --- a/src/arm/exynos5250.dtsi +++ b/src/arm/exynos5250.dtsi @@ -153,10 +153,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; + interrupts = , + , + , + ; /* * Unfortunately we need this since some versions * of U-Boot on Exynos don't set the CNTFRQ register, @@ -689,6 +689,19 @@ samsung,syscon-phandle = <&pmu_system_controller>; }; + hdmicec: cec@101B0000 { + compatible = "samsung,s5p-cec"; + reg = <0x101B0000 0x200>; + interrupts = ; + clocks = <&clock CLK_HDMI_CEC>; + clock-names = "hdmicec"; + samsung,syscon-phandle = <&pmu_system_controller>; + hdmi-phandle = <&hdmi>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "disabled"; + }; + mixer@14450000 { compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; diff --git a/src/arm/exynos5420-arndale-octa.dts b/src/arm/exynos5420-arndale-octa.dts index 9cc83c51c925..ee1bb9b8b366 100644 --- a/src/arm/exynos5420-arndale-octa.dts +++ b/src/arm/exynos5420-arndale-octa.dts @@ -16,7 +16,6 @@ #include #include #include -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; diff --git a/src/arm/exynos5420-peach-pit.dts b/src/arm/exynos5420-peach-pit.dts index 1f964ec35c5e..f9a75bfd3f2b 100644 --- a/src/arm/exynos5420-peach-pit.dts +++ b/src/arm/exynos5420-peach-pit.dts @@ -16,7 +16,6 @@ #include #include "exynos5420.dtsi" #include "exynos5420-cpus.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Peach Pit Rev 6+"; @@ -604,7 +603,7 @@ max98090: codec@10 { compatible = "maxim,max98090"; reg = <0x10>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_NONE>; interrupt-parent = <&gpx0>; pinctrl-names = "default"; pinctrl-0 = <&max98090_irq>; @@ -945,7 +944,7 @@ cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&ec_spi_cs &ec_irq>; reg = <0>; diff --git a/src/arm/exynos5420-pinctrl.dtsi b/src/arm/exynos5420-pinctrl.dtsi index 3924b4fafe72..65aa0e300c23 100644 --- a/src/arm/exynos5420-pinctrl.dtsi +++ b/src/arm/exynos5420-pinctrl.dtsi @@ -67,6 +67,13 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + hdmi_cec: hdmi-cec { + samsung,pins = "gpx3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_1 { diff --git a/src/arm/exynos5420-smdk5420.dts b/src/arm/exynos5420-smdk5420.dts index aaccd0da41e5..08c8ab173e87 100644 --- a/src/arm/exynos5420-smdk5420.dts +++ b/src/arm/exynos5420-smdk5420.dts @@ -13,7 +13,6 @@ #include "exynos5420.dtsi" #include "exynos5420-cpus.dtsi" #include -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Samsung SMDK5420 board based on EXYNOS5420"; diff --git a/src/arm/exynos5420.dtsi b/src/arm/exynos5420.dtsi index 0db0bcf8da36..02d2f898efa6 100644 --- a/src/arm/exynos5420.dtsi +++ b/src/arm/exynos5420.dtsi @@ -193,7 +193,7 @@ mfc: codec@11000000 { compatible = "samsung,mfc-v7"; reg = <0x11000000 0x10000>; - interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_MFC>; clock-names = "mfc"; power-domains = <&mfc_pd>; @@ -203,7 +203,7 @@ mmc_0: mmc@12200000 { compatible = "samsung,exynos5420-dw-mshc-smu"; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; reg = <0x12200000 0x2000>; @@ -215,7 +215,7 @@ mmc_1: mmc@12210000 { compatible = "samsung,exynos5420-dw-mshc-smu"; - interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; reg = <0x12210000 0x2000>; @@ -227,7 +227,7 @@ mmc_2: mmc@12220000 { compatible = "samsung,exynos5420-dw-mshc"; - interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; reg = <0x12220000 0x1000>; @@ -325,37 +325,37 @@ pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13400000 0x1000>; - interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; }; pinctrl_1: pinctrl@13410000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13410000 0x1000>; - interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; pinctrl_2: pinctrl@14000000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x14000000 0x1000>; - interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; pinctrl_3: pinctrl@14010000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x14010000 0x1000>; - interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; pinctrl_4: pinctrl@03860000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x03860000 0x1000>; - interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; amba { @@ -368,7 +368,7 @@ adma: adma@03880000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x03880000 0x1000>; - interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock_audss EXYNOS_ADMA>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -379,7 +379,7 @@ pdma0: pdma@121A0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; - interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -390,7 +390,7 @@ pdma1: pdma@121B0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -401,7 +401,7 @@ mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; - interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_MDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -412,7 +412,7 @@ mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; - interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_MDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -484,7 +484,7 @@ spi_0: spi@12d20000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d20000 0x100>; - interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&pdma0 5 &pdma0 4>; dma-names = "tx", "rx"; @@ -500,7 +500,7 @@ spi_1: spi@12d30000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d30000 0x100>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&pdma1 5 &pdma1 4>; dma-names = "tx", "rx"; @@ -516,7 +516,7 @@ spi_2: spi@12d40000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d40000 0x100>; - interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&pdma0 7 &pdma0 6>; dma-names = "tx", "rx"; @@ -544,7 +544,7 @@ dsi@14500000 { compatible = "samsung,exynos5410-mipi-dsi"; reg = <0x14500000 0x10000>; - interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; phys = <&mipi_phy 1>; phy-names = "dsim"; clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>; @@ -557,7 +557,7 @@ adc: adc@12D10000 { compatible = "samsung,exynos-adc-v2"; reg = <0x12D10000 0x100>; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TSADC>; clock-names = "adc"; #io-channel-cells = <1>; @@ -569,7 +569,7 @@ hsi2c_8: i2c@12E00000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E00000 0x1000>; - interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -582,7 +582,7 @@ hsi2c_9: i2c@12E10000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E10000 0x1000>; - interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -595,7 +595,7 @@ hsi2c_10: i2c@12E20000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E20000 0x1000>; - interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -608,7 +608,7 @@ hdmi: hdmi@14530000 { compatible = "samsung,exynos5420-hdmi"; reg = <0x14530000 0x70000>; - interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, <&clock CLK_MOUT_HDMI>; @@ -624,10 +624,23 @@ reg = <0x145D0000 0x20>; }; + hdmicec: cec@101B0000 { + compatible = "samsung,s5p-cec"; + reg = <0x101B0000 0x200>; + interrupts = ; + clocks = <&clock CLK_HDMI_CEC>; + clock-names = "hdmicec"; + samsung,syscon-phandle = <&pmu_system_controller>; + hdmi-phandle = <&hdmi>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "disabled"; + }; + mixer: mixer@14450000 { compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; - interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>; clock-names = "mixer", "hdmi", "sclk_hdmi"; @@ -638,7 +651,7 @@ rotator: rotator@11C00000 { compatible = "samsung,exynos5250-rotator"; reg = <0x11C00000 0x64>; - interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_ROTATOR>; clock-names = "rotator"; iommus = <&sysmmu_rotator>; @@ -647,7 +660,7 @@ gsc_0: video-scaler@13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; - interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; power-domains = <&gsc_pd>; @@ -657,7 +670,7 @@ gsc_1: video-scaler@13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; - interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_GSCL1>; clock-names = "gscl"; power-domains = <&gsc_pd>; @@ -667,7 +680,7 @@ jpeg_0: jpeg@11F50000 { compatible = "samsung,exynos5420-jpeg"; reg = <0x11F50000 0x1000>; - interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "jpeg"; clocks = <&clock CLK_JPEG>; iommus = <&sysmmu_jpeg0>; @@ -676,7 +689,7 @@ jpeg_1: jpeg@11F60000 { compatible = "samsung,exynos5420-jpeg"; reg = <0x11F60000 0x1000>; - interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "jpeg"; clocks = <&clock CLK_JPEG2>; iommus = <&sysmmu_jpeg1>; @@ -696,7 +709,7 @@ tmu_cpu0: tmu@10060000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10060000 0x100>; - interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos5420-tmu-sensor-conf.dtsi" @@ -705,7 +718,7 @@ tmu_cpu1: tmu@10064000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10064000 0x100>; - interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos5420-tmu-sensor-conf.dtsi" @@ -714,7 +727,7 @@ tmu_cpu2: tmu@10068000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x10068000 0x100>, <0x1006c000 0x4>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos5420-tmu-sensor-conf.dtsi" @@ -723,7 +736,7 @@ tmu_cpu3: tmu@1006c000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x1006c000 0x100>, <0x100a0000 0x4>; - interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos5420-tmu-sensor-conf.dtsi" @@ -732,7 +745,7 @@ tmu_gpu: tmu@100a0000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x100a0000 0x100>, <0x10068000 0x4>; - interrupts = <0 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos5420-tmu-sensor-conf.dtsi" @@ -804,7 +817,7 @@ sysmmu_scaler1r: sysmmu@0x12890000 { compatible = "samsung,exynos-sysmmu"; reg = <0x12890000 0x1000>; - interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; #iommu-cells = <0>; @@ -813,7 +826,7 @@ sysmmu_scaler2r: sysmmu@0x128A0000 { compatible = "samsung,exynos-sysmmu"; reg = <0x128A0000 0x1000>; - interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; #iommu-cells = <0>; @@ -872,7 +885,7 @@ sysmmu_jpeg1: sysmmu@0x11F20000 { compatible = "samsung,exynos-sysmmu"; reg = <0x11F20000 0x1000>; - interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>; #iommu-cells = <0>; diff --git a/src/arm/exynos5422-odroidxu3-audio.dtsi b/src/arm/exynos5422-odroidxu3-audio.dtsi index 9493923ec652..c0b85981c6bf 100644 --- a/src/arm/exynos5422-odroidxu3-audio.dtsi +++ b/src/arm/exynos5422-odroidxu3-audio.dtsi @@ -49,7 +49,7 @@ compatible = "maxim,max98090"; reg = <0x10>; interrupt-parent = <&gpx3>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_NONE>; clocks = <&i2s0 CLK_I2S_CDCLK>; clock-names = "mclk"; #sound-dai-cells = <0>; diff --git a/src/arm/exynos5422-odroidxu3-common.dtsi b/src/arm/exynos5422-odroidxu3-common.dtsi index 05b9afdd6757..a183b56283f8 100644 --- a/src/arm/exynos5422-odroidxu3-common.dtsi +++ b/src/arm/exynos5422-odroidxu3-common.dtsi @@ -18,7 +18,6 @@ #include #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { memory@40000000 { @@ -265,6 +264,11 @@ vdd-supply = <&ldo6_reg>; }; +&hdmicec { + status = "okay"; + needs-hpd; +}; + &hsi2c_4 { status = "okay"; diff --git a/src/arm/exynos5440.dtsi b/src/arm/exynos5440.dtsi index a4ea018464fc..bc4954e69f7b 100644 --- a/src/arm/exynos5440.dtsi +++ b/src/arm/exynos5440.dtsi @@ -200,7 +200,7 @@ compatible = "snps,dwmac-3.70a", "snps,dwmac"; reg = <0x00230000 0x8000>; interrupt-parent = <&gic>; - interrupts = ; + interrupts = ; interrupt-names = "macirq"; phy-mode = "sgmii"; clocks = <&clock CLK_GMAC0>; diff --git a/src/arm/exynos5800-peach-pi.dts b/src/arm/exynos5800-peach-pi.dts index f9ff7f07ae0c..953dc8677dc8 100644 --- a/src/arm/exynos5800-peach-pi.dts +++ b/src/arm/exynos5800-peach-pi.dts @@ -16,7 +16,6 @@ #include #include "exynos5800.dtsi" #include "exynos5420-cpus.dtsi" -#include "exynos-mfc-reserved-memory.dtsi" / { model = "Google Peach Pi Rev 10+"; @@ -604,7 +603,7 @@ max98091: codec@10 { compatible = "maxim,max98091"; reg = <0x10>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_NONE>; interrupt-parent = <&gpx0>; pinctrl-names = "default"; pinctrl-0 = <&max98091_irq>; @@ -914,7 +913,7 @@ cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&ec_spi_cs &ec_irq>; reg = <0>; diff --git a/src/arm/ge863-pro3.dtsi b/src/arm/ge863-pro3.dtsi index 4aee5cc75fa4..8613944ea5c5 100644 --- a/src/arm/ge863-pro3.dtsi +++ b/src/arm/ge863-pro3.dtsi @@ -23,20 +23,39 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - boot@0 { - label = "boot"; - reg = <0x0 0x7c0000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - root@07c0000 { - label = "root"; - reg = <0x7c0000 0x7840000>; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + label = "boot"; + reg = <0x0 0x7c0000>; + }; + + root@07c0000 { + label = "root"; + reg = <0x7c0000 0x7840000>; + }; + }; + }; }; }; }; diff --git a/src/arm/gemini-nas4220b.dts b/src/arm/gemini-nas4220b.dts index 7668ba52158e..55f6a4f1f801 100644 --- a/src/arm/gemini-nas4220b.dts +++ b/src/arm/gemini-nas4220b.dts @@ -98,5 +98,15 @@ read-only; }; }; + + sata: sata@46000000 { + cortina,gemini-ata-muxmode = <0>; + cortina,gemini-enable-sata-bridge; + status = "okay"; + }; + + ata@63000000 { + status = "okay"; + }; }; }; diff --git a/src/arm/gemini-sq201.dts b/src/arm/gemini-sq201.dts index 46309e79cc7b..4d200f0bcd45 100644 --- a/src/arm/gemini-sq201.dts +++ b/src/arm/gemini-sq201.dts @@ -93,6 +93,12 @@ }; }; + sata: sata@46000000 { + cortina,gemini-ata-muxmode = <0>; + cortina,gemini-enable-sata-bridge; + status = "okay"; + }; + pci@50000000 { status = "okay"; interrupt-map-mask = <0xf800 0 0 7>; @@ -114,5 +120,9 @@ <0x6000 0 0 3 &pci_intc 1>, <0x6000 0 0 4 &pci_intc 2>; }; + + ata@63000000 { + status = "okay"; + }; }; }; diff --git a/src/arm/gemini.dtsi b/src/arm/gemini.dtsi index b8d011bdcc76..141d8d3a1d07 100644 --- a/src/arm/gemini.dtsi +++ b/src/arm/gemini.dtsi @@ -25,8 +25,11 @@ }; syscon: syscon@40000000 { - compatible = "cortina,gemini-syscon", "syscon", "simple-mfd"; + compatible = "cortina,gemini-syscon", + "syscon", "simple-mfd"; reg = <0x40000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; syscon-reboot { compatible = "syscon-reboot"; @@ -42,23 +45,30 @@ compatible = "cortina,gemini-watchdog"; reg = <0x41000000 0x1000>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon 23>; + clocks = <&syscon 2>; }; uart0: serial@42000000 { compatible = "ns16550a"; reg = <0x42000000 0x100>; - clock-frequency = <48000000>; + resets = <&syscon 18>; + clocks = <&syscon 6>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; }; timer@43000000 { - compatible = "cortina,gemini-timer"; + compatible = "faraday,fttmr010"; reg = <0x43000000 0x1000>; interrupt-parent = <&intcon>; interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */ <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */ <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */ + resets = <&syscon 17>; + /* APB clock or RTC clock */ + clocks = <&syscon 2>, <&syscon 0>; + clock-names = "PCLK", "EXTCLK"; syscon = <&syscon>; }; @@ -66,11 +76,28 @@ compatible = "cortina,gemini-rtc"; reg = <0x45000000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon 16>; + clocks = <&syscon 2>, <&syscon 0>; + clock-names = "PCLK", "EXTCLK"; + }; + + sata: sata@46000000 { + compatible = "cortina,gemini-sata-bridge"; + reg = <0x46000000 0x100>; + resets = <&syscon 26>, + <&syscon 27>; + reset-names = "sata0", "sata1"; + clocks = <&syscon 10>, + <&syscon 11>; + clock-names = "SATA0_PCLK", "SATA1_PCLK"; + syscon = <&syscon>; + status = "disabled"; }; intcon: interrupt-controller@48000000 { compatible = "faraday,ftintc010"; reg = <0x48000000 0x1000>; + resets = <&syscon 14>; interrupt-controller; #interrupt-cells = <2>; }; @@ -85,6 +112,8 @@ compatible = "cortina,gemini-gpio", "faraday,ftgpio010"; reg = <0x4d000000 0x100>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon 20>; + clocks = <&syscon 2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -95,6 +124,8 @@ compatible = "cortina,gemini-gpio", "faraday,ftgpio010"; reg = <0x4e000000 0x100>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon 21>; + clocks = <&syscon 2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -105,6 +136,8 @@ compatible = "cortina,gemini-gpio", "faraday,ftgpio010"; reg = <0x4f000000 0x100>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon 22>; + clocks = <&syscon 2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -118,6 +151,9 @@ * to configure the host bridge. */ reg = <0x50000000 0x100>; + resets = <&syscon 7>; + clocks = <&syscon 15>, <&syscon 4>; + clock-names = "PCLK", "PCICLK"; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; @@ -152,5 +188,44 @@ #interrupt-cells = <1>; }; }; + + ata@63000000 { + compatible = "cortina,gemini-pata", "faraday,ftide010"; + reg = <0x63000000 0x1000>; + interrupts = <4 IRQ_TYPE_EDGE_RISING>; + resets = <&syscon 2>; + clocks = <&syscon 14>; + clock-names = "PCLK"; + sata = <&sata>; + status = "disabled"; + }; + + ata@63400000 { + compatible = "cortina,gemini-pata", "faraday,ftide010"; + reg = <0x63400000 0x1000>; + interrupts = <5 IRQ_TYPE_EDGE_RISING>; + resets = <&syscon 2>; + clocks = <&syscon 14>; + clock-names = "PCLK"; + sata = <&sata>; + status = "disabled"; + }; + + dma-controller@67000000 { + compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell"; + /* Faraday Technology FTDMAC020 variant */ + arm,primecell-periphid = <0x0003b080>; + reg = <0x67000000 0x1000>; + interrupts = <9 IRQ_TYPE_EDGE_RISING>; + resets = <&syscon 10>; + clocks = <&syscon 1>; + clock-names = "apb_pclk"; + /* Bus interface AHB1 (AHB0) is totally tilted */ + lli-bus-interface-ahb2; + mem-bus-interface-ahb2; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; }; }; diff --git a/src/arm/imx23-sansa.dts b/src/arm/imx23-sansa.dts index 4ec32f4c7885..221fd55e967e 100644 --- a/src/arm/imx23-sansa.dts +++ b/src/arm/imx23-sansa.dts @@ -42,6 +42,7 @@ */ /dts-v1/; +#include #include "imx23.dtsi" / { @@ -149,9 +150,8 @@ regulator-name = "vdd-touchpad0"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - gpio = <&gpio0 26 0>; + gpio = <&gpio0 26 GPIO_ACTIVE_LOW>; regulator-always-on; - enable-active-low; }; reg_vdd_tuner: regulator-vdd-tuner0 { @@ -159,9 +159,8 @@ regulator-name = "vdd-tuner0"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - gpio = <&gpio0 29 0>; + gpio = <&gpio0 29 GPIO_ACTIVE_LOW>; regulator-always-on; - enable-active-low; }; backlight { diff --git a/src/arm/imx25-karo-tx25.dts b/src/arm/imx25-karo-tx25.dts index 9b31faa96377..30a62d4be8d9 100644 --- a/src/arm/imx25-karo-tx25.dts +++ b/src/arm/imx25-karo-tx25.dts @@ -97,7 +97,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; - phy-reset-gpios = <&gpio3 7 0>; + phy-reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; phy-mode = "rmii"; phy-supply = <®_fec_phy>; status = "okay"; diff --git a/src/arm/imx25-pdk.dts b/src/arm/imx25-pdk.dts index d921dd2ed676..c52692821fb1 100644 --- a/src/arm/imx25-pdk.dts +++ b/src/arm/imx25-pdk.dts @@ -125,7 +125,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-supply = <®_fec_3v3>; - phy-reset-gpios = <&gpio4 8 0>; + phy-reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx25.dtsi b/src/arm/imx25.dtsi index 0cdf333336cd..0ade3619f3c3 100644 --- a/src/arm/imx25.dtsi +++ b/src/arm/imx25.dtsi @@ -9,6 +9,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include #include "imx25-pinfunc.h" / { @@ -296,6 +297,7 @@ #address-cells = <1>; #size-cells = <1>; status = "disabled"; + ranges; adc: adc@50030800 { compatible = "fsl,imx25-gcq"; diff --git a/src/arm/imx27-phytec-phycard-s-som.dtsi b/src/arm/imx27-phytec-phycard-s-som.dtsi index 4f3e0f473581..0b8490b21a38 100644 --- a/src/arm/imx27-phytec-phycard-s-som.dtsi +++ b/src/arm/imx27-phytec-phycard-s-som.dtsi @@ -40,7 +40,7 @@ status = "okay"; at24@52 { - compatible = "at,24c32"; + compatible = "atmel,24c32"; pagesize = <32>; reg = <0x52>; }; diff --git a/src/arm/imx27-phytec-phycore-som.dtsi b/src/arm/imx27-phytec-phycore-som.dtsi index 82fec935ce83..c973c5d91875 100644 --- a/src/arm/imx27-phytec-phycore-som.dtsi +++ b/src/arm/imx27-phytec-phycore-som.dtsi @@ -193,7 +193,7 @@ status = "okay"; at24@52 { - compatible = "at,24c32"; + compatible = "atmel,24c32"; pagesize = <32>; reg = <0x52>; }; diff --git a/src/arm/imx28-cfa10037.dts b/src/arm/imx28-cfa10037.dts index e5beaa58bb40..3d13b321d27b 100644 --- a/src/arm/imx28-cfa10037.dts +++ b/src/arm/imx28-cfa10037.dts @@ -64,7 +64,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a &mac0_pins_cfa10037>; - phy-reset-gpios = <&gpio2 21 0>; + phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx28-cfa10049.dts b/src/arm/imx28-cfa10049.dts index a9c347e48bcf..4cd52d53cf00 100644 --- a/src/arm/imx28-cfa10049.dts +++ b/src/arm/imx28-cfa10049.dts @@ -327,7 +327,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a &mac0_pins_cfa10049>; - phy-reset-gpios = <&gpio2 21 0>; + phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx28-cfa10057.dts b/src/arm/imx28-cfa10057.dts index 7a80bd686c40..c6067915b238 100644 --- a/src/arm/imx28-cfa10057.dts +++ b/src/arm/imx28-cfa10057.dts @@ -162,7 +162,7 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; - phy-reset-gpios = <&gpio2 21 0>; + phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx28-cfa10058.dts b/src/arm/imx28-cfa10058.dts index f5c6dce34abe..70c7bb4a5a0e 100644 --- a/src/arm/imx28-cfa10058.dts +++ b/src/arm/imx28-cfa10058.dts @@ -129,7 +129,7 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; - phy-reset-gpios = <&gpio2 21 0>; + phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx28-eukrea-mbmx287lc.dts b/src/arm/imx28-eukrea-mbmx287lc.dts index e773144e1e03..b61fd61eb1c7 100644 --- a/src/arm/imx28-eukrea-mbmx287lc.dts +++ b/src/arm/imx28-eukrea-mbmx287lc.dts @@ -31,7 +31,7 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac1_pins_a>; - phy-reset-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx28-evk.dts b/src/arm/imx28-evk.dts index a5ba669b4eaa..5309bb90d7d5 100644 --- a/src/arm/imx28-evk.dts +++ b/src/arm/imx28-evk.dts @@ -203,7 +203,7 @@ }; at24@51 { - compatible = "at24,24c32"; + compatible = "atmel,24c32"; pagesize = <32>; reg = <0x51>; }; @@ -262,7 +262,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; phy-supply = <®_fec_3v3>; - phy-reset-gpios = <&gpio4 13 0>; + phy-reset-gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx28-m28cu3.dts b/src/arm/imx28-m28cu3.dts index bb5329479c62..9d6c8fe28d74 100644 --- a/src/arm/imx28-m28cu3.dts +++ b/src/arm/imx28-m28cu3.dts @@ -188,7 +188,7 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; - phy-reset-gpios = <&gpio4 13 0>; + phy-reset-gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; diff --git a/src/arm/imx50-evk.dts b/src/arm/imx50-evk.dts index dba2d951aa15..98b5faa06e27 100644 --- a/src/arm/imx50-evk.dts +++ b/src/arm/imx50-evk.dts @@ -53,7 +53,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio4 12 0>; + phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx50.dtsi b/src/arm/imx50.dtsi index 2a98afcd8a4e..3747d80104f4 100644 --- a/src/arm/imx50.dtsi +++ b/src/arm/imx50.dtsi @@ -12,6 +12,7 @@ */ #include "imx50-pinfunc.h" +#include #include / { diff --git a/src/arm/imx51-apf51.dts b/src/arm/imx51-apf51.dts index e88b2a6be079..c83ac1600322 100644 --- a/src/arm/imx51-apf51.dts +++ b/src/arm/imx51-apf51.dts @@ -36,7 +36,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "mii"; - phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; status = "okay"; }; diff --git a/src/arm/imx53-mba53.dts b/src/arm/imx53-mba53.dts index 2e44d2aba14e..df705ba48897 100644 --- a/src/arm/imx53-mba53.dts +++ b/src/arm/imx53-mba53.dts @@ -195,7 +195,7 @@ }; &fec { - phy-reset-gpios = <&gpio7 6 0>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx53-qsb-common.dtsi b/src/arm/imx53-qsb-common.dtsi index 40b3e31935d0..683dcbe27cbd 100644 --- a/src/arm/imx53-qsb-common.dtsi +++ b/src/arm/imx53-qsb-common.dtsi @@ -344,7 +344,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 0>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx53-smd.dts b/src/arm/imx53-smd.dts index 472f6f0f55b3..33cb64fc8372 100644 --- a/src/arm/imx53-smd.dts +++ b/src/arm/imx53-smd.dts @@ -273,6 +273,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 0>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx53-tqma53.dtsi b/src/arm/imx53-tqma53.dtsi index 85972f2201c2..eecdc1c55eef 100644 --- a/src/arm/imx53-tqma53.dtsi +++ b/src/arm/imx53-tqma53.dtsi @@ -272,7 +272,7 @@ }; eeprom: 24c64@50 { - compatible = "at,24c64"; + compatible = "atmel,24c64"; pagesize = <32>; reg = <0x50>; }; diff --git a/src/arm/imx53-tx53.dtsi b/src/arm/imx53-tx53.dtsi index 3a3220141988..7807c1fa1101 100644 --- a/src/arm/imx53-tx53.dtsi +++ b/src/arm/imx53-tx53.dtsi @@ -201,7 +201,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; phy-handle = <&phy0>; mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ status = "okay"; diff --git a/src/arm/imx53-voipac-dmm-668.dtsi b/src/arm/imx53-voipac-dmm-668.dtsi index 524192cf6a0f..df8dafe2564d 100644 --- a/src/arm/imx53-voipac-dmm-668.dtsi +++ b/src/arm/imx53-voipac-dmm-668.dtsi @@ -137,7 +137,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio4 2 0>; + phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6dl-gw560x.dts b/src/arm/imx6dl-gw560x.dts new file mode 100644 index 000000000000..21bdfaf8df53 --- /dev/null +++ b/src/arm/imx6dl-gw560x.dts @@ -0,0 +1,55 @@ +/* + * Copyright 2017 Gateworks Corporation + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "imx6dl.dtsi" +#include "imx6qdl-gw560x.dtsi" + +/ { + model = "Gateworks Ventana i.MX6 DualLite/Solo GW560X"; + compatible = "gw,imx6dl-gw560x", "gw,ventana", "fsl,imx6dl"; +}; diff --git a/src/arm/imx6dl-riotboard.dts b/src/arm/imx6dl-riotboard.dts index 2cb72824e800..29b45f2e64e0 100644 --- a/src/arm/imx6dl-riotboard.dts +++ b/src/arm/imx6dl-riotboard.dts @@ -94,7 +94,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 31 0>; + phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; diff --git a/src/arm/imx6dl-sabrelite.dts b/src/arm/imx6dl-sabrelite.dts index 2f904527a097..33040761b253 100644 --- a/src/arm/imx6dl-sabrelite.dts +++ b/src/arm/imx6dl-sabrelite.dts @@ -48,3 +48,8 @@ model = "Freescale i.MX6 DualLite SABRE Lite Board"; compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl"; }; + +&ipu1_csi1_from_ipu1_csi1_mux { + clock-lanes = <0>; + data-lanes = <1 2>; +}; diff --git a/src/arm/imx6dl-sabresd.dts b/src/arm/imx6dl-sabresd.dts index 1e45f2f9d0b6..9607afe088fc 100644 --- a/src/arm/imx6dl-sabresd.dts +++ b/src/arm/imx6dl-sabresd.dts @@ -15,3 +15,8 @@ model = "Freescale i.MX6 DualLite SABRE Smart Device Board"; compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl"; }; + +&ipu1_csi1_from_ipu1_csi1_mux { + clock-lanes = <0>; + data-lanes = <1 2>; +}; diff --git a/src/arm/imx6dl.dtsi b/src/arm/imx6dl.dtsi index 7aa120fbdc71..8475e6cc59ac 100644 --- a/src/arm/imx6dl.dtsi +++ b/src/arm/imx6dl.dtsi @@ -100,6 +100,11 @@ }; }; + capture-subsystem { + compatible = "fsl,imx-capture-subsystem"; + ports = <&ipu1_csi0>, <&ipu1_csi1>; + }; + display-subsystem { compatible = "fsl,imx-display-subsystem"; ports = <&ipu1_di0>, <&ipu1_di1>; @@ -164,6 +169,116 @@ <&iomuxc 9 207 1>, <&iomuxc 10 206 1>, <&iomuxc 11 133 3>; }; +&gpr { + ipu1_csi0_mux: ipu1_csi0_mux@34 { + compatible = "video-mux"; + mux-controls = <&mux 0>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ipu1_csi0_mux_from_mipi_vc0: endpoint { + remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>; + }; + }; + + port@1 { + reg = <1>; + + ipu1_csi0_mux_from_mipi_vc1: endpoint { + remote-endpoint = <&mipi_vc1_to_ipu1_csi0_mux>; + }; + }; + + port@2 { + reg = <2>; + + ipu1_csi0_mux_from_mipi_vc2: endpoint { + remote-endpoint = <&mipi_vc2_to_ipu1_csi0_mux>; + }; + }; + + port@3 { + reg = <3>; + + ipu1_csi0_mux_from_mipi_vc3: endpoint { + remote-endpoint = <&mipi_vc3_to_ipu1_csi0_mux>; + }; + }; + + port@4 { + reg = <4>; + + ipu1_csi0_mux_from_parallel_sensor: endpoint { + }; + }; + + port@5 { + reg = <5>; + + ipu1_csi0_mux_to_ipu1_csi0: endpoint { + remote-endpoint = <&ipu1_csi0_from_ipu1_csi0_mux>; + }; + }; + }; + + ipu1_csi1_mux: ipu1_csi1_mux@34 { + compatible = "video-mux"; + mux-controls = <&mux 1>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ipu1_csi1_mux_from_mipi_vc0: endpoint { + remote-endpoint = <&mipi_vc0_to_ipu1_csi1_mux>; + }; + }; + + port@1 { + reg = <1>; + + ipu1_csi1_mux_from_mipi_vc1: endpoint { + remote-endpoint = <&mipi_vc1_to_ipu1_csi1_mux>; + }; + }; + + port@2 { + reg = <2>; + + ipu1_csi1_mux_from_mipi_vc2: endpoint { + remote-endpoint = <&mipi_vc2_to_ipu1_csi1_mux>; + }; + }; + + port@3 { + reg = <3>; + + ipu1_csi1_mux_from_mipi_vc3: endpoint { + remote-endpoint = <&mipi_vc3_to_ipu1_csi1_mux>; + }; + }; + + port@4 { + reg = <4>; + + ipu1_csi1_mux_from_parallel_sensor: endpoint { + }; + }; + + port@5 { + reg = <5>; + + ipu1_csi1_mux_to_ipu1_csi1: endpoint { + remote-endpoint = <&ipu1_csi1_from_ipu1_csi1_mux>; + }; + }; + }; +}; + &gpt { compatible = "fsl,imx6dl-gpt"; }; @@ -172,6 +287,12 @@ compatible = "fsl,imx6dl-hdmi"; }; +&ipu1_csi1 { + ipu1_csi1_from_ipu1_csi1_mux: endpoint { + remote-endpoint = <&ipu1_csi1_mux_to_ipu1_csi1>; + }; +}; + &ldb { clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, @@ -181,6 +302,74 @@ "di0", "di1"; }; +&mipi_csi { + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_vc0_to_ipu1_csi0_mux: endpoint@0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; + }; + + mipi_vc0_to_ipu1_csi1_mux: endpoint@1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>; + }; + }; + + port@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_vc1_to_ipu1_csi0_mux: endpoint@0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>; + }; + + mipi_vc1_to_ipu1_csi1_mux: endpoint@1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>; + }; + }; + + port@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_vc2_to_ipu1_csi0_mux: endpoint@0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>; + }; + + mipi_vc2_to_ipu1_csi1_mux: endpoint@1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>; + }; + }; + + port@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_vc3_to_ipu1_csi0_mux: endpoint@0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>; + }; + + mipi_vc3_to_ipu1_csi1_mux: endpoint@1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>; + }; + }; +}; + +&mux { + mux-reg-masks = <0x34 0x00000007>, /* IPU_CSI0_MUX */ + <0x34 0x00000038>, /* IPU_CSI1_MUX */ + <0x0c 0x0000000c>, /* HDMI_MUX_CTL */ + <0x0c 0x000000c0>, /* LVDS0_MUX_CTL */ + <0x0c 0x00000300>, /* LVDS1_MUX_CTL */ + <0x28 0x00000003>, /* DCIC1_MUX_CTL */ + <0x28 0x0000000c>; /* DCIC2_MUX_CTL */ +}; + &vpu { compatible = "fsl,imx6dl-vpu", "cnm,coda960"; }; diff --git a/src/arm/imx6q-ba16.dtsi b/src/arm/imx6q-ba16.dtsi index 14fa6b25dc45..5fcb0372d58b 100644 --- a/src/arm/imx6q-ba16.dtsi +++ b/src/arm/imx6q-ba16.dtsi @@ -321,7 +321,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; fsl,tx-swing-full = <103>; fsl,tx-swing-low = <103>; status = "okay"; diff --git a/src/arm/imx6q-cm-fx6.dts b/src/arm/imx6q-cm-fx6.dts index 66cac5328b86..fe6ab0aa34f9 100644 --- a/src/arm/imx6q-cm-fx6.dts +++ b/src/arm/imx6q-cm-fx6.dts @@ -64,6 +64,14 @@ }; }; + awnh387_pwrseq: pwrseq { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwrseq>; + compatible = "mmc-pwrseq-sd8787"; + powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; + }; + reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio { compatible = "regulator-fixed"; regulator-name = "regulator-pcie-power-on-gpio"; @@ -215,7 +223,7 @@ clock-frequency = <100000>; eeprom@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; @@ -304,6 +312,13 @@ >; }; + pinctrl_pwrseq: pwrseqgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 + >; + }; + pinctrl_spdif: spdifgrp { fsl,pins = < MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 @@ -330,6 +345,17 @@ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 >; }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; }; &pcie { @@ -382,3 +408,18 @@ dr_mode = "otg"; status = "okay"; }; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + mmc-pwrseq = <&awnh387_pwrseq>; + non-removable; + /* + * If the OS probes the Bluetooth AMP function advertised on this bus + * but the firmware in place does not support it, the WiFi/BT module + * gets unresponsive. + * Users who configured their OS properly can enable this node to gain + * WiFi and/or plain Bluetooth support. + */ + status = "disabled"; +}; diff --git a/src/arm/imx6q-dmo-edmqmx6.dts b/src/arm/imx6q-dmo-edmqmx6.dts index f28883bbe7b1..33eb7f180995 100644 --- a/src/arm/imx6q-dmo-edmqmx6.dts +++ b/src/arm/imx6q-dmo-edmqmx6.dts @@ -118,7 +118,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 25 0>; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; phy-supply = <&vgen2_1v2_eth>; status = "okay"; }; @@ -435,7 +435,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio4 8 0>; + reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6q-evi.dts b/src/arm/imx6q-evi.dts index fd2220aa49e2..1f0f950dc11e 100644 --- a/src/arm/imx6q-evi.dts +++ b/src/arm/imx6q-evi.dts @@ -135,7 +135,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 25 0>; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; diff --git a/src/arm/imx6q-gw5400-a.dts b/src/arm/imx6q-gw5400-a.dts index 8e84713f42c0..9dbeea05a949 100644 --- a/src/arm/imx6q-gw5400-a.dts +++ b/src/arm/imx6q-gw5400-a.dts @@ -19,7 +19,6 @@ /* these are used by bootloader for disabling nodes */ aliases { - ethernet1 = ð1; i2c0 = &i2c1; i2c1 = &i2c2; i2c2 = &i2c3; @@ -154,7 +153,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; - phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -347,10 +346,6 @@ &pcie { reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - }; }; &ssi1 { diff --git a/src/arm/imx6q-gw560x.dts b/src/arm/imx6q-gw560x.dts new file mode 100644 index 000000000000..735f2bbf1439 --- /dev/null +++ b/src/arm/imx6q-gw560x.dts @@ -0,0 +1,59 @@ +/* + * Copyright 2017 Gateworks Corporation + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "imx6q.dtsi" +#include "imx6qdl-gw560x.dtsi" + +/ { + model = "Gateworks Ventana i.MX6 Dual/Quad GW560X"; + compatible = "gw,imx6q-gw560x", "gw,ventana", "fsl,imx6q"; +}; + +&sata { + status = "okay"; +}; diff --git a/src/arm/imx6q-novena.dts b/src/arm/imx6q-novena.dts index 0fa32b2f3aec..d83cfb6ec598 100644 --- a/src/arm/imx6q-novena.dts +++ b/src/arm/imx6q-novena.dts @@ -217,7 +217,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_novena>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; rxc-skew-ps = <3000>; rxdv-skew-ps = <0>; txc-skew-ps = <3000>; @@ -446,7 +446,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie_novena>; - reset-gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6q-sabrelite.dts b/src/arm/imx6q-sabrelite.dts index 02a7cdfd57c9..dc51262e7b2f 100644 --- a/src/arm/imx6q-sabrelite.dts +++ b/src/arm/imx6q-sabrelite.dts @@ -52,3 +52,8 @@ &sata { status = "okay"; }; + +&ipu1_csi1_from_mipi_vc1 { + clock-lanes = <0>; + data-lanes = <1 2>; +}; diff --git a/src/arm/imx6q-sabresd.dts b/src/arm/imx6q-sabresd.dts index 9cbdfe7a0931..527772b62fee 100644 --- a/src/arm/imx6q-sabresd.dts +++ b/src/arm/imx6q-sabresd.dts @@ -23,3 +23,8 @@ &sata { status = "okay"; }; + +&ipu1_csi1_from_mipi_vc1 { + clock-lanes = <0>; + data-lanes = <1 2>; +}; diff --git a/src/arm/imx6q-utilite-pro.dts b/src/arm/imx6q-utilite-pro.dts index d900ad6ec5f8..16d5be1aeb3c 100644 --- a/src/arm/imx6q-utilite-pro.dts +++ b/src/arm/imx6q-utilite-pro.dts @@ -130,7 +130,7 @@ #size-cells = <0>; eeprom@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; diff --git a/src/arm/imx6q-zii-rdu2.dts b/src/arm/imx6q-zii-rdu2.dts index b2d346640fd7..6be8a1eea895 100644 --- a/src/arm/imx6q-zii-rdu2.dts +++ b/src/arm/imx6q-zii-rdu2.dts @@ -41,8 +41,8 @@ /dts-v1/; -#include -#include +#include "imx6q.dtsi" +#include "imx6qdl-zii-rdu2.dtsi" / { model = "ZII RDU2 Board"; diff --git a/src/arm/imx6q.dtsi b/src/arm/imx6q.dtsi index e9a5d0b8c7b0..90a741732f60 100644 --- a/src/arm/imx6q.dtsi +++ b/src/arm/imx6q.dtsi @@ -125,7 +125,7 @@ clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; - power-domains = <&gpc 1>; + power-domains = <&pd_pu>; }; ipu2: ipu@02800000 { @@ -143,10 +143,18 @@ ipu2_csi0: port@0 { reg = <0>; + + ipu2_csi0_from_mipi_vc2: endpoint { + remote-endpoint = <&mipi_vc2_to_ipu2_csi0>; + }; }; ipu2_csi1: port@1 { reg = <1>; + + ipu2_csi1_from_ipu2_csi1_mux: endpoint { + remote-endpoint = <&ipu2_csi1_mux_to_ipu2_csi1>; + }; }; ipu2_di0: port@2 { @@ -198,6 +206,11 @@ }; }; + capture-subsystem { + compatible = "fsl,imx-capture-subsystem"; + ports = <&ipu1_csi0>, <&ipu1_csi1>, <&ipu2_csi0>, <&ipu2_csi1>; + }; + display-subsystem { compatible = "fsl,imx-display-subsystem"; ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>; @@ -246,6 +259,68 @@ gpio-ranges = <&iomuxc 0 172 9>, <&iomuxc 9 189 2>, <&iomuxc 11 146 3>; }; +&gpr { + ipu1_csi0_mux { + compatible = "video-mux"; + mux-controls = <&mux 0>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ipu1_csi0_mux_from_mipi_vc0: endpoint { + remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>; + }; + }; + + port@1 { + reg = <1>; + + ipu1_csi0_mux_from_parallel_sensor: endpoint { + }; + }; + + port@2 { + reg = <2>; + + ipu1_csi0_mux_to_ipu1_csi0: endpoint { + remote-endpoint = <&ipu1_csi0_from_ipu1_csi0_mux>; + }; + }; + }; + + ipu2_csi1_mux { + compatible = "video-mux"; + mux-controls = <&mux 1>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ipu2_csi1_mux_from_mipi_vc3: endpoint { + remote-endpoint = <&mipi_vc3_to_ipu2_csi1_mux>; + }; + }; + + port@1 { + reg = <1>; + + ipu2_csi1_mux_from_parallel_sensor: endpoint { + }; + }; + + port@2 { + reg = <2>; + + ipu2_csi1_mux_to_ipu2_csi1: endpoint { + remote-endpoint = <&ipu2_csi1_from_ipu2_csi1_mux>; + }; + }; + }; +}; + &hdmi { compatible = "fsl,imx6q-hdmi"; @@ -266,6 +341,12 @@ }; }; +&ipu1_csi1 { + ipu1_csi1_from_mipi_vc1: endpoint { + remote-endpoint = <&mipi_vc1_to_ipu1_csi1>; + }; +}; + &ldb { clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, @@ -312,6 +393,40 @@ }; }; +&mipi_csi { + port@1 { + reg = <1>; + + mipi_vc0_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; + }; + }; + + port@2 { + reg = <2>; + + mipi_vc1_to_ipu1_csi1: endpoint { + remote-endpoint = <&ipu1_csi1_from_mipi_vc1>; + }; + }; + + port@3 { + reg = <3>; + + mipi_vc2_to_ipu2_csi0: endpoint { + remote-endpoint = <&ipu2_csi0_from_mipi_vc2>; + }; + }; + + port@4 { + reg = <4>; + + mipi_vc3_to_ipu2_csi1_mux: endpoint { + remote-endpoint = <&ipu2_csi1_mux_from_mipi_vc3>; + }; + }; +}; + &mipi_dsi { ports { port@2 { @@ -332,6 +447,16 @@ }; }; +&mux { + mux-reg-masks = <0x04 0x00080000>, /* MIPI_IPU1_MUX */ + <0x04 0x00100000>, /* MIPI_IPU2_MUX */ + <0x0c 0x0000000c>, /* HDMI_MUX_CTL */ + <0x0c 0x000000c0>, /* LVDS0_MUX_CTL */ + <0x0c 0x00000300>, /* LVDS1_MUX_CTL */ + <0x28 0x00000003>, /* DCIC1_MUX_CTL */ + <0x28 0x0000000c>; /* DCIC2_MUX_CTL */ +}; + &vpu { compatible = "fsl,imx6q-vpu", "cnm,coda960"; }; diff --git a/src/arm/imx6qdl-apf6dev.dtsi b/src/arm/imx6qdl-apf6dev.dtsi index 550e100e85fc..9cd2a7477ed7 100644 --- a/src/arm/imx6qdl-apf6dev.dtsi +++ b/src/arm/imx6qdl-apf6dev.dtsi @@ -232,7 +232,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio6 2 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6qdl-aristainetos.dtsi b/src/arm/imx6qdl-aristainetos.dtsi index b2debc0aa720..7d64075204ae 100644 --- a/src/arm/imx6qdl-aristainetos.dtsi +++ b/src/arm/imx6qdl-aristainetos.dtsi @@ -118,7 +118,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6qdl-aristainetos2.dtsi b/src/arm/imx6qdl-aristainetos2.dtsi index ec68f1cace31..1b1872873207 100644 --- a/src/arm/imx6qdl-aristainetos2.dtsi +++ b/src/arm/imx6qdl-aristainetos2.dtsi @@ -320,7 +320,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>; txd0-skew-ps = <0>; txd1-skew-ps = <0>; txd2-skew-ps = <0>; @@ -335,7 +335,7 @@ }; &pcie { - reset-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6qdl-colibri.dtsi b/src/arm/imx6qdl-colibri.dtsi index e8078758f26c..ad84eddb6836 100644 --- a/src/arm/imx6qdl-colibri.dtsi +++ b/src/arm/imx6qdl-colibri.dtsi @@ -254,6 +254,7 @@ clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; + lrclk-strength = <3>; }; /* STMPE811 touch screen controller */ diff --git a/src/arm/imx6qdl-gw53xx.dtsi b/src/arm/imx6qdl-gw53xx.dtsi index a208e7e0dc6e..5bc6ed1a5b35 100644 --- a/src/arm/imx6qdl-gw53xx.dtsi +++ b/src/arm/imx6qdl-gw53xx.dtsi @@ -14,7 +14,6 @@ / { /* these are used by bootloader for disabling nodes */ aliases { - ethernet1 = ð1; led0 = &led0; led1 = &led1; led2 = &led2; @@ -342,10 +341,6 @@ pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - }; }; &pwm2 { diff --git a/src/arm/imx6qdl-gw54xx.dtsi b/src/arm/imx6qdl-gw54xx.dtsi index 968fda94d14b..66fcf838e964 100644 --- a/src/arm/imx6qdl-gw54xx.dtsi +++ b/src/arm/imx6qdl-gw54xx.dtsi @@ -14,7 +14,6 @@ / { /* these are used by bootloader for disabling nodes */ aliases { - ethernet1 = ð1; led0 = &led0; led1 = &led1; led2 = &led2; @@ -379,10 +378,6 @@ pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - }; }; &pwm1 { diff --git a/src/arm/imx6qdl-gw560x.dtsi b/src/arm/imx6qdl-gw560x.dtsi new file mode 100644 index 000000000000..d894dde6e85d --- /dev/null +++ b/src/arm/imx6qdl-gw560x.dtsi @@ -0,0 +1,749 @@ +/* + * Copyright 2017 Gateworks Corporation + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +/ { + /* these are used by bootloader for disabling nodes */ + aliases { + led0 = &led0; + led1 = &led1; + led2 = &led2; + ssi0 = &ssi1; + usb0 = &usbh1; + usb1 = &usbotg; + }; + + chosen { + stdout-path = &uart2; + }; + + backlight-display { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 5000000>; + brightness-levels = < + 0 1 2 3 4 5 6 7 8 9 + 10 11 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27 28 29 + 30 31 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 48 49 + 50 51 52 53 54 55 56 57 58 59 + 60 61 62 63 64 65 66 67 68 69 + 70 71 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 88 89 + 90 91 92 93 94 95 96 97 98 99 + 100 + >; + default-brightness-level = <100>; + }; + + backlight-keypad { + compatible = "gpio-backlight"; + gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; + default-on; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led0: user1 { + label = "user1"; + gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ + default-state = "off"; + }; + + led2: user3 { + label = "user3"; + gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ + default-state = "off"; + }; + }; + + memory@10000000 { + reg = <0x10000000 0x40000000>; + }; + + pps { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pps>; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + }; + + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_5p0v: regulator-5p0v { + compatible = "regulator-fixed"; + regulator-name = "5P0V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_12p0v: regulator-12p0v { + compatible = "regulator-fixed"; + regulator-name = "12P0V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_1p4v: regulator-vddsoc { + compatible = "regulator-fixed"; + regulator-name = "vdd_soc"; + regulator-min-microvolt = <1400000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + sound { + compatible = "fsl,imx6q-ventana-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "sgtl5000-audio"; + ssi-controller = <&ssi1>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <4>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&ecspi3 { + cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan>; + status = "okay"; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + eeprom1: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; + + eeprom2: eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + pagesize = <16>; + }; + + eeprom3: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + pagesize = <16>; + }; + + eeprom4: eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + pagesize = <16>; + }; + + pca9555: gpio@23 { + compatible = "nxp,pca9555"; + reg = <0x23>; + gpio-controller; + #gpio-cells = <2>; + }; + + ds1672: rtc@68 { + compatible = "dallas,ds1672"; + reg = <0x68>; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks IMX6QDL_CLK_CKO>; + VDDA-supply = <®_1p8v>; + VDDIO-supply = <®_3p3v>; + }; + + tca8418: keypad@34 { + compatible = "ti,tca8418"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_keypad>; + reg = <0x34>; + interrupt-parent = <&gpio5>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0) + MATRIX_KEY(0x00, 0x00, BTN_1) + MATRIX_KEY(0x01, 0x01, BTN_2) + MATRIX_KEY(0x01, 0x00, BTN_3) + MATRIX_KEY(0x02, 0x00, BTN_4) + MATRIX_KEY(0x00, 0x03, BTN_5) + MATRIX_KEY(0x00, 0x02, BTN_6) + MATRIX_KEY(0x01, 0x03, BTN_7) + MATRIX_KEY(0x01, 0x02, BTN_8) + MATRIX_KEY(0x02, 0x02, BTN_9) + >; + keypad,num-rows = <4>; + keypad,num-columns = <4>; + }; + + ltc3676: pmic@3c { + compatible = "lltc,ltc3676"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + reg = <0x3c>; + interrupt-parent = <&gpio1>; + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; + + regulators { + /* VDD_DDR (1+R1/R2 = 2.105) */ + reg_vdd_ddr: sw2 { + regulator-name = "vddddr"; + regulator-min-microvolt = <868310>; + regulator-max-microvolt = <1684000>; + lltc,fb-voltage-divider = <221000 200000>; + regulator-ramp-delay = <7000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_ARM (1+R1/R2 = 1.931) */ + reg_vdd_arm: sw3 { + regulator-name = "vddarm"; + regulator-min-microvolt = <796551>; + regulator-max-microvolt = <1544827>; + lltc,fb-voltage-divider = <243000 261000>; + regulator-ramp-delay = <7000>; + regulator-boot-on; + regulator-always-on; + linux,phandle = <®_vdd_arm>; + }; + + /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ + reg_1p8v: sw4 { + regulator-name = "vdd1p8"; + regulator-min-microvolt = <1033310>; + regulator-max-microvolt = <2004000>; + lltc,fb-voltage-divider = <301000 200000>; + regulator-ramp-delay = <7000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */ + reg_1p0v: ldo2 { + regulator-name = "vdd1p0"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1050000>; + lltc,fb-voltage-divider = <78700 200000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_AUD_1P8: Audio codec */ + reg_aud_1p8v: ldo3 { + regulator-name = "vdd1p8a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + /* VDD_HIGH (1+R1/R2 = 4.17) */ + reg_3p0v: ldo4 { + regulator-name = "vdd3p0"; + regulator-min-microvolt = <3023250>; + regulator-max-microvolt = <3023250>; + lltc,fb-voltage-divider = <634000 200000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + egalax_ts: touchscreen@4 { + compatible = "eeti,egalax_ts"; + reg = <0x04>; + interrupt-parent = <&gpio5>; + interrupts = <12 IRQ_TYPE_EDGE_FALLING>; + wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + }; +}; + +&ldb { + fsl,dual-channel; + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <18>; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ + status = "disabled"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ + status = "disabled"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + uart-has-rtscts; + rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + /* AUD4 */ + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ + /* AUD6 */ + MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0 + MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0 + MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0 + MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0 + >; + }; + + pinctrl_ecspi3: escpi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ + >; + }; + + pinctrl_flexcan: flexcangrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */ + MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */ + MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */ + >; + }; + + pinctrl_keypad: keypadgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ + MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */ + >; + }; + + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */ + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ + >; + }; + + pinctrl_pps: ppsgrp { + fsl,pins = < + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */ + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */ + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 + MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9 + MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9 + MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9 + MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ + MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ + MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ + MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 + >; + }; +}; diff --git a/src/arm/imx6qdl-microsom-ar8035.dtsi b/src/arm/imx6qdl-microsom-ar8035.dtsi index a9b207751a02..900e8c781f91 100644 --- a/src/arm/imx6qdl-microsom-ar8035.dtsi +++ b/src/arm/imx6qdl-microsom-ar8035.dtsi @@ -46,7 +46,7 @@ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-mode = "rgmii"; phy-reset-duration = <2>; - phy-reset-gpios = <&gpio4 15 0>; + phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6qdl-nitrogen6_max.dtsi b/src/arm/imx6qdl-nitrogen6_max.dtsi index bad3c9f9eeac..b63134e3b51a 100644 --- a/src/arm/imx6qdl-nitrogen6_max.dtsi +++ b/src/arm/imx6qdl-nitrogen6_max.dtsi @@ -408,7 +408,7 @@ }; rtc: rtc@68 { - compatible = "st,rv4162"; + compatible = "microcrystal,rv4162"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rv4162>; reg = <0x68>; diff --git a/src/arm/imx6qdl-nitrogen6_som2.dtsi b/src/arm/imx6qdl-nitrogen6_som2.dtsi index 559da17297ef..a24e4f1911ab 100644 --- a/src/arm/imx6qdl-nitrogen6_som2.dtsi +++ b/src/arm/imx6qdl-nitrogen6_som2.dtsi @@ -326,7 +326,7 @@ }; rtc@68 { - compatible = "st,rv4162"; + compatible = "microcrystal,rv4162"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rv4162>; reg = <0x68>; @@ -507,7 +507,7 @@ pinctrl_pcie: pciegrp { fsl,pins = < /* PCIe reset */ - MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0 + MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0 >; }; @@ -668,7 +668,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>; + reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/src/arm/imx6qdl-nitrogen6x.dtsi b/src/arm/imx6qdl-nitrogen6x.dtsi index 70772ebadd4d..f22e5879340b 100644 --- a/src/arm/imx6qdl-nitrogen6x.dtsi +++ b/src/arm/imx6qdl-nitrogen6x.dtsi @@ -271,7 +271,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 27 0>; + phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; txen-skew-ps = <0>; txc-skew-ps = <3000>; rxdv-skew-ps = <0>; diff --git a/src/arm/imx6qdl-phytec-pfla02.dtsi b/src/arm/imx6qdl-phytec-pfla02.dtsi index 6e5cb6a99550..d81b0078a100 100644 --- a/src/arm/imx6qdl-phytec-pfla02.dtsi +++ b/src/arm/imx6qdl-phytec-pfla02.dtsi @@ -374,7 +374,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio4 17 0>; + reset-gpio = <&gpio4 17 GPIO_ACTIVE_LOW>; status = "disabled"; }; diff --git a/src/arm/imx6qdl-sabreauto.dtsi b/src/arm/imx6qdl-sabreauto.dtsi index a2a714d199ea..6a7594e5d183 100644 --- a/src/arm/imx6qdl-sabreauto.dtsi +++ b/src/arm/imx6qdl-sabreauto.dtsi @@ -108,6 +108,76 @@ default-brightness-level = <7>; status = "okay"; }; + + i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3mux>; + mux-gpios = <&gpio5 4 0>; + i2c-parent = <&i2c3>; + idle-state = <0>; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + adv7180: camera@21 { + compatible = "adi,adv7180"; + reg = <0x21>; + powerdown-gpios = <&max7310_b 2 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio1>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + + port { + adv7180_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <8>; + }; + }; + }; + + max7310_a: gpio@30 { + compatible = "maxim,max7310"; + reg = <0x30>; + gpio-controller; + #gpio-cells = <2>; + }; + + max7310_b: gpio@32 { + compatible = "maxim,max7310"; + reg = <0x32>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_max7310>; + reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + max7310_c: gpio@34 { + compatible = "maxim,max7310"; + reg = <0x34>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; +}; + +&ipu1_csi0_from_ipu1_csi0_mux { + bus-width = <8>; +}; + +&ipu1_csi0_mux_from_parallel_sensor { + remote-endpoint = <&adv7180_to_ipu1_csi0_mux>; + bus-width = <8>; +}; + +&ipu1_csi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_csi0>; }; &clks { @@ -290,27 +360,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - - max7310_a: gpio@30 { - compatible = "maxim,max7310"; - reg = <0x30>; - gpio-controller; - #gpio-cells = <2>; - }; - - max7310_b: gpio@32 { - compatible = "maxim,max7310"; - reg = <0x32>; - gpio-controller; - #gpio-cells = <2>; - }; - - max7310_c: gpio@34 { - compatible = "maxim,max7310"; - reg = <0x34>; - gpio-controller; - #gpio-cells = <2>; - }; }; &iomuxc { @@ -418,12 +467,52 @@ >; }; + pinctrl_i2c3mux: i2c3muxgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0b0b1 + >; + }; + + pinctrl_ipu1_csi0: ipu1csi0grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 + >; + }; + + pinctrl_max7310: max7310grp { + fsl,pins = < + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + pinctrl_pwm3: pwm1grp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 >; }; + pinctrl_gpt_input_capture0: gptinputcapture0grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x1b0b0 + >; + }; + + pinctrl_gpt_input_capture1: gptinputcapture1grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 0x1b0b0 + >; + }; + pinctrl_spdif: spdifgrp { fsl,pins = < MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0 diff --git a/src/arm/imx6qdl-sabrelite.dtsi b/src/arm/imx6qdl-sabrelite.dtsi index 84131794e97b..afe7449c47da 100644 --- a/src/arm/imx6qdl-sabrelite.dtsi +++ b/src/arm/imx6qdl-sabrelite.dtsi @@ -39,6 +39,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ + +#include #include #include @@ -94,6 +96,42 @@ pinctrl-0 = <&pinctrl_can_xcvr>; gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; }; + + reg_1p5v: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "1P5V"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + reg_1p8v: regulator@5 { + compatible = "regulator-fixed"; + reg = <5>; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_2p8v: regulator@6 { + compatible = "regulator-fixed"; + reg = <6>; + regulator-name = "2P8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + }; + + mipi_xclk: mipi_xclk { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <22000000>; + clock-output-names = "mipi_pwm3"; + pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */ + status = "okay"; }; gpio-keys { @@ -220,6 +258,22 @@ }; }; +&ipu1_csi0_from_ipu1_csi0_mux { + bus-width = <8>; + data-shift = <12>; /* Lines 19:12 used */ + hsync-active = <1>; + vync-active = <1>; +}; + +&ipu1_csi0_mux_from_parallel_sensor { + remote-endpoint = <&ov5642_to_ipu1_csi0_mux>; +}; + +&ipu1_csi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_csi0>; +}; + &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; @@ -270,9 +324,6 @@ txd1-skew-ps = <0>; txd2-skew-ps = <0>; txd3-skew-ps = <0>; - interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, - <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; - fsl,err006687-workaround-present; status = "okay"; }; @@ -301,6 +352,53 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + ov5640: camera@40 { + compatible = "ovti,ov5640"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640>; + reg = <0x40>; + clocks = <&mipi_xclk>; + clock-names = "xclk"; + DOVDD-supply = <®_1p8v>; + AVDD-supply = <®_2p8v>; + DVDD-supply = <®_1p5v>; + reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */ + powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */ + + port { + #address-cells = <1>; + #size-cells = <0>; + + ov5640_to_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + + ov5642: camera@42 { + compatible = "ovti,ov5642"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5642>; + clocks = <&clks IMX6QDL_CLK_CKO2>; + clock-names = "xclk"; + reg = <0x42>; + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + status = "disabled"; + + port { + ov5642_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <8>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; }; &i2c3 { @@ -373,7 +471,6 @@ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 /* Phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 >; }; @@ -415,6 +512,23 @@ >; }; + pinctrl_ipu1_csi0: ipu1csi0grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 + MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0 + >; + }; + pinctrl_j15: j15grp { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 @@ -448,6 +562,22 @@ >; }; + pinctrl_ov5640: ov5640grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0 + >; + }; + + pinctrl_ov5642: ov5642grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0 + MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 @@ -602,3 +732,17 @@ vmmc-supply = <®_3p3v>; status = "okay"; }; + +&mipi_csi { + status = "okay"; + + port@0 { + reg = <0>; + + mipi_csi2_in: endpoint { + remote-endpoint = <&ov5640_to_mipi_csi2>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; +}; diff --git a/src/arm/imx6qdl-sabresd.dtsi b/src/arm/imx6qdl-sabresd.dtsi index 58055ceec6dc..b72b6fa47580 100644 --- a/src/arm/imx6qdl-sabresd.dtsi +++ b/src/arm/imx6qdl-sabresd.dtsi @@ -10,6 +10,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include #include #include @@ -146,6 +147,36 @@ }; }; +&ipu1_csi0_from_ipu1_csi0_mux { + bus-width = <8>; + data-shift = <12>; /* Lines 19:12 used */ + hsync-active = <1>; + vsync-active = <1>; +}; + +&ipu1_csi0_mux_from_parallel_sensor { + remote-endpoint = <&ov5642_to_ipu1_csi0_mux>; +}; + +&ipu1_csi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_csi0>; +}; + +&mipi_csi { + status = "okay"; + + port@0 { + reg = <0>; + + mipi_csi2_in: endpoint { + remote-endpoint = <&ov5640_to_mipi_csi2>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; +}; + &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; @@ -178,7 +209,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 25 0>; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -213,7 +244,32 @@ 0x8014 /* 4:FN_DMICCDAT */ 0x0000 /* 5:Default */ >; - }; + }; + + ov5642: camera@3c { + compatible = "ovti,ov5642"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5642>; + clocks = <&clks IMX6QDL_CLK_CKO>; + clock-names = "xclk"; + reg = <0x3c>; + DOVDD-supply = <&vgen4_reg>; /* 1.8v */ + AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3 + rev B board is VGEN5 */ + DVDD-supply = <&vgen2_reg>; /* 1.5v*/ + powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + status = "disabled"; + + port { + ov5642_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <8>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; }; &i2c2 { @@ -222,6 +278,32 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + ov5640: camera@3c { + compatible = "ovti,ov5640"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640>; + reg = <0x3c>; + clocks = <&clks IMX6QDL_CLK_CKO>; + clock-names = "xclk"; + DOVDD-supply = <&vgen4_reg>; /* 1.8v */ + AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3 + rev B board is VGEN5 */ + DVDD-supply = <&vgen2_reg>; /* 1.5v*/ + powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + + port { + #address-cells = <1>; + #size-cells = <0>; + + ov5640_to_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + pmic: pfuze100@08 { compatible = "fsl,pfuze100"; reg = <0x08>; @@ -425,6 +507,36 @@ >; }; + pinctrl_ipu1_csi0: ipu1csi0grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 + >; + }; + + pinctrl_ov5640: ov5640grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0 + MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0 + >; + }; + + pinctrl_ov5642: ov5642grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 + MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 + >; + }; + pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 diff --git a/src/arm/imx6qdl-tx6.dtsi b/src/arm/imx6qdl-tx6.dtsi index 1691714f13a2..c6bec97fbeaf 100644 --- a/src/arm/imx6qdl-tx6.dtsi +++ b/src/arm/imx6qdl-tx6.dtsi @@ -133,8 +133,7 @@ regulator-max-microvolt = <3300000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan_xcvr>; - gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; - enable-active-low; + gpio = <&gpio4 21 GPIO_ACTIVE_LOW>; }; reg_lcd0_pwr: regulator-lcd0-pwr { @@ -249,7 +248,7 @@ <&clks IMX6QDL_CLK_ENET_REF>; clock-names = "ipg", "ahb", "ptp", "enet_out"; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; phy-handle = <&etnphy>; phy-supply = <®_3v3_etn>; status = "okay"; diff --git a/src/arm/imx6qdl-wandboard.dtsi b/src/arm/imx6qdl-wandboard.dtsi index 82dc5744ae19..b4fa7f1d63da 100644 --- a/src/arm/imx6qdl-wandboard.dtsi +++ b/src/arm/imx6qdl-wandboard.dtsi @@ -88,6 +88,7 @@ clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; + lrclk-strength = <3>; }; }; @@ -208,7 +209,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 29 0>; + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; diff --git a/src/arm/imx6qdl.dtsi b/src/arm/imx6qdl.dtsi index e426faa9c243..a9723b94bafa 100644 --- a/src/arm/imx6qdl.dtsi +++ b/src/arm/imx6qdl.dtsi @@ -156,7 +156,7 @@ <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>; clock-names = "bus", "core", "shader"; - power-domains = <&gpc 1>; + power-domains = <&pd_pu>; }; gpu_2d: gpu@00134000 { @@ -166,7 +166,7 @@ clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; - power-domains = <&gpc 1>; + power-domains = <&pd_pu>; }; timer@00a00600 { @@ -434,7 +434,7 @@ clocks = <&clks IMX6QDL_CLK_VPU_AXI>, <&clks IMX6QDL_CLK_MMDC_CH0_AXI>; clock-names = "per", "ahb"; - power-domains = <&gpc 1>; + power-domains = <&pd_pu>; resets = <&src 1>; iram = <&ocram>; }; @@ -644,6 +644,7 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; regulator-3p0 { @@ -658,6 +659,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5 { @@ -672,6 +674,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2100000>; anatop-max-voltage = <2875000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore { @@ -797,19 +800,39 @@ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, <0 90 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; - pu-supply = <®_pu>; - clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, - <&clks IMX6QDL_CLK_GPU3D_SHADER>, - <&clks IMX6QDL_CLK_GPU2D_CORE>, - <&clks IMX6QDL_CLK_GPU2D_AXI>, - <&clks IMX6QDL_CLK_OPENVG_AXI>, - <&clks IMX6QDL_CLK_VPU_AXI>; - #power-domain-cells = <1>; + clocks = <&clks IMX6QDL_CLK_IPG>; + clock-names = "ipg"; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + power-domain@0 { + reg = <0>; + #power-domain-cells = <0>; + }; + pd_pu: power-domain@1 { + reg = <1>; + #power-domain-cells = <0>; + power-supply = <®_pu>; + clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, + <&clks IMX6QDL_CLK_GPU3D_SHADER>, + <&clks IMX6QDL_CLK_GPU2D_CORE>, + <&clks IMX6QDL_CLK_GPU2D_AXI>, + <&clks IMX6QDL_CLK_OPENVG_AXI>, + <&clks IMX6QDL_CLK_VPU_AXI>; + }; + }; }; gpr: iomuxc-gpr@020e0000 { - compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; + compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd"; reg = <0x020e0000 0x38>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + }; }; iomuxc: iomuxc@020e0000 { @@ -1135,7 +1158,16 @@ }; mipi_csi: mipi@021dc000 { + compatible = "fsl,imx6-mipi-csi2"; reg = <0x021dc000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 100 0x04>, <0 101 0x04>; + clocks = <&clks IMX6QDL_CLK_HSI_TX>, + <&clks IMX6QDL_CLK_VIDEO_27M>, + <&clks IMX6QDL_CLK_EIM_PODF>; + clock-names = "dphy", "ref", "pix"; + status = "disabled"; }; mipi_dsi: mipi@021e0000 { @@ -1237,6 +1269,10 @@ ipu1_csi0: port@0 { reg = <0>; + + ipu1_csi0_from_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_to_ipu1_csi0>; + }; }; ipu1_csi1: port@1 { diff --git a/src/arm/imx6qp-zii-rdu2.dts b/src/arm/imx6qp-zii-rdu2.dts index 882b3bd97e07..547a76677ab3 100644 --- a/src/arm/imx6qp-zii-rdu2.dts +++ b/src/arm/imx6qp-zii-rdu2.dts @@ -41,8 +41,8 @@ /dts-v1/; -#include -#include +#include "imx6qp.dtsi" +#include "imx6qdl-zii-rdu2.dtsi" / { model = "ZII RDU2+ Board"; diff --git a/src/arm/imx6qp.dtsi b/src/arm/imx6qp.dtsi index 59453f2ac4ba..299d863690c5 100644 --- a/src/arm/imx6qp.dtsi +++ b/src/arm/imx6qp.dtsi @@ -120,6 +120,10 @@ <0 119 IRQ_TYPE_LEVEL_HIGH>; }; +&gpc { + compatible = "fsl,imx6qp-gpc", "fsl,imx6q-gpc"; +}; + &ipu1 { compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu"; fsl,prg = <&prg1>; diff --git a/src/arm/imx6sl.dtsi b/src/arm/imx6sl.dtsi index cc9572ea2860..3243af4a9984 100644 --- a/src/arm/imx6sl.dtsi +++ b/src/arm/imx6sl.dtsi @@ -530,6 +530,7 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; regulator-3p0 { @@ -544,6 +545,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5 { @@ -558,6 +560,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2100000>; anatop-max-voltage = <2850000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore { diff --git a/src/arm/imx6sx-nitrogen6sx.dts b/src/arm/imx6sx-nitrogen6sx.dts index 802da45aa551..c5578d1c1ee4 100644 --- a/src/arm/imx6sx-nitrogen6sx.dts +++ b/src/arm/imx6sx-nitrogen6sx.dts @@ -296,7 +296,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio4 10 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -374,7 +374,7 @@ cap-sdio-irq; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&gpio7>; diff --git a/src/arm/imx6sx-sdb.dts b/src/arm/imx6sx-sdb.dts index d71da30c9cff..c0139d7e497a 100644 --- a/src/arm/imx6sx-sdb.dts +++ b/src/arm/imx6sx-sdb.dts @@ -128,3 +128,11 @@ reg = <1>; }; }; + +®_arm { + vin-supply = <&sw1a_reg>; +}; + +®_soc { + vin-supply = <&sw1a_reg>; +}; diff --git a/src/arm/imx6sx.dtsi b/src/arm/imx6sx.dtsi index 3f1416be4c36..f16b9df9d0c6 100644 --- a/src/arm/imx6sx.dtsi +++ b/src/arm/imx6sx.dtsi @@ -587,6 +587,7 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; regulator-3p0 { @@ -601,6 +602,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5 { @@ -615,6 +617,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2100000>; anatop-max-voltage = <2875000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore { diff --git a/src/arm/imx6ul-opos6ul.dtsi b/src/arm/imx6ul-opos6ul.dtsi index 51095df33a90..aec5ccce0321 100644 --- a/src/arm/imx6ul-opos6ul.dtsi +++ b/src/arm/imx6ul-opos6ul.dtsi @@ -120,7 +120,7 @@ #address-cells = <1>; #size-cells = <0>; - brcmf: bcrmf@1 { + brcmf: wifi@1 { compatible = "brcm,bcm4329-fmac"; reg = <1>; interrupt-parent = <&gpio2>; diff --git a/src/arm/imx6ul-tx6ul-mainboard.dts b/src/arm/imx6ul-tx6ul-mainboard.dts index 7c5dd1b316ca..28d055e3f301 100644 --- a/src/arm/imx6ul-tx6ul-mainboard.dts +++ b/src/arm/imx6ul-tx6ul-mainboard.dts @@ -78,7 +78,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; phy-supply = <®_3v3_etn>; phy-handle = <&etnphy1>; status = "okay"; diff --git a/src/arm/imx6ul-tx6ul.dtsi b/src/arm/imx6ul-tx6ul.dtsi index c784a0b75ca0..ec745eb3b6a8 100644 --- a/src/arm/imx6ul-tx6ul.dtsi +++ b/src/arm/imx6ul-tx6ul.dtsi @@ -173,8 +173,7 @@ regulator-max-microvolt = <3300000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan_xcvr>; - gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; - enable-active-low; + gpio = <&gpio3 5 GPIO_ACTIVE_LOW>; }; reg_lcd_pwr: regulator-lcdpwr { @@ -308,7 +307,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio &pinctrl_etnphy0_rst>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; phy-supply = <®_3v3_etn>; phy-handle = <&etnphy0>; status = "okay"; @@ -343,7 +342,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet2 &pinctrl_etnphy1_rst>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; phy-supply = <®_3v3_etn>; phy-handle = <&etnphy1>; status = "disabled"; diff --git a/src/arm/imx6ul.dtsi b/src/arm/imx6ul.dtsi index b9d7d2d09402..6da2b77edd46 100644 --- a/src/arm/imx6ul.dtsi +++ b/src/arm/imx6ul.dtsi @@ -542,6 +542,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore { diff --git a/src/arm/imx7-colibri.dtsi b/src/arm/imx7-colibri.dtsi index 2d87489f9105..d7753f79937a 100644 --- a/src/arm/imx7-colibri.dtsi +++ b/src/arm/imx7-colibri.dtsi @@ -43,7 +43,7 @@ / { bl: backlight { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; }; reg_module_3v3: regulator-module-3v3 { diff --git a/src/arm/imx7d-nitrogen7.dts b/src/arm/imx7d-nitrogen7.dts index 5d98e2b5d54b..e7998308861f 100644 --- a/src/arm/imx7d-nitrogen7.dts +++ b/src/arm/imx7d-nitrogen7.dts @@ -67,7 +67,7 @@ backlight-j20 { compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; + pwms = <&pwm1 0 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; status = "okay"; @@ -279,7 +279,7 @@ status = "okay"; rtc@68 { - compatible = "rv4162"; + compatible = "microcrystal,rv4162"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2_rv4162>; reg = <0x68>; @@ -738,7 +738,7 @@ pinctrl_wdog1: wdog1grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x75 + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x75 >; }; }; diff --git a/src/arm/imx7d-pico.dts b/src/arm/imx7d-pico.dts new file mode 100644 index 000000000000..e78c2c9cc28a --- /dev/null +++ b/src/arm/imx7d-pico.dts @@ -0,0 +1,403 @@ +/* + * Copyright 2017 NXP + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx7d.dtsi" + +/ { + model = "Technexion Pico i.MX7D Board"; + compatible = "technexion,imx7d-pico", "fsl,imx7d"; + + memory { + reg = <0x80000000 0x80000000>; + }; + + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; + }; + + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "imx7-sgtl5000"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,cpu { + sound-dai = <&sai1>; + }; + + dailink_master: simple-audio-card,codec { + sound-dai = <&codec>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + }; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + status = "okay"; + }; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + codec: sgtl5000@0a { + #sound-dai-cells = <0>; + reg = <0x0a>; + compatible = "fsl,sgtl5000"; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_vref_1v8>; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + pmic: pfuze3000@08 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + /* use sw1c_reg to align with pfuze100/pfuze200 */ + sw1c_reg: sw1b { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1650000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen2_reg: vldo2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen4_reg: v33 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vldo3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&sai1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai1>; + assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, + <&clks IMX7D_SAI1_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <24576000>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + dr_mode = "host"; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; + bus-width = <8>; + no-1-8-v; + fsl,tuning-step = <2>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f + MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f + MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f + >; + }; + + pinctrl_sai1: sai1grp { + fsl,pins = < + MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f + MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f + MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 + MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79 + MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79 + >; + }; + + pinctrl_usbotg1_pwr: usbotg_pwr { + fsl,pins = < + MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a + MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b + MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b + >; + }; +}; + +&iomuxc_lpsr { + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 + >; + }; +}; diff --git a/src/arm/imx7d-pinfunc.h b/src/arm/imx7d-pinfunc.h index f6f7e78f8820..f2493bc63da4 100644 --- a/src/arm/imx7d-pinfunc.h +++ b/src/arm/imx7d-pinfunc.h @@ -17,9 +17,9 @@ #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0 -#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0 -#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0 -#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0 +#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0 +#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0 +#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0 diff --git a/src/arm/imx7d-sdb.dts b/src/arm/imx7d-sdb.dts index 5be01a1bf840..0a24d1bf3c39 100644 --- a/src/arm/imx7d-sdb.dts +++ b/src/arm/imx7d-sdb.dts @@ -52,47 +52,70 @@ reg = <0x80000000 0x80000000>; }; - regulators { - compatible = "simple-bus"; + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; #address-cells = <1>; #size-cells = <0>; - reg_usb_otg1_vbus: regulator@0 { - compatible = "regulator-fixed"; + extended_io: gpio-expander@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; reg = <0>; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; - enable-active-high; + registers-number = <1>; + spi-max-frequency = <100000>; }; + }; - reg_usb_otg2_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg2_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_can2_3v3: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "can2-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 7 GPIO_ACTIVE_LOW>; - }; + reg_usb_otg2_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_vref_1v8: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "vref-1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; + reg_can2_3v3: regulator-can2-3v3 { + compatible = "regulator-fixed"; + regulator-name = "can2-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_brcm: regulator-brcm { + compatible = "regulator-fixed"; + gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "brcm_reg"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_brcm_reg>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <200000>; }; }; @@ -328,6 +351,11 @@ }; }; +&pcie { + reset-gpio = <&extended_io 1 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; @@ -342,6 +370,15 @@ status = "okay"; }; +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + status = "okay"; +}; + &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; status = "okay"; @@ -363,6 +400,19 @@ status = "okay"; }; +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + wakeup-source; + keep-power-in-suspend; + non-removable; + vmmc-supply = <®_brcm>; + fsl,tuning-step = <2>; + status = "okay"; +}; + &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -387,6 +437,12 @@ pinctrl-0 = <&pinctrl_hog>; imx7d-sdb { + pinctrl_brcm_reg: brcmreggrp { + fsl,pins = < + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x14 + >; + }; + pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO 0x2 @@ -501,6 +557,14 @@ >; }; + pinctrl_spi4: spi4grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59 + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59 + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59 + >; + }; + pinctrl_tsc2046_pendown: tsc2046_pendown { fsl,pins = < MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59 @@ -554,7 +618,6 @@ MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x59 /* WL_REG_ON */ >; }; @@ -634,7 +697,7 @@ &iomuxc_lpsr { pinctrl_wdog: wdoggrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x74 + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 >; }; diff --git a/src/arm/imx7d.dtsi b/src/arm/imx7d.dtsi index f6dee41a05d9..f46814a7ea44 100644 --- a/src/arm/imx7d.dtsi +++ b/src/arm/imx7d.dtsi @@ -42,6 +42,7 @@ */ #include "imx7s.dtsi" +#include / { cpus { @@ -127,6 +128,42 @@ fsl,num-rx-queues=<3>; status = "disabled"; }; + + pcie: pcie@0x33800000 { + compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; + reg = <0x33800000 0x4000>, + <0x4ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */ + 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ + num-lanes = <1>; + interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, + <&clks IMX7D_PCIE_PHY_ROOT_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, + <&clks IMX7D_PCIE_PHY_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie_phy>; + resets = <&src IMX7_RESET_PCIEPHY>, + <&src IMX7_RESET_PCIE_CTRL_APPS_EN>; + reset-names = "pciephy", "apps"; + status = "disabled"; + }; }; &ca_funnel_ports { diff --git a/src/arm/imx7s-warp.dts b/src/arm/imx7s-warp.dts index d5237fd0fa65..07b63f8b7314 100644 --- a/src/arm/imx7s-warp.dts +++ b/src/arm/imx7s-warp.dts @@ -295,6 +295,7 @@ assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; bus-width = <8>; + no-1-8-v; fsl,tuning-step = <2>; non-removable; status = "okay"; @@ -442,7 +443,7 @@ &iomuxc_lpsr { pinctrl_wdog: wdoggrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x74 + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 >; }; }; diff --git a/src/arm/imx7s.dtsi b/src/arm/imx7s.dtsi index c4f12fd2e044..4cf6c458b583 100644 --- a/src/arm/imx7s.dtsi +++ b/src/arm/imx7s.dtsi @@ -42,6 +42,7 @@ */ #include +#include #include #include #include @@ -119,7 +120,7 @@ #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&intc>; + interrupt-parent = <&gpc>; ranges; funnel@30041000 { @@ -301,6 +302,7 @@ interrupts = ; #interrupt-cells = <3>; interrupt-controller; + interrupt-parent = <&intc>; reg = <0x31001000 0x1000>, <0x31002000 0x2000>, <0x31004000 0x2000>, @@ -309,6 +311,7 @@ timer { compatible = "arm,armv7-timer"; + interrupt-parent = <&intc>; interrupts = , , , @@ -488,7 +491,8 @@ }; gpr: iomuxc-gpr@30340000 { - compatible = "fsl,imx7d-iomuxc-gpr", "syscon"; + compatible = "fsl,imx7d-iomuxc-gpr", + "fsl,imx6q-iomuxc-gpr", "syscon"; reg = <0x30340000 0x10000>; }; @@ -516,6 +520,7 @@ anatop-min-bit-val = <8>; anatop-min-voltage = <800000>; anatop-max-voltage = <1200000>; + anatop-enable-bit = <0>; }; }; @@ -563,6 +568,27 @@ interrupts = ; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx7d-gpc"; + reg = <0x303a0000 0x10000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + interrupt-parent = <&intc>; + #power-domain-cells = <1>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY { + #power-domain-cells = <0>; + reg = ; + power-supply = <®_1p0d>; + }; + }; + }; }; aips2: aips-bus@30400000 { @@ -609,7 +635,7 @@ clocks = <&clks IMX7D_PWM1_ROOT_CLK>, <&clks IMX7D_PWM1_ROOT_CLK>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; @@ -620,7 +646,7 @@ clocks = <&clks IMX7D_PWM2_ROOT_CLK>, <&clks IMX7D_PWM2_ROOT_CLK>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; @@ -631,7 +657,7 @@ clocks = <&clks IMX7D_PWM3_ROOT_CLK>, <&clks IMX7D_PWM3_ROOT_CLK>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; @@ -642,7 +668,7 @@ clocks = <&clks IMX7D_PWM4_ROOT_CLK>, <&clks IMX7D_PWM4_ROOT_CLK>; clock-names = "ipg", "per"; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; @@ -934,8 +960,8 @@ compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; reg = <0x30b40000 0x10000>; interrupts = ; - clocks = <&clks IMX7D_CLK_DUMMY>, - <&clks IMX7D_CLK_DUMMY>, + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>, <&clks IMX7D_USDHC1_ROOT_CLK>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; @@ -946,8 +972,8 @@ compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; reg = <0x30b50000 0x10000>; interrupts = ; - clocks = <&clks IMX7D_CLK_DUMMY>, - <&clks IMX7D_CLK_DUMMY>, + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>, <&clks IMX7D_USDHC2_ROOT_CLK>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; @@ -958,8 +984,8 @@ compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; reg = <0x30b60000 0x10000>; interrupts = ; - clocks = <&clks IMX7D_CLK_DUMMY>, - <&clks IMX7D_CLK_DUMMY>, + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>, <&clks IMX7D_USDHC3_ROOT_CLK>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; diff --git a/src/arm/keystone-k2g-evm.dts b/src/arm/keystone-k2g-evm.dts index 692fcbb1434a..61883cb969d2 100644 --- a/src/arm/keystone-k2g-evm.dts +++ b/src/arm/keystone-k2g-evm.dts @@ -20,7 +20,7 @@ compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone"; model = "Texas Instruments K2G General Purpose EVM"; - memory { + memory@800000000 { device_type = "memory"; reg = <0x00000008 0x00000000 0x00000000 0x80000000>; }; diff --git a/src/arm/keystone-k2g-ice.dts b/src/arm/keystone-k2g-ice.dts new file mode 100644 index 000000000000..d820d37b5148 --- /dev/null +++ b/src/arm/keystone-k2g-ice.dts @@ -0,0 +1,35 @@ +/* + * Device Tree Source for K2G Industrial Communication Engine EVM + * + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0 + */ +/dts-v1/; + +#include "keystone-k2g.dtsi" + +/ { + compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; + model = "Texas Instruments K2G Industrial Communication EVM"; + + memory@800000000 { + device_type = "memory"; + reg = <0x00000008 0x00000000 0x00000000 0x20000000>; + }; +}; + +&k2g_pinctrl { + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; diff --git a/src/arm/keystone-k2g.dtsi b/src/arm/keystone-k2g.dtsi index f59567fe7d91..a789f75a1ed5 100644 --- a/src/arm/keystone-k2g.dtsi +++ b/src/arm/keystone-k2g.dtsi @@ -15,7 +15,6 @@ #include #include -#include "skeleton.dtsi" / { compatible = "ti,k2g","ti,keystone"; @@ -24,6 +23,8 @@ #size-cells = <2>; interrupt-parent = <&gic>; + chosen { }; + aliases { serial0 = &uart0; }; diff --git a/src/arm/kirkwood-openblocks_a6.dts b/src/arm/kirkwood-openblocks_a6.dts index 94e49f32d5f9..c75da5f0ca48 100644 --- a/src/arm/kirkwood-openblocks_a6.dts +++ b/src/arm/kirkwood-openblocks_a6.dts @@ -141,7 +141,7 @@ partition@d4000 { label = "test"; - reg = <0xd4000 0x24000>; + reg = <0xd4000 0x20000>; }; partition@f4000 { diff --git a/src/arm/logicpd-torpedo-som.dtsi b/src/arm/logicpd-torpedo-som.dtsi index efe53998c961..6d89736c7b44 100644 --- a/src/arm/logicpd-torpedo-som.dtsi +++ b/src/arm/logicpd-torpedo-som.dtsi @@ -7,6 +7,10 @@ #include / { + chosen { + stdout-path = &uart1; + }; + cpus { cpu@0 { cpu0-supply = <&vcc>; diff --git a/src/arm/ls1021a.dtsi b/src/arm/ls1021a.dtsi index 45ea57fafa18..7bb9df2c1460 100644 --- a/src/arm/ls1021a.dtsi +++ b/src/arm/ls1021a.dtsi @@ -75,7 +75,7 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0xf00>; - clocks = <&cluster1_clk>; + clocks = <&clockgen 1 0>; #cooling-cells = <2>; }; @@ -83,10 +83,17 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0xf01>; - clocks = <&cluster1_clk>; + clocks = <&clockgen 1 0>; }; }; + sysclk: sysclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "sysclk"; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -165,7 +172,7 @@ <0x0 0x20220520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; dma-coherent; status = "disabled"; }; @@ -216,41 +223,10 @@ }; clockgen: clocking@1ee1000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x1ee1000 0x10000>; - - sysclk: sysclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "sysclk"; - }; - - cga_pll1: pll@800 { - compatible = "fsl,qoriq-core-pll-2.0"; - #clock-cells = <1>; - reg = <0x800 0x10>; - clocks = <&sysclk>; - clock-output-names = "cga-pll1", "cga-pll1-div2", - "cga-pll1-div4"; - }; - - platform_clk: pll@c00 { - compatible = "fsl,qoriq-core-pll-2.0"; - #clock-cells = <1>; - reg = <0xc00 0x10>; - clocks = <&sysclk>; - clock-output-names = "platform-clk", "platform-clk-div2"; - }; - - cluster1_clk: clk0c0@0 { - compatible = "fsl,qoriq-core-mux-2.0"; - #clock-cells = <0>; - reg = <0x0 0x10>; - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4"; - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>; - clock-output-names = "cluster1-clk"; - }; + compatible = "fsl,ls1021a-clockgen"; + reg = <0x0 0x1ee1000 0x0 0x1000>; + #clock-cells = <2>; + clocks = <&sysclk>; }; tmu: tmu@1f00000 { @@ -338,7 +314,7 @@ reg = <0x0 0x2100000 0x0 0x10000>; interrupts = ; clock-names = "dspi"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; spi-num-chipselects = <6>; big-endian; status = "disabled"; @@ -351,7 +327,7 @@ reg = <0x0 0x2110000 0x0 0x10000>; interrupts = ; clock-names = "dspi"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; spi-num-chipselects = <6>; big-endian; status = "disabled"; @@ -364,7 +340,7 @@ reg = <0x0 0x2180000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -375,7 +351,7 @@ reg = <0x0 0x2190000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -386,7 +362,7 @@ reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -479,7 +455,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2960000 0x0 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -488,7 +464,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2970000 0x0 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -497,7 +473,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2980000 0x0 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -506,7 +482,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2990000 0x0 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -515,7 +491,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x29a0000 0x0 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -524,7 +500,7 @@ compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "wdog-en"; big-endian; }; @@ -534,8 +510,8 @@ compatible = "fsl,vf610-sai"; reg = <0x0 0x2b50000 0x0 0x10000>; interrupts = ; - clocks = <&platform_clk 1>, <&platform_clk 1>, - <&platform_clk 1>, <&platform_clk 1>; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; dma-names = "tx", "rx"; dmas = <&edma0 1 47>, @@ -548,8 +524,8 @@ compatible = "fsl,vf610-sai"; reg = <0x0 0x2b60000 0x0 0x10000>; interrupts = ; - clocks = <&platform_clk 1>, <&platform_clk 1>, - <&platform_clk 1>, <&platform_clk 1>; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; dma-names = "tx", "rx"; dmas = <&edma0 1 45>, @@ -569,16 +545,16 @@ dma-channels = <32>; big-endian; clock-names = "dmamux0", "dmamux1"; - clocks = <&platform_clk 1>, - <&platform_clk 1>; + clocks = <&clockgen 4 1>, + <&clockgen 4 1>; }; dcu: dcu@2ce0000 { compatible = "fsl,ls1021a-dcu"; reg = <0x0 0x2ce0000 0x0 0x10000>; interrupts = ; - clocks = <&platform_clk 0>, - <&platform_clk 0>; + clocks = <&clockgen 4 0>, + <&clockgen 4 0>; clock-names = "dcu", "pix"; big-endian; status = "disabled"; diff --git a/src/arm/meson.dtsi b/src/arm/meson.dtsi index 8c77c87660cd..15204e44161d 100644 --- a/src/arm/meson.dtsi +++ b/src/arm/meson.dtsi @@ -45,6 +45,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include +#include /include/ "skeleton.dtsi" / { @@ -65,99 +67,158 @@ #interrupt-cells = <3>; }; - timer@c1109940 { - compatible = "amlogic,meson6-timer"; - reg = <0xc1109940 0x18>; - interrupts = <0 10 1>; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - wdt: watchdog@c1109900 { - compatible = "amlogic,meson6-wdt"; - reg = <0xc1109900 0x8>; - interrupts = <0 0 1>; + cbus: cbus@c1100000 { + compatible = "simple-bus"; + reg = <0xc1100000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc1100000 0x200000>; + + hwrng: rng@8100 { + compatible = "amlogic,meson-rng"; + reg = <0x8100 0x8>; + }; + + uart_A: serial@84c0 { + compatible = "amlogic,meson-uart"; + reg = <0x84c0 0x18>; + interrupts = ; + status = "disabled"; + }; + + uart_B: serial@84dc { + compatible = "amlogic,meson-uart"; + reg = <0x84dc 0x18>; + interrupts = ; + status = "disabled"; + }; + + i2c_A: i2c@8500 { + compatible = "amlogic,meson6-i2c"; + reg = <0x8500 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + saradc: adc@8680 { + compatible = "amlogic,meson-saradc"; + reg = <0x8680 0x34>; + #io-channel-cells = <1>; + interrupts = ; + status = "disabled"; + }; + + uart_C: serial@8700 { + compatible = "amlogic,meson-uart"; + reg = <0x8700 0x18>; + interrupts = ; + status = "disabled"; + }; + + i2c_B: i2c@87c0 { + compatible = "amlogic,meson6-i2c"; + reg = <0x87c0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + usb0_phy: phy@8800 { + compatible = "amlogic,meson-mx-usb2-phy"; + #phy-cells = <0>; + reg = <0x8800 0x20>; + status = "disabled"; + }; + + usb1_phy: phy@8820 { + compatible = "amlogic,meson-mx-usb2-phy"; + #phy-cells = <0>; + reg = <0x8820 0x20>; + status = "disabled"; + }; + + spifc: spi@8c80 { + compatible = "amlogic,meson6-spifc"; + reg = <0x8c80 0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + wdt: watchdog@9900 { + compatible = "amlogic,meson6-wdt"; + reg = <0x9900 0x8>; + interrupts = ; + }; + + timer@9940 { + compatible = "amlogic,meson6-timer"; + reg = <0x9940 0x18>; + interrupts = ; + }; }; - uart_AO: serial@c81004c0 { - compatible = "amlogic,meson-uart"; - reg = <0xc81004c0 0x18>; - interrupts = <0 90 1>; - clocks = <&clk81>; - status = "disabled"; + aobus: aobus@c8100000 { + compatible = "simple-bus"; + reg = <0xc8100000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc8100000 0x100000>; + + ir_receiver: ir-receiver@480 { + compatible= "amlogic,meson6-ir"; + reg = <0x480 0x20>; + interrupts = ; + status = "disabled"; + }; + + uart_AO: serial@4c0 { + compatible = "amlogic,meson-uart"; + reg = <0x4c0 0x18>; + interrupts = ; + status = "disabled"; + }; + + i2c_AO: i2c@500 { + compatible = "amlogic,meson6-i2c"; + reg = <0x500 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; - uart_A: serial@c11084c0 { - compatible = "amlogic,meson-uart"; - reg = <0xc11084c0 0x18>; - interrupts = <0 26 1>; - clocks = <&clk81>; - status = "disabled"; - }; - - uart_B: serial@c11084dc { - compatible = "amlogic,meson-uart"; - reg = <0xc11084dc 0x18>; - interrupts = <0 75 1>; - clocks = <&clk81>; - status = "disabled"; - }; - - uart_C: serial@c1108700 { - compatible = "amlogic,meson-uart"; - reg = <0xc1108700 0x18>; - interrupts = <0 93 1>; - clocks = <&clk81>; - status = "disabled"; - }; - - i2c_AO: i2c@c8100500 { - compatible = "amlogic,meson6-i2c"; - reg = <0xc8100500 0x20>; - interrupts = <0 92 1>; - clocks = <&clk81>; + usb0: usb@c9040000 { + compatible = "snps,dwc2"; #address-cells = <1>; #size-cells = <0>; + reg = <0xc9040000 0x40000>; + interrupts = ; + phys = <&usb0_phy>; + phy-names = "usb2-phy"; + dr_mode = "host"; status = "disabled"; }; - i2c_A: i2c@c1108500 { - compatible = "amlogic,meson6-i2c"; - reg = <0xc1108500 0x20>; - interrupts = <0 21 1>; - clocks = <&clk81>; + usb1: usb@c90c0000 { + compatible = "snps,dwc2"; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; - }; - - i2c_B: i2c@c11087c0 { - compatible = "amlogic,meson6-i2c"; - reg = <0xc11087c0 0x20>; - interrupts = <0 128 1>; - clocks = <&clk81>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - ir_receiver: ir-receiver@c8100480 { - compatible= "amlogic,meson6-ir"; - reg = <0xc8100480 0x20>; - interrupts = <0 15 1>; - status = "disabled"; - }; - - spifc: spi@c1108c80 { - compatible = "amlogic,meson6-spifc"; - reg = <0xc1108c80 0x80>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clk81>; + reg = <0xc90c0000 0x40000>; + interrupts = ; + phys = <&usb1_phy>; + phy-names = "usb2-phy"; + dr_mode = "host"; status = "disabled"; }; @@ -165,10 +226,8 @@ compatible = "amlogic,meson6-dwmac", "snps,dwmac"; reg = <0xc9410000 0x10000 0xc1108108 0x4>; - interrupts = <0 8 1>; + interrupts = ; interrupt-names = "macirq"; - clocks = <&clk81>; - clock-names = "stmmaceth"; status = "disabled"; }; }; diff --git a/src/arm/meson6-atv1200.dts b/src/arm/meson6-atv1200.dts index 1237faa63ce6..9444b0d9628f 100644 --- a/src/arm/meson6-atv1200.dts +++ b/src/arm/meson6-atv1200.dts @@ -46,7 +46,7 @@ */ /dts-v1/; -/include/ "meson6.dtsi" +#include "meson6.dtsi" / { model = "Geniatech ATV1200"; diff --git a/src/arm/meson6.dtsi b/src/arm/meson6.dtsi index 8b33be15af94..8557b6117a4b 100644 --- a/src/arm/meson6.dtsi +++ b/src/arm/meson6.dtsi @@ -45,14 +45,12 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "meson.dtsi" +#include "meson.dtsi" / { model = "Amlogic Meson6 SoC"; compatible = "amlogic,meson6"; - interrupt-parent = <&gic>; - cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/src/arm/meson8.dtsi b/src/arm/meson8.dtsi index ebc763eab195..cada35828931 100644 --- a/src/arm/meson8.dtsi +++ b/src/arm/meson8.dtsi @@ -43,15 +43,14 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include #include -/include/ "meson.dtsi" +#include "meson.dtsi" / { model = "Amlogic Meson8 SoC"; compatible = "amlogic,meson8"; - interrupt-parent = <&gic>; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -85,67 +84,51 @@ }; }; - clk81: clk@0 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <141666666>; - }; - - pinctrl_cbus: pinctrl@c1109880 { - compatible = "amlogic,meson8-cbus-pinctrl"; - reg = <0xc1109880 0x10>; + reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; - gpio: banks@c11080b0 { - reg = <0xc11080b0 0x28>, - <0xc11080e8 0x18>, - <0xc1108120 0x18>, - <0xc1108030 0x30>; - reg-names = "mux", "pull", "pull-enable", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_cbus 0 0 120>; + /* 2 MiB reserved for Hardware ROM Firmware? */ + hwrom@0 { + reg = <0x0 0x200000>; + no-map; }; - spi_nor_pins: nor { - mux { - groups = "nor_d", "nor_q", "nor_c", "nor_cs"; - function = "nor"; - }; - }; - - ir_recv_pins: remote { - mux { - groups = "remote_input"; - function = "remote"; - }; - }; - - eth_pins: ethernet { - mux { - groups = "eth_tx_clk_50m", "eth_tx_en", - "eth_txd1", "eth_txd0", - "eth_rx_clk_in", "eth_rx_dv", - "eth_rxd1", "eth_rxd0", "eth_mdio", - "eth_mdc"; - function = "ethernet"; - }; + /* + * 1 MiB reserved for the "ARM Power Firmware": this is ARM + * code which is responsible for system suspend. It loads a + * piece of ARC code ("arc_power" in the vendor u-boot tree) + * into SRAM, executes that and shuts down the (last) ARM core. + * The arc_power firmware then checks various wakeup sources + * (IR remote receiver, HDMI CEC, WIFI and Bluetooth wakeup or + * simply the power key) and re-starts the ARM core once it + * detects a wakeup request. + */ + power-firmware@4f00000 { + reg = <0x4f00000 0x100000>; + no-map; }; }; - pinctrl_aobus: pinctrl@c8100084 { + scu@c4300000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc4300000 0x100>; + }; +}; /* end of / */ + +&aobus { + pinctrl_aobus: pinctrl@84 { compatible = "amlogic,meson8-aobus-pinctrl"; - reg = <0xc8100084 0xc>; + reg = <0x84 0xc>; #address-cells = <1>; #size-cells = <1>; ranges; - gpio_ao: ao-bank@c1108030 { - reg = <0xc8100014 0x4>, - <0xc810002c 0x4>, - <0xc8100024 0x8>; + gpio_ao: ao-bank@14 { + reg = <0x14 0x4>, + <0x2c 0x4>, + <0x24 0x8>; reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; @@ -165,5 +148,176 @@ function = "i2c_mst_ao"; }; }; + + ir_recv_pins: remote { + mux { + groups = "remote_input"; + function = "remote"; + }; + }; + + pwm_f_ao_pins: pwm-f-ao { + mux { + groups = "pwm_f_ao"; + function = "pwm_f_ao"; + }; + }; }; -}; /* end of / */ +}; + +&cbus { + clkc: clock-controller@4000 { + #clock-cells = <1>; + compatible = "amlogic,meson8-clkc"; + reg = <0x8000 0x4>, <0x4000 0x460>; + }; + + pinctrl_cbus: pinctrl@9880 { + compatible = "amlogic,meson8-cbus-pinctrl"; + reg = <0x9880 0x10>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio: banks@80b0 { + reg = <0x80b0 0x28>, + <0x80e8 0x18>, + <0x8120 0x18>, + <0x8030 0x30>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_cbus 0 0 120>; + }; + + sd_a_pins: sd-a { + mux { + groups = "sd_d0_a", "sd_d1_a", "sd_d2_a", + "sd_d3_a", "sd_clk_a", "sd_cmd_a"; + function = "sd_a"; + }; + }; + + sd_b_pins: sd-b { + mux { + groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", + "sd_d3_b", "sd_clk_b", "sd_cmd_b"; + function = "sd_b"; + }; + }; + + sd_c_pins: sd-c { + mux { + groups = "sd_d0_c", "sd_d1_c", "sd_d2_c", + "sd_d3_c", "sd_clk_c", "sd_cmd_c"; + function = "sd_c"; + }; + }; + + spi_nor_pins: nor { + mux { + groups = "nor_d", "nor_q", "nor_c", "nor_cs"; + function = "nor"; + }; + }; + + eth_pins: ethernet { + mux { + groups = "eth_tx_clk_50m", "eth_tx_en", + "eth_txd1", "eth_txd0", + "eth_rx_clk_in", "eth_rx_dv", + "eth_rxd1", "eth_rxd0", "eth_mdio", + "eth_mdc"; + function = "ethernet"; + }; + }; + + pwm_e_pins: pwm-e { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; + }; +}; + +ðmac { + clocks = <&clkc CLKID_ETH>; + clock-names = "stmmaceth"; +}; + +&hwrng { + compatible = "amlogic,meson8-rng", "amlogic,meson-rng"; + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + +&i2c_AO { + clocks = <&clkc CLKID_CLK81>; +}; + +&i2c_A { + clocks = <&clkc CLKID_CLK81>; +}; + +&i2c_B { + clocks = <&clkc CLKID_CLK81>; +}; + +&L2 { + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,filter-ranges = <0x100000 0xc0000000>; +}; + +&saradc { + compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; + clocks = <&clkc CLKID_XTAL>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>; + clock-names = "clkin", "core", "sana"; +}; + +&spifc { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_AO { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_A { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_B { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_C { + clocks = <&clkc CLKID_CLK81>; +}; + +&usb0 { + compatible = "amlogic,meson8-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb1 { + compatible = "amlogic,meson8-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb0_phy { + compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; + clock-names = "usb_general", "usb"; +}; + +&usb1_phy { + compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; + clock-names = "usb_general", "usb"; +}; diff --git a/src/arm/meson8b.dtsi b/src/arm/meson8b.dtsi index 828aa49c678c..72e4f425f190 100644 --- a/src/arm/meson8b.dtsi +++ b/src/arm/meson8b.dtsi @@ -47,11 +47,9 @@ #include #include #include -#include "skeleton.dtsi" +#include "meson.dtsi" / { - interrupt-parent = <&gic>; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -85,146 +83,162 @@ }; }; - soc { - compatible = "simple-bus"; + scu@c4300000 { + compatible = "arm,cortex-a5-scu"; + reg = <0xc4300000 0x100>; + }; +}; /* end of / */ + +&aobus { + pinctrl_aobus: pinctrl@84 { + compatible = "amlogic,meson8b-aobus-pinctrl"; + reg = <0x84 0xc>; #address-cells = <1>; #size-cells = <1>; ranges; - L2: l2-cache-controller@c4200000 { - compatible = "arm,pl310-cache"; - reg = <0xc4200000 0x1000>; - cache-unified; - cache-level = <2>; + gpio_ao: ao-bank@14 { + reg = <0x14 0x4>, + <0x2c 0x4>, + <0x24 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_aobus 0 130 16>; }; - gic: interrupt-controller@c4301000 { - compatible = "arm,cortex-a9-gic"; - reg = <0xc4301000 0x1000>, - <0xc4300100 0x0100>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - reset: reset-controller@c1104404 { - compatible = "amlogic,meson8b-reset"; - reg = <0xc1104404 0x20>; - #reset-cells = <1>; - }; - - wdt: watchdog@c1109900 { - compatible = "amlogic,meson8b-wdt"; - reg = <0xc1109900 0x8>; - interrupts = <0 0 1>; - }; - - timer@c1109940 { - compatible = "amlogic,meson6-timer"; - reg = <0xc1109940 0x18>; - interrupts = <0 10 1>; - }; - - uart_AO: serial@c81004c0 { - compatible = "amlogic,meson-uart"; - reg = <0xc81004c0 0x18>; - interrupts = <0 90 1>; - clocks = <&clkc CLKID_CLK81>; - status = "disabled"; - }; - - uart_A: serial@c11084c0 { - compatible = "amlogic,meson-uart"; - reg = <0xc11084c0 0x18>; - interrupts = <0 26 1>; - clocks = <&clkc CLKID_CLK81>; - status = "disabled"; - }; - - uart_B: serial@c11084dc { - compatible = "amlogic,meson-uart"; - reg = <0xc11084dc 0x18>; - interrupts = <0 75 1>; - clocks = <&clkc CLKID_CLK81>; - status = "disabled"; - }; - - uart_C: serial@c1108700 { - compatible = "amlogic,meson-uart"; - reg = <0xc1108700 0x18>; - interrupts = <0 93 1>; - clocks = <&clkc CLKID_CLK81>; - status = "disabled"; - }; - - clkc: clock-controller@c1104000 { - #clock-cells = <1>; - compatible = "amlogic,meson8b-clkc"; - reg = <0xc1108000 0x4>, <0xc1104000 0x460>; - }; - - pwm_ab: pwm@8550 { - compatible = "amlogic,meson8b-pwm"; - reg = <0xc1108550 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_cd: pwm@8650 { - compatible = "amlogic,meson8b-pwm"; - reg = <0xc1108650 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_ef: pwm@86c0 { - compatible = "amlogic,meson8b-pwm"; - reg = <0xc11086c0 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pinctrl_cbus: pinctrl@c1109880 { - compatible = "amlogic,meson8b-cbus-pinctrl"; - reg = <0xc1109880 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio: banks@c11080b0 { - reg = <0xc11080b0 0x28>, - <0xc11080e8 0x18>, - <0xc1108120 0x18>, - <0xc1108030 0x38>; - reg-names = "mux", "pull", "pull-enable", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_cbus 0 0 130>; - }; - }; - - pinctrl_aobus: pinctrl@c8100084 { - compatible = "amlogic,meson8b-aobus-pinctrl"; - reg = <0xc8100084 0xc>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio_ao: ao-bank@c1108030 { - reg = <0xc8100014 0x4>, - <0xc810002c 0x4>, - <0xc8100024 0x8>; - reg-names = "mux", "pull", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_aobus 0 130 16>; - }; - - uart_ao_a_pins: uart_ao_a { - mux { - groups = "uart_tx_ao_a", "uart_rx_ao_a"; - function = "uart_ao"; - }; + uart_ao_a_pins: uart_ao_a { + mux { + groups = "uart_tx_ao_a", "uart_rx_ao_a"; + function = "uart_ao"; }; }; }; -}; /* end of / */ +}; + +&cbus { + clkc: clock-controller@4000 { + #clock-cells = <1>; + compatible = "amlogic,meson8b-clkc"; + reg = <0x8000 0x4>, <0x4000 0x460>; + }; + + reset: reset-controller@4404 { + compatible = "amlogic,meson8b-reset"; + reg = <0x4404 0x20>; + #reset-cells = <1>; + }; + + pwm_ab: pwm@8550 { + compatible = "amlogic,meson8b-pwm"; + reg = <0x8550 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@8650 { + compatible = "amlogic,meson8b-pwm"; + reg = <0x8650 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_ef: pwm@86c0 { + compatible = "amlogic,meson8b-pwm"; + reg = <0x86c0 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + wdt: watchdog@9900 { + compatible = "amlogic,meson8b-wdt"; + reg = <0x9900 0x8>; + interrupts = <0 0 1>; + }; + + pinctrl_cbus: pinctrl@9880 { + compatible = "amlogic,meson8b-cbus-pinctrl"; + reg = <0x9880 0x10>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio: banks@80b0 { + reg = <0x80b0 0x28>, + <0x80e8 0x18>, + <0x8120 0x18>, + <0x8030 0x38>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_cbus 0 0 130>; + }; + }; +}; + +ðmac { + clocks = <&clkc CLKID_ETH>; + clock-names = "stmmaceth"; +}; + +&hwrng { + compatible = "amlogic,meson8b-rng", "amlogic,meson-rng"; + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + +&L2 { + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,filter-ranges = <0x100000 0xc0000000>; +}; + +&saradc { + compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; + clocks = <&clkc CLKID_XTAL>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>; + clock-names = "clkin", "core", "sana"; +}; + +&uart_AO { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_A { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_B { + clocks = <&clkc CLKID_CLK81>; +}; + +&uart_C { + clocks = <&clkc CLKID_CLK81>; +}; + +&usb0 { + compatible = "amlogic,meson8b-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb1 { + compatible = "amlogic,meson8b-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb0_phy { + compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; + clock-names = "usb_general", "usb"; + resets = <&reset RESET_USB_OTG>; +}; + +&usb1_phy { + compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; + clock-names = "usb_general", "usb"; + resets = <&reset RESET_USB_OTG>; +}; diff --git a/src/arm/motorola-cpcap-mapphone.dtsi b/src/arm/motorola-cpcap-mapphone.dtsi index f5aeb3959afd..1eb5da1dc8f0 100644 --- a/src/arm/motorola-cpcap-mapphone.dtsi +++ b/src/arm/motorola-cpcap-mapphone.dtsi @@ -26,6 +26,22 @@ #io-channel-cells = <1>; }; + cpcap_battery: battery { + compatible = "motorola,cpcap-battery"; + interrupts-extended = < + &cpcap 6 0 &cpcap 5 0 &cpcap 3 0 + &cpcap 20 0 &cpcap 54 0 + >; + interrupt-names = + "eol", "lowbph", "lowbpl", + "chrgcurr1", "battdetb"; + io-channels = <&cpcap_adc 0 &cpcap_adc 1 + &cpcap_adc 5 &cpcap_adc 6>; + io-channel-names = "battdetb", "battp", + "chg_isense", "batti"; + power-supplies = <&cpcap_charger>; + }; + cpcap_charger: charger { compatible = "motorola,mapphone-cpcap-charger"; interrupts-extended = < diff --git a/src/arm/moxart.dtsi b/src/arm/moxart.dtsi index e86f8c905ac5..1f4c795d3f72 100644 --- a/src/arm/moxart.dtsi +++ b/src/arm/moxart.dtsi @@ -58,10 +58,11 @@ }; timer: timer@98400000 { - compatible = "moxa,moxart-timer"; + compatible = "moxa,moxart-timer", "faraday,fttmr010"; reg = <0x98400000 0x42>; interrupts = <19 IRQ_TYPE_EDGE_FALLING>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; gpio: gpio@98700000 { diff --git a/src/arm/mt2701-evb.dts b/src/arm/mt2701-evb.dts index a4837985b7a7..f48497354221 100644 --- a/src/arm/mt2701-evb.dts +++ b/src/arm/mt2701-evb.dts @@ -22,13 +22,95 @@ memory { reg = <0 0x80000000 0 0x40000000>; }; + + sound:sound { + compatible = "mediatek,mt2701-cs42448-machine"; + mediatek,platform = <&afe>; + /* CS42448 Machine name */ + audio-routing = + "Line Out Jack", "AOUT1L", + "Line Out Jack", "AOUT1R", + "Line Out Jack", "AOUT2L", + "Line Out Jack", "AOUT2R", + "Line Out Jack", "AOUT3L", + "Line Out Jack", "AOUT3R", + "Line Out Jack", "AOUT4L", + "Line Out Jack", "AOUT4R", + "AIN1L", "AMIC", + "AIN1R", "AMIC", + "AIN2L", "Tuner In", + "AIN2R", "Tuner In", + "AIN3L", "Satellite Tuner In", + "AIN3R", "Satellite Tuner In", + "AIN3L", "AUX In", + "AIN3R", "AUX In"; + mediatek,audio-codec = <&cs42448>; + mediatek,audio-codec-bt-mrg = <&bt_sco_codec>; + pinctrl-names = "default"; + pinctrl-0 = <&aud_pins_default>; + i2s1-in-sel-gpio1 = <&pio 53 0>; + i2s1-in-sel-gpio2 = <&pio 54 0>; + status = "okay"; + }; + + bt_sco_codec:bt_sco_codec { + compatible = "linux,bt-sco"; + }; }; &auxadc { status = "okay"; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + cs42448: cs42448@48 { + compatible = "cirrus,cs42448"; + reg = <0x48>; + clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>; + clock-names = "mclk"; + }; +}; + &pio { + i2c0_pins_a: i2c0@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c1_pins_a: i2c1@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c2_pins_a: i2c2@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + spi_pins_a: spi0@0 { pins_spi { pinmux = , @@ -39,6 +121,31 @@ }; }; + aud_pins_default: audiodefault { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength = ; + bias-pull-down; + }; + }; + spi_pins_b: spi1@0 { pins_spi { pinmux = , @@ -78,6 +185,31 @@ status = "disabled"; }; +&nor_flash { + pinctrl-names = "default"; + pinctrl-0 = <&nor_pins_default>; + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + }; +}; + +&pio { + nor_pins_default: nor { + pins1 { + pinmux = , + , + , + , + , + ; + drive-strength = ; + bias-pull-up; + }; + }; +}; + &uart0 { status = "okay"; }; diff --git a/src/arm/mt2701.dtsi b/src/arm/mt2701.dtsi index 803721050116..f1efdc63656a 100644 --- a/src/arm/mt2701.dtsi +++ b/src/arm/mt2701.dtsi @@ -16,13 +16,14 @@ #include #include #include +#include #include #include "skeleton64.dtsi" #include "mt2701-pinfunc.h" / { compatible = "mediatek,mt2701"; - interrupt-parent = <&sysirq>; + interrupt-parent = <&cirq>; cpus { #address-cells = <1>; @@ -210,6 +211,16 @@ reg = <0 0x10200100 0 0x1c>; }; + cirq: interrupt-controller@10204000 { + compatible = "mediatek,mt2701-cirq", + "mediatek,mtk-cirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&sysirq>; + reg = <0 0x10204000 0 0x400>; + mediatek,ext-irq-range = <32 200>; + }; + iommu: mmsys_iommu@10205000 { compatible = "mediatek,mt2701-m4u"; reg = <0 0x10205000 0 0x1000>; @@ -286,6 +297,48 @@ status = "disabled"; }; + i2c0: i2c@11007000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi0: spi@1100a000 { compatible = "mediatek,mt2701-spi"; #address-cells = <1>; @@ -334,6 +387,18 @@ status = "disabled"; }; + nor_flash: spi@11014000 { + compatible = "mediatek,mt2701-nor", + "mediatek,mt8173-nor"; + reg = <0 0x11014000 0 0xe0>; + clocks = <&pericfg CLK_PERI_FLASH>, + <&topckgen CLK_TOP_FLASH_SEL>; + clock-names = "spi", "sf"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi1: spi@11016000 { compatible = "mediatek,mt2701-spi"; #address-cells = <1>; @@ -360,6 +425,104 @@ status = "disabled"; }; + afe: audio-controller@11220000 { + compatible = "mediatek,mt2701-audio"; + reg = <0 0x11220000 0 0x2000>, + <0 0x112a0000 0 0x20000>; + interrupts = ; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + + clocks = <&infracfg CLK_INFRA_AUDIO>, + <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_MUX1_DIV>, + <&topckgen CLK_TOP_AUD_MUX2_DIV>, + <&topckgen CLK_TOP_AUD_48K_TIMING>, + <&topckgen CLK_TOP_AUD_44K_TIMING>, + <&topckgen CLK_TOP_AUDPLL_MUX_SEL>, + <&topckgen CLK_TOP_APLL_SEL>, + <&topckgen CLK_TOP_AUD1PLL_98M>, + <&topckgen CLK_TOP_AUD2PLL_90M>, + <&topckgen CLK_TOP_HADDS2PLL_98M>, + <&topckgen CLK_TOP_HADDS2PLL_294M>, + <&topckgen CLK_TOP_AUDPLL>, + <&topckgen CLK_TOP_AUDPLL_D4>, + <&topckgen CLK_TOP_AUDPLL_D8>, + <&topckgen CLK_TOP_AUDPLL_D16>, + <&topckgen CLK_TOP_AUDPLL_D24>, + <&topckgen CLK_TOP_AUDINTBUS_SEL>, + <&clk26m>, + <&topckgen CLK_TOP_SYSPLL1_D4>, + <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K5_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K6_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K5_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K6_SRC_DIV>, + <&topckgen CLK_TOP_AUD_I2S1_MCLK>, + <&topckgen CLK_TOP_AUD_I2S2_MCLK>, + <&topckgen CLK_TOP_AUD_I2S3_MCLK>, + <&topckgen CLK_TOP_AUD_I2S4_MCLK>, + <&topckgen CLK_TOP_AUD_I2S5_MCLK>, + <&topckgen CLK_TOP_AUD_I2S6_MCLK>, + <&topckgen CLK_TOP_ASM_M_SEL>, + <&topckgen CLK_TOP_ASM_H_SEL>, + <&topckgen CLK_TOP_UNIVPLL2_D4>, + <&topckgen CLK_TOP_UNIVPLL2_D2>, + <&topckgen CLK_TOP_SYSPLL_D5>; + + clock-names = "infra_sys_audio_clk", + "top_audio_mux1_sel", + "top_audio_mux2_sel", + "top_audio_mux1_div", + "top_audio_mux2_div", + "top_audio_48k_timing", + "top_audio_44k_timing", + "top_audpll_mux_sel", + "top_apll_sel", + "top_aud1_pll_98M", + "top_aud2_pll_90M", + "top_hadds2_pll_98M", + "top_hadds2_pll_294M", + "top_audpll", + "top_audpll_d4", + "top_audpll_d8", + "top_audpll_d16", + "top_audpll_d24", + "top_audintbus_sel", + "clk_26m", + "top_syspll1_d4", + "top_aud_k1_src_sel", + "top_aud_k2_src_sel", + "top_aud_k3_src_sel", + "top_aud_k4_src_sel", + "top_aud_k5_src_sel", + "top_aud_k6_src_sel", + "top_aud_k1_src_div", + "top_aud_k2_src_div", + "top_aud_k3_src_div", + "top_aud_k4_src_div", + "top_aud_k5_src_div", + "top_aud_k6_src_div", + "top_aud_i2s1_mclk", + "top_aud_i2s2_mclk", + "top_aud_i2s3_mclk", + "top_aud_i2s4_mclk", + "top_aud_i2s5_mclk", + "top_aud_i2s6_mclk", + "top_asm_m_sel", + "top_asm_h_sel", + "top_univpll2_d4", + "top_univpll2_d2", + "top_syspll_d5"; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt2701-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; @@ -392,6 +555,20 @@ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; }; + jpegdec: jpegdec@15004000 { + compatible = "mediatek,mt2701-jpgdec"; + reg = <0 0x15004000 0 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + <&imgsys CLK_IMG_JPGDEC>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; + }; + vdecsys: syscon@16000000 { compatible = "mediatek,mt2701-vdecsys", "syscon"; reg = <0 0x16000000 0 0x1000>; diff --git a/src/arm/mt7623.dtsi b/src/arm/mt7623.dtsi index 3a9e9b6aea68..d81158b2b02f 100644 --- a/src/arm/mt7623.dtsi +++ b/src/arm/mt7623.dtsi @@ -1,6 +1,7 @@ /* - * Copyright (c) 2016 MediaTek Inc. + * Copyright (c) 2017 MediaTek Inc. * Author: John Crispin + * Sean Wang * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -14,6 +15,12 @@ #include #include +#include +#include +#include +#include +#include +#include #include "skeleton64.dtsi" / { @@ -53,16 +60,18 @@ #clock-cells = <0>; }; - rtc_clk: dummy32k { + rtc32k: oscillator@1 { compatible = "fixed-clock"; - clock-frequency = <32000>; #clock-cells = <0>; + clock-frequency = <32000>; + clock-output-names = "rtc32k"; }; - uart_clk: dummy26m { + clk26m: oscillator@0 { compatible = "fixed-clock"; - clock-frequency = <26000000>; #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; }; timer { @@ -76,6 +85,65 @@ arm,cpu-registers-not-fw-configured; }; + topckgen: syscon@10000000 { + compatible = "mediatek,mt7623-topckgen", + "mediatek,mt2701-topckgen", + "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: syscon@10001000 { + compatible = "mediatek,mt7623-infracfg", + "mediatek,mt2701-infracfg", + "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pericfg: syscon@10003000 { + compatible = "mediatek,mt7623-pericfg", + "mediatek,mt2701-pericfg", + "syscon"; + reg = <0 0x10003000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pio: pinctrl@10005000 { + compatible = "mediatek,mt7623-pinctrl", + "mediatek,mt2701-pinctrl"; + reg = <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap = <&syscfg_pctl_a>; + pins-are-numbered; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + interrupts = , + ; + }; + + syscfg_pctl_a: syscfg@10005000 { + compatible = "mediatek,mt7623-pctl-a-syscfg", "syscon"; + reg = <0 0x10005000 0 0x1000>; + }; + + scpsys: scpsys@10006000 { + compatible = "mediatek,mt7623-scpsys", + "mediatek,mt2701-scpsys", + "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + infracfg = <&infracfg>; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_MFG_SEL>, + <&topckgen CLK_TOP_ETHIF_SEL>; + clock-names = "mm", "mfg", "ethif"; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt7623-wdt", "mediatek,mt6589-wdt"; @@ -87,10 +155,32 @@ "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; interrupts = ; - clocks = <&system_clk>, <&rtc_clk>; + clocks = <&system_clk>, <&rtc32k>; clock-names = "system-clk", "rtc-clk"; }; + pwrap: pwrap@1000d000 { + compatible = "mediatek,mt7623-pwrap", + "mediatek,mt2701-pwrap"; + reg = <0 0x1000d000 0 0x1000>; + reg-names = "pwrap"; + interrupts = ; + resets = <&infracfg MT2701_INFRA_PMIC_WRAP_RST>; + reset-names = "pwrap"; + clocks = <&infracfg CLK_INFRA_PMICSPI>, + <&infracfg CLK_INFRA_PMICWRAP>; + clock-names = "spi", "wrap"; + }; + + cir: cir@0x10013000 { + compatible = "mediatek,mt7623-cir"; + reg = <0 0x10013000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_IRRX>; + clock-names = "clk"; + status = "disabled"; + }; + sysirq: interrupt-controller@10200100 { compatible = "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq"; @@ -100,6 +190,32 @@ reg = <0 0x10200100 0 0x1c>; }; + efuse: efuse@10206000 { + compatible = "mediatek,mt7623-efuse", + "mediatek,mt8173-efuse"; + reg = <0 0x10206000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + thermal_calibration_data: calib@424 { + reg = <0x424 0xc>; + }; + }; + + apmixedsys: syscon@10209000 { + compatible = "mediatek,mt7623-apmixedsys", + "mediatek,mt2701-apmixedsys", + "syscon"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + + rng: rng@1020f000 { + compatible = "mediatek,mt7623-rng"; + reg = <0 0x1020f000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_TRNG>; + clock-names = "rng"; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; @@ -111,12 +227,23 @@ <0 0x10216000 0 0x2000>; }; + auxadc: adc@11001000 { + compatible = "mediatek,mt7623-auxadc", + "mediatek,mt2701-auxadc"; + reg = <0 0x11001000 0 0x1000>; + clocks = <&pericfg CLK_PERI_AUXADC>; + clock-names = "main"; + #io-channel-cells = <1>; + }; + uart0: serial@11002000 { compatible = "mediatek,mt7623-uart", "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART0_SEL>, + <&pericfg CLK_PERI_UART0>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -125,7 +252,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART1_SEL>, + <&pericfg CLK_PERI_UART1>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -134,7 +263,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11004000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART2_SEL>, + <&pericfg CLK_PERI_UART2>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -143,7 +274,402 @@ "mediatek,mt6577-uart"; reg = <0 0x11005000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART3_SEL>, + <&pericfg CLK_PERI_UART3>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + pwm: pwm@11006000 { + compatible = "mediatek,mt7623-pwm"; + reg = <0 0x11006000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&pericfg CLK_PERI_PWM>, + <&pericfg CLK_PERI_PWM1>, + <&pericfg CLK_PERI_PWM2>, + <&pericfg CLK_PERI_PWM3>, + <&pericfg CLK_PERI_PWM4>, + <&pericfg CLK_PERI_PWM5>; + clock-names = "top", "main", "pwm1", "pwm2", + "pwm3", "pwm4", "pwm5"; + status = "disabled"; + }; + + i2c0: i2c@11007000 { + compatible = "mediatek,mt7623-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C0>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt7623-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C1>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt7623-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C2>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi0: spi@1100a000 { + compatible = "mediatek,mt7623-spi", + "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI0_SEL>, + <&pericfg CLK_PERI_SPI0>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + thermal: thermal@1100b000 { + #thermal-sensor-cells = <1>; + compatible = "mediatek,mt7623-thermal", + "mediatek,mt2701-thermal"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; + clock-names = "therm", "auxadc"; + resets = <&pericfg MT2701_PERI_THERM_SW_RST>; + reset-names = "therm"; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + nvmem-cells = <&thermal_calibration_data>; + nvmem-cell-names = "calibration-data"; + }; + + spi1: spi@11016000 { + compatible = "mediatek,mt7623-spi", + "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x11016000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI1_SEL>, + <&pericfg CLK_PERI_SPI1>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + spi2: spi@11017000 { + compatible = "mediatek,mt7623-spi", + "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x11017000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI2_SEL>, + <&pericfg CLK_PERI_SPI2>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + nandc: nfi@1100d000 { + compatible = "mediatek,mt7623-nfc", + "mediatek,mt2701-nfc"; + reg = <0 0x1100d000 0 0x1000>; + interrupts = ; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + clocks = <&pericfg CLK_PERI_NFI>, + <&pericfg CLK_PERI_NFI_PAD>; + clock-names = "nfi_clk", "pad_clk"; + status = "disabled"; + ecc-engine = <&bch>; + #address-cells = <1>; + #size-cells = <0>; + }; + + bch: ecc@1100e000 { + compatible = "mediatek,mt7623-ecc", + "mediatek,mt2701-ecc"; + reg = <0 0x1100e000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_NFI_ECC>; + clock-names = "nfiecc_clk"; + status = "disabled"; + }; + + afe: audio-controller@11220000 { + compatible = "mediatek,mt7623-audio", + "mediatek,mt2701-audio"; + reg = <0 0x11220000 0 0x2000>, + <0 0x112a0000 0 0x20000>; + interrupts = ; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + + clocks = <&infracfg CLK_INFRA_AUDIO>, + <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_MUX1_DIV>, + <&topckgen CLK_TOP_AUD_MUX2_DIV>, + <&topckgen CLK_TOP_AUD_48K_TIMING>, + <&topckgen CLK_TOP_AUD_44K_TIMING>, + <&topckgen CLK_TOP_AUDPLL_MUX_SEL>, + <&topckgen CLK_TOP_APLL_SEL>, + <&topckgen CLK_TOP_AUD1PLL_98M>, + <&topckgen CLK_TOP_AUD2PLL_90M>, + <&topckgen CLK_TOP_HADDS2PLL_98M>, + <&topckgen CLK_TOP_HADDS2PLL_294M>, + <&topckgen CLK_TOP_AUDPLL>, + <&topckgen CLK_TOP_AUDPLL_D4>, + <&topckgen CLK_TOP_AUDPLL_D8>, + <&topckgen CLK_TOP_AUDPLL_D16>, + <&topckgen CLK_TOP_AUDPLL_D24>, + <&topckgen CLK_TOP_AUDINTBUS_SEL>, + <&clk26m>, + <&topckgen CLK_TOP_SYSPLL1_D4>, + <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K5_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K6_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K5_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K6_SRC_DIV>, + <&topckgen CLK_TOP_AUD_I2S1_MCLK>, + <&topckgen CLK_TOP_AUD_I2S2_MCLK>, + <&topckgen CLK_TOP_AUD_I2S3_MCLK>, + <&topckgen CLK_TOP_AUD_I2S4_MCLK>, + <&topckgen CLK_TOP_AUD_I2S5_MCLK>, + <&topckgen CLK_TOP_AUD_I2S6_MCLK>, + <&topckgen CLK_TOP_ASM_M_SEL>, + <&topckgen CLK_TOP_ASM_H_SEL>, + <&topckgen CLK_TOP_UNIVPLL2_D4>, + <&topckgen CLK_TOP_UNIVPLL2_D2>, + <&topckgen CLK_TOP_SYSPLL_D5>; + + clock-names = "infra_sys_audio_clk", + "top_audio_mux1_sel", + "top_audio_mux2_sel", + "top_audio_mux1_div", + "top_audio_mux2_div", + "top_audio_48k_timing", + "top_audio_44k_timing", + "top_audpll_mux_sel", + "top_apll_sel", + "top_aud1_pll_98M", + "top_aud2_pll_90M", + "top_hadds2_pll_98M", + "top_hadds2_pll_294M", + "top_audpll", + "top_audpll_d4", + "top_audpll_d8", + "top_audpll_d16", + "top_audpll_d24", + "top_audintbus_sel", + "clk_26m", + "top_syspll1_d4", + "top_aud_k1_src_sel", + "top_aud_k2_src_sel", + "top_aud_k3_src_sel", + "top_aud_k4_src_sel", + "top_aud_k5_src_sel", + "top_aud_k6_src_sel", + "top_aud_k1_src_div", + "top_aud_k2_src_div", + "top_aud_k3_src_div", + "top_aud_k4_src_div", + "top_aud_k5_src_div", + "top_aud_k6_src_div", + "top_aud_i2s1_mclk", + "top_aud_i2s2_mclk", + "top_aud_i2s3_mclk", + "top_aud_i2s4_mclk", + "top_aud_i2s5_mclk", + "top_aud_i2s6_mclk", + "top_asm_m_sel", + "top_asm_h_sel", + "top_univpll2_d4", + "top_univpll2_d2", + "top_syspll_d5"; + }; + + mmc0: mmc@11230000 { + compatible = "mediatek,mt7623-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11230000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC30_0>, + <&topckgen CLK_TOP_MSDC30_0_SEL>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc1: mmc@11240000 { + compatible = "mediatek,mt7623-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11240000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC30_1>, + <&topckgen CLK_TOP_MSDC30_1_SEL>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + usb1: usb@1a1c0000 { + compatible = "mediatek,mt7623-xhci", + "mediatek,mt8173-xhci"; + reg = <0 0x1a1c0000 0 0x1000>, + <0 0x1a1c4700 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&hifsys CLK_HIFSYS_USB0PHY>, + <&topckgen CLK_TOP_ETHIF_SEL>; + clock-names = "sys_ck", "free_ck"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; + phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; + status = "disabled"; + }; + + u3phy1: usb-phy@1a1c4000 { + compatible = "mediatek,mt7623-u3phy", "mediatek,mt2701-u3phy"; + reg = <0 0x1a1c4000 0 0x0700>; + clocks = <&clk26m>; + clock-names = "u3phya_ref"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + u2port0: usb-phy@1a1c4800 { + reg = <0 0x1a1c4800 0 0x0100>; + #phy-cells = <1>; + status = "okay"; + }; + + u3port0: usb-phy@1a1c4900 { + reg = <0 0x1a1c4900 0 0x0700>; + #phy-cells = <1>; + status = "okay"; + }; + }; + + usb2: usb@1a240000 { + compatible = "mediatek,mt7623-xhci", + "mediatek,mt8173-xhci"; + reg = <0 0x1a240000 0 0x1000>, + <0 0x1a244700 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&hifsys CLK_HIFSYS_USB1PHY>, + <&topckgen CLK_TOP_ETHIF_SEL>; + clock-names = "sys_ck", "free_ck"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; + phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; + status = "disabled"; + }; + + u3phy2: usb-phy@1a244000 { + compatible = "mediatek,mt7623-u3phy", "mediatek,mt2701-u3phy"; + reg = <0 0x1a244000 0 0x0700>; + clocks = <&clk26m>; + clock-names = "u3phya_ref"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + u2port1: usb-phy@1a244800 { + reg = <0 0x1a244800 0 0x0100>; + #phy-cells = <1>; + status = "okay"; + }; + + u3port1: usb-phy@1a244900 { + reg = <0 0x1a244900 0 0x0700>; + #phy-cells = <1>; + status = "okay"; + }; + }; + + hifsys: syscon@1a000000 { + compatible = "mediatek,mt7623-hifsys", + "mediatek,mt2701-hifsys", + "syscon"; + reg = <0 0x1a000000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + ethsys: syscon@1b000000 { + compatible = "mediatek,mt7623-ethsys", + "mediatek,mt2701-ethsys", + "syscon"; + reg = <0 0x1b000000 0 0x1000>; + #clock-cells = <1>; + }; + + eth: ethernet@1b100000 { + compatible = "mediatek,mt2701-eth", "syscon"; + reg = <0 0x1b100000 0 0x20000>; + interrupts = , + , + ; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <ðsys CLK_ETHSYS_ESW>, + <ðsys CLK_ETHSYS_GP1>, + <ðsys CLK_ETHSYS_GP2>, + <&apmixedsys CLK_APMIXED_TRGPLL>; + clock-names = "ethif", "esw", "gp1", "gp2", "trgpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; + mediatek,ethsys = <ðsys>; + mediatek,pctl = <&syscfg_pctl_a>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + crypto: crypto@1b240000 { + compatible = "mediatek,mt7623-crypto"; + reg = <0 0x1b240000 0 0x20000>; + interrupts = , + , + , + , + ; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "ethif","cryp"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; status = "disabled"; }; }; diff --git a/src/arm/omap3-cm-t3x.dtsi b/src/arm/omap3-cm-t3x.dtsi index 57b9a028a49a..fccd5383243c 100644 --- a/src/arm/omap3-cm-t3x.dtsi +++ b/src/arm/omap3-cm-t3x.dtsi @@ -188,7 +188,7 @@ clock-frequency = <400000>; at24@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; pagesize = <16>; reg = <0x50>; }; diff --git a/src/arm/omap3-devkit8000-common.dtsi b/src/arm/omap3-devkit8000-common.dtsi index f330c69cc683..82aa9c4a0f1c 100644 --- a/src/arm/omap3-devkit8000-common.dtsi +++ b/src/arm/omap3-devkit8000-common.dtsi @@ -201,7 +201,8 @@ }; &gpmc { - ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ + ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ + 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */ nand@0,0 { compatible = "ti,omap2-nand"; @@ -256,12 +257,8 @@ reg = <0x680000 0xf980000>; }; }; -}; -&gpmc { - ranges = <6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */ - - ethernet@0,0 { + ethernet@6,0 { compatible = "davicom,dm9000"; reg = <6 0x000 2 6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */ diff --git a/src/arm/omap3-evm-37xx.dts b/src/arm/omap3-evm-37xx.dts index 4f9a76544602..c963b31ec3b3 100644 --- a/src/arm/omap3-evm-37xx.dts +++ b/src/arm/omap3-evm-37xx.dts @@ -34,7 +34,15 @@ >; }; +&hsusb2_phy { + pinctrl-names = "default"; + pinctrl-0 = <&ehci_phy_pins>; +}; + &omap3_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>; + dss_dpi_pins1: pinmux_dss_dpi_pins2 { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ @@ -98,6 +106,37 @@ >; }; + /* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */ + on_board_gpio_61: pinmux_ehci_port_select_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4) + >; + }; + + /* Used by OHCI and EHCI. OHCI won't work without external phy */ + hsusb2_pins: pinmux_hsusb2_pins { + pinctrl-single,pins = < + + /* mcspi1_cs3.hsusb2_data2 */ + OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* mcspi2_clk.hsusb2_data7 */ + OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* mcspi2_simo.hsusb2_data4 */ + OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* mcspi2_somi.hsusb2_data5 */ + OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* mcspi2_cs0.hsusb2_data6 */ + OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* mcspi2_cs1.hsusb2_data3 */ + OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) + >; + }; + wl12xx_gpio: pinmux_wl12xx_gpio { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ @@ -112,6 +151,46 @@ }; }; +&omap3_pmx_core2 { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb2_2_pins>; + + ehci_phy_pins: pinmux_ehci_phy_pins { + pinctrl-single,pins = < + + /* EHCI PHY reset GPIO etk_d7.gpio_21 */ + OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4) + + /* EHCI VBUS etk_d8.gpio_22 */ + OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) + >; + }; + + /* Used by OHCI and EHCI. OHCI won't work without external phy */ + hsusb2_2_pins: pinmux_hsusb2_2_pins { + pinctrl-single,pins = < + + /* etk_d10.hsusb2_clk */ + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) + + /* etk_d11.hsusb2_stp */ + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) + + /* etk_d12.hsusb2_dir */ + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* etk_d13.hsusb2_nxt */ + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* etk_d14.hsusb2_data0 */ + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) + + /* etk_d15.hsusb2_data1 */ + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) + >; + }; +}; + &omap3_pmx_wkup { dss_dpi_pins2: pinmux_dss_dpi_pins1 { pinctrl-single,pins = < @@ -153,6 +232,29 @@ pinctrl-0 = <&uart3_pins>; }; +/* + * GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface + * for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V. + */ +&gpio2 { + en_usb2_port { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */ + output-low; + line-name = "enable usb2 port"; + }; +}; + +/* T2_GPIO_2 low to route GPIO_61 to on-board devices */ +&twl_gpio { + en_on_board_gpio_61 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "en_hsusb2_clk"; + }; +}; + &gpmc { ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */ <5 0 0x2c000000 0x01000000>; diff --git a/src/arm/omap3-evm-common.dtsi b/src/arm/omap3-evm-common.dtsi index 090475083c2f..2b1d6977a535 100644 --- a/src/arm/omap3-evm-common.dtsi +++ b/src/arm/omap3-evm-common.dtsi @@ -12,6 +12,24 @@ }; }; + /* HS USB Port 2 Power */ + hsusb2_power: hsusb2_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; /* gpio_22 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; + reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; /* gpio_21 */ + vcc-supply = <&hsusb2_power>; + }; + leds { compatible = "gpio-leds"; ledb { @@ -76,7 +94,6 @@ &lcd_3v3 { gpio = <&gpio5 25 GPIO_ACTIVE_LOW>; /* gpio153 */ - enable-active-low; }; &lcd0 { @@ -143,6 +160,14 @@ >; }; +&usbhshost { + port2-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <0 &hsusb2_phy>; +}; + &usb_otg_hs { interface-type = <0>; usb-phy = <&usb2_phy>; @@ -159,3 +184,10 @@ reg = <5 0 0xff>; }; }; + +&vaux2 { + regulator-name = "usb_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; +}; diff --git a/src/arm/omap3-gta04.dtsi b/src/arm/omap3-gta04.dtsi index 9ec737069369..4504908c23fe 100644 --- a/src/arm/omap3-gta04.dtsi +++ b/src/arm/omap3-gta04.dtsi @@ -419,7 +419,7 @@ /* RFID EEPROM */ m24lr64@50 { - compatible = "at,24c64"; + compatible = "atmel,24c64"; reg = <0x50>; }; }; diff --git a/src/arm/omap3-overo-base.dtsi b/src/arm/omap3-overo-base.dtsi index 401fae838fe9..cd220342a805 100644 --- a/src/arm/omap3-overo-base.dtsi +++ b/src/arm/omap3-overo-base.dtsi @@ -74,16 +74,6 @@ gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ startup-delay-us = <10000>; }; - - /* Regulator to trigger the nReset signal of the Bluetooth module */ - w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset { - compatible = "regulator-fixed"; - regulator-name = "regulator-w3cbw003c-bt-nreset"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */ - startup-delay-us = <10000>; - }; }; &omap3_pmx_core { @@ -191,7 +181,6 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; vmmc-supply = <&w3cbw003c_npoweron>; - vqmmc-supply = <&w3cbw003c_bt_nreset>; vmmc_aux-supply = <&w3cbw003c_wifi_nreset>; bus-width = <4>; cap-sdio-irq; diff --git a/src/arm/omap3-sb-t35.dtsi b/src/arm/omap3-sb-t35.dtsi index 73643fabde5d..4476fb685a1b 100644 --- a/src/arm/omap3-sb-t35.dtsi +++ b/src/arm/omap3-sb-t35.dtsi @@ -50,7 +50,6 @@ pinctrl-names = "default"; pinctrl-0 = <&sb_t35_audio_amp>; gpio = <&gpio2 29 GPIO_ACTIVE_LOW>; /* gpio_61 */ - enable-active-low; regulator-always-on; }; }; @@ -90,7 +89,7 @@ clock-frequency = <400000>; at24@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; pagesize = <16>; reg = <0x50>; }; diff --git a/src/arm/omap3-tao3530.dtsi b/src/arm/omap3-tao3530.dtsi index dc80886b5329..06ac0f80bcf0 100644 --- a/src/arm/omap3-tao3530.dtsi +++ b/src/arm/omap3-tao3530.dtsi @@ -63,7 +63,6 @@ regulator-min-microvolt = <3150000>; regulator-max-microvolt = <3150000>; gpio = <&gpio5 29 GPIO_ACTIVE_LOW>; /* gpio_157 */ - enable-active-low; startup-delay-us = <10000>; }; }; diff --git a/src/arm/omap4-droid4-xt894.dts b/src/arm/omap4-droid4-xt894.dts index 89eb607f4a9e..10ca1c174995 100644 --- a/src/arm/omap4-droid4-xt894.dts +++ b/src/arm/omap4-droid4-xt894.dts @@ -301,7 +301,7 @@ #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@2 { - compatible = "ti,wl1283"; + compatible = "ti,wl1285", "ti,wl1283"; reg = <2>; interrupt-parent = <&gpio4>; interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */ @@ -348,6 +348,17 @@ interrupt-names = "irq", "wakeup"; wakeup-source; }; + + isl29030@44 { + compatible = "isil,isl29030"; + reg = <0x44>; + + pinctrl-names = "default"; + pinctrl-0 = <&als_proximity_pins>; + + interrupt-parent = <&gpio6>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */ + }; }; &omap4_pmx_core { @@ -395,6 +406,12 @@ >; }; + als_proximity_pins: pinmux_als_proximity_pins { + pinctrl-single,pins = < + OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3) + >; + }; + usb_ulpi_pins: pinmux_usb_ulpi_pins { pinctrl-single,pins = < OMAP4_IOPAD(0x196, MUX_MODE7) @@ -453,6 +470,15 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) >; }; + + uart4_pins: pinmux_uart4_pins { + pinctrl-single,pins = < + OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */ + OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */ + OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */ + OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */ + >; + }; }; &omap4_pmx_wkup { @@ -469,6 +495,17 @@ &omap4_pmx_core 0x17c>; }; +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + + bluetooth { + compatible = "ti,wl1285-st"; + enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */ + max-speed = <3686400>; + }; +}; + &usbhsehci { phys = <&hsusb1_phy>; }; diff --git a/src/arm/omap4-duovero.dtsi b/src/arm/omap4-duovero.dtsi index ec0bd9779e1a..6e6810c258eb 100644 --- a/src/arm/omap4-duovero.dtsi +++ b/src/arm/omap4-duovero.dtsi @@ -12,6 +12,10 @@ model = "Gumstix Duovero"; compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; + chosen { + stdout-path = &uart3; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ diff --git a/src/arm/omap4-var-som-om44.dtsi b/src/arm/omap4-var-som-om44.dtsi index 758b6eb7ae43..6500bfc8d130 100644 --- a/src/arm/omap4-var-som-om44.dtsi +++ b/src/arm/omap4-var-som-om44.dtsi @@ -241,7 +241,7 @@ }; eeprom@50 { - compatible = "microchip,24c32"; + compatible = "microchip,24c32", "atmel,24c32"; reg = <0x50>; }; }; diff --git a/src/arm/omap4.dtsi b/src/arm/omap4.dtsi index 578c53f08309..64d00f5893a6 100644 --- a/src/arm/omap4.dtsi +++ b/src/arm/omap4.dtsi @@ -900,15 +900,24 @@ ctrl-module = <&omap_control_usbotg>; }; - aes: aes@4b501000 { + aes1: aes@4b501000 { compatible = "ti,omap4-aes"; - ti,hwmods = "aes"; + ti,hwmods = "aes1"; reg = <0x4b501000 0xa0>; interrupts = ; dmas = <&sdma 111>, <&sdma 110>; dma-names = "tx", "rx"; }; + aes2: aes@4b701000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes2"; + reg = <0x4b701000 0xa0>; + interrupts = ; + dmas = <&sdma 114>, <&sdma 113>; + dma-names = "tx", "rx"; + }; + des: des@480a5000 { compatible = "ti,omap4-des"; ti,hwmods = "des"; @@ -918,6 +927,15 @@ dma-names = "tx", "rx"; }; + sham: sham@4b100000 { + compatible = "ti,omap4-sham"; + ti,hwmods = "sham"; + reg = <0x4b100000 0x300>; + interrupts = ; + dmas = <&sdma 119>; + dma-names = "rx"; + }; + abb_mpu: regulator-abb-mpu { compatible = "ti,abb-v2"; regulator-name = "abb_mpu"; diff --git a/src/arm/omap44xx-clocks.dtsi b/src/arm/omap44xx-clocks.dtsi index 9573b37fbaa7..05732ed4f50f 100644 --- a/src/arm/omap44xx-clocks.dtsi +++ b/src/arm/omap44xx-clocks.dtsi @@ -357,6 +357,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin_ck>, <&iva_hsd_byp_clk_mux_ck>; reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; + assigned-clocks = <&dpll_iva_ck>; + assigned-clock-rates = <931200000>; }; dpll_iva_x2_ck: dpll_iva_x2_ck { @@ -374,6 +376,8 @@ reg = <0x01b8>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_iva_m4x2_ck>; + assigned-clock-rates = <465600000>; }; dpll_iva_m5x2_ck: dpll_iva_m5x2_ck@1bc { @@ -385,6 +389,8 @@ reg = <0x01bc>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_iva_m5x2_ck>; + assigned-clock-rates = <266100000>; }; dpll_mpu_ck: dpll_mpu_ck@160 { @@ -969,22 +975,6 @@ ti,max-div = <2>; }; - aes1_fck: aes1_fck@15a0 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l3_div_ck>; - ti,bit-shift = <1>; - reg = <0x15a0>; - }; - - aes2_fck: aes2_fck@15a8 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l3_div_ck>; - ti,bit-shift = <1>; - reg = <0x15a8>; - }; - dss_sys_clk: dss_sys_clk@1120 { #clock-cells = <0>; compatible = "ti,gate-clock"; diff --git a/src/arm/omap5-cm-t54.dts b/src/arm/omap5-cm-t54.dts index b153f604932a..78397f66d0b2 100644 --- a/src/arm/omap5-cm-t54.dts +++ b/src/arm/omap5-cm-t54.dts @@ -404,7 +404,7 @@ clock-frequency = <400000>; at24@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; pagesize = <16>; reg = <0x50>; }; diff --git a/src/arm/omap5-sbc-t54.dts b/src/arm/omap5-sbc-t54.dts index 337bbbc01a35..7b8810d13257 100644 --- a/src/arm/omap5-sbc-t54.dts +++ b/src/arm/omap5-sbc-t54.dts @@ -44,7 +44,7 @@ clock-frequency = <400000>; at24@50 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; pagesize = <16>; reg = <0x50>; }; diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index 0d42c46f13e7..ec2c8baef62a 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -137,6 +137,13 @@ }; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + + cd-gpios = <&gpio5 24 GPIO_ACTIVE_LOW>; /* gpio5_152 */ +}; + &omap5_pmx_core { evm_keys_pins: pinmux_evm_keys_gpio_pins { pinctrl-single,pins = < @@ -150,6 +157,12 @@ OMAP5_IOPAD(0x1c8, PIN_INPUT | MUX_MODE0) /* i2c5_sda */ >; }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1d4, PIN_INPUT_PULLUP | MUX_MODE6) /* gpio5_152 */ + >; + }; }; &tpd12s015 { diff --git a/src/arm/omap54xx-clocks.dtsi b/src/arm/omap54xx-clocks.dtsi index 4899c2359d0a..529193442620 100644 --- a/src/arm/omap54xx-clocks.dtsi +++ b/src/arm/omap54xx-clocks.dtsi @@ -315,6 +315,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin>, <&dpll_iva_byp_mux>; reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; + assigned-clocks = <&dpll_iva_ck>; + assigned-clock-rates = <1165000000>; }; dpll_iva_x2_ck: dpll_iva_x2_ck { @@ -330,6 +332,8 @@ ti,max-div = <63>; reg = <0x01b8>; ti,index-starts-at-one; + assigned-clocks = <&dpll_iva_h11x2_ck>; + assigned-clock-rates = <465920000>; }; dpll_iva_h12x2_ck: dpll_iva_h12x2_ck@1bc { @@ -339,6 +343,8 @@ ti,max-div = <63>; reg = <0x01bc>; ti,index-starts-at-one; + assigned-clocks = <&dpll_iva_h12x2_ck>; + assigned-clock-rates = <388300000>; }; mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div { diff --git a/src/arm/owl-s500-guitar-bb-rev-b.dts b/src/arm/owl-s500-guitar-bb-rev-b.dts new file mode 100644 index 000000000000..521463d4cac6 --- /dev/null +++ b/src/arm/owl-s500-guitar-bb-rev-b.dts @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "owl-s500-guitar.dtsi" + +/ { + compatible = "lemaker,guitar-bb-rev-b", "lemaker,guitar", "actions,s500"; + model = "LeMaker Guitar Base Board rev. B"; + + aliases { + serial3 = &uart3; + }; + + chosen { + stdout-path = "serial3:115200n8"; + }; +}; + +&uart3 { + status = "okay"; +}; diff --git a/src/arm/owl-s500-guitar.dtsi b/src/arm/owl-s500-guitar.dtsi new file mode 100644 index 000000000000..079b2c02cc13 --- /dev/null +++ b/src/arm/owl-s500-guitar.dtsi @@ -0,0 +1,22 @@ +/* + * LeMaker Guitar SoM + * + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include "owl-s500.dtsi" + +/ { + compatible = "lemaker,guitar", "actions,s500"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&timer { + clocks = <&hosc>; +}; diff --git a/src/arm/owl-s500.dtsi b/src/arm/owl-s500.dtsi new file mode 100644 index 000000000000..51a48741d4c0 --- /dev/null +++ b/src/arm/owl-s500.dtsi @@ -0,0 +1,186 @@ +/* + * Actions Semi S500 SoC + * + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include + +/ { + compatible = "actions,s500"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + }; + + chosen { + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + enable-method = "actions,s500-smp"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x1>; + enable-method = "actions,s500-smp"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x2>; + enable-method = "actions,s500-smp"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x3>; + enable-method = "actions,s500-smp"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + hosc: hosc { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + scu: scu@b0020000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xb0020000 0x100>; + }; + + global_timer: timer@b0020200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xb0020200 0x100>; + interrupts = ; + status = "disabled"; + }; + + twd_timer: timer@b0020600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xb0020600 0x20>; + interrupts = ; + status = "disabled"; + }; + + twd_wdt: wdt@b0020620 { + compatible = "arm,cortex-a9-twd-wdt"; + reg = <0xb0020620 0xe0>; + interrupts = ; + status = "disabled"; + }; + + gic: interrupt-controller@b0021000 { + compatible = "arm,cortex-a9-gic"; + reg = <0xb0021000 0x1000>, + <0xb0020100 0x0100>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + l2: cache-controller@b0022000 { + compatible = "arm,pl310-cache"; + reg = <0xb0022000 0x1000>; + cache-unified; + cache-level = <2>; + interrupts = ; + arm,tag-latency = <3 3 2>; + arm,data-latency = <5 3 3>; + }; + + uart0: serial@b0120000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0120000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart1: serial@b0122000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0122000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart2: serial@b0124000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0124000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart3: serial@b0126000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0126000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart4: serial@b0128000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb0128000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart5: serial@b012a000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb012a000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart6: serial@b012c000 { + compatible = "actions,s500-uart", "actions,owl-uart"; + reg = <0xb012c000 0x2000>; + interrupts = ; + status = "disabled"; + }; + + timer: timer@b0168000 { + compatible = "actions,s500-timer"; + reg = <0xb0168000 0x8000>; + interrupts = , + , + , + ; + interrupt-names = "2hz0", "2hz1", "timer0", "timer1"; + }; + + sps: power-controller@b01b0100 { + compatible = "actions,s500-sps"; + reg = <0xb01b0100 0x100>; + #power-domain-cells = <1>; + }; + }; +}; diff --git a/src/arm/pm9g45.dts b/src/arm/pm9g45.dts index 0abd7bf17568..3139221737ee 100644 --- a/src/arm/pm9g45.dts +++ b/src/arm/pm9g45.dts @@ -37,12 +37,10 @@ }; pinctrl@fffff200 { - - board { - pinctrl_board_nand: nand0-board { + nand { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - ; /* PC14 gpio enable pin pull_up */ + ; }; }; @@ -71,50 +69,61 @@ phy-mode = "rmii"; status = "okay"; }; - }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; - pinctrl-0 = <&pinctrl_board_nand>; - - gpios = <&pioD 3 GPIO_ACTIVE_HIGH - &pioC 14 GPIO_ACTIVE_HIGH - 0 - >; - + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioD 3 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x1A0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - kernel@200000 { - label = "bareboxenv2"; - reg = <0x200000 0x300000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - kernel@500000 { - label = "root"; - reg = <0x500000 0x400000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - data@900000 { - label = "data"; - reg = <0x900000 0x8340000>; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x1A0000>; + }; + + kernel@200000 { + label = "bareboxenv2"; + reg = <0x200000 0x300000>; + }; + + kernel@500000 { + label = "root"; + reg = <0x500000 0x400000>; + }; + + data@900000 { + label = "data"; + reg = <0x900000 0x8340000>; + }; + }; + }; }; }; diff --git a/src/arm/pxa25x.dtsi b/src/arm/pxa25x.dtsi index f9f4726396a0..95d59be97213 100644 --- a/src/arm/pxa25x.dtsi +++ b/src/arm/pxa25x.dtsi @@ -93,22 +93,22 @@ pxa250_opp_table: opp_table0 { compatible = "operating-points-v2"; - opp@99532800 { + opp-99532800 { opp-hz = /bits/ 64 <99532800>; opp-microvolt = <1000000 950000 1650000>; clock-latency-ns = <20>; }; - opp@199065600 { + opp-199065600 { opp-hz = /bits/ 64 <199065600>; opp-microvolt = <1000000 950000 1650000>; clock-latency-ns = <20>; }; - opp@298598400 { + opp-298598400 { opp-hz = /bits/ 64 <298598400>; opp-microvolt = <1100000 1045000 1650000>; clock-latency-ns = <20>; }; - opp@398131200 { + opp-398131200 { opp-hz = /bits/ 64 <398131200>; opp-microvolt = <1300000 1235000 1650000>; clock-latency-ns = <20>; diff --git a/src/arm/pxa27x.dtsi b/src/arm/pxa27x.dtsi index e0fab48ba6fa..5f1d6da02a4c 100644 --- a/src/arm/pxa27x.dtsi +++ b/src/arm/pxa27x.dtsi @@ -141,37 +141,37 @@ pxa270_opp_table: opp_table0 { compatible = "operating-points-v2"; - opp@104000000 { + opp-104000000 { opp-hz = /bits/ 64 <104000000>; opp-microvolt = <900000 900000 1705000>; clock-latency-ns = <20>; }; - opp@156000000 { + opp-156000000 { opp-hz = /bits/ 64 <156000000>; opp-microvolt = <1000000 1000000 1705000>; clock-latency-ns = <20>; }; - opp@208000000 { + opp-208000000 { opp-hz = /bits/ 64 <208000000>; opp-microvolt = <1180000 1180000 1705000>; clock-latency-ns = <20>; }; - opp@312000000 { + opp-312000000 { opp-hz = /bits/ 64 <312000000>; opp-microvolt = <1250000 1250000 1705000>; clock-latency-ns = <20>; }; - opp@416000000 { + opp-416000000 { opp-hz = /bits/ 64 <416000000>; opp-microvolt = <1350000 1350000 1705000>; clock-latency-ns = <20>; }; - opp@520000000 { + opp-520000000 { opp-hz = /bits/ 64 <520000000>; opp-microvolt = <1450000 1450000 1705000>; clock-latency-ns = <20>; }; - opp@624000000 { + opp-624000000 { opp-hz = /bits/ 64 <624000000>; opp-microvolt = <1550000 1550000 1705000>; clock-latency-ns = <20>; diff --git a/src/arm/qcom-apq8060-dragonboard.dts b/src/arm/qcom-apq8060-dragonboard.dts index 2da1413f5720..9d725f983282 100644 --- a/src/arm/qcom-apq8060-dragonboard.dts +++ b/src/arm/qcom-apq8060-dragonboard.dts @@ -23,6 +23,7 @@ #include #include #include +#include #include "qcom-msm8660.dtsi" / { @@ -83,6 +84,25 @@ }; }; + /* + * Capella CM3605 light and proximity sensor mounted directly + * on the sensor board. + */ + cm3605 { + compatible = "capella,cm3605"; + vdd-supply = <&pm8058_l14>; // 2.85V + aset-gpios = <&pm8058_gpio 35 GPIO_ACTIVE_LOW>; + capella,aset-resistance-ohms = <100000>; + /* GPIO34 has interrupt 225 on the PM8058 */ + /* Trig on both edges - getting close or far away */ + interrupts-extended = <&pm8058 225 IRQ_TYPE_EDGE_BOTH>; + /* MPP05 analog input to the XOADC */ + io-channels = <&xoadc 0x00 0x05>; + io-channel-names = "aout"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_cm3605_gpios>, <&dragon_cm3605_mpps>; + }; + soc { pinctrl@800000 { /* eMMMC pins, all 8 data lines connected */ @@ -160,6 +180,19 @@ }; }; + dragon_gsbi8_i2c_pins: gsbi8_i2c { + mux { + pins = "gpio64", "gpio65"; + function = "gsbi8"; + }; + pinconf { + pins = "gpio64", "gpio65"; + drive-strength = <16>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; + }; + }; + dragon_gsbi12_i2c_pins: gsbi12_i2c { mux { pins = "gpio115", "gpio116"; @@ -317,6 +350,24 @@ power-source = ; }; }; + dragon_cm3605_gpios: cm3605-gpios { + /* Pin 34 connected to the proxy IRQ */ + pinconf_gpio34 { + pins = "gpio34"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + /* Pin 35 connected to ASET */ + pinconf_gpio35 { + pins = "gpio35"; + function = "normal"; + output-high; + bias-disable; + power-source = ; + }; + }; dragon_veth_gpios: veth-gpios { pinconf { pins = "gpio40"; @@ -327,6 +378,47 @@ }; }; + mpps@50 { + dragon_cm3605_mpps: cm3605-mpps { + pinconf { + pins = "mpp5"; + function = "analog"; + input-enable; + bias-high-impedance; + /* Let's use channel 5 */ + qcom,amux-route = ; + power-source = ; + }; + }; + }; + + xoadc@197 { + /* Reference voltage 2.2 V */ + xoadc-ref-supply = <&pm8058_l18>; + + /* Board-specific channels */ + mpp5@05 { + /* Connected to AOUT of ALS sensor */ + reg = <0x00 0x05>; + }; + mpp6@06 { + /* Connected to test point TP43 */ + reg = <0x00 0x06>; + }; + mpp7@07 { + /* Connected to battery thermistor */ + reg = <0x00 0x07>; + }; + mpp8@08 { + /* Connected to battery ID detector */ + reg = <0x00 0x08>; + }; + mpp9@09 { + /* Connected to XO thermistor */ + reg = <0x00 0x09>; + }; + }; + led@48 { /* * The keypad LED @0x48 is routed to @@ -340,6 +432,7 @@ reg = <0x48>; label = "pm8058:infrared:proximitysensor"; default-state = "off"; + linux,default-trigger = "cm3605"; }; led@131 { compatible = "qcom,pm8058-led"; @@ -368,6 +461,42 @@ }; }; + gsbi@19800000 { + status = "ok"; + qcom,mode = ; + + i2c@19880000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi8_i2c_pins>; + + eeprom@52 { + /* A 16KiB Platform ID EEPROM on the CPU carrier board */ + compatible = "atmel,24c128"; + reg = <0x52>; + vcc-supply = <&pm8058_s3>; + pagesize = <64>; + }; + wm8903: wm8903@1a { + /* This Woolfson Micro device has an unrouted interrupt line */ + compatible = "wlf,wm8903"; + reg = <0x1a>; + + AVDD-supply = <&pm8058_l16>; + CPVDD-supply = <&pm8058_l16>; + DBVDD-supply = <&pm8058_s3>; + DCVDD-supply = <&pm8058_l0>; + + gpio-controller; + #gpio-cells = <2>; + + micdet-cfg = <0>; + micdet-delay = <100>; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; + }; + }; + }; + gsbi@19c00000 { status = "ok"; qcom,mode = ; diff --git a/src/arm/qcom-apq8064-arrow-sd-600eval.dts b/src/arm/qcom-apq8064-arrow-sd-600eval.dts index 8f5de029bca9..f245064f320e 100644 --- a/src/arm/qcom-apq8064-arrow-sd-600eval.dts +++ b/src/arm/qcom-apq8064-arrow-sd-600eval.dts @@ -319,44 +319,38 @@ target-supply = <&pm8921_lvs7>; }; - /* OTG */ - phy@12500000 { - status = "okay"; - dr_mode = "peripheral"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget@12500000 { - status = "okay"; - }; - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "peripheral"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; usb@12520000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; usb@12530000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; amba { diff --git a/src/arm/qcom-apq8064-asus-nexus7-flo.dts b/src/arm/qcom-apq8064-asus-nexus7-flo.dts index e39440a86739..3483a66e44c1 100644 --- a/src/arm/qcom-apq8064-asus-nexus7-flo.dts +++ b/src/arm/qcom-apq8064-asus-nexus7-flo.dts @@ -320,22 +320,16 @@ }; }; - /* OTG */ - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - dr_mode = "otg"; - }; - - gadget@12500000 { - status = "okay"; - }; - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; amba { diff --git a/src/arm/qcom-apq8064-cm-qs600.dts b/src/arm/qcom-apq8064-cm-qs600.dts index 35f1d46edded..5b151e425530 100644 --- a/src/arm/qcom-apq8064-cm-qs600.dts +++ b/src/arm/qcom-apq8064-cm-qs600.dts @@ -150,42 +150,37 @@ }; /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { + usb@12500000 { status = "ok"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - /* OTG */ - usb1: usb@12500000 { - status = "ok"; - }; - - usb3: usb@12520000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; /* on board fixed 3.3v supply */ diff --git a/src/arm/qcom-apq8064-ifc6410.dts b/src/arm/qcom-apq8064-ifc6410.dts index 881ce707311a..053b5bdd7808 100644 --- a/src/arm/qcom-apq8064-ifc6410.dts +++ b/src/arm/qcom-apq8064-ifc6410.dts @@ -244,42 +244,37 @@ }; /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - /* OTG */ - usb1: usb@12500000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb3: usb@12520000 { - status = "okay"; - }; - - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; pci@1b500000 { diff --git a/src/arm/qcom-apq8064-sony-xperia-yuga.dts b/src/arm/qcom-apq8064-sony-xperia-yuga.dts index a34ba3555454..88a9aff41e2f 100644 --- a/src/arm/qcom-apq8064-sony-xperia-yuga.dts +++ b/src/arm/qcom-apq8064-sony-xperia-yuga.dts @@ -349,15 +349,15 @@ }; }; - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - gadget@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; gsbi@1a200000 { diff --git a/src/arm/qcom-apq8064.dtsi b/src/arm/qcom-apq8064.dtsi index 14a6f5ed02de..f3db185a6809 100644 --- a/src/arm/qcom-apq8064.dtsi +++ b/src/arm/qcom-apq8064.dtsi @@ -197,7 +197,7 @@ clock-frequency = <27000000>; }; - sleep_clk { + sleep_clk: sleep_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; @@ -884,81 +884,97 @@ }; }; - usb1_phy: phy@12500000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - - clocks = <&gcc USB_HS1_XCVR_CLK>, - <&gcc USB_HS1_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS1_RESET>; - reset-names = "link"; - }; - - usb3_phy: phy@12520000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS3_XCVR_CLK>, - <&gcc USB_HS3_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS3_RESET>; - reset-names = "link"; - }; - - usb4_phy: phy@12530000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS4_XCVR_CLK>, - <&gcc USB_HS4_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS4_RESET>; - reset-names = "link"; - }; - - gadget1: gadget@12500000 { - compatible = "qcom,ci-hdrc"; - reg = <0x12500000 0x400>; - status = "disabled"; - dr_mode = "peripheral"; - interrupts = ; - usb-phy = <&usb1_phy>; - }; - usb1: usb@12500000 { - compatible = "qcom,ehci-host"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb1_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12500000 0x200>, + <0x12500200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS1_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS1_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs1_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb1 0>; + reset-names = "por"; + }; + }; }; usb3: usb@12520000 { - compatible = "qcom,ehci-host"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb3_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12520000 0x200>, + <0x12520200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS3_XCVR_CLK>, <&gcc USB_HS3_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS3_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS3_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs3_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs3_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb3 0>; + reset-names = "por"; + }; + }; }; usb4: usb@12530000 { - compatible = "qcom,ehci-host"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb4_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12530000 0x200>, + <0x12530200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS4_XCVR_CLK>, <&gcc USB_HS4_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS4_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS4_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs4_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs4_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb4 0>; + reset-names = "por"; + }; + }; }; sata_phy0: phy@1b400000 { diff --git a/src/arm/qcom-apq8074-dragonboard.dts b/src/arm/qcom-apq8074-dragonboard.dts index ad51df27dfb7..32f3b81f609c 100644 --- a/src/arm/qcom-apq8074-dragonboard.dts +++ b/src/arm/qcom-apq8074-dragonboard.dts @@ -44,6 +44,26 @@ vqmmc-supply = <&pm8941_l13>; }; + usb@f9a55000 { + status = "ok"; + phys = <&usb_hs2_phy>; + phy-select = <&tcsr 0xb000 1>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + hnp-disable; + srp-disable; + adp-disable; + ulpi { + phy@b { + status = "ok"; + v3p3-supply = <&pm8941_l24>; + v1p8-supply = <&pm8941_l6>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; + }; + }; + }; + pinctrl@fd510000 { i2c11_pins: i2c11 { diff --git a/src/arm/qcom-ipq4019.dtsi b/src/arm/qcom-ipq4019.dtsi index b7a24af8f47b..4b7d97275c62 100644 --- a/src/arm/qcom-ipq4019.dtsi +++ b/src/arm/qcom-ipq4019.dtsi @@ -154,10 +154,10 @@ i2c_0: i2c@78b7000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b7000 0x6000>; + reg = <0x78b7000 0x600>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; clock-names = "iface", "core"; #address-cells = <1>; #size-cells = <0>; diff --git a/src/arm/qcom-ipq8064.dtsi b/src/arm/qcom-ipq8064.dtsi index 76f4e8921d58..f1fbffe59b93 100644 --- a/src/arm/qcom-ipq8064.dtsi +++ b/src/arm/qcom-ipq8064.dtsi @@ -284,6 +284,29 @@ }; }; + gsbi7: gsbi@16600000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <7>; + reg = <0x16600000 0x100>; + clocks = <&gcc GSBI7_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + syscon-tcsr = <&tcsr>; + + gsbi7_serial: serial@16640000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16640000 0x1000>, + <0x16600000 0x1000>; + interrupts = <0 158 0x0>; + clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + sata_phy: sata-phy@1b400000 { compatible = "qcom,ipq806x-sata-phy"; reg = <0x1b400000 0x200>; diff --git a/src/arm/qcom-msm8660.dtsi b/src/arm/qcom-msm8660.dtsi index 747669a62aa8..1b5d31b33b5e 100644 --- a/src/arm/qcom-msm8660.dtsi +++ b/src/arm/qcom-msm8660.dtsi @@ -63,6 +63,22 @@ }; }; + /* + * These channels from the ADC are simply hardware monitors. + * That is why the ADC is referred to as "HKADC" - HouseKeeping + * ADC. + */ + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&xoadc 0x00 0x01>, /* Battery */ + <&xoadc 0x00 0x02>, /* DC in (charger) */ + <&xoadc 0x00 0x04>, /* VPH the main system voltage */ + <&xoadc 0x00 0x0b>, /* Die temperature */ + <&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */ + <&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */ + <&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */ + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -107,6 +123,31 @@ reg = <0x900000 0x4000>; }; + + gsbi8: gsbi@19800000 { + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <12>; + reg = <0x19800000 0x100>; + clocks = <&gcc GSBI8_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + gsbi8_i2c: i2c@19880000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x19880000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + gsbi12: gsbi@19c00000 { compatible = "qcom,gsbi-v1.0.0"; cell-index = <12>; @@ -267,6 +308,49 @@ row-hold = <91500>; }; + xoadc: xoadc@197 { + compatible = "qcom,pm8058-adc"; + reg = <0x197>; + interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <2>; + #size-cells = <0>; + #io-channel-cells = <2>; + + vcoin: adc-channel@00 { + reg = <0x00 0x00>; + }; + vbat: adc-channel@01 { + reg = <0x00 0x01>; + }; + dcin: adc-channel@02 { + reg = <0x00 0x02>; + }; + ichg: adc-channel@03 { + reg = <0x00 0x03>; + }; + vph_pwr: adc-channel@04 { + reg = <0x00 0x04>; + }; + usb_vbus: adc-channel@0a { + reg = <0x00 0x0a>; + }; + die_temp: adc-channel@0b { + reg = <0x00 0x0b>; + }; + ref_625mv: adc-channel@0c { + reg = <0x00 0x0c>; + }; + ref_1250mv: adc-channel@0d { + reg = <0x00 0x0d>; + }; + ref_325mv: adc-channel@0e { + reg = <0x00 0x0e>; + }; + ref_muxoff: adc-channel@0f { + reg = <0x00 0x0f>; + }; + }; + rtc@1e8 { compatible = "qcom,pm8058-rtc"; reg = <0x1e8>; diff --git a/src/arm/qcom-msm8974-sony-xperia-honami.dts b/src/arm/qcom-msm8974-sony-xperia-honami.dts index e7c1577d56f4..50966378f9e4 100644 --- a/src/arm/qcom-msm8974-sony-xperia-honami.dts +++ b/src/arm/qcom-msm8974-sony-xperia-honami.dts @@ -92,7 +92,6 @@ vdd_l9_l10_l17_l22-supply = <&vreg_boost>; vdd_l13_l20_l23_l24-supply = <&vreg_boost>; vdd_l21-supply = <&vreg_boost>; - vin_5vs-supply = <&pm8941_5v>; s1 { regulator-min-microvolt = <1300000>; diff --git a/src/arm/qcom-msm8974.dtsi b/src/arm/qcom-msm8974.dtsi index 307bf6a647b3..c5ee68a3f7f5 100644 --- a/src/arm/qcom-msm8974.dtsi +++ b/src/arm/qcom-msm8974.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include #include #include "skeleton.dtsi" @@ -551,6 +552,11 @@ reg = <0xfc400000 0x4000>; }; + tcsr: syscon@fd4a0000 { + compatible = "syscon"; + reg = <0xfd4a0000 0x10000>; + }; + tcsr_mutex_block: syscon@fd484000 { compatible = "syscon"; reg = <0xfd484000 0x2000>; @@ -620,6 +626,50 @@ status = "disabled"; }; + otg: usb@f9a55000 { + compatible = "qcom,ci-hdrc"; + reg = <0xf9a55000 0x200>, + <0xf9a55200 0x200>; + interrupts = ; + clocks = <&gcc GCC_USB_HS_AHB_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <75000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy@a { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + status = "disabled"; + }; + + usb_hs2_phy: phy@b { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>; + reset-names = "phy", "por"; + status = "disabled"; + }; + }; + }; + rng@f9bff000 { compatible = "qcom,prng"; reg = <0xf9bff000 0x200>; @@ -1021,7 +1071,6 @@ pm8941_s1: s1 {}; pm8941_s2: s2 {}; pm8941_s3: s3 {}; - pm8941_5v: s4 {}; pm8941_l1: l1 {}; pm8941_l2: l2 {}; @@ -1051,9 +1100,6 @@ pm8941_lvs1: lvs1 {}; pm8941_lvs2: lvs2 {}; pm8941_lvs3: lvs3 {}; - - pm8941_5vs1: 5vs1 {}; - pm8941_5vs2: 5vs2 {}; }; }; }; diff --git a/src/arm/qcom-pm8941.dtsi b/src/arm/qcom-pm8941.dtsi index f8eb5e31c920..3fc9f34f45bb 100644 --- a/src/arm/qcom-pm8941.dtsi +++ b/src/arm/qcom-pm8941.dtsi @@ -26,7 +26,14 @@ bias-pull-up; }; - charger@1000 { + usb_id: misc@900 { + compatible = "qcom,pm8941-misc"; + reg = <0x900>; + interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "usb_id"; + }; + + smbb: charger@1000 { compatible = "qcom,pm8941-charger"; reg = <0x1000>; interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>, @@ -45,6 +52,10 @@ "chg-gone", "usb-valid", "dc-valid"; + + usb-otg-in-supply = <&pm8941_5vs1>; + + chg_otg: otg-vbus { }; }; pm8941_gpios: gpios@c000 { @@ -171,5 +182,28 @@ status = "disabled"; }; + + regulators { + compatible = "qcom,pm8941-regulators"; + interrupts = <0x1 0x83 0x2 0>, <0x1 0x84 0x2 0>; + interrupt-names = "ocp-5vs1", "ocp-5vs2"; + vin_5vs-supply = <&pm8941_5v>; + + pm8941_5v: s4 { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-enable-ramp-delay = <500>; + }; + + pm8941_5vs1: 5vs1 { + regulator-enable-ramp-delay = <1000>; + regulator-pull-down; + regulator-over-current-protection; + qcom,ocp-max-retries = <10>; + qcom,ocp-retry-delay = <30>; + qcom,vs-soft-start-strength = <0>; + regulator-initial-mode = <1>; + }; + }; }; }; diff --git a/src/arm/r7s72100-gr-peach.dts b/src/arm/r7s72100-gr-peach.dts new file mode 100644 index 000000000000..a1b2aef984f6 --- /dev/null +++ b/src/arm/r7s72100-gr-peach.dts @@ -0,0 +1,66 @@ +/* + * Device Tree Source for the GR-Peach board + * + * Copyright (C) 2017 Jacopo Mondi + * Copyright (C) 2016 Renesas Electronics + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r7s72100.dtsi" + +/ { + model = "GR-Peach"; + compatible = "renesas,gr-peach", "renesas,r7s72100"; + + aliases { + serial0 = &scif2; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/mtdblock0"; + stdout-path = "serial0:115200n8"; + }; + + memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0x00a00000>; + + }; + + lbsc { + #address-cells = <1>; + #size-cells = <1>; + }; + + flash@18000000 { + compatible = "mtd-rom"; + probe-type = "map_rom"; + reg = <0x18000000 0x00800000>; + bank-width = <4>; + device-width = <1>; + + #address-cells = <1>; + #size-cells = <1>; + + rootfs@600000 { + label = "rootfs"; + reg = <0x00600000 0x00200000>; + }; + }; +}; + +&extal_clk { + clock-frequency = <13333000>; +}; + +&usb_x1_clk { + clock-frequency = <48000000>; +}; + +&scif2 { + status = "okay"; +}; diff --git a/src/arm/r7s72100.dtsi b/src/arm/r7s72100.dtsi index 0423996e4dcc..5cf53e9943af 100644 --- a/src/arm/r7s72100.dtsi +++ b/src/arm/r7s72100.dtsi @@ -144,9 +144,9 @@ #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xfcfe0430 4>; - clocks = <&b_clk>; - clock-indices = ; - clock-output-names = "ether"; + clocks = <&b_clk>, <&p1_clk>, <&p1_clk>; + clock-indices = ; + clock-output-names = "ether", "usb0", "usb1"; }; mstp8_clks: mstp8_clks@fcfe0434 { diff --git a/src/arm/r8a73a4.dtsi b/src/arm/r8a73a4.dtsi index 1f5c9f6dddba..310222634570 100644 --- a/src/arm/r8a73a4.dtsi +++ b/src/arm/r8a73a4.dtsi @@ -219,7 +219,7 @@ power-domains = <&pd_c4>; }; - pfc: pfc@e6050000 { + pfc: pin-controller@e6050000 { compatible = "renesas,pfc-r8a73a4"; reg = <0 0xe6050000 0 0x9000>; gpio-controller; diff --git a/src/arm/r8a7740-armadillo800eva.dts b/src/arm/r8a7740-armadillo800eva.dts index 7885075428bb..1788e186a512 100644 --- a/src/arm/r8a7740-armadillo800eva.dts +++ b/src/arm/r8a7740-armadillo800eva.dts @@ -266,7 +266,9 @@ lcd0_pins: lcd0 { groups = "lcd0_data24_0", "lcd0_lclk_1", "lcd0_sync"; function = "lcd0"; + }; + lcd0_mux { /* DBGMD/LCDC0/FSIA MUX */ gpio-hog; gpios = <176 0>; diff --git a/src/arm/r8a7740.dtsi b/src/arm/r8a7740.dtsi index 34159a8349de..d37d22682a63 100644 --- a/src/arm/r8a7740.dtsi +++ b/src/arm/r8a7740.dtsi @@ -299,7 +299,7 @@ status = "disabled"; }; - pfc: pfc@e6050000 { + pfc: pin-controller@e6050000 { compatible = "renesas,pfc-r8a7740"; reg = <0xe6050000 0x8000>, <0xe605800c 0x20>; diff --git a/src/arm/r8a7743-iwg20d-q7.dts b/src/arm/r8a7743-iwg20d-q7.dts new file mode 100644 index 000000000000..9b54783cc2a5 --- /dev/null +++ b/src/arm/r8a7743-iwg20d-q7.dts @@ -0,0 +1,25 @@ +/* + * Device Tree Source for the iWave-RZG1M Qseven carrier board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7743-iwg20m.dtsi" + +/ { + model = "iWave Systems RainboW-G20D-Qseven board based on RZ/G1M"; + compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"; + + aliases { + serial0 = &scif0; + }; +}; + +&scif0 { + status = "okay"; +}; diff --git a/src/arm/r8a7743-iwg20m.dtsi b/src/arm/r8a7743-iwg20m.dtsi new file mode 100644 index 000000000000..001ca9144f4b --- /dev/null +++ b/src/arm/r8a7743-iwg20m.dtsi @@ -0,0 +1,29 @@ +/* + * Device Tree Source for the iWave-RZG1M-20M Qseven SOM + * + * Copyright (C) 2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7743.dtsi" + +/ { + compatible = "iwave,g20m", "renesas,r8a7743"; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x20000000>; + }; + + memory@200000000 { + device_type = "memory"; + reg = <2 0x00000000 0 0x20000000>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; diff --git a/src/arm/r8a7778.dtsi b/src/arm/r8a7778.dtsi index 1e93c94a9eac..8f3156c0e575 100644 --- a/src/arm/r8a7778.dtsi +++ b/src/arm/r8a7778.dtsi @@ -142,7 +142,7 @@ interrupt-controller; }; - pfc: pfc@fffc0000 { + pfc: pin-controller@fffc0000 { compatible = "renesas,pfc-r8a7778"; reg = <0xfffc0000 0x118>; }; diff --git a/src/arm/r8a7779.dtsi b/src/arm/r8a7779.dtsi index ae2d9a9c65af..8ee0b2ca5d39 100644 --- a/src/arm/r8a7779.dtsi +++ b/src/arm/r8a7779.dtsi @@ -286,7 +286,7 @@ status = "disabled"; }; - pfc: pfc@fffc0000 { + pfc: pin-controller@fffc0000 { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc0000 0x23c>; }; diff --git a/src/arm/r8a7790.dtsi b/src/arm/r8a7790.dtsi index 99269aaca6fc..2805a8608d4b 100644 --- a/src/arm/r8a7790.dtsi +++ b/src/arm/r8a7790.dtsi @@ -614,7 +614,7 @@ max-frequency = <97500000>; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7790"; reg = <0 0xe6060000 0 0x250>; }; @@ -1602,16 +1602,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1658,16 +1656,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x20800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x21000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/src/arm/r8a7791.dtsi b/src/arm/r8a7791.dtsi index 4d0c2ce59900..bd93f699ad84 100644 --- a/src/arm/r8a7791.dtsi +++ b/src/arm/r8a7791.dtsi @@ -562,7 +562,7 @@ status = "disabled"; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7791"; reg = <0 0xe6060000 0 0x250>; }; @@ -776,6 +776,15 @@ status = "disabled"; }; + adc: adc@e6e54000 { + compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; + reg = <0 0xe6e54000 0 64>; + clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + status = "disabled"; + }; + scif2: serial@e6e58000 { compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", "renesas,scif"; @@ -1425,13 +1434,15 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + clocks = <&p_clk>, + <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < + R8A7791_CLK_GYROADC R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4 R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5 @@ -1439,6 +1450,7 @@ R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 >; clock-output-names = + "gyroadc", "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; @@ -1601,16 +1613,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1636,16 +1646,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/src/arm/r8a7793-gose.dts b/src/arm/r8a7793-gose.dts index 806c93f6ae8b..76e3aca2029e 100644 --- a/src/arm/r8a7793-gose.dts +++ b/src/arm/r8a7793-gose.dts @@ -253,17 +253,38 @@ }; }; + hdmi-in { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&adv7612_in>; + }; + }; + }; + hdmi-out { compatible = "hdmi-connector"; type = "a"; port { - hdmi_con: endpoint { + hdmi_con_out: endpoint { remote-endpoint = <&adv7511_out>; }; }; }; + composite-in { + compatible = "composite-video-connector"; + + port { + composite_con_in: endpoint { + remote-endpoint = <&adv7180_in>; + }; + }; + }; + x2_clk: x2-clock { compatible = "fixed-clock"; #clock-cells = <0>; @@ -348,16 +369,37 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; }; sdhi2_pins: sd2 { groups = "sdhi2_data4", "sdhi2_ctrl"; function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; }; qspi_pins: qspi { @@ -374,6 +416,16 @@ groups = "audio_clk_a"; function = "audio_clk"; }; + + vin0_pins: vin0 { + groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; + function = "vin0"; + }; + + vin1_pins: vin1 { + groups = "vin1_data8", "vin1_clk"; + function = "vin1"; + }; }; ðer { @@ -416,33 +468,40 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; }; &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi1>; vqmmc-supply = <&vccq_sdhi1>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; status = "okay"; }; &sdhi2 { pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; }; @@ -498,6 +557,32 @@ reg = <0x12>; }; + composite-in@20 { + compatible = "adi,adv7180cp"; + reg = <0x20>; + remote = <&vin1>; + + port { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7180_in: endpoint { + remote-endpoint = <&composite_con_in>; + }; + }; + + port@3 { + reg = <3>; + adv7180_out: endpoint { + bus-width = <8>; + remote-endpoint = <&vin1ep>; + }; + }; + }; + }; + hdmi@39 { compatible = "adi,adv7511w"; reg = <0x39>; @@ -524,7 +609,34 @@ port@1 { reg = <1>; adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; + remote-endpoint = <&hdmi_con_out>; + }; + }; + }; + }; + + hdmi-in@4c { + compatible = "adi,adv7612"; + reg = <0x4c>; + interrupt-parent = <&gpio4>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + default-input = <0>; + + port { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7612_in: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; + }; + + port@2 { + reg = <2>; + adv7612_out: endpoint { + remote-endpoint = <&vin0ep2>; }; }; }; @@ -578,3 +690,42 @@ &ssi1 { shared-pin; }; + +/* HDMI video input */ +&vin0 { + status = "okay"; + pinctrl-0 = <&vin0_pins>; + pinctrl-names = "default"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + vin0ep2: endpoint { + remote-endpoint = <&adv7612_out>; + bus-width = <24>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + data-active = <1>; + }; + }; +}; + +/* composite video input */ +&vin1 { + pinctrl-0 = <&vin1_pins>; + pinctrl-names = "default"; + + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + vin1ep: endpoint { + remote-endpoint = <&adv7180_out>; + bus-width = <8>; + }; + }; +}; diff --git a/src/arm/r8a7793.dtsi b/src/arm/r8a7793.dtsi index 4de6041d61f9..13b980f27bbc 100644 --- a/src/arm/r8a7793.dtsi +++ b/src/arm/r8a7793.dtsi @@ -529,7 +529,7 @@ status = "disabled"; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7793"; reg = <0 0xe6060000 0 0x250>; }; @@ -542,6 +542,7 @@ dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <195000000>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled"; }; @@ -554,6 +555,7 @@ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled"; }; @@ -566,6 +568,7 @@ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled"; }; diff --git a/src/arm/r8a7794.dtsi b/src/arm/r8a7794.dtsi index a19b884fb258..7d9a81d970d8 100644 --- a/src/arm/r8a7794.dtsi +++ b/src/arm/r8a7794.dtsi @@ -820,16 +820,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -855,16 +853,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/src/arm/r8a77xx-aa104xd12-panel.dtsi b/src/arm/r8a77xx-aa104xd12-panel.dtsi index 65cb50f0c29f..238d14bb0ebe 100644 --- a/src/arm/r8a77xx-aa104xd12-panel.dtsi +++ b/src/arm/r8a77xx-aa104xd12-panel.dtsi @@ -10,10 +10,11 @@ / { panel { - compatible = "mitsubishi,aa104xd12", "panel-dpi"; + compatible = "mitsubishi,aa104xd12", "panel-lvds"; width-mm = <210>; height-mm = <158>; + data-mapping = "jeida-18"; panel-timing { /* 1024x768 @65Hz */ diff --git a/src/arm/r8a77xx-aa121td01-panel.dtsi b/src/arm/r8a77xx-aa121td01-panel.dtsi index a07ebf8f6938..04aafd479775 100644 --- a/src/arm/r8a77xx-aa121td01-panel.dtsi +++ b/src/arm/r8a77xx-aa121td01-panel.dtsi @@ -10,10 +10,11 @@ / { panel { - compatible = "mitsubishi,aa121td01", "panel-dpi"; + compatible = "mitsubishi,aa121td01", "panel-lvds"; width-mm = <261>; height-mm = <163>; + data-mapping = "jeida-18"; panel-timing { /* 1280x800 @60Hz */ diff --git a/src/arm/rk3229-evb.dts b/src/arm/rk3229-evb.dts index 275092a950ef..1b55192b7d04 100644 --- a/src/arm/rk3229-evb.dts +++ b/src/arm/rk3229-evb.dts @@ -58,6 +58,17 @@ #clock-cells = <0>; }; + vcc_host: vcc-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc_host"; + regulator-always-on; + regulator-boot-on; + }; + vcc_phy: vcc-phy-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -85,6 +96,69 @@ status = "okay"; }; +&pinctrl { + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &uart2 { status = "okay"; }; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + phy-supply = <&vcc_host>; + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc_host>; + status = "okay"; + }; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host2_ehci { + status = "okay"; +}; + +&usb_host2_ohci { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; diff --git a/src/arm/rk322x.dtsi b/src/arm/rk322x.dtsi index 48a0c1cf4301..f3e4ffd9f818 100644 --- a/src/arm/rk322x.dtsi +++ b/src/arm/rk322x.dtsi @@ -66,10 +66,7 @@ compatible = "arm,cortex-a7"; reg = <0xf00>; resets = <&cru SRST_CORE0>; - operating-points = < - /* KHz uV */ - 816000 1000000 - >; + operating-points-v2 = <&cpu0_opp_table>; #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; @@ -80,6 +77,7 @@ compatible = "arm,cortex-a7"; reg = <0xf01>; resets = <&cru SRST_CORE1>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu2: cpu@f02 { @@ -87,6 +85,7 @@ compatible = "arm,cortex-a7"; reg = <0xf02>; resets = <&cru SRST_CORE2>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu3: cpu@f03 { @@ -94,6 +93,35 @@ compatible = "arm,cortex-a7"; reg = <0xf03>; resets = <&cru SRST_CORE3>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <975000>; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1000000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1175000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1275000>; }; }; @@ -182,8 +210,61 @@ }; grf: syscon@11000000 { - compatible = "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x11000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy0: usb2-phy@760 { + compatible = "rockchip,rk3228-usb2phy"; + reg = <0x0760 0x0c>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy0"; + #clock-cells = <0>; + status = "disabled"; + + u2phy0_otg: otg-port { + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + + u2phy0_host: host-port { + interrupts = ; + interrupt-names = "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + }; + + u2phy1: usb2-phy@800 { + compatible = "rockchip,rk3228-usb2phy"; + reg = <0x0800 0x0c>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy1"; + #clock-cells = <0>; + status = "disabled"; + + u2phy1_otg: otg-port { + interrupts = ; + interrupt-names = "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + + u2phy1_host: host-port { + interrupts = ; + interrupt-names = "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + }; }; uart0: serial@11010000 { @@ -280,6 +361,14 @@ status = "disabled"; }; + wdt: watchdog@110a0000 { + compatible = "snps,dw-wdt"; + reg = <0x110a0000 0x100>; + interrupts = ; + clocks = <&cru PCLK_CPU>; + status = "disabled"; + }; + pwm0: pwm@110b0000 { compatible = "rockchip,rk3288-pwm"; reg = <0x110b0000 0x10>; @@ -338,8 +427,18 @@ rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; - assigned-clocks = <&cru PLL_GPLL>; - assigned-clock-rates = <594000000>; + assigned-clocks = + <&cru PLL_GPLL>, <&cru ARMCLK>, + <&cru PLL_CPLL>, <&cru ACLK_PERI>, + <&cru HCLK_PERI>, <&cru PCLK_PERI>, + <&cru ACLK_CPU>, <&cru HCLK_CPU>, + <&cru PCLK_CPU>; + assigned-clock-rates = + <594000000>, <816000000>, + <500000000>, <150000000>, + <150000000>, <75000000>, + <150000000>, <150000000>, + <75000000>; }; thermal-zones { @@ -388,6 +487,8 @@ interrupts = ; clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; clock-names = "tsadc", "apb_pclk"; + assigned-clocks = <&cru SCLK_TSADC>; + assigned-clock-rates = <32768>; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; pinctrl-names = "init", "default", "sleep"; @@ -419,6 +520,89 @@ status = "disabled"; }; + usb_otg: usb@30040000 { + compatible = "rockchip,rk3228-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0x30040000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_OTG>; + clock-names = "otg"; + dr_mode = "otg"; + g-np-tx-fifo-size = <16>; + g-rx-fifo-size = <280>; + g-tx-fifo-size = <256 128 128 64 32 16>; + g-use-dma; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + usb_host0_ehci: usb@30080000 { + compatible = "generic-ehci"; + reg = <0x30080000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&u2phy0>; + clock-names = "usbhost", "utmi"; + phys = <&u2phy0_host>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host0_ohci: usb@300a0000 { + compatible = "generic-ohci"; + reg = <0x300a0000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&u2phy0>; + clock-names = "usbhost", "utmi"; + phys = <&u2phy0_host>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ehci: usb@300c0000 { + compatible = "generic-ehci"; + reg = <0x300c0000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&u2phy1>; + clock-names = "usbhost", "utmi"; + phys = <&u2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ohci: usb@300e0000 { + compatible = "generic-ohci"; + reg = <0x300e0000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&u2phy1>; + clock-names = "usbhost", "utmi"; + phys = <&u2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host2_ehci: usb@30100000 { + compatible = "generic-ehci"; + reg = <0x30100000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST2>, <&u2phy1>; + phys = <&u2phy1_host>; + phy-names = "usb"; + clock-names = "usbhost", "utmi"; + status = "disabled"; + }; + + usb_host2_ohci: usb@30120000 { + compatible = "generic-ohci"; + reg = <0x30120000 0x20000>; + interrupts = ; + clocks = <&cru HCLK_HOST2>, <&u2phy1>; + clock-names = "usbhost", "utmi"; + phys = <&u2phy1_host>; + phy-names = "usb"; + status = "disabled"; + }; + gmac: ethernet@30200000 { compatible = "rockchip,rk3228-gmac"; reg = <0x30200000 0x10000>; @@ -621,9 +805,9 @@ <0 12 RK_FUNC_1 &pcfg_pull_none>, <0 13 RK_FUNC_1 &pcfg_pull_none>, <0 14 RK_FUNC_1 &pcfg_pull_none>, - <1 2 RK_FUNC_1 &pcfg_pull_none>, - <1 4 RK_FUNC_1 &pcfg_pull_none>, - <1 5 RK_FUNC_1 &pcfg_pull_none>; + <1 2 RK_FUNC_2 &pcfg_pull_none>, + <1 4 RK_FUNC_2 &pcfg_pull_none>, + <1 5 RK_FUNC_2 &pcfg_pull_none>; }; }; @@ -693,10 +877,15 @@ uart2 { uart2_xfer: uart2-xfer { - rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>, + rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>, <1 19 RK_FUNC_2 &pcfg_pull_none>; }; + uart21_xfer: uart21-xfer { + rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>, + <1 9 RK_FUNC_2 &pcfg_pull_none>; + }; + uart2_cts: uart2-cts { rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>; }; diff --git a/src/arm/rk3288-firefly-reload.dts b/src/arm/rk3288-firefly-reload.dts index d0b3204a4799..b11a282c334c 100644 --- a/src/arm/rk3288-firefly-reload.dts +++ b/src/arm/rk3288-firefly-reload.dts @@ -48,6 +48,19 @@ model = "Firefly-RK3288-reload"; compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288"; + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-recovery { + label = "Recovery"; + linux,code = ; + press-threshold-microvolt = <0>; + }; + }; + gpio-keys { compatible = "gpio-keys"; @@ -246,6 +259,10 @@ status = "okay"; }; +&saradc { + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-mmc-highspeed; diff --git a/src/arm/rk3288-firefly.dtsi b/src/arm/rk3288-firefly.dtsi index 10793ac18599..32dabae12e67 100644 --- a/src/arm/rk3288-firefly.dtsi +++ b/src/arm/rk3288-firefly.dtsi @@ -49,6 +49,19 @@ reg = <0 0x80000000>; }; + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-recovery { + label = "Recovery"; + linux,code = ; + press-threshold-microvolt = <0>; + }; + }; + dovdd_1v8: dovdd-1v8-regulator { compatible = "regulator-fixed"; regulator-name = "dovdd_1v8"; @@ -219,6 +232,11 @@ status = "ok"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &hdmi { ddc-i2c-bus = <&i2c5>; status = "okay"; diff --git a/src/arm/rk3288-rock2-som.dtsi b/src/arm/rk3288-rock2-som.dtsi index f0778a46bca9..749a9b86e6e2 100644 --- a/src/arm/rk3288-rock2-som.dtsi +++ b/src/arm/rk3288-rock2-som.dtsi @@ -113,6 +113,11 @@ tx_delay = <0x30>; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { status = "okay"; diff --git a/src/arm/rk3288-rock2-square.dts b/src/arm/rk3288-rock2-square.dts index a23a94811be8..8ed25e9f60bc 100644 --- a/src/arm/rk3288-rock2-square.dts +++ b/src/arm/rk3288-rock2-square.dts @@ -125,10 +125,6 @@ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&host_vbus_drv>; - /* Always on as the rockchip usb phy doesn't have a vbus-supply - * property - */ - regulator-always-on; regulator-name = "vcc_host"; }; @@ -279,6 +275,10 @@ status = "okay"; }; +&usbphy1 { + vbus-supply = <&vcc_usb_host>; +}; + &usb_host0_ehci { status = "okay"; }; diff --git a/src/arm/rk3288-veyron.dtsi b/src/arm/rk3288-veyron.dtsi index 5d1eb0a25827..d709fa1847f9 100644 --- a/src/arm/rk3288-veyron.dtsi +++ b/src/arm/rk3288-veyron.dtsi @@ -161,6 +161,11 @@ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &hdmi { ddc-i2c-bus = <&i2c5>; status = "okay"; diff --git a/src/arm/rk3288.dtsi b/src/arm/rk3288.dtsi index ad5d6022e95f..858e1fed762a 100644 --- a/src/arm/rk3288.dtsi +++ b/src/arm/rk3288.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include #include #include @@ -1125,6 +1126,48 @@ }; }; + gpu: gpu@ffa30000 { + compatible = "rockchip,rk3288-mali", "arm,mali-t760"; + reg = <0xffa30000 0x10000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru ACLK_GPU>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3288_PD_GPU>; + status = "disabled"; + }; + + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <950000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <950000>; + }; + opp@300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1000000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1100000>; + }; + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1200000>; + }; + opp@600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1250000>; + }; + }; + qos_gpu_r: qos@ffaa0000 { compatible = "syscon"; reg = <0xffaa0000 0x20>; diff --git a/src/arm/rk1108-evb.dts b/src/arm/rv1108-evb.dts similarity index 94% rename from src/arm/rk1108-evb.dts rename to src/arm/rv1108-evb.dts index 3956cff4ca79..58cf4ac079c3 100644 --- a/src/arm/rk1108-evb.dts +++ b/src/arm/rv1108-evb.dts @@ -40,11 +40,11 @@ /dts-v1/; -#include "rk1108.dtsi" +#include "rv1108.dtsi" / { - model = "Rockchip RK1108 Evaluation board"; - compatible = "rockchip,rk1108-evb", "rockchip,rk1108"; + model = "Rockchip RV1108 Evaluation board"; + compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; memory@60000000 { device_type = "memory"; diff --git a/src/arm/rk1108.dtsi b/src/arm/rv1108.dtsi similarity index 95% rename from src/arm/rk1108.dtsi rename to src/arm/rv1108.dtsi index 1297924db6ad..437098b556eb 100644 --- a/src/arm/rk1108.dtsi +++ b/src/arm/rv1108.dtsi @@ -47,7 +47,7 @@ #address-cells = <1>; #size-cells = <1>; - compatible = "rockchip,rk1108"; + compatible = "rockchip,rv1108"; interrupt-parent = <&gic>; @@ -113,7 +113,7 @@ }; uart2: serial@10210000 { - compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart"; + compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart"; reg = <0x10210000 0x100>; interrupts = ; reg-shift = <2>; @@ -127,7 +127,7 @@ }; uart1: serial@10220000 { - compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart"; + compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart"; reg = <0x10220000 0x100>; interrupts = ; reg-shift = <2>; @@ -141,7 +141,7 @@ }; uart0: serial@10230000 { - compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart"; + compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart"; reg = <0x10230000 0x100>; interrupts = ; reg-shift = <2>; @@ -155,17 +155,17 @@ }; grf: syscon@10300000 { - compatible = "rockchip,rk1108-grf", "syscon"; + compatible = "rockchip,rv1108-grf", "syscon"; reg = <0x10300000 0x1000>; }; pmugrf: syscon@20060000 { - compatible = "rockchip,rk1108-pmugrf", "syscon"; + compatible = "rockchip,rv1108-pmugrf", "syscon"; reg = <0x20060000 0x1000>; }; cru: clock-controller@20200000 { - compatible = "rockchip,rk1108-cru"; + compatible = "rockchip,rv1108-cru"; reg = <0x20200000 0x1000>; rockchip,grf = <&grf>; #clock-cells = <1>; @@ -173,7 +173,7 @@ }; emmc: dwmmc@30110000 { - compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc"; + compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc"; clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; @@ -185,7 +185,7 @@ }; sdio: dwmmc@30120000 { - compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc"; + compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc"; clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; @@ -197,7 +197,7 @@ }; sdmmc: dwmmc@30130000 { - compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc"; + compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc"; clock-freq-min-max = <400000 100000000>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; diff --git a/src/arm/sama5d2.dtsi b/src/arm/sama5d2.dtsi index 8067c71c3a38..60e69aeacbdb 100644 --- a/src/arm/sama5d2.dtsi +++ b/src/arm/sama5d2.dtsi @@ -135,6 +135,12 @@ #size-cells = <1>; ranges; + nfc_sram: sram@00100000 { + compatible = "mmio-sram"; + no-memory-wc; + reg = <0x00100000 0x2400>; + }; + usb0: gadget@00300000 { #address-cells = <1>; #size-cells = <0>; @@ -291,6 +297,32 @@ cache-level = <2>; }; + ebi: ebi@10000000 { + compatible = "atmel,sama5d3-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&hsmc>; + reg = <0x10000000 0x10000000 + 0x60000000 0x30000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x60000000 0x10000000 + 0x2 0x0 0x70000000 0x10000000 + 0x3 0x0 0x80000000 0x10000000>; + clocks = <&mck>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,sama5d3-nand-controller"; + atmel,nfc-sram = <&nfc_sram>; + atmel,nfc-io = <&nfc_io>; + ecc-engine = <&pmecc>; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; + nand0: nand@80000000 { compatible = "atmel,sama5d2-nand"; #address-cells = <1>; @@ -347,6 +379,11 @@ status = "disabled"; }; + nfc_io: nfc-io@c0000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0xc0000000 0x8000000>; + }; + apb { compatible = "simple-bus"; #address-cells = <1>; @@ -762,6 +799,18 @@ atmel,clk-output-range = <0 83000000>; }; + can0_clk: can0_clk { + #clock-cells = <0>; + reg = <56>; + atmel,clk-output-range = <0 83000000>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + reg = <57>; + atmel,clk-output-range = <0 83000000>; + }; + classd_clk: classd_clk { #clock-cells = <0>; reg = <59>; @@ -890,6 +939,18 @@ #clock-cells = <0>; reg = <55>; }; + + can0_gclk: can0_gclk { + #clock-cells = <0>; + reg = <56>; + atmel,clk-output-range = <0 80000000>; + }; + + can1_gclk: can1_gclk { + #clock-cells = <0>; + reg = <57>; + atmel,clk-output-range = <0 80000000>; + }; }; }; @@ -986,6 +1047,22 @@ clock-names = "t0_clk", "slow_clk"; }; + hsmc: hsmc@f8014000 { + compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd"; + reg = <0xf8014000 0x1000>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>; + clocks = <&hsmc_clk>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmecc: ecc-engine@f8014070 { + compatible = "atmel,sama5d2-pmecc"; + reg = <0xf8014070 0x490>, + <0xf8014500 0x100>; + }; + }; + pdmic: pdmic@f8018000 { compatible = "atmel,sama5d2-pdmic"; reg = <0xf8018000 0x124>; @@ -1065,6 +1142,14 @@ status = "disabled"; }; + pwm0: pwm@f802c000 { + compatible = "atmel,sama5d2-pwm"; + reg = <0xf802c000 0x4000>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>; + #pwm-cells = <3>; + clocks = <&pwm_clk>; + }; + sfr: sfr@f8030000 { compatible = "atmel,sama5d2-sfr", "syscon"; reg = <0xf8030000 0x98>; @@ -1144,6 +1229,22 @@ clocks = <&clk32k>; }; + can0: can@f8054000 { + compatible = "bosch,m_can"; + reg = <0xf8054000 0x4000>, <0x210000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>, + <64 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-names = "int0", "int1"; + clocks = <&can0_clk>, <&can0_gclk>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&can0_gclk>; + assigned-clock-parents = <&utmi>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; + status = "disabled"; + }; + spi1: spi@fc000000 { compatible = "atmel,at91rm9200-spi"; reg = <0xfc000000 0x100>; @@ -1305,6 +1406,22 @@ status = "okay"; }; + can1: can@fc050000 { + compatible = "bosch,m_can"; + reg = <0xfc050000 0x4000>, <0x210000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>, + <65 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-names = "int0", "int1"; + clocks = <&can1_clk>, <&can1_gclk>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&can1_gclk>; + assigned-clock-parents = <&utmi>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x1100 0 0 64 0 0 32 32>; + status = "disabled"; + }; + sfrbu: sfr@fc05c000 { compatible = "atmel,sama5d2-sfrbu", "syscon"; reg = <0xfc05c000 0x20>; diff --git a/src/arm/sama5d3.dtsi b/src/arm/sama5d3.dtsi index b06448ba6649..554d0bdedc7a 100644 --- a/src/arm/sama5d3.dtsi +++ b/src/arm/sama5d3.dtsi @@ -429,6 +429,22 @@ clocks = <&trng_clk>; }; + hsmc: hsmc@ffffc000 { + compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; + reg = <0xffffc000 0x1000>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; + clocks = <&hsmc_clk>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmecc: ecc-engine@ffffc070 { + compatible = "atmel,at91sam9g45-pmecc"; + reg = <0xffffc070 0x490>, + <0xffffc500 0x100>; + }; + }; + dma0: dma-controller@ffffe600 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffe600 0x200>; @@ -554,6 +570,66 @@ }; }; + ebi { + pinctrl_ebi_addr: ebi-addr-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nand_addr: ebi-addr-1 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs0: ebi-cs0-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs1: ebi-cs1-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs2: ebi-cs2-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nwait: ebi-nwait-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { + atmel,pins = + ; + }; + }; + i2c0 { pinctrl_i2c0: i2c0-0 { atmel,pins = @@ -1326,6 +1402,12 @@ }; }; + nfc_sram: sram@200000 { + compatible = "mmio-sram"; + no-memory-wc; + reg = <0x200000 0x2400>; + }; + usb0: gadget@00500000 { #address-cells = <1>; #size-cells = <0>; @@ -1461,36 +1543,35 @@ status = "disabled"; }; - nand0: nand@60000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; + ebi: ebi@10000000 { + compatible = "atmel,sama5d3-ebi"; + #address-cells = <2>; #size-cells = <1>; - ranges; - reg = < 0x60000000 0x01000000 /* EBI CS3 */ - 0xffffc070 0x00000490 /* SMC PMECC regs */ - 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */ - 0x00110000 0x00018000 /* ROM code */ - >; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand0_ale_cle>; - atmel,pmecc-lookup-table-offset = <0x0 0x8000>; + atmel,smc = <&hsmc>; + reg = <0x10000000 0x10000000 + 0x40000000 0x30000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x40000000 0x10000000 + 0x2 0x0 0x50000000 0x10000000 + 0x3 0x0 0x60000000 0x10000000>; + clocks = <&mck>; status = "disabled"; - nfc@70000000 { - compatible = "atmel,sama5d3-nfc"; - #address-cells = <1>; + nand_controller: nand-controller { + compatible = "atmel,sama5d3-nand-controller"; + atmel,nfc-sram = <&nfc_sram>; + atmel,nfc-io = <&nfc_io>; + ecc-engine = <&pmecc>; + #address-cells = <2>; #size-cells = <1>; - reg = < - 0x70000000 0x08000000 /* NFC Command Registers */ - 0xffffc000 0x00000070 /* NFC HSMC regs */ - 0x00200000 0x00100000 /* NFC SRAM banks */ - >; - clocks = <&hsmc_clk>; + ranges; + status = "disabled"; }; }; + + nfc_io: nfc-io@70000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0x70000000 0x8000000>; + }; }; }; diff --git a/src/arm/sama5d3xcm.dtsi b/src/arm/sama5d3xcm.dtsi index b5e111b29da1..9506daf5efb6 100644 --- a/src/arm/sama5d3xcm.dtsi +++ b/src/arm/sama5d3xcm.dtsi @@ -36,43 +36,82 @@ }; }; - nand0: nand@60000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>; + pinctr-name = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; + nor: flash@0,0 { + compatible = "cfi-flash"; + linux,mtd-name = "physmap-flash.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x1000000>; + bank-width = <2>; + atmel,smc-read-mode = "nrd"; + atmel,smc-write-mode = "nwe"; + atmel,smc-bus-width = <16>; + atmel,smc-ncs-rd-setup-ns = <0>; + atmel,smc-ncs-wr-setup-ns = <0>; + atmel,smc-nwe-setup-ns = <8>; + atmel,smc-nrd-setup-ns = <16>; + atmel,smc-ncs-rd-pulse-ns = <84>; + atmel,smc-ncs-wr-pulse-ns = <84>; + atmel,smc-nrd-pulse-ns = <76>; + atmel,smc-nwe-pulse-ns = <76>; + atmel,smc-nrd-cycle-ns = <107>; + atmel,smc-nwe-cycle-ns = <84>; + atmel,smc-tdf-ns = <16>; }; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand_controller: nand-controller { + status = "okay"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; + + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/sama5d3xcm_cmp.dtsi b/src/arm/sama5d3xcm_cmp.dtsi index dc7572bc7ff0..75cbf4d4ab1a 100644 --- a/src/arm/sama5d3xcm_cmp.dtsi +++ b/src/arm/sama5d3xcm_cmp.dtsi @@ -148,43 +148,60 @@ }; }; - nand0: nand@60000000 { - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - atmel,has-pmecc; - atmel,pmecc-cap = <4>; - atmel,pmecc-sector-size = <512>; - nand-on-flash-bbt; + ebi: ebi@10000000 { + pinctrl-0 = <&pinctrl_ebi_nand_addr>; + pinctrl-names = "default"; status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x40000>; - }; + nand_controller: nand-controller { + status = "okay"; - bootloader@40000 { - label = "bootloader"; - reg = <0x40000 0x80000>; - }; + nand@3 { + reg = <0x3 0x0 0x2>; + atmel,rb = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + label = "atmel_nand"; - bootloaderenv@c0000 { - label = "bootloader env"; - reg = <0xc0000 0xc0000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - dtb@180000 { - label = "device tree"; - reg = <0x180000 0x80000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; - kernel@200000 { - label = "kernel"; - reg = <0x200000 0x600000>; - }; + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; - rootfs@800000 { - label = "rootfs"; - reg = <0x800000 0x0f800000>; + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; }; }; }; diff --git a/src/arm/sama5d4.dtsi b/src/arm/sama5d4.dtsi index d3889c9d25a9..2fa36c525957 100644 --- a/src/arm/sama5d4.dtsi +++ b/src/arm/sama5d4.dtsi @@ -124,6 +124,12 @@ #size-cells = <1>; ranges; + nfc_sram: sram@100000 { + compatible = "mmio-sram"; + no-memory-wc; + reg = <0x100000 0x2400>; + }; + usb0: gadget@00400000 { #address-cells = <1>; #size-cells = <0>; @@ -280,37 +286,37 @@ cache-level = <2>; }; - nand0: nand@80000000 { - compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand"; - #address-cells = <1>; + ebi: ebi@10000000 { + compatible = "atmel,sama5d3-ebi"; + #address-cells = <2>; #size-cells = <1>; - ranges; - reg = < 0x80000000 0x08000000 /* EBI CS3 */ - 0xfc05c070 0x00000490 /* SMC PMECC regs */ - 0xfc05c500 0x00000100 /* SMC PMECC Error Location regs */ - >; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; + atmel,smc = <&hsmc>; + reg = <0x10000000 0x10000000 + 0x60000000 0x28000000>; + ranges = <0x0 0x0 0x10000000 0x10000000 + 0x1 0x0 0x60000000 0x10000000 + 0x2 0x0 0x70000000 0x10000000 + 0x3 0x0 0x80000000 0x8000000>; + clocks = <&mck>; status = "disabled"; - nfc@90000000 { - compatible = "atmel,sama5d3-nfc"; - #address-cells = <1>; + nand_controller: nand-controller { + compatible = "atmel,sama5d3-nand-controller"; + atmel,nfc-sram = <&nfc_sram>; + atmel,nfc-io = <&nfc_io>; + ecc-engine = <&pmecc>; + #address-cells = <2>; #size-cells = <1>; - reg = < - 0x90000000 0x08000000 /* NFC Command Registers */ - 0xfc05c000 0x00000070 /* NFC HSMC regs */ - 0x00100000 0x00100000 /* NFC SRAM banks */ - >; - clocks = <&hsmc_clk>; - atmel,write-by-sram; + ranges; + status = "disabled"; }; }; + nfc_io: nfc-io@90000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0x90000000 0x8000000>; + }; + apb { compatible = "simple-bus"; #address-cells = <1>; @@ -1287,6 +1293,22 @@ status = "okay"; }; + hsmc: smc@fc05c000 { + compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; + reg = <0xfc05c000 0x1000>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>; + clocks = <&hsmc_clk>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmecc: ecc-engine@ffffc070 { + compatible = "atmel,sama5d4-pmecc"; + reg = <0xfc05c070 0x490>, + <0xfc05c500 0x100>; + }; + }; + rstc@fc068600 { compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; reg = <0xfc068600 0x10>; @@ -1447,6 +1469,113 @@ }; }; + ebi { + pinctrl_ebi_addr: ebi-addr-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nand_addr: ebi-addr-1 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs0: ebi-cs0-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs1: ebi-cs1-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs2: ebi-cs2-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_cs3: ebi-cs3-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_data_0_7: ebi-data-lsb-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_data_8_15: ebi-data-msb-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nandrdy: ebi-nandrdy-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nwait: ebi-nwait-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 { + atmel,pins = + ; + }; + + pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { + atmel,pins = + ; + }; + }; + i2c0 { pinctrl_i2c0: i2c0-0 { atmel,pins = diff --git a/src/arm/sh73a0.dtsi b/src/arm/sh73a0.dtsi index 6b01ab354e88..4ea5c5a16c57 100644 --- a/src/arm/sh73a0.dtsi +++ b/src/arm/sh73a0.dtsi @@ -444,7 +444,7 @@ status = "disabled"; }; - pfc: pfc@e6050000 { + pfc: pin-controller@e6050000 { compatible = "renesas,pfc-sh73a0"; reg = <0xe6050000 0x8000>, <0xe605801c 0x1c>; diff --git a/src/arm/socfpga.dtsi b/src/arm/socfpga.dtsi index b2674bdb8e6a..7e24dc8e82d4 100644 --- a/src/arm/socfpga.dtsi +++ b/src/arm/socfpga.dtsi @@ -557,7 +557,7 @@ interrupts = <0 115 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ - clocks = <&emac0_clk>; + clocks = <&emac_0_clk>; clock-names = "stmmaceth"; resets = <&rst EMAC0_RESET>; reset-names = "stmmaceth"; @@ -575,7 +575,7 @@ interrupts = <0 120 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ - clocks = <&emac1_clk>; + clocks = <&emac_1_clk>; clock-names = "stmmaceth"; resets = <&rst EMAC1_RESET>; reset-names = "stmmaceth"; diff --git a/src/arm/socfpga_arria10_socdk.dtsi b/src/arm/socfpga_arria10_socdk.dtsi index 94e088473823..3a32de9ded3b 100644 --- a/src/arm/socfpga_arria10_socdk.dtsi +++ b/src/arm/socfpga_arria10_socdk.dtsi @@ -130,13 +130,13 @@ }; &i2c1 { - speed-mode = <0>; status = "okay"; /* * adjust the falling times to decrease the i2c frequency to 50Khz * because the LCD module does not work at the standard 100Khz */ + clock-frequency = <100000>; i2c-sda-falling-time-ns = <6000>; i2c-scl-falling-time-ns = <6000>; diff --git a/src/arm/socfpga_cyclone5_de0_sockit.dts b/src/arm/socfpga_cyclone5_de0_sockit.dts index 7b49395452b6..b280e6494193 100644 --- a/src/arm/socfpga_cyclone5_de0_sockit.dts +++ b/src/arm/socfpga_cyclone5_de0_sockit.dts @@ -86,7 +86,7 @@ &i2c0 { status = "okay"; - speed-mode = <0>; + clock-frequency = <100000>; adxl345: adxl345@0 { compatible = "adi,adxl345"; diff --git a/src/arm/socfpga_cyclone5_mcvevk.dts b/src/arm/socfpga_cyclone5_mcvevk.dts index 21e397287e29..c2eb88aab8b3 100644 --- a/src/arm/socfpga_cyclone5_mcvevk.dts +++ b/src/arm/socfpga_cyclone5_mcvevk.dts @@ -58,7 +58,7 @@ &i2c0 { status = "okay"; - speed-mode = <0>; + clock-frequency = <100000>; stmpe1: stmpe811@41 { compatible = "st,stmpe811"; diff --git a/src/arm/socfpga_cyclone5_vining_fpga.dts b/src/arm/socfpga_cyclone5_vining_fpga.dts index 893198049397..655fe87e272d 100644 --- a/src/arm/socfpga_cyclone5_vining_fpga.dts +++ b/src/arm/socfpga_cyclone5_vining_fpga.dts @@ -69,34 +69,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; - }; - - leds { - compatible = "gpio-leds"; - - hps_led0 { - label = "hps:green:led0"; /* ALIVE_LED_GR */ - gpios = <&portb 19 0>; /* HPS_GPIO48 */ - linux,default-trigger = "heartbeat"; - }; - - hps_led1 { - label = "hps:red:led0"; /* ALIVE_LED_RD */ - gpios = <&portb 24 0>; /* HPS_GPIO53 */ - linux,default-trigger = "none"; - }; - - hps_led2 { - label = "hps:green:led1"; /* LINK2HOST_LED_GR */ - gpios = <&portb 25 0>; /* HPS_GPIO54 */ - linux,default-trigger = "heartbeat"; - }; - - hps_led3 { - label = "hps:red:led1"; /* LINK2HOST_LED_RD */ - gpios = <&portc 7 0>; /* HPS_GPIO65 */ - linux,default-trigger = "none"; - }; + ethernet1 = &gmac0; }; gpio-keys { @@ -203,69 +176,39 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <5>; - eeprom@51 { - compatible = "at,24c01"; - pagesize = <8>; - reg = <0x51>; - }; }; - i2c@6 { + i2c@6 { /* Backplane EEPROM */ #address-cells = <1>; #size-cells = <0>; reg = <6>; @@ -276,7 +219,7 @@ }; }; - i2c@7 { + i2c@7 { /* Power board EEPROM */ #address-cells = <1>; #size-cells = <0>; reg = <7>; @@ -300,6 +243,44 @@ }; }; +&qspi { + status = "okay"; + + n25q128@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q128"; + reg = <0>; /* chip select */ + spi-max-frequency = <100000000>; + m25p,fast-read; + + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; + + n25q00@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <1>; /* chip select */ + spi-max-frequency = <100000000>; + m25p,fast-read; + + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; +}; + &usb0 { dr_mode = "host"; status = "okay"; diff --git a/src/arm/stm32429i-eval.dts b/src/arm/stm32429i-eval.dts index b6331146aa02..dcda0bbefe5b 100644 --- a/src/arm/stm32429i-eval.dts +++ b/src/arm/stm32429i-eval.dts @@ -48,6 +48,7 @@ /dts-v1/; #include "stm32f429.dtsi" #include +#include / { model = "STMicroelectronics STM32429i-EVAL board"; @@ -66,6 +67,14 @@ serial0 = &usart1; }; + clocks { + clk_ext_camera: clk-ext-camera { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + soc { dma-ranges = <0xc0000000 0x0 0x10000000>; }; @@ -124,6 +133,16 @@ clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>; clock-names = "main_clk"; }; + + panel_rgb: panel-rgb { + compatible = "ampire,am-480272h3tmqw-t01h"; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; }; &adc { @@ -141,10 +160,79 @@ clock-frequency = <25000000>; }; +&crc { + status = "okay"; +}; + +&dcmi { + status = "okay"; + + port { + dcmi_0: endpoint { + remote-endpoint = <&ov2640_0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + }; + }; +}; + &i2c1 { pinctrl-0 = <&i2c1_pins>; pinctrl-names = "default"; status = "okay"; + + ov2640: camera@30 { + compatible = "ovti,ov2640"; + reg = <0x30>; + resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&stmpegpio 0 GPIO_ACTIVE_LOW>; + clocks = <&clk_ext_camera>; + clock-names = "xvclk"; + status = "okay"; + + port { + ov2640_0: endpoint { + remote-endpoint = <&dcmi_0>; + }; + }; + }; + + stmpe1600: stmpe1600@42 { + compatible = "st,stmpe1600"; + reg = <0x42>; + irq-gpio = <&gpioi 8 0>; + irq-trigger = <3>; + interrupts = <8 3>; + interrupt-parent = <&exti>; + interrupt-controller; + wakeup-source; + + stmpegpio: stmpe_gpio { + compatible = "st,stmpe-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; +}; + +&iwdg { + status = "okay"; + timeout-sec = <32>; +}; + +<dc { + status = "okay"; + pinctrl-0 = <<dc_pins>; + pinctrl-names = "default"; + dma-ranges; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; }; &mac { diff --git a/src/arm/stm32f429-disco.dts b/src/arm/stm32f429-disco.dts index 191fa50e34eb..ae47cde7952f 100644 --- a/src/arm/stm32f429-disco.dts +++ b/src/arm/stm32f429-disco.dts @@ -102,6 +102,10 @@ clock-frequency = <8000000>; }; +&crc { + status = "okay"; +}; + &rtc { assigned-clocks = <&rcc 1 CLK_RTC>; assigned-clock-parents = <&rcc 1 CLK_LSI>; diff --git a/src/arm/stm32f429.dtsi b/src/arm/stm32f429.dtsi index b2a2b5c38caa..a8113dc879cf 100644 --- a/src/arm/stm32f429.dtsi +++ b/src/arm/stm32f429.dtsi @@ -65,7 +65,7 @@ clock-frequency = <32768>; }; - clk-lsi { + clk_lsi: clk-lsi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32000>; @@ -307,6 +307,13 @@ status = "disabled"; }; + iwdg: watchdog@40003000 { + compatible = "st,stm32-iwdg"; + reg = <0x40003000 0x400>; + clocks = <&clk_lsi>; + status = "disabled"; + }; + usart2: serial@40004400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004400 0x400>; @@ -549,7 +556,17 @@ reg = <0x40007000 0x400>; }; - pin-controller { + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F4_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + + pinctrl: pin-controller { #address-cells = <1>; #size-cells = <1>; compatible = "st,stm32f429-pinctrl"; @@ -561,6 +578,8 @@ gpioa: gpio@40020000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x0 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>; st,bank-name = "GPIOA"; @@ -569,6 +588,8 @@ gpiob: gpio@40020400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>; st,bank-name = "GPIOB"; @@ -577,6 +598,8 @@ gpioc: gpio@40020800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>; st,bank-name = "GPIOC"; @@ -585,6 +608,8 @@ gpiod: gpio@40020c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0xc00 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>; st,bank-name = "GPIOD"; @@ -593,6 +618,8 @@ gpioe: gpio@40021000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1000 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>; st,bank-name = "GPIOE"; @@ -601,6 +628,8 @@ gpiof: gpio@40021400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>; st,bank-name = "GPIOF"; @@ -609,6 +638,8 @@ gpiog: gpio@40021800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>; st,bank-name = "GPIOG"; @@ -617,6 +648,8 @@ gpioh: gpio@40021c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1c00 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>; st,bank-name = "GPIOH"; @@ -625,6 +658,8 @@ gpioi: gpio@40022000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2000 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>; st,bank-name = "GPIOI"; @@ -633,6 +668,8 @@ gpioj: gpio@40022400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>; st,bank-name = "GPIOJ"; @@ -641,6 +678,8 @@ gpiok: gpio@40022800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>; st,bank-name = "GPIOK"; @@ -764,6 +803,70 @@ slew-rate = <3>; }; }; + + ltdc_pins: ltdc@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + slew-rate = <2>; + }; + }; + + dcmi_pins: dcmi@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + }; + }; + + crc: crc@40023000 { + compatible = "st,stm32f4-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>; + status = "disabled"; }; rcc: rcc@40023810 { @@ -842,6 +945,20 @@ status = "disabled"; }; + dcmi: dcmi@50050000 { + compatible = "st,stm32-dcmi"; + reg = <0x50050000 0x400>; + interrupts = <78>; + resets = <&rcc STM32F4_AHB2_RESET(DCMI)>; + clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&dcmi_pins>; + dmas = <&dma2 1 1 0x414 0x3>; + dma-names = "tx"; + status = "disabled"; + }; + rng: rng@50060800 { compatible = "st,stm32-rng"; reg = <0x50060800 0x400>; diff --git a/src/arm/stm32f746-disco.dts b/src/arm/stm32f746-disco.dts new file mode 100644 index 000000000000..18f656074437 --- /dev/null +++ b/src/arm/stm32f746-disco.dts @@ -0,0 +1,74 @@ +/* + * Copyright 2017 - Vikas MANOCHA + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32f746.dtsi" +#include + +/ { + model = "STMicroelectronics STM32F746-DISCO board"; + compatible = "st,stm32f746-disco", "st,stm32f746"; + + chosen { + bootargs = "root=/dev/ram"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0xC0000000 0x800000>; + }; + + aliases { + serial0 = &usart1; + }; + +}; + +&clk_hse { + clock-frequency = <25000000>; +}; + +&usart1 { + pinctrl-0 = <&usart1_pins_b>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/src/arm/stm32f746.dtsi b/src/arm/stm32f746.dtsi index c2765ce12e2e..4506eb97a4ab 100644 --- a/src/arm/stm32f746.dtsi +++ b/src/arm/stm32f746.dtsi @@ -229,6 +229,8 @@ gpioa: gpio@40020000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x0 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>; st,bank-name = "GPIOA"; @@ -237,6 +239,8 @@ gpiob: gpio@40020400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x400 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOB)>; st,bank-name = "GPIOB"; @@ -245,6 +249,8 @@ gpioc: gpio@40020800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x800 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOC)>; st,bank-name = "GPIOC"; @@ -253,6 +259,8 @@ gpiod: gpio@40020c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0xc00 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOD)>; st,bank-name = "GPIOD"; @@ -261,6 +269,8 @@ gpioe: gpio@40021000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1000 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOE)>; st,bank-name = "GPIOE"; @@ -269,6 +279,8 @@ gpiof: gpio@40021400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1400 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOF)>; st,bank-name = "GPIOF"; @@ -277,6 +289,8 @@ gpiog: gpio@40021800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1800 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOG)>; st,bank-name = "GPIOG"; @@ -285,6 +299,8 @@ gpioh: gpio@40021c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1c00 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOH)>; st,bank-name = "GPIOH"; @@ -293,6 +309,8 @@ gpioi: gpio@40022000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2000 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOI)>; st,bank-name = "GPIOI"; @@ -301,6 +319,8 @@ gpioj: gpio@40022400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2400 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOJ)>; st,bank-name = "GPIOJ"; @@ -309,6 +329,8 @@ gpiok: gpio@40022800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2800 0x400>; clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOK)>; st,bank-name = "GPIOK"; @@ -326,6 +348,19 @@ bias-disable; }; }; + + usart1_pins_b: usart1@1 { + pins1 { + pinmux = ; + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; + bias-disable; + }; + }; }; crc: crc@40023000 { @@ -336,6 +371,7 @@ }; rcc: rcc@40023800 { + #reset-cells = <1>; #clock-cells = <2>; compatible = "st,stm32f746-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; diff --git a/src/arm/stm32f769-disco.dts b/src/arm/stm32f769-disco.dts new file mode 100644 index 000000000000..166728aeb166 --- /dev/null +++ b/src/arm/stm32f769-disco.dts @@ -0,0 +1,74 @@ +/* + * Copyright 2017 - Vikas MANOCHA + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32f746.dtsi" +#include + +/ { + model = "STMicroelectronics STM32F769-DISCO board"; + compatible = "st,stm32f769-disco", "st,stm32f7"; + + chosen { + bootargs = "root=/dev/ram"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0xC0000000 0x1000000>; + }; + + aliases { + serial0 = &usart1; + }; + +}; + +&clk_hse { + clock-frequency = <25000000>; +}; + +&usart1 { + pinctrl-0 = <&usart1_pins_a>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/src/arm/stm32h743-pinctrl.dtsi b/src/arm/stm32h743-pinctrl.dtsi index fcc1e0640233..76bbd6575fae 100644 --- a/src/arm/stm32h743-pinctrl.dtsi +++ b/src/arm/stm32h743-pinctrl.dtsi @@ -151,6 +151,19 @@ bias-disable; }; }; + + usart2_pins: usart2@0 { + pins1 { + pinmux = ; + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; + bias-disable; + }; + }; }; }; }; diff --git a/src/arm/stm32h743.dtsi b/src/arm/stm32h743.dtsi index 46856298ee16..36a99db0a3b4 100644 --- a/src/arm/stm32h743.dtsi +++ b/src/arm/stm32h743.dtsi @@ -68,6 +68,14 @@ }; + usart2: serial@40004400 { + compatible = "st,stm32f7-usart", "st,stm32f7-uart"; + reg = <0x40004400 0x400>; + interrupts = <38>; + status = "disabled"; + clocks = <&timer_clk>; + }; + timer5: timer@40000c00 { compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; diff --git a/src/arm/stm32h743i-disco.dts b/src/arm/stm32h743i-disco.dts new file mode 100644 index 000000000000..79e841d94079 --- /dev/null +++ b/src/arm/stm32h743i-disco.dts @@ -0,0 +1,73 @@ +/* + * Copyright 2017 - Patrice Chotard + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32h743.dtsi" +#include "stm32h743-pinctrl.dtsi" + +/ { + model = "STMicroelectronics STM32H743i-Discovery board"; + compatible = "st,stm32h743i-disco", "st,stm32h743"; + + chosen { + bootargs = "root=/dev/ram"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0xd0000000 0x2000000>; + }; + + aliases { + serial0 = &usart2; + }; +}; + +&clk_hse { + clock-frequency = <125000000>; +}; + +&usart2 { + pinctrl-0 = <&usart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/src/arm/sun4i-a10-a1000.dts b/src/arm/sun4i-a10-a1000.dts index f2a01fe2bebc..f80d37ddc4c6 100644 --- a/src/arm/sun4i-a10-a1000.dts +++ b/src/arm/sun4i-a10-a1000.dts @@ -171,7 +171,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-ba10-tvbox.dts b/src/arm/sun4i-a10-ba10-tvbox.dts index 942d739a4384..6b02de592a02 100644 --- a/src/arm/sun4i-a10-ba10-tvbox.dts +++ b/src/arm/sun4i-a10-ba10-tvbox.dts @@ -109,7 +109,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-chuwi-v7-cw0825.dts b/src/arm/sun4i-a10-chuwi-v7-cw0825.dts index 17f8c5ec011c..a7d61994b8fd 100644 --- a/src/arm/sun4i-a10-chuwi-v7-cw0825.dts +++ b/src/arm/sun4i-a10-chuwi-v7-cw0825.dts @@ -128,7 +128,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-cubieboard.dts b/src/arm/sun4i-a10-cubieboard.dts index d844938e2aa7..404ce7694899 100644 --- a/src/arm/sun4i-a10-cubieboard.dts +++ b/src/arm/sun4i-a10-cubieboard.dts @@ -142,7 +142,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -182,6 +182,10 @@ #include "axp209.dtsi" +&ac_power_supply { + status = "okay"; +}; + ®_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/src/arm/sun4i-a10-dserve-dsrv9703c.dts b/src/arm/sun4i-a10-dserve-dsrv9703c.dts index aad3bec1cb39..e0777ae808c7 100644 --- a/src/arm/sun4i-a10-dserve-dsrv9703c.dts +++ b/src/arm/sun4i-a10-dserve-dsrv9703c.dts @@ -163,7 +163,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-gemei-g9.dts b/src/arm/sun4i-a10-gemei-g9.dts index 9616cdecce93..d8bfd7b74916 100644 --- a/src/arm/sun4i-a10-gemei-g9.dts +++ b/src/arm/sun4i-a10-gemei-g9.dts @@ -146,7 +146,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH01 */ diff --git a/src/arm/sun4i-a10-hackberry.dts b/src/arm/sun4i-a10-hackberry.dts index a1a7282199d5..856cfc9128e6 100644 --- a/src/arm/sun4i-a10-hackberry.dts +++ b/src/arm/sun4i-a10-hackberry.dts @@ -107,7 +107,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-hyundai-a7hd.dts b/src/arm/sun4i-a10-hyundai-a7hd.dts index 85dcf81ab64e..6506595268b2 100644 --- a/src/arm/sun4i-a10-hyundai-a7hd.dts +++ b/src/arm/sun4i-a10-hyundai-a7hd.dts @@ -79,7 +79,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -120,10 +120,6 @@ status = "okay"; }; -&usb2_vbus_pin_a { - pins = "PH6"; -}; - &usb_otg { dr_mode = "otg"; status = "okay"; diff --git a/src/arm/sun4i-a10-inet1.dts b/src/arm/sun4i-a10-inet1.dts index b8923b92cb36..d51d8c302daf 100644 --- a/src/arm/sun4i-a10-inet1.dts +++ b/src/arm/sun4i-a10-inet1.dts @@ -161,7 +161,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-inet97fv2.dts b/src/arm/sun4i-a10-inet97fv2.dts index a1a2bbb3f9d3..a8e479fe43ca 100644 --- a/src/arm/sun4i-a10-inet97fv2.dts +++ b/src/arm/sun4i-a10-inet97fv2.dts @@ -147,7 +147,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-inet9f-rev03.dts b/src/arm/sun4i-a10-inet9f-rev03.dts index 4a27eb9102cd..2acb89a87d41 100644 --- a/src/arm/sun4i-a10-inet9f-rev03.dts +++ b/src/arm/sun4i-a10-inet9f-rev03.dts @@ -305,7 +305,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-itead-iteaduino-plus.dts b/src/arm/sun4i-a10-itead-iteaduino-plus.dts index 4e798f014c99..92e3e030ced3 100644 --- a/src/arm/sun4i-a10-itead-iteaduino-plus.dts +++ b/src/arm/sun4i-a10-itead-iteaduino-plus.dts @@ -100,7 +100,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-jesurun-q5.dts b/src/arm/sun4i-a10-jesurun-q5.dts index 308dc1513041..92b2d4af3d21 100644 --- a/src/arm/sun4i-a10-jesurun-q5.dts +++ b/src/arm/sun4i-a10-jesurun-q5.dts @@ -140,7 +140,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-marsboard.dts b/src/arm/sun4i-a10-marsboard.dts index 98a5f7258dca..0f927da28ee1 100644 --- a/src/arm/sun4i-a10-marsboard.dts +++ b/src/arm/sun4i-a10-marsboard.dts @@ -141,7 +141,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-mini-xplus.dts b/src/arm/sun4i-a10-mini-xplus.dts index 484c57493bd2..a5ed9e4e22c6 100644 --- a/src/arm/sun4i-a10-mini-xplus.dts +++ b/src/arm/sun4i-a10-mini-xplus.dts @@ -97,7 +97,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-mk802.dts b/src/arm/sun4i-a10-mk802.dts index 2b75745cd246..81db6824a2c7 100644 --- a/src/arm/sun4i-a10-mk802.dts +++ b/src/arm/sun4i-a10-mk802.dts @@ -72,7 +72,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-mk802ii.dts b/src/arm/sun4i-a10-mk802ii.dts index c861fa7e356c..e74a881fd9a7 100644 --- a/src/arm/sun4i-a10-mk802ii.dts +++ b/src/arm/sun4i-a10-mk802ii.dts @@ -83,7 +83,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-olinuxino-lime.dts b/src/arm/sun4i-a10-olinuxino-lime.dts index 3a2522a9419d..462412ee903c 100644 --- a/src/arm/sun4i-a10-olinuxino-lime.dts +++ b/src/arm/sun4i-a10-olinuxino-lime.dts @@ -145,7 +145,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-pcduino.dts b/src/arm/sun4i-a10-pcduino.dts index 83596fd2ccfc..84f55e76df0c 100644 --- a/src/arm/sun4i-a10-pcduino.dts +++ b/src/arm/sun4i-a10-pcduino.dts @@ -147,7 +147,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10-pov-protab2-ips9.dts b/src/arm/sun4i-a10-pov-protab2-ips9.dts index a68c7cc53b94..c0f8c88b5a7d 100644 --- a/src/arm/sun4i-a10-pov-protab2-ips9.dts +++ b/src/arm/sun4i-a10-pov-protab2-ips9.dts @@ -149,7 +149,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun4i-a10.dtsi b/src/arm/sun4i-a10.dtsi index b63668ece151..41c2579143fd 100644 --- a/src/arm/sun4i-a10.dtsi +++ b/src/arm/sun4i-a10.dtsi @@ -1030,12 +1030,6 @@ bias-pull-up; }; - mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { - pins = "PH1"; - function = "gpio_in"; - bias-pull-up; - }; - ps20_pins_a: ps20@0 { pins = "PI20", "PI21"; function = "ps2"; diff --git a/src/arm/sun5i-a10s-auxtek-t003.dts b/src/arm/sun5i-a10s-auxtek-t003.dts index c6f742a7e69f..d2dee8d434bf 100644 --- a/src/arm/sun5i-a10s-auxtek-t003.dts +++ b/src/arm/sun5i-a10s-auxtek-t003.dts @@ -136,14 +136,6 @@ status = "okay"; }; -&usb0_vbus_pin_a { - pins = "PG13"; -}; - -&usb1_vbus_pin_a { - pins = "PB10"; -}; - &usb_otg { dr_mode = "host"; status = "okay"; diff --git a/src/arm/sun5i-a10s-auxtek-t004.dts b/src/arm/sun5i-a10s-auxtek-t004.dts index a27c3fa58736..16f839df4227 100644 --- a/src/arm/sun5i-a10s-auxtek-t004.dts +++ b/src/arm/sun5i-a10s-auxtek-t004.dts @@ -168,10 +168,6 @@ status = "okay"; }; -&usb1_vbus_pin_a { - pins = "PG13"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>; diff --git a/src/arm/sun5i-a10s-olinuxino-micro.dts b/src/arm/sun5i-a10s-olinuxino-micro.dts index 894f874a5beb..da95118af4dc 100644 --- a/src/arm/sun5i-a10s-olinuxino-micro.dts +++ b/src/arm/sun5i-a10s-olinuxino-micro.dts @@ -63,6 +63,17 @@ stdout-path = "serial0:115200n8"; }; + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -76,6 +87,10 @@ }; }; +&be0 { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -91,6 +106,16 @@ status = "okay"; }; +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -248,6 +273,10 @@ status = "okay"; }; +&tcon0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -271,10 +300,6 @@ status = "okay"; }; -&usb0_vbus_pin_a { - pins = "PG11"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>; diff --git a/src/arm/sun5i-a10s-wobo-i5.dts b/src/arm/sun5i-a10s-wobo-i5.dts index ea3e5655a61b..5482be174e12 100644 --- a/src/arm/sun5i-a10s-wobo-i5.dts +++ b/src/arm/sun5i-a10s-wobo-i5.dts @@ -216,10 +216,6 @@ status = "okay"; }; -&usb1_vbus_pin_a { - pins = "PG12"; -}; - &usbphy { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; diff --git a/src/arm/sun5i-a10s.dtsi b/src/arm/sun5i-a10s.dtsi index 1e38ff80366c..18f25c5e75ae 100644 --- a/src/arm/sun5i-a10s.dtsi +++ b/src/arm/sun5i-a10s.dtsi @@ -71,7 +71,46 @@ }; }; + display-engine { + compatible = "allwinner,sun5i-a10s-display-engine"; + allwinner,pipelines = <&fe0>; + }; + soc@01c00000 { + hdmi: hdmi@01c16000 { + compatible = "allwinner,sun5i-a10s-hdmi"; + reg = <0x01c16000 0x1000>; + interrupts = <58>; + clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, + <&ccu 9>, + <&ccu 16>; + clock-names = "ahb", "mod", "pll-0", "pll-1"; + dmas = <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_DEDICATED 24>; + dma-names = "ddc-tx", "ddc-rx", "audio-tx"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + + hdmi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + pwm: pwm@01c20e00 { compatible = "allwinner,sun5i-a10s-pwm"; reg = <0x01c20e00 0xc>; @@ -128,3 +167,11 @@ &sram_a { }; + +&tcon0_out { + tcon0_out_hdmi: endpoint@2 { + reg = <2>; + remote-endpoint = <&hdmi_in_tcon0>; + allwinner,tcon-channel = <1>; + }; +}; diff --git a/src/arm/sun5i-a13-empire-electronix-d709.dts b/src/arm/sun5i-a13-empire-electronix-d709.dts index 34411d27aadf..3dbb0d7c2f8c 100644 --- a/src/arm/sun5i-a13-empire-electronix-d709.dts +++ b/src/arm/sun5i-a13-empire-electronix-d709.dts @@ -207,10 +207,6 @@ status = "okay"; }; -&usb0_vbus_pin_a { - pins = "PG12"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; diff --git a/src/arm/sun5i-a13-hsg-h702.dts b/src/arm/sun5i-a13-hsg-h702.dts index 2489c16f7efa..584fa579ded2 100644 --- a/src/arm/sun5i-a13-hsg-h702.dts +++ b/src/arm/sun5i-a13-hsg-h702.dts @@ -186,7 +186,6 @@ }; ®_usb0_vbus { - pinctrl-0 = <&usb0_vbus_pin_a>; gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ status = "okay"; }; @@ -202,10 +201,6 @@ status = "okay"; }; -&usb0_vbus_pin_a { - pins = "PG12"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; diff --git a/src/arm/sun5i-a13-olinuxino.dts b/src/arm/sun5i-a13-olinuxino.dts index 95f591bb8ced..38072c7e10e2 100644 --- a/src/arm/sun5i-a13-olinuxino.dts +++ b/src/arm/sun5i-a13-olinuxino.dts @@ -269,10 +269,6 @@ status = "okay"; }; -&usb0_vbus_pin_a { - pins = "PG12"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; diff --git a/src/arm/sun5i-r8-chip.dts b/src/arm/sun5i-r8-chip.dts index d0785602663b..879a4b0f3bd5 100644 --- a/src/arm/sun5i-r8-chip.dts +++ b/src/arm/sun5i-r8-chip.dts @@ -132,6 +132,10 @@ status = "okay"; }; +&battery_power_supply { + status = "okay"; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; diff --git a/src/arm/sun5i.dtsi b/src/arm/sun5i.dtsi index 5175f9cc9bed..98cc00341b00 100644 --- a/src/arm/sun5i.dtsi +++ b/src/arm/sun5i.dtsi @@ -272,6 +272,7 @@ tcon0_out_tve0: endpoint@1 { reg = <1>; remote-endpoint = <&tve0_in_tcon0>; + allwinner,tcon-channel = <1>; }; }; }; @@ -355,6 +356,15 @@ status = "disabled"; }; + crypto: crypto-engine@01c15000 { + compatible = "allwinner,sun5i-a13-crypto", + "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <54>; + clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>; + clock-names = "ahb", "mod"; + }; + spi2: spi@01c17000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c17000 0x1000>; diff --git a/src/arm/sun6i-a31-hummingbird.dts b/src/arm/sun6i-a31-hummingbird.dts index d4f74f476f25..9ecb5f0b3f83 100644 --- a/src/arm/sun6i-a31-hummingbird.dts +++ b/src/arm/sun6i-a31-hummingbird.dts @@ -253,6 +253,10 @@ #include "axp22x.dtsi" +&ac_power_supply { + status = "okay"; +}; + ®_aldo1 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -319,7 +323,6 @@ &tcon0 { pinctrl-names = "default"; pinctrl-0 = <&lcd0_rgb888_pins>; - status = "okay"; }; &tcon0_out { @@ -344,11 +347,6 @@ status = "okay"; }; -&usb1_vbus_pin_a { - /* different pin from sunxi-common-regulators */ - pins = "PH24"; -}; - &usbphy { usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ usb0_vbus_det-gpio = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */ diff --git a/src/arm/sun6i-a31.dtsi b/src/arm/sun6i-a31.dtsi index 9c999d3788f6..aebc3f9dc7b6 100644 --- a/src/arm/sun6i-a31.dtsi +++ b/src/arm/sun6i-a31.dtsi @@ -232,7 +232,7 @@ de: display-engine { compatible = "allwinner,sun6i-a31-display-engine"; - allwinner,pipelines = <&fe0>; + allwinner,pipelines = <&fe0>, <&fe1>; status = "disabled"; }; @@ -264,7 +264,6 @@ "tcon-ch0", "tcon-ch1"; clock-output-names = "tcon0-pixel-clock"; - status = "disabled"; ports { #address-cells = <1>; @@ -289,6 +288,43 @@ }; }; + tcon1: lcd-controller@01c0d000 { + compatible = "allwinner,sun6i-a31-tcon"; + reg = <0x01c0d000 0x1000>; + interrupts = ; + resets = <&ccu RST_AHB1_LCD1>; + reset-names = "lcd"; + clocks = <&ccu CLK_AHB1_LCD1>, + <&ccu CLK_LCD1_CH0>, + <&ccu CLK_LCD1_CH1>; + clock-names = "ahb", + "tcon-ch0", + "tcon-ch1"; + clock-output-names = "tcon1-pixel-clock"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon1_in_drc1: endpoint@0 { + reg = <0>; + remote-endpoint = <&drc1_out_tcon1>; + }; + }; + + tcon1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + mmc0: mmc@01c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; @@ -780,7 +816,8 @@ }; crypto: crypto-engine@01c15000 { - compatible = "allwinner,sun4i-a10-crypto"; + compatible = "allwinner,sun6i-a31-crypto", + "allwinner,sun4i-a10-crypto"; reg = <0x01c15000 0x1000>; interrupts = ; clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>; @@ -896,6 +933,130 @@ reg = <0>; remote-endpoint = <&be0_in_fe0>; }; + + fe0_out_be1: endpoint@1 { + reg = <1>; + remote-endpoint = <&be1_in_fe0>; + }; + }; + }; + }; + + fe1: display-frontend@01e20000 { + compatible = "allwinner,sun6i-a31-display-frontend"; + reg = <0x01e20000 0x20000>; + interrupts = ; + clocks = <&ccu CLK_AHB1_FE1>, <&ccu CLK_FE1>, + <&ccu CLK_DRAM_FE1>; + clock-names = "ahb", "mod", + "ram"; + resets = <&ccu RST_AHB1_FE1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + fe1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + fe1_out_be0: endpoint@0 { + reg = <0>; + remote-endpoint = <&be0_in_fe1>; + }; + + fe1_out_be1: endpoint@1 { + reg = <1>; + remote-endpoint = <&be1_in_fe1>; + }; + }; + }; + }; + + be1: display-backend@01e40000 { + compatible = "allwinner,sun6i-a31-display-backend"; + reg = <0x01e40000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_AHB1_BE1>, <&ccu CLK_BE1>, + <&ccu CLK_DRAM_BE1>; + clock-names = "ahb", "mod", + "ram"; + resets = <&ccu RST_AHB1_BE1>; + + assigned-clocks = <&ccu CLK_BE1>; + assigned-clock-rates = <300000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + be1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + be1_in_fe0: endpoint@0 { + reg = <0>; + remote-endpoint = <&fe0_out_be1>; + }; + + be1_in_fe1: endpoint@1 { + reg = <1>; + remote-endpoint = <&fe1_out_be1>; + }; + }; + + be1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + be1_out_drc1: endpoint@0 { + reg = <0>; + remote-endpoint = <&drc1_in_be1>; + }; + }; + }; + }; + + drc1: drc@01e50000 { + compatible = "allwinner,sun6i-a31-drc"; + reg = <0x01e50000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_AHB1_DRC1>, <&ccu CLK_IEP_DRC1>, + <&ccu CLK_DRAM_DRC1>; + clock-names = "ahb", "mod", + "ram"; + resets = <&ccu RST_AHB1_DRC1>; + + assigned-clocks = <&ccu CLK_IEP_DRC1>; + assigned-clock-rates = <300000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + drc1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + drc1_in_be1: endpoint@0 { + reg = <0>; + remote-endpoint = <&be1_out_drc1>; + }; + }; + + drc1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + drc1_out_tcon1: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon1_in_drc1>; + }; }; }; }; @@ -926,6 +1087,11 @@ reg = <0>; remote-endpoint = <&fe0_out_be0>; }; + + be0_in_fe1: endpoint@1 { + reg = <1>; + remote-endpoint = <&fe1_out_be0>; + }; }; be0_out: port@1 { diff --git a/src/arm/sun6i-a31s-primo81.dts b/src/arm/sun6i-a31s-primo81.dts index f3712753fa42..4c10123509c4 100644 --- a/src/arm/sun6i-a31s-primo81.dts +++ b/src/arm/sun6i-a31s-primo81.dts @@ -158,11 +158,16 @@ reg = <0x68>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + x-powers,drive-vbus-en; }; }; #include "axp22x.dtsi" +&battery_power_supply { + status = "okay"; +}; + ®_aldo3 { regulator-always-on; regulator-min-microvolt = <2700000>; @@ -226,6 +231,11 @@ regulator-name = "vddio-csi"; }; +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + ®_eldo3 { regulator-min-microvolt = <1080000>; regulator-max-microvolt = <1320000>; @@ -238,12 +248,18 @@ }; &usb_otg { - /* otg support requires support for AXP221 usb-power-supply and GPIO */ - dr_mode = "host"; + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { status = "okay"; }; &usbphy { + usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_drivevbus>; usb1_vbus-supply = <®_dldo1>; status = "okay"; }; diff --git a/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts b/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts index bdfdce8ca6ba..51e6f1d21c32 100644 --- a/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts +++ b/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts @@ -138,7 +138,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&r_pio>; diff --git a/src/arm/sun7i-a20-bananapi-m1-plus.dts b/src/arm/sun7i-a20-bananapi-m1-plus.dts index 08e776ae095a..eb55e74232c9 100644 --- a/src/arm/sun7i-a20-bananapi-m1-plus.dts +++ b/src/arm/sun7i-a20-bananapi-m1-plus.dts @@ -144,6 +144,10 @@ #include "axp209.dtsi" +&ac_power_supply { + status = "okay"; +}; + &ir0 { pinctrl-names = "default"; pinctrl-0 = <&ir0_rx_pins_a>; @@ -172,7 +176,7 @@ wakeup-source; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/src/arm/sun7i-a20-bananapi.dts b/src/arm/sun7i-a20-bananapi.dts index ed2f35adf542..88a1c2363c6c 100644 --- a/src/arm/sun7i-a20-bananapi.dts +++ b/src/arm/sun7i-a20-bananapi.dts @@ -177,6 +177,57 @@ }; &pio { + gpio-line-names = + /* PA */ + "ERXD3", "ERXD2", "ERXD1", "ERXD0", "ETXD3", + "ETXD2", "ETXD1", "ETXD0", + "ERXCK", "ERXERR", "ERXDV", "EMDC", "EMDIO", + "ETXEN", "ETXCK", "ECRS", + "ECOL", "ETXERR", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PB */ + "PMU-SCK", "PMU-SDA", "", "", "", "", "", "", + "", "USB0-DRV", "", "", "", "", "", "", + "", "", "", "", "SCL", "SDA", "", "", + "", "", "", "", "", "", "", "", + /* PC */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PD */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PE */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PF */ + "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3", + "SD0-D2", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PG */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + /* PH */ + "TXD0", "RXD0", "IO-1", "PH3", "USB0-IDDET", "PH5", "", "", + "", "", "SD0-DET", "", "", "", "", "", + "", "", "", "", "IO-4", "IO-5", "", "EMAC-PWR-EN", + "LED1", "", "", "", "", "", "", "", + /* PI */ + "", "", "", "IO-GCLK", "", "", "", "", + "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI", + "SPI-MISO", "SPI-CE1", "", + "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "", + "", "", "", "", "", "", "", ""; + usb0_id_detect_pin: usb0_id_detect_pin@0 { pins = "PH4"; function = "gpio_in"; diff --git a/src/arm/sun7i-a20-bananapro.dts b/src/arm/sun7i-a20-bananapro.dts index 83516bc81225..e7af1b7c33d5 100644 --- a/src/arm/sun7i-a20-bananapro.dts +++ b/src/arm/sun7i-a20-bananapro.dts @@ -172,7 +172,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/src/arm/sun7i-a20-cubieboard2.dts b/src/arm/sun7i-a20-cubieboard2.dts index a2eab7aa80e0..2a50207618cb 100644 --- a/src/arm/sun7i-a20-cubieboard2.dts +++ b/src/arm/sun7i-a20-cubieboard2.dts @@ -137,7 +137,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -174,13 +174,12 @@ status = "okay"; }; -&usb_otg { - dr_mode = "otg"; +#include "axp209.dtsi" + +&ac_power_supply { status = "okay"; }; -#include "axp209.dtsi" - ®_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; @@ -220,6 +219,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>; diff --git a/src/arm/sun7i-a20-cubietruck.dts b/src/arm/sun7i-a20-cubietruck.dts index 102903e83bd2..bb510187602c 100644 --- a/src/arm/sun7i-a20-cubietruck.dts +++ b/src/arm/sun7i-a20-cubietruck.dts @@ -178,7 +178,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -195,7 +195,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; @@ -336,6 +336,7 @@ pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ + usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/src/arm/sun7i-a20-hummingbird.dts b/src/arm/sun7i-a20-hummingbird.dts index 99c00b9a1546..6e6264cd69f8 100644 --- a/src/arm/sun7i-a20-hummingbird.dts +++ b/src/arm/sun7i-a20-hummingbird.dts @@ -160,7 +160,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-i12-tvbox.dts b/src/arm/sun7i-a20-i12-tvbox.dts index 4da49717da21..55809973a568 100644 --- a/src/arm/sun7i-a20-i12-tvbox.dts +++ b/src/arm/sun7i-a20-i12-tvbox.dts @@ -157,7 +157,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -173,7 +173,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/src/arm/sun7i-a20-icnova-swac.dts b/src/arm/sun7i-a20-icnova-swac.dts index 28d3abbdc2d4..794e7617f545 100644 --- a/src/arm/sun7i-a20-icnova-swac.dts +++ b/src/arm/sun7i-a20-icnova-swac.dts @@ -104,7 +104,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */ diff --git a/src/arm/sun7i-a20-itead-ibox.dts b/src/arm/sun7i-a20-itead-ibox.dts index d52222c82cb8..8a8a6dbcd414 100644 --- a/src/arm/sun7i-a20-itead-ibox.dts +++ b/src/arm/sun7i-a20-itead-ibox.dts @@ -121,7 +121,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-lamobo-r1.dts b/src/arm/sun7i-a20-lamobo-r1.dts index 96bb0bc198ba..004b6ddac813 100644 --- a/src/arm/sun7i-a20-lamobo-r1.dts +++ b/src/arm/sun7i-a20-lamobo-r1.dts @@ -85,10 +85,6 @@ }; }; -&ahci_pwr_pin_a { - pins = "PB3"; -}; - &ahci { target-supply = <®_ahci_5v>; status = "okay"; @@ -319,10 +315,6 @@ status = "okay"; }; -&usb2_vbus_pin_a { - pins = "PH12"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>; diff --git a/src/arm/sun7i-a20-m3.dts b/src/arm/sun7i-a20-m3.dts index 86f69813683e..43c94787ef07 100644 --- a/src/arm/sun7i-a20-m3.dts +++ b/src/arm/sun7i-a20-m3.dts @@ -117,7 +117,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-mk808c.dts b/src/arm/sun7i-a20-mk808c.dts index c4ee30709f3a..f7413094183c 100644 --- a/src/arm/sun7i-a20-mk808c.dts +++ b/src/arm/sun7i-a20-mk808c.dts @@ -109,7 +109,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-olimex-som-evb.dts b/src/arm/sun7i-a20-olimex-som-evb.dts index 1af5b46862cb..64c8ef9a2756 100644 --- a/src/arm/sun7i-a20-olimex-som-evb.dts +++ b/src/arm/sun7i-a20-olimex-som-evb.dts @@ -187,7 +187,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-olinuxino-lime.dts b/src/arm/sun7i-a20-olinuxino-lime.dts index dcd0f7a0dffa..2ce1a9f13a17 100644 --- a/src/arm/sun7i-a20-olinuxino-lime.dts +++ b/src/arm/sun7i-a20-olinuxino-lime.dts @@ -130,7 +130,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-olinuxino-lime2.dts b/src/arm/sun7i-a20-olinuxino-lime2.dts index e7d45425758c..097bd755764c 100644 --- a/src/arm/sun7i-a20-olinuxino-lime2.dts +++ b/src/arm/sun7i-a20-olinuxino-lime2.dts @@ -131,7 +131,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-olinuxino-micro.dts b/src/arm/sun7i-a20-olinuxino-micro.dts index def0ad8395bb..0b7403e4d687 100644 --- a/src/arm/sun7i-a20-olinuxino-micro.dts +++ b/src/arm/sun7i-a20-olinuxino-micro.dts @@ -198,7 +198,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-pcduino3-nano.dts b/src/arm/sun7i-a20-pcduino3-nano.dts index f47a5c46bc20..39bc73db72e5 100644 --- a/src/arm/sun7i-a20-pcduino3-nano.dts +++ b/src/arm/sun7i-a20-pcduino3-nano.dts @@ -130,7 +130,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-pcduino3.dts b/src/arm/sun7i-a20-pcduino3.dts index 7c96b53b76bf..777152a3df0f 100644 --- a/src/arm/sun7i-a20-pcduino3.dts +++ b/src/arm/sun7i-a20-pcduino3.dts @@ -106,10 +106,6 @@ status = "okay"; }; -&ahci_pwr_pin_a { - pins = "PH2"; -}; - &codec { status = "okay"; }; @@ -160,7 +156,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-wexler-tab7200.dts b/src/arm/sun7i-a20-wexler-tab7200.dts index e19f17177755..f8d0aafb9f88 100644 --- a/src/arm/sun7i-a20-wexler-tab7200.dts +++ b/src/arm/sun7i-a20-wexler-tab7200.dts @@ -151,7 +151,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ diff --git a/src/arm/sun7i-a20-wits-pro-a20-dkt.dts b/src/arm/sun7i-a20-wits-pro-a20-dkt.dts index c3078d4f1093..7f8405a0dd0f 100644 --- a/src/arm/sun7i-a20-wits-pro-a20-dkt.dts +++ b/src/arm/sun7i-a20-wits-pro-a20-dkt.dts @@ -120,7 +120,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + pinctrl-0 = <&mmc0_pins_a>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ @@ -137,7 +137,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; diff --git a/src/arm/sun7i-a20.dtsi b/src/arm/sun7i-a20.dtsi index 93aa55970bd7..96bee776e145 100644 --- a/src/arm/sun7i-a20.dtsi +++ b/src/arm/sun7i-a20.dtsi @@ -1019,7 +1019,8 @@ }; crypto: crypto-engine@01c15000 { - compatible = "allwinner,sun4i-a10-crypto"; + compatible = "allwinner,sun7i-a20-crypto", + "allwinner,sun4i-a10-crypto"; reg = <0x01c15000 0x1000>; interrupts = ; clocks = <&ahb_gates 5>, <&ss_clk>; @@ -1190,12 +1191,6 @@ bias-pull-up; }; - mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { - pins = "PH1"; - function = "gpio_in"; - bias-pull-up; - }; - mmc2_pins_a: mmc2@0 { pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11"; diff --git a/src/arm/sun8i-a33-sinlinx-sina33.dts b/src/arm/sun8i-a33-sinlinx-sina33.dts index 9b620cc1d5f1..433cf2a2a9a2 100644 --- a/src/arm/sun8i-a33-sinlinx-sina33.dts +++ b/src/arm/sun8i-a33-sinlinx-sina33.dts @@ -88,13 +88,13 @@ }; &cpu0_opp_table { - opp@1104000000 { + opp-1104000000 { opp-hz = /bits/ 64 <1104000000>; opp-microvolt = <1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1320000>; clock-latency-ns = <244144>; /* 8 32k periods */ @@ -196,6 +196,10 @@ status = "okay"; }; +&battery_power_supply { + status = "okay"; +}; + ®_aldo1 { regulator-always-on; regulator-min-microvolt = <3000000>; diff --git a/src/arm/sun8i-a33.dtsi b/src/arm/sun8i-a33.dtsi index 013978259372..22660919bd08 100644 --- a/src/arm/sun8i-a33.dtsi +++ b/src/arm/sun8i-a33.dtsi @@ -50,73 +50,73 @@ compatible = "operating-points-v2"; opp-shared; - opp@120000000 { + opp-120000000 { opp-hz = /bits/ 64 <120000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@240000000 { + opp-240000000 { opp-hz = /bits/ 64 <240000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@312000000 { + opp-312000000 { opp-hz = /bits/ 64 <312000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@408000000 { + opp-408000000 { opp-hz = /bits/ 64 <408000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@480000000 { + opp-480000000 { opp-hz = /bits/ 64 <480000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@504000000 { + opp-504000000 { opp-hz = /bits/ 64 <504000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@648000000 { + opp-648000000 { opp-hz = /bits/ 64 <648000000>; opp-microvolt = <1040000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@720000000 { + opp-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1100000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@816000000 { + opp-816000000 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1100000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@912000000 { + opp-912000000 { opp-hz = /bits/ 64 <912000000>; opp-microvolt = <1200000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; - opp@1008000000 { + opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1200000>; clock-latency-ns = <244144>; /* 8 32k periods */ @@ -164,15 +164,15 @@ mali_opp_table: gpu-opp-table { compatible = "operating-points-v2"; - opp@144000000 { + opp-144000000 { opp-hz = /bits/ 64 <144000000>; }; - opp@240000000 { + opp-240000000 { opp-hz = /bits/ 64 <240000000>; }; - opp@384000000 { + opp-384000000 { opp-hz = /bits/ 64 <384000000>; }; }; diff --git a/src/arm/sun8i-a83t-allwinner-h8homlet-v2.dts b/src/arm/sun8i-a83t-allwinner-h8homlet-v2.dts index 342e1d33fa1c..aecdeeb368ed 100644 --- a/src/arm/sun8i-a83t-allwinner-h8homlet-v2.dts +++ b/src/arm/sun8i-a83t-allwinner-h8homlet-v2.dts @@ -59,6 +59,6 @@ &uart0 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_b>; + pinctrl-0 = <&uart0_pb_pins>; status = "okay"; }; diff --git a/src/arm/sun8i-a83t-cubietruck-plus.dts b/src/arm/sun8i-a83t-cubietruck-plus.dts index 88b1e0970b8d..cff33454fc24 100644 --- a/src/arm/sun8i-a83t-cubietruck-plus.dts +++ b/src/arm/sun8i-a83t-cubietruck-plus.dts @@ -45,6 +45,8 @@ /dts-v1/; #include "sun8i-a83t.dtsi" +#include + / { model = "Cubietech Cubietruck Plus"; compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t"; @@ -56,10 +58,56 @@ chosen { stdout-path = "serial0:115200n8"; }; + + leds { + compatible = "gpio-leds"; + + blue { + label = "cubietruck-plus:blue:usr"; + gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */ + }; + + orange { + label = "cubietruck-plus:orange:usr"; + gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */ + }; + + white { + label = "cubietruck-plus:white:usr"; + gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */ + }; + + green { + label = "cubietruck-plus:green:usr"; + gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */ + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; +}; + +&spdif { + status = "okay"; }; &uart0 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_b>; + pinctrl-0 = <&uart0_pb_pins>; status = "okay"; }; diff --git a/src/arm/sun8i-a83t.dtsi b/src/arm/sun8i-a83t.dtsi index 0ec143773ee9..19a8f4fcfab5 100644 --- a/src/arm/sun8i-a83t.dtsi +++ b/src/arm/sun8i-a83t.dtsi @@ -40,15 +40,24 @@ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "skeleton.dtsi" - #include +#include +#include +#include + / { interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + }; + + chosen { + }; cpus { #address-cells = <1>; @@ -121,6 +130,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; + clock-accuracy = <50000>; clock-output-names = "osc24M"; }; @@ -146,25 +156,55 @@ }; }; + memory { + reg = <0x40000000 0x80000000>; + device_type = "memory"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - pio: pinctrl@01c20800 { + syscon: syscon@1c00000 { + compatible = "allwinner,sun8i-a83t-system-controller", + "syscon"; + reg = <0x01c00000 0x1000>; + }; + + dma: dma-controller@1c02000 { + compatible = "allwinner,sun8i-a83t-dma"; + reg = <0x01c02000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMA>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; + + ccu: clock@1c20000 { + compatible = "allwinner,sun8i-a83t-ccu"; + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&osc16Md512>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; interrupts = , , ; reg = <0x01c20800 0x400>; - clocks = <&osc24M>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; #gpio-cells = <3>; - mmc0_pins_a: mmc0@0 { + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "mmc0"; @@ -172,18 +212,23 @@ bias-pull-up; }; - uart0_pins_a: uart0@0 { - pins = "PF2", "PF4"; + spdif_tx_pin: spdif-tx-pin { + pins = "PE18"; + function = "spdif"; + }; + + uart0_pb_pins: uart0-pb-pins { + pins = "PB9", "PB10"; function = "uart0"; }; - uart0_pins_b: uart0@1 { - pins = "PB9", "PB10"; + uart0_pf_pins: uart0-pf-pins { + pins = "PF2", "PF4"; function = "uart0"; }; }; - timer@01c20c00 { + timer@1c20c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x01c20c00 0xa0>; interrupts = , @@ -191,24 +236,41 @@ clocks = <&osc24M>; }; - watchdog@01c20ca0 { + watchdog@1c20ca0 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x01c20ca0 0x20>; interrupts = ; clocks = <&osc24M>; }; + spdif: spdif@1c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-a83t-spdif", + "allwinner,sun8i-h3-spdif"; + reg = <0x01c21000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; + resets = <&ccu RST_BUS_SPDIF>; + clock-names = "apb", "spdif"; + dmas = <&dma 2>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&osc24M>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; - gic: interrupt-controller@01c81000 { + gic: interrupt-controller@1c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, <0x01c82000 0x2000>, @@ -218,5 +280,28 @@ #interrupt-cells = <3>; interrupts = ; }; + + r_ccu: clock@1f01400 { + compatible = "allwinner,sun8i-a83t-r-ccu"; + reg = <0x01f01400 0x400>; + clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, + <&ccu 6>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + r_pio: pinctrl@1f02c00 { + compatible = "allwinner,sun8i-a83t-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, + <&osc16Md512>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + }; }; }; diff --git a/src/arm/sun8i-h2-plus-orangepi-zero.dts b/src/arm/sun8i-h2-plus-orangepi-zero.dts index 9e8b082c134f..b1502df7b509 100644 --- a/src/arm/sun8i-h2-plus-orangepi-zero.dts +++ b/src/arm/sun8i-h2-plus-orangepi-zero.dts @@ -56,7 +56,6 @@ aliases { serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ethernet1 = &xr819; }; @@ -143,6 +142,19 @@ status = "okay"; }; +&spi0 { + /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */ + status = "disabled"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l1606e", "winbond,w25q128"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/src/arm/sun8i-h3-bananapi-m2-plus.dts b/src/arm/sun8i-h3-bananapi-m2-plus.dts index 52acbe111cad..a337af1de322 100644 --- a/src/arm/sun8i-h3-bananapi-m2-plus.dts +++ b/src/arm/sun8i-h3-bananapi-m2-plus.dts @@ -84,6 +84,16 @@ }; }; + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; @@ -92,6 +102,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -126,7 +140,7 @@ non-removable; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; @@ -145,6 +159,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; @@ -170,6 +188,11 @@ }; }; +®_usb0_vbus { + gpio = <&pio 3 11 GPIO_ACTIVE_HIGH>; /* PD11 */ + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -182,7 +205,14 @@ status = "okay"; }; -&usbphy { - /* USB VBUS is on as long as VCC-IO is on */ +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + usb0_vbus-supply = <®_usb0_vbus>; + /* USB host VBUS is on as long as VCC-IO is on */ status = "okay"; }; diff --git a/src/arm/sun8i-h3-nanopi-m1-plus.dts b/src/arm/sun8i-h3-nanopi-m1-plus.dts new file mode 100644 index 000000000000..8ddd1b2cc097 --- /dev/null +++ b/src/arm/sun8i-h3-nanopi-m1-plus.dts @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun8i-h3-nanopi.dtsi" + +/ { + model = "FriendlyArm NanoPi M1 Plus"; + compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; diff --git a/src/arm/sun8i-h3-orangepi-2.dts b/src/arm/sun8i-h3-orangepi-2.dts index 5b6d14555b7c..8ff71b1bb45b 100644 --- a/src/arm/sun8i-h3-orangepi-2.dts +++ b/src/arm/sun8i-h3-orangepi-2.dts @@ -104,6 +104,15 @@ }; }; +&codec { + allwinner,pa-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */ + allwinner,audio-routing = + "Speaker", "LINEOUT", + "MIC1", "Mic", + "Mic", "MBIAS"; + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -195,10 +204,6 @@ status = "disabled"; }; -&usb1_vbus_pin_a { - pins = "PG13"; -}; - &usbphy { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; diff --git a/src/arm/sun8i-h3-orangepi-pc.dts b/src/arm/sun8i-h3-orangepi-pc.dts index f148111c326d..1a044b17d6c6 100644 --- a/src/arm/sun8i-h3-orangepi-pc.dts +++ b/src/arm/sun8i-h3-orangepi-pc.dts @@ -97,6 +97,10 @@ status = "okay"; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -125,6 +129,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; @@ -156,6 +164,11 @@ }; }; +®_usb0_vbus { + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -180,7 +193,14 @@ status = "disabled"; }; -&usbphy { - /* USB VBUS is always on */ +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + usb0_vbus-supply = <®_usb0_vbus>; + /* VBUS on USB host ports are always on */ status = "okay"; }; diff --git a/src/arm/sun8i-h3-orangepi-plus.dts b/src/arm/sun8i-h3-orangepi-plus.dts index 8c40ab7bfa72..828ae7a526d9 100644 --- a/src/arm/sun8i-h3-orangepi-plus.dts +++ b/src/arm/sun8i-h3-orangepi-plus.dts @@ -47,6 +47,16 @@ model = "Xunlong Orange Pi Plus / Plus 2"; compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + reg_usb3_vbus: usb3-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; diff --git a/src/arm/sun8i-h3-orangepi-plus2e.dts b/src/arm/sun8i-h3-orangepi-plus2e.dts index 5851a47a3089..97920b12a944 100644 --- a/src/arm/sun8i-h3-orangepi-plus2e.dts +++ b/src/arm/sun8i-h3-orangepi-plus2e.dts @@ -50,4 +50,14 @@ / { model = "Xunlong Orange Pi Plus 2E"; compatible = "xunlong,orangepi-plus2e", "allwinner,sun8i-h3"; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ + }; }; diff --git a/src/arm/sun8i-v3s-licheepi-zero-dock.dts b/src/arm/sun8i-v3s-licheepi-zero-dock.dts new file mode 100644 index 000000000000..d1311098ea45 --- /dev/null +++ b/src/arm/sun8i-v3s-licheepi-zero-dock.dts @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2016 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun8i-v3s-licheepi-zero.dts" + +#include + +/ { + model = "Lichee Pi Zero with Dock"; + compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero", + "allwinner,sun8i-v3s"; + + leds { + /* The LEDs use PG0~2 pins, which conflict with MMC1 */ + status = "disbaled"; + }; +}; + +&mmc1 { + broken-cd; + bus-width = <4>; + vmmc-supply = <®_vcc3v3>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; + + button@600 { + label = "Select"; + linux,code = ; + channel = <0>; + voltage = <600000>; + }; + + button@800 { + label = "Start"; + linux,code = ; + channel = <0>; + voltage = <800000>; + }; +}; diff --git a/src/arm/sun8i-v3s.dtsi b/src/arm/sun8i-v3s.dtsi index 71075969e5e6..3a06dc5b3746 100644 --- a/src/arm/sun8i-v3s.dtsi +++ b/src/arm/sun8i-v3s.dtsi @@ -41,6 +41,8 @@ */ #include +#include +#include / { #address-cells = <1>; @@ -55,10 +57,16 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; - clocks = <&ccu 14>; + clocks = <&ccu CLK_CPU>; }; }; + de: display-engine { + compatible = "allwinner,sun8i-v3s-display-engine"; + allwinner,pipelines = <&mixer0>; + status = "disabled"; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -93,18 +101,95 @@ #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-v3s-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-v3s-de2-mixer"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks 0>, + <&display_clocks 6>; + clock-names = "bus", + "mod"; + resets = <&display_clocks 0>; + assigned-clocks = <&display_clocks 6>; + assigned-clock-rates = <150000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mixer0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; + }; + }; + }; + + tcon0: lcd-controller@1c0c000 { + compatible = "allwinner,sun8i-v3s-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON0>, + <&ccu CLK_TCON0>; + clock-names = "ahb", + "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON0>; + reset-names = "lcd"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + + mmc0: mmc@01c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; - clocks = <&ccu 22>, - <&ccu 45>, - <&ccu 47>, - <&ccu 46>; + clocks = <&ccu CLK_BUS_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ccu 7>; + resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = ; status = "disabled"; @@ -115,17 +200,19 @@ mmc1: mmc@01c10000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c10000 0x1000>; - clocks = <&ccu 23>, - <&ccu 48>, - <&ccu 50>, - <&ccu 49>; + clocks = <&ccu CLK_BUS_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ccu 8>; + resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -134,15 +221,15 @@ mmc2: mmc@01c11000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c11000 0x1000>; - clocks = <&ccu 24>, - <&ccu 51>, - <&ccu 53>, - <&ccu 52>; + clocks = <&ccu CLK_BUS_MMC2>, + <&ccu CLK_MMC2>, + <&ccu CLK_MMC2_OUTPUT>, + <&ccu CLK_MMC2_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ccu 9>; + resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = ; status = "disabled"; @@ -153,8 +240,8 @@ usb_otg: usb@01c19000 { compatible = "allwinner,sun8i-h3-musb"; reg = <0x01c19000 0x0400>; - clocks = <&ccu 29>; - resets = <&ccu 17>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; interrupts = ; interrupt-names = "mc"; phys = <&usbphy 0>; @@ -169,9 +256,9 @@ <0x01c1a800 0x4>; reg-names = "phy_ctrl", "pmu0"; - clocks = <&ccu 56>; + clocks = <&ccu CLK_USB_PHY0>; clock-names = "usb0_phy"; - resets = <&ccu 0>; + resets = <&ccu RST_USB_PHY0>; reset-names = "usb0_reset"; status = "disabled"; #phy-cells = <1>; @@ -198,7 +285,7 @@ reg = <0x01c20800 0x400>; interrupts = , ; - clocks = <&ccu 37>, <&osc24M>, <&osc32k>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -222,6 +309,19 @@ drive-strength = <30>; bias-pull-up; }; + + mmc1_pins: mmc1 { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + + spi0_pins: spi0 { + pins = "PC0", "PC1", "PC2", "PC3"; + function = "spi0"; + }; }; timer@01c20c00 { @@ -238,14 +338,21 @@ interrupts = ; }; + lradc: lradc@1c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x400>; + interrupts = ; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 40>; - resets = <&ccu 49>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; @@ -255,8 +362,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 41>; - resets = <&ccu 50>; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; status = "disabled"; }; @@ -266,8 +373,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 42>; - resets = <&ccu 51>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; status = "disabled"; }; @@ -275,8 +382,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; interrupts = ; - clocks = <&ccu 38>; - resets = <&ccu 46>; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "disabled"; @@ -288,8 +395,22 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; interrupts = ; - clocks = <&ccu 39>; - resets = <&ccu 47>; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + resets = <&ccu RST_BUS_SPI0>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; diff --git a/src/arm/sunxi-common-regulators.dtsi b/src/arm/sunxi-common-regulators.dtsi index ce5c53e4452f..d8e5826fb3de 100644 --- a/src/arm/sunxi-common-regulators.dtsi +++ b/src/arm/sunxi-common-regulators.dtsi @@ -44,33 +44,9 @@ #include -&pio { - ahci_pwr_pin_a: ahci_pwr_pin@0 { - pins = "PB8"; - function = "gpio_out"; - }; - - usb0_vbus_pin_a: usb0_vbus_pin@0 { - pins = "PB9"; - function = "gpio_out"; - }; - - usb1_vbus_pin_a: usb1_vbus_pin@0 { - pins = "PH6"; - function = "gpio_out"; - }; - - usb2_vbus_pin_a: usb2_vbus_pin@0 { - pins = "PH3"; - function = "gpio_out"; - }; -}; - / { reg_ahci_5v: ahci-5v { compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&ahci_pwr_pin_a>; regulator-name = "ahci-5v"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -82,8 +58,6 @@ reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&usb0_vbus_pin_a>; regulator-name = "usb0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -94,8 +68,6 @@ reg_usb1_vbus: usb1-vbus { compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&usb1_vbus_pin_a>; regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -107,8 +79,6 @@ reg_usb2_vbus: usb2-vbus { compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&usb2_vbus_pin_a>; regulator-name = "usb2-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; diff --git a/src/arm/sunxi-h3-h5.dtsi b/src/arm/sunxi-h3-h5.dtsi index d4f600dbb7eb..11240a8313c2 100644 --- a/src/arm/sunxi-h3-h5.dtsi +++ b/src/arm/sunxi-h3-h5.dtsi @@ -41,8 +41,10 @@ */ #include +#include #include #include +#include / { interrupt-parent = <&gic>; @@ -83,6 +85,12 @@ #size-cells = <1>; ranges; + syscon: syscon@1c00000 { + compatible = "allwinner,sun8i-h3-system-controller", + "syscon"; + reg = <0x01c00000 0x1000>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; @@ -279,6 +287,14 @@ interrupt-controller; #interrupt-cells = <3>; + emac_rgmii_pins: emac0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD7", "PD8", "PD9", "PD10", + "PD12", "PD13", "PD15", "PD16", "PD17"; + function = "emac"; + drive-strength = <40>; + }; + i2c0_pins: i2c0 { pins = "PA11", "PA12"; function = "i2c0"; @@ -574,9 +590,9 @@ ir: ir@01f02000 { compatible = "allwinner,sun5i-a13-ir"; - clocks = <&r_ccu 4>, <&r_ccu 11>; + clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; clock-names = "apb", "ir"; - resets = <&r_ccu 0>; + resets = <&r_ccu RST_APB0_IR>; interrupts = ; reg = <0x01f02000 0x40>; status = "disabled"; @@ -586,7 +602,7 @@ compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = ; - clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/src/arm/tango4-vantage-1172.dts b/src/arm/tango4-vantage-1172.dts index 86d8df98802f..13bcc460bcb2 100644 --- a/src/arm/tango4-vantage-1172.dts +++ b/src/arm/tango4-vantage-1172.dts @@ -22,7 +22,7 @@ }; ð0 { - phy-connection-type = "rgmii"; + phy-connection-type = "rgmii-id"; phy-handle = <ð0_phy>; #address-cells = <1>; #size-cells = <0>; diff --git a/src/arm/tegra124-apalis-eval.dts b/src/arm/tegra124-apalis-eval.dts index 5b860ad5cbee..ecffcd115fa7 100644 --- a/src/arm/tegra124-apalis-eval.dts +++ b/src/arm/tegra124-apalis-eval.dts @@ -63,7 +63,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller@01003000 { + pcie@1003000 { pci@1,0 { status = "okay"; }; diff --git a/src/arm/tegra124-apalis.dtsi b/src/arm/tegra124-apalis.dtsi index f9e623bdd5c3..5d9b18ef5af6 100644 --- a/src/arm/tegra124-apalis.dtsi +++ b/src/arm/tegra124-apalis.dtsi @@ -54,7 +54,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05>; diff --git a/src/arm/tegra124-jetson-tk1.dts b/src/arm/tegra124-jetson-tk1.dts index 53994f9fbbcc..7bacb2954f58 100644 --- a/src/arm/tegra124-jetson-tk1.dts +++ b/src/arm/tegra124-jetson-tk1.dts @@ -27,7 +27,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05_run>; diff --git a/src/arm/tegra124.dtsi b/src/arm/tegra124.dtsi index 187a36c6d0fc..1b10b14a6abd 100644 --- a/src/arm/tegra124.dtsi +++ b/src/arm/tegra124.dtsi @@ -14,7 +14,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -54,6 +54,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -67,6 +68,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/src/arm/tegra20-harmony.dts b/src/arm/tegra20-harmony.dts index d4fb4d39ede7..41749693ec3c 100644 --- a/src/arm/tegra20-harmony.dts +++ b/src/arm/tegra20-harmony.dts @@ -566,7 +566,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/src/arm/tegra20-tamonten.dtsi b/src/arm/tegra20-tamonten.dtsi index 27d2bbbf1eae..7361f4a82e80 100644 --- a/src/arm/tegra20-tamonten.dtsi +++ b/src/arm/tegra20-tamonten.dtsi @@ -478,7 +478,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { avdd-pex-supply = <&pci_vdd_reg>; vdd-pex-supply = <&pci_vdd_reg>; avdd-pex-pll-supply = <&pci_vdd_reg>; diff --git a/src/arm/tegra20-tec.dts b/src/arm/tegra20-tec.dts index c12d8bead2ee..9cb534f4441e 100644 --- a/src/arm/tegra20-tec.dts +++ b/src/arm/tegra20-tec.dts @@ -32,7 +32,7 @@ }; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; pci@1,0 { diff --git a/src/arm/tegra20-trimslice.dts b/src/arm/tegra20-trimslice.dts index 87b07fbadbbe..b902ab594afa 100644 --- a/src/arm/tegra20-trimslice.dts +++ b/src/arm/tegra20-trimslice.dts @@ -321,7 +321,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/src/arm/tegra20-whistler.dts b/src/arm/tegra20-whistler.dts deleted file mode 100644 index 1e06f854c8b4..000000000000 --- a/src/arm/tegra20-whistler.dts +++ /dev/null @@ -1,636 +0,0 @@ -/dts-v1/; - -#include -#include "tegra20.dtsi" - -/ { - model = "NVIDIA Tegra20 Whistler evaluation board"; - compatible = "nvidia,whistler", "nvidia,tegra20"; - - aliases { - rtc0 = "/i2c@7000d000/max8907@3c"; - rtc1 = "/rtc@7000e000"; - serial0 = &uarta; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - reg = <0x00000000 0x20000000>; - }; - - host1x@50000000 { - hdmi@54280000 { - status = "okay"; - - vdd-supply = <&hdmi_vdd_reg>; - pll-supply = <&hdmi_pll_reg>; - - nvidia,ddc-i2c-bus = <&hdmi_ddc>; - nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) - GPIO_ACTIVE_HIGH>; - }; - }; - - pinmux@70000014 { - pinctrl-names = "default"; - pinctrl-0 = <&state_default>; - - state_default: pinmux { - ata { - nvidia,pins = "ata", "atb", "ate", "gma", "gmb", - "gmc", "gmd", "gpu"; - nvidia,function = "gmi"; - }; - atc { - nvidia,pins = "atc", "atd"; - nvidia,function = "sdio4"; - }; - cdev1 { - nvidia,pins = "cdev1"; - nvidia,function = "plla_out"; - }; - cdev2 { - nvidia,pins = "cdev2"; - nvidia,function = "osc"; - }; - crtp { - nvidia,pins = "crtp"; - nvidia,function = "crt"; - }; - csus { - nvidia,pins = "csus"; - nvidia,function = "vi_sensor_clk"; - }; - dap1 { - nvidia,pins = "dap1"; - nvidia,function = "dap1"; - }; - dap2 { - nvidia,pins = "dap2"; - nvidia,function = "dap2"; - }; - dap3 { - nvidia,pins = "dap3"; - nvidia,function = "dap3"; - }; - dap4 { - nvidia,pins = "dap4"; - nvidia,function = "dap4"; - }; - ddc { - nvidia,pins = "ddc"; - nvidia,function = "i2c2"; - }; - dta { - nvidia,pins = "dta", "dtb", "dtc", "dtd"; - nvidia,function = "vi"; - }; - dte { - nvidia,pins = "dte"; - nvidia,function = "rsvd1"; - }; - dtf { - nvidia,pins = "dtf"; - nvidia,function = "i2c3"; - }; - gme { - nvidia,pins = "gme"; - nvidia,function = "dap5"; - }; - gpu7 { - nvidia,pins = "gpu7"; - nvidia,function = "rtck"; - }; - gpv { - nvidia,pins = "gpv"; - nvidia,function = "pcie"; - }; - hdint { - nvidia,pins = "hdint", "pta"; - nvidia,function = "hdmi"; - }; - i2cp { - nvidia,pins = "i2cp"; - nvidia,function = "i2cp"; - }; - irrx { - nvidia,pins = "irrx", "irtx"; - nvidia,function = "uartb"; - }; - kbca { - nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; - nvidia,function = "kbc"; - }; - kbcb { - nvidia,pins = "kbcb", "kbcd"; - nvidia,function = "sdio2"; - }; - lcsn { - nvidia,pins = "lcsn", "lsck", "lsda", "lsdi", - "spia", "spib", "spic"; - nvidia,function = "spi3"; - }; - ld0 { - nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", - "ld5", "ld6", "ld7", "ld8", "ld9", - "ld10", "ld11", "ld12", "ld13", "ld14", - "ld15", "ld16", "ld17", "ldc", "ldi", - "lhp0", "lhp1", "lhp2", "lhs", "lm0", - "lm1", "lpp", "lpw0", "lpw1", "lpw2", - "lsc0", "lsc1", "lspi", "lvp0", "lvp1", - "lvs"; - nvidia,function = "displaya"; - }; - owc { - nvidia,pins = "owc", "uac"; - nvidia,function = "owr"; - }; - pmc { - nvidia,pins = "pmc"; - nvidia,function = "pwr_on"; - }; - rm { - nvidia,pins = "rm"; - nvidia,function = "i2c1"; - }; - sdb { - nvidia,pins = "sdb", "sdc", "sdd", "slxa", - "slxc", "slxd", "slxk"; - nvidia,function = "sdio3"; - }; - sdio1 { - nvidia,pins = "sdio1"; - nvidia,function = "sdio1"; - }; - spdi { - nvidia,pins = "spdi", "spdo"; - nvidia,function = "rsvd2"; - }; - spid { - nvidia,pins = "spid", "spie", "spig", "spih"; - nvidia,function = "spi2_alt"; - }; - spif { - nvidia,pins = "spif"; - nvidia,function = "spi2"; - }; - uaa { - nvidia,pins = "uaa", "uab"; - nvidia,function = "uarta"; - }; - uad { - nvidia,pins = "uad"; - nvidia,function = "irda"; - }; - uca { - nvidia,pins = "uca", "ucb"; - nvidia,function = "uartc"; - }; - uda { - nvidia,pins = "uda"; - nvidia,function = "spi1"; - }; - conf_ata { - nvidia,pins = "ata", "atb", "atc", "ddc", "gma", - "gmb", "gmc", "gmd", "irrx", "irtx", - "kbca", "kbcb", "kbcc", "kbcd", "kbce", - "kbcf", "sdc", "sdd", "spie", "spig", - "spih", "uaa", "uab", "uad", "uca", - "ucb"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_atd { - nvidia,pins = "atd", "ate", "cdev1", "csus", - "dap1", "dap2", "dap3", "dap4", "dte", - "dtf", "gpu", "gpu7", "gpv", "i2cp", - "rm", "sdio1", "slxa", "slxc", "slxd", - "slxk", "spdi", "spdo", "uac", "uda"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_cdev2 { - nvidia,pins = "cdev2", "spia", "spib"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_ck32 { - nvidia,pins = "ck32", "ddrc", "lc", "pmca", - "pmcb", "pmcc", "pmcd", "xm2c", - "xm2d"; - nvidia,pull = ; - }; - conf_crtp { - nvidia,pins = "crtp"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_dta { - nvidia,pins = "dta", "dtb", "dtc", "dtd", - "spid", "spif"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_gme { - nvidia,pins = "gme", "owc", "pta", "spic"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_ld17_0 { - nvidia,pins = "ld17_0", "ld19_18", "ld21_20", - "ld23_22"; - nvidia,pull = ; - }; - conf_ls { - nvidia,pins = "ls", "pmce"; - nvidia,pull = ; - }; - drive_dap1 { - nvidia,pins = "drive_dap1"; - nvidia,high-speed-mode = ; - nvidia,schmitt = ; - nvidia,low-power-mode = ; - nvidia,pull-down-strength = <0>; - nvidia,pull-up-strength = <0>; - nvidia,slew-rate-rising = ; - nvidia,slew-rate-falling = ; - }; - }; - }; - - i2s@70002800 { - status = "okay"; - }; - - serial@70006000 { - status = "okay"; - }; - - hdmi_ddc: i2c@7000c400 { - status = "okay"; - clock-frequency = <100000>; - }; - - i2c@7000d000 { - status = "okay"; - clock-frequency = <100000>; - - codec: codec@1a { - compatible = "wlf,wm8753"; - reg = <0x1a>; - }; - - tca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - - max8907@3c { - compatible = "maxim,max8907"; - reg = <0x3c>; - interrupts = ; - - maxim,system-power-controller; - - mbatt-supply = <&usb0_vbus_reg>; - in-v1-supply = <&mbatt_reg>; - in-v2-supply = <&mbatt_reg>; - in-v3-supply = <&mbatt_reg>; - in1-supply = <&mbatt_reg>; - in2-supply = <&nvvdd_sv3_reg>; - in3-supply = <&mbatt_reg>; - in4-supply = <&mbatt_reg>; - in5-supply = <&mbatt_reg>; - in6-supply = <&mbatt_reg>; - in7-supply = <&mbatt_reg>; - in8-supply = <&mbatt_reg>; - in9-supply = <&mbatt_reg>; - in10-supply = <&mbatt_reg>; - in11-supply = <&mbatt_reg>; - in12-supply = <&mbatt_reg>; - in13-supply = <&mbatt_reg>; - in14-supply = <&mbatt_reg>; - in15-supply = <&mbatt_reg>; - in16-supply = <&mbatt_reg>; - in17-supply = <&nvvdd_sv3_reg>; - in18-supply = <&nvvdd_sv3_reg>; - in19-supply = <&mbatt_reg>; - in20-supply = <&mbatt_reg>; - - regulators { - mbatt_reg: mbatt { - regulator-name = "vbat_pmu"; - regulator-always-on; - }; - - sd1 { - regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - sd2 { - regulator-name = "nvvdd_sv2,vdd_core"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - nvvdd_sv3_reg: sd3 { - regulator-name = "nvvdd_sv3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo1 { - regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - ldo2 { - regulator-name = "nvvdd_ldo2,avdd_pll*"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - ldo3 { - regulator-name = "nvvdd_ldo3,vcom_1v8b"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo4 { - regulator-name = "nvvdd_ldo4,avdd_usb*"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - ldo5 { - regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - hdmi_pll_reg: ldo6 { - regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo7 { - regulator-name = "nvvdd_ldo7,avddio_audio"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - ldo8 { - regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - ldo9 { - regulator-name = "nvvdd_ldo9,avdd_cam*"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo10 { - regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - hdmi_vdd_reg: ldo11 { - regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - ldo12 { - regulator-name = "nvvdd_ldo12,vddio_sdio"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - ldo13 { - regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo14 { - regulator-name = "nvvdd_ldo14,avdd_vdac"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo15 { - regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - ldo16 { - regulator-name = "nvvdd_ldo16,vdd_dbrtr"; - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - }; - - ldo17 { - regulator-name = "nvvdd_ldo17,vddio_mipi"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - ldo18 { - regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19 { - regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo20 { - regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - out5v { - regulator-name = "usb0_vbus_reg"; - }; - - out33v { - regulator-name = "pmu_out3v3"; - }; - - bbat { - regulator-name = "pmu_bbat"; - regulator-min-microvolt = <2400000>; - regulator-max-microvolt = <2400000>; - regulator-always-on; - }; - - sdby { - regulator-name = "vdd_aon"; - regulator-always-on; - }; - - vrtc { - regulator-name = "vrtc,pmu_vccadc"; - regulator-always-on; - }; - }; - }; - }; - - kbc@7000e200 { - status = "okay"; - nvidia,debounce-delay-ms = <20>; - nvidia,repeat-delay-ms = <160>; - nvidia,kbc-row-pins = <0 1 2>; - nvidia,kbc-col-pins = <16 17>; - wakeup-source; - linux,keymap = ; - }; - - pmc@7000e400 { - nvidia,invert-interrupt; - nvidia,suspend-mode = <1>; - nvidia,cpu-pwr-good-time = <2000>; - nvidia,cpu-pwr-off-time = <1000>; - nvidia,core-pwr-good-time = <0 3845>; - nvidia,core-pwr-off-time = <93727>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - nvidia,combined-power-req; - }; - - usb@c5000000 { - status = "okay"; - }; - - usb-phy@c5000000 { - status = "okay"; - vbus-supply = <&vbus1_reg>; - }; - - usb@c5008000 { - status = "okay"; - }; - - usb-phy@c5008000 { - status = "okay"; - vbus-supply = <&vbus3_reg>; - }; - - sdhci@c8000400 { - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>; - bus-width = <8>; - }; - - sdhci@c8000600 { - status = "okay"; - bus-width = <8>; - non-removable; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usb0_vbus_reg: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - vbus1_reg: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "vbus1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&tca6416 0 0>; /* GPIO_PMU0 */ - regulator-always-on; - regulator-boot-on; - }; - - vbus3_reg: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "vbus3"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&tca6416 1 0>; /* GPIO_PMU1 */ - regulator-always-on; - regulator-boot-on; - }; - }; - - sound { - compatible = "nvidia,tegra-audio-wm8753-whistler", - "nvidia,tegra-audio-wm8753"; - nvidia,model = "NVIDIA Tegra Whistler"; - - nvidia,audio-routing = - "Headphone Jack", "LOUT1", - "Headphone Jack", "ROUT1", - "MIC2", "Mic Jack", - "MIC2N", "Mic Jack"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&codec>; - - clocks = <&tegra_car TEGRA20_CLK_PLL_A>, - <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA20_CLK_CDEV1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; - }; -}; diff --git a/src/arm/tegra20.dtsi b/src/arm/tegra20.dtsi index e8807503f87c..7c85f97f72ea 100644 --- a/src/arm/tegra20.dtsi +++ b/src/arm/tegra20.dtsi @@ -586,7 +586,7 @@ reset-names = "fuse"; }; - pcie-controller@80003000 { + pcie@80003000 { compatible = "nvidia,tegra20-pcie"; device_type = "pci"; reg = <0x80003000 0x00000800 /* PADS registers */ @@ -625,6 +625,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -638,6 +639,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/src/arm/tegra30-apalis-eval.dts b/src/arm/tegra30-apalis-eval.dts index 99a69457dbf5..fc530e4a96c4 100644 --- a/src/arm/tegra30-apalis-eval.dts +++ b/src/arm/tegra30-apalis-eval.dts @@ -21,7 +21,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; pci@1,0 { diff --git a/src/arm/tegra30-apalis.dtsi b/src/arm/tegra30-apalis.dtsi index f6c7c3e958ac..7a6a1a014603 100644 --- a/src/arm/tegra30-apalis.dtsi +++ b/src/arm/tegra30-apalis.dtsi @@ -9,7 +9,7 @@ model = "Toradex Apalis T30"; compatible = "toradex,apalis_t30", "nvidia,tegra30"; - pcie-controller@00003000 { + pcie@3000 { avdd-pexa-supply = <&vdd2_reg>; vdd-pexa-supply = <&vdd2_reg>; avdd-pexb-supply = <&vdd2_reg>; diff --git a/src/arm/tegra30-beaver.dts b/src/arm/tegra30-beaver.dts index 0350002849d5..4f41b18d9547 100644 --- a/src/arm/tegra30-beaver.dts +++ b/src/arm/tegra30-beaver.dts @@ -20,7 +20,7 @@ reg = <0x80000000 0x7ff00000>; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; avdd-pexa-supply = <&ldo1_reg>; diff --git a/src/arm/tegra30-cardhu.dtsi b/src/arm/tegra30-cardhu.dtsi index f11012bb58cc..83dc14a9b353 100644 --- a/src/arm/tegra30-cardhu.dtsi +++ b/src/arm/tegra30-cardhu.dtsi @@ -43,7 +43,7 @@ reg = <0x80000000 0x40000000>; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ diff --git a/src/arm/tegra30.dtsi b/src/arm/tegra30.dtsi index bbb1c002e7f1..13960fda7471 100644 --- a/src/arm/tegra30.dtsi +++ b/src/arm/tegra30.dtsi @@ -10,7 +10,7 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&lic>; - pcie-controller@00003000 { + pcie@3000 { compatible = "nvidia,tegra30-pcie"; device_type = "pci"; reg = <0x00003000 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -77,6 +79,7 @@ device_type = "pci"; assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>; reg = <0x001800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/src/arm/tny_a9260_common.dtsi b/src/arm/tny_a9260_common.dtsi index f9dc463b9e48..5d83df4675a1 100644 --- a/src/arm/tny_a9260_common.dtsi +++ b/src/arm/tny_a9260_common.dtsi @@ -32,50 +32,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; }; diff --git a/src/arm/tny_a9263.dts b/src/arm/tny_a9263.dts index 9161cd9889b4..8cf0a9e08571 100644 --- a/src/arm/tny_a9263.dts +++ b/src/arm/tny_a9263.dts @@ -42,50 +42,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi0: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; }; diff --git a/src/arm/twl4030.dtsi b/src/arm/twl4030.dtsi index 36ae9160b558..16533b62b0a2 100644 --- a/src/arm/twl4030.dtsi +++ b/src/arm/twl4030.dtsi @@ -23,6 +23,8 @@ compatible = "ti,twl4030-bci"; interrupts = <9>, <2>; bci3v1-supply = <&vusb3v1>; + io-channels = <&twl_madc 11>; + io-channel-names = "vac"; }; watchdog { diff --git a/src/arm/uniphier-ld4-ref.dts b/src/arm/uniphier-ld4-ref.dts index e0da4ee21c21..4817ebb28eb2 100644 --- a/src/arm/uniphier-ld4-ref.dts +++ b/src/arm/uniphier-ld4-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-ld4.dtsi b/src/arm/uniphier-ld4.dtsi index 4f5fe15eaee2..fb2fd9605b9d 100644 --- a/src/arm/uniphier-ld4.dtsi +++ b/src/arm/uniphier-ld4.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ / { @@ -201,7 +165,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-ld6b-ref.dts b/src/arm/uniphier-ld6b-ref.dts index a397a8811c78..96db4abc02c3 100644 --- a/src/arm/uniphier-ld6b-ref.dts +++ b/src/arm/uniphier-ld6b-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-ld6b.dtsi b/src/arm/uniphier-ld6b.dtsi index 905c77d499eb..8b9a79731bd3 100644 --- a/src/arm/uniphier-ld6b.dtsi +++ b/src/arm/uniphier-ld6b.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /* diff --git a/src/arm/uniphier-pro4-ace.dts b/src/arm/uniphier-pro4-ace.dts index fefc89149234..11690b57931c 100644 --- a/src/arm/uniphier-pro4-ace.dts +++ b/src/arm/uniphier-pro4-ace.dts @@ -4,43 +4,7 @@ * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; @@ -88,7 +52,7 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; }; diff --git a/src/arm/uniphier-pro4-ref.dts b/src/arm/uniphier-pro4-ref.dts index 6077e634d14a..4cf539245f2e 100644 --- a/src/arm/uniphier-pro4-ref.dts +++ b/src/arm/uniphier-pro4-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-pro4-sanji.dts b/src/arm/uniphier-pro4-sanji.dts index 6c63c8bad825..2763cebcd76a 100644 --- a/src/arm/uniphier-pro4-sanji.dts +++ b/src/arm/uniphier-pro4-sanji.dts @@ -4,43 +4,7 @@ * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; @@ -83,7 +47,7 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; }; diff --git a/src/arm/uniphier-pro4.dtsi b/src/arm/uniphier-pro4.dtsi index 794a85a7068b..37400becf4ba 100644 --- a/src/arm/uniphier-pro4.dtsi +++ b/src/arm/uniphier-pro4.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ / { @@ -233,7 +197,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-pro5.dtsi b/src/arm/uniphier-pro5.dtsi index df07b555cbed..9577769a0add 100644 --- a/src/arm/uniphier-pro5.dtsi +++ b/src/arm/uniphier-pro5.dtsi @@ -77,67 +77,67 @@ compatible = "operating-points-v2"; opp-shared; - opp@100000000 { + opp-100000000 { opp-hz = /bits/ 64 <100000000>; clock-latency-ns = <300>; }; - opp@116667000 { + opp-116667000 { opp-hz = /bits/ 64 <116667000>; clock-latency-ns = <300>; }; - opp@150000000 { + opp-150000000 { opp-hz = /bits/ 64 <150000000>; clock-latency-ns = <300>; }; - opp@175000000 { + opp-175000000 { opp-hz = /bits/ 64 <175000000>; clock-latency-ns = <300>; }; - opp@200000000 { + opp-200000000 { opp-hz = /bits/ 64 <200000000>; clock-latency-ns = <300>; }; - opp@233334000 { + opp-233334000 { opp-hz = /bits/ 64 <233334000>; clock-latency-ns = <300>; }; - opp@300000000 { + opp-300000000 { opp-hz = /bits/ 64 <300000000>; clock-latency-ns = <300>; }; - opp@350000000 { + opp-350000000 { opp-hz = /bits/ 64 <350000000>; clock-latency-ns = <300>; }; - opp@400000000 { + opp-400000000 { opp-hz = /bits/ 64 <400000000>; clock-latency-ns = <300>; }; - opp@466667000 { + opp-466667000 { opp-hz = /bits/ 64 <466667000>; clock-latency-ns = <300>; }; - opp@600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; clock-latency-ns = <300>; }; - opp@700000000 { + opp-700000000 { opp-hz = /bits/ 64 <700000000>; clock-latency-ns = <300>; }; - opp@800000000 { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; clock-latency-ns = <300>; }; - opp@933334000 { + opp-933334000 { opp-hz = /bits/ 64 <933334000>; clock-latency-ns = <300>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; clock-latency-ns = <300>; }; - opp@1400000000 { + opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; clock-latency-ns = <300>; }; @@ -320,7 +320,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-pxs2-gentil.dts b/src/arm/uniphier-pxs2-gentil.dts index cccc86658d20..81560f75bfa7 100644 --- a/src/arm/uniphier-pxs2-gentil.dts +++ b/src/arm/uniphier-pxs2-gentil.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; @@ -80,7 +44,7 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; }; diff --git a/src/arm/uniphier-pxs2-vodka.dts b/src/arm/uniphier-pxs2-vodka.dts index 803a39aa39d0..dc2d0579c666 100644 --- a/src/arm/uniphier-pxs2-vodka.dts +++ b/src/arm/uniphier-pxs2-vodka.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-pxs2.dtsi b/src/arm/uniphier-pxs2.dtsi index 58c3e2f35706..bace751d4023 100644 --- a/src/arm/uniphier-pxs2.dtsi +++ b/src/arm/uniphier-pxs2.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ / { @@ -97,35 +61,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@100000000 { + opp-100000000 { opp-hz = /bits/ 64 <100000000>; clock-latency-ns = <300>; }; - opp@150000000 { + opp-150000000 { opp-hz = /bits/ 64 <150000000>; clock-latency-ns = <300>; }; - opp@200000000 { + opp-200000000 { opp-hz = /bits/ 64 <200000000>; clock-latency-ns = <300>; }; - opp@300000000 { + opp-300000000 { opp-hz = /bits/ 64 <300000000>; clock-latency-ns = <300>; }; - opp@400000000 { + opp-400000000 { opp-hz = /bits/ 64 <400000000>; clock-latency-ns = <300>; }; - opp@600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; clock-latency-ns = <300>; }; - opp@800000000 { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; clock-latency-ns = <300>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; clock-latency-ns = <300>; }; @@ -304,7 +268,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-ref-daughter.dtsi b/src/arm/uniphier-ref-daughter.dtsi index c62ae1a81f47..7a1c29b558d5 100644 --- a/src/arm/uniphier-ref-daughter.dtsi +++ b/src/arm/uniphier-ref-daughter.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2017 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ &i2c0 { diff --git a/src/arm/uniphier-sld3-ref.dts b/src/arm/uniphier-sld3-ref.dts index eb63dcca92b5..70cda39a3dd2 100644 --- a/src/arm/uniphier-sld3-ref.dts +++ b/src/arm/uniphier-sld3-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-sld3.dtsi b/src/arm/uniphier-sld3.dtsi index 01d77edac01f..408287936613 100644 --- a/src/arm/uniphier-sld3.dtsi +++ b/src/arm/uniphier-sld3.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ / { @@ -216,7 +180,7 @@ #size-cells = <1>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-sld8-ref.dts b/src/arm/uniphier-sld8-ref.dts index 737d276349fd..4536d5b71297 100644 --- a/src/arm/uniphier-sld8-ref.dts +++ b/src/arm/uniphier-sld8-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm/uniphier-sld8.dtsi b/src/arm/uniphier-sld8.dtsi index eb06fdc04b02..9fb9167f2db4 100644 --- a/src/arm/uniphier-sld8.dtsi +++ b/src/arm/uniphier-sld8.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ / { @@ -201,7 +165,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; diff --git a/src/arm/uniphier-support-card.dtsi b/src/arm/uniphier-support-card.dtsi index f61dfec2807f..6c825f192e65 100644 --- a/src/arm/uniphier-support-card.dtsi +++ b/src/arm/uniphier-support-card.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2017 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ &system_bus { @@ -53,14 +17,14 @@ #size-cells = <1>; ranges = <0x00000000 1 0x01f00000 0x00100000>; - ethsc: ethernet@00000000 { + ethsc: ethernet@0 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <0x00000000 0x1000>; phy-mode = "mii"; reg-io-width = <4>; }; - serialsc: uart@000b0000 { + serialsc: uart@b0000 { compatible = "ns16550a"; reg = <0x000b0000 0x20>; clock-frequency = <12288000>; diff --git a/src/arm/usb_a9260_common.dtsi b/src/arm/usb_a9260_common.dtsi index 7514b347cdd2..34a49995eda3 100644 --- a/src/arm/usb_a9260_common.dtsi +++ b/src/arm/usb_a9260_common.dtsi @@ -34,50 +34,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; diff --git a/src/arm/usb_a9263.dts b/src/arm/usb_a9263.dts index bfc48a272417..482381c1c962 100644 --- a/src/arm/usb_a9263.dts +++ b/src/arm/usb_a9263.dts @@ -62,50 +62,69 @@ }; }; - nand0: nand@40000000 { - nand-bus-width = <8>; - nand-ecc-mode = "soft"; - nand-on-flash-bbt; + ebi0: ebi@10000000 { status = "okay"; - at91bootstrap@0 { - label = "at91bootstrap"; - reg = <0x0 0x20000>; - }; + nand_controller: nand-controller { + status = "okay"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + pinctrl-names = "default"; - barebox@20000 { - label = "barebox"; - reg = <0x20000 0x40000>; - }; + nand@3 { + reg = <0x3 0x0 0x800000>; + rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; + cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + label = "atmel_nand"; - bareboxenv@60000 { - label = "bareboxenv"; - reg = <0x60000 0x20000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - bareboxenv2@80000 { - label = "bareboxenv2"; - reg = <0x80000 0x20000>; - }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; - oftree@80000 { - label = "oftree"; - reg = <0xa0000 0x20000>; - }; + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; - kernel@a0000 { - label = "kernel"; - reg = <0xc0000 0x400000>; - }; + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; - rootfs@4a0000 { - label = "rootfs"; - reg = <0x4c0000 0x7800000>; - }; + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; - data@7ca0000 { - label = "data"; - reg = <0x7cc0000 0x8340000>; + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; + }; + }; }; }; diff --git a/src/arm/vf610-zii-dev-rev-b.dts b/src/arm/vf610-zii-dev-rev-b.dts index 37f95427616f..acdf12ad0622 100644 --- a/src/arm/vf610-zii-dev-rev-b.dts +++ b/src/arm/vf610-zii-dev-rev-b.dts @@ -78,6 +78,7 @@ interrupts = <27 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <2>; + eeprom-length = <512>; ports { #address-cells = <1>; @@ -163,6 +164,7 @@ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <2>; + eeprom-length = <512>; ports { #address-cells = <1>; diff --git a/src/arm64/actions/s900-bubblegum-96.dts b/src/arm64/actions/s900-bubblegum-96.dts new file mode 100644 index 000000000000..a0c3484dbd12 --- /dev/null +++ b/src/arm64/actions/s900-bubblegum-96.dts @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "s900.dtsi" + +/ { + compatible = "ucrobotics,bubblegum-96", "actions,s900"; + model = "Bubblegum-96"; + + aliases { + serial5 = &uart5; + }; + + chosen { + stdout-path = "serial5:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&timer { + clocks = <&hosc>; +}; + +&uart5 { + status = "okay"; +}; diff --git a/src/arm64/actions/s900.dtsi b/src/arm64/actions/s900.dtsi new file mode 100644 index 000000000000..11406f6d3a6d --- /dev/null +++ b/src/arm64/actions/s900.dtsi @@ -0,0 +1,164 @@ +/* + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include + +/ { + compatible = "actions,s900"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secmon@1f000000 { + reg = <0x0 0x1f000000 0x0 0x1000000>; + no-map; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + hosc: hosc { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@e00f1000 { + compatible = "arm,gic-400"; + reg = <0x0 0xe00f1000 0x0 0x1000>, + <0x0 0xe00f2000 0x0 0x2000>, + <0x0 0xe00f4000 0x0 0x2000>, + <0x0 0xe00f6000 0x0 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + + uart0: serial@e0120000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0120000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart1: serial@e0122000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0122000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart2: serial@e0124000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0124000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart3: serial@e0126000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0126000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart4: serial@e0128000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0128000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart5: serial@e012a000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe012a000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart6: serial@e012c000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe012c000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + timer: timer@e0228000 { + compatible = "actions,s900-timer"; + reg = <0x0 0xe0228000 0x0 0x8000>; + interrupts = ; + interrupt-names = "timer1"; + }; + }; +}; diff --git a/src/arm64/allwinner/sun50i-a64-orangepi-win.dts b/src/arm64/allwinner/sun50i-a64-orangepi-win.dts new file mode 100644 index 000000000000..5f8ff4017d45 --- /dev/null +++ b/src/arm64/allwinner/sun50i-a64-orangepi-win.dts @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include + +/ { + model = "OrangePi Win/Win Plus"; + compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + diff --git a/src/arm64/allwinner/sun50i-a64-pine64-plus.dts b/src/arm64/allwinner/sun50i-a64-pine64-plus.dts index 790d14daaa6a..f82ccf332c0f 100644 --- a/src/arm64/allwinner/sun50i-a64-pine64-plus.dts +++ b/src/arm64/allwinner/sun50i-a64-pine64-plus.dts @@ -46,5 +46,5 @@ model = "Pine64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ + /* TODO: Camera, touchscreen, etc. */ }; diff --git a/src/arm64/allwinner/sun50i-a64-pine64.dts b/src/arm64/allwinner/sun50i-a64-pine64.dts index c680ed385da3..7c533b6d4ba9 100644 --- a/src/arm64/allwinner/sun50i-a64-pine64.dts +++ b/src/arm64/allwinner/sun50i-a64-pine64.dts @@ -52,6 +52,10 @@ aliases { serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; }; chosen { @@ -66,6 +70,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -91,16 +99,49 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; +/* On Exp and Euler connectors */ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; +/* On Wifi/BT connector, with RTS/CTS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "disabled"; +}; + +/* On Pi-2 connector */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "disabled"; +}; + +/* On Euler connector */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "disabled"; +}; + +/* On Euler connector, RTS/CTS optional */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + status = "disabled"; +}; + &usb_otg { dr_mode = "host"; status = "okay"; diff --git a/src/arm64/allwinner/sun50i-a64-sopine-baseboard.dts b/src/arm64/allwinner/sun50i-a64-sopine-baseboard.dts new file mode 100644 index 000000000000..d891a1a27f6c --- /dev/null +++ b/src/arm64/allwinner/sun50i-a64-sopine-baseboard.dts @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2017 Icenowy Zheng + * + * Based on sun50i-a64-pine64.dts, which is: + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64-sopine.dtsi" + +/ { + model = "SoPine with baseboard"; + compatible = "pine64,sopine-baseboard", "pine64,sopine", + "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc1v8: vcc1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc1v8>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/src/arm64/allwinner/sun50i-a64-sopine.dtsi b/src/arm64/allwinner/sun50i-a64-sopine.dtsi new file mode 100644 index 000000000000..475518b031dd --- /dev/null +++ b/src/arm64/allwinner/sun50i-a64-sopine.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2017 Icenowy Zheng + * + * Based on sun50i-a64-pine64.dts, which is: + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun50i-a64.dtsi" + +/ { + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + non-removable; + disable-wp; + bus-width = <4>; + status = "okay"; +}; diff --git a/src/arm64/allwinner/sun50i-a64.dtsi b/src/arm64/allwinner/sun50i-a64.dtsi index 166c9ef884dc..68aadc9b96dc 100644 --- a/src/arm64/allwinner/sun50i-a64.dtsi +++ b/src/arm64/allwinner/sun50i-a64.dtsi @@ -43,6 +43,7 @@ */ #include +#include #include #include @@ -129,6 +130,12 @@ #size-cells = <1>; ranges; + syscon: syscon@1c00000 { + compatible = "allwinner,sun50i-a64-system-controller", + "syscon"; + reg = <0x01c00000 0x1000>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; @@ -204,6 +211,28 @@ #phy-cells = <1>; }; + ehci0: usb@01c1a000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; @@ -281,6 +310,21 @@ bias-pull-up; }; + rmii_pins: rmii_pins { + pins = "PD10", "PD11", "PD13", "PD14", "PD17", + "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + + rgmii_pins: rgmii_pins { + pins = "PD8", "PD9", "PD10", "PD11", "PD12", + "PD13", "PD15", "PD16", "PD17", "PD18", + "PD19", "PD20", "PD21", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; @@ -295,6 +339,26 @@ pins = "PG8", "PG9"; function = "uart1"; }; + + uart2_pins: uart2-pins { + pins = "PB0", "PB1"; + function = "uart2"; + }; + + uart3_pins: uart3-pins { + pins = "PD0", "PD1"; + function = "uart3"; + }; + + uart4_pins: uart4-pins { + pins = "PD2", "PD3"; + function = "uart4"; + }; + + uart4_rts_cts_pins: uart4-rts-cts-pins { + pins = "PD4", "PD5"; + function = "uart4"; + }; }; uart0: serial@1c28000 { @@ -303,8 +367,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 67>; - resets = <&ccu 46>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; @@ -314,8 +378,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 68>; - resets = <&ccu 47>; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; status = "disabled"; }; @@ -325,8 +389,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 69>; - resets = <&ccu 48>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; status = "disabled"; }; @@ -336,8 +400,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 70>; - resets = <&ccu 49>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; status = "disabled"; }; @@ -347,8 +411,8 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 71>; - resets = <&ccu 50>; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; status = "disabled"; }; @@ -356,8 +420,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; interrupts = ; - clocks = <&ccu 63>; - resets = <&ccu 42>; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -367,8 +431,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; interrupts = ; - clocks = <&ccu 64>; - resets = <&ccu 43>; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -378,8 +442,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b400 0x400>; interrupts = ; - clocks = <&ccu 65>; - resets = <&ccu 44>; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -417,12 +481,31 @@ compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = ; - clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; + + r_rsb_pins: rsb@0 { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; + }; + + r_rsb: rsb@1f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = ; + clocks = <&r_ccu 6>; + clock-frequency = <3000000>; + resets = <&r_ccu 2>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; }; }; diff --git a/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts b/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts new file mode 100644 index 000000000000..1c2387bd5df6 --- /dev/null +++ b/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2017 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun50i-h5.dtsi" + +#include + +/ { + model = "FriendlyARM NanoPi NEO 2"; + compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + pwr { + label = "nanopi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status { + label = "nanopi:blue:status"; + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ + status = "okay"; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + /* USB Type-A port's VBUS is always on */ + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + usb0_vbus-supply = <®_usb0_vbus>; + status = "okay"; +}; diff --git a/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts b/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts index dfecc17dcc92..4f77c8470f6c 100644 --- a/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts @@ -91,6 +91,16 @@ }; }; + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + reg_usb0_vbus: usb0-vbus { compatible = "regulator-fixed"; regulator-name = "usb0-vbus"; diff --git a/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts b/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts new file mode 100644 index 000000000000..6be06873e5af --- /dev/null +++ b/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts @@ -0,0 +1,215 @@ +/* + * Copyright (C) 2017 Icenowy Zheng + * + * Based on sun50i-h5-orangepi-pc2.dts, which is: + * Copyright (C) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun50i-h5.dtsi" + +#include +#include + +/ { + model = "Xunlong Orange Pi Prime"; + compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + pwr { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status { + label = "orangepi:red:status"; + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; + }; + }; + + r-gpio-keys { + compatible = "gpio-keys"; + + sw4 { + label = "sw4"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ + status = "okay"; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */ + }; +}; + +&codec { + allwinner,audio-routing = + "Line Out", "LINEOUT", + "MIC1", "Mic", + "Mic", "MBIAS"; + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "disabled"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + /* USB Type-A ports' VBUS is always on */ + usb0_id_det-gpios = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */ + usb0_vbus-supply = <®_usb0_vbus>; + status = "okay"; +}; diff --git a/src/arm64/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/src/arm64/allwinner/sun50i-h5-orangepi-zero-plus2.dts new file mode 100644 index 000000000000..b6b7a561df8c --- /dev/null +++ b/src/arm64/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-h5.dtsi" + +#include + +/ { + model = "OrangePi Zero Plus2"; + compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; diff --git a/src/arm64/allwinner/sun50i-h5.dtsi b/src/arm64/allwinner/sun50i-h5.dtsi index 732e2e06f503..d9a720bff05d 100644 --- a/src/arm64/allwinner/sun50i-h5.dtsi +++ b/src/arm64/allwinner/sun50i-h5.dtsi @@ -120,5 +120,8 @@ }; &pio { + interrupts = , + , + ; compatible = "allwinner,sun50i-h5-pinctrl"; }; diff --git a/src/arm64/amlogic/meson-gx-p23x-q20x.dtsi b/src/arm64/amlogic/meson-gx-p23x-q20x.dtsi index a84e27622639..dc478d094c11 100644 --- a/src/arm64/amlogic/meson-gx-p23x-q20x.dtsi +++ b/src/arm64/amlogic/meson-gx-p23x-q20x.dtsi @@ -121,19 +121,42 @@ }; }; -/* This UART is brought out to the DB9 connector */ -&uart_AO { +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +ðmac { status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; pinctrl-names = "default"; }; +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &ir { status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default"; }; +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + /* Wireless SDIO Module */ &sd_emmc_a { status = "okay"; @@ -154,7 +177,7 @@ vmmc-supply = <&vddao_3v3>; vqmmc-supply = <&vddio_boot>; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; }; @@ -198,32 +221,9 @@ vqmmc-supply = <&vddio_boot>; }; -&pwm_ef { +/* This UART is brought out to the DB9 connector */ +&uart_AO { status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -ðmac { - status = "okay"; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; diff --git a/src/arm64/amlogic/meson-gx.dtsi b/src/arm64/amlogic/meson-gx.dtsi index 436b875060e7..738ed689ff69 100644 --- a/src/arm64/amlogic/meson-gx.dtsi +++ b/src/arm64/amlogic/meson-gx.dtsi @@ -200,7 +200,7 @@ }; scpi_sensors: sensors { - compatible = "arm,scpi-sensors"; + compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors"; #thermal-sensor-cells = <1>; }; }; @@ -304,6 +304,15 @@ status = "disabled"; }; + spicc: spi@8d80 { + compatible = "amlogic,meson-gx-spicc"; + reg = <0x0 0x08d80 0x0 0x80>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spifc: spi@8c80 { compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc"; reg = <0x0 0x08c80 0x0 0x80>; @@ -391,7 +400,7 @@ }; pwm_AO_ab: pwm@550 { - compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; + compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm"; reg = <0x0 0x00550 0x0 0x10>; #pwm-cells = <3>; status = "disabled"; diff --git a/src/arm64/amlogic/meson-gxbb-nanopi-k2.dts b/src/arm64/amlogic/meson-gxbb-nanopi-k2.dts new file mode 100644 index 000000000000..fa462831ccaf --- /dev/null +++ b/src/arm64/amlogic/meson-gxbb-nanopi-k2.dts @@ -0,0 +1,291 @@ +/* + * Copyright (c) 2017 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "meson-gxbb.dtsi" +#include + +/ { + compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; + + aliases { + serial0 = &uart_AO; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + leds { + compatible = "gpio-leds"; + + stat { + label = "nanopi-k2:blue:stat"; + gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; + default-state = "on"; + panic-indicator; + }; + }; + + vdd_5v: regulator-vdd-5v { + compatible = "regulator-fixed"; + regulator-name = "VDD_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vddio_ao18: regulator-vddio-ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddio_ao3v3: regulator-vddio-ao3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vddio_tf: regulator-vddio-tf { + compatible = "regulator-gpio"; + + regulator-name = "VDDIO_TF"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + + states = <3300000 0>, + <1800000 1>; + }; + + wifi_32k: wifi-32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi_32k>; + clock-names = "ext_clock"; + }; + + vcc1v8: regulator-vcc1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc3v3: regulator-vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + + amlogic,tx-delay-ns = <2>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + }; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +/* SDIO */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <200000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddio_ao3v3>; + vqmmc-supply = <&vddio_ao18>; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + }; +}; + +/* SD */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vddio_ao3v3>; + vqmmc-supply = <&vddio_tf>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "disabled"; + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-sd-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc3v3>; + vqmmc-supply = <&vcc1v8>; +}; + +/* DBG_UART */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +/* Bluetooth on AP6212 */ +&uart_A { + status = "disabled"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; +}; + +/* 40-pin CON1 */ +&uart_C { + status = "disabled"; + pinctrl-0 = <&uart_c_pins>; + pinctrl-names = "default"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&vdd_5v>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/src/arm64/amlogic/meson-gxbb-nexbox-a95x.dts b/src/arm64/amlogic/meson-gxbb-nexbox-a95x.dts index 87198eafb04b..a1078b3e1c76 100644 --- a/src/arm64/amlogic/meson-gxbb-nexbox-a95x.dts +++ b/src/arm64/amlogic/meson-gxbb-nexbox-a95x.dts @@ -165,10 +165,10 @@ }; }; -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; }; ðmac { @@ -195,12 +195,32 @@ }; }; +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &ir { status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default"; }; +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + /* Wireless SDIO Module */ &sd_emmc_a { status = "okay"; @@ -260,28 +280,8 @@ vqmmc-supply = <&vddio_boot>; }; -&pwm_ef { +&uart_AO { status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; diff --git a/src/arm64/amlogic/meson-gxbb-odroidc2.dts b/src/arm64/amlogic/meson-gxbb-odroidc2.dts index 54a9c6a6b392..d147c853ab05 100644 --- a/src/arm64/amlogic/meson-gxbb-odroidc2.dts +++ b/src/arm64/amlogic/meson-gxbb-odroidc2.dts @@ -137,16 +137,6 @@ }; }; -&scpi_clocks { - status = "disabled"; -}; - -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - ðmac { status = "okay"; pinctrl-0 = <ð_rgmii_pins>; @@ -172,6 +162,33 @@ }; }; +&gpio_ao { + /* + * WARNING: The USB Hub on the Odroid-C2 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ + usb-hub { + gpio-hog; + gpios = ; + output-high; + line-name = "usb-hub-reset"; + }; +}; + +&i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; + pinctrl-names = "default"; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + &pinctrl_aobus { gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", "USB HUB nRESET", "USB OTG Power En", @@ -223,55 +240,15 @@ ""; }; -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - -&i2c_A { - status = "okay"; - pinctrl-0 = <&i2c_a_pins>; - pinctrl-names = "default"; -}; - -&gpio_ao { - /* - * WARNING: The USB Hub on the Odroid-C2 needs a reset signal - * to be turned high in order to be detected by the USB Controller - * This signal should be handled by a USB specific power sequence - * in order to reset the Hub when USB bus is powered down. - */ - usb-hub { - gpio-hog; - gpios = ; - output-high; - line-name = "usb-hub-reset"; - }; -}; - -&usb0_phy { - status = "okay"; - phy-supply = <&usb_otg_pwr>; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vcc1v8>; }; +&scpi_clocks { + status = "disabled"; +}; + /* SD */ &sd_emmc_b { status = "okay"; @@ -309,3 +286,26 @@ vmmc-supply = <&vcc3v3>; vqmmc-supply = <&vcc1v8>; }; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&usb_otg_pwr>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/src/arm64/amlogic/meson-gxbb-p20x.dtsi b/src/arm64/amlogic/meson-gxbb-p20x.dtsi index 3c6c0b7f4187..d904deb1018c 100644 --- a/src/arm64/amlogic/meson-gxbb-p20x.dtsi +++ b/src/arm64/amlogic/meson-gxbb-p20x.dtsi @@ -126,7 +126,7 @@ clock-names = "ext_clock"; }; - cvbs-connector { + cvbs_connector: cvbs-connector { compatible = "composite-video-connector"; port { @@ -148,34 +148,36 @@ }; }; -/* This UART is brought out to the DB9 connector */ -&uart_AO { +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&hdmi_tx { status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; pinctrl-names = "default"; }; +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &ir { status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default"; }; -&usb0_phy { - status = "okay"; - phy-supply = <&usb_pwr>; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { +&pwm_ef { status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; }; /* Wireless SDIO Module */ @@ -198,7 +200,7 @@ vmmc-supply = <&vddao_3v3>; vqmmc-supply = <&vddio_boot>; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; }; @@ -242,28 +244,26 @@ vqmmc-supply = <&vddio_boot>; }; -&pwm_ef { +/* This UART is brought out to the DB9 connector */ +&uart_AO { status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; +&usb0_phy { + status = "okay"; + phy-supply = <&usb_pwr>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; }; diff --git a/src/arm64/amlogic/meson-gxbb-vega-s95.dtsi b/src/arm64/amlogic/meson-gxbb-vega-s95.dtsi index aefa66dff72d..346753fb6324 100644 --- a/src/arm64/amlogic/meson-gxbb-vega-s95.dtsi +++ b/src/arm64/amlogic/meson-gxbb-vega-s95.dtsi @@ -111,18 +111,6 @@ }; }; -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - ðmac { status = "okay"; pinctrl-0 = <ð_rgmii_pins>; @@ -149,21 +137,18 @@ }; }; -&usb0_phy { +&ir { status = "okay"; - phy-supply = <&usb_vbus>; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; }; -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { +&pwm_ef { status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; }; /* Wireless SDIO Module */ @@ -186,7 +171,7 @@ vmmc-supply = <&vcc_3v3>; vqmmc-supply = <&vcc_1v8>; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; }; @@ -229,10 +214,25 @@ vmmcq-sumpply = <&vcc_1v8>; }; -&pwm_ef { +&uart_AO { status = "okay"; - pinctrl-0 = <&pwm_e_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; }; diff --git a/src/arm64/amlogic/meson-gxbb-wetek-hub.dts b/src/arm64/amlogic/meson-gxbb-wetek-hub.dts index f057fb48fee5..1878ac2b2b83 100644 --- a/src/arm64/amlogic/meson-gxbb-wetek-hub.dts +++ b/src/arm64/amlogic/meson-gxbb-wetek-hub.dts @@ -59,10 +59,10 @@ panic-indicator; }; }; +}; - cvbs-connector { - status = "disabled"; - }; +&cvbs_connector { + status = "disabled"; }; ðmac { diff --git a/src/arm64/amlogic/meson-gxbb-wetek-play2.dts b/src/arm64/amlogic/meson-gxbb-wetek-play2.dts index 743acb5f5d06..e76ac313fef9 100644 --- a/src/arm64/amlogic/meson-gxbb-wetek-play2.dts +++ b/src/arm64/amlogic/meson-gxbb-wetek-play2.dts @@ -85,6 +85,34 @@ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; }; }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; +}; + + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; }; ðmac { @@ -113,6 +141,18 @@ }; }; +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &i2c_A { status = "okay"; pinctrl-0 = <&i2c_a_pins>; diff --git a/src/arm64/amlogic/meson-gxbb.dtsi b/src/arm64/amlogic/meson-gxbb.dtsi index 86105a69690a..17d3efdf1469 100644 --- a/src/arm64/amlogic/meson-gxbb.dtsi +++ b/src/arm64/amlogic/meson-gxbb.dtsi @@ -97,13 +97,6 @@ }; }; -ðmac { - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; -}; - &aobus { pinctrl_aobus: pinctrl@14 { compatible = "amlogic,meson-gxbb-aobus-pinctrl"; @@ -249,9 +242,119 @@ function = "spdif_out_ao"; }; }; + + ao_cec_pins: ao_cec { + mux { + groups = "ao_cec"; + function = "cec_ao"; + }; + }; + + ee_cec_pins: ee_cec { + mux { + groups = "ee_cec"; + function = "cec_ao"; + }; + }; }; }; +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; + +&cbus { + spifc: spi@8c80 { + compatible = "amlogic,meson-gxbb-spifc"; + reg = <0x0 0x08c80 0x0 0x80>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_SPI>; + status = "disabled"; + }; +}; + +ðmac { + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; +}; + +&hdmi_tx { + compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; + resets = <&reset RESET_HDMITX_CAPB3>, + <&reset RESET_HDMI_SYSTEM_RESET>, + <&reset RESET_HDMI_TX>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; + clocks = <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_CLK81>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; +}; + +&hiubus { + clkc: clock-controller@0 { + compatible = "amlogic,gxbb-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x3db>; + }; +}; + +&hwrng { + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + +&i2c_A { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_AO { + clocks = <&clkc CLKID_AO_I2C>; +}; + +&i2c_B { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_C { + clocks = <&clkc CLKID_I2C>; +}; + &periphs { pinctrl_periphs: pinctrl@4b0 { compatible = "amlogic,meson-gxbb-periphs-pinctrl"; @@ -262,7 +365,7 @@ gpio: bank@4b0 { reg = <0x0 0x004b0 0x0 0x28>, <0x0 0x004e8 0x0 0x14>, - <0x0 0x00120 0x0 0x14>, + <0x0 0x00520 0x0 0x14>, <0x0 0x00430 0x0 0x40>; reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; @@ -290,6 +393,22 @@ }; }; + spi_pins: spi { + mux { + groups = "spi_miso", + "spi_mosi", + "spi_sclk"; + function = "spi"; + }; + }; + + spi_ss0_pins: spi-ss0 { + mux { + groups = "spi_ss0"; + function = "spi"; + }; + }; + sdcard_pins: sdcard { mux { groups = "sdcard_d0", @@ -521,67 +640,6 @@ }; }; -&hiubus { - clkc: clock-controller@0 { - compatible = "amlogic,gxbb-clkc"; - #clock-cells = <1>; - reg = <0x0 0x0 0x0 0x3db>; - }; -}; - -&apb { - mali: gpu@c0000 { - compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; - reg = <0x0 0xc0000 0x0 0x40000>; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "gp", "gpmmu", "pp", "pmu", - "pp0", "ppmmu0", "pp1", "ppmmu1", - "pp2", "ppmmu2"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, - <0>; /* Do Nothing */ - }; -}; - -&i2c_A { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_AO { - clocks = <&clkc CLKID_AO_I2C>; -}; - -&i2c_B { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_C { - clocks = <&clkc CLKID_I2C>; -}; - &saradc { compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; clocks = <&xtal>, @@ -613,6 +671,13 @@ clock-names = "core", "clkin0", "clkin1"; }; +&spicc { + clocks = <&clkc CLKID_SPICC>; + clock-names = "core"; + resets = <&reset RESET_PERIPHS_SPICC>; + num-cs = <1>; +}; + &spifc { clocks = <&clkc CLKID_SPI>; }; @@ -620,20 +685,3 @@ &vpu { compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; }; - -&hwrng { - clocks = <&clkc CLKID_RNG0>; - clock-names = "core"; -}; - -&hdmi_tx { - compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; - resets = <&reset RESET_HDMITX_CAPB3>, - <&reset RESET_HDMI_SYSTEM_RESET>, - <&reset RESET_HDMI_TX>; - reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; -}; diff --git a/src/arm64/amlogic/meson-gxl-s905d-p230.dts b/src/arm64/amlogic/meson-gxl-s905d-p230.dts index f9fbfdad8dde..3e0c023d6abd 100644 --- a/src/arm64/amlogic/meson-gxl-s905d-p230.dts +++ b/src/arm64/amlogic/meson-gxl-s905d-p230.dts @@ -84,6 +84,17 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; }; /* P230 has exclusive choice between internal or external PHY */ @@ -113,6 +124,19 @@ }; }; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &saradc { status = "okay"; vref-supply = <&vddio_ao18>; diff --git a/src/arm64/amlogic/meson-gxl-s905x-khadas-vim.dts b/src/arm64/amlogic/meson-gxl-s905x-khadas-vim.dts index 3c8b0b51ef27..94567eb17875 100644 --- a/src/arm64/amlogic/meson-gxl-s905x-khadas-vim.dts +++ b/src/arm64/amlogic/meson-gxl-s905x-khadas-vim.dts @@ -54,6 +54,29 @@ linux,default-trigger = "default-on"; }; }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; }; &i2c_A { @@ -86,8 +109,8 @@ status = "okay"; pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; + clocks = <&xtal> , <&xtal>; + clock-names = "clkin0", "clkin1" ; }; &pwm_ef { @@ -95,7 +118,7 @@ }; &sd_emmc_a { - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; }; diff --git a/src/arm64/amlogic/meson-gxl-s905x-libretech-cc.dts b/src/arm64/amlogic/meson-gxl-s905x-libretech-cc.dts new file mode 100644 index 000000000000..266fbcf3e47f --- /dev/null +++ b/src/arm64/amlogic/meson-gxl-s905x-libretech-cc.dts @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2017 BayLibre, SAS. + * Author: Neil Armstrong + * Author: Jerome Brunet + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include + +#include "meson-gxl-s905x.dtsi" + +/ { + compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl"; + model = "Libre Technology CC"; + + aliases { + serial0 = &uart_AO; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + system { + label = "librecomputer:system-status"; + gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + default-state = "on"; + panic-indicator; + }; + + blue { + label = "librecomputer:blue"; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_card: regulator-vcc-card { + compatible = "regulator-gpio"; + + regulator-name = "VCC_CARD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + + states = <3300000 0>, + <1800000 1>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +ðmac { + status = "okay"; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_card>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <50000000>; + non-removable; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; diff --git a/src/arm64/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/src/arm64/amlogic/meson-gxl-s905x-nexbox-a95x.dts index 8873c058fad2..6633a5d8fdd3 100644 --- a/src/arm64/amlogic/meson-gxl-s905x-nexbox-a95x.dts +++ b/src/arm64/amlogic/meson-gxl-s905x-nexbox-a95x.dts @@ -140,10 +140,10 @@ }; }; -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; }; ðmac { @@ -152,12 +152,32 @@ phy-handle = <&internal_phy>; }; +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &ir { status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default"; }; +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + /* Wireless SDIO Module */ &sd_emmc_a { status = "okay"; @@ -217,28 +237,8 @@ vqmmc-supply = <&vddio_boot>; }; -&pwm_ef { +&uart_AO { status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; diff --git a/src/arm64/amlogic/meson-gxl-s905x-p212.dts b/src/arm64/amlogic/meson-gxl-s905x-p212.dts index db31e093f40e..6ab17c1eeefd 100644 --- a/src/arm64/amlogic/meson-gxl-s905x-p212.dts +++ b/src/arm64/amlogic/meson-gxl-s905x-p212.dts @@ -58,6 +58,17 @@ }; }; }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; }; &cvbs_vdac_port { @@ -66,6 +77,18 @@ }; }; +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + /* This UART is brought out to the DB9 connector */ &uart_AO { status = "okay"; diff --git a/src/arm64/amlogic/meson-gxl-s905x.dtsi b/src/arm64/amlogic/meson-gxl-s905x.dtsi index 0f78d836edaf..3314a0b3dad9 100644 --- a/src/arm64/amlogic/meson-gxl-s905x.dtsi +++ b/src/arm64/amlogic/meson-gxl-s905x.dtsi @@ -48,7 +48,7 @@ compatible = "amlogic,s905x", "amlogic,meson-gxl"; }; -/* S905X Only has access to its internal PHY */ +/* S905X only has access to its internal PHY */ ðmac { phy-mode = "rmii"; phy-handle = <&internal_phy>; diff --git a/src/arm64/amlogic/meson-gxl.dtsi b/src/arm64/amlogic/meson-gxl.dtsi index d8e096dff10a..8d4f3160a0ee 100644 --- a/src/arm64/amlogic/meson-gxl.dtsi +++ b/src/arm64/amlogic/meson-gxl.dtsi @@ -190,9 +190,59 @@ function = "spdif_out_ao"; }; }; + + ao_cec_pins: ao_cec { + mux { + groups = "ao_cec"; + function = "cec_ao"; + }; + }; + + ee_cec_pins: ee_cec { + mux { + groups = "ee_cec"; + function = "cec_ao"; + }; + }; }; }; +&hdmi_tx { + compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; + resets = <&reset RESET_HDMITX_CAPB3>, + <&reset RESET_HDMI_SYSTEM_RESET>, + <&reset RESET_HDMI_TX>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; + clocks = <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_CLK81>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; +}; + +&hiubus { + clkc: clock-controller@0 { + compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x3db>; + }; +}; + +&i2c_A { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_AO { + clocks = <&clkc CLKID_AO_I2C>; +}; + +&i2c_B { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_C { + clocks = <&clkc CLKID_I2C>; +}; + &periphs { pinctrl_periphs: pinctrl@4b0 { compatible = "amlogic,meson-gxl-periphs-pinctrl"; @@ -203,12 +253,12 @@ gpio: bank@4b0 { reg = <0x0 0x004b0 0x0 0x28>, <0x0 0x004e8 0x0 0x14>, - <0x0 0x00120 0x0 0x14>, + <0x0 0x00520 0x0 0x14>, <0x0 0x00430 0x0 0x40>; reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinctrl_periphs 0 14 101>; + gpio-ranges = <&pinctrl_periphs 0 10 101>; }; emmc_pins: emmc { @@ -231,6 +281,22 @@ }; }; + spi_pins: spi { + mux { + groups = "spi_miso", + "spi_mosi", + "spi_sclk"; + function = "spi"; + }; + }; + + spi_ss0_pins: spi-ss0 { + mux { + groups = "spi_ss0"; + function = "spi"; + }; + }; + sdcard_pins: sdcard { mux { groups = "sdcard_d0", @@ -354,6 +420,20 @@ }; }; + eth_link_led_pins: eth_link_led { + mux { + groups = "eth_link_led"; + function = "eth_led"; + }; + }; + + eth_act_led_pins: eth_act_led { + mux { + groups = "eth_act_led"; + function = "eth_led"; + }; + }; + pwm_a_pins: pwm_a { mux { groups = "pwm_a"; @@ -501,30 +581,6 @@ }; }; -&hiubus { - clkc: clock-controller@0 { - compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc"; - #clock-cells = <1>; - reg = <0x0 0x0 0x0 0x3db>; - }; -}; - -&i2c_A { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_AO { - clocks = <&clkc CLKID_AO_I2C>; -}; - -&i2c_B { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_C { - clocks = <&clkc CLKID_I2C>; -}; - &saradc { compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; clocks = <&xtal>, @@ -556,6 +612,13 @@ clock-names = "core", "clkin0", "clkin1"; }; +&spicc { + clocks = <&clkc CLKID_SPICC>; + clock-names = "core"; + resets = <&reset RESET_PERIPHS_SPICC>; + num-cs = <1>; +}; + &spifc { clocks = <&clkc CLKID_SPI>; }; @@ -563,15 +626,3 @@ &vpu { compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; }; - -&hdmi_tx { - compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; - resets = <&reset RESET_HDMITX_CAPB3>, - <&reset RESET_HDMI_SYSTEM_RESET>, - <&reset RESET_HDMI_TX>; - reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; -}; diff --git a/src/arm64/amlogic/meson-gxm-nexbox-a1.dts b/src/arm64/amlogic/meson-gxm-nexbox-a1.dts index 11b0bf46a95c..5f626d683088 100644 --- a/src/arm64/amlogic/meson-gxm-nexbox-a1.dts +++ b/src/arm64/amlogic/meson-gxm-nexbox-a1.dts @@ -113,11 +113,49 @@ }; }; -/* This UART is brought out to the DB9 connector */ -&uart_AO { +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +ðmac { status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; + + pinctrl-0 = <ð_pins>; pinctrl-names = "default"; + + /* Select external PHY by default */ + phy-handle = <&external_phy>; + + amlogic,tx-delay-ns = <2>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + /* External PHY is in RGMII */ + phy-mode = "rgmii"; +}; + +&external_mdio { + external_phy: ethernet-phy@0 { + compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; }; &ir { @@ -164,47 +202,8 @@ vqmmc-supply = <&vddio_boot>; }; -ðmac { +&uart_AO { status = "okay"; - - pinctrl-0 = <ð_pins>; - pinctrl-names = "default"; - - /* Select external PHY by default */ - phy-handle = <&external_phy>; - - amlogic,tx-delay-ns = <2>; - - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-active-low; - - /* External PHY is in RGMII */ - phy-mode = "rgmii"; -}; - -&external_mdio { - external_phy: ethernet-phy@0 { - compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - max-speed = <1000>; - }; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; diff --git a/src/arm64/amlogic/meson-gxm-rbox-pro.dts b/src/arm64/amlogic/meson-gxm-rbox-pro.dts new file mode 100644 index 000000000000..08f1dd69b679 --- /dev/null +++ b/src/arm64/amlogic/meson-gxm-rbox-pro.dts @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2016-2017 Andreas Färber + * + * Based on nexbox-a1: + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong + * + * Copyright (c) 2016 Endless Computers, Inc. + * Author: Carlo Caione + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "meson-gxm.dtsi" + +/ { + compatible = "kingnovel,r-box-pro", "amlogic,s912", "amlogic,meson-gxm"; + model = "R-Box Pro"; + + aliases { + serial0 = &uart_AO; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */ + }; + + leds { + compatible = "gpio-leds"; + + blue { + label = "rbox-pro:blue:on"; + gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + red { + label = "rbox-pro:red:standby"; + gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>; + default-state = "off"; + retain-state-suspended; + panic-indicator; + }; + }; + + vddio_boot: regulator-vddio-boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; +}; + +ðmac { + status = "okay"; + + pinctrl-0 = <ð_pins>; + pinctrl-names = "default"; + + /* Select external PHY by default */ + phy-handle = <&external_phy>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + amlogic,tx-delay-ns = <2>; + + /* External PHY is in RGMII */ + phy-mode = "rgmii"; +}; + +&external_mdio { + external_phy: ethernet-phy@0 { + compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: brcmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; diff --git a/src/arm64/arm/juno-base.dtsi b/src/arm64/arm/juno-base.dtsi index bfe7d683a42e..e8b7413ec890 100644 --- a/src/arm64/arm/juno-base.dtsi +++ b/src/arm64/arm/juno-base.dtsi @@ -53,7 +53,6 @@ #global-interrupts = <1>; dma-coherent; power-domains = <&scpi_devpd 0>; - status = "disabled"; }; gic: interrupt-controller@2c010000 { @@ -202,6 +201,15 @@ }; }; + cpu_debug0: cpu_debug@22010000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x22010000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm0: etm@22040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x22040000 0 0x1000>; @@ -252,6 +260,15 @@ }; }; + cpu_debug1: cpu_debug@22110000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x22110000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm1: etm@22140000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x22140000 0 0x1000>; @@ -266,6 +283,15 @@ }; }; + cpu_debug2: cpu_debug@23010000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23010000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm2: etm@23040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x23040000 0 0x1000>; @@ -330,6 +356,15 @@ }; }; + cpu_debug3: cpu_debug@23110000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23110000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm3: etm@23140000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x23140000 0 0x1000>; @@ -344,6 +379,15 @@ }; }; + cpu_debug4: cpu_debug@23210000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23210000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm4: etm@23240000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x23240000 0 0x1000>; @@ -358,6 +402,15 @@ }; }; + cpu_debug5: cpu_debug@23310000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23310000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + etm5: etm@23340000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x23340000 0 0x1000>; @@ -546,7 +599,6 @@ ; #iommu-cells = <1>; #global-interrupts = <1>; - status = "disabled"; }; smmu_hdlcd0: iommu@7fb20000 { @@ -556,7 +608,6 @@ ; #iommu-cells = <1>; #global-interrupts = <1>; - status = "disabled"; }; smmu_usb: iommu@7fb30000 { @@ -567,7 +618,6 @@ #iommu-cells = <1>; #global-interrupts = <1>; dma-coherent; - status = "disabled"; }; dma@7ff00000 { diff --git a/src/arm64/arm/juno-r1.dts b/src/arm64/arm/juno-r1.dts index 0e8943ab94d7..aed6389468c4 100644 --- a/src/arm64/arm/juno-r1.dts +++ b/src/arm64/arm/juno-r1.dts @@ -281,3 +281,27 @@ &stm_out_port { remote-endpoint = <&csys1_funnel_in_port0>; }; + +&cpu_debug0 { + cpu = <&A57_0>; +}; + +&cpu_debug1 { + cpu = <&A57_1>; +}; + +&cpu_debug2 { + cpu = <&A53_0>; +}; + +&cpu_debug3 { + cpu = <&A53_1>; +}; + +&cpu_debug4 { + cpu = <&A53_2>; +}; + +&cpu_debug5 { + cpu = <&A53_3>; +}; diff --git a/src/arm64/arm/juno-r2.dts b/src/arm64/arm/juno-r2.dts index 405e2fba025b..b39b6d6ec5aa 100644 --- a/src/arm64/arm/juno-r2.dts +++ b/src/arm64/arm/juno-r2.dts @@ -281,3 +281,27 @@ &stm_out_port { remote-endpoint = <&csys1_funnel_in_port0>; }; + +&cpu_debug0 { + cpu = <&A72_0>; +}; + +&cpu_debug1 { + cpu = <&A72_1>; +}; + +&cpu_debug2 { + cpu = <&A53_0>; +}; + +&cpu_debug3 { + cpu = <&A53_1>; +}; + +&cpu_debug4 { + cpu = <&A53_2>; +}; + +&cpu_debug5 { + cpu = <&A53_3>; +}; diff --git a/src/arm64/arm/juno.dts b/src/arm64/arm/juno.dts index 0220494c9b80..c9236c4b967d 100644 --- a/src/arm64/arm/juno.dts +++ b/src/arm64/arm/juno.dts @@ -268,3 +268,27 @@ }; }; }; + +&cpu_debug0 { + cpu = <&A57_0>; +}; + +&cpu_debug1 { + cpu = <&A57_1>; +}; + +&cpu_debug2 { + cpu = <&A53_0>; +}; + +&cpu_debug3 { + cpu = <&A53_1>; +}; + +&cpu_debug4 { + cpu = <&A53_2>; +}; + +&cpu_debug5 { + cpu = <&A53_3>; +}; diff --git a/src/arm64/broadcom/bcm2835-rpi.dtsi b/src/arm64/broadcom/bcm2835-rpi.dtsi index a7b5ce133784..e55b362b9d6e 100644 --- a/src/arm64/broadcom/bcm2835-rpi.dtsi +++ b/src/arm64/broadcom/bcm2835-rpi.dtsi @@ -65,13 +65,13 @@ &sdhci { pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio48>; - status = "okay"; bus-width = <4>; }; &sdhost { pinctrl-names = "default"; pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; bus-width = <4>; }; diff --git a/src/arm64/broadcom/bcm2837-rpi-3-b.dts b/src/arm64/broadcom/bcm2837-rpi-3-b.dts index c309633a1e87..972f14db28ac 100644 --- a/src/arm64/broadcom/bcm2837-rpi-3-b.dts +++ b/src/arm64/broadcom/bcm2837-rpi-3-b.dts @@ -22,3 +22,20 @@ &uart1 { status = "okay"; }; + +/* SDHCI is used to control the SDIO for wireless */ +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio34>; + status = "okay"; + bus-width = <4>; + non-removable; +}; + +/* SDHOST is used to drive the SD card */ +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; + bus-width = <4>; +}; diff --git a/src/arm64/broadcom/bcm2837.dtsi b/src/arm64/broadcom/bcm2837.dtsi index 19f2fe620a21..2d5de6f0f78d 100644 --- a/src/arm64/broadcom/bcm2837.dtsi +++ b/src/arm64/broadcom/bcm2837.dtsi @@ -75,6 +75,10 @@ interrupts = <8>; }; +&cpu_thermal { + coefficients = <(-538) 412000>; +}; + /* enable thermal sensor with the correct compatible property set */ &thermal { compatible = "brcm,bcm2837-thermal"; diff --git a/src/arm64/broadcom/bcm283x.dtsi b/src/arm64/broadcom/bcm283x.dtsi index 9444a9a9ba10..431dcfc900c0 100644 --- a/src/arm64/broadcom/bcm283x.dtsi +++ b/src/arm64/broadcom/bcm283x.dtsi @@ -24,6 +24,26 @@ bootargs = "earlyprintk console=ttyAMA0"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <80000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -435,6 +455,7 @@ compatible = "brcm,bcm2835-thermal"; reg = <0x7e212000 0x8>; clocks = <&clocks BCM2835_CLOCK_TSENS>; + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -573,6 +594,8 @@ #size-cells = <0>; clocks = <&clk_usb>; clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; }; v3d: v3d@7ec00000 { @@ -608,4 +631,8 @@ clock-frequency = <480000000>; }; }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; + }; }; diff --git a/src/arm64/broadcom/ns2.dtsi b/src/arm64/broadcom/ns2.dtsi index 35a309ae3ed8..35c8457e3d1f 100644 --- a/src/arm64/broadcom/ns2.dtsi +++ b/src/arm64/broadcom/ns2.dtsi @@ -460,6 +460,20 @@ }; }; + usbdrd_phy: phy@66000960 { + #phy-cells = <0>; + compatible = "brcm,ns2-drd-phy"; + reg = <0x66000960 0x24>, + <0x67012800 0x4>, + <0x6501d148 0x4>, + <0x664d0700 0x4>; + reg-names = "icfg", "rst-ctrl", + "crmu-ctrl", "usb2-strap"; + id-gpios = <&gpio_g 30 0>; + vbus-gpios = <&gpio_g 31 0>; + status = "disabled"; + }; + pwm: pwm@66010000 { compatible = "brcm,iproc-pwm"; reg = <0x66010000 0x28>; diff --git a/src/arm64/broadcom/stingray/bcm958742-base.dtsi b/src/arm64/broadcom/stingray/bcm958742-base.dtsi new file mode 100644 index 000000000000..5dca7d10253b --- /dev/null +++ b/src/arm64/broadcom/stingray/bcm958742-base.dtsi @@ -0,0 +1,131 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stingray.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + }; + + sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio0_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 18 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; + + sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio1_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 19 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; +}; + +&memory { /* Default DRAM banks */ + reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ + <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */ +}; + +&uart1 { + status = "okay"; +}; + +&pwm { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + pca9505: pca9505@20 { + compatible = "nxp,pca9505"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; +}; + +&i2c1 { + status = "okay"; + + pcf8574: pcf8574@20 { + compatible = "nxp,pcf8574a"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x27>; + }; +}; + +&nand { + status = "ok"; + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <16>; + brcm,nand-oob-sector-size = <16>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&sdio0 { + vqmmc-supply = <&sdio0_vddo_ctrl_reg>; + non-removable; + full-pwr-cycle; + status = "okay"; +}; + +&sdio1 { + vqmmc-supply = <&sdio1_vddo_ctrl_reg>; + full-pwr-cycle; + status = "okay"; +}; diff --git a/src/arm64/broadcom/stingray/bcm958742k.dts b/src/arm64/broadcom/stingray/bcm958742k.dts new file mode 100644 index 000000000000..5671669ba348 --- /dev/null +++ b/src/arm64/broadcom/stingray/bcm958742k.dts @@ -0,0 +1,78 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742k", "brcm,stingray"; + model = "Stingray Combo SVK (BCM958742K)"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&ssp0 { + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 34 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&ssp1 { + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 96 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/src/arm64/broadcom/stingray/bcm958742t.dts b/src/arm64/broadcom/stingray/bcm958742t.dts new file mode 100644 index 000000000000..6ebe399fda6a --- /dev/null +++ b/src/arm64/broadcom/stingray/bcm958742t.dts @@ -0,0 +1,40 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742t", "brcm,stingray"; + model = "Stingray SST100 (BCM958742T)"; +}; diff --git a/src/arm64/broadcom/stingray/stingray-clock.dtsi b/src/arm64/broadcom/stingray/stingray-clock.dtsi new file mode 100644 index 000000000000..cbc43376e25e --- /dev/null +++ b/src/arm64/broadcom/stingray/stingray-clock.dtsi @@ -0,0 +1,170 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + + crmu_ref25m: crmu_ref25m { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&osc>; + clock-div = <2>; + clock-mult = <1>; + }; + + genpll0: genpll0@0001d104 { + #clock-cells = <1>; + compatible = "brcm,sr-genpll0"; + reg = <0x0001d104 0x32>, + <0x0001c854 0x4>; + clocks = <&osc>; + clock-output-names = "genpll0", "clk_125", "clk_scr", + "clk_250", "clk_pcie_axi", + "clk_paxc_axi_x2", + "clk_paxc_axi"; + }; + + genpll3: genpll3@0001d1e0 { + #clock-cells = <1>; + compatible = "brcm,sr-genpll3"; + reg = <0x0001d1e0 0x32>, + <0x0001c854 0x4>; + clocks = <&osc>; + clock-output-names = "genpll3", "clk_hsls", + "clk_sdio"; + }; + + genpll4: genpll4@0001d214 { + #clock-cells = <1>; + compatible = "brcm,sr-genpll4"; + reg = <0x0001d214 0x32>, + <0x0001c854 0x4>; + clocks = <&osc>; + clock-output-names = "genpll4", "clk_ccn", + "clk_tpiu_pll", "noc_clk", + "pll_chclk_fs4", + "clk_bridge_fscpu"; + }; + + genpll5: genpll5@0001d248 { + #clock-cells = <1>; + compatible = "brcm,sr-genpll5"; + reg = <0x0001d248 0x32>, + <0x0001c870 0x4>; + clocks = <&osc>; + clock-output-names = "genpll5", "fs4_hf_clk", + "crypto_ae_clk", "raid_ae_clk"; + }; + + lcpll0: lcpll0@0001d0c4 { + #clock-cells = <1>; + compatible = "brcm,sr-lcpll0"; + reg = <0x0001d0c4 0x3c>, + <0x0001c870 0x4>; + clocks = <&osc>; + clock-output-names = "lcpll0", "clk_sata_refp", + "clk_sata_refn", "clk_sata_350", + "clk_sata_500"; + }; + + lcpll1: lcpll1@0001d138 { + #clock-cells = <1>; + compatible = "brcm,sr-lcpll1"; + reg = <0x0001d138 0x3c>, + <0x0001c870 0x4>; + clocks = <&osc>; + clock-output-names = "lcpll1", "clk_wanpn", + "clk_usb_ref", + "timesync_evt_clk"; + }; + + hsls_clk: hsls_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&genpll3 1>; + clock-div = <1>; + clock-mult = <1>; + }; + + hsls_div2_clk: hsls_div2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>; + clock-div = <2>; + clock-mult = <1>; + + }; + + hsls_div4_clk: hsls_div4_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>; + clock-div = <4>; + clock-mult = <1>; + }; + + hsls_25m_clk: hsls_25m_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&crmu_ref25m>; + clock-div = <1>; + clock-mult = <1>; + }; + + hsls_25m_div2_clk: hsls_25m_div2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&hsls_25m_clk>; + clock-div = <2>; + clock-mult = <1>; + }; + + sdio0_clk: sdio0_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>; + clock-div = <1>; + clock-mult = <1>; + }; + + sdio1_clk: sdio1_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>; + clock-div = <1>; + clock-mult = <1>; + }; diff --git a/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi b/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi new file mode 100644 index 000000000000..15214d05fec1 --- /dev/null +++ b/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi @@ -0,0 +1,345 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + + pinconf: pinconf@00140000 { + compatible = "pinconf-single"; + reg = <0x00140000 0x250>; + pinctrl-single,register-width = <32>; + + /* pinconf functions */ + }; + + pinmux: pinmux@0014029c { + compatible = "pinctrl-single"; + reg = <0x0014029c 0x250>; + #address-cells = <1>; + #size-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xf>; + pinctrl-single,gpio-range = < + &range 0 154 MODE_GPIO + >; + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + + /* pinctrl functions */ + tsio_pins: pinmux_gpio_14 { + pinctrl-single,pins = < + 0x038 MODE_NITRO /* tsio_0 */ + 0x03c MODE_NITRO /* tsio_1 */ + >; + }; + + nor_pins: pinmux_pnor_adv_n { + pinctrl-single,pins = < + 0x0ac MODE_PNOR /* nand_ce1_n */ + 0x0b0 MODE_PNOR /* nand_ce0_n */ + 0x0b4 MODE_PNOR /* nand_we_n */ + 0x0b8 MODE_PNOR /* nand_wp_n */ + 0x0bc MODE_PNOR /* nand_re_n */ + 0x0c0 MODE_PNOR /* nand_rdy_bsy_n */ + 0x0c4 MODE_PNOR /* nand_io0_0 */ + 0x0c8 MODE_PNOR /* nand_io1_0 */ + 0x0cc MODE_PNOR /* nand_io2_0 */ + 0x0d0 MODE_PNOR /* nand_io3_0 */ + 0x0d4 MODE_PNOR /* nand_io4_0 */ + 0x0d8 MODE_PNOR /* nand_io5_0 */ + 0x0dc MODE_PNOR /* nand_io6_0 */ + 0x0e0 MODE_PNOR /* nand_io7_0 */ + 0x0e4 MODE_PNOR /* nand_io8_0 */ + 0x0e8 MODE_PNOR /* nand_io9_0 */ + 0x0ec MODE_PNOR /* nand_io10_0 */ + 0x0f0 MODE_PNOR /* nand_io11_0 */ + 0x0f4 MODE_PNOR /* nand_io12_0 */ + 0x0f8 MODE_PNOR /* nand_io13_0 */ + 0x0fc MODE_PNOR /* nand_io14_0 */ + 0x100 MODE_PNOR /* nand_io15_0 */ + 0x104 MODE_PNOR /* nand_ale_0 */ + 0x108 MODE_PNOR /* nand_cle_0 */ + 0x040 MODE_PNOR /* pnor_adv_n */ + 0x044 MODE_PNOR /* pnor_baa_n */ + 0x048 MODE_PNOR /* pnor_bls_0_n */ + 0x04c MODE_PNOR /* pnor_bls_1_n */ + 0x050 MODE_PNOR /* pnor_cre */ + 0x054 MODE_PNOR /* pnor_cs_2_n */ + 0x058 MODE_PNOR /* pnor_cs_1_n */ + 0x05c MODE_PNOR /* pnor_cs_0_n */ + 0x060 MODE_PNOR /* pnor_we_n */ + 0x064 MODE_PNOR /* pnor_oe_n */ + 0x068 MODE_PNOR /* pnor_intr */ + 0x06c MODE_PNOR /* pnor_dat_0 */ + 0x070 MODE_PNOR /* pnor_dat_1 */ + 0x074 MODE_PNOR /* pnor_dat_2 */ + 0x078 MODE_PNOR /* pnor_dat_3 */ + 0x07c MODE_PNOR /* pnor_dat_4 */ + 0x080 MODE_PNOR /* pnor_dat_5 */ + 0x084 MODE_PNOR /* pnor_dat_6 */ + 0x088 MODE_PNOR /* pnor_dat_7 */ + 0x08c MODE_PNOR /* pnor_dat_8 */ + 0x090 MODE_PNOR /* pnor_dat_9 */ + 0x094 MODE_PNOR /* pnor_dat_10 */ + 0x098 MODE_PNOR /* pnor_dat_11 */ + 0x09c MODE_PNOR /* pnor_dat_12 */ + 0x0a0 MODE_PNOR /* pnor_dat_13 */ + 0x0a4 MODE_PNOR /* pnor_dat_14 */ + 0x0a8 MODE_PNOR /* pnor_dat_15 */ + >; + }; + + nand_pins: pinmux_nand_ce1_n { + pinctrl-single,pins = < + 0x0ac MODE_NAND /* nand_ce1_n */ + 0x0b0 MODE_NAND /* nand_ce0_n */ + 0x0b4 MODE_NAND /* nand_we_n */ + 0x0b8 MODE_NAND /* nand_wp_n */ + 0x0bc MODE_NAND /* nand_re_n */ + 0x0c0 MODE_NAND /* nand_rdy_bsy_n */ + 0x0c4 MODE_NAND /* nand_io0_0 */ + 0x0c8 MODE_NAND /* nand_io1_0 */ + 0x0cc MODE_NAND /* nand_io2_0 */ + 0x0d0 MODE_NAND /* nand_io3_0 */ + 0x0d4 MODE_NAND /* nand_io4_0 */ + 0x0d8 MODE_NAND /* nand_io5_0 */ + 0x0dc MODE_NAND /* nand_io6_0 */ + 0x0e0 MODE_NAND /* nand_io7_0 */ + 0x0e4 MODE_NAND /* nand_io8_0 */ + 0x0e8 MODE_NAND /* nand_io9_0 */ + 0x0ec MODE_NAND /* nand_io10_0 */ + 0x0f0 MODE_NAND /* nand_io11_0 */ + 0x0f4 MODE_NAND /* nand_io12_0 */ + 0x0f8 MODE_NAND /* nand_io13_0 */ + 0x0fc MODE_NAND /* nand_io14_0 */ + 0x100 MODE_NAND /* nand_io15_0 */ + 0x104 MODE_NAND /* nand_ale_0 */ + 0x108 MODE_NAND /* nand_cle_0 */ + >; + }; + + pwm0_pins: pinmux_pwm_0 { + pinctrl-single,pins = < + 0x10c MODE_NITRO + >; + }; + + pwm1_pins: pinmux_pwm_1 { + pinctrl-single,pins = < + 0x110 MODE_NITRO + >; + }; + + pwm2_pins: pinmux_pwm_2 { + pinctrl-single,pins = < + 0x114 MODE_NITRO + >; + }; + + pwm3_pins: pinmux_pwm_3 { + pinctrl-single,pins = < + 0x118 MODE_NITRO + >; + }; + + dbu_rxd_pins: pinmux_uart1_sin_nitro { + pinctrl-single,pins = < + 0x11c MODE_NITRO /* dbu_rxd */ + 0x120 MODE_NITRO /* dbu_txd */ + >; + }; + + uart1_pins: pinmux_uart1_sin_nand { + pinctrl-single,pins = < + 0x11c MODE_NAND /* uart1_sin */ + 0x120 MODE_NAND /* uart1_out */ + >; + }; + + uart2_pins: pinmux_uart2_sin { + pinctrl-single,pins = < + 0x124 MODE_NITRO /* uart2_sin */ + 0x128 MODE_NITRO /* uart2_out */ + >; + }; + + uart3_pins: pinmux_uart3_sin { + pinctrl-single,pins = < + 0x12c MODE_NITRO /* uart3_sin */ + 0x130 MODE_NITRO /* uart3_out */ + >; + }; + + i2s_pins: pinmux_i2s_bitclk { + pinctrl-single,pins = < + 0x134 MODE_NITRO /* i2s_bitclk */ + 0x138 MODE_NITRO /* i2s_sdout */ + 0x13c MODE_NITRO /* i2s_sdin */ + 0x140 MODE_NITRO /* i2s_ws */ + 0x144 MODE_NITRO /* i2s_mclk */ + 0x148 MODE_NITRO /* i2s_spdif_out */ + >; + }; + + qspi_pins: pinumx_qspi_hold_n { + pinctrl-single,pins = < + 0x14c MODE_NAND /* qspi_hold_n */ + 0x150 MODE_NAND /* qspi_wp_n */ + 0x154 MODE_NAND /* qspi_sck */ + 0x158 MODE_NAND /* qspi_cs_n */ + 0x15c MODE_NAND /* qspi_mosi */ + 0x160 MODE_NAND /* qspi_miso */ + >; + }; + + mdio_pins: pinumx_ext_mdio { + pinctrl-single,pins = < + 0x164 MODE_NITRO /* ext_mdio */ + 0x168 MODE_NITRO /* ext_mdc */ + >; + }; + + i2c0_pins: pinmux_i2c0_sda { + pinctrl-single,pins = < + 0x16c MODE_NITRO /* i2c0_sda */ + 0x170 MODE_NITRO /* i2c0_scl */ + >; + }; + + i2c1_pins: pinmux_i2c1_sda { + pinctrl-single,pins = < + 0x174 MODE_NITRO /* i2c1_sda */ + 0x178 MODE_NITRO /* i2c1_scl */ + >; + }; + + sdio0_pins: pinmux_sdio0_cd_l { + pinctrl-single,pins = < + 0x17c MODE_NITRO /* sdio0_cd_l */ + 0x180 MODE_NITRO /* sdio0_clk_sdcard */ + 0x184 MODE_NITRO /* sdio0_data0 */ + 0x188 MODE_NITRO /* sdio0_data1 */ + 0x18c MODE_NITRO /* sdio0_data2 */ + 0x190 MODE_NITRO /* sdio0_data3 */ + 0x194 MODE_NITRO /* sdio0_data4 */ + 0x198 MODE_NITRO /* sdio0_data5 */ + 0x19c MODE_NITRO /* sdio0_data6 */ + 0x1a0 MODE_NITRO /* sdio0_data7 */ + 0x1a4 MODE_NITRO /* sdio0_cmd */ + 0x1a8 MODE_NITRO /* sdio0_emmc_rst_n */ + 0x1ac MODE_NITRO /* sdio0_led_on */ + 0x1b0 MODE_NITRO /* sdio0_wp */ + >; + }; + + sdio1_pins: pinmux_sdio1_cd_l { + pinctrl-single,pins = < + 0x1b4 MODE_NITRO /* sdio1_cd_l */ + 0x1b8 MODE_NITRO /* sdio1_clk_sdcard */ + 0x1bc MODE_NITRO /* sdio1_data0 */ + 0x1c0 MODE_NITRO /* sdio1_data1 */ + 0x1c4 MODE_NITRO /* sdio1_data2 */ + 0x1c8 MODE_NITRO /* sdio1_data3 */ + 0x1cc MODE_NITRO /* sdio1_data4 */ + 0x1d0 MODE_NITRO /* sdio1_data5 */ + 0x1d4 MODE_NITRO /* sdio1_data6 */ + 0x1d8 MODE_NITRO /* sdio1_data7 */ + 0x1dc MODE_NITRO /* sdio1_cmd */ + 0x1e0 MODE_NITRO /* sdio1_emmc_rst_n */ + 0x1e4 MODE_NITRO /* sdio1_led_on */ + 0x1e8 MODE_NITRO /* sdio1_wp */ + >; + }; + + spi0_pins: pinmux_spi0_sck_nand { + pinctrl-single,pins = < + 0x1ec MODE_NITRO /* spi0_sck */ + 0x1f0 MODE_NITRO /* spi0_rxd */ + 0x1f4 MODE_NITRO /* spi0_fss */ + 0x1f8 MODE_NITRO /* spi0_txd */ + >; + }; + + spi1_pins: pinmux_spi1_sck_nand { + pinctrl-single,pins = < + 0x1fc MODE_NITRO /* spi1_sck */ + 0x200 MODE_NITRO /* spi1_rxd */ + 0x204 MODE_NITRO /* spi1_fss */ + 0x208 MODE_NITRO /* spi1_txd */ + >; + }; + + nuart_pins: pinmux_uart0_sin_nitro { + pinctrl-single,pins = < + 0x20c MODE_NITRO /* nuart_rxd */ + 0x210 MODE_NITRO /* nuart_txd */ + >; + }; + + uart0_pins: pinumux_uart0_sin_nand { + pinctrl-single,pins = < + 0x20c MODE_NAND /* uart0_sin */ + 0x210 MODE_NAND /* uart0_out */ + 0x214 MODE_NAND /* uart0_rts */ + 0x218 MODE_NAND /* uart0_cts */ + 0x21c MODE_NAND /* uart0_dtr */ + 0x220 MODE_NAND /* uart0_dcd */ + 0x224 MODE_NAND /* uart0_dsr */ + 0x228 MODE_NAND /* uart0_ri */ + >; + }; + + drdu2_pins: pinmux_drdu2_overcurrent { + pinctrl-single,pins = < + 0x22c MODE_NITRO /* drdu2_overcurrent */ + 0x230 MODE_NITRO /* drdu2_vbus_ppc */ + 0x234 MODE_NITRO /* drdu2_vbus_present */ + 0x238 MODE_NITRO /* drdu2_id */ + >; + }; + + drdu3_pins: pinmux_drdu3_overcurrent { + pinctrl-single,pins = < + 0x23c MODE_NITRO /* drdu3_overcurrent */ + 0x240 MODE_NITRO /* drdu3_vbus_ppc */ + 0x244 MODE_NITRO /* drdu3_vbus_present */ + 0x248 MODE_NITRO /* drdu3_id */ + >; + }; + + usb3h_pins: pinmux_usb3h_overcurrent { + pinctrl-single,pins = < + 0x24c MODE_NITRO /* usb3h_overcurrent */ + 0x250 MODE_NITRO /* usb3h_vbus_ppc */ + >; + }; + }; diff --git a/src/arm64/broadcom/stingray/stingray.dtsi b/src/arm64/broadcom/stingray/stingray.dtsi new file mode 100644 index 000000000000..49933cf16c92 --- /dev/null +++ b/src/arm64/broadcom/stingray/stingray.dtsi @@ -0,0 +1,460 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +/ { + compatible = "brcm,stingray"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@000 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@001 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x201>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + cpu@301 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x301>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + CLUSTER0_L2: l2-cache@000 { + compatible = "cache"; + }; + + CLUSTER1_L2: l2-cache@100 { + compatible = "cache"; + }; + + CLUSTER2_L2: l2-cache@200 { + compatible = "cache"; + }; + + CLUSTER3_L2: l2-cache@300 { + compatible = "cache"; + }; + }; + + memory: memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x40000000>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + scr { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x61000000 0x05000000>; + + gic: interrupt-controller@02c00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-controller; + reg = <0x02c00000 0x010000>, /* GICD */ + <0x02e00000 0x600000>; /* GICR */ + interrupts = ; + + gic_its: gic-its@63c20000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x02c20000 0x10000>; + }; + }; + + smmu: mmu@03000000 { + compatible = "arm,mmu-500"; + reg = <0x03000000 0x80000>; + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #iommu-cells = <2>; + }; + }; + + crmu: crmu { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x66400000 0x100000>; + + #include "stingray-clock.dtsi" + + gpio_crmu: gpio@00024800 { + compatible = "brcm,iproc-gpio"; + reg = <0x00024800 0x4c>; + ngpios = <6>; + #gpio-cells = <2>; + gpio-controller; + }; + }; + + hsls { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x68900000 0x17700000>; + + #include "stingray-pinctrl.dtsi" + + pwm: pwm@00010000 { + compatible = "brcm,iproc-pwm"; + reg = <0x00010000 0x1000>; + clocks = <&crmu_ref25m>; + #pwm-cells = <3>; + status = "disabled"; + }; + + i2c0: i2c@000b0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000b0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + + wdt0: watchdog@000c0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x000c0000 0x1000>; + interrupts = ; + clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>; + clock-names = "wdogclk", "apb_pclk"; + }; + + gpio_hsls: gpio@000d0000 { + compatible = "brcm,iproc-gpio"; + reg = <0x000d0000 0x864>; + ngpios = <151>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + interrupts = ; + gpio-ranges = <&pinmux 0 0 16>, + <&pinmux 16 71 2>, + <&pinmux 18 131 8>, + <&pinmux 26 83 6>, + <&pinmux 32 123 4>, + <&pinmux 36 43 24>, + <&pinmux 60 89 2>, + <&pinmux 62 73 4>, + <&pinmux 66 95 28>, + <&pinmux 94 127 4>, + <&pinmux 98 139 10>, + <&pinmux 108 16 27>, + <&pinmux 135 77 6>, + <&pinmux 141 67 4>, + <&pinmux 145 149 6>, + <&pinmux 151 91 4>; + }; + + i2c1: i2c@000e0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000e0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + + uart0: uart@00100000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00100000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart1: uart@00110000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00110000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart2: uart@00120000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00120000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart3: uart@00130000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00130000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + ssp0: ssp@00180000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00180000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ssp1: ssp@00190000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00190000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hwrng: hwrng@00220000 { + compatible = "brcm,iproc-rng200"; + reg = <0x00220000 0x28>; + }; + + dma0: dma@00310000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x00310000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + clocks = <&hsls_div2_clk>; + clock-names = "apb_pclk"; + iommus = <&smmu 0x6000 0x0000>; + }; + + nand: nand@00360000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x00360000 0x600>, + <0x0050a408 0x600>, + <0x00360f00 0x20>; + reg-names = "nand", "iproc-idm", "iproc-ext"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + brcm,nand-has-wp; + status = "disabled"; + }; + + sdio0: sdhci@003f1000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f1000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio0_clk>; + iommus = <&smmu 0x6002 0x0000>; + status = "disabled"; + }; + + sdio1: sdhci@003f2000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f2000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio1_clk>; + iommus = <&smmu 0x6003 0x0000>; + status = "disabled"; + }; + }; +}; diff --git a/src/arm64/exynos/exynos5433-tm2.dts b/src/arm64/exynos/exynos5433-tm2.dts index 3ff95277a8ec..23191eb9397c 100644 --- a/src/arm64/exynos/exynos5433-tm2.dts +++ b/src/arm64/exynos/exynos5433-tm2.dts @@ -60,7 +60,6 @@ vci-supply = <&ldo28_reg>; reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>; enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>; - te-gpios = <&gpf1 3 GPIO_ACTIVE_HIGH>; }; }; diff --git a/src/arm64/freescale/fsl-ls1012a-frdm.dts b/src/arm64/freescale/fsl-ls1012a-frdm.dts index 17fae8112e4d..7286b1ebfd7a 100644 --- a/src/arm64/freescale/fsl-ls1012a-frdm.dts +++ b/src/arm64/freescale/fsl-ls1012a-frdm.dts @@ -1,7 +1,7 @@ /* * Device Tree file for Freescale LS1012A Freedom Board. * - * Copyright 2016, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. * * This file is dual-licensed: you can use it either under the terms * of the GPLv2 or the X11 license, at your option. Note that this dual diff --git a/src/arm64/freescale/fsl-ls1012a-qds.dts b/src/arm64/freescale/fsl-ls1012a-qds.dts index e2a93d53d3d8..8c013b54db14 100644 --- a/src/arm64/freescale/fsl-ls1012a-qds.dts +++ b/src/arm64/freescale/fsl-ls1012a-qds.dts @@ -1,7 +1,7 @@ /* * Device Tree file for Freescale LS1012A QDS Board. * - * Copyright 2016, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. * * This file is dual-licensed: you can use it either under the terms * of the GPLv2 or the X11 license, at your option. Note that this dual @@ -97,6 +97,14 @@ status = "okay"; }; +&esdhc0 { + status = "okay"; +}; + +&esdhc1 { + status = "okay"; +}; + &i2c0 { status = "okay"; diff --git a/src/arm64/freescale/fsl-ls1012a-rdb.dts b/src/arm64/freescale/fsl-ls1012a-rdb.dts index ed77f6b0937b..c1a119effa61 100644 --- a/src/arm64/freescale/fsl-ls1012a-rdb.dts +++ b/src/arm64/freescale/fsl-ls1012a-rdb.dts @@ -1,7 +1,7 @@ /* * Device Tree file for Freescale LS1012A RDB Board. * - * Copyright 2016, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. * * This file is dual-licensed: you can use it either under the terms * of the GPLv2 or the X11 license, at your option. Note that this dual @@ -54,6 +54,19 @@ status = "okay"; }; +&esdhc0 { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; + status = "okay"; +}; + +&esdhc1 { + mmc-hs200-1_8v; + status = "okay"; +}; + &i2c0 { status = "okay"; }; diff --git a/src/arm64/freescale/fsl-ls1012a.dtsi b/src/arm64/freescale/fsl-ls1012a.dtsi index b497ac196ccc..b1554cbd2c54 100644 --- a/src/arm64/freescale/fsl-ls1012a.dtsi +++ b/src/arm64/freescale/fsl-ls1012a.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1012A family SoC. * - * Copyright 2016, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. * * This file is dual-licensed: you can use it either under the terms * of the GPLv2 or the X11 license, at your option. Note that this dual @@ -76,10 +76,17 @@ sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; + clock-frequency = <125000000>; clock-output-names = "sysclk"; }; + coreclk: coreclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "coreclk"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */ @@ -117,12 +124,37 @@ #size-cells = <2>; ranges; + esdhc0: esdhc@1560000 { + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; + reg = <0x0 0x1560000 0x0 0x10000>; + interrupts = <0 62 0x4>; + clocks = <&clockgen 4 0>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + big-endian; + bus-width = <4>; + status = "disabled"; + }; + scfg: scfg@1570000 { compatible = "fsl,ls1012a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>; big-endian; }; + esdhc1: esdhc@1580000 { + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; + reg = <0x0 0x1580000 0x0 0x10000>; + interrupts = <0 65 0x4>; + clocks = <&clockgen 4 0>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + big-endian; + broken-cd; + bus-width = <4>; + status = "disabled"; + }; + crypto: crypto@1700000 { compatible = "fsl,sec-v5.4", "fsl,sec-v5.0", "fsl,sec-v4.0"; @@ -223,7 +255,8 @@ compatible = "fsl,ls1012a-clockgen"; reg = <0x0 0x1ee1000 0x0 0x1000>; #clock-cells = <2>; - clocks = <&sysclk>; + clocks = <&sysclk &coreclk>; + clock-names = "sysclk", "coreclk"; }; tmu: tmu@1f00000 { diff --git a/src/arm64/freescale/fsl-ls1043-post.dtsi b/src/arm64/freescale/fsl-ls1043-post.dtsi new file mode 100644 index 000000000000..169e171407a6 --- /dev/null +++ b/src/arm64/freescale/fsl-ls1043-post.dtsi @@ -0,0 +1,45 @@ +/* + * QorIQ FMan v3 device tree nodes for ls1043 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" + +}; + +&fman0 { + /* these aliases provide the FMan ports mapping */ + enet0: ethernet@e0000 { + }; + + enet1: ethernet@e2000 { + }; + + enet2: ethernet@e4000 { + }; + + enet3: ethernet@e6000 { + }; + + enet4: ethernet@e8000 { + }; + + enet5: ethernet@ea000 { + }; + + enet6: ethernet@f0000 { + }; +}; diff --git a/src/arm64/freescale/fsl-ls1043a-qds.dts b/src/arm64/freescale/fsl-ls1043a-qds.dts index 0989d635b558..6341281485cf 100644 --- a/src/arm64/freescale/fsl-ls1043a-qds.dts +++ b/src/arm64/freescale/fsl-ls1043a-qds.dts @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1043A family SoC. * - * Copyright 2014-2015, Freescale Semiconductor + * Copyright 2014-2015 Freescale Semiconductor, Inc. * * Mingkai Hu * @@ -181,3 +181,5 @@ reg = <0>; }; }; + +#include "fsl-ls1043-post.dtsi" diff --git a/src/arm64/freescale/fsl-ls1043a-rdb.dts b/src/arm64/freescale/fsl-ls1043a-rdb.dts index c37110bc1506..3dc0c8e9663d 100644 --- a/src/arm64/freescale/fsl-ls1043a-rdb.dts +++ b/src/arm64/freescale/fsl-ls1043a-rdb.dts @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1043A family SoC. * - * Copyright 2014-2015, Freescale Semiconductor + * Copyright 2014-2015 Freescale Semiconductor, Inc. * * Mingkai Hu * @@ -75,11 +75,11 @@ reg = <0x4c>; }; eeprom@52 { - compatible = "at24,24c512"; + compatible = "atmel,24c512"; reg = <0x52>; }; eeprom@53 { - compatible = "at24,24c512"; + compatible = "atmel,24c512"; reg = <0x53>; }; rtc@68 { @@ -139,3 +139,76 @@ &duart1 { status = "okay"; }; + +#include "fsl-ls1043-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy1>; + phy-connection-type = "qsgmii"; + }; + + ethernet@e2000 { + phy-handle = <&qsgmii_phy2>; + phy-connection-type = "qsgmii"; + }; + + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-txid"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-txid"; + }; + + ethernet@e8000 { + phy-handle = <&qsgmii_phy3>; + phy-connection-type = "qsgmii"; + }; + + ethernet@ea000 { + phy-handle = <&qsgmii_phy4>; + phy-connection-type = "qsgmii"; + }; + + ethernet@f0000 { /* 10GEC1 */ + phy-handle = <&aqr105_phy>; + phy-connection-type = "xgmii"; + }; + + mdio@fc000 { + rgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + qsgmii_phy1: ethernet-phy@4 { + reg = <0x4>; + }; + + qsgmii_phy2: ethernet-phy@5 { + reg = <0x5>; + }; + + qsgmii_phy3: ethernet-phy@6 { + reg = <0x6>; + }; + + qsgmii_phy4: ethernet-phy@7 { + reg = <0x7>; + }; + }; + + mdio@fd000 { + aqr105_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 132 4>; + reg = <0x1>; + }; + }; +}; diff --git a/src/arm64/freescale/fsl-ls1043a.dtsi b/src/arm64/freescale/fsl-ls1043a.dtsi index 45cface08cbb..31fd77f82ced 100644 --- a/src/arm64/freescale/fsl-ls1043a.dtsi +++ b/src/arm64/freescale/fsl-ls1043a.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1043A family SoC. * - * Copyright 2014-2015, Freescale Semiconductor + * Copyright 2014-2015 Freescale Semiconductor, Inc. * * Mingkai Hu * @@ -45,6 +45,7 @@ */ #include +#include / { compatible = "fsl,ls1043a"; @@ -52,6 +53,17 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + fman0 = &fman0; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + ethernet6 = &enet6; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -106,6 +118,33 @@ /* DRAM space 1, size: 2GiB DRAM */ }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + bman_fbpr: bman-fbpr { + compatible = "shared-dma-pool"; + size = <0 0x1000000>; + alignment = <0 0x1000000>; + no-map; + }; + + qman_fqd: qman-fqd { + compatible = "shared-dma-pool"; + size = <0 0x400000>; + alignment = <0 0x400000>; + no-map; + }; + + qman_pfdr: qman-pfdr { + compatible = "shared-dma-pool"; + size = <0 0x2000000>; + alignment = <0 0x2000000>; + no-map; + }; + }; + sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -152,7 +191,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -223,6 +262,7 @@ ifc: ifc@1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; + big-endian; interrupts = <0 43 0x4>; }; @@ -333,6 +373,28 @@ }; }; + qman: qman@1880000 { + compatible = "fsl,qman"; + reg = <0x0 0x1880000 0x0 0x10000>; + interrupts = <0 45 0x4>; + memory-region = <&qman_fqd &qman_pfdr>; + }; + + bman: bman@1890000 { + compatible = "fsl,bman"; + reg = <0x0 0x1890000 0x0 0x10000>; + interrupts = <0 45 0x4>; + memory-region = <&bman_fbpr>; + }; + + bportals: bman-portals@508000000 { + ranges = <0x0 0x5 0x08000000 0x8000000>; + }; + + qportals: qman-portals@500000000 { + ranges = <0x0 0x5 0x00000000 0x8000000>; + }; + dspi0: dspi@2100000 { compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi"; #address-cells = <1>; @@ -688,3 +750,6 @@ }; }; + +#include "qoriq-qman-portals.dtsi" +#include "qoriq-bman-portals.dtsi" diff --git a/src/arm64/freescale/fsl-ls1046-post.dtsi b/src/arm64/freescale/fsl-ls1046-post.dtsi new file mode 100644 index 000000000000..f5017dba0f17 --- /dev/null +++ b/src/arm64/freescale/fsl-ls1046-post.dtsi @@ -0,0 +1,48 @@ +/* + * QorIQ FMan v3 device tree nodes for ls1046 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" +#include "qoriq-fman3-0-10g-1.dtsi" +}; + +&fman0 { + /* these aliases provide the FMan ports mapping */ + enet0: ethernet@e0000 { + }; + + enet1: ethernet@e2000 { + }; + + enet2: ethernet@e4000 { + }; + + enet3: ethernet@e6000 { + }; + + enet4: ethernet@e8000 { + }; + + enet5: ethernet@ea000 { + }; + + enet6: ethernet@f0000 { + }; + + enet7: ethernet@f2000 { + }; +}; diff --git a/src/arm64/freescale/fsl-ls1046a-qds.dts b/src/arm64/freescale/fsl-ls1046a-qds.dts index 290e5b014414..434383bade0e 100644 --- a/src/arm64/freescale/fsl-ls1046a-qds.dts +++ b/src/arm64/freescale/fsl-ls1046a-qds.dts @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1046A family SoC. * - * Copyright 2016, Freescale Semiconductor, Inc. + * Copyright 2016 Freescale Semiconductor, Inc. * * Shaohui Xie * @@ -210,3 +210,5 @@ reg = <0>; }; }; + +#include "fsl-ls1046-post.dtsi" diff --git a/src/arm64/freescale/fsl-ls1046a-rdb.dts b/src/arm64/freescale/fsl-ls1046a-rdb.dts index d1ccc000d05a..5dc2782e2a58 100644 --- a/src/arm64/freescale/fsl-ls1046a-rdb.dts +++ b/src/arm64/freescale/fsl-ls1046a-rdb.dts @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1046A family SoC. * - * Copyright 2016, Freescale Semiconductor, Inc. + * Copyright 2016 Freescale Semiconductor, Inc. * * Mingkai Hu * @@ -72,6 +72,14 @@ status = "okay"; }; +&esdhc { + mmc-hs200-1_8v; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; +}; + &i2c0 { status = "okay"; @@ -148,3 +156,63 @@ reg = <1>; }; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + ethernet@e8000 { + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + }; + + ethernet@ea000 { + phy-handle = <&sgmii_phy2>; + phy-connection-type = "sgmii"; + }; + + ethernet@f0000 { /* 10GEC1 */ + phy-handle = <&aqr106_phy>; + phy-connection-type = "xgmii"; + }; + + ethernet@f2000 { /* 10GEC2 */ + fixed-link = <0 1 1000 0 0>; + phy-connection-type = "xgmii"; + }; + + mdio@fc000 { + rgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + sgmii_phy1: ethernet-phy@3 { + reg = <0x3>; + }; + + sgmii_phy2: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + mdio@fd000 { + aqr106_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 131 4>; + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/fsl-ls1046a.dtsi b/src/arm64/freescale/fsl-ls1046a.dtsi index f4b8b7edaf9d..dc1640be0345 100644 --- a/src/arm64/freescale/fsl-ls1046a.dtsi +++ b/src/arm64/freescale/fsl-ls1046a.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-1046A family SoC. * - * Copyright 2016, Freescale Semiconductor, Inc. + * Copyright 2016 Freescale Semiconductor, Inc. * * Mingkai Hu * @@ -55,6 +55,15 @@ aliases { crypto = &crypto; + fman0 = &fman0; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + ethernet6 = &enet6; + ethernet7 = &enet7; }; cpus { @@ -174,7 +183,7 @@ IRQ_TYPE_LEVEL_LOW)>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -190,6 +199,7 @@ ifc: ifc@1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; + big-endian; interrupts = ; }; @@ -209,10 +219,10 @@ }; esdhc: esdhc@1560000 { - compatible = "fsl,esdhc"; + compatible = "fsl,ls1046a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; interrupts = ; - clock-frequency = <0>; + clocks = <&clockgen 2 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian; @@ -268,6 +278,30 @@ }; }; + qman: qman@1880000 { + compatible = "fsl,qman"; + reg = <0x0 0x1880000 0x0 0x10000>; + interrupts = <0 45 0x4>; + memory-region = <&qman_fqd &qman_pfdr>; + + }; + + bman: bman@1890000 { + compatible = "fsl,bman"; + reg = <0x0 0x1890000 0x0 0x10000>; + interrupts = <0 45 0x4>; + memory-region = <&bman_fbpr>; + + }; + + qportals: qman-portals@500000000 { + ranges = <0x0 0x5 0x00000000 0x8000000>; + }; + + bportals: bman-portals@508000000 { + ranges = <0x0 0x5 0x08000000 0x8000000>; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x10000>; @@ -567,6 +601,7 @@ interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; }; usb1: usb@3000000 { @@ -575,6 +610,7 @@ interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; }; usb2: usb@3100000 { @@ -583,6 +619,7 @@ interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; }; sata: sata@3200000 { @@ -594,4 +631,34 @@ clocks = <&clockgen 4 1>; }; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + bman_fbpr: bman-fbpr { + compatible = "shared-dma-pool"; + size = <0 0x1000000>; + alignment = <0 0x1000000>; + no-map; + }; + + qman_fqd: qman-fqd { + compatible = "shared-dma-pool"; + size = <0 0x800000>; + alignment = <0 0x800000>; + no-map; + }; + + qman_pfdr: qman-pfdr { + compatible = "shared-dma-pool"; + size = <0 0x2000000>; + alignment = <0 0x2000000>; + no-map; + }; + }; }; + +#include "qoriq-qman-portals.dtsi" +#include "qoriq-bman-portals.dtsi" diff --git a/src/arm64/freescale/fsl-ls1088a-qds.dts b/src/arm64/freescale/fsl-ls1088a-qds.dts index 8c3cae530f8f..30128051d0c0 100644 --- a/src/arm64/freescale/fsl-ls1088a-qds.dts +++ b/src/arm64/freescale/fsl-ls1088a-qds.dts @@ -110,6 +110,30 @@ }; }; +&ifc { + ranges = <0 0 0x5 0x80000000 0x08000000 + 2 0 0x5 0x30000000 0x00010000 + 3 0 0x5 0x20000000 0x00010000>; + status = "okay"; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@2,0 { + compatible = "fsl,ifc-nand"; + reg = <0x2 0x0 0x10000>; + }; + + fpga: board-control@3,0 { + compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis"; + reg = <0x3 0x0 0x0000100>; + }; +}; + &duart0 { status = "okay"; }; @@ -118,6 +142,10 @@ status = "okay"; }; +&esdhc { + status = "okay"; +}; + &sata { status = "okay"; }; diff --git a/src/arm64/freescale/fsl-ls1088a-rdb.dts b/src/arm64/freescale/fsl-ls1088a-rdb.dts index 8a04fbb25cb4..213abb72de93 100644 --- a/src/arm64/freescale/fsl-ls1088a-rdb.dts +++ b/src/arm64/freescale/fsl-ls1088a-rdb.dts @@ -94,6 +94,22 @@ }; }; +&ifc { + ranges = <0 0 0x5 0x30000000 0x00010000 + 2 0 0x5 0x20000000 0x00010000>; + status = "okay"; + + nand@0,0 { + compatible = "fsl,ifc-nand"; + reg = <0x0 0x0 0x10000>; + }; + + fpga: board-control@2,0 { + compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis"; + reg = <0x2 0x0 0x0000100>; + }; +}; + &duart0 { status = "okay"; }; @@ -102,6 +118,10 @@ status = "okay"; }; +&esdhc { + status = "okay"; +}; + &sata { status = "okay"; }; diff --git a/src/arm64/freescale/fsl-ls1088a.dtsi b/src/arm64/freescale/fsl-ls1088a.dtsi index 2946fd797121..c144d06a6e33 100644 --- a/src/arm64/freescale/fsl-ls1088a.dtsi +++ b/src/arm64/freescale/fsl-ls1088a.dtsi @@ -44,6 +44,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ #include +#include / { compatible = "fsl,ls1088a"; @@ -61,6 +62,7 @@ compatible = "arm,cortex-a53"; reg = <0x0>; clocks = <&clockgen 1 0>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -89,6 +91,7 @@ compatible = "arm,cortex-a53"; reg = <0x100>; clocks = <&clockgen 1 1>; + #cooling-cells = <2>; }; cpu5: cpu@101 { @@ -153,6 +156,91 @@ clocks = <&sysclk>; }; + tmu: tmu@1f80000 { + compatible = "fsl,qoriq-tmu"; + reg = <0x0 0x1f80000 0x0 0x10000>; + interrupts = <0 23 0x4>; + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>; + fsl,tmu-calibration = + /* Calibration data group 1 */ + <0x00000000 0x00000026 + 0x00000001 0x0000002d + 0x00000002 0x00000032 + 0x00000003 0x00000039 + 0x00000004 0x0000003f + 0x00000005 0x00000046 + 0x00000006 0x0000004d + 0x00000007 0x00000054 + 0x00000008 0x0000005a + 0x00000009 0x00000061 + 0x0000000a 0x0000006a + 0x0000000b 0x00000071 + /* Calibration data group 2 */ + 0x00010000 0x00000025 + 0x00010001 0x0000002c + 0x00010002 0x00000035 + 0x00010003 0x0000003d + 0x00010004 0x00000045 + 0x00010005 0x0000004e + 0x00010006 0x00000057 + 0x00010007 0x00000061 + 0x00010008 0x0000006b + 0x00010009 0x00000076 + /* Calibration data group 3 */ + 0x00020000 0x00000029 + 0x00020001 0x00000033 + 0x00020002 0x0000003d + 0x00020003 0x00000049 + 0x00020004 0x00000056 + 0x00020005 0x00000061 + 0x00020006 0x0000006d + /* Calibration data group 4 */ + 0x00030000 0x00000021 + 0x00030001 0x0000002a + 0x00030002 0x0000003c + 0x00030003 0x0000004e>; + little-endian; + #thermal-sensor-cells = <1>; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tmu 0>; + + trips { + cpu_alert: cpu-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&cpu_alert>; + cooling-device = + <&cpu4 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + }; + duart0: serial@21c0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21c0500 0x0 0x100>; @@ -216,10 +304,6 @@ little-endian; #address-cells = <2>; #size-cells = <1>; - - ranges = <0 0 0x5 0x80000000 0x08000000 - 2 0 0x5 0x30000000 0x00010000 - 3 0 0x5 0x20000000 0x00010000>; status = "disabled"; }; @@ -263,11 +347,26 @@ status = "disabled"; }; + esdhc: esdhc@2140000 { + compatible = "fsl,ls1088a-esdhc", "fsl,esdhc"; + reg = <0x0 0x2140000 0x0 0x10000>; + interrupts = <0 28 0x4>; /* Level high type */ + clock-frequency = <0>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + little-endian; + bus-width = <4>; + status = "disabled"; + }; + sata: sata@3200000 { - compatible = "fsl,ls1088a-ahci", "fsl,ls1043a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + compatible = "fsl,ls1088a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x7 0x100520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen 4 3>; + dma-coherent; status = "disabled"; }; }; diff --git a/src/arm64/freescale/fsl-ls2080a-qds.dts b/src/arm64/freescale/fsl-ls2080a-qds.dts index c1e76dfca48e..ed209cd57283 100644 --- a/src/arm64/freescale/fsl-ls2080a-qds.dts +++ b/src/arm64/freescale/fsl-ls2080a-qds.dts @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2080a QDS Board. * - * Copyright (C) 2015-17, Freescale Semiconductor + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * Bhupesh Sharma diff --git a/src/arm64/freescale/fsl-ls2080a-rdb.dts b/src/arm64/freescale/fsl-ls2080a-rdb.dts index 18ad19587311..67ec3f9c81a1 100644 --- a/src/arm64/freescale/fsl-ls2080a-rdb.dts +++ b/src/arm64/freescale/fsl-ls2080a-rdb.dts @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2080a RDB Board. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * Bhupesh Sharma diff --git a/src/arm64/freescale/fsl-ls2080a-simu.dts b/src/arm64/freescale/fsl-ls2080a-simu.dts index 290604b0a603..3ee718f0aaf8 100644 --- a/src/arm64/freescale/fsl-ls2080a-simu.dts +++ b/src/arm64/freescale/fsl-ls2080a-simu.dts @@ -1,7 +1,7 @@ /* * Device Tree file for Freescale LS2080a software Simulator model * - * Copyright (C) 2014-2015, Freescale Semiconductor + * Copyright 2014-2015 Freescale Semiconductor, Inc. * * Bhupesh Sharma * diff --git a/src/arm64/freescale/fsl-ls2080a.dtsi b/src/arm64/freescale/fsl-ls2080a.dtsi index 46a26c021421..d789c6814e6a 100644 --- a/src/arm64/freescale/fsl-ls2080a.dtsi +++ b/src/arm64/freescale/fsl-ls2080a.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Include file for Freescale Layerscape-2080A family SoC. * - * Copyright (C) 2014-2016, Freescale Semiconductor + * Copyright 2014-2016 Freescale Semiconductor, Inc. * * Abhimanyu Saini * Bhupesh Sharma diff --git a/src/arm64/freescale/fsl-ls2088a-qds.dts b/src/arm64/freescale/fsl-ls2088a-qds.dts index ebcd6ee4da0d..4a1df5ce3229 100644 --- a/src/arm64/freescale/fsl-ls2088a-qds.dts +++ b/src/arm64/freescale/fsl-ls2088a-qds.dts @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2088A QDS Board. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * diff --git a/src/arm64/freescale/fsl-ls2088a-rdb.dts b/src/arm64/freescale/fsl-ls2088a-rdb.dts index 5992dc130faa..a76d4b4debd1 100644 --- a/src/arm64/freescale/fsl-ls2088a-rdb.dts +++ b/src/arm64/freescale/fsl-ls2088a-rdb.dts @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2088A RDB Board. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * diff --git a/src/arm64/freescale/fsl-ls2088a.dtsi b/src/arm64/freescale/fsl-ls2088a.dtsi index 33ce404cf7e4..5c695c658056 100644 --- a/src/arm64/freescale/fsl-ls2088a.dtsi +++ b/src/arm64/freescale/fsl-ls2088a.dtsi @@ -1,7 +1,8 @@ /* * Device Tree Include file for Freescale Layerscape-2088A family SoC. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * diff --git a/src/arm64/freescale/fsl-ls208xa-qds.dtsi b/src/arm64/freescale/fsl-ls208xa-qds.dtsi index 8b6204845973..b2374469a830 100644 --- a/src/arm64/freescale/fsl-ls208xa-qds.dtsi +++ b/src/arm64/freescale/fsl-ls208xa-qds.dtsi @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2080A QDS Board. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * @@ -45,6 +46,7 @@ */ &esdhc { + mmc-hs200-1_8v; status = "okay"; }; diff --git a/src/arm64/freescale/fsl-ls208xa-rdb.dtsi b/src/arm64/freescale/fsl-ls208xa-rdb.dtsi index 3737587ffb33..9a1d0d2ab1c3 100644 --- a/src/arm64/freescale/fsl-ls208xa-rdb.dtsi +++ b/src/arm64/freescale/fsl-ls208xa-rdb.dtsi @@ -1,7 +1,8 @@ /* * Device Tree file for Freescale LS2080A RDB Board. * - * Copyright (C) 2016-17, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * diff --git a/src/arm64/freescale/fsl-ls208xa.dtsi b/src/arm64/freescale/fsl-ls208xa.dtsi index abb2fff7d162..94cdd3045037 100644 --- a/src/arm64/freescale/fsl-ls208xa.dtsi +++ b/src/arm64/freescale/fsl-ls208xa.dtsi @@ -1,7 +1,8 @@ /* * Device Tree Include file for Freescale Layerscape-2080A family SoC. * - * Copyright (C) 2016-2017, Freescale Semiconductor + * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * Abhimanyu Saini * @@ -471,7 +472,7 @@ compatible = "fsl,ls2080a-esdhc", "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; interrupts = <0 28 0x4>; /* Level high type */ - clock-frequency = <0>; /* Updated by bootloader */ + clocks = <&clockgen 4 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; little-endian; diff --git a/src/arm64/freescale/qoriq-bman-portals.dtsi b/src/arm64/freescale/qoriq-bman-portals.dtsi new file mode 100644 index 000000000000..c3c2be4f5072 --- /dev/null +++ b/src/arm64/freescale/qoriq-bman-portals.dtsi @@ -0,0 +1,71 @@ +/* + * QorIQ BMan Portals device tree + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&bportals { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + + bman-portal@0 { + /* + * bootloader fix-ups are expected to provide the + * "fsl,bman-portal-" compatible + */ + compatible = "fsl,bman-portal"; + reg = <0x0 0x4000>, <0x4000000 0x4000>; + interrupts = ; + }; + + bman-portal@10000 { + compatible = "fsl,bman-portal"; + reg = <0x10000 0x4000>, <0x4010000 0x4000>; + interrupts = ; + }; + + bman-portal@20000 { + compatible = "fsl,bman-portal"; + reg = <0x20000 0x4000>, <0x4020000 0x4000>; + interrupts = ; + }; + + bman-portal@30000 { + compatible = "fsl,bman-portal"; + reg = <0x30000 0x4000>, <0x4030000 0x4000>; + interrupts = ; + }; + + bman-portal@40000 { + compatible = "fsl,bman-portal"; + reg = <0x40000 0x4000>, <0x4040000 0x4000>; + interrupts = ; + }; + + bman-portal@50000 { + compatible = "fsl,bman-portal"; + reg = <0x50000 0x4000>, <0x4050000 0x4000>; + interrupts = ; + }; + + bman-portal@60000 { + compatible = "fsl,bman-portal"; + reg = <0x60000 0x4000>, <0x4060000 0x4000>; + interrupts = ; + }; + + bman-portal@70000 { + compatible = "fsl,bman-portal"; + reg = <0x70000 0x4000>, <0x4070000 0x4000>; + interrupts = ; + }; + + bman-portal@80000 { + compatible = "fsl,bman-portal"; + reg = <0x80000 0x4000>, <0x4080000 0x4000>; + interrupts = ; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-10g-0.dtsi b/src/arm64/freescale/qoriq-fman3-0-10g-0.dtsi new file mode 100644 index 000000000000..ecdffe731b98 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-10g-0.dtsi @@ -0,0 +1,42 @@ +/* + * QorIQ FMan v3 10g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x10: port@90000 { + cell-index = <0x10>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x90000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x30: port@b0000 { + cell-index = <0x30>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb0000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f0000 { + cell-index = <0x8>; + compatible = "fsl,fman-memac"; + reg = <0xf0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>; + pcsphy-handle = <&pcsphy6>; + }; + + mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + + pcsphy6: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-10g-1.dtsi b/src/arm64/freescale/qoriq-fman3-0-10g-1.dtsi new file mode 100644 index 000000000000..a7f6af56b6a5 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-10g-1.dtsi @@ -0,0 +1,42 @@ +/* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x11: port@91000 { + cell-index = <0x11>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x91000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x31: port@b1000 { + cell-index = <0x31>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb1000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; + pcsphy-handle = <&pcsphy7>; + }; + + mdio@f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf3000 0x1000>; + + pcsphy7: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-0.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-0.dtsi new file mode 100644 index 000000000000..d600786719fb --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-0.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x08: port@88000 { + cell-index = <0x8>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x88000 0x1000>; + }; + + fman0_tx_0x28: port@a8000 { + cell-index = <0x28>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa8000 0x1000>; + }; + + ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,fman-memac"; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy0>; + }; + + mdio@e1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe1000 0x1000>; + + pcsphy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-1.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-1.dtsi new file mode 100644 index 000000000000..3c0b76d43043 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-1.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x09: port@89000 { + cell-index = <0x9>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x89000 0x1000>; + }; + + fman0_tx_0x29: port@a9000 { + cell-index = <0x29>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa9000 0x1000>; + }; + + ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,fman-memac"; + reg = <0xe2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy1>; + }; + + mdio@e3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe3000 0x1000>; + + pcsphy1: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-2.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-2.dtsi new file mode 100644 index 000000000000..89633afca26a --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-2.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #2 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x0a: port@8a000 { + cell-index = <0xa>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8a000 0x1000>; + }; + + fman0_tx_0x2a: port@aa000 { + cell-index = <0x2a>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xaa000 0x1000>; + }; + + ethernet@e4000 { + cell-index = <2>; + compatible = "fsl,fman-memac"; + reg = <0xe4000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy2>; + }; + + mdio@e5000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe5000 0x1000>; + + pcsphy2: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-3.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-3.dtsi new file mode 100644 index 000000000000..87c2b705b1f9 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-3.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x0b: port@8b000 { + cell-index = <0xb>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8b000 0x1000>; + }; + + fman0_tx_0x2b: port@ab000 { + cell-index = <0x2b>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xab000 0x1000>; + }; + + ethernet@e6000 { + cell-index = <3>; + compatible = "fsl,fman-memac"; + reg = <0xe6000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy3>; + }; + + mdio@e7000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe7000 0x1000>; + + pcsphy3: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-4.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-4.dtsi new file mode 100644 index 000000000000..8f4d74b96b67 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-4.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #4 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x0c: port@8c000 { + cell-index = <0xc>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8c000 0x1000>; + }; + + fman0_tx_0x2c: port@ac000 { + cell-index = <0x2c>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xac000 0x1000>; + }; + + ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,fman-memac"; + reg = <0xe8000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy4>; + }; + + mdio@e9000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe9000 0x1000>; + + pcsphy4: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0-1g-5.dtsi b/src/arm64/freescale/qoriq-fman3-0-1g-5.dtsi new file mode 100644 index 000000000000..d534f770f729 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0-1g-5.dtsi @@ -0,0 +1,41 @@ +/* + * QorIQ FMan v3 1g port #5 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x0d: port@8d000 { + cell-index = <0xd>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8d000 0x1000>; + }; + + fman0_tx_0x2d: port@ad000 { + cell-index = <0x2d>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xad000 0x1000>; + }; + + ethernet@ea000 { + cell-index = <5>; + compatible = "fsl,fman-memac"; + reg = <0xea000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy5>; + }; + + mdio@eb000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xeb000 0x1000>; + + pcsphy5: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/src/arm64/freescale/qoriq-fman3-0.dtsi b/src/arm64/freescale/qoriq-fman3-0.dtsi new file mode 100644 index 000000000000..4dd06767f839 --- /dev/null +++ b/src/arm64/freescale/qoriq-fman3-0.dtsi @@ -0,0 +1,81 @@ +/* + * QorIQ FMan v3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman0: fman@1a00000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,fman"; + ranges = <0x0 0x0 0x1a00000 0x100000>; + reg = <0x0 0x1a00000 0x0 0x100000>; + interrupts = , + ; + clocks = <&clockgen 3 0>; + clock-names = "fmanclk"; + fsl,qman-channel-range = <0x800 0x10>; + + muram@0 { + compatible = "fsl,fman-muram"; + reg = <0x0 0x60000>; + }; + + fman0_oh_0x2: port@82000 { + cell-index = <0x2>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x82000 0x1000>; + }; + + fman0_oh_0x3: port@83000 { + cell-index = <0x3>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x83000 0x1000>; + }; + + fman0_oh_0x4: port@84000 { + cell-index = <0x4>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x84000 0x1000>; + }; + + fman0_oh_0x5: port@85000 { + cell-index = <0x5>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x85000 0x1000>; + }; + + fman0_oh_0x6: port@86000 { + cell-index = <0x6>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x86000 0x1000>; + }; + + fman0_oh_0x7: port@87000 { + cell-index = <0x7>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x87000 0x1000>; + }; + + mdio0: mdio@fc000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfc000 0x1000>; + }; + + xmdio0: mdio@fd000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfd000 0x1000>; + }; + + ptp_timer0: ptp-timer@fe000 { + compatible = "fsl,fman-ptp-timer"; + reg = <0xfe000 0x1000>; + }; +}; diff --git a/src/arm64/freescale/qoriq-qman-portals.dtsi b/src/arm64/freescale/qoriq-qman-portals.dtsi new file mode 100644 index 000000000000..2a9aa060efda --- /dev/null +++ b/src/arm64/freescale/qoriq-qman-portals.dtsi @@ -0,0 +1,80 @@ +/* + * QorIQ QMan Portals device tree + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&qportals { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + + qportal0: qman-portal@0 { + /* + * bootloader fix-ups are expected to provide the + * "fsl,bman-portal-" compatible + */ + compatible = "fsl,qman-portal"; + reg = <0x0 0x4000>, <0x4000000 0x4000>; + interrupts = ; + cell-index = <0>; + }; + + qportal1: qman-portal@10000 { + compatible = "fsl,qman-portal"; + reg = <0x10000 0x4000>, <0x4010000 0x4000>; + interrupts = ; + cell-index = <1>; + }; + + qportal2: qman-portal@20000 { + compatible = "fsl,qman-portal"; + reg = <0x20000 0x4000>, <0x4020000 0x4000>; + interrupts = ; + cell-index = <2>; + }; + + qportal3: qman-portal@30000 { + compatible = "fsl,qman-portal"; + reg = <0x30000 0x4000>, <0x4030000 0x4000>; + interrupts = ; + cell-index = <3>; + }; + + qportal4: qman-portal@40000 { + compatible = "fsl,qman-portal"; + reg = <0x40000 0x4000>, <0x4040000 0x4000>; + interrupts = ; + cell-index = <4>; + }; + + qportal5: qman-portal@50000 { + compatible = "fsl,qman-portal"; + reg = <0x50000 0x4000>, <0x4050000 0x4000>; + interrupts = ; + cell-index = <5>; + }; + + qportal6: qman-portal@60000 { + compatible = "fsl,qman-portal"; + reg = <0x60000 0x4000>, <0x4060000 0x4000>; + interrupts = ; + cell-index = <6>; + }; + + qportal7: qman-portal@70000 { + compatible = "fsl,qman-portal"; + reg = <0x70000 0x4000>, <0x4070000 0x4000>; + interrupts = ; + cell-index = <7>; + }; + + qportal8: qman-portal@80000 { + compatible = "fsl,qman-portal"; + reg = <0x80000 0x4000>, <0x4080000 0x4000>; + interrupts = ; + cell-index = <8>; + }; +}; diff --git a/src/arm64/hisilicon/hi3660-hikey960.dts b/src/arm64/hisilicon/hi3660-hikey960.dts index 186251ffc6b2..6609b0fe7a8b 100644 --- a/src/arm64/hisilicon/hi3660-hikey960.dts +++ b/src/arm64/hisilicon/hi3660-hikey960.dts @@ -9,17 +9,28 @@ #include "hi3660.dtsi" #include "hikey960-pinctrl.dtsi" +#include +#include +#include / { model = "HiKey960"; - compatible = "hisilicon,hi3660"; + compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; aliases { - serial5 = &uart5; /* console UART */ + mshc1 = &dwmmc1; + mshc2 = &dwmmc2; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; }; chosen { - stdout-path = "serial5:115200n8"; + stdout-path = "serial6:115200n8"; }; memory@0 { @@ -27,8 +38,206 @@ /* rewrite this at bootloader */ reg = <0x0 0x0 0x0 0x0>; }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>; + + power { + wakeup-source; + gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + user_led1 { + label = "user_led1"; + /* gpio_150_user_led1 */ + gpios = <&gpio18 6 0>; + linux,default-trigger = "heartbeat"; + }; + + user_led2 { + label = "user_led2"; + /* gpio_151_user_led2 */ + gpios = <&gpio18 7 0>; + linux,default-trigger = "mmc0"; + }; + + user_led3 { + label = "user_led3"; + /* gpio_189_user_led3 */ + gpios = <&gpio23 5 0>; + default-state = "off"; + }; + + user_led4 { + label = "user_led4"; + /* gpio_190_user_led4 */ + gpios = <&gpio23 6 0>; + linux,default-trigger = "cpu0"; + }; + + wlan_active_led { + label = "wifi_active"; + /* gpio_205_wifi_active */ + gpios = <&gpio25 5 0>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + bt_active_led { + label = "bt_active"; + gpios = <&gpio25 7 0>; + /* gpio_207_user_led1 */ + linux,default-trigger = "hci0-power"; + default-state = "off"; + }; + }; + + pmic: pmic@fff34000 { + compatible = "hisilicon,hi6421v530-pmic"; + reg = <0x0 0xfff34000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + ldo3: LDO3 { /* HDMI */ + regulator-name = "VOUT3_1V85"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo9: LDO9 { /* SDCARD I/O */ + regulator-name = "VOUT9_1V8_2V95"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + ldo11: LDO11 { /* Low Speed Connector */ + regulator-name = "VOUT11_1V8_2V95"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + ldo15: LDO15 { /* UFS VCC */ + regulator-name = "VOUT15_3V0"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo16: LDO16 { /* SD VDD */ + regulator-name = "VOUT16_2V95"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + }; + }; + + wlan_en: wlan-en-1-8v { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + /* GPIO_051_WIFI_EN */ + gpio = <&gpio6 3 0>; + + /* WLAN card specific delay */ + startup-delay-us = <70000>; + enable-active-high; + }; }; -&uart5 { +&i2c0 { + /* On Low speed expansion */ + label = "LS-I2C0"; status = "okay"; }; + +&i2c1 { + status = "okay"; + + adv7533: adv7533@39 { + status = "ok"; + compatible = "adi,adv7533"; + reg = <0x39>; + }; +}; + +&i2c7 { + /* On Low speed expansion */ + label = "LS-I2C1"; + status = "okay"; +}; + +&uart3 { + /* On Low speed expansion */ + label = "LS-UART0"; + status = "okay"; +}; + +&uart4 { + status = "okay"; + + bluetooth { + compatible = "ti,wl1837-st"; + enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>; + max-speed = <921600>; + }; +}; + +&uart6 { + /* On Low speed expansion */ + label = "LS-UART1"; + status = "okay"; +}; + +&spi2 { + /* On Low speed expansion */ + label = "LS-SPI0"; + status = "okay"; +}; + +&spi3 { + /* On High speed expansion */ + label = "HS-SPI1"; + status = "okay"; +}; + +&dwmmc1 { + vmmc-supply = <&ldo16>; + vqmmc-supply = <&ldo9>; + status = "okay"; +}; + +&dwmmc2 { /* WIFI */ + broken-cd; + /* WL_EN */ + vmmc-supply = <&wlan_en>; + ti,non-removable; + non-removable; + #address-cells = <0x1>; + #size-cells = <0x0>; + status = "ok"; + + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; /* sdio func num */ + /* WL_IRQ, GPIO_179_WL_WAKEUP_AP */ + interrupt-parent = <&gpio22>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + }; +}; diff --git a/src/arm64/hisilicon/hi3660.dtsi b/src/arm64/hisilicon/hi3660.dtsi index 3983086bd67b..c6a1961e8d55 100644 --- a/src/arm64/hisilicon/hi3660.dtsi +++ b/src/arm64/hisilicon/hi3660.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { compatible = "hisilicon,hi3660"; @@ -141,19 +142,710 @@ #size-cells = <2>; ranges; - fixed_uart5: fixed_19_2M { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - clock-output-names = "fixed:uart5"; + crg_ctrl: crg_ctrl@fff35000 { + compatible = "hisilicon,hi3660-crgctrl", "syscon"; + reg = <0x0 0xfff35000 0x0 0x1000>; + #clock-cells = <1>; }; - uart5: uart@fdf05000 { + crg_rst: crg_rst_controller { + compatible = "hisilicon,hi3660-reset"; + #reset-cells = <2>; + hisi,rst-syscon = <&crg_ctrl>; + }; + + + pctrl: pctrl@e8a09000 { + compatible = "hisilicon,hi3660-pctrl", "syscon"; + reg = <0x0 0xe8a09000 0x0 0x2000>; + #clock-cells = <1>; + }; + + pmuctrl: crg_ctrl@fff34000 { + compatible = "hisilicon,hi3660-pmuctrl", "syscon"; + reg = <0x0 0xfff34000 0x0 0x1000>; + #clock-cells = <1>; + }; + + sctrl: sctrl@fff0a000 { + compatible = "hisilicon,hi3660-sctrl", "syscon"; + reg = <0x0 0xfff0a000 0x0 0x1000>; + #clock-cells = <1>; + }; + + iomcu: iomcu@ffd7e000 { + compatible = "hisilicon,hi3660-iomcu", "syscon"; + reg = <0x0 0xffd7e000 0x0 0x1000>; + #clock-cells = <1>; + + }; + + iomcu_rst: reset { + compatible = "hisilicon,hi3660-reset"; + hisi,rst-syscon = <&iomcu>; + #reset-cells = <2>; + }; + + dual_timer0: timer@fff14000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x0 0xfff14000 0x0 0x1000>; + interrupts = , + ; + clocks = <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; + + i2c0: i2c@ffd71000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd71000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; + + i2c1: i2c@ffd72000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd72000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>; + resets = <&iomcu_rst 0x20 4>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>; + status = "disabled"; + }; + + i2c3: i2c@fdf0c000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0c000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>; + resets = <&crg_rst 0x78 7>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>; + status = "disabled"; + }; + + i2c7: i2c@fdf0b000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0b000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>; + resets = <&crg_rst 0x60 14>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pmx_func &i2c7_cfg_func>; + status = "disabled"; + }; + + uart0: serial@fdf02000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xfdf02000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>, + <&crg_ctrl HI3660_PCLK>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; + status = "disabled"; + }; + + uart1: serial@fdf00000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xfdf00000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>, + <&crg_ctrl HI3660_CLK_GATE_UART1>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>; + status = "disabled"; + }; + + uart2: serial@fdf03000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xfdf03000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>, + <&crg_ctrl HI3660_PCLK>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; + status = "disabled"; + }; + + uart3: serial@ffd74000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xffd74000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_FACTOR_UART3>, + <&crg_ctrl HI3660_PCLK>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; + status = "disabled"; + }; + + uart4: serial@fdf01000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xfdf01000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>, + <&crg_ctrl HI3660_CLK_GATE_UART4>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; + status = "disabled"; + }; + + uart5: serial@fdf05000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf05000 0x0 0x1000>; interrupts = ; - clocks = <&fixed_uart5 &fixed_uart5>; + clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>, + <&crg_ctrl HI3660_CLK_GATE_UART5>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pmx_func &uart5_cfg_func>; + status = "disabled"; + }; + + uart6: serial@fff32000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xfff32000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_UART6>, + <&crg_ctrl HI3660_PCLK>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>; + status = "disabled"; + }; + + rtc0: rtc@fff04000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0Xfff04000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_PCLK>; + clock-names = "apb_pclk"; + }; + + gpio0: gpio@e8a0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 0 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO0>; + clock-names = "apb_pclk"; + }; + + gpio1: gpio@e8a0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 7 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO1>; + clock-names = "apb_pclk"; + }; + + gpio2: gpio@e8a0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 14 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO2>; + clock-names = "apb_pclk"; + }; + + gpio3: gpio@e8a0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 22 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO3>; + clock-names = "apb_pclk"; + }; + + gpio4: gpio@e8a0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 30 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO4>; + clock-names = "apb_pclk"; + }; + + gpio5: gpio@e8a10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 38 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO5>; + clock-names = "apb_pclk"; + }; + + gpio6: gpio@e8a11000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a11000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 46 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO6>; + clock-names = "apb_pclk"; + }; + + gpio7: gpio@e8a12000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a12000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 54 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO7>; + clock-names = "apb_pclk"; + }; + + gpio8: gpio@e8a13000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a13000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 62 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO8>; + clock-names = "apb_pclk"; + }; + + gpio9: gpio@e8a14000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a14000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 70 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO9>; + clock-names = "apb_pclk"; + }; + + gpio10: gpio@e8a15000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a15000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 78 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO10>; + clock-names = "apb_pclk"; + }; + + gpio11: gpio@e8a16000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a16000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 86 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO11>; + clock-names = "apb_pclk"; + }; + + gpio12: gpio@e8a17000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a17000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 94 3 &pmx0 7 101 1>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO12>; + clock-names = "apb_pclk"; + }; + + gpio13: gpio@e8a18000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a18000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 102 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO13>; + clock-names = "apb_pclk"; + }; + + gpio14: gpio@e8a19000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a19000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 110 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO14>; + clock-names = "apb_pclk"; + }; + + gpio15: gpio@e8a1a000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1a000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 118 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO15>; + clock-names = "apb_pclk"; + }; + + gpio16: gpio@e8a1b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO16>; + clock-names = "apb_pclk"; + }; + + gpio17: gpio@e8a1c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO17>; + clock-names = "apb_pclk"; + }; + + gpio18: gpio@ff3b4000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b4000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 0 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO18>; + clock-names = "apb_pclk"; + }; + + gpio19: gpio@ff3b5000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b5000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 8 4>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO19>; + clock-names = "apb_pclk"; + }; + + gpio20: gpio@e8a1f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx1 0 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO20>; + clock-names = "apb_pclk"; + }; + + gpio21: gpio@e8a20000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a20000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pmx3 0 0 6>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO21>; + clock-names = "apb_pclk"; + }; + + gpio22: gpio@fff0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO176 */ + gpio-ranges = <&pmx4 2 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO0>; + clock-names = "apb_pclk"; + }; + + gpio23: gpio@fff0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO184 */ + gpio-ranges = <&pmx4 0 6 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO1>; + clock-names = "apb_pclk"; + }; + + gpio24: gpio@fff0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO192 */ + gpio-ranges = <&pmx4 0 13 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO2>; + clock-names = "apb_pclk"; + }; + + gpio25: gpio@fff0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO200 */ + gpio-ranges = <&pmx4 0 21 4 &pmx4 5 25 3>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO3>; + clock-names = "apb_pclk"; + }; + + gpio26: gpio@fff0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO208 */ + gpio-ranges = <&pmx4 0 28 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO4>; + clock-names = "apb_pclk"; + }; + + gpio27: gpio@fff10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO216 */ + gpio-ranges = <&pmx4 0 36 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO5>; + clock-names = "apb_pclk"; + }; + + gpio28: gpio@fff1d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff1d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO6>; + clock-names = "apb_pclk"; + }; + + spi2: spi@ffd68000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xffd68000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>; + clock-names = "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pmx_func>; + num-cs = <1>; + cs-gpios = <&gpio27 2 0>; + status = "disabled"; + }; + + spi3: spi@ff3b3000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xff3b3000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>; + clock-names = "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pmx_func>; + num-cs = <1>; + cs-gpios = <&gpio18 5 0>; + status = "disabled"; + }; + + pcie@f4000000 { + compatible = "hisilicon,kirin960-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000>, + <0x0 0xff3fe000 0x0 0x1000>, + <0x0 0xf3f20000 0x0 0x40000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "phy", "config"; + bus-range = <0x0 0x1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x00000000 + 0x0 0xf6000000 + 0x0 0x02000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x0 0 0 1 + &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 2 + &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 3 + &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 4 + &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&crg_ctrl HI3660_PCIEPHY_REF>, + <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3660_ACLK_GATE_PCIE>; + clock-names = "pcie_phy_ref", "pcie_aux", + "pcie_apb_phy", "pcie_apb_sys", + "pcie_aclk"; + reset-gpios = <&gpio11 1 0 >; + }; + + /* SD */ + dwmmc1: dwmmc1@ff37f000 { + #address-cells = <1>; + #size-cells = <0>; + cd-inverted; + compatible = "hisilicon,hi3660-dw-mshc"; + num-slots = <1>; + bus-width = <0x4>; + disable-wp; + cap-sd-highspeed; + supports-highspeed; + card-detect-delay = <200>; + reg = <0x0 0xff37f000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_SD>, + <&crg_ctrl HI3660_HCLK_GATE_SD>; + clock-names = "ciu", "biu"; + clock-frequency = <3200000>; + resets = <&crg_rst 0x94 18>; + cd-gpios = <&gpio25 3 0>; + hisilicon,peripheral-syscon = <&sctrl>; + pinctrl-names = "default"; + pinctrl-0 = <&sd_pmx_func + &sd_clk_cfg_func + &sd_cfg_func>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "disabled"; + + slot@0 { + reg = <0x0>; + bus-width = <4>; + disable-wp; + }; + }; + + /* SDIO */ + dwmmc2: dwmmc2@ff3ff000 { + compatible = "hisilicon,hi3660-dw-mshc"; + reg = <0x0 0xff3ff000 0x0 0x1000>; + interrupts = ; + num-slots = <1>; + clocks = <&crg_ctrl HI3660_CLK_GATE_SDIO0>, + <&crg_ctrl HI3660_HCLK_GATE_SDIO0>; + clock-names = "ciu", "biu"; + resets = <&crg_rst 0x94 20>; + card-detect-delay = <200>; + supports-highspeed; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pmx_func + &sdio_clk_cfg_func + &sdio_cfg_func>; status = "disabled"; }; }; diff --git a/src/arm64/hisilicon/hi6220-hikey.dts b/src/arm64/hisilicon/hi6220-hikey.dts index 49f6a6242cf9..2b526304ed27 100644 --- a/src/arm64/hisilicon/hi6220-hikey.dts +++ b/src/arm64/hisilicon/hi6220-hikey.dts @@ -141,6 +141,8 @@ bluetooth { compatible = "ti,wl1835-st"; enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + clocks = <&pmic>; + clock-names = "ext_clock"; }; }; @@ -466,6 +468,11 @@ method = "smc"; }; }; + + sound_card { + compatible = "audio-graph-card"; + dais = <&i2s0_port0>; + }; }; &uart2 { @@ -506,10 +513,33 @@ interrupts = <1 2>; pd-gpio = <&gpio0 4 0>; adi,dsi-lanes = <4>; + #sound-dai-cells = <0>; - port { - adv7533_in: endpoint { - remote-endpoint = <&dsi_out0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + adv7533_in: endpoint { + remote-endpoint = <&dsi_out0>; + }; + }; + port@2 { + reg = <2>; + codec_endpoint: endpoint { + remote-endpoint = <&i2s0_cpu_endpoint>; + }; + }; + }; + }; +}; + +&i2s0 { + + ports { + i2s0_port0: port@0 { + i2s0_cpu_endpoint: endpoint { + remote-endpoint = <&codec_endpoint>; + dai-format = "i2s"; }; }; }; diff --git a/src/arm64/hisilicon/hi6220.dtsi b/src/arm64/hisilicon/hi6220.dtsi index 5013e4b2ea71..eacbe0db5bc2 100644 --- a/src/arm64/hisilicon/hi6220.dtsi +++ b/src/arm64/hisilicon/hi6220.dtsi @@ -332,6 +332,19 @@ status = "disabled"; }; + dma0: dma@f7370000 { + compatible = "hisilicon,k3-dma-1.0"; + reg = <0x0 0xf7370000 0x0 0x1000>; + #dma-cells = <1>; + dma-channels = <15>; + dma-requests = <32>; + interrupts = <0 84 4>; + clocks = <&sys_ctrl HI6220_EDMAC_ACLK>; + dma-no-cci; + dma-type = "hi6220_dma"; + status = "ok"; + }; + dual_timer0: timer@f8008000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xf8008000 0x0 0x1000>; @@ -805,6 +818,19 @@ #thermal-sensor-cells = <1>; }; + i2s0: i2s@f7118000{ + compatible = "hisilicon,hi6210-i2s"; + reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */ + interrupts = ; /* 155 "DigACodec_intr"-32 */ + clocks = <&sys_ctrl HI6220_DACODEC_PCLK>, + <&sys_ctrl HI6220_BBPPLL0_DIV>; + clock-names = "dacodec", "i2s-base"; + dmas = <&dma0 15 &dma0 14>; + dma-names = "rx", "tx"; + hisilicon,sysctrl-syscon = <&sys_ctrl>; + #sound-dai-cells = <1>; + }; + thermal-zones { cls0: cls0 { @@ -887,5 +913,69 @@ }; }; }; + + debug@f6590000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6590000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; + + debug@f6592000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6592000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + }; + + debug@f6594000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6594000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + }; + + debug@f6596000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6596000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + }; + + debug@f65d0000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d0000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu4>; + }; + + debug@f65d2000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d2000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu5>; + }; + + debug@f65d4000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d4000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu6>; + }; + + debug@f65d6000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf65d6000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu7>; + }; }; }; diff --git a/src/arm64/hisilicon/hikey960-pinctrl.dtsi b/src/arm64/hisilicon/hikey960-pinctrl.dtsi index 719c4bc937a4..7e542d28dadb 100644 --- a/src/arm64/hisilicon/hikey960-pinctrl.dtsi +++ b/src/arm64/hisilicon/hikey960-pinctrl.dtsi @@ -24,6 +24,27 @@ &range 0 7 0 &range 8 116 0>; + pmu_pmx_func: pmu_pmx_func { + pinctrl-single,pins = < + 0x008 MUX_M1 /* PMU1_SSI */ + 0x00c MUX_M1 /* PMU2_SSI */ + 0x010 MUX_M1 /* PMU_CLKOUT */ + 0x100 MUX_M1 /* PMU_HKADC_SSI */ + >; + }; + + csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func { + pinctrl-single,pins = < + 0x044 MUX_M0 /* CSI0_PWD_N */ + >; + }; + + csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func { + pinctrl-single,pins = < + 0x04c MUX_M0 /* CSI1_PWD_N */ + >; + }; + isp0_pmx_func: isp0_pmx_func { pinctrl-single,pins = < 0x058 MUX_M1 /* ISP_CLK0 */ @@ -40,6 +61,12 @@ >; }; + pwr_key_pmx_func: pwr_key_pmx_func { + pinctrl-single,pins = < + 0x080 MUX_M0 /* GPIO_034 */ + >; + }; + i2c3_pmx_func: i2c3_pmx_func { pinctrl-single,pins = < 0x02c MUX_M1 /* I2C3_SCL */ @@ -67,21 +94,10 @@ >; }; - spi1_pmx_func: spi1_pmx_func { - pinctrl-single,pins = < - 0x034 MUX_M1 /* SPI1_CLK */ - 0x038 MUX_M1 /* SPI1_DI */ - 0x03c MUX_M1 /* SPI1_DO */ - 0x040 MUX_M1 /* SPI1_CS_N */ - >; - }; - uart0_pmx_func: uart0_pmx_func { pinctrl-single,pins = < 0x0cc MUX_M2 /* UART0_RXD */ 0x0d0 MUX_M2 /* UART0_TXD */ - 0x0d4 MUX_M2 /* UART0_RXD_M */ - 0x0d8 MUX_M2 /* UART0_TXD_M */ >; }; @@ -138,6 +154,18 @@ 0x0d8 MUX_M1 /* UART6_TXD */ >; }; + + cam0_rst_pmx_func: cam0_rst_pmx_func { + pinctrl-single,pins = < + 0x0c8 MUX_M0 /* CAM0_RST */ + >; + }; + + cam1_rst_pmx_func: cam1_rst_pmx_func { + pinctrl-single,pins = < + 0x124 MUX_M0 /* CAM1_RST */ + >; + }; }; /* [IOMG_MMC0_000, IOMG_MMC0_005] */ @@ -174,6 +202,13 @@ /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 12 0>; + ufs_pmx_func: ufs_pmx_func { + pinctrl-single,pins = < + 0x000 MUX_M1 /* UFS_REF_CLK */ + 0x004 MUX_M1 /* UFS_RST_N */ + >; + }; + spi3_pmx_func: spi3_pmx_func { pinctrl-single,pins = < 0x008 MUX_M1 /* SPI3_CLK */ @@ -248,13 +283,6 @@ >; }; - i2c2_pmx_func: i2c2_pmx_func { - pinctrl-single,pins = < - 0x024 MUX_M1 /* I2C2_SCL */ - 0x028 MUX_M1 /* I2C2_SDA */ - >; - }; - i2c7_pmx_func: i2c7_pmx_func { pinctrl-single,pins = < 0x024 MUX_M3 /* I2C7_SCL */ @@ -262,6 +290,13 @@ >; }; + pcie_pmx_func: pcie_pmx_func { + pinctrl-single,pins = < + 0x084 MUX_M1 /* PCIE_CLKREQ_N */ + 0x088 MUX_M1 /* PCIE_WAKE_N */ + >; + }; + spi2_pmx_func: spi2_pmx_func { pinctrl-single,pins = < 0x08c MUX_M1 /* SPI2_CLK */ @@ -271,15 +306,6 @@ >; }; - spi4_pmx_func: spi4_pmx_func { - pinctrl-single,pins = < - 0x08c MUX_M4 /* SPI4_CLK */ - 0x090 MUX_M4 /* SPI4_DI */ - 0x094 MUX_M4 /* SPI4_DO */ - 0x098 MUX_M4 /* SPI4_CS0_N */ - >; - }; - i2s0_pmx_func: i2s0_pmx_func { pinctrl-single,pins = < 0x034 MUX_M1 /* I2S0_DI */ @@ -290,13 +316,433 @@ }; }; - pmx5: pinmux@ff3fd800 { + pmx5: pinmux@e896c800 { + compatible = "pinconf-single"; + reg = <0x0 0xe896c800 0x0 0x200>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <0x20>; + + pmu_cfg_func: pmu_cfg_func { + pinctrl-single,pins = < + 0x010 0x0 /* PMU1_SSI */ + 0x014 0x0 /* PMU2_SSI */ + 0x018 0x0 /* PMU_CLKOUT */ + 0x10c 0x0 /* PMU_HKADC_SSI */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_06MA DRIVE6_MASK + >; + }; + + i2c3_cfg_func: i2c3_cfg_func { + pinctrl-single,pins = < + 0x038 0x0 /* I2C3_SCL */ + 0x03c 0x0 /* I2C3_SDA */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + csi0_pwd_n_cfg_func: csi0_pwd_n_cfg_func { + pinctrl-single,pins = < + 0x050 0x0 /* CSI0_PWD_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK + >; + }; + + csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func { + pinctrl-single,pins = < + 0x058 0x0 /* CSI1_PWD_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK + >; + }; + + isp0_cfg_func: isp0_cfg_func { + pinctrl-single,pins = < + 0x064 0x0 /* ISP_CLK0 */ + 0x070 0x0 /* ISP_SCL0 */ + 0x074 0x0 /* ISP_SDA0 */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK>; + }; + + isp1_cfg_func: isp1_cfg_func { + pinctrl-single,pins = < + 0x068 0x0 /* ISP_CLK1 */ + 0x078 0x0 /* ISP_SCL1 */ + 0x07c 0x0 /* ISP_SDA1 */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK + >; + }; + + pwr_key_cfg_func: pwr_key_cfg_func { + pinctrl-single,pins = < + 0x08c 0x0 /* GPIO_034 */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart1_cfg_func: uart1_cfg_func { + pinctrl-single,pins = < + 0x0b4 0x0 /* UART1_RXD */ + 0x0b8 0x0 /* UART1_TXD */ + 0x0bc 0x0 /* UART1_CTS_N */ + 0x0c0 0x0 /* UART1_RTS_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart2_cfg_func: uart2_cfg_func { + pinctrl-single,pins = < + 0x0c8 0x0 /* UART2_CTS_N */ + 0x0cc 0x0 /* UART2_RTS_N */ + 0x0d0 0x0 /* UART2_TXD */ + 0x0d4 0x0 /* UART2_RXD */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart5_cfg_func: uart5_cfg_func { + pinctrl-single,pins = < + 0x0c8 0x0 /* UART5_RXD */ + 0x0cc 0x0 /* UART5_TXD */ + 0x0d0 0x0 /* UART5_CTS_N */ + 0x0d4 0x0 /* UART5_RTS_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + cam0_rst_cfg_func: cam0_rst_cfg_func { + pinctrl-single,pins = < + 0x0d4 0x0 /* CAM0_RST */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK + >; + }; + + uart0_cfg_func: uart0_cfg_func { + pinctrl-single,pins = < + 0x0d8 0x0 /* UART0_RXD */ + 0x0dc 0x0 /* UART0_TXD */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart6_cfg_func: uart6_cfg_func { + pinctrl-single,pins = < + 0x0d8 0x0 /* UART6_CTS_N */ + 0x0dc 0x0 /* UART6_RTS_N */ + 0x0e0 0x0 /* UART6_RXD */ + 0x0e4 0x0 /* UART6_TXD */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart3_cfg_func: uart3_cfg_func { + pinctrl-single,pins = < + 0x0e8 0x0 /* UART3_CTS_N */ + 0x0ec 0x0 /* UART3_RTS_N */ + 0x0f0 0x0 /* UART3_RXD */ + 0x0f4 0x0 /* UART3_TXD */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + uart4_cfg_func: uart4_cfg_func { + pinctrl-single,pins = < + 0x0f8 0x0 /* UART4_CTS_N */ + 0x0fc 0x0 /* UART4_RTS_N */ + 0x100 0x0 /* UART4_RXD */ + 0x104 0x0 /* UART4_TXD */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + cam1_rst_cfg_func: cam1_rst_cfg_func { + pinctrl-single,pins = < + 0x130 0x0 /* CAM1_RST */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_04MA DRIVE6_MASK + >; + }; + }; + + pmx6: pinmux@ff3b6800 { + compatible = "pinconf-single"; + reg = <0x0 0xff3b6800 0x0 0x18>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <0x20>; + + ufs_cfg_func: ufs_cfg_func { + pinctrl-single,pins = < + 0x000 0x0 /* UFS_REF_CLK */ + 0x004 0x0 /* UFS_RST_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_08MA DRIVE6_MASK + >; + }; + + spi3_cfg_func: spi3_cfg_func { + pinctrl-single,pins = < + 0x008 0x0 /* SPI3_CLK */ + 0x0 /* SPI3_DI */ + 0x010 0x0 /* SPI3_DO */ + 0x014 0x0 /* SPI3_CS0_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_DIS + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + }; + + pmx7: pinmux@ff3fd800 { compatible = "pinconf-single"; reg = <0x0 0xff3fd800 0x0 0x18>; #pinctrl-cells = <1>; - #address-cells = <1>; - #size-cells = <1>; - pinctrl-single,register-width = <32>; + pinctrl-single,register-width = <0x20>; sdio_clk_cfg_func: sdio_clk_cfg_func { pinctrl-single,pins = < @@ -315,8 +761,7 @@ PULL_UP >; pinctrl-single,drive-strength = < - DRIVE6_32MA - DRIVE6_MASK + DRIVE6_32MA DRIVE6_MASK >; }; @@ -341,19 +786,16 @@ PULL_UP >; pinctrl-single,drive-strength = < - DRIVE6_19MA - DRIVE6_MASK + DRIVE6_19MA DRIVE6_MASK >; }; }; - pmx6: pinmux@ff37e800 { + pmx8: pinmux@ff37e800 { compatible = "pinconf-single"; reg = <0x0 0xff37e800 0x0 0x18>; #pinctrl-cells = <1>; - #address-cells = <1>; - #size-cells = <1>; - pinctrl-single,register-width = <32>; + pinctrl-single,register-width = <0x20>; sd_clk_cfg_func: sd_clk_cfg_func { pinctrl-single,pins = < @@ -403,5 +845,215 @@ >; }; }; + + pmx9: pinmux@fff11800 { + compatible = "pinconf-single"; + reg = <0x0 0xfff11800 0x0 0xbc>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <0x20>; + + i2c0_cfg_func: i2c0_cfg_func { + pinctrl-single,pins = < + 0x01c 0x0 /* I2C0_SCL */ + 0x020 0x0 /* I2C0_SDA */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + i2c1_cfg_func: i2c1_cfg_func { + pinctrl-single,pins = < + 0x024 0x0 /* I2C1_SCL */ + 0x028 0x0 /* I2C1_SDA */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + i2c7_cfg_func: i2c7_cfg_func { + pinctrl-single,pins = < + 0x02c 0x0 /* I2C7_SCL */ + 0x030 0x0 /* I2C7_SDA */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + slimbus_cfg_func: slimbus_cfg_func { + pinctrl-single,pins = < + 0x034 0x0 /* SLIMBUS_CLK */ + 0x038 0x0 /* SLIMBUS_DATA */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + i2s0_cfg_func: i2s0_cfg_func { + pinctrl-single,pins = < + 0x040 0x0 /* I2S0_DI */ + 0x044 0x0 /* I2S0_DO */ + 0x048 0x0 /* I2S0_XCLK */ + 0x04c 0x0 /* I2S0_XFS */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + i2s2_cfg_func: i2s2_cfg_func { + pinctrl-single,pins = < + 0x050 0x0 /* I2S2_DI */ + 0x054 0x0 /* I2S2_DO */ + 0x058 0x0 /* I2S2_XCLK */ + 0x05c 0x0 /* I2S2_XFS */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + pcie_cfg_func: pcie_cfg_func { + pinctrl-single,pins = < + 0x094 0x0 /* PCIE_CLKREQ_N */ + 0x098 0x0 /* PCIE_WAKE_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + spi2_cfg_func: spi2_cfg_func { + pinctrl-single,pins = < + 0x09c 0x0 /* SPI2_CLK */ + 0x0a0 0x0 /* SPI2_DI */ + 0x0a4 0x0 /* SPI2_DO */ + 0x0a8 0x0 /* SPI2_CS0_N */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + + usb_cfg_func: usb_cfg_func { + pinctrl-single,pins = < + 0x0ac 0x0 /* GPIO_219 */ + >; + pinctrl-single,bias-pulldown = < + PULL_DIS + PULL_DOWN + PULL_DIS + PULL_DOWN + >; + pinctrl-single,bias-pullup = < + PULL_UP + PULL_UP + PULL_DIS + PULL_UP + >; + pinctrl-single,drive-strength = < + DRIVE7_02MA DRIVE6_MASK + >; + }; + }; }; }; diff --git a/src/arm64/marvell/armada-3720-db.dts b/src/arm64/marvell/armada-3720-db.dts index a89855f57091..9df0f06ce607 100644 --- a/src/arm64/marvell/armada-3720-db.dts +++ b/src/arm64/marvell/armada-3720-db.dts @@ -42,6 +42,10 @@ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. + * + * This file is compatible with the version 1.4 and the version 2.0 of + * the board, however the CON numbers are different between the 2 + * version */ /dts-v1/; @@ -76,6 +80,36 @@ compatible = "usb-nop-xceiv"; vcc-supply = <&exp_usb3_vbus>; }; + + vcc_sd_reg1: regulator { + compatible = "regulator-gpio"; + regulator-name = "vcc_sd1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + states = <1800000 0x1 + 3300000 0x0>; + enable-active-high; + }; +}; + +/* Gigabit module on CON19(V2.0)/CON21(V1.4) */ +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii-id"; + phy = <&phy0>; + status = "okay"; +}; + +/* Gigabit module on CON18(V2.0)/CON20(V1.4) */ +ð1 { + phy-mode = "sgmii"; + phy = <&phy1>; + status = "okay"; }; &i2c0 { @@ -108,11 +142,46 @@ }; }; +&mdio { + status = "okay"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */ +&pcie0 { + status = "okay"; +}; + /* CON3 */ &sata { status = "okay"; }; +&sdhci0 { + non-removable; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; + status = "okay"; +}; + +/* SD slot module on CON14(V2.0)/CON15(V1.4) */ +&sdhci1 { + wp-inverted; + cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>; + bus-width = <4>; + marvell,pad-type = "sd"; + vqmmc-supply = <&vcc_sd_reg1>; + status = "okay"; +}; + &spi0 { status = "okay"; pinctrl-names = "default"; @@ -145,60 +214,23 @@ }; }; -/* Exported on the micro USB connector CON32 through an FTDI */ +/* + * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through + * an FTDI + */ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "okay"; }; -&sdhci0 { - non-removable; - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs400-1_8v; - marvell,pad-type = "fixed-1-8v"; - status = "okay"; -}; - -/* CON31 */ -&usb3 { - status = "okay"; - usb-phy = <&usb3_phy>; -}; - -/* CON17 (PCIe) / CON12 (mini-PCIe) */ -&pcie0 { - status = "okay"; -}; - -/* CON27 */ +/* CON27(V2.0)/CON29(V1.4) */ &usb2 { status = "okay"; }; - -&mdio { - status = "okay"; - phy0: ethernet-phy@0 { - reg = <0>; - }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -ð0 { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii-id"; - phy = <&phy0>; - status = "okay"; -}; - -ð1 { - phy-mode = "sgmii"; - phy = <&phy1>; +/* CON29(V2.0)/CON31(V1.4) */ +&usb3 { status = "okay"; + usb-phy = <&usb3_phy>; }; diff --git a/src/arm64/marvell/armada-37xx.dtsi b/src/arm64/marvell/armada-37xx.dtsi index 4d495ec39202..51763d674050 100644 --- a/src/arm64/marvell/armada-37xx.dtsi +++ b/src/arm64/marvell/armada-37xx.dtsi @@ -75,14 +75,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; }; soc { @@ -163,7 +159,7 @@ pinctrl_nb: pinctrl@13800 { compatible = "marvell,armada3710-nb-pinctrl", - "syscon", "simple-mfd"; + "syscon", "simple-mfd"; reg = <0x13800 0x100>, <0x13C00 0x20>; gpionb: gpio { #gpio-cells = <2>; @@ -219,11 +215,11 @@ pinctrl_sb: pinctrl@18800 { compatible = "marvell,armada3710-sb-pinctrl", - "syscon", "simple-mfd"; + "syscon", "simple-mfd"; reg = <0x18800 0x100>, <0x18C00 0x20>; gpiosb: gpio { #gpio-cells = <2>; - gpio-ranges = <&pinctrl_sb 0 0 29>; + gpio-ranges = <&pinctrl_sb 0 0 30>; gpio-controller; interrupts = , @@ -281,8 +277,8 @@ xor@60900 { compatible = "marvell,armada-3700-xor"; - reg = <0x60900 0x100 - 0x60b00 0x100>; + reg = <0x60900 0x100>, + <0x60b00 0x100>; xor10 { interrupts = ; @@ -292,11 +288,22 @@ }; }; + sdhci1: sdhci@d0000 { + compatible = "marvell,armada-3700-sdhci", + "marvell,sdhci-xenon"; + reg = <0xd0000 0x300>, + <0x1e808 0x4>; + interrupts = ; + clocks = <&nb_periph_clk 0>; + clock-names = "core"; + status = "disabled"; + }; + sdhci0: sdhci@d8000 { compatible = "marvell,armada-3700-sdhci", - "marvell,sdhci-xenon"; - reg = <0xd8000 0x300 - 0x17808 0x4>; + "marvell,sdhci-xenon"; + reg = <0xd8000 0x300>, + <0x17808 0x4>; interrupts = ; clocks = <&nb_periph_clk 0>; clock-names = "core"; diff --git a/src/arm64/marvell/armada-7020.dtsi b/src/arm64/marvell/armada-7020.dtsi index 975e73302753..4ab012991d9d 100644 --- a/src/arm64/marvell/armada-7020.dtsi +++ b/src/arm64/marvell/armada-7020.dtsi @@ -46,7 +46,7 @@ */ #include "armada-ap806-dual.dtsi" -#include "armada-cp110-master.dtsi" +#include "armada-70x0.dtsi" / { model = "Marvell Armada 7020"; diff --git a/src/arm64/marvell/armada-7040-db.dts b/src/arm64/marvell/armada-7040-db.dts index 12442329b80f..92c761c380d3 100644 --- a/src/arm64/marvell/armada-7040-db.dts +++ b/src/arm64/marvell/armada-7040-db.dts @@ -162,6 +162,8 @@ }; &cpm_mdio { + status = "okay"; + phy0: ethernet-phy@0 { reg = <0>; }; @@ -185,7 +187,3 @@ phy = <&phy1>; phy-mode = "rgmii-id"; }; - -&cpm_crypto { - status = "okay"; -}; diff --git a/src/arm64/marvell/armada-7040.dtsi b/src/arm64/marvell/armada-7040.dtsi index 78d995d62707..cbe460b8fc00 100644 --- a/src/arm64/marvell/armada-7040.dtsi +++ b/src/arm64/marvell/armada-7040.dtsi @@ -46,7 +46,7 @@ */ #include "armada-ap806-quad.dtsi" -#include "armada-cp110-master.dtsi" +#include "armada-70x0.dtsi" / { model = "Marvell Armada 7040"; diff --git a/src/arm64/marvell/armada-70x0.dtsi b/src/arm64/marvell/armada-70x0.dtsi new file mode 100644 index 000000000000..860b6ae9dcc5 --- /dev/null +++ b/src/arm64/marvell/armada-70x0.dtsi @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2017 Marvell Technology Group Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * Device Tree file for the Armada 70x0 SoC + */ + +#include "armada-cp110-master.dtsi" + +/ { + aliases { + gpio1 = &cpm_gpio1; + gpio2 = &cpm_gpio2; + }; +}; + +&cpm_gpio1 { + status = "okay"; +}; + +&cpm_gpio2 { + status = "okay"; +}; + +&cpm_syscon0 { + cpm_pinctrl: pinctrl { + compatible = "marvell,armada-7k-pinctrl"; + }; +}; diff --git a/src/arm64/marvell/armada-8020.dtsi b/src/arm64/marvell/armada-8020.dtsi index 7c08f1f28d9e..0ba0bc942598 100644 --- a/src/arm64/marvell/armada-8020.dtsi +++ b/src/arm64/marvell/armada-8020.dtsi @@ -46,8 +46,7 @@ */ #include "armada-ap806-dual.dtsi" -#include "armada-cp110-master.dtsi" -#include "armada-cp110-slave.dtsi" +#include "armada-80x0.dtsi" / { model = "Marvell Armada 8020"; diff --git a/src/arm64/marvell/armada-8040-db.dts b/src/arm64/marvell/armada-8040-db.dts index dc0d084005b2..1e8f7242ed6f 100644 --- a/src/arm64/marvell/armada-8040-db.dts +++ b/src/arm64/marvell/armada-8040-db.dts @@ -125,6 +125,8 @@ }; &cpm_mdio { + status = "okay"; + phy1: ethernet-phy@1 { reg = <1>; }; @@ -140,10 +142,6 @@ phy-mode = "rgmii-id"; }; -&cpm_crypto { - status = "okay"; -}; - /* CON5 on CP1 expansion */ &cps_pcie2 { status = "okay"; @@ -169,6 +167,24 @@ status = "okay"; }; +&cps_mdio { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&cps_ethernet { + status = "okay"; +}; + +&cps_eth1 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; +}; + &ap_sdhci0 { status = "okay"; bus-width = <4>; diff --git a/src/arm64/marvell/armada-8040-mcbin.dts b/src/arm64/marvell/armada-8040-mcbin.dts index f7bb0cc03147..4968e731de61 100644 --- a/src/arm64/marvell/armada-8040-mcbin.dts +++ b/src/arm64/marvell/armada-8040-mcbin.dts @@ -95,16 +95,47 @@ status = "okay"; }; +&ap_sdhci0 { + bus-width = <8>; + /* + * Not stable in HS modes - phy needs "more calibration", so add + * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes. + */ + marvell,xenon-phy-slow-mode; + no-1-8-v; + no-sd; + no-sdio; + non-removable; + status = "okay"; + vqmmc-supply = <&v_vddo_h>; +}; + &cpm_i2c0 { clock-frequency = <100000>; status = "okay"; }; +&cpm_mdio { + status = "okay"; + + ge_phy: ethernet-phy@0 { + reg = <0>; + }; +}; + &cpm_sata0 { /* CPM Lane 0 - U29 */ status = "okay"; }; +&cpm_sdhci0 { + /* U6 */ + broken-cd; + bus-width = <4>; + status = "okay"; + vqmmc-supply = <&v_3_3>; +}; + &cpm_usb3_0 { /* J38? - USB2.0 only */ status = "okay"; @@ -115,6 +146,17 @@ status = "okay"; }; +&cps_ethernet { + status = "okay"; +}; + +&cps_eth1 { + /* CPS Lane 0 - J5 (Gigabit RJ45) */ + status = "okay"; + phy = <&ge_phy>; + phy-mode = "sgmii"; +}; + &cps_sata0 { /* CPS Lane 1 - U32 */ /* CPS Lane 3 - U31 */ diff --git a/src/arm64/marvell/armada-8040.dtsi b/src/arm64/marvell/armada-8040.dtsi index 33813a75bc30..60fe84f5cbcc 100644 --- a/src/arm64/marvell/armada-8040.dtsi +++ b/src/arm64/marvell/armada-8040.dtsi @@ -46,8 +46,7 @@ */ #include "armada-ap806-quad.dtsi" -#include "armada-cp110-master.dtsi" -#include "armada-cp110-slave.dtsi" +#include "armada-80x0.dtsi" / { model = "Marvell Armada 8040"; diff --git a/src/arm64/marvell/armada-80x0.dtsi b/src/arm64/marvell/armada-80x0.dtsi new file mode 100644 index 000000000000..666ebe96ba0d --- /dev/null +++ b/src/arm64/marvell/armada-80x0.dtsi @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2017 Marvell Technology Group Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * Device Tree file for the Armada 80x0 SoC family + */ + +#include "armada-cp110-master.dtsi" +#include "armada-cp110-slave.dtsi" + +/ { + aliases { + gpio1 = &cps_gpio1; + gpio2 = &cpm_gpio2; + }; +}; + +/* The 80x0 has two CP blocks, but uses only one block from each. */ +&cps_gpio1 { + status = "okay"; +}; + +&cpm_gpio2 { + status = "okay"; +}; + +&cpm_syscon0 { + cpm_pinctrl: pinctrl { + compatible = "marvell,armada-8k-cpm-pinctrl"; + }; +}; + +&cps_syscon0 { + cps_pinctrl: pinctrl { + compatible = "marvell,armada-8k-cps-pinctrl"; + }; +}; diff --git a/src/arm64/marvell/armada-ap806.dtsi b/src/arm64/marvell/armada-ap806.dtsi index fe41bf9c301e..4d360713ed12 100644 --- a/src/arm64/marvell/armada-ap806.dtsi +++ b/src/arm64/marvell/armada-ap806.dtsi @@ -57,6 +57,7 @@ aliases { serial0 = &uart0; serial1 = &uart1; + gpio0 = &ap_gpio; }; psci { @@ -146,6 +147,13 @@ marvell,spi-base = <128>, <136>, <144>, <152>; }; + gicp: gicp@3f0040 { + compatible = "marvell,ap806-gicp"; + reg = <0x3f0040 0x10>; + marvell,spi-ranges = <64 64>, <288 64>; + msi-controller; + }; + pic: interrupt-controller@3f0100 { compatible = "marvell,armada-8k-pic"; reg = <0x3f0100 0x10>; @@ -159,6 +167,7 @@ reg = <0x400000 0x1000>, <0x410000 0x1000>; msi-parent = <&gic_v2m0>; + clocks = <&ap_clk 3>; dma-coherent; }; @@ -167,6 +176,7 @@ reg = <0x420000 0x1000>, <0x430000 0x1000>; msi-parent = <&gic_v2m0>; + clocks = <&ap_clk 3>; dma-coherent; }; @@ -175,6 +185,7 @@ reg = <0x440000 0x1000>, <0x450000 0x1000>; msi-parent = <&gic_v2m0>; + clocks = <&ap_clk 3>; dma-coherent; }; @@ -183,6 +194,7 @@ reg = <0x460000 0x1000>, <0x470000 0x1000>; msi-parent = <&gic_v2m0>; + clocks = <&ap_clk 3>; dma-coherent; }; @@ -193,7 +205,7 @@ #size-cells = <0>; cell-index = <0>; interrupts = ; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -204,7 +216,7 @@ #size-cells = <0>; interrupts = ; timeout-ms = <1000>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -214,7 +226,7 @@ reg-shift = <2>; interrupts = ; reg-io-width = <1>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -224,7 +236,7 @@ reg-shift = <2>; interrupts = ; reg-io-width = <1>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -234,21 +246,33 @@ reg = <0x6e0000 0x300>; interrupts = ; clock-names = "core"; - clocks = <&ap_syscon 4>; + clocks = <&ap_clk 4>; dma-coherent; marvell,xenon-phy-slow-mode; status = "disabled"; }; ap_syscon: system-controller@6f4000 { - compatible = "marvell,ap806-system-controller", - "syscon"; - #clock-cells = <1>; - clock-output-names = "ap-cpu-cluster-0", - "ap-cpu-cluster-1", - "ap-fixed", "ap-mss", - "ap-emmc"; + compatible = "syscon", "simple-mfd"; reg = <0x6f4000 0x1000>; + + ap_clk: clock { + compatible = "marvell,ap806-clock"; + #clock-cells = <1>; + }; + + ap_pinctrl: pinctrl { + compatible = "marvell,ap806-pinctrl"; + }; + + ap_gpio: gpio { + compatible = "marvell,armada-8k-gpio"; + offset = <0x1040>; + ngpios = <20>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ap_pinctrl 0 0 20>; + }; }; }; }; diff --git a/src/arm64/marvell/armada-cp110-master.dtsi b/src/arm64/marvell/armada-cp110-master.dtsi index b4bc42ece754..4c68605675a8 100644 --- a/src/arm64/marvell/armada-cp110-master.dtsi +++ b/src/arm64/marvell/armada-cp110-master.dtsi @@ -44,45 +44,46 @@ * Device Tree file for Marvell Armada CP110 Master. */ +#define ICU_GRP_NSR 0x0 + / { cp110-master { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cpm_icu>; ranges; config-space@f2000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf2000000 0x2000000>; cpm_ethernet: ethernet@0 { compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; - clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>; + clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>; clock-names = "pp_clk", "gop_clk", "mg_clk"; status = "disabled"; dma-coherent; cpm_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cpm_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cpm_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -94,41 +95,70 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x12a200 0x10>; + clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>; + status = "disabled"; + }; + + cpm_xmdio: mdio@12a600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,xmdio"; + reg = <0x12a600 0x10>; + status = "disabled"; + }; + + cpm_icu: interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + msi-parent = <&gicp>; }; cpm_syscon0: system-controller@440000 { - compatible = "marvell,cp110-system-controller0", - "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; - #clock-cells = <2>; - core-clock-output-names = - "cpm-apll", "cpm-ppv2-core", "cpm-eip", - "cpm-core", "cpm-nand-core"; - gate-clock-output-names = - "cpm-audio", "cpm-communit", "cpm-nand", - "cpm-ppv2", "cpm-sdio", "cpm-mg-domain", - "cpm-mg-core", "cpm-xor1", "cpm-xor0", - "cpm-gop-dp", "none", "cpm-pcie_x10", - "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", - "cpm-sata", "cpm-sata-usb", "cpm-main", - "cpm-sd-mmc-gop", "none", "none", - "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1", - "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; + + cpm_clk: clock { + compatible = "marvell,cp110-clock"; + #clock-cells = <2>; + }; + + cpm_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 0 32>; + status = "disabled"; + + }; + + cpm_gpio2: gpio@140 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x140>; + ngpios = <31>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 32 31>; + status = "disabled"; + }; }; cpm_rtc: rtc@284000 { compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = ; + interrupts = ; }; cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; - clocks = <&cpm_syscon0 1 15>; + interrupts = ; + clocks = <&cpm_clk 1 15>; status = "disabled"; }; @@ -137,8 +167,8 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; - clocks = <&cpm_syscon0 1 22>; + interrupts = ; + clocks = <&cpm_clk 1 22>; status = "disabled"; }; @@ -147,8 +177,8 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; - clocks = <&cpm_syscon0 1 23>; + interrupts = ; + clocks = <&cpm_clk 1 23>; status = "disabled"; }; @@ -158,7 +188,7 @@ <0x6b0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cpm_syscon0 1 8>; + clocks = <&cpm_clk 1 8>; }; cpm_xor1: xor@6c0000 { @@ -167,7 +197,7 @@ <0x6d0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cpm_syscon0 1 7>; + clocks = <&cpm_clk 1 7>; }; cpm_spi0: spi@700600 { @@ -176,7 +206,7 @@ #address-cells = <0x1>; #size-cells = <0x0>; cell-index = <1>; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -186,7 +216,7 @@ #address-cells = <1>; #size-cells = <0>; cell-index = <2>; - clocks = <&cpm_syscon0 1 21>; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -195,8 +225,8 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; - clocks = <&cpm_syscon0 1 21>; + interrupts = ; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; @@ -205,25 +235,25 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; - clocks = <&cpm_syscon0 1 21>; + interrupts = ; + clocks = <&cpm_clk 1 21>; status = "disabled"; }; cpm_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; - clocks = <&cpm_syscon0 1 25>; + interrupts = ; + clocks = <&cpm_clk 1 25>; status = "okay"; }; cpm_sdhci0: sdhci@780000 { compatible = "marvell,armada-cp110-sdhci"; reg = <0x780000 0x300>; - interrupts = ; + interrupts = ; clock-names = "core"; - clocks = <&cpm_syscon0 1 4>; + clocks = <&cpm_clk 1 4>; dma-coherent; status = "disabled"; }; @@ -231,16 +261,16 @@ cpm_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + interrupts = , + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; - clocks = <&cpm_syscon0 1 26>; - status = "disabled"; + clocks = <&cpm_clk 1 26>; + dma-coherent; }; }; @@ -263,10 +293,10 @@ /* non-prefetchable memory */ 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 13>; + clocks = <&cpm_clk 1 13>; status = "disabled"; }; @@ -289,11 +319,11 @@ /* non-prefetchable memory */ 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 11>; + clocks = <&cpm_clk 1 11>; status = "disabled"; }; @@ -316,11 +346,11 @@ /* non-prefetchable memory */ 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cpm_syscon0 1 12>; + clocks = <&cpm_clk 1 12>; status = "disabled"; }; }; diff --git a/src/arm64/marvell/armada-cp110-slave.dtsi b/src/arm64/marvell/armada-cp110-slave.dtsi index 6e2058847ddc..923f354b02f0 100644 --- a/src/arm64/marvell/armada-cp110-slave.dtsi +++ b/src/arm64/marvell/armada-cp110-slave.dtsi @@ -44,52 +44,53 @@ * Device Tree file for Marvell Armada CP110 Slave. */ +#define ICU_GRP_NSR 0x0 + / { cp110-slave { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cps_icu>; ranges; config-space@f4000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf4000000 0x2000000>; cps_rtc: rtc@284000 { compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = ; + interrupts = ; }; cps_ethernet: ethernet@0 { compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; - clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>; + clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>; clock-names = "pp_clk", "gop_clk", "mg_clk"; status = "disabled"; dma-coherent; cps_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cps_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cps_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -101,34 +102,64 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x12a200 0x10>; + clocks = <&cps_clk 1 9>, <&cps_clk 1 5>; + status = "disabled"; + }; + + cps_xmdio: mdio@12a600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,xmdio"; + reg = <0x12a600 0x10>; + status = "disabled"; + }; + + cps_icu: interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + msi-parent = <&gicp>; }; cps_syscon0: system-controller@440000 { - compatible = "marvell,cp110-system-controller0", - "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; - #clock-cells = <2>; - core-clock-output-names = - "cps-apll", "cps-ppv2-core", "cps-eip", - "cps-core", "cps-nand-core"; - gate-clock-output-names = - "cps-audio", "cps-communit", "cps-nand", - "cps-ppv2", "cps-sdio", "cps-mg-domain", - "cps-mg-core", "cps-xor1", "cps-xor0", - "cps-gop-dp", "none", "cps-pcie_x10", - "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor", - "cps-sata", "cps-sata-usb", "cps-main", - "cps-sd-mmc-gop", "none", "none", - "cps-slow-io", "cps-usb3h0", "cps-usb3h1", - "cps-usb3dev", "cps-eip150", "cps-eip197"; + + cps_clk: clock { + compatible = "marvell,cp110-clock"; + #clock-cells = <2>; + }; + + cps_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cps_pinctrl 0 0 32>; + status = "disabled"; + + }; + + cps_gpio2: gpio@140 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x140>; + ngpios = <31>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cps_pinctrl 0 32 31>; + status = "disabled"; + }; + }; cps_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; - clocks = <&cps_syscon0 1 15>; + interrupts = ; + clocks = <&cps_clk 1 15>; status = "disabled"; }; @@ -137,8 +168,8 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; - clocks = <&cps_syscon0 1 22>; + interrupts = ; + clocks = <&cps_clk 1 22>; status = "disabled"; }; @@ -147,8 +178,8 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; - clocks = <&cps_syscon0 1 23>; + interrupts = ; + clocks = <&cps_clk 1 23>; status = "disabled"; }; @@ -158,7 +189,7 @@ <0x6b0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cps_syscon0 1 8>; + clocks = <&cps_clk 1 8>; }; cps_xor1: xor@6c0000 { @@ -167,7 +198,7 @@ <0x6d0000 0x1000>; dma-coherent; msi-parent = <&gic_v2m0>; - clocks = <&cps_syscon0 1 7>; + clocks = <&cps_clk 1 7>; }; cps_spi0: spi@700600 { @@ -176,7 +207,7 @@ #address-cells = <0x1>; #size-cells = <0x0>; cell-index = <3>; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -186,7 +217,7 @@ #address-cells = <1>; #size-cells = <0>; cell-index = <4>; - clocks = <&cps_syscon0 1 21>; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -195,8 +226,8 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; - clocks = <&cps_syscon0 1 21>; + interrupts = ; + clocks = <&cps_clk 1 21>; status = "disabled"; }; @@ -205,31 +236,39 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; - clocks = <&cps_syscon0 1 21>; + interrupts = ; + clocks = <&cps_clk 1 21>; status = "disabled"; }; cps_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; - clocks = <&cps_syscon0 1 25>; + interrupts = ; + clocks = <&cps_clk 1 25>; status = "okay"; }; cps_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + interrupts = , + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; - clocks = <&cps_syscon0 1 26>; + clocks = <&cps_clk 1 26>; + dma-coherent; + /* + * The cryptographic engine found on the cp110 + * master is enabled by default at the SoC + * level. Because it is not possible as of now + * to enable two cryptographic engines in + * parallel, disable this one by default. + */ status = "disabled"; }; }; @@ -253,10 +292,10 @@ /* non-prefetchable memory */ 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 13>; + clocks = <&cps_clk 1 13>; status = "disabled"; }; @@ -279,11 +318,11 @@ /* non-prefetchable memory */ 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 11>; + clocks = <&cps_clk 1 11>; status = "disabled"; }; @@ -306,11 +345,11 @@ /* non-prefetchable memory */ 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; - clocks = <&cps_syscon0 1 12>; + clocks = <&cps_clk 1 12>; status = "disabled"; }; }; diff --git a/src/arm64/mediatek/mt6797-evb.dts b/src/arm64/mediatek/mt6797-evb.dts new file mode 100644 index 000000000000..c79109c65409 --- /dev/null +++ b/src/arm64/mediatek/mt6797-evb.dts @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2017 MediaTek Inc. + * Author: Mars.C + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +#include "mt6797.dtsi" + +/ { + model = "MediaTek MT6797 Evaluation Board"; + compatible = "mediatek,mt6797-evb", "mediatek,mt6797"; + + aliases { + serial0 = &uart0; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x1e800000>; + }; + + chosen {}; +}; + +&uart0 { + status = "okay"; +}; diff --git a/src/arm64/mediatek/mt6797.dtsi b/src/arm64/mediatek/mt6797.dtsi new file mode 100644 index 000000000000..31088a9f71de --- /dev/null +++ b/src/arm64/mediatek/mt6797.dtsi @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2017 MediaTek Inc. + * Author: Mars.C + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +/ { + compatible = "mediatek,mt6797"; + interrupt-parent = <&sysirq>; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x001>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x002>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x003>; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x100>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x101>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x102>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x103>; + }; + + cpu8: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + enable-method = "psci"; + reg = <0x200>; + }; + + cpu9: cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + enable-method = "psci"; + reg = <0x201>; + }; + }; + + clk26m: oscillator@0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; + }; + + clk32k: oscillator@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + clock-output-names = "clk32k"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + + topckgen: topckgen@10000000 { + compatible = "mediatek,mt6797-topckgen"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infrasys: infracfg_ao@10001000 { + compatible = "mediatek,mt6797-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + }; + + scpsys: scpsys@10006000 { + compatible = "mediatek,mt6797-scpsys"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + clocks = <&topckgen CLK_TOP_MUX_MFG>, + <&topckgen CLK_TOP_MUX_MM>, + <&topckgen CLK_TOP_MUX_VDEC>; + clock-names = "mfg", "mm", "vdec"; + infracfg = <&infrasys>; + }; + + apmixedsys: apmixed@1000c000 { + compatible = "mediatek,mt6797-apmixedsys"; + reg = <0 0x1000c000 0 0x1000>; + #clock-cells = <1>; + }; + + sysirq: intpol-controller@10200620 { + compatible = "mediatek,mt6797-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10220620 0 0x20>, + <0 0x10220690 0 0x10>; + }; + + uart0: serial@11002000 { + compatible = "mediatek,mt6797-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x400>; + interrupts = ; + clocks = <&infrasys CLK_INFRA_UART0>, + <&infrasys CLK_INFRA_AP_DMA>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt6797-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x400>; + interrupts = ; + clocks = <&infrasys CLK_INFRA_UART1>, + <&infrasys CLK_INFRA_AP_DMA>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt6797-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x400>; + interrupts = ; + clocks = <&infrasys CLK_INFRA_UART2>, + <&infrasys CLK_INFRA_AP_DMA>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + uart3: serial@11005000 { + compatible = "mediatek,mt6797-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11005000 0 0x400>; + interrupts = ; + clocks = <&infrasys CLK_INFRA_UART3>, + <&infrasys CLK_INFRA_AP_DMA>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + mmsys: mmsys_config@14000000 { + compatible = "mediatek,mt6797-mmsys", "syscon"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; + }; + + imgsys: imgsys_config@15000000 { + compatible = "mediatek,mt6797-imgsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; + }; + + vdecsys: vdec_gcon@16000000 { + compatible = "mediatek,mt6797-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x10000>; + #clock-cells = <1>; + }; + + vencsys: venc_gcon@17000000 { + compatible = "mediatek,mt6797-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + gic: interrupt-controller@19000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-controller; + reg = <0 0x19000000 0 0x10000>, /* GICD */ + <0 0x19200000 0 0x200000>, /* GICR */ + <0 0x10240000 0 0x2000>; /* GICC */ + }; +}; diff --git a/src/arm64/mediatek/mt8173.dtsi b/src/arm64/mediatek/mt8173.dtsi index 6922252f317b..b99a27372965 100644 --- a/src/arm64/mediatek/mt8173.dtsi +++ b/src/arm64/mediatek/mt8173.dtsi @@ -731,8 +731,9 @@ <0 0x11280700 0 0x0100>; reg-names = "mac", "ippc"; interrupts = ; - phys = <&phy_port0 PHY_TYPE_USB3>, - <&phy_port1 PHY_TYPE_USB2>; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>, + <&u2port1 PHY_TYPE_USB2>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>, @@ -763,21 +764,31 @@ u3phy: usb-phy@11290000 { compatible = "mediatek,mt8173-u3phy"; reg = <0 0x11290000 0 0x800>; - clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>; - clock-names = "u3phya_ref"; #address-cells = <2>; #size-cells = <2>; ranges; status = "okay"; - phy_port0: port@11290800 { - reg = <0 0x11290800 0 0x800>; + u2port0: usb-phy@11290800 { + reg = <0 0x11290800 0 0x100>; + clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>; + clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; - phy_port1: port@11291000 { - reg = <0 0x11291000 0 0x800>; + u3port0: usb-phy@11290900 { + reg = <0 0x11290900 0 0x700>; + clocks = <&clk26m>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + + u2port1: usb-phy@11291000 { + reg = <0 0x11291000 0 0x100>; + clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>; + clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; @@ -792,80 +803,74 @@ #clock-cells = <1>; }; - mdp { - compatible = "mediatek,mt8173-mdp"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + mdp_rdma0: rdma@14001000 { + compatible = "mediatek,mt8173-mdp-rdma", + "mediatek,mt8173-mdp"; + reg = <0 0x14001000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA0>; + mediatek,larb = <&larb0>; mediatek,vpu = <&vpu>; + }; - mdp_rdma0: rdma@14001000 { - compatible = "mediatek,mt8173-mdp-rdma"; - reg = <0 0x14001000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MUTEX_32K>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,larb = <&larb0>; - }; + mdp_rdma1: rdma@14002000 { + compatible = "mediatek,mt8173-mdp-rdma"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA1>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA1>; + mediatek,larb = <&larb4>; + }; - mdp_rdma1: rdma@14002000 { - compatible = "mediatek,mt8173-mdp-rdma"; - reg = <0 0x14002000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RDMA1>, - <&mmsys CLK_MM_MUTEX_32K>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_RDMA1>; - mediatek,larb = <&larb4>; - }; + mdp_rsz0: rsz@14003000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14003000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; - mdp_rsz0: rsz@14003000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14003000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ0>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; + mdp_rsz1: rsz@14004000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14004000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; - mdp_rsz1: rsz@14004000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14004000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ1>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; + mdp_rsz2: rsz@14005000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14005000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ2>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; - mdp_rsz2: rsz@14005000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14005000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ2>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; + mdp_wdma0: wdma@14006000 { + compatible = "mediatek,mt8173-mdp-wdma"; + reg = <0 0x14006000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WDMA>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WDMA>; + mediatek,larb = <&larb0>; + }; - mdp_wdma0: wdma@14006000 { - compatible = "mediatek,mt8173-mdp-wdma"; - reg = <0 0x14006000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WDMA>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WDMA>; - mediatek,larb = <&larb0>; - }; + mdp_wrot0: wrot@14007000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14007000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT0>; + mediatek,larb = <&larb0>; + }; - mdp_wrot0: wrot@14007000 { - compatible = "mediatek,mt8173-mdp-wrot"; - reg = <0 0x14007000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WROT0>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WROT0>; - mediatek,larb = <&larb0>; - }; - - mdp_wrot1: wrot@14008000 { - compatible = "mediatek,mt8173-mdp-wrot"; - reg = <0 0x14008000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WROT1>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WROT1>; - mediatek,larb = <&larb4>; - }; + mdp_wrot1: wrot@14008000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14008000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT1>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT1>; + mediatek,larb = <&larb4>; }; ovl0: ovl@1400c000 { diff --git a/src/arm64/nvidia/tegra132.dtsi b/src/arm64/nvidia/tegra132.dtsi index 2b17936ac5be..c2f0f2743578 100644 --- a/src/arm64/nvidia/tegra132.dtsi +++ b/src/arm64/nvidia/tegra132.dtsi @@ -12,7 +12,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -55,6 +55,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -68,6 +69,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/src/arm64/nvidia/tegra186.dtsi b/src/arm64/nvidia/tegra186.dtsi index 5e62e68ac053..0b0552c9f7dd 100644 --- a/src/arm64/nvidia/tegra186.dtsi +++ b/src/arm64/nvidia/tegra186.dtsi @@ -348,6 +348,13 @@ reg-names = "pmc", "wake", "aotag", "scratch"; }; + ccplex@e000000 { + compatible = "nvidia,tegra186-ccplex-cluster"; + reg = <0x0 0x0e000000 0x0 0x3fffff>; + + nvidia,bpmp = <&bpmp>; + }; + gpu@17000000 { compatible = "nvidia,gp10b"; reg = <0x0 0x17000000 0x0 0x1000000>, diff --git a/src/arm64/nvidia/tegra210-p2371-2180.dts b/src/arm64/nvidia/tegra210-p2371-2180.dts index 4c1ea7a08d43..7cb95e042117 100644 --- a/src/arm64/nvidia/tegra210-p2371-2180.dts +++ b/src/arm64/nvidia/tegra210-p2371-2180.dts @@ -7,7 +7,7 @@ model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avdd-pll-uerefe-supply = <&avdd_1v05_pll>; diff --git a/src/arm64/nvidia/tegra210.dtsi b/src/arm64/nvidia/tegra210.dtsi index 8f26c4d4409a..29f471e0f22a 100644 --- a/src/arm64/nvidia/tegra210.dtsi +++ b/src/arm64/nvidia/tegra210.dtsi @@ -11,7 +11,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra210-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/src/arm64/qcom/apq8016-sbc.dtsi b/src/arm64/qcom/apq8016-sbc.dtsi index a17f5b9a5de6..bd310ac1967a 100644 --- a/src/arm64/qcom/apq8016-sbc.dtsi +++ b/src/arm64/qcom/apq8016-sbc.dtsi @@ -178,7 +178,7 @@ led@5 { label = "apq8016-sbc:yellow:wlan"; gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "wlan"; + linux,default-trigger = "phy0tx"; default-state = "off"; }; @@ -215,22 +215,16 @@ usb@78d9000 { extcon = <&usb_id>, <&usb_id>; status = "okay"; - }; - - ehci@78d9000 { - status = "okay"; - }; - - phy@78d9000 { - v1p8-supply = <&pm8916_l7>; - v3p3-supply = <&pm8916_l13>; - vddcx-supply = <&pm8916_s1>; - extcon = <&usb_id>, <&usb_id>; - dr_mode = "otg"; - status = "okay"; - switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_sw_sel_pm>; + adp-disable; + hnp-disable; + srp-disable; + ulpi { + phy { + v1p8-supply = <&pm8916_l7>; + v3p3-supply = <&pm8916_l13>; + extcon = <&usb_id>; + }; + }; }; lpass@07708000 { @@ -348,6 +342,14 @@ pinctrl-0 = <&usb_id_default>; }; + usb-switch { + compatible = "toshiba,tc7usb40mu"; + switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>; + extcon = <&usb_id>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_sw_sel_pm>; + }; + hdmi-out { compatible = "hdmi-connector"; type = "a"; diff --git a/src/arm64/qcom/msm8916.dtsi b/src/arm64/qcom/msm8916.dtsi index ab3093995ded..039991f80831 100644 --- a/src/arm64/qcom/msm8916.dtsi +++ b/src/arm64/qcom/msm8916.dtsi @@ -546,44 +546,40 @@ status = "disabled"; }; - usb_dev: usb@78d9000 { + otg: usb@78d9000 { compatible = "qcom,ci-hdrc"; - reg = <0x78d9000 0x400>; - dr_mode = "peripheral"; - interrupts = ; - usb-phy = <&usb_otg>; - status = "disabled"; - }; - - usb_host: ehci@78d9000 { - compatible = "qcom,ehci-host"; - reg = <0x78d9000 0x400>; - interrupts = ; - usb-phy = <&usb_otg>; - status = "disabled"; - }; - - usb_otg: phy@78d9000 { - compatible = "qcom,usb-otg-snps"; - reg = <0x78d9000 0x400>; + reg = <0x78d9000 0x200>, + <0x78d9200 0x200>; interrupts = , ; - - qcom,vdd-levels = <500000 1000000 1320000>; - qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>; - dr_mode = "peripheral"; - qcom,otg-control = <2>; // PMIC - qcom,manual-pullup; - clocks = <&gcc GCC_USB_HS_AHB_CLK>, - <&gcc GCC_USB_HS_SYSTEM_CLK>, - <&gcc GCC_USB2A_PHY_SLEEP_CLK>; - clock-names = "iface", "core", "sleep"; - - resets = <&gcc GCC_USB2A_PHY_BCR>, - <&gcc GCC_USB_HS_BCR>; - reset-names = "phy", "link"; + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <80000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + phys = <&usb_hs_phy>; status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs_phy: phy { + compatible = "qcom,usb-hs-phy-msm8916", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + qcom,init-seq = /bits/ 8 <0x0 0x44 + 0x1 0x6b 0x2 0x24 0x3 0x13>; + }; + }; }; intc: interrupt-controller@b000000 { @@ -1116,6 +1112,38 @@ }; }; + debug@850000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x850000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU0>; + }; + + debug@852000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x852000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU1>; + }; + + debug@854000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x854000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU2>; + }; + + debug@856000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x856000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU3>; + }; + etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>; diff --git a/src/arm64/qcom/msm8992.dtsi b/src/arm64/qcom/msm8992.dtsi index 44b2d37d8c4b..171578747ed0 100644 --- a/src/arm64/qcom/msm8992.dtsi +++ b/src/arm64/qcom/msm8992.dtsi @@ -68,6 +68,30 @@ clock-frequency = <32768>; }; + vreg_vph_pwr: vreg-vph-pwr { + compatible = "regulator-fixed"; + status = "okay"; + regulator-name = "vph-pwr"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + + regulator-always-on; + }; + + sfpb_mutex: hwmutex { + compatible = "qcom,sfpb-mutex"; + syscon = <&sfpb_mutex_regs 0x0 0x100>; + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + hwlocks = <&sfpb_mutex 3>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -82,6 +106,11 @@ <0xf9002000 0x1000>; }; + apcs: syscon@f900d000 { + compatible = "syscon"; + reg = <0xf900d000 0x2000>; + }; + timer@f9020000 { #address-cells = <1>; #size-cells = <1>; @@ -172,12 +201,36 @@ #power-domain-cells = <1>; reg = <0xfc400000 0x2000>; }; + + rpm_msg_ram: memory@fc428000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0xfc428000 0x4000>; + }; + + sfpb_mutex_regs: syscon@fd484000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "syscon"; + reg = <0xfd484000 0x400>; + }; }; memory { device_type = "memory"; reg = <0 0 0 0>; // bootloader will update }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + smem_region: smem@6a00000 { + reg = <0x0 0x6a00000 0x0 0x200000>; + no-map; + }; + }; + }; diff --git a/src/arm64/qcom/msm8996.dtsi b/src/arm64/qcom/msm8996.dtsi index 9bc9c857a000..8f085716e258 100644 --- a/src/arm64/qcom/msm8996.dtsi +++ b/src/arm64/qcom/msm8996.dtsi @@ -311,6 +311,12 @@ reg = <0x300000 0x90000>; }; + kryocc: clock-controller@6400000 { + compatible = "qcom,apcc-msm8996"; + reg = <0x6400000 0x90000>; + #clock-cells = <1>; + }; + blsp1_spi0: spi@07575000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x07575000 0x600>; diff --git a/src/arm64/realtek/rtd1295-zidoo-x9s.dts b/src/arm64/realtek/rtd1295-zidoo-x9s.dts new file mode 100644 index 000000000000..6efa8091bb30 --- /dev/null +++ b/src/arm64/realtek/rtd1295-zidoo-x9s.dts @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +/memreserve/ 0x0000000000000000 0x0000000000030000; +/memreserve/ 0x000000000001f000 0x0000000000001000; +/memreserve/ 0x0000000000030000 0x00000000000d0000; +/memreserve/ 0x0000000001b00000 0x00000000004be000; +/memreserve/ 0x0000000001ffe000 0x0000000000004000; + +#include "rtd1295.dtsi" + +/ { + compatible = "zidoo,x9s", "realtek,rtd1295"; + model = "Zidoo X9S"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x80000000>; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/src/arm64/realtek/rtd1295.dtsi b/src/arm64/realtek/rtd1295.dtsi new file mode 100644 index 000000000000..d8f84666c8ce --- /dev/null +++ b/src/arm64/realtek/rtd1295.dtsi @@ -0,0 +1,131 @@ +/* + * Realtek RTD1295 SoC + * + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include + +/ { + compatible = "realtek,rtd1295"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + tee@10100000 { + reg = <0x10100000 0xf00000>; + no-map; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + /* Exclude up to 2 GiB of RAM */ + ranges = <0x80000000 0x80000000 0x80000000>; + + uart0: serial@98007800 { + compatible = "snps,dw-apb-uart"; + reg = <0x98007800 0x400>, + <0x98007000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + uart1: serial@9801b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x9801b200 0x100>, + <0x9801b00c 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial@9801b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x9801b400 0x100>, + <0x9801b00c 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + gic: interrupt-controller@ff011000 { + compatible = "arm,gic-400"; + reg = <0xff011000 0x1000>, + <0xff012000 0x2000>, + <0xff014000 0x2000>, + <0xff016000 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; diff --git a/src/arm64/renesas/r8a7795-es1-h3ulcb.dts b/src/arm64/renesas/r8a7795-es1-h3ulcb.dts new file mode 100644 index 000000000000..95fe207cb6a3 --- /dev/null +++ b/src/arm64/renesas/r8a7795-es1-h3ulcb.dts @@ -0,0 +1,42 @@ +/* + * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board + * + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 + +/dts-v1/; +#include "r8a7795-es1.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas H3ULCB board based on r8a7795 ES1.x"; + compatible = "renesas,h3ulcb", "renesas,r8a7795"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; + + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; + }; +}; diff --git a/src/arm64/renesas/r8a7795-es1-salvator-x.dts b/src/arm64/renesas/r8a7795-es1-salvator-x.dts new file mode 100644 index 000000000000..b84c156ed696 --- /dev/null +++ b/src/arm64/renesas/r8a7795-es1-salvator-x.dts @@ -0,0 +1,115 @@ +/* + * Device Tree Source for the Salvator-X board + * + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 + +/dts-v1/; +#include "r8a7795-es1.dtsi" +#include "salvator-x.dtsi" + +/ { + model = "Renesas Salvator-X board based on r8a7795 ES1.x"; + compatible = "renesas,salvator-x", "renesas,r8a7795"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; + + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 721>, + <&cpg CPG_MOD 727>, + <&versaclock5 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; +}; + +&ehci2 { + status = "okay"; +}; + +&hdmi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; + }; + }; + }; +}; + +&hdmi0_con { + remote-endpoint = <&rcar_dw_hdmi0_out>; +}; + +&hdmi1 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hdmi1_con { + remote-endpoint = <&rcar_dw_hdmi1_out>; +}; + +&ohci2 { + status = "okay"; +}; + +&pfc { + usb2_pins: usb2 { + groups = "usb2"; + function = "usb2"; + }; +}; + +&sata { + status = "okay"; +}; + +&usb2_phy2 { + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; diff --git a/src/arm64/renesas/r8a7795-es1.dtsi b/src/arm64/renesas/r8a7795-es1.dtsi new file mode 100644 index 000000000000..a0ba7bd21ea3 --- /dev/null +++ b/src/arm64/renesas/r8a7795-es1.dtsi @@ -0,0 +1,84 @@ +/* + * Device Tree Source for the r8a7795 ES1.x SoC + * + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7795.dtsi" + +&soc { + xhci1: usb@ee0400000 { + compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; + reg = <0 0xee040000 0 0xc00>; + interrupts = ; + clocks = <&cpg CPG_MOD 327>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 327>; + status = "disabled"; + }; + + fcpf2: fcp@fe952000 { + compatible = "renesas,fcpf"; + reg = <0 0xfe952000 0 0x200>; + clocks = <&cpg CPG_MOD 613>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 613>; + }; + + vspi2: vsp@fe9c0000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe9c0000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 629>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 629>; + + renesas,fcp = <&fcpvi2>; + }; + + fcpvi2: fcp@fe9cf000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9cf000 0 0x200>; + clocks = <&cpg CPG_MOD 609>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 609>; + }; + + vspd3: vsp@fea38000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea38000 0 0x4000>; + interrupts = ; + clocks = <&cpg CPG_MOD 620>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 620>; + + renesas,fcp = <&fcpvd3>; + }; + + fcpvd3: fcp@fea3f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea3f000 0 0x200>; + clocks = <&cpg CPG_MOD 600>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 600>; + }; + + fdp1@fe948000 { + compatible = "renesas,fdp1"; + reg = <0 0xfe948000 0 0x2400>; + interrupts = ; + clocks = <&cpg CPG_MOD 117>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 117>; + renesas,fcp = <&fcpf2>; + }; +}; + +&du { + compatible = "renesas,du-r8a7795"; + vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; +}; diff --git a/src/arm64/renesas/r8a7795-h3ulcb.dts b/src/arm64/renesas/r8a7795-h3ulcb.dts index ab352159de65..0426f41765f0 100644 --- a/src/arm64/renesas/r8a7795-h3ulcb.dts +++ b/src/arm64/renesas/r8a7795-h3ulcb.dts @@ -9,24 +9,16 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 + /dts-v1/; #include "r8a7795.dtsi" -#include -#include +#include "ulcb.dtsi" / { - model = "Renesas H3ULCB board based on r8a7795"; + model = "Renesas H3ULCB board based on r8a7795 ES2.0+"; compatible = "renesas,h3ulcb", "renesas,r8a7795"; - aliases { - serial0 = &scif2; - ethernet0 = &avb; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -47,330 +39,4 @@ device_type = "memory"; reg = <0x7 0x00000000 0x0 0x40000000>; }; - - leds { - compatible = "gpio-leds"; - - led5 { - gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; - }; - led6 { - gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; - }; - }; - - keyboard { - compatible = "gpio-keys"; - - key-1 { - linux,code = ; - label = "SW3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - }; - }; - - x12_clk: x12 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - audio_clkout: audio-clkout { - /* - * This is same as <&rcar_sound 0> - * but needed to avoid cs2000/rcar_sound probe dead-lock - */ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4613: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcpu>; - simple-audio-card,frame-master = <&sndcpu>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4613>; - }; - }; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - avb_pins: avb { - groups = "avb_mdc"; - function = "avb"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; - function = "ssi"; - }; - - sound_clk_pins: sound-clk { - groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", - "audio_clkout_a", "audio_clkout3_a"; - function = "audio_clk"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; - - clock-frequency = <100000>; - - ak4613: codec@10 { - compatible = "asahi-kasei,ak4613"; - #sound-dai-cells = <0>; - reg = <0x10>; - clocks = <&rcar_sound 3>; - - asahi-kasei,in1-single-end; - asahi-kasei,in2-single-end; - asahi-kasei,out1-single-end; - asahi-kasei,out2-single-end; - asahi-kasei,out3-single-end; - asahi-kasei,out4-single-end; - asahi-kasei,out5-single-end; - asahi-kasei,out6-single-end; - }; - - cs2000: clk-multiplier@4f { - #clock-cells = <0>; - compatible = "cirrus,cs2000-cp"; - reg = <0x4f>; - clocks = <&audio_clkout>, <&x12_clk>; - clock-names = "clk_in", "ref_clk"; - - assigned-clocks = <&cs2000>; - assigned-clock-rates = <24576000>; /* 1/1 divide */ - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins &sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - /* audio_clkout0/1/2/3 */ - #clock-cells = <1>; - clock-frequency = <11289600>; - - status = "okay"; - - /* update to */ - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&cs2000>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7795_CLK_S0D4>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0 &src0 &dvc0>; - capture = <&ssi1 &src1 &dvc1>; - }; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&audio_clk_a { - clock-frequency = <22579200>; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&usb2_phy1 { - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; }; diff --git a/src/arm64/renesas/r8a7795-salvator-x.dts b/src/arm64/renesas/r8a7795-salvator-x.dts index 639aa085d996..684fb3b9d154 100644 --- a/src/arm64/renesas/r8a7795-salvator-x.dts +++ b/src/arm64/renesas/r8a7795-salvator-x.dts @@ -8,577 +8,108 @@ * kind, whether express or implied. */ -/* - * SSI-AK4613 - * - * This command is required when Playback/Capture - * - * amixer set "DVC Out" 100% - * amixer set "DVC In" 100% - * - * You can use Mute - * - * amixer set "DVC Out Mute" on - * amixer set "DVC In Mute" on - * - * You can use Volume Ramp - * - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" - * amixer set "DVC Out Ramp" on - * aplay xxx.wav & - * amixer set "DVC Out" 80% // Volume Down - * amixer set "DVC Out" 100% // Volume Up - */ +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 /dts-v1/; #include "r8a7795.dtsi" -#include +#include "salvator-x.dtsi" / { - model = "Renesas Salvator-X board based on r8a7795"; + model = "Renesas Salvator-X board based on r8a7795 ES2.0+"; compatible = "renesas,salvator-x", "renesas,r8a7795"; - aliases { - serial0 = &scif2; - serial1 = &scif1; - ethernet0 = &avb; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; - x12_clk: x12 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; }; - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; }; - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vcc_sdhi3: regulator-vcc-sdhi3 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI3 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi3: regulator-vccq-sdhi3 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI3 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vbus0_usb2: regulator-vbus0-usb2 { - compatible = "regulator-fixed"; - - regulator-name = "USB20_VBUS0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - audio_clkout: audio_clkout { - /* - * This is same as <&rcar_sound 0> - * but needed to avoid cs2000/rcar_sound probe dead-lock - */ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4613: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcpu>; - simple-audio-card,frame-master = <&sndcpu>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4613>; - }; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; }; }; &du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 721>, + <&cpg CPG_MOD 727>, + <&versaclock5 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; +}; + +&ehci2 { + status = "okay"; +}; + +&hdmi0 { status = "okay"; ports { - port@0 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - port@3 { - lvds_connector: endpoint { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; }; }; }; }; -&extal_clk { - clock-frequency = <16666666>; +&hdmi0_con { + remote-endpoint = <&rcar_dw_hdmi0_out>; }; -&extalr_clk { - clock-frequency = <32768>; +&hdmi1 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hdmi1_con { + remote-endpoint = <&rcar_dw_hdmi1_out>; +}; + +&ohci2 { + status = "okay"; }; &pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif1_pins: scif1 { - groups = "scif1_data_a", "scif1_ctrl"; - function = "scif1"; - }; - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - avb_pins: avb { - mux { - groups = "avb_link", "avb_phy_int", "avb_mdc", - "avb_mii"; - function = "avb"; - }; - - pins_mdc { - groups = "avb_mdc"; - drive-strength = <24>; - }; - - pins_mii_tx { - pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", - "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; - drive-strength = <12>; - }; - }; - - du_pins: du { - groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; - function = "du"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sdhi3_pins: sd3 { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <3300>; - }; - - sdhi3_pins_uhs: sd3_uhs { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <1800>; - }; - - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; - function = "ssi"; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", - "audio_clkout_a", "audio_clkout3_a"; - function = "audio_clk"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - mux { - groups = "usb1"; - function = "usb1"; - }; - - ovc { - pins = "GP_6_27"; - bias-pull-up; - }; - - pwen { - pins = "GP_6_26"; - bias-pull-down; - }; - }; - usb2_pins: usb2 { groups = "usb2"; function = "usb2"; }; }; -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; - - clock-frequency = <100000>; - - ak4613: codec@10 { - compatible = "asahi-kasei,ak4613"; - #sound-dai-cells = <0>; - reg = <0x10>; - clocks = <&rcar_sound 3>; - - asahi-kasei,in1-single-end; - asahi-kasei,in2-single-end; - asahi-kasei,out1-single-end; - asahi-kasei,out2-single-end; - asahi-kasei,out3-single-end; - asahi-kasei,out4-single-end; - asahi-kasei,out5-single-end; - asahi-kasei,out6-single-end; - }; - - cs2000: clk_multiplier@4f { - #clock-cells = <0>; - compatible = "cirrus,cs2000-cp"; - reg = <0x4f>; - clocks = <&audio_clkout>, <&x12_clk>; - clock-names = "clk_in", "ref_clk"; - - assigned-clocks = <&cs2000>; - assigned-clock-rates = <24576000>; /* 1/1 divide */ - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins &sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - /* audio_clkout0/1/2/3 */ - #clock-cells = <1>; - clock-frequency = <11289600>; - - status = "okay"; - - /* update to */ - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&cs2000>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7795_CLK_S0D4>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0 &src0 &dvc0>; - capture = <&ssi1 &src1 &dvc1>; - }; - }; -}; - &sata { status = "okay"; }; -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi3 { - pinctrl-0 = <&sdhi3_pins>; - pinctrl-1 = <&sdhi3_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi3>; - vqmmc-supply = <&vccq_sdhi3>; - cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&audio_clk_a { - clock-frequency = <22579200>; -}; - -&i2c_dvfs { - status = "okay"; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&xhci0 { - status = "okay"; -}; - -&usb2_phy0 { - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - - vbus-supply = <&vbus0_usb2>; - status = "okay"; -}; - -&usb2_phy1 { - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - &usb2_phy2 { pinctrl-0 = <&usb2_pins>; pinctrl-names = "default"; status = "okay"; }; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&ehci2 { - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&ohci2 { - status = "okay"; -}; - -&hsusb { - status = "okay"; -}; - -&pcie_bus_clk { - clock-frequency = <100000000>; -}; - -&pciec0 { - status = "okay"; -}; - -&pciec1 { - status = "okay"; -}; diff --git a/src/arm64/renesas/r8a7795-salvator-xs.dts b/src/arm64/renesas/r8a7795-salvator-xs.dts new file mode 100644 index 000000000000..de354957144b --- /dev/null +++ b/src/arm64/renesas/r8a7795-salvator-xs.dts @@ -0,0 +1,109 @@ +/* + * Device Tree Source for the Salvator-X 2nd version board + * + * Copyright (C) 2015-2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 + +/dts-v1/; +#include "r8a7795.dtsi" +#include "salvator-xs.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+"; + compatible = "renesas,salvator-xs", "renesas,r8a7795"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; + + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; + + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 721>, + <&cpg CPG_MOD 727>, + <&x21_clk>, + <&x22_clk>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "dclkin.1", "dclkin.2"; +}; + +&ehci2 { + status = "okay"; +}; + +&hdmi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; + }; + }; + }; +}; + +&hdmi0_con { + remote-endpoint = <&rcar_dw_hdmi0_out>; +}; + +&hdmi1 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; + }; + }; + }; +}; + +&hdmi1_con { + remote-endpoint = <&rcar_dw_hdmi1_out>; +}; + +&ohci2 { + status = "okay"; +}; + +&pfc { + usb2_pins: usb2 { + groups = "usb2"; + function = "usb2"; + }; +}; + +&usb2_phy2 { + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; diff --git a/src/arm64/renesas/r8a7795.dtsi b/src/arm64/renesas/r8a7795.dtsi index e99d6443b3e4..e31c1b660b3f 100644 --- a/src/arm64/renesas/r8a7795.dtsi +++ b/src/arm64/renesas/r8a7795.dtsi @@ -182,7 +182,7 @@ clock-frequency = <0>; }; - soc { + soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -398,7 +398,7 @@ #power-domain-cells = <1>; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7795"; reg = <0 0xe6060000 0 0x50c>; }; @@ -883,6 +883,8 @@ clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 926>; + dmas = <&dmac0 0x11>, <&dmac0 0x10>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -1118,6 +1120,16 @@ "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 1005>, + <&cpg 1006>, <&cpg 1007>, + <&cpg 1008>, <&cpg 1009>, + <&cpg 1010>, <&cpg 1011>, + <&cpg 1012>, <&cpg 1013>, + <&cpg 1014>, <&cpg 1015>; + reset-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0"; status = "disabled"; rcar_sound,dvc { @@ -1274,16 +1286,6 @@ status = "disabled"; }; - xhci1: usb@ee0400000 { - compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; - reg = <0 0xee040000 0 0xc00>; - interrupts = ; - clocks = <&cpg CPG_MOD 327>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 327>; - status = "disabled"; - }; - usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; @@ -1568,14 +1570,6 @@ resets = <&cpg 614>; }; - fcpf2: fcp@fe952000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe952000 0 0x200>; - clocks = <&cpg CPG_MOD 613>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 613>; - }; - vspbd: vsp@fe960000 { compatible = "renesas,vsp2"; reg = <0 0xfe960000 0 0x8000>; @@ -1633,25 +1627,6 @@ resets = <&cpg 610>; }; - vspi2: vsp@fe9c0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9c0000 0 0x8000>; - interrupts = ; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 629>; - - renesas,fcp = <&fcpvi2>; - }; - - fcpvi2: fcp@fe9cf000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9cf000 0 0x200>; - clocks = <&cpg CPG_MOD 609>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 609>; - }; - vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x4000>; @@ -1709,25 +1684,6 @@ resets = <&cpg 601>; }; - vspd3: vsp@fea38000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea38000 0 0x4000>; - interrupts = ; - clocks = <&cpg CPG_MOD 620>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 620>; - - renesas,fcp = <&fcpvd3>; - }; - - fcpvd3: fcp@fea3f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea3f000 0 0x200>; - clocks = <&cpg CPG_MOD 600>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 600>; - }; - fdp1@fe940000 { compatible = "renesas,fdp1"; reg = <0 0xfe940000 0 0x2400>; @@ -1748,18 +1704,57 @@ renesas,fcp = <&fcpf1>; }; - fdp1@fe948000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe948000 0 0x2400>; - interrupts = ; - clocks = <&cpg CPG_MOD 117>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 117>; - renesas,fcp = <&fcpf2>; + hdmi0: hdmi0@fead0000 { + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; + reg = <0 0xfead0000 0 0x10000>; + interrupts = ; + clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; + clock-names = "iahb", "isfr"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 729>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dw_hdmi0_in: endpoint { + remote-endpoint = <&du_out_hdmi0>; + }; + }; + port@1 { + reg = <1>; + }; + }; + }; + + hdmi1: hdmi1@feae0000 { + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; + reg = <0 0xfeae0000 0 0x10000>; + interrupts = ; + clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; + clock-names = "iahb", "isfr"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 728>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + }; + }; }; du: display@feb00000 { - compatible = "renesas,du-r8a7795"; reg = <0 0xfeb00000 0 0x80000>, <0 0xfeb90000 0 0x14>; reg-names = "du", "lvds.0"; @@ -1775,8 +1770,6 @@ clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; status = "disabled"; - vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; - ports { #address-cells = <1>; #size-cells = <0>; @@ -1789,11 +1782,13 @@ port@1 { reg = <1>; du_out_hdmi0: endpoint { + remote-endpoint = <&dw_hdmi0_in>; }; }; port@2 { reg = <2>; du_out_hdmi1: endpoint { + remote-endpoint = <&dw_hdmi1_in>; }; }; port@3 { diff --git a/src/arm64/renesas/r8a7796-m3ulcb.dts b/src/arm64/renesas/r8a7796-m3ulcb.dts index 372b2a944716..38b58b7fca4b 100644 --- a/src/arm64/renesas/r8a7796-m3ulcb.dts +++ b/src/arm64/renesas/r8a7796-m3ulcb.dts @@ -9,180 +9,24 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 + /dts-v1/; #include "r8a7796.dtsi" -#include -#include +#include "ulcb.dtsi" / { model = "Renesas M3ULCB board based on r8a7796"; compatible = "renesas,m3ulcb", "renesas,r8a7796"; - aliases { - serial0 = &scif2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; - leds { - compatible = "gpio-leds"; - - led5 { - gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; - }; - led6 { - gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; - }; - }; - - keyboard { - compatible = "gpio-keys"; - - key-1 { - linux,code = ; - label = "SW3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - }; - }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; }; }; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; diff --git a/src/arm64/renesas/r8a7796-salvator-x.dts b/src/arm64/renesas/r8a7796-salvator-x.dts index c9f59b6ce33f..db4f162d6bdd 100644 --- a/src/arm64/renesas/r8a7796-salvator-x.dts +++ b/src/arm64/renesas/r8a7796-salvator-x.dts @@ -8,25 +8,16 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 + /dts-v1/; #include "r8a7796.dtsi" -#include +#include "salvator-x.dtsi" / { model = "Renesas Salvator-X board based on r8a7796"; compatible = "renesas,salvator-x", "renesas,r8a7796"; - aliases { - serial0 = &scif2; - serial1 = &scif1; - ethernet0 = &avb; - }; - - chosen { - bootargs = "ignore_loglevel"; - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -37,233 +28,4 @@ device_type = "memory"; reg = <0x6 0x00000000 0x0 0x80000000>; }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vcc_sdhi3: regulator-vcc-sdhi3 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI3 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi3: regulator-vccq-sdhi3 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI3 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - avb_pins: avb { - groups = "avb_mdc"; - function = "avb"; - }; - - scif1_pins: scif1 { - groups = "scif1_data_a", "scif1_ctrl"; - function = "scif1"; - }; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sdhi3_pins: sd3 { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <3300>; - }; - - sdhi3_pins_uhs: sd3_uhs { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <1800>; - }; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi3 { - pinctrl-0 = <&sdhi3_pins>; - pinctrl-1 = <&sdhi3_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi3>; - vqmmc-supply = <&vccq_sdhi3>; - cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&i2c_dvfs { - status = "okay"; }; diff --git a/src/arm64/renesas/r8a7796.dtsi b/src/arm64/renesas/r8a7796.dtsi index 2ec1ed5f4991..1f6710912045 100644 --- a/src/arm64/renesas/r8a7796.dtsi +++ b/src/arm64/renesas/r8a7796.dtsi @@ -120,6 +120,29 @@ clock-frequency = <0>; }; + /* + * The external audio clocks are configured as 0 Hz fixed frequency + * clocks by default. + * Boards that provide audio clocks should override them. + */ + audio_clk_a: audio_clk_a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_c: audio_clk_c { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + /* External CAN clock - to be overridden by boards that provide it */ can_clk: can { compatible = "fixed-clock"; @@ -134,6 +157,13 @@ clock-frequency = <0>; }; + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -362,6 +392,78 @@ clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 926>; + dmas = <&dmac0 0x11>, <&dmac0 0x10>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm1: pwm@e6e31000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e31000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm2: pwm@e6e32000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e32000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm3: pwm@e6e33000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e33000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm4: pwm@e6e34000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e34000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm5: pwm@e6e35000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e35000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm6: pwm@e6e36000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e36000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -931,6 +1033,106 @@ dma-channels = <16>; }; + audma0: dma-controller@ec700000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 502>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 502>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 501>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 501>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + hsusb: usb@e6590000 { + /* placeholder */ + }; + + xhci0: usb@ee000000 { + /* placeholder */ + }; + + ohci0: usb@ee080000 { + /* placeholder */ + }; + + ehci0: usb@ee080100 { + /* placeholder */ + }; + + usb2_phy0: usb-phy@ee080200 { + /* placeholder */ + }; + + ohci1: usb@ee0a0000 { + /* placeholder */ + }; + + ehci1: usb@ee0a0100 { + /* placeholder */ + }; + + usb2_phy1: usb-phy@ee0a0200 { + /* placeholder */ + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7796"; reg = <0 0xee100000 0 0x2000>; @@ -1033,5 +1235,224 @@ }; }; }; + + rcar_sound: sound@ec500000 { + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ + /* + * #clock-cells is required for audio_clkout0/1/2/3 + * + * clkout : #clock-cells = <0>; <&rcar_sound>; + * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; + */ + compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; + + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A7796_CLK_S0D4>; + clock-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0", + "src.9", "src.8", "src.7", "src.6", + "src.5", "src.4", "src.3", "src.2", + "src.1", "src.0", + "mix.1", "mix.0", + "ctu.1", "ctu.0", + "dvc.0", "dvc.1", + "clk_a", "clk_b", "clk_c", "clk_i"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 1005>, + <&cpg 1006>, <&cpg 1007>, + <&cpg 1008>, <&cpg 1009>, + <&cpg 1010>, <&cpg 1011>, + <&cpg 1012>, <&cpg 1013>, + <&cpg 1014>, <&cpg 1015>; + reset-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0"; + status = "disabled"; + + rcar_sound,dvc { + dvc0: dvc-0 { + dmas = <&audma1 0xbc>; + dma-names = "tx"; + }; + dvc1: dvc-1 { + dmas = <&audma1 0xbe>; + dma-names = "tx"; + }; + }; + + rcar_sound,mix { + mix0: mix-0 { }; + mix1: mix-1 { }; + }; + + rcar_sound,ctu { + ctu00: ctu-0 { }; + ctu01: ctu-1 { }; + ctu02: ctu-2 { }; + ctu03: ctu-3 { }; + ctu10: ctu-4 { }; + ctu11: ctu-5 { }; + ctu12: ctu-6 { }; + ctu13: ctu-7 { }; + }; + + rcar_sound,src { + src0: src-0 { + interrupts = ; + dmas = <&audma0 0x85>, <&audma1 0x9a>; + dma-names = "rx", "tx"; + }; + src1: src-1 { + interrupts = ; + dmas = <&audma0 0x87>, <&audma1 0x9c>; + dma-names = "rx", "tx"; + }; + src2: src-2 { + interrupts = ; + dmas = <&audma0 0x89>, <&audma1 0x9e>; + dma-names = "rx", "tx"; + }; + src3: src-3 { + interrupts = ; + dmas = <&audma0 0x8b>, <&audma1 0xa0>; + dma-names = "rx", "tx"; + }; + src4: src-4 { + interrupts = ; + dmas = <&audma0 0x8d>, <&audma1 0xb0>; + dma-names = "rx", "tx"; + }; + src5: src-5 { + interrupts = ; + dmas = <&audma0 0x8f>, <&audma1 0xb2>; + dma-names = "rx", "tx"; + }; + src6: src-6 { + interrupts = ; + dmas = <&audma0 0x91>, <&audma1 0xb4>; + dma-names = "rx", "tx"; + }; + src7: src-7 { + interrupts = ; + dmas = <&audma0 0x93>, <&audma1 0xb6>; + dma-names = "rx", "tx"; + }; + src8: src-8 { + interrupts = ; + dmas = <&audma0 0x95>, <&audma1 0xb8>; + dma-names = "rx", "tx"; + }; + src9: src-9 { + interrupts = ; + dmas = <&audma0 0x97>, <&audma1 0xba>; + dma-names = "rx", "tx"; + }; + }; + + rcar_sound,ssi { + ssi0: ssi-0 { + interrupts = ; + dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi1: ssi-1 { + interrupts = ; + dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi2: ssi-2 { + interrupts = ; + dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi3: ssi-3 { + interrupts = ; + dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi4: ssi-4 { + interrupts = ; + dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi5: ssi-5 { + interrupts = ; + dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi6: ssi-6 { + interrupts = ; + dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi7: ssi-7 { + interrupts = ; + dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi8: ssi-8 { + interrupts = ; + dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi9: ssi-9 { + interrupts = ; + dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + }; + }; + + pciec0: pcie@fe000000 { + /* placeholder */ + }; + + pciec1: pcie@ee800000 { + /* placeholder */ + }; + + du: display@feb00000 { + /* placeholder */ + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb: endpoint { + }; + }; + }; + }; }; }; diff --git a/src/arm64/renesas/salvator-common.dtsi b/src/arm64/renesas/salvator-common.dtsi new file mode 100644 index 000000000000..f903957da504 --- /dev/null +++ b/src/arm64/renesas/salvator-common.dtsi @@ -0,0 +1,629 @@ +/* + * Device Tree Source for common parts of Salvator-X board variants + * + * Copyright (C) 2015-2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* + * SSI-AK4613 + * + * This command is required when Playback/Capture + * + * amixer set "DVC Out" 100% + * amixer set "DVC In" 100% + * + * You can use Mute + * + * amixer set "DVC Out Mute" on + * amixer set "DVC In Mute" on + * + * You can use Volume Ramp + * + * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" + * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" + * amixer set "DVC Out Ramp" on + * aplay xxx.wav & + * amixer set "DVC Out" 80% // Volume Down + * amixer set "DVC Out" 100% // Volume Up + */ + +#include + +/ { + aliases { + serial0 = &scif2; + serial1 = &scif1; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2000/rcar_sound probe dead-lock + */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 50000>; + + brightness-levels = <256 128 64 16 8 4 0>; + default-brightness-level = <6>; + + enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + rsnd_ak4613: sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4613>; + }; + }; + + vbus0_usb2: regulator-vbus0-usb2 { + compatible = "regulator-fixed"; + + regulator-name = "USB20_VBUS0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi3: regulator-vcc-sdhi3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi3: regulator-vccq-sdhi3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + hdmi0-out { + compatible = "hdmi-connector"; + label = "HDMI0 OUT"; + type = "a"; + + port { + hdmi0_con: endpoint { + }; + }; + }; + + hdmi1-out { + compatible = "hdmi-connector"; + label = "HDMI1 OUT"; + type = "a"; + + port { + hdmi1_con: endpoint { + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + x12_clk: x12 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + /* External DU dot clocks */ + x21_clk: x21-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x22_clk: x22-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x23_clk: x23-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&audio_clk_a { + clock-frequency = <22579200>; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + port@3 { + lvds_connector: endpoint { + }; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&hsusb { + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + + clock-frequency = <100000>; + + ak4613: codec@10 { + compatible = "asahi-kasei,ak4613"; + #sound-dai-cells = <0>; + reg = <0x10>; + clocks = <&rcar_sound 3>; + + asahi-kasei,in1-single-end; + asahi-kasei,in2-single-end; + asahi-kasei,out1-single-end; + asahi-kasei,out2-single-end; + asahi-kasei,out3-single-end; + asahi-kasei,out4-single-end; + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + }; + + cs2000: clk_multiplier@4f { + #clock-cells = <0>; + compatible = "cirrus,cs2000-cp"; + reg = <0x4f>; + clocks = <&audio_clkout>, <&x12_clk>; + clock-names = "clk_in", "ref_clk"; + + assigned-clocks = <&cs2000>; + assigned-clock-rates = <24576000>; /* 1/1 divide */ + }; +}; + +&i2c4 { + status = "okay"; + + csa_vdd: adc@7c { + compatible = "maxim,max9611"; + reg = <0x7c>; + + shunt-resistor-micro-ohms = <5000>; + }; + + csa_dvfs: adc@7f { + compatible = "maxim,max9611"; + reg = <0x7f>; + + shunt-resistor-micro-ohms = <5000>; + }; +}; + +&i2c_dvfs { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_phy_int", "avb_mdc", + "avb_mii"; + function = "avb"; + }; + + pins_mdc { + groups = "avb_mdc"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; + function = "du"; + }; + + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + + pwm1_pins: pwm1 { + groups = "pwm1_a"; + function = "pwm1"; + }; + + scif1_pins: scif1 { + groups = "scif1_data_a", "scif1_ctrl"; + function = "scif1"; + }; + + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_uhs: sd3_uhs { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; + + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_clk_pins: sound_clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a", "audio_clkout3_a"; + function = "audio_clk"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + mux { + groups = "usb1"; + function = "usb1"; + }; + + ovc { + pins = "GP_6_27"; + bias-pull-up; + }; + + pwen { + pins = "GP_6_26"; + bias-pull-down; + }; + }; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells = <1>; + clock-frequency = <12288000 11289600>; + + status = "okay"; + + /* update to */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2000>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + + rcar_sound,dai { + dai0 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; +}; + +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi3>; + vqmmc-supply = <&vccq_sdhi3>; + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; +}; + +&ssi1 { + shared-pin; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + vbus-supply = <&vbus0_usb2>; + status = "okay"; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; diff --git a/src/arm64/renesas/salvator-x.dtsi b/src/arm64/renesas/salvator-x.dtsi new file mode 100644 index 000000000000..468868c8ed9f --- /dev/null +++ b/src/arm64/renesas/salvator-x.dtsi @@ -0,0 +1,30 @@ +/* + * Device Tree Source for the Salvator-X board + * + * Copyright (C) 2015-2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "salvator-common.dtsi" + +/ { + model = "Renesas Salvator-X board"; + compatible = "renesas,salvator-x"; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&i2c4 { + versaclock5: clock-generator@6a { + compatible = "idt,5p49v5923"; + reg = <0x6a>; + #clock-cells = <1>; + clocks = <&x23_clk>; + clock-names = "xin"; + }; +}; diff --git a/src/arm64/renesas/salvator-xs.dtsi b/src/arm64/renesas/salvator-xs.dtsi new file mode 100644 index 000000000000..81227e3c2c6f --- /dev/null +++ b/src/arm64/renesas/salvator-xs.dtsi @@ -0,0 +1,20 @@ +/* + * Device Tree Source for the Salvator-X 2nd version board + * + * Copyright (C) 2015-2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "salvator-common.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board"; + compatible = "renesas,salvator-xs"; +}; + +&extal_clk { + clock-frequency = <16640000>; +}; diff --git a/src/arm64/renesas/ulcb.dtsi b/src/arm64/renesas/ulcb.dtsi new file mode 100644 index 000000000000..d1a3f3b7a0ab --- /dev/null +++ b/src/arm64/renesas/ulcb.dtsi @@ -0,0 +1,367 @@ +/* + * Device Tree Source for the R-Car Gen3 ULCB board + * + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include + +/ { + model = "Renesas R-Car Gen3 ULCB board"; + + aliases { + serial0 = &scif2; + ethernet0 = &avb; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2000/rcar_sound probe dead-lock + */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + }; + + keyboard { + compatible = "gpio-keys"; + + key-1 { + linux,code = ; + label = "SW3"; + wakeup-source; + debounce-interval = <20>; + gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led5 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + led6 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + rsnd_ak4613: sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4613>; + }; + }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + x12_clk: x12 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; +}; + +&audio_clk_a { + clock-frequency = <22579200>; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + + clock-frequency = <100000>; + + ak4613: codec@10 { + compatible = "asahi-kasei,ak4613"; + #sound-dai-cells = <0>; + reg = <0x10>; + clocks = <&rcar_sound 3>; + + asahi-kasei,in1-single-end; + asahi-kasei,in2-single-end; + asahi-kasei,out1-single-end; + asahi-kasei,out2-single-end; + asahi-kasei,out3-single-end; + asahi-kasei,out4-single-end; + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + }; + + cs2000: clk-multiplier@4f { + #clock-cells = <0>; + compatible = "cirrus,cs2000-cp"; + reg = <0x4f>; + clocks = <&audio_clkout>, <&x12_clk>; + clock-names = "clk_in", "ref_clk"; + + assigned-clocks = <&cs2000>; + assigned-clock-rates = <24576000>; /* 1/1 divide */ + }; +}; + +&ohci1 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_phy_int", "avb_mdc", + "avb_mii"; + function = "avb"; + }; + + pins_mdc { + groups = "avb_mdc"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_clk_pins: sound-clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a", "audio_clkout3_a"; + function = "audio_clk"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells = <1>; + clock-frequency = <12288000 11289600>; + + status = "okay"; + + /* update to */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2000>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + + rcar_sound,dai { + dai0 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + }; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; +}; + +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&ssi1 { + shared-pin; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; diff --git a/src/arm64/rockchip/rk3328.dtsi b/src/arm64/rockchip/rk3328.dtsi index 7e69f1fe78d6..0be96cee27bd 100644 --- a/src/arm64/rockchip/rk3328.dtsi +++ b/src/arm64/rockchip/rk3328.dtsi @@ -372,6 +372,39 @@ <32768>; }; + sdmmc: dwmmc@ff500000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff500000 0x0 0x4000>; + interrupts = ; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + status = "disabled"; + }; + + sdio: dwmmc@ff510000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff510000 0x0 0x4000>; + interrupts = ; + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + status = "disabled"; + }; + + emmc: dwmmc@ff520000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff520000 0x0 0x4000>; + interrupts = ; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, + <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + status = "disabled"; + }; + gmac2io: ethernet@ff540000 { compatible = "rockchip,rk3328-gmac"; reg = <0x0 0xff540000 0x0 0x10000>; diff --git a/src/arm64/rockchip/rk3399-firefly.dts b/src/arm64/rockchip/rk3399-firefly.dts new file mode 100644 index 000000000000..ba1d9810ad1e --- /dev/null +++ b/src/arm64/rockchip/rk3399-firefly.dts @@ -0,0 +1,718 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include +#include "rk3399.dtsi" + +/ { + model = "Firefly-RK3399 Board"; + compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; + + backlight: backlight { + compatible = "pwm-backlight"; + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pwms = <&pwm0 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + rt5640-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rockchip,rt5640-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + + simple-audio-card,cpu { + sound-dai = <&i2s1>; + }; + + simple-audio-card,codec { + sound-dai = <&rt5640>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc1v8_pmu>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG2 { + regulator-name = "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-name = "vcc1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <0>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; + + rt5640: rt5640@1c { + compatible = "realtek,rt5640"; + reg = <0x1c>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + realtek,in1-differential; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&rt5640_hpcon>; + }; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + accelerometer@68 { + compatible = "invensense,mpu6500"; + reg = <0x68>; + interrupt-parent = <&gpio1>; + interrupts = ; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + #sound-dai-cells = <0>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; + status = "okay"; +}; + +&i2s2 { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_3g_drv: pcie-3g-drv { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rt5640 { + rt5640_hpcon: rt5640-hpcon { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + keep-power-in-suspend; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; diff --git a/src/arm64/rockchip/rk3399-gru.dtsi b/src/arm64/rockchip/rk3399-gru.dtsi index 0d960b7f7625..eb5059344023 100644 --- a/src/arm64/rockchip/rk3399-gru.dtsi +++ b/src/arm64/rockchip/rk3399-gru.dtsi @@ -44,7 +44,7 @@ #include #include "rk3399.dtsi" -#include "rk3399-opp.dtsi" +#include "rk3399-op1-opp.dtsi" / { chosen { diff --git a/src/arm64/rockchip/rk3399-op1-opp.dtsi b/src/arm64/rockchip/rk3399-op1-opp.dtsi new file mode 100644 index 000000000000..be7fe635f7c1 --- /dev/null +++ b/src/arm64/rockchip/rk3399-op1-opp.dtsi @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/ { + cluster0_opp: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <800000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <850000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <900000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <975000>; + }; + opp05 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1100000>; + }; + opp06 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1150000>; + }; + }; + + cluster1_opp: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <800000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <800000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <825000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <850000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <900000>; + }; + opp05 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <975000>; + }; + opp06 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <1050000>; + }; + opp07 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1150000>; + }; + opp08 { + opp-hz = /bits/ 64 <2016000000>; + opp-microvolt = <1250000>; + }; + }; +}; + +&cpu_l0 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l1 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l2 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l3 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_b0 { + operating-points-v2 = <&cluster1_opp>; +}; + +&cpu_b1 { + operating-points-v2 = <&cluster1_opp>; +}; diff --git a/src/arm64/rockchip/rk3399-opp.dtsi b/src/arm64/rockchip/rk3399-opp.dtsi index dd82e16236a8..c83460db130a 100644 --- a/src/arm64/rockchip/rk3399-opp.dtsi +++ b/src/arm64/rockchip/rk3399-opp.dtsi @@ -56,22 +56,18 @@ }; opp02 { opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <800000>; + opp-microvolt = <850000>; }; opp03 { opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <875000>; + opp-microvolt = <925000>; }; opp04 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <925000>; + opp-microvolt = <1000000>; }; opp05 { opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1050000>; - }; - opp06 { - opp-hz = /bits/ 64 <1512000000>; opp-microvolt = <1125000>; }; }; @@ -107,15 +103,11 @@ }; opp06 { opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1075000>; + opp-microvolt = <1100000>; }; opp07 { opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1150000>; - }; - opp08 { - opp-hz = /bits/ 64 <2016000000>; - opp-microvolt = <1250000>; + opp-microvolt = <1200000>; }; }; }; diff --git a/src/arm64/rockchip/rk3399.dtsi b/src/arm64/rockchip/rk3399.dtsi index f4f3c96c798d..69c56f7316c4 100644 --- a/src/arm64/rockchip/rk3399.dtsi +++ b/src/arm64/rockchip/rk3399.dtsi @@ -56,6 +56,7 @@ #size-cells = <2>; aliases { + ethernet0 = &gmac; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; @@ -220,7 +221,7 @@ #size-cells = <2>; #interrupt-cells = <1>; aspm-no-l0s; - bus-range = <0x0 0x1>; + bus-range = <0x0 0x1f>; clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; clock-names = "aclk", "aclk-perf", @@ -239,8 +240,8 @@ msi-map = <0x0 &its 0x0 0x1000>; phys = <&pcie_phy>; phy-names = "pcie-phy"; - ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000 - 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>; + ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000 + 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>; resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>, <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, @@ -769,11 +770,6 @@ status = "disabled"; }; - qos_sd: qos@ffa74000 { - compatible = "syscon"; - reg = <0x0 0xffa74000 0x0 0x20>; - }; - qos_emmc: qos@ffa58000 { compatible = "syscon"; reg = <0x0 0xffa58000 0x0 0x20>; @@ -784,6 +780,41 @@ reg = <0x0 0xffa5c000 0x0 0x20>; }; + qos_pcie: qos@ffa60080 { + compatible = "syscon"; + reg = <0x0 0xffa60080 0x0 0x20>; + }; + + qos_usb_host0: qos@ffa60100 { + compatible = "syscon"; + reg = <0x0 0xffa60100 0x0 0x20>; + }; + + qos_usb_host1: qos@ffa60180 { + compatible = "syscon"; + reg = <0x0 0xffa60180 0x0 0x20>; + }; + + qos_usb_otg0: qos@ffa70000 { + compatible = "syscon"; + reg = <0x0 0xffa70000 0x0 0x20>; + }; + + qos_usb_otg1: qos@ffa70080 { + compatible = "syscon"; + reg = <0x0 0xffa70080 0x0 0x20>; + }; + + qos_sd: qos@ffa74000 { + compatible = "syscon"; + reg = <0x0 0xffa74000 0x0 0x20>; + }; + + qos_sdioaudio: qos@ffa76000 { + compatible = "syscon"; + reg = <0x0 0xffa76000 0x0 0x20>; + }; + qos_hdcp: qos@ffa90000 { compatible = "syscon"; reg = <0x0 0xffa90000 0x0 0x20>; @@ -854,6 +885,11 @@ reg = <0x0 0xffad0000 0x0 0x20>; }; + qos_perihp: qos@ffad8080 { + compatible = "syscon"; + reg = <0x0 0xffad8080 0x0 0x20>; + }; + qos_gpu: qos@ffae0000 { compatible = "syscon"; reg = <0x0 0xffae0000 0x0 0x20>; @@ -1676,6 +1712,91 @@ }; }; + sdio0 { + sdio0_bus1: sdio0-bus1 { + rockchip,pins = + <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_bus4: sdio0-bus4 { + rockchip,pins = + <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>, + <2 RK_PC5 RK_FUNC_1 &pcfg_pull_up>, + <2 RK_PC6 RK_FUNC_1 &pcfg_pull_up>, + <2 RK_PC7 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_cmd: sdio0-cmd { + rockchip,pins = + <2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_clk: sdio0-clk { + rockchip,pins = + <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>; + }; + + sdio0_cd: sdio0-cd { + rockchip,pins = + <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_pwr: sdio0-pwr { + rockchip,pins = + <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_bkpwr: sdio0-bkpwr { + rockchip,pins = + <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_wp: sdio0-wp { + rockchip,pins = + <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_int: sdio0-int { + rockchip,pins = + <0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_bus1: sdmmc-bus1 { + rockchip,pins = + <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = + <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>, + <4 RK_PB1 RK_FUNC_1 &pcfg_pull_up>, + <4 RK_PB2 RK_FUNC_1 &pcfg_pull_up>, + <4 RK_PB3 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = + <4 RK_PB4 RK_FUNC_1 &pcfg_pull_none>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = + <4 RK_PB5 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdmmc_cd: sdmcc-cd { + rockchip,pins = + <0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdmmc_wp: sdmmc-wp { + rockchip,pins = + <0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + sleep { ap_pwroff: ap-pwroff { rockchip,pins = <1 5 RK_FUNC_1 &pcfg_pull_none>; @@ -1691,6 +1812,11 @@ rockchip,pins = <4 21 RK_FUNC_1 &pcfg_pull_none>; }; + + spdif_bus_1: spdif-bus-1 { + rockchip,pins = + <3 RK_PC0 RK_FUNC_3 &pcfg_pull_none>; + }; }; spi0 { @@ -1950,6 +2076,19 @@ }; }; + hdmi { + hdmi_i2c_xfer: hdmi-i2c-xfer { + rockchip,pins = + <4 RK_PC1 RK_FUNC_3 &pcfg_pull_none>, + <4 RK_PC0 RK_FUNC_3 &pcfg_pull_none>; + }; + + hdmi_cec: hdmi-cec { + rockchip,pins = + <4 RK_PC7 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + pcie { pcie_clkreqn: pci-clkreqn { rockchip,pins = @@ -1960,6 +2099,16 @@ rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none>; }; + + pcie_clkreqn_cpm: pci-clkreqn-cpm { + rockchip,pins = + <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_clkreqnb_cpm: pci-clkreqnb-cpm { + rockchip,pins = + <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; }; }; diff --git a/src/arm64/socionext/uniphier-ld11-global.dts b/src/arm64/socionext/uniphier-ld11-global.dts new file mode 100644 index 000000000000..115357018ef7 --- /dev/null +++ b/src/arm64/socionext/uniphier-ld11-global.dts @@ -0,0 +1,70 @@ +/* + * Device Tree Source for UniPhier LD11 Global Board + * + * Copyright (C) 2016-2017 Socionext Inc. + * Author: Masahiro Yamada + * Kunihiko Hayashi + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; +/include/ "uniphier-ld11.dtsi" + +/ { + model = "UniPhier LD11 Global Board (REF_LD11_GP)"; + compatible = "socionext,uniphier-ld11-global", + "socionext,uniphier-ld11"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + eeprom@50 { + compatible = "st,24c64", "atmel,24c64"; + reg = <0x50>; + pagesize = <32>; + }; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; diff --git a/src/arm64/socionext/uniphier-ld11-ref.dts b/src/arm64/socionext/uniphier-ld11-ref.dts index 0173e93ab141..cc8ebe34c27c 100644 --- a/src/arm64/socionext/uniphier-ld11-ref.dts +++ b/src/arm64/socionext/uniphier-ld11-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm64/socionext/uniphier-ld11.dtsi b/src/arm64/socionext/uniphier-ld11.dtsi index 151c043b4835..bdce5b89baec 100644 --- a/src/arm64/socionext/uniphier-ld11.dtsi +++ b/src/arm64/socionext/uniphier-ld11.dtsi @@ -4,46 +4,10 @@ * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/memreserve/ 0x80000000 0x00080000; +/memreserve/ 0x80000000 0x02000000; / { compatible = "socionext,uniphier-ld11"; @@ -89,31 +53,31 @@ compatible = "operating-points-v2"; opp-shared; - opp@245000000 { + opp-245000000 { opp-hz = /bits/ 64 <245000000>; clock-latency-ns = <300>; }; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@490000000 { + opp-490000000 { opp-hz = /bits/ 64 <490000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@653334000 { + opp-653334000 { opp-hz = /bits/ 64 <653334000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@980000000 { + opp-980000000 { opp-hz = /bits/ 64 <980000000>; clock-latency-ns = <300>; }; @@ -268,7 +232,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; @@ -310,6 +274,11 @@ bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-mmc-highspeed = <2>; + cdns,phy-input-delay-mmc-ddr = <3>; + cdns,phy-dll-delay-sdclk = <21>; + cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; usb0: usb@5a800100 { diff --git a/src/arm64/socionext/uniphier-ld20-global.dts b/src/arm64/socionext/uniphier-ld20-global.dts new file mode 100644 index 000000000000..9f620d4101b5 --- /dev/null +++ b/src/arm64/socionext/uniphier-ld20-global.dts @@ -0,0 +1,52 @@ +/* + * Device Tree Source for UniPhier LD20 Global Board + * + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * Kunihiko Hayashi + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; +/include/ "uniphier-ld20.dtsi" + +/ { + model = "UniPhier LD20 Global Board (REF_LD20_GP)"; + compatible = "socionext,uniphier-ld20-global", + "socionext,uniphier-ld20"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; diff --git a/src/arm64/socionext/uniphier-ld20-ref.dts b/src/arm64/socionext/uniphier-ld20-ref.dts index fca4c479b469..494166aee24c 100644 --- a/src/arm64/socionext/uniphier-ld20-ref.dts +++ b/src/arm64/socionext/uniphier-ld20-ref.dts @@ -4,43 +4,7 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; diff --git a/src/arm64/socionext/uniphier-ld20.dtsi b/src/arm64/socionext/uniphier-ld20.dtsi index 6193f11acb78..de1e75362817 100644 --- a/src/arm64/socionext/uniphier-ld20.dtsi +++ b/src/arm64/socionext/uniphier-ld20.dtsi @@ -4,46 +4,10 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/memreserve/ 0x80000000 0x00080000; +/memreserve/ 0x80000000 0x02000000; / { compatible = "socionext,uniphier-ld20"; @@ -116,35 +80,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@275000000 { + opp-275000000 { opp-hz = /bits/ 64 <275000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@550000000 { + opp-550000000 { opp-hz = /bits/ 64 <550000000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@733334000 { + opp-733334000 { opp-hz = /bits/ 64 <733334000>; clock-latency-ns = <300>; }; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; clock-latency-ns = <300>; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; clock-latency-ns = <300>; }; @@ -154,35 +118,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@275000000 { + opp-275000000 { opp-hz = /bits/ 64 <275000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@550000000 { + opp-550000000 { opp-hz = /bits/ 64 <550000000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@733334000 { + opp-733334000 { opp-hz = /bits/ 64 <733334000>; clock-latency-ns = <300>; }; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; clock-latency-ns = <300>; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; clock-latency-ns = <300>; }; @@ -337,7 +301,7 @@ pinctrl-0 = <&pinctrl_system_bus>; }; - smpctrl@59800000 { + smpctrl@59801000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x400>; }; @@ -384,6 +348,11 @@ bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-mmc-highspeed = <2>; + cdns,phy-input-delay-mmc-ddr = <3>; + cdns,phy-dll-delay-sdclk = <21>; + cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; soc-glue@5f800000 { diff --git a/src/arm64/socionext/uniphier-ref-daughter.dtsi b/src/arm64/socionext/uniphier-ref-daughter.dtsi index c62ae1a81f47..7a1c29b558d5 100644 --- a/src/arm64/socionext/uniphier-ref-daughter.dtsi +++ b/src/arm64/socionext/uniphier-ref-daughter.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2017 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ &i2c0 { diff --git a/src/arm64/socionext/uniphier-support-card.dtsi b/src/arm64/socionext/uniphier-support-card.dtsi index f61dfec2807f..6c825f192e65 100644 --- a/src/arm64/socionext/uniphier-support-card.dtsi +++ b/src/arm64/socionext/uniphier-support-card.dtsi @@ -4,43 +4,7 @@ * Copyright (C) 2015-2017 Socionext Inc. * Author: Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ &system_bus { @@ -53,14 +17,14 @@ #size-cells = <1>; ranges = <0x00000000 1 0x01f00000 0x00100000>; - ethsc: ethernet@00000000 { + ethsc: ethernet@0 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <0x00000000 0x1000>; phy-mode = "mii"; reg-io-width = <4>; }; - serialsc: uart@000b0000 { + serialsc: uart@b0000 { compatible = "ns16550a"; reg = <0x000b0000 0x20>; clock-frequency = <12288000>; diff --git a/src/arm64/zte/zx296718.dtsi b/src/arm64/zte/zx296718.dtsi index 316dc713268c..d83bf789c864 100644 --- a/src/arm64/zte/zx296718.dtsi +++ b/src/arm64/zte/zx296718.dtsi @@ -118,27 +118,27 @@ compatible = "operating-points-v2"; opp-shared; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <500000>; }; - opp@648000000 { + opp-648000000 { opp-hz = /bits/ 64 <648000000>; clock-latency-ns = <500000>; }; - opp@800000000 { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; clock-latency-ns = <500000>; }; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; clock-latency-ns = <500000>; }; - opp@1188000000 { + opp-1188000000 { opp-hz = /bits/ 64 <1188000000>; clock-latency-ns = <500000>; }; diff --git a/src/mips/img/boston.dts b/src/mips/img/boston.dts new file mode 100644 index 000000000000..53bfa29a7093 --- /dev/null +++ b/src/mips/img/boston.dts @@ -0,0 +1,224 @@ +/dts-v1/; + +#include +#include +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "img,boston"; + + chosen { + stdout-path = "uart0:115200"; + }; + + aliases { + uart0 = &uart0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "img,mips"; + reg = <0>; + clocks = <&clk_boston BOSTON_CLK_CPU>; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + pci0: pci@10000000 { + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x10000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = ; + + ranges = <0x02000000 0 0x40000000 + 0x40000000 0 0x40000000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci0_intc 1>, + <0 0 0 2 &pci0_intc 2>, + <0 0 0 3 &pci0_intc 3>, + <0 0 0 4 &pci0_intc 4>; + + pci0_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pci1: pci@12000000 { + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x12000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = ; + + ranges = <0x02000000 0 0x20000000 + 0x20000000 0 0x20000000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci1_intc 1>, + <0 0 0 2 &pci1_intc 2>, + <0 0 0 3 &pci1_intc 3>, + <0 0 0 4 &pci1_intc 4>; + + pci1_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pci2: pci@14000000 { + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x14000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = ; + + ranges = <0x02000000 0 0x16000000 + 0x16000000 0 0x100000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci2_intc 1>, + <0 0 0 2 &pci2_intc 2>, + <0 0 0 3 &pci2_intc 3>, + <0 0 0 4 &pci2_intc 4>; + + pci2_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + pci2_root@0,0,0 { + compatible = "pci10ee,7021"; + reg = <0x00000000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + eg20t_bridge@1,0,0 { + compatible = "pci8086,8800"; + reg = <0x00010000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + eg20t_mac@2,0,1 { + compatible = "pci8086,8802"; + reg = <0x00020100 0 0 0 0>; + phy-reset-gpios = <&eg20t_gpio 6 + GPIO_ACTIVE_LOW>; + }; + + eg20t_gpio: eg20t_gpio@2,0,2 { + compatible = "pci8086,8803"; + reg = <0x00020200 0 0 0 0>; + + gpio-controller; + #gpio-cells = <2>; + }; + + eg20t_i2c@2,12,2 { + compatible = "pci8086,8817"; + reg = <0x00026200 0 0 0 0>; + + #address-cells = <1>; + #size-cells = <0>; + + rtc@0x68 { + compatible = "st,m41t81s"; + reg = <0x68>; + }; + }; + }; + }; + }; + + gic: interrupt-controller@16120000 { + compatible = "mti,gic"; + reg = <0x16120000 0x20000>; + + interrupt-controller; + #interrupt-cells = <3>; + + timer { + compatible = "mti,gic-timer"; + interrupts = ; + clocks = <&clk_boston BOSTON_CLK_CPU>; + }; + }; + + cdmm@16140000 { + compatible = "mti,mips-cdmm"; + reg = <0x16140000 0x8000>; + }; + + cpc@16200000 { + compatible = "mti,mips-cpc"; + reg = <0x16200000 0x8000>; + }; + + plat_regs: system-controller@17ffd000 { + compatible = "img,boston-platform-regs", "syscon"; + reg = <0x17ffd000 0x1000>; + + clk_boston: clock { + compatible = "img,boston-clock"; + #clock-cells = <1>; + }; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&plat_regs>; + offset = <0x10>; + mask = <0x10>; + }; + + uart0: uart@17ffe000 { + compatible = "ns16550a"; + reg = <0x17ffe000 0x1000>; + reg-shift = <2>; + + interrupt-parent = <&gic>; + interrupts = ; + + clocks = <&clk_boston BOSTON_CLK_SYS>; + }; + + lcd: lcd@17fff000 { + compatible = "img,boston-lcd"; + reg = <0x17fff000 0x8>; + }; +}; diff --git a/src/mips/ingenic/ci20.dts b/src/mips/ingenic/ci20.dts index 1652d8d60b1e..fd138d9978c1 100644 --- a/src/mips/ingenic/ci20.dts +++ b/src/mips/ingenic/ci20.dts @@ -29,18 +29,30 @@ &uart0 { status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart0>; }; &uart1 { status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart1>; }; &uart3 { status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart2>; }; &uart4 { status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart4>; }; &nemc { @@ -61,6 +73,13 @@ ingenic,nemc-tAW = <15>; ingenic,nemc-tSTRV = <100>; + /* + * Only CLE/ALE are needed for the devices that are connected, rather + * than the full address line set. + */ + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc>; + nand@1 { reg = <1>; @@ -69,6 +88,9 @@ nand-ecc-mode = "hw"; nand-on-flash-bbt; + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc_cs1>; + partitions { compatible = "fixed-partitions"; #address-cells = <2>; @@ -106,3 +128,41 @@ &bch { status = "okay"; }; + +&pinctrl { + pins_uart0: uart0 { + function = "uart0"; + groups = "uart0-data"; + bias-disable; + }; + + pins_uart1: uart1 { + function = "uart1"; + groups = "uart1-data"; + bias-disable; + }; + + pins_uart2: uart2 { + function = "uart2"; + groups = "uart2-data", "uart2-hwflow"; + bias-disable; + }; + + pins_uart4: uart4 { + function = "uart4"; + groups = "uart4-data"; + bias-disable; + }; + + pins_nemc: nemc { + function = "nemc"; + groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; + bias-disable; + }; + + pins_nemc_cs1: nemc-cs1 { + function = "nemc-cs1"; + groups = "nemc-cs1"; + bias-disable; + }; +}; diff --git a/src/mips/ingenic/jz4740.dtsi b/src/mips/ingenic/jz4740.dtsi index 3e1587f1f77a..2ca7ce7481f1 100644 --- a/src/mips/ingenic/jz4740.dtsi +++ b/src/mips/ingenic/jz4740.dtsi @@ -55,6 +55,74 @@ clock-names = "rtc"; }; + pinctrl: pin-controller@10010000 { + compatible = "ingenic,jz4740-pinctrl"; + reg = <0x10010000 0x400>; + + #address-cells = <1>; + #size-cells = <0>; + + gpa: gpio@0 { + compatible = "ingenic,jz4740-gpio"; + reg = <0>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <28>; + }; + + gpb: gpio@1 { + compatible = "ingenic,jz4740-gpio"; + reg = <1>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <27>; + }; + + gpc: gpio@2 { + compatible = "ingenic,jz4740-gpio"; + reg = <2>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <26>; + }; + + gpd: gpio@3 { + compatible = "ingenic,jz4740-gpio"; + reg = <3>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <25>; + }; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4740-uart"; reg = <0x10030000 0x100>; diff --git a/src/mips/ingenic/jz4780.dtsi b/src/mips/ingenic/jz4780.dtsi index b868b429add2..4853ef67b3ab 100644 --- a/src/mips/ingenic/jz4780.dtsi +++ b/src/mips/ingenic/jz4780.dtsi @@ -44,6 +44,104 @@ #clock-cells = <1>; }; + pinctrl: pin-controller@10010000 { + compatible = "ingenic,jz4780-pinctrl"; + reg = <0x10010000 0x600>; + + #address-cells = <1>; + #size-cells = <0>; + + gpa: gpio@0 { + compatible = "ingenic,jz4780-gpio"; + reg = <0>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <17>; + }; + + gpb: gpio@1 { + compatible = "ingenic,jz4780-gpio"; + reg = <1>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <16>; + }; + + gpc: gpio@2 { + compatible = "ingenic,jz4780-gpio"; + reg = <2>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <15>; + }; + + gpd: gpio@3 { + compatible = "ingenic,jz4780-gpio"; + reg = <3>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <14>; + }; + + gpe: gpio@4 { + compatible = "ingenic,jz4780-gpio"; + reg = <4>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <13>; + }; + + gpf: gpio@5 { + compatible = "ingenic,jz4780-gpio"; + reg = <5>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 160 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <12>; + }; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4780-uart"; reg = <0x10030000 0x100>; diff --git a/src/mips/ingenic/qi_lb60.dts b/src/mips/ingenic/qi_lb60.dts index be1a7d3a3e1b..b715ee2ac2ee 100644 --- a/src/mips/ingenic/qi_lb60.dts +++ b/src/mips/ingenic/qi_lb60.dts @@ -17,3 +17,16 @@ &rtc_dev { system-power-controller; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart0>; +}; + +&pinctrl { + pins_uart0: uart0 { + function = "uart0"; + groups = "uart0-data"; + bias-disable; + }; +}; diff --git a/src/mips/mti/sead3.dts b/src/mips/mti/sead3.dts index b112879a5d9d..4f8bc83c2960 100644 --- a/src/mips/mti/sead3.dts +++ b/src/mips/mti/sead3.dts @@ -11,15 +11,14 @@ #size-cells = <1>; compatible = "mti,sead-3"; model = "MIPS SEAD-3"; - interrupt-parent = <&gic>; chosen { - stdout-path = "uart1:115200"; + stdout-path = "serial1:115200"; }; aliases { - uart0 = &uart0; - uart1 = &uart1; + serial0 = &uart0; + serial1 = &uart1; }; cpus { @@ -54,18 +53,14 @@ * controller & should be probed first. */ interrupt-parent = <&cpu_intc>; - - timer { - compatible = "mti,gic-timer"; - interrupts = ; - }; }; ehci@1b200000 { compatible = "generic-ehci"; reg = <0x1b200000 0x1000>; - interrupts = <0>; /* GIC 0 or CPU 6 */ + interrupt-parent = <&gic>; + interrupts = ; /* GIC 0 or CPU 6 */ has-transaction-translator; }; @@ -227,7 +222,8 @@ clock-frequency = <14745600>; - interrupts = <3>; /* GIC 3 or CPU 4 */ + interrupt-parent = <&gic>; + interrupts = ; /* GIC 3 or CPU 4 */ no-loopback-test; }; @@ -241,7 +237,8 @@ clock-frequency = <14745600>; - interrupts = <2>; /* GIC 2 or CPU 4 */ + interrupt-parent = <&gic>; + interrupts = ; /* GIC 2 or CPU 4 */ no-loopback-test; }; @@ -251,7 +248,8 @@ reg = <0x1f010000 0x10000>; reg-io-width = <4>; - interrupts = <0>; /* GIC 0 or CPU 6 */ + interrupt-parent = <&gic>; + interrupts = ; /* GIC 0 or CPU 6 */ phy-mode = "mii"; smsc,irq-push-pull; diff --git a/src/powerpc/ac14xx.dts b/src/powerpc/ac14xx.dts index 27fcabc2f857..83bcfd865167 100644 --- a/src/powerpc/ac14xx.dts +++ b/src/powerpc/ac14xx.dts @@ -10,7 +10,7 @@ */ -#include +#include "mpc5121.dtsi" / { model = "ac14xx"; diff --git a/src/powerpc/digsy_mtc.dts b/src/powerpc/digsy_mtc.dts index 955bff629df3..c280e75c86bf 100644 --- a/src/powerpc/digsy_mtc.dts +++ b/src/powerpc/digsy_mtc.dts @@ -73,7 +73,7 @@ i2c@3d00 { eeprom@50 { - compatible = "at,24c08"; + compatible = "atmel,24c08"; reg = <0x50>; }; diff --git a/src/powerpc/fsl/b4qds.dtsi b/src/powerpc/fsl/b4qds.dtsi index 3785ef826d07..999efd3bc167 100644 --- a/src/powerpc/fsl/b4qds.dtsi +++ b/src/powerpc/fsl/b4qds.dtsi @@ -166,19 +166,19 @@ reg = <0>; eeprom@50 { - compatible = "at24,24c64"; + compatible = "atmel,24c64"; reg = <0x50>; }; eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@53 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x53>; }; eeprom@57 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x57>; }; rtc@68 { diff --git a/src/powerpc/fsl/c293pcie.dts b/src/powerpc/fsl/c293pcie.dts index 66709788429d..5e905e0857cf 100644 --- a/src/powerpc/fsl/c293pcie.dts +++ b/src/powerpc/fsl/c293pcie.dts @@ -153,7 +153,7 @@ &soc { i2c@3000 { eeprom@50 { - compatible = "st,24c1024"; + compatible = "st,24c1024", "atmel,24c1024"; reg = <0x50>; }; diff --git a/src/powerpc/fsl/kmcent2.dts b/src/powerpc/fsl/kmcent2.dts index 47afa438602e..5922c1ea0e96 100644 --- a/src/powerpc/fsl/kmcent2.dts +++ b/src/powerpc/fsl/kmcent2.dts @@ -293,9 +293,7 @@ compatible = "fsl,ucc-hdlc"; rx-clock-name = "clk9"; tx-clock-name = "clk9"; - fsl,tx-timeslot-mask = <0xfffffffe>; - fsl,rx-timeslot-mask = <0xfffffffe>; - fsl,siram-entry-id = <0>; + fsl,hdlc-bus; }; }; }; diff --git a/src/powerpc/fsl/p1010rdb.dtsi b/src/powerpc/fsl/p1010rdb.dtsi index a8e4ba070104..2ca9cee2ddeb 100644 --- a/src/powerpc/fsl/p1010rdb.dtsi +++ b/src/powerpc/fsl/p1010rdb.dtsi @@ -89,7 +89,7 @@ &board_soc { i2c@3000 { eeprom@50 { - compatible = "st,24c256"; + compatible = "st,24c256", "atmel,24c256"; reg = <0x50>; }; diff --git a/src/powerpc/fsl/p1023rdb.dts b/src/powerpc/fsl/p1023rdb.dts index 9716ca64651c..ead928364beb 100644 --- a/src/powerpc/fsl/p1023rdb.dts +++ b/src/powerpc/fsl/p1023rdb.dts @@ -79,7 +79,7 @@ i2c@3000 { eeprom@53 { - compatible = "at24,24c04"; + compatible = "atmel,24c04"; reg = <0x53>; }; diff --git a/src/powerpc/fsl/p2041rdb.dts b/src/powerpc/fsl/p2041rdb.dts index e50fea95a853..950816b9d6e1 100644 --- a/src/powerpc/fsl/p2041rdb.dts +++ b/src/powerpc/fsl/p2041rdb.dts @@ -127,7 +127,7 @@ reg = <0x48>; }; eeprom@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; rtc@68 { @@ -142,7 +142,7 @@ i2c@118100 { eeprom@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; }; diff --git a/src/powerpc/fsl/p3041ds.dts b/src/powerpc/fsl/p3041ds.dts index 40748e415adb..6f5f7283c533 100644 --- a/src/powerpc/fsl/p3041ds.dts +++ b/src/powerpc/fsl/p3041ds.dts @@ -124,11 +124,11 @@ i2c@118100 { eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; }; diff --git a/src/powerpc/fsl/p4080ds.dts b/src/powerpc/fsl/p4080ds.dts index 816b9788d5f6..65e20152e22f 100644 --- a/src/powerpc/fsl/p4080ds.dts +++ b/src/powerpc/fsl/p4080ds.dts @@ -125,11 +125,11 @@ i2c@118100 { eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; rtc@68 { diff --git a/src/powerpc/fsl/p5020ds.dts b/src/powerpc/fsl/p5020ds.dts index cd6f37386111..b24adf902d8d 100644 --- a/src/powerpc/fsl/p5020ds.dts +++ b/src/powerpc/fsl/p5020ds.dts @@ -124,11 +124,11 @@ i2c@118100 { eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; }; diff --git a/src/powerpc/fsl/p5040ds.dts b/src/powerpc/fsl/p5040ds.dts index 45084738cf4e..30850b3228e0 100644 --- a/src/powerpc/fsl/p5040ds.dts +++ b/src/powerpc/fsl/p5040ds.dts @@ -133,11 +133,11 @@ i2c@118100 { eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; }; diff --git a/src/powerpc/fsl/t208xqds.dtsi b/src/powerpc/fsl/t208xqds.dtsi index ec080bd01b09..db4139999b28 100644 --- a/src/powerpc/fsl/t208xqds.dtsi +++ b/src/powerpc/fsl/t208xqds.dtsi @@ -147,17 +147,17 @@ reg = <0x0>; eeprom@50 { - compatible = "at24,24c512"; + compatible = "atmel,24c512"; reg = <0x50>; }; eeprom@51 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; reg = <0x51>; }; eeprom@57 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; reg = <0x57>; }; @@ -174,7 +174,7 @@ reg = <0x1>; eeprom@55 { - compatible = "at24,24c02"; + compatible = "atmel,24c02"; reg = <0x55>; }; }; diff --git a/src/powerpc/fsl/t4240qds.dts b/src/powerpc/fsl/t4240qds.dts index 9573ceada07c..c0913ac5aaad 100644 --- a/src/powerpc/fsl/t4240qds.dts +++ b/src/powerpc/fsl/t4240qds.dts @@ -377,27 +377,27 @@ reg = <0>; eeprom@51 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x51>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; eeprom@53 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x53>; }; eeprom@54 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x54>; }; eeprom@55 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x55>; }; eeprom@56 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x56>; }; rtc@68 { diff --git a/src/powerpc/fsl/t4240rdb.dts b/src/powerpc/fsl/t4240rdb.dts index 8166c660712a..15eb0a3f7290 100644 --- a/src/powerpc/fsl/t4240rdb.dts +++ b/src/powerpc/fsl/t4240rdb.dts @@ -130,15 +130,15 @@ reg = <0x2f>; }; eeprom@52 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x52>; }; eeprom@54 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x54>; }; eeprom@56 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x56>; }; rtc@68 { diff --git a/src/powerpc/fsp2.dts b/src/powerpc/fsp2.dts new file mode 100644 index 000000000000..475953ada707 --- /dev/null +++ b/src/powerpc/fsp2.dts @@ -0,0 +1,608 @@ +/* + * Device Tree Source for FSP2 + * + * Copyright 2010,2012 IBM Corp. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "ibm,fsp2"; + compatible = "ibm,fsp2"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + serial0 = &UART0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC, 476FSP2"; + reg = <0x0>; + clock-frequency = <0>; /* Filled in by cuboot */ + timebase-frequency = <0>; /* Filled in by cuboot */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by + cuboot */ + }; + + clocks { + mmc_clk: mmc_clk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "mmc_clk"; + }; + }; + + UIC0: uic0 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x2c0 0x8>; + }; + + /* "interrupts" field is + first pair is non-critical, second is critical */ + UIC1_0: uic1_0 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x2c8 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <21 0x4 4 0x84>; + }; + + /* PSI and DMA */ + UIC1_1: uic1_1 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0x350 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <22 0x4 5 0x84>; + }; + + /* Ethernet and USB */ + UIC1_2: uic1_2 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0x358 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <23 0x4 6 0x84>; + }; + + /* PLB Errors */ + UIC1_3: uic1_3 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <4>; + dcr-reg = <0x360 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <24 0x4 7 0x84>; + }; + + UIC1_4: uic1_4 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <5>; + dcr-reg = <0x368 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <25 0x4 8 0x84>; + }; + + UIC1_5: uic1_5 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <6>; + dcr-reg = <0x370 0x8>; + interrupt-parent = <&UIC0>; + interrupts = <26 0x4 9 0x84>; + }; + + /* 2nd level UICs for FSI */ + UIC2_0: uic2_0 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <7>; + dcr-reg = <0x2d0 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <16 0x4 0 0x84>; + }; + + UIC2_1: uic2_1 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <8>; + dcr-reg = <0x2d8 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <17 0x4 1 0x84>; + }; + + UIC2_2: uic2_2 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <9>; + dcr-reg = <0x2e0 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <18 0x4 2 0x84>; + }; + + UIC2_3: uic2_3 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <10>; + dcr-reg = <0x2e8 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <19 0x4 3 0x84>; + }; + + UIC2_4: uic2_4 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <11>; + dcr-reg = <0x2f0 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <20 0x4 4 0x84>; + }; + + UIC2_5: uic2_5 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <12>; + dcr-reg = <0x2f8 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <21 0x4 5 0x84>; + }; + + UIC2_6: uic2_6 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <13>; + dcr-reg = <0x300 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <22 0x4 6 0x84>; + }; + + UIC2_7: uic2_7 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <14>; + dcr-reg = <0x308 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <23 0x4 7 0x84>; + }; + + UIC2_8: uic2_8 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <15>; + dcr-reg = <0x310 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <24 0x4 8 0x84>; + }; + + UIC2_9: uic2_9 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <16>; + dcr-reg = <0x318 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <25 0x4 9 0x84>; + }; + + UIC2_10: uic2_10 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <17>; + dcr-reg = <0x320 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <26 0x4 10 0x84>; + }; + + UIC2_11: uic2_11 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <18>; + dcr-reg = <0x328 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <27 0x4 11 0x84>; + }; + + UIC2_12: uic2_12 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <19>; + dcr-reg = <0x330 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <28 0x4 12 0x84>; + }; + + UIC2_13: uic2_13 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <20>; + dcr-reg = <0x338 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <29 0x4 13 0x84>; + }; + + UIC2_14: uic2_14 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <21>; + dcr-reg = <0x340 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <30 0x4 14 0x84>; + }; + + UIC2_15: uic2_15 { + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <22>; + dcr-reg = <0x348 0x8>; + interrupt-parent = <&UIC1_0>; + interrupts = <31 0x4 15 0x84>; + }; + + mmc0: sdhci@020c0000 { + compatible = "st,sdhci-stih407", "st,sdhci"; + status = "disabled"; + reg = <0x020c0000 0x20000>; + reg-names = "mmc"; + interrupt-parent = <&UIC1_3>; + interrupts = <21 0x4 22 0x4>; + interrupt-names = "mmcirq"; + pinctrl-names = "default"; + pinctrl-0 = <>; + clock-names = "mmc"; + clocks = <&mmc_clk>; + }; + + plb6 { + compatible = "ibm,plb6"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + MCW0: memory-controller-wrapper { + compatible = "ibm,cw-476fsp2"; + dcr-reg = <0x11111800 0x40>; + }; + + MCIF0: memory-controller { + compatible = "ibm,sdram-476fsp2", "ibm,sdram-4xx-ddr3"; + dcr-reg = <0x11120000 0x10000>; + mcer-device = <&MCW0>; + interrupt-parent = <&UIC0>; + interrupts = <10 0x84 /* ECC UE */ + 11 0x84>; /* ECC CE */ + }; + }; + + plb4 { + compatible = "ibm,plb4"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x00000010 0x00000000 0x80000000 + 0x80000000 0x00000010 0x80000000 0x80000000>; + clock-frequency = <333333334>; + + plb6-system-hung-irq { + compatible = "ibm,bus-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <0 0x84>; + }; + + l2-error-irq { + compatible = "ibm,bus-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <20 0x84>; + }; + + plb6-plb4-irq { + compatible = "ibm,bus-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <1 0x84>; + }; + + plb4-ahb-irq { + compatible = "ibm,bus-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC1_3>; + interrupts = <20 0x84>; + }; + + opbd-error-irq { + compatible = "ibm,opbd-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC1_4>; + interrupts = <5 0x84>; + }; + + cmu-error-irq { + compatible = "ibm,cmu-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <28 0x84>; + }; + + conf-error-irq { + compatible = "ibm,conf-error-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC1_4>; + interrupts = <11 0x84>; + }; + + mc-ue-irq { + compatible = "ibm,mc-ue-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <10 0x84>; + }; + + reset-warning-irq { + compatible = "ibm,reset-warning-irq"; + #interrupt-cells = <2>; + interrupt-parent = <&UIC0>; + interrupts = <17 0x84>; + }; + + MAL0: mcmal0 { + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + compatible = "ibm,mcmal"; + dcr-reg = <0x80 0x80>; + num-tx-chans = <1>; + num-rx-chans = <1>; + interrupt-parent = <&MAL0>; + interrupts = <0 1 2 3 4>; + /* index interrupt-parent interrupt# type */ + interrupt-map = ; + }; + + MAL1: mcmal1 { + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + compatible = "ibm,mcmal"; + dcr-reg = <0x100 0x80>; + num-tx-chans = <1>; + num-rx-chans = <1>; + interrupt-parent = <&MAL1>; + interrupts = <0 1 2 3 4>; + /* index interrupt-parent interrupt# type */ + interrupt-map = ; + }; + + opb { + compatible = "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges; // pass-thru to parent bus + clock-frequency = <83333334>; + + EMAC0: ethernet@b0000000 { + linux,network-index = <0>; + device_type = "network"; + compatible = "ibm,emac4sync"; + has-inverted-stacr-oc; + interrupt-parent = <&UIC1_2>; + interrupts = <1 0x4 0 0x4>; + reg = <0xb0000000 0x100>; + local-mac-address = [000000000000]; /* Filled in by + cuboot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <4096>; + rx-fifo-size-gige = <16384>; + tx-fifo-size-gige = <8192>; + phy-address = <1>; + phy-mode = "rgmii"; + phy-map = <00000003>; + rgmii-device = <&RGMII>; + rgmii-channel = <0>; + }; + + EMAC1: ethernet@b0000100 { + linux,network-index = <1>; + device_type = "network"; + compatible = "ibm,emac4sync"; + has-inverted-stacr-oc; + interrupt-parent = <&UIC1_2>; + interrupts = <9 0x4 8 0x4>; + reg = <0xb0000100 0x100>; + local-mac-address = [000000000000]; /* Filled in by + cuboot */ + mal-device = <&MAL1>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <1>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <4096>; + rx-fifo-size-gige = <16384>; + tx-fifo-size-gige = <8192>; + phy-address = <2>; + phy-mode = "rgmii"; + phy-map = <00000003>; + rgmii-device = <&RGMII>; + rgmii-channel = <1>; + }; + + RGMII: rgmii@b0000600 { + compatible = "ibm,rgmii"; + has-mdio; + reg = <0xb0000600 0x8>; + }; + + UART0: serial@b0020000 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xb0020000 0x8>; + virtual-reg = <0xb0020000>; + clock-frequency = <20833333>; + current-speed = <115200>; + interrupt-parent = <&UIC0>; + interrupts = <31 0x4>; + }; + }; + + OHCI1: ohci@02040000 { + compatible = "ohci-le"; + reg = <0x02040000 0xa0>; + interrupt-parent = <&UIC1_3>; + interrupts = <28 0x8 29 0x8>; + }; + + OHCI2: ohci@02080000 { + compatible = "ohci-le"; + reg = <0x02080000 0xa0>; + interrupt-parent = <&UIC1_3>; + interrupts = <30 0x8 31 0x8>; + }; + + EHCI: ehci@02000000 { + compatible = "usb-ehci"; + reg = <0x02000000 0xa4>; + interrupt-parent = <&UIC1_3>; + interrupts = <23 0x4>; + }; + + }; + + chosen { + linux,stdout-path = "/plb/opb/serial@b0020000"; + bootargs = "console=ttyS0,115200 rw log_buf_len=32768 debug"; + }; +}; diff --git a/src/powerpc/mpc5121ads.dts b/src/powerpc/mpc5121ads.dts index 75888ce2c792..1e81a7e32d18 100644 --- a/src/powerpc/mpc5121ads.dts +++ b/src/powerpc/mpc5121ads.dts @@ -9,7 +9,7 @@ * option) any later version. */ -#include +#include "mpc5121.dtsi" / { model = "mpc5121ads"; @@ -94,7 +94,7 @@ }; eeprom@50 { - compatible = "at,24c32"; + compatible = "atmel,24c32"; reg = <0x50>; }; diff --git a/src/powerpc/mpc8308_p1m.dts b/src/powerpc/mpc8308_p1m.dts index 57f86cdf9f36..cab933b3957a 100644 --- a/src/powerpc/mpc8308_p1m.dts +++ b/src/powerpc/mpc8308_p1m.dts @@ -123,7 +123,7 @@ interrupt-parent = <&ipic>; dfsrr; fram@50 { - compatible = "ramtron,24c64"; + compatible = "ramtron,24c64", "atmel,24c64"; reg = <0x50>; }; }; diff --git a/src/powerpc/mpc8349emitx.dts b/src/powerpc/mpc8349emitx.dts index 90aed3ac2f69..648a85858eb5 100644 --- a/src/powerpc/mpc8349emitx.dts +++ b/src/powerpc/mpc8349emitx.dts @@ -92,7 +92,7 @@ dfsrr; eeprom: at24@50 { - compatible = "st,24c256"; + compatible = "st,24c256", "atmel,24c256"; reg = <0x50>; }; @@ -130,7 +130,7 @@ }; spd: at24@51 { - compatible = "at24,spd"; + compatible = "atmel,spd"; reg = <0x51>; }; diff --git a/src/powerpc/mpc8377_rdb.dts b/src/powerpc/mpc8377_rdb.dts index e32613963ab0..5e85d8c93bca 100644 --- a/src/powerpc/mpc8377_rdb.dts +++ b/src/powerpc/mpc8377_rdb.dts @@ -150,7 +150,7 @@ }; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/powerpc/mpc8377_wlan.dts b/src/powerpc/mpc8377_wlan.dts index c0c790168b96..fee15fcbb46f 100644 --- a/src/powerpc/mpc8377_wlan.dts +++ b/src/powerpc/mpc8377_wlan.dts @@ -135,7 +135,7 @@ dfsrr; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/powerpc/mpc8378_rdb.dts b/src/powerpc/mpc8378_rdb.dts index 71842fcd621f..e973d61956b9 100644 --- a/src/powerpc/mpc8378_rdb.dts +++ b/src/powerpc/mpc8378_rdb.dts @@ -150,7 +150,7 @@ }; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/powerpc/mpc8379_rdb.dts b/src/powerpc/mpc8379_rdb.dts index e442a29b2fe0..ed5d12ff2ee0 100644 --- a/src/powerpc/mpc8379_rdb.dts +++ b/src/powerpc/mpc8379_rdb.dts @@ -148,7 +148,7 @@ }; at24@50 { - compatible = "at24,24c256"; + compatible = "atmel,24c256"; reg = <0x50>; }; diff --git a/src/powerpc/pcm030.dts b/src/powerpc/pcm030.dts index 192e66af0001..836e47cc4bed 100644 --- a/src/powerpc/pcm030.dts +++ b/src/powerpc/pcm030.dts @@ -71,7 +71,7 @@ reg = <0x51>; }; eeprom@52 { - compatible = "catalyst,24c32"; + compatible = "catalyst,24c32", "atmel,24c32"; reg = <0x52>; pagesize = <32>; }; diff --git a/src/powerpc/pcm032.dts b/src/powerpc/pcm032.dts index 96b139bf50e9..576249bf2fb9 100644 --- a/src/powerpc/pcm032.dts +++ b/src/powerpc/pcm032.dts @@ -75,7 +75,7 @@ reg = <0x51>; }; eeprom@52 { - compatible = "catalyst,24c32"; + compatible = "catalyst,24c32", "atmel,24c32"; reg = <0x52>; pagesize = <32>; }; diff --git a/src/powerpc/pdm360ng.dts b/src/powerpc/pdm360ng.dts index 0cec7244abe7..445b88114009 100644 --- a/src/powerpc/pdm360ng.dts +++ b/src/powerpc/pdm360ng.dts @@ -13,7 +13,7 @@ * option) any later version. */ -#include +#include "mpc5121.dtsi" / { model = "pdm360ng"; diff --git a/src/powerpc/sequoia.dts b/src/powerpc/sequoia.dts index b1d329246b08..e41b88a5eaee 100644 --- a/src/powerpc/sequoia.dts +++ b/src/powerpc/sequoia.dts @@ -229,7 +229,7 @@ }; partition@84000 { label = "user"; - reg = <0x00000000 0x01f7c000>; + reg = <0x00084000 0x01f7c000>; }; }; }; diff --git a/src/powerpc/warp.dts b/src/powerpc/warp.dts index e576ee85c42f..ea9053ef4819 100644 --- a/src/powerpc/warp.dts +++ b/src/powerpc/warp.dts @@ -238,7 +238,7 @@ /* This will create 52 and 53 */ at24@52 { - compatible = "at,24c04"; + compatible = "atmel,24c04"; reg = <0x52>; }; }; From 32c48d07c6ca43cd83ce9a93f3f1ba4f129f0af5 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Sat, 21 Oct 2017 15:48:16 +0000 Subject: [PATCH 212/219] Fix spelling. Reported by: lidl MFC after: 1 month --- sys/arm/arm/cpuinfo.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c index 0566f999bdbb..15efa9fd378b 100644 --- a/sys/arm/arm/cpuinfo.c +++ b/sys/arm/arm/cpuinfo.c @@ -197,8 +197,8 @@ cpuinfo_init(void) cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1; /* Fill AT_HWCAP bits. */ - elf_hwcap |= HWCAP_HALF | HWCAP_FAST_MULT; /* Requierd for all CPUs */ - elf_hwcap |= HWCAP_TLS | HWCAP_EDSP; /* Requierd for v6+ CPUs */ + elf_hwcap |= HWCAP_HALF | HWCAP_FAST_MULT; /* Required for all CPUs */ + elf_hwcap |= HWCAP_TLS | HWCAP_EDSP; /* Required for v6+ CPUs */ tmp = (cpuinfo.id_isar0 >> 24) & 0xF; /* Divide_instrs */ if (tmp >= 1) From 65854c616e94b19151bf9753aa9cbd457fb74b57 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Sat, 21 Oct 2017 16:12:00 +0000 Subject: [PATCH 213/219] dtb/allwinner: Disconnect sinovoip-bpi-m3.dts from the build No active commiter have this board and we diverged too much from the upstream DTS. --- sys/modules/dtb/allwinner/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/sys/modules/dtb/allwinner/Makefile b/sys/modules/dtb/allwinner/Makefile index f2654f5491f9..c21856c0dfee 100644 --- a/sys/modules/dtb/allwinner/Makefile +++ b/sys/modules/dtb/allwinner/Makefile @@ -3,7 +3,6 @@ DTS= \ nanopi-neo.dts \ orangepi-plus-2e.dts \ - sinovoip-bpi-m3.dts \ sun4i-a10-cubieboard.dts \ sun4i-a10-olinuxino-lime.dts \ sun6i-a31s-sinovoip-bpi-m2.dts \ From 09fdf1f84c43437d0e680562b5f5c6ab3ee7174c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stefan=20E=C3=9Fer?= Date: Sat, 21 Oct 2017 16:55:52 +0000 Subject: [PATCH 214/219] Mention sysrc(8) as scripting interface for the modification of config files. This is a follow up commit to r324721, which added sysrc(8) to the SEE ALSO list. Submitted by: Kurt Jaeger (lists at opsec.eu) MFC after: 1 week --- share/man/man5/rc.conf.5 | 3 +++ share/man/man8/rc.8 | 3 +++ 2 files changed, 6 insertions(+) diff --git a/share/man/man5/rc.conf.5 b/share/man/man5/rc.conf.5 index 4582ca440b59..8ccc108eb5dc 100644 --- a/share/man/man5/rc.conf.5 +++ b/share/man/man5/rc.conf.5 @@ -64,6 +64,9 @@ is used to override settings in .Pa /etc/rc.conf for historical reasons. .Pp +The sysrc(8) command provides a scripting interface to modify system +config files. +.Pp In addition to .Pa /etc/rc.conf.local you can also place smaller configuration files for each diff --git a/share/man/man8/rc.8 b/share/man/man8/rc.8 index c72ed595165a..cb0aab7f1bab 100644 --- a/share/man/man8/rc.8 +++ b/share/man/man8/rc.8 @@ -87,6 +87,9 @@ The .Nm rc.d/ directories contain scripts which will be automatically executed at boot time and shutdown time. +.Pp +The sysrc(8) command provides a scripting interface to modify system +config files. .Ss Operation of Nm .Bl -enum .It From 422fe502b3ca589d522a791ab29bb07c9e277b77 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Sat, 21 Oct 2017 17:28:12 +0000 Subject: [PATCH 215/219] Check that the page which is freed as zeroed, indeed has all-zero content. This catches some rare mysterious failures at the source. The check is only performed on architectures which implement direct map, and only enabled with option DIAGNOSTIC, similar to other costly consistency checks. Reviewed by: alc, markj Sponsored by: The FreeBSD Foundation MFC after: 2 weeks --- sys/vm/vm_page.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sys/vm/vm_page.c b/sys/vm/vm_page.c index dafcab4e2d7d..7311d19da89a 100644 --- a/sys/vm/vm_page.c +++ b/sys/vm/vm_page.c @@ -2780,6 +2780,16 @@ bool vm_page_free_prep(vm_page_t m, bool pagequeue_locked) { +#if defined(DIAGNOSTIC) && defined(PHYS_TO_DMAP) + if ((m->flags & PG_ZERO) != 0) { + uint64_t *p; + int i; + p = (uint64_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); + for (i = 0; i < PAGE_SIZE / sizeof(uint64_t); i++, p++) + KASSERT(*p == 0, ("vm_page_free_prep %p PG_ZERO %d %jx", + m, i, (uintmax_t)*p)); + } +#endif if ((m->oflags & VPO_UNMANAGED) == 0) { vm_page_lock_assert(m, MA_OWNED); KASSERT(!pmap_page_is_mapped(m), From fc203cd43e9cab8a0a8604bff9dcf402a7a440ba Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sat, 21 Oct 2017 18:21:44 +0000 Subject: [PATCH 216/219] After the import of libc++ 5.0.0, there is no need to disable building libc++experimental.a on arm (r318654) and mips (r318859) anymore, since upstream fixed the static assertions which would occur. Noticed by: George Abdelmalik PR: 223119 MFC after: 3 days --- lib/Makefile | 2 -- 1 file changed, 2 deletions(-) diff --git a/lib/Makefile b/lib/Makefile index 638f62f2041c..d2cc58acba41 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -157,10 +157,8 @@ _libclang_rt= libclang_rt .if ${MK_LIBCPLUSPLUS} != "no" _libcxxrt= libcxxrt _libcplusplus= libc++ -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" _libcplusplus+= libc++experimental .endif -.endif SUBDIR.${MK_EFI}+= libefivar SUBDIR.${MK_LIBTHR}+= libthr From 738eacb46bf6b9395ec6fbfaa04467d8da4223a1 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sat, 21 Oct 2017 19:14:45 +0000 Subject: [PATCH 217/219] Pull in r316035 from upstream llvm trunk (by Tim Northover): AArch64: account for possible frame index operand in compares. If the address of a local is used in a comparison, AArch64 can fold the address-calculation into the comparison via "adds". Unfortunately, a couple of places (both hit in this one test) are not ready to deal with that yet and just assume the first source operand is a register. This should fix an assertion failure while building the test suite of www/firefox for AArch64. PR: 223048 MFC after: 3 days --- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 6 ++++++ .../lib/Target/AArch64/AArch64RedundantCopyElimination.cpp | 3 +++ 2 files changed, 9 insertions(+) diff --git a/contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index c0c6055c358f..13c80a46e5b0 100644 --- a/contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -940,6 +940,12 @@ bool AArch64InstrInfo::areMemAccessesTriviallyDisjoint( bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const { + // The first operand can be a frame index where we'd normally expect a + // register. + assert(MI.getNumOperands() >= 2 && "All AArch64 cmps should have 2 operands"); + if (!MI.getOperand(1).isReg()) + return false; + switch (MI.getOpcode()) { default: break; diff --git a/contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp index 4e65c0ab6011..22c11c7276d2 100644 --- a/contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp +++ b/contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp @@ -167,6 +167,9 @@ AArch64RedundantCopyElimination::knownRegValInBlock( // CMP is an alias for SUBS with a dead destination register. case AArch64::SUBSWri: case AArch64::SUBSXri: { + // Sometimes the first operand is a FrameIndex. Bail if tht happens. + if (!PredI.getOperand(1).isReg()) + return None; MCPhysReg SrcReg = PredI.getOperand(1).getReg(); // Must not be a symbolic immediate. From bd6bc862e3f8075954176f892b28a1fd159a4341 Mon Sep 17 00:00:00 2001 From: Brad Davis Date: Sat, 21 Oct 2017 21:58:24 +0000 Subject: [PATCH 218/219] Remove a atrun check that is nullified by r318443. Approved by: will --- etc/Makefile | 3 --- 1 file changed, 3 deletions(-) diff --git a/etc/Makefile b/etc/Makefile index 75750331af47..7e7e28542544 100644 --- a/etc/Makefile +++ b/etc/Makefile @@ -212,9 +212,6 @@ distribution: ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 600 \ snmpd.config ${DESTDIR}/etc; .endif -.if ${MK_AT} == "no" - sed -i "" -e 's;.*/usr/libexec/atrun;#&;' ${DESTDIR}/etc/crontab -.endif .if ${MK_TCSH} == "no" sed -i "" -e 's;/bin/csh;/bin/sh;' ${DESTDIR}/etc/master.passwd .endif From be49509eeaa5354b3015ed6468bf7abd2da73772 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Sat, 21 Oct 2017 22:40:09 +0000 Subject: [PATCH 219/219] mtx: implement thread lock fastpath MFC after: 1 week --- sys/kern/kern_mutex.c | 72 ++++++++++++++++++++++++++++++++++++------- sys/sys/mutex.h | 14 +++++++++ 2 files changed, 75 insertions(+), 11 deletions(-) diff --git a/sys/kern/kern_mutex.c b/sys/kern/kern_mutex.c index 8aeca58b4a15..435cbe753bf7 100644 --- a/sys/kern/kern_mutex.c +++ b/sys/kern/kern_mutex.c @@ -791,6 +791,66 @@ _mtx_lock_spin_cookie(volatile uintptr_t *c, uintptr_t v) } #endif /* SMP */ +#ifdef INVARIANTS +static void +thread_lock_validate(struct mtx *m, int opts, const char *file, int line) +{ + + KASSERT(m->mtx_lock != MTX_DESTROYED, + ("thread_lock() of destroyed mutex @ %s:%d", file, line)); + KASSERT(LOCK_CLASS(&m->lock_object) == &lock_class_mtx_spin, + ("thread_lock() of sleep mutex %s @ %s:%d", + m->lock_object.lo_name, file, line)); + if (mtx_owned(m)) + KASSERT((m->lock_object.lo_flags & LO_RECURSABLE) != 0, + ("thread_lock: recursed on non-recursive mutex %s @ %s:%d\n", + m->lock_object.lo_name, file, line)); + WITNESS_CHECKORDER(&m->lock_object, + opts | LOP_NEWORDER | LOP_EXCLUSIVE, file, line, NULL); +} +#else +#define thread_lock_validate(m, opts, file, line) do { } while (0) +#endif + +#ifndef LOCK_PROFILING +#if LOCK_DEBUG > 0 +void +_thread_lock(struct thread *td, int opts, const char *file, int line) +#else +void +_thread_lock(struct thread *td) +#endif +{ + struct mtx *m; + uintptr_t tid, v; + + tid = (uintptr_t)curthread; + + spinlock_enter(); + m = td->td_lock; + thread_lock_validate(m, 0, file, line); + v = MTX_READ_VALUE(m); + if (__predict_true(v == MTX_UNOWNED)) { + if (__predict_false(!_mtx_obtain_lock(m, tid))) + goto slowpath_unlocked; + } else if (v == tid) { + m->mtx_recurse++; + } else + goto slowpath_unlocked; + if (__predict_true(m == td->td_lock)) { + WITNESS_LOCK(&m->lock_object, LOP_EXCLUSIVE, file, line); + return; + } + if (m->mtx_recurse != 0) + m->mtx_recurse--; + else + _mtx_release_lock_quick(m); +slowpath_unlocked: + spinlock_exit(); + thread_lock_flags_(td, 0, 0, 0); +} +#endif + void thread_lock_flags_(struct thread *td, int opts, const char *file, int line) { @@ -834,17 +894,7 @@ thread_lock_flags_(struct thread *td, int opts, const char *file, int line) v = MTX_UNOWNED; spinlock_enter(); m = td->td_lock; - KASSERT(m->mtx_lock != MTX_DESTROYED, - ("thread_lock() of destroyed mutex @ %s:%d", file, line)); - KASSERT(LOCK_CLASS(&m->lock_object) == &lock_class_mtx_spin, - ("thread_lock() of sleep mutex %s @ %s:%d", - m->lock_object.lo_name, file, line)); - if (mtx_owned(m)) - KASSERT((m->lock_object.lo_flags & LO_RECURSABLE) != 0, - ("thread_lock: recursed on non-recursive mutex %s @ %s:%d\n", - m->lock_object.lo_name, file, line)); - WITNESS_CHECKORDER(&m->lock_object, - opts | LOP_NEWORDER | LOP_EXCLUSIVE, file, line, NULL); + thread_lock_validate(m, opts, file, line); for (;;) { if (_mtx_obtain_lock_fetch(m, &v, tid)) break; diff --git a/sys/sys/mutex.h b/sys/sys/mutex.h index c37d4ebd2aaa..d2b3702f2a17 100644 --- a/sys/sys/mutex.h +++ b/sys/sys/mutex.h @@ -127,9 +127,23 @@ void __mtx_assert(const volatile uintptr_t *c, int what, const char *file, int line); #endif void thread_lock_flags_(struct thread *, int, const char *, int); +#if LOCK_DEBUG > 0 +void _thread_lock(struct thread *td, int opts, const char *file, int line); +#else +void _thread_lock(struct thread *); +#endif +#if defined(LOCK_PROFILING) || defined(KLD_MODULE) #define thread_lock(tdp) \ thread_lock_flags_((tdp), 0, __FILE__, __LINE__) +#elif LOCK_DEBUG > 0 +#define thread_lock(tdp) \ + _thread_lock((tdp), 0, __FILE__, __LINE__) +#else +#define thread_lock(tdp) \ + _thread_lock((tdp)) +#endif + #define thread_lock_flags(tdp, opt) \ thread_lock_flags_((tdp), (opt), __FILE__, __LINE__) #define thread_unlock(tdp) \