From 0e190a486fd95e971920290b04eb273751dc371b Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Wed, 12 Aug 2015 09:46:39 +0000 Subject: [PATCH] Initialization of smp_tlb_wait does not require release semantic, no data is synchronized by store/load to the variable. The lapic_write_icr() function ensures that store buffers are flushed before IPI command is issued. Discussed with: bde Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 2 weeks --- sys/amd64/amd64/mp_machdep.c | 2 +- sys/i386/i386/mp_machdep.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 3c0a92363cf7..3318dddadcf9 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -440,7 +440,7 @@ smp_targeted_tlb_shootdown(cpuset_t mask, u_int vector, pmap_t pmap, smp_tlb_addr1 = addr1; smp_tlb_addr2 = addr2; smp_tlb_pmap = pmap; - atomic_store_rel_int(&smp_tlb_wait, 0); + smp_tlb_wait = 0; if (CPU_ISFULLSET(&mask)) { ncpu = othercpus; ipi_all_but_self(vector); diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index 93845efed182..9b8b9c919712 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -504,7 +504,7 @@ smp_tlb_shootdown(u_int vector, vm_offset_t addr1, vm_offset_t addr2) mtx_lock_spin(&smp_ipi_mtx); smp_tlb_addr1 = addr1; smp_tlb_addr2 = addr2; - atomic_store_rel_int(&smp_tlb_wait, 0); + smp_tlb_wait = 0; ipi_all_but_self(vector); while (smp_tlb_wait < ncpu) ia32_pause();