From 1f5c3c70bdbdcbc92e915659b08c547cc65b468d Mon Sep 17 00:00:00 2001
From: Sam Leffler <sam@FreeBSD.org>
Date: Wed, 17 Jun 2009 17:57:52 +0000
Subject: [PATCH] Add workaround to get IXP435 NPE-A working: reseting NPE-A
 after NPE-C causes both to become inoperative; this apparently was done by
 the original IAL code as a workaround for IMEM parity errors which we've not
 seen so just disable the reset.

Note this problem does not occur on IXP425 boards. The linux driver does
fuse-resets on each NPE but in the order NPE-A < NPE-B < NPE-C (when probing
for which NPE's are present/operational); we may want to switch to a similar
scheme but for now disable the resets until we see an issue.
---
 sys/arm/xscale/ixp425/ixp425_npe.c | 52 ++++++++++++++----------------
 1 file changed, 24 insertions(+), 28 deletions(-)

diff --git a/sys/arm/xscale/ixp425/ixp425_npe.c b/sys/arm/xscale/ixp425/ixp425_npe.c
index fe102ebceed3..53f588dca173 100644
--- a/sys/arm/xscale/ixp425/ixp425_npe.c
+++ b/sys/arm/xscale/ixp425/ixp425_npe.c
@@ -804,20 +804,34 @@ static const uint32_t ixNpeDlCtxtRegResetValues[] = {
 	IX_NPEDL_CTXT_REG_RESET_CINDEX,
 };
 
-#define	IX_NPEDL_RESET_NPE_PARITY	0x0800
 #define	IX_NPEDL_PARITY_BIT_MASK	0x3F00FFFF
 #define	IX_NPEDL_CONFIG_CTRL_REG_MASK	0x3F3FFFFF
 
+#if 0
+/*
+ * Reset the NPE and its coprocessor using the
+ * fuse bits in the feature control register.
+ */
+static void
+npe_reset(int npeid)
+{
+	uint32_t mask = EXP_FCTRL_NPEA << npeid;
+	uint32_t v;
+
+	v = ixp4xx_read_feature_bits();
+	ixp4xx_write_feature_bits(v &~ mask);
+	/* un-fuse and un-reset the NPE & coprocessor */
+	ixp4xx_write_feature_bits(v | mask);
+}
+#endif
+
 static int
 npe_cpu_reset(struct ixpnpe_softc *sc)
 {
 #define	N(a)	(sizeof(a) / sizeof(a[0]))
-	struct ixp425_softc *sa =
-	    device_get_softc(device_get_parent(sc->sc_dev));
 	uint32_t ctxtReg; /* identifies Context Store reg (0-3) */
 	uint32_t regAddr;
 	uint32_t regVal;
-	uint32_t resetNpeParity;
 	uint32_t ixNpeConfigCtrlRegVal;
 	int i, error = 0;
 	
@@ -935,33 +949,15 @@ npe_cpu_reset(struct ixpnpe_softc *sc)
 
 	/* Reset the Watch-count register */
 	npe_reg_write(sc, IX_NPEDL_REG_OFFSET_WC, 0);
-	
+#if 0
 	/*
 	 * WR IXA00055043 - Remove IMEM Parity Introduced by NPE Reset Operation
+	 * XXX Removed because it breaks IXP435 operation; e.g. on Gateworks
+	 * XXX 2358 boards reseting NPE-A after NPE-C is running causes both
+	 * XXX npe's to stop working
 	 */
-
-	/*
-	 * Reset the NPE and its coprocessor - to reset internal
-	 * states and remove parity error.  Note this makes no
-	 * sense based on the documentation.  The feature control
-	 * register always reads back as 0 on the ixp425 and further
-	 * the bit definition of NPEA/NPEB is off by 1 according to
-	 * the Intel documention--so we're blindly following the
-	 * Intel code w/o any real understanding.
-	 */
-	regVal = EXP_BUS_READ_4(sa, EXP_FCTRL_OFFSET);
-	DPRINTFn(2, sc->sc_dev, "%s: FCTRL 0x%x\n", __func__, regVal);
-	resetNpeParity =
-	    IX_NPEDL_RESET_NPE_PARITY << (1 + device_get_unit(sc->sc_dev));
-	DPRINTFn(2, sc->sc_dev, "%s: FCTRL fuse parity, write 0x%x\n",
-	    __func__, regVal | resetNpeParity);
-	EXP_BUS_WRITE_4(sa, EXP_FCTRL_OFFSET, regVal | resetNpeParity);
-
-	/* un-fuse and un-reset the NPE & coprocessor */
-	DPRINTFn(2, sc->sc_dev, "%s: FCTRL unfuse parity, write 0x%x\n",
-	    __func__, regVal & resetNpeParity);
-	EXP_BUS_WRITE_4(sa, EXP_FCTRL_OFFSET, regVal &~ resetNpeParity);
-
+	npe_reset(sc->sc_npeid);
+#endif
 	/*
 	 * Call NpeMgr function to stop the NPE again after the Feature Control
 	 * has unfused and Un-Reset the NPE and its associated Coprocessors.