mirror/freebsd
1
0
Fork 0
mirror of https://git.FreeBSD.org/src.git synced 2024-11-29 08:08:37 +00:00
Code Issues Releases Activity

Implement support for sysctl hw.model for Mediatek/Ralink SoCs

Browse Source 
These SoCs have CHIPID registers, which store the Chip model, according
to the manufacturer; make use of those in order to better identify
the chip we're actually running on.

If we're unable to read the CHIPID registers for some reason we will
use the string "unknown " as a value for hw.model.

Reported by:	yamori813@yahoo.co.jp
Sponsored by:	Smartcom - Bulgaria AD
This commit is contained in:
Stanislav Galabov 2018-11-16 11:17:18 +00:00
parent 4657bceacf
commit 3154bc4680
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=340476
4 changed files with 35 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sys/mips/mediatek/mtk_machdep.c
View File

@ -233,6 +233,8 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
while (1);
mtk_soc_try_early_detect();
mtk_soc_set_cpu_model();
if ((timer_clk = mtk_soc_get_timerclk()) == 0)
timer_clk = 1000000000; /* no such speed yet */

29
sys/mips/mediatek/mtk_soc.c
View File

@ -52,6 +52,9 @@ static uint32_t mtk_soc_uartclk = 0;
static uint32_t mtk_soc_cpuclk = MTK_CPU_CLK_880MHZ;
static uint32_t mtk_soc_timerclk = MTK_CPU_CLK_880MHZ / 2;
static uint32_t mtk_soc_chipid0_3 = MTK_UNKNOWN_CHIPID0_3;
static uint32_t mtk_soc_chipid4_7 = MTK_UNKNOWN_CHIPID4_7;
static const struct ofw_compat_data compat_data[] = {
{ "ralink,rt2880-soc", MTK_SOC_RT2880 },
{ "ralink,rt3050-soc", MTK_SOC_RT3050 },
@ -295,6 +298,10 @@ mtk_soc_try_early_detect(void)
if (bus_space_map(bst, base, MTK_DEFAULT_SIZE, 0, &bsh))
return;
/* Get our CHIP ID */
mtk_soc_chipid0_3 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3);
mtk_soc_chipid4_7 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID4_7);
/* First, figure out the CPU clock */
switch (mtk_soc_socid) {
case MTK_SOC_RT2880:
@ -389,6 +396,28 @@ mtk_soc_try_early_detect(void)
bus_space_unmap(bst, bsh, MTK_DEFAULT_SIZE);
}
extern char cpu_model[];
void
mtk_soc_set_cpu_model(void)
{
uint32_t *p_model = (uint32_t *)cpu_model;
/*
* CHIPID is always 2x32 bit registers, containing the ASCII
* representation of the chip, so use that directly.
*
* The info is either pre-populated in mtk_soc_try_early_detect() or
* it is left at its default value of "unknown " if it could not be
* obtained for some reason.
*/
p_model[0] = mtk_soc_chipid0_3;
p_model[1] = mtk_soc_chipid4_7;
/* Null-terminate the string */
cpu_model[8] = 0;
}
uint32_t
mtk_soc_get_uartclk(void)
{

1
sys/mips/mediatek/mtk_soc.h
View File

@ -122,6 +122,7 @@ enum mtk_soc_id {
#define MTK_DEFAULT_SIZE 0x6000
extern void mtk_soc_try_early_detect(void);
extern void mtk_soc_set_cpu_model(void);
extern uint32_t mtk_soc_get_uartclk(void);
extern uint32_t mtk_soc_get_cpuclk(void);
extern uint32_t mtk_soc_get_timerclk(void);

3
sys/mips/mediatek/mtk_sysctl.h
View File

@ -54,6 +54,9 @@
#define RT3350_CHIPID0_3 0x33335452
#define MTK_UNKNOWN_CHIPID0_3 0x6E6B6E75 /* "unkn" */
#define MTK_UNKNOWN_CHIPID4_7 0x206E776F /* "own " */
extern uint32_t mtk_sysctl_get(uint32_t);
extern void mtk_sysctl_set(uint32_t, uint32_t);
extern void mtk_sysctl_clr_set(uint32_t, uint32_t, uint32_t);