From 515582436a8f44376af5aaf861b1e195ccf59b18 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Fri, 8 Jul 2016 21:34:39 +0000 Subject: [PATCH] [ath_hal] retire a "long RX desc" flag, store/use the TX/RX timestamp length. * the code already stored the length of the RX desc, which I never used. So, use that and retire the new flag I introduced a while ago. * Introduce a TX timestamp length field and capability. --- .../dev/ath/ath_hal/ar9300/ar9300_attach.c | 5 ++--- sys/dev/ath/ath_hal/ah.c | 7 ++++--- sys/dev/ath/ath_hal/ah.h | 2 +- sys/dev/ath/ath_hal/ah_internal.h | 4 ++-- sys/dev/ath/ath_hal/ar5210/ar5210_attach.c | 3 ++- sys/dev/ath/ath_hal/ar5211/ar5211_attach.c | 3 ++- sys/dev/ath/ath_hal/ar5212/ar5212_attach.c | 3 ++- sys/dev/ath/ath_hal/ar5416/ar5416_attach.c | 5 ++--- sys/dev/ath/if_ath.c | 15 ++++++++++++++- 9 files changed, 31 insertions(+), 16 deletions(-) diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c index 2cd9d3137960..216f98306547 100644 --- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c +++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c @@ -2878,7 +2878,6 @@ ar9300_fill_capability_info(struct ath_hal *ah) #if ATH_SUPPORT_SPECTRAL p_cap->halSpectralScanSupport = AH_TRUE; #endif - ahpriv->ah_rfsilent = ar9300_eeprom_get(ahp, EEP_RF_SILENT); if (ahpriv->ah_rfsilent & EEP_RFSILENT_ENABLED) { ahp->ah_gpio_select = MS(ahpriv->ah_rfsilent, EEP_RFSILENT_GPIO_SEL); @@ -2998,8 +2997,8 @@ ar9300_fill_capability_info(struct ath_hal *ah) p_cap->hal_cfend_fix_support = AH_FALSE; p_cap->hal_aggr_extra_delim_war = AH_FALSE; #endif - p_cap->halHasLongRxDescTsf = AH_TRUE; -// p_cap->hal_rx_desc_timestamp_bits = 32; + p_cap->halTxTstampPrecision = 32; + p_cap->halRxTstampPrecision = 32; p_cap->halRxTxAbortSupport = AH_TRUE; p_cap->hal_ani_poll_interval = AR9300_ANI_POLLINTERVAL; p_cap->hal_channel_switch_time_usec = AR9300_CHANNEL_SWITCH_TIME_USEC; diff --git a/sys/dev/ath/ath_hal/ah.c b/sys/dev/ath/ath_hal/ah.c index e14feb26c19d..7fff88b836b7 100644 --- a/sys/dev/ath/ath_hal/ah.c +++ b/sys/dev/ath/ath_hal/ah.c @@ -749,7 +749,7 @@ ath_hal_getcapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, case HAL_CAP_HT20_SGI: return pCap->halHTSGI20Support ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_RXTSTAMP_PREC: /* rx desc tstamp precision (bits) */ - *result = pCap->halTstampPrecision; + *result = pCap->halRxTstampPrecision; return HAL_OK; case HAL_CAP_ANT_DIV_COMB: /* AR9285/AR9485 LNA diversity */ return pCap->halAntDivCombSupport ? HAL_OK : HAL_ENOTSUPP; @@ -778,8 +778,6 @@ ath_hal_getcapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, } case HAL_CAP_RXDESC_SELFLINK: /* hardware supports self-linked final RX descriptors correctly */ return pCap->halHasRxSelfLinkedTail ? HAL_OK : HAL_ENOTSUPP; - case HAL_CAP_LONG_RXDESC_TSF: /* 32 bit TSF in RX descriptor? */ - return pCap->halHasLongRxDescTsf ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_BB_READ_WAR: /* Baseband read WAR */ return pCap->halHasBBReadWar? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_SERIALISE_WAR: /* PCI register serialisation */ @@ -791,6 +789,9 @@ ath_hal_getcapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, return pCap->halRxUsingLnaMixing ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_DO_MYBEACON: /* Hardware supports filtering my-beacons */ return pCap->halRxDoMyBeacon ? HAL_OK : HAL_ENOTSUPP; + case HAL_CAP_TXTSTAMP_PREC: /* tx desc tstamp precision (bits) */ + *result = pCap->halTxTstampPrecision; + return HAL_OK; default: return HAL_EINVAL; } diff --git a/sys/dev/ath/ath_hal/ah.h b/sys/dev/ath/ath_hal/ah.h index ecf22271ed06..da61c31c3734 100644 --- a/sys/dev/ath/ath_hal/ah.h +++ b/sys/dev/ath/ath_hal/ah.h @@ -194,12 +194,12 @@ typedef enum { HAL_CAP_BSSIDMATCH = 238, /* hardware has disable bssid match */ HAL_CAP_STREAMS = 239, /* how many 802.11n spatial streams are available */ HAL_CAP_RXDESC_SELFLINK = 242, /* support a self-linked tail RX descriptor */ - HAL_CAP_LONG_RXDESC_TSF = 243, /* hardware supports 32bit TSF in RX descriptor */ HAL_CAP_BB_READ_WAR = 244, /* baseband read WAR */ HAL_CAP_SERIALISE_WAR = 245, /* serialise register access on PCI */ HAL_CAP_ENFORCE_TXOP = 246, /* Enforce TXOP if supported */ HAL_CAP_RX_LNA_MIXING = 247, /* RX hardware uses LNA mixing */ HAL_CAP_DO_MYBEACON = 248, /* Supports HAL_RX_FILTER_MYBEACON */ + HAL_CAP_TXTSTAMP_PREC = 250, /* tx desc tstamp precision (bits) */ } HAL_CAPABILITY_TYPE; /* diff --git a/sys/dev/ath/ath_hal/ah_internal.h b/sys/dev/ath/ath_hal/ah_internal.h index a4c76562fd20..5710255e7025 100644 --- a/sys/dev/ath/ath_hal/ah_internal.h +++ b/sys/dev/ath/ath_hal/ah_internal.h @@ -260,7 +260,6 @@ typedef struct { hal4kbSplitTransSupport : 1, halHasRxSelfLinkedTail : 1, halSupportsFastClock5GHz : 1, - halHasLongRxDescTsf : 1, halHasBBReadWar : 1, halSerialiseRegWar : 1, halMciSupport : 1, @@ -290,7 +289,8 @@ typedef struct { uint16_t halKeyCacheSize; uint16_t halLow5GhzChan, halHigh5GhzChan; uint16_t halLow2GhzChan, halHigh2GhzChan; - int halTstampPrecision; + int halTxTstampPrecision; + int halRxTstampPrecision; int halRtsAggrLimit; uint8_t halTxChainMask; uint8_t halRxChainMask; diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c index ceafa99f2963..3ff44e0a759b 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c @@ -390,7 +390,8 @@ ar5210FillCapabilityInfo(struct ath_hal *ah) pCap->halRfSilentSupport = AH_TRUE; } - pCap->halTstampPrecision = 15; /* NB: s/w extended from 13 */ + pCap->halTxTstampPrecision = 16; + pCap->halRxTstampPrecision = 15; /* NB: s/w extended from 13 */ pCap->halIntrMask = (HAL_INT_COMMON - HAL_INT_BNR) | HAL_INT_RX | HAL_INT_TX diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c index 3416dc0e8809..c2563a259c5b 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c @@ -520,7 +520,8 @@ ar5211FillCapabilityInfo(struct ath_hal *ah) pCap->halRfSilentSupport = AH_TRUE; } - pCap->halTstampPrecision = 13; + pCap->halRxTstampPrecision = 13; + pCap->halTxTstampPrecision = 16; pCap->halIntrMask = HAL_INT_COMMON | HAL_INT_RX | HAL_INT_TX diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c index 189e916546c5..c7c77a9e2855 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c @@ -899,7 +899,8 @@ ar5212FillCapabilityInfo(struct ath_hal *ah) pCap->halBssidMatchSupport = AH_TRUE; } - pCap->halTstampPrecision = 15; + pCap->halRxTstampPrecision = 15; + pCap->halTxTstampPrecision = 16; pCap->halIntrMask = HAL_INT_COMMON | HAL_INT_RX | HAL_INT_TX diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c index 4b9ebdafb24d..98482fde42aa 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c @@ -967,7 +967,8 @@ ar5416FillCapabilityInfo(struct ath_hal *ah) pCap->halChanHalfRate = AH_TRUE; pCap->halChanQuarterRate = AH_TRUE; - pCap->halTstampPrecision = 32; + pCap->halTxTstampPrecision = 32; + pCap->halRxTstampPrecision = 32; pCap->halHwPhyCounterSupport = AH_TRUE; pCap->halIntrMask = HAL_INT_COMMON | HAL_INT_RX @@ -1019,8 +1020,6 @@ ar5416FillCapabilityInfo(struct ath_hal *ah) pCap->halGTTSupport = AH_TRUE; pCap->halCSTSupport = AH_TRUE; pCap->halEnhancedDfsSupport = AH_FALSE; - /* Hardware supports 32 bit TSF values in the RX descriptor */ - pCap->halHasLongRxDescTsf = AH_TRUE; /* * BB Read WAR: this is only for AR5008/AR9001 NICs * It is also set individually in the AR91xx attach functions. diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index 949c7d55ab5d..0745621173d4 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -971,7 +971,20 @@ ath_attach(u_int16_t devid, struct ath_softc *sc) sc->sc_hasbmatch = ath_hal_hasbssidmatch(ah); sc->sc_hastsfadd = ath_hal_hastsfadjust(ah); sc->sc_rxslink = ath_hal_self_linked_final_rxdesc(ah); - sc->sc_rxtsf32 = ath_hal_has_long_rxdesc_tsf(ah); + + /* XXX TODO: just make this a "store tx/rx timestamp length" operation */ + if (ath_hal_get_rx_tsf_prec(ah, &i)) { + if (i == 32) { + sc->sc_rxtsf32 = 1; + } + if (bootverbose) + device_printf(sc->sc_dev, "RX timestamp: %d bits\n", i); + } + if (ath_hal_get_tx_tsf_prec(ah, &i)) { + if (bootverbose) + device_printf(sc->sc_dev, "TX timestamp: %d bits\n", i); + } + sc->sc_hasenforcetxop = ath_hal_hasenforcetxop(ah); sc->sc_rx_lnamixer = ath_hal_hasrxlnamixer(ah); sc->sc_hasdivcomb = ath_hal_hasdivantcomb(ah);