From 64003afe2e8a3d32acf778c9ab9efa2ee7a701b5 Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Sun, 5 Jul 2009 06:56:51 +0000 Subject: [PATCH] (1) Use uintptr_t in preference to unsigned. The latter isn't right for 64-bit case, while the former is. (2) include a SB1 specific coherency mapping Submitted by: Neelkanth Nath (2) --- sys/mips/include/cpu.h | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h index 11b81df381b2..3e939a04d7c2 100644 --- a/sys/mips/include/cpu.h +++ b/sys/mips/include/cpu.h @@ -56,21 +56,21 @@ #define MIPS_RESERVED_ADDR 0xbfc80000 #define MIPS_KSEG0_LARGEST_PHYS 0x20000000 -#define MIPS_CACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff) -#define MIPS_PHYS_TO_CACHED(x) ((unsigned)(x) | MIPS_CACHED_MEMORY_ADDR) -#define MIPS_UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff) -#define MIPS_PHYS_TO_UNCACHED(x) ((unsigned)(x) | MIPS_UNCACHED_MEMORY_ADDR) +#define MIPS_CACHED_TO_PHYS(x) ((uintptr_t)(x) & 0x1fffffff) +#define MIPS_PHYS_TO_CACHED(x) ((uintptr_t)(x) | MIPS_CACHED_MEMORY_ADDR) +#define MIPS_UNCACHED_TO_PHYS(x) ((uintptr_t)(x) & 0x1fffffff) +#define MIPS_PHYS_TO_UNCACHED(x) ((uintptr_t)(x) | MIPS_UNCACHED_MEMORY_ADDR) #define MIPS_PHYS_MASK (0x1fffffff) #define MIPS_PA_2_K1VA(x) (MIPS_KSEG1_START | ((x) & MIPS_PHYS_MASK)) -#define MIPS_VA_TO_CINDEX(x) ((unsigned)(x) & 0xffffff | MIPS_CACHED_MEMORY_ADDR) +#define MIPS_VA_TO_CINDEX(x) ((uintptr_t)(x) & 0xffffff | MIPS_CACHED_MEMORY_ADDR) #define MIPS_CACHED_TO_UNCACHED(x) (MIPS_PHYS_TO_UNCACHED(MIPS_CACHED_TO_PHYS(x))) -#define MIPS_PHYS_TO_KSEG0(x) ((unsigned)(x) | MIPS_KSEG0_START) -#define MIPS_PHYS_TO_KSEG1(x) ((unsigned)(x) | MIPS_KSEG1_START) -#define MIPS_KSEG0_TO_PHYS(x) ((unsigned)(x) & MIPS_PHYS_MASK) -#define MIPS_KSEG1_TO_PHYS(x) ((unsigned)(x) & MIPS_PHYS_MASK) +#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START) +#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START) +#define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) +#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK) #define MIPS_IS_KSEG0_ADDR(x) \ (((vm_offset_t)(x) >= MIPS_KSEG0_START) && \ @@ -163,7 +163,11 @@ * The bits in the CONFIG register */ #define CFG_K0_UNCACHED 2 +#if defined(CPU_SB1) +#define CFG_K0_COHERENT 5 /* cacheable coherent */ +#else #define CFG_K0_CACHED 3 +#endif /* * The bits in the context register.