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Cleanup TurboLaser a bit. Add non-Adaptec statement for Miata SRM.
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Notes:
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2020-12-20 02:59:44 +00:00
svn path=/head/; revision=77534
@ -41,12 +41,15 @@
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<note>
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<para>You will see references to DEC, Digital Equipment Corporation and
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Compaq used more or less interchangeably. Now that Compaq has acquired
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Digital Equipment it would be more correct to refer to Compaq only.</para>
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Digital Equipment it would be more correct to refer to Compaq only.
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Given the fact that you will see the mix of names everywhere I don't
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bother.</para>
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</note>
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<note>
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<para>SRM commands will be in <userinput>UPPER CASE</userinput>.
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Lower case input is also acceptible to SRM.
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Lower case input is also acceptible to SRM. Upper case is used for
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clarity.
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</note>
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</sect2>
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@ -116,7 +119,7 @@
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Alpha). The PAL code can be thought of as a software abstraction
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layer between the hardware and the operating system. It uses
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normal CPU instruction plus a handful of privileged instructions
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specific for PAL use. PAL is not microcode by the way. The ARC console
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specific for PAL use. PAL is not microcode. The ARC console
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firmware contains a different PAL code, geared towards WinNT and
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in no way suitable for use by &os; (or more generic: Unix or
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OpenVMS). Before someone asks: Linux/alpha brings its own PAL
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@ -752,6 +755,10 @@ Jan 3 12:22:32 miata /kernel: pcib0: <2117x PCI host bus adapter> on cia0
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support up to WDMA2 mode as the chip is too buggy for use
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with UDMA.</para>
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<para>Miata MX5s generally use Qlogic 1040 based SCSI adapters.
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These are bootable by the SRM console. Note that Adaptec cards
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are <emphasis>not</emphasis> bootable by the Miata SRM console.</para>
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<para>The MiataGL has a faster PCI-PCI bridge chip on the PCI
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riser card than some of the MX5 riser card versions. Some of
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the MX5 risers have the <emphasis>same</emphasis> chip as the
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@ -1956,7 +1963,8 @@ cpu EV5</programlisting></para>
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<para>For 500 MHz CPUs 83 MHz DIMMs will do. Compaq specifies PC100
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DIMMs for all CPU speeds. DIMMs are installed in sets of 4, starting
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with the DIMM slots marked <quote>0</quote> Memory capacity is max 4 GB.
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DIMMs are installed <quote>physically interleaved</quote>, note the markings of the
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DIMMs are installed <quote>physically interleaved</quote>, note the
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markings of the
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slots. Memory bandwidth of Monet is twice that of Webbrick. The DIMMs
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live on the CPU daughter-card. Note that the system uses ECC RAM so you
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need DIMMs with 72 bits (not the generic PC-class 64 bit DIMMs)</para>
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@ -2518,14 +2526,14 @@ cpu EV5</programlisting>
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<para>Features:
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<itemizedlist>
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<listitem>
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<para>21164 EV5 CPUs at up to 467 MHz or 21264 EV67 CPUs at
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<para>21164 EV5/EV56 CPUs at up to 467 MHz or 21264 EV67 CPUs at
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up to 625 MHz</para>
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</listitem>
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<listitem>
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<para>one or two CPUs per CPU module</para>
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</listitem>
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<listitem>
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<para>cache: 4Mbytes per CPU</para>
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<para>cache: 4Mbytes B-cache per CPU</para>
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</listitem>
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<listitem>
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<para>memory bus: 256 bit with ECC</para>
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@ -2535,7 +2543,7 @@ cpu EV5</programlisting>
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which in turn hold special SIMM modules. Memory modules come
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in varying sizes, up to 4 GBytes a piece. Uses ECC (8 bits
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per 64 bits of data) 7 memory modules max for AS8400,
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3 modules max for AS8200. Maximum memory is 14 GBytes.</para>
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3 modules max for AS8200. Maximum memory is 28 GBytes.</para>
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</listitem>
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<listitem>
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<para>expansion: 3 system <quote>I/O ports</quote> that allow up to
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@ -2546,7 +2554,10 @@ cpu EV5</programlisting>
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</para>
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<para>&os; supports (and has been tested with) up to 2 GBytes
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of memory on TurboLaser.</para>
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of memory on TurboLaser. There is a trade-off to be made between
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TLSB slots occupied by memory modules and TLSB slots occupied by
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CPU modules. For example you can have 28GBytes of memory but only
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2 CPUs (1 module) at the same time.</para>
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<para>Only PCI expansion is supported on &os;. XMI or
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Futurebus+ (which are AS8400 only) are both unsupported.</para>
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@ -2576,8 +2587,8 @@ cpu EV5</programlisting>
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<para>Currently PCI expansion cards containing PCI bridges are
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not usable with &os;. Don't use them at this time.</para>
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<para>The single ended SCSI bus on the KFTIA will turn up as
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the <emphasis>fourth</emphasis> SCSI bus. The 3
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<para>The single ended narrow SCSI bus on the KFTIA will turn up as
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the <emphasis>fourth</emphasis> SCSI bus. The 3 fast-wide
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differential SCSI buses of the KFTIA precede it. </para>
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<para>AS8x00 are generally run with serial consoles. Some
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@ -41,12 +41,15 @@
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<note>
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<para>You will see references to DEC, Digital Equipment Corporation and
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Compaq used more or less interchangeably. Now that Compaq has acquired
|
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Digital Equipment it would be more correct to refer to Compaq only.</para>
|
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Digital Equipment it would be more correct to refer to Compaq only.
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Given the fact that you will see the mix of names everywhere I don't
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bother.</para>
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</note>
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<note>
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<para>SRM commands will be in <userinput>UPPER CASE</userinput>.
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Lower case input is also acceptible to SRM.
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Lower case input is also acceptible to SRM. Upper case is used for
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clarity.
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</note>
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</sect2>
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@ -116,7 +119,7 @@
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Alpha). The PAL code can be thought of as a software abstraction
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layer between the hardware and the operating system. It uses
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normal CPU instruction plus a handful of privileged instructions
|
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specific for PAL use. PAL is not microcode by the way. The ARC console
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specific for PAL use. PAL is not microcode. The ARC console
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firmware contains a different PAL code, geared towards WinNT and
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in no way suitable for use by &os; (or more generic: Unix or
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OpenVMS). Before someone asks: Linux/alpha brings its own PAL
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@ -752,6 +755,10 @@ Jan 3 12:22:32 miata /kernel: pcib0: <2117x PCI host bus adapter> on cia0
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support up to WDMA2 mode as the chip is too buggy for use
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with UDMA.</para>
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<para>Miata MX5s generally use Qlogic 1040 based SCSI adapters.
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These are bootable by the SRM console. Note that Adaptec cards
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are <emphasis>not</emphasis> bootable by the Miata SRM console.</para>
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<para>The MiataGL has a faster PCI-PCI bridge chip on the PCI
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riser card than some of the MX5 riser card versions. Some of
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the MX5 risers have the <emphasis>same</emphasis> chip as the
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@ -1956,7 +1963,8 @@ cpu EV5</programlisting></para>
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<para>For 500 MHz CPUs 83 MHz DIMMs will do. Compaq specifies PC100
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DIMMs for all CPU speeds. DIMMs are installed in sets of 4, starting
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with the DIMM slots marked <quote>0</quote> Memory capacity is max 4 GB.
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DIMMs are installed <quote>physically interleaved</quote>, note the markings of the
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DIMMs are installed <quote>physically interleaved</quote>, note the
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markings of the
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slots. Memory bandwidth of Monet is twice that of Webbrick. The DIMMs
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live on the CPU daughter-card. Note that the system uses ECC RAM so you
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need DIMMs with 72 bits (not the generic PC-class 64 bit DIMMs)</para>
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@ -2518,14 +2526,14 @@ cpu EV5</programlisting>
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<para>Features:
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<itemizedlist>
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<listitem>
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<para>21164 EV5 CPUs at up to 467 MHz or 21264 EV67 CPUs at
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<para>21164 EV5/EV56 CPUs at up to 467 MHz or 21264 EV67 CPUs at
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up to 625 MHz</para>
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</listitem>
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<listitem>
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<para>one or two CPUs per CPU module</para>
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</listitem>
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<listitem>
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<para>cache: 4Mbytes per CPU</para>
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<para>cache: 4Mbytes B-cache per CPU</para>
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</listitem>
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<listitem>
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<para>memory bus: 256 bit with ECC</para>
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@ -2535,7 +2543,7 @@ cpu EV5</programlisting>
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which in turn hold special SIMM modules. Memory modules come
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in varying sizes, up to 4 GBytes a piece. Uses ECC (8 bits
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per 64 bits of data) 7 memory modules max for AS8400,
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3 modules max for AS8200. Maximum memory is 14 GBytes.</para>
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3 modules max for AS8200. Maximum memory is 28 GBytes.</para>
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</listitem>
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<listitem>
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<para>expansion: 3 system <quote>I/O ports</quote> that allow up to
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@ -2546,7 +2554,10 @@ cpu EV5</programlisting>
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</para>
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<para>&os; supports (and has been tested with) up to 2 GBytes
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of memory on TurboLaser.</para>
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of memory on TurboLaser. There is a trade-off to be made between
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TLSB slots occupied by memory modules and TLSB slots occupied by
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CPU modules. For example you can have 28GBytes of memory but only
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2 CPUs (1 module) at the same time.</para>
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<para>Only PCI expansion is supported on &os;. XMI or
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Futurebus+ (which are AS8400 only) are both unsupported.</para>
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@ -2576,8 +2587,8 @@ cpu EV5</programlisting>
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<para>Currently PCI expansion cards containing PCI bridges are
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not usable with &os;. Don't use them at this time.</para>
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<para>The single ended SCSI bus on the KFTIA will turn up as
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the <emphasis>fourth</emphasis> SCSI bus. The 3
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<para>The single ended narrow SCSI bus on the KFTIA will turn up as
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the <emphasis>fourth</emphasis> SCSI bus. The 3 fast-wide
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differential SCSI buses of the KFTIA precede it. </para>
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<para>AS8x00 are generally run with serial consoles. Some
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