From a18e40aad4122d027529aee9a273eeedb87cda1c Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Fri, 13 Jul 2018 20:56:20 +0000 Subject: [PATCH] Use the existing MSR_BIOS_SIGN on AMD. Reported by: kib Sponsored by: The FreeBSD Foundation --- sys/x86/include/specialreg.h | 1 - usr.sbin/cpucontrol/amd10h.c | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 327b780397d9..efaa1dadb6f7 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -973,7 +973,6 @@ #define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */ /* AMD64 MSR's */ -#define MSR_PATCH_LEVEL 0x0000008b /* microcode revision number */ #define MSR_EFER 0xc0000080 /* extended features */ #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target/cs/ss */ #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip */ diff --git a/usr.sbin/cpucontrol/amd10h.c b/usr.sbin/cpucontrol/amd10h.c index f001bcd06bc5..61045e90fce9 100644 --- a/usr.sbin/cpucontrol/amd10h.c +++ b/usr.sbin/cpucontrol/amd10h.c @@ -129,7 +129,7 @@ amd10h_update(const char *dev, const char *path) } signature = idargs.data[0]; - msrargs.msr = MSR_PATCH_LEVEL; + msrargs.msr = MSR_BIOS_SIGN; error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); if (error < 0) { WARN(0, "ioctl(%s)", dev); @@ -295,7 +295,7 @@ amd10h_update(const char *dev, const char *path) fprintf(stderr, "done.\n"); } - msrargs.msr = MSR_PATCH_LEVEL; + msrargs.msr = MSR_BIOS_SIGN; error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); if (error < 0) { WARN(0, "ioctl(%s)", dev);