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hwpmc: remove mips event definitions

Browse Source 
Reviewed by:	imp, emaste
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34084
This commit is contained in:
Mitchell Horne 2022-01-28 16:34:52 -04:00
parent 99830f702d
commit b1ab9568bc
1 changed files with 4 additions and 366 deletions
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370
sys/dev/hwpmc/pmc_events.h
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@ -1004,360 +1004,6 @@ __PMC_EV_ALIAS("unhalted-core-cycles", IAP_ARCH_UNH_COR_CYC)
__PMC_EV_ALIAS("STREX_SPEC", ARMV8_EVENT_6FH) \
__PMC_EV_ALIAS("L3_CACHE_RD", ARMV8_EVENT_A0H)
/*
* MIPS Events from "Programming the MIPS32 24K Core Family",
* Document Number: MD00355 Revision 04.63 December 19, 2008
* These events are kept in the order found in Table 7.4.
* For counters which are different between the left hand
* column (0/2) and the right hand column (1/3) the left
* hand is given first, e.g. BRANCH_COMPLETED and BRANCH_MISPRED
* in the definition below.
*/
#define __PMC_EV_MIPS24K() \
__PMC_EV(MIPS24K, CYCLE) \
__PMC_EV(MIPS24K, INSTR_EXECUTED) \
__PMC_EV(MIPS24K, BRANCH_COMPLETED) \
__PMC_EV(MIPS24K, BRANCH_MISPRED) \
__PMC_EV(MIPS24K, RETURN) \
__PMC_EV(MIPS24K, RETURN_MISPRED) \
__PMC_EV(MIPS24K, RETURN_NOT_31) \
__PMC_EV(MIPS24K, RETURN_NOTPRED) \
__PMC_EV(MIPS24K, ITLB_ACCESS) \
__PMC_EV(MIPS24K, ITLB_MISS) \
__PMC_EV(MIPS24K, DTLB_ACCESS) \
__PMC_EV(MIPS24K, DTLB_MISS) \
__PMC_EV(MIPS24K, JTLB_IACCESS) \
__PMC_EV(MIPS24K, JTLB_IMISS) \
__PMC_EV(MIPS24K, JTLB_DACCESS) \
__PMC_EV(MIPS24K, JTLB_DMISS) \
__PMC_EV(MIPS24K, IC_FETCH) \
__PMC_EV(MIPS24K, IC_MISS) \
__PMC_EV(MIPS24K, DC_LOADSTORE) \
__PMC_EV(MIPS24K, DC_WRITEBACK) \
__PMC_EV(MIPS24K, DC_MISS) \
__PMC_EV(MIPS24K, STORE_MISS) \
__PMC_EV(MIPS24K, LOAD_MISS) \
__PMC_EV(MIPS24K, INTEGER_COMPLETED) \
__PMC_EV(MIPS24K, FP_COMPLETED) \
__PMC_EV(MIPS24K, LOAD_COMPLETED) \
__PMC_EV(MIPS24K, STORE_COMPLETED) \
__PMC_EV(MIPS24K, BARRIER_COMPLETED) \
__PMC_EV(MIPS24K, MIPS16_COMPLETED) \
__PMC_EV(MIPS24K, NOP_COMPLETED) \
__PMC_EV(MIPS24K, INTEGER_MULDIV_COMPLETED)\
__PMC_EV(MIPS24K, RF_STALL) \
__PMC_EV(MIPS24K, INSTR_REFETCH) \
__PMC_EV(MIPS24K, STORE_COND_COMPLETED) \
__PMC_EV(MIPS24K, STORE_COND_FAILED) \
__PMC_EV(MIPS24K, ICACHE_REQUESTS) \
__PMC_EV(MIPS24K, ICACHE_HIT) \
__PMC_EV(MIPS24K, L2_WRITEBACK) \
__PMC_EV(MIPS24K, L2_ACCESS) \
__PMC_EV(MIPS24K, L2_MISS) \
__PMC_EV(MIPS24K, L2_ERR_CORRECTED) \
__PMC_EV(MIPS24K, EXCEPTIONS) \
__PMC_EV(MIPS24K, RF_CYCLES_STALLED) \
__PMC_EV(MIPS24K, IFU_CYCLES_STALLED) \
__PMC_EV(MIPS24K, ALU_CYCLES_STALLED) \
__PMC_EV(MIPS24K, UNCACHED_LOAD) \
__PMC_EV(MIPS24K, UNCACHED_STORE) \
__PMC_EV(MIPS24K, CP2_REG_TO_REG_COMPLETED)\
__PMC_EV(MIPS24K, MFTC_COMPLETED) \
__PMC_EV(MIPS24K, IC_BLOCKED_CYCLES) \
__PMC_EV(MIPS24K, DC_BLOCKED_CYCLES) \
__PMC_EV(MIPS24K, L2_IMISS_STALL_CYCLES) \
__PMC_EV(MIPS24K, L2_DMISS_STALL_CYCLES) \
__PMC_EV(MIPS24K, DMISS_CYCLES) \
__PMC_EV(MIPS24K, L2_MISS_CYCLES) \
__PMC_EV(MIPS24K, UNCACHED_BLOCK_CYCLES) \
__PMC_EV(MIPS24K, MDU_STALL_CYCLES) \
__PMC_EV(MIPS24K, FPU_STALL_CYCLES) \
__PMC_EV(MIPS24K, CP2_STALL_CYCLES) \
__PMC_EV(MIPS24K, COREXTEND_STALL_CYCLES) \
__PMC_EV(MIPS24K, ISPRAM_STALL_CYCLES) \
__PMC_EV(MIPS24K, DSPRAM_STALL_CYCLES) \
__PMC_EV(MIPS24K, CACHE_STALL_CYCLES) \
__PMC_EV(MIPS24K, LOAD_TO_USE_STALLS) \
__PMC_EV(MIPS24K, BASE_MISPRED_STALLS) \
__PMC_EV(MIPS24K, CPO_READ_STALLS) \
__PMC_EV(MIPS24K, BRANCH_MISPRED_CYCLES) \
__PMC_EV(MIPS24K, IFETCH_BUFFER_FULL) \
__PMC_EV(MIPS24K, FETCH_BUFFER_ALLOCATED) \
__PMC_EV(MIPS24K, EJTAG_ITRIGGER) \
__PMC_EV(MIPS24K, EJTAG_DTRIGGER) \
__PMC_EV(MIPS24K, FSB_LT_QUARTER) \
__PMC_EV(MIPS24K, FSB_QUARTER_TO_HALF) \
__PMC_EV(MIPS24K, FSB_GT_HALF) \
__PMC_EV(MIPS24K, FSB_FULL_PIPELINE_STALLS)\
__PMC_EV(MIPS24K, LDQ_LT_QUARTER) \
__PMC_EV(MIPS24K, LDQ_QUARTER_TO_HALF) \
__PMC_EV(MIPS24K, LDQ_GT_HALF) \
__PMC_EV(MIPS24K, LDQ_FULL_PIPELINE_STALLS)\
__PMC_EV(MIPS24K, WBB_LT_QUARTER) \
__PMC_EV(MIPS24K, WBB_QUARTER_TO_HALF) \
__PMC_EV(MIPS24K, WBB_GT_HALF) \
__PMC_EV(MIPS24K, WBB_FULL_PIPELINE_STALLS) \
__PMC_EV(MIPS24K, REQUEST_LATENCY) \
__PMC_EV(MIPS24K, REQUEST_COUNT)
#define PMC_EV_MIPS24K_FIRST PMC_EV_MIPS24K_CYCLE
#define PMC_EV_MIPS24K_LAST PMC_EV_MIPS24K_WBB_FULL_PIPELINE_STALLS
/*
* MIPS74k events. Similar to MIPS24k, the arrangement
* is (0,2) then (1,3) events.
*/
#define __PMC_EV_MIPS74K() \
__PMC_EV(MIPS74K, CYCLES) \
__PMC_EV(MIPS74K, INSTR_EXECUTED) \
__PMC_EV(MIPS74K, PREDICTED_JR_31) \
__PMC_EV(MIPS74K, JR_31_MISPREDICTIONS) \
__PMC_EV(MIPS74K, REDIRECT_STALLS) \
__PMC_EV(MIPS74K, JR_31_NO_PREDICTIONS) \
__PMC_EV(MIPS74K, ITLB_ACCESSES) \
__PMC_EV(MIPS74K, ITLB_MISSES) \
__PMC_EV(MIPS74K, JTLB_INSN_MISSES) \
__PMC_EV(MIPS74K, ICACHE_ACCESSES) \
__PMC_EV(MIPS74K, ICACHE_MISSES) \
__PMC_EV(MIPS74K, ICACHE_MISS_STALLS) \
__PMC_EV(MIPS74K, UNCACHED_IFETCH_STALLS) \
__PMC_EV(MIPS74K, PDTRACE_BACK_STALLS) \
__PMC_EV(MIPS74K, IFU_REPLAYS) \
__PMC_EV(MIPS74K, KILLED_FETCH_SLOTS) \
__PMC_EV(MIPS74K, IFU_IDU_MISS_PRED_UPSTREAM_CYCLES) \
__PMC_EV(MIPS74K, IFU_IDU_NO_FETCH_CYCLES) \
__PMC_EV(MIPS74K, IFU_IDU_CLOGED_DOWNSTREAM_CYCLES) \
__PMC_EV(MIPS74K, DDQ0_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, DDQ1_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, ALCB_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, AGCB_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, CLDQ_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, IODQ_FULL_DR_STALLS) \
__PMC_EV(MIPS74K, ALU_EMPTY_CYCLES) \
__PMC_EV(MIPS74K, AGEN_EMPTY_CYCLES) \
__PMC_EV(MIPS74K, ALU_OPERANDS_NOT_READY_CYCLES) \
__PMC_EV(MIPS74K, AGEN_OPERANDS_NOT_READY_CYCLES) \
__PMC_EV(MIPS74K, ALU_NO_ISSUES_CYCLES) \
__PMC_EV(MIPS74K, AGEN_NO_ISSUES_CYCLES) \
__PMC_EV(MIPS74K, ALU_BUBBLE_CYCLES) \
__PMC_EV(MIPS74K, AGEN_BUBBLE_CYCLES) \
__PMC_EV(MIPS74K, SINGLE_ISSUE_CYCLES) \
__PMC_EV(MIPS74K, DUAL_ISSUE_CYCLES) \
__PMC_EV(MIPS74K, OOO_ALU_ISSUE_CYCLES) \
__PMC_EV(MIPS74K, OOO_AGEN_ISSUE_CYCLES) \
__PMC_EV(MIPS74K, JALR_JALR_HB_INSNS) \
__PMC_EV(MIPS74K, DCACHE_LINE_REFILL_REQUESTS) \
__PMC_EV(MIPS74K, DCACHE_LOAD_ACCESSES) \
__PMC_EV(MIPS74K, DCACHE_ACCESSES) \
__PMC_EV(MIPS74K, DCACHE_WRITEBACKS) \
__PMC_EV(MIPS74K, DCACHE_MISSES) \
__PMC_EV(MIPS74K, JTLB_DATA_ACCESSES) \
__PMC_EV(MIPS74K, JTLB_DATA_MISSES) \
__PMC_EV(MIPS74K, LOAD_STORE_REPLAYS) \
__PMC_EV(MIPS74K, VA_TRANSALTION_CORNER_CASES) \
__PMC_EV(MIPS74K, LOAD_STORE_BLOCKED_CYCLES) \
__PMC_EV(MIPS74K, LOAD_STORE_NO_FILL_REQUESTS) \
__PMC_EV(MIPS74K, L2_CACHE_WRITEBACKS) \
__PMC_EV(MIPS74K, L2_CACHE_ACCESSES) \
__PMC_EV(MIPS74K, L2_CACHE_MISSES) \
__PMC_EV(MIPS74K, L2_CACHE_MISS_CYCLES) \
__PMC_EV(MIPS74K, FSB_FULL_STALLS) \
__PMC_EV(MIPS74K, FSB_OVER_50_FULL) \
__PMC_EV(MIPS74K, LDQ_FULL_STALLS) \
__PMC_EV(MIPS74K, LDQ_OVER_50_FULL) \
__PMC_EV(MIPS74K, WBB_FULL_STALLS) \
__PMC_EV(MIPS74K, WBB_OVER_50_FULL) \
__PMC_EV(MIPS74K, LOAD_MISS_CONSUMER_REPLAYS) \
__PMC_EV(MIPS74K, CP1_CP2_LOAD_INSNS) \
__PMC_EV(MIPS74K, JR_NON_31_INSNS) \
__PMC_EV(MIPS74K, MISPREDICTED_JR_31_INSNS) \
__PMC_EV(MIPS74K, BRANCH_INSNS) \
__PMC_EV(MIPS74K, CP1_CP2_COND_BRANCH_INSNS) \
__PMC_EV(MIPS74K, BRANCH_LIKELY_INSNS) \
__PMC_EV(MIPS74K, MISPREDICTED_BRANCH_LIKELY_INSNS) \
__PMC_EV(MIPS74K, COND_BRANCH_INSNS) \
__PMC_EV(MIPS74K, MISPREDICTED_BRANCH_INSNS) \
__PMC_EV(MIPS74K, INTEGER_INSNS) \
__PMC_EV(MIPS74K, FPU_INSNS) \
__PMC_EV(MIPS74K, LOAD_INSNS) \
__PMC_EV(MIPS74K, STORE_INSNS) \
__PMC_EV(MIPS74K, J_JAL_INSNS) \
__PMC_EV(MIPS74K, MIPS16_INSNS) \
__PMC_EV(MIPS74K, NOP_INSNS) \
__PMC_EV(MIPS74K, NT_MUL_DIV_INSNS) \
__PMC_EV(MIPS74K, DSP_INSNS) \
__PMC_EV(MIPS74K, ALU_DSP_SATURATION_INSNS) \
__PMC_EV(MIPS74K, DSP_BRANCH_INSNS) \
__PMC_EV(MIPS74K, MDU_DSP_SATURATION_INSNS) \
__PMC_EV(MIPS74K, UNCACHED_LOAD_INSNS) \
__PMC_EV(MIPS74K, UNCACHED_STORE_INSNS) \
__PMC_EV(MIPS74K, EJTAG_INSN_TRIGGERS) \
__PMC_EV(MIPS74K, CP1_BRANCH_MISPREDICTIONS) \
__PMC_EV(MIPS74K, SC_INSNS) \
__PMC_EV(MIPS74K, FAILED_SC_INSNS) \
__PMC_EV(MIPS74K, PREFETCH_INSNS) \
__PMC_EV(MIPS74K, CACHE_HIT_PREFETCH_INSNS) \
__PMC_EV(MIPS74K, NO_INSN_CYCLES) \
__PMC_EV(MIPS74K, LOAD_MISS_INSNS) \
__PMC_EV(MIPS74K, ONE_INSN_CYCLES) \
__PMC_EV(MIPS74K, TWO_INSNS_CYCLES) \
__PMC_EV(MIPS74K, GFIFO_BLOCKED_CYCLES) \
__PMC_EV(MIPS74K, CP1_CP2_STORE_INSNS) \
__PMC_EV(MIPS74K, MISPREDICTION_STALLS) \
__PMC_EV(MIPS74K, MISPREDICTED_BRANCH_INSNS_CYCLES) \
__PMC_EV(MIPS74K, EXCEPTIONS_TAKEN) \
__PMC_EV(MIPS74K, GRADUATION_REPLAYS) \
__PMC_EV(MIPS74K, COREEXTEND_EVENTS) \
__PMC_EV(MIPS74K, ISPRAM_EVENTS) \
__PMC_EV(MIPS74K, DSPRAM_EVENTS) \
__PMC_EV(MIPS74K, L2_CACHE_SINGLE_BIT_ERRORS) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_0) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_1) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_2) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_3) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_4) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_5) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_6) \
__PMC_EV(MIPS74K, SYSTEM_EVENT_7) \
__PMC_EV(MIPS74K, OCP_ALL_REQUESTS) \
__PMC_EV(MIPS74K, OCP_ALL_CACHEABLE_REQUESTS) \
__PMC_EV(MIPS74K, OCP_READ_REQUESTS) \
__PMC_EV(MIPS74K, OCP_READ_CACHEABLE_REQUESTS) \
__PMC_EV(MIPS74K, OCP_WRITE_REQUESTS) \
__PMC_EV(MIPS74K, OCP_WRITE_CACHEABLE_REQUESTS) \
__PMC_EV(MIPS74K, FSB_LESS_25_FULL) \
__PMC_EV(MIPS74K, FSB_25_50_FULL) \
__PMC_EV(MIPS74K, LDQ_LESS_25_FULL) \
__PMC_EV(MIPS74K, LDQ_25_50_FULL) \
__PMC_EV(MIPS74K, WBB_LESS_25_FULL) \
__PMC_EV(MIPS74K, WBB_25_50_FULL)
#define PMC_EV_MIPS74K_FIRST PMC_EV_MIPS74K_CYCLES
#define PMC_EV_MIPS74K_LAST PMC_EV_MIPS74K_WBB_25_50_FULL
#define __PMC_EV_BERI() \
__PMC_EV(BERI, CYCLE) \
__PMC_EV(BERI, INST) \
__PMC_EV(BERI, INST_USER) \
__PMC_EV(BERI, INST_KERNEL) \
__PMC_EV(BERI, IMPRECISE_SETBOUNDS) \
__PMC_EV(BERI, UNREPRESENTABLE_CAPS) \
__PMC_EV(BERI, ITLB_MISS) \
__PMC_EV(BERI, DTLB_MISS) \
__PMC_EV(BERI, ICACHE_WRITE_HIT) \
__PMC_EV(BERI, ICACHE_WRITE_MISS) \
__PMC_EV(BERI, ICACHE_READ_HIT) \
__PMC_EV(BERI, ICACHE_READ_MISS) \
__PMC_EV(BERI, ICACHE_EVICT) \
__PMC_EV(BERI, DCACHE_WRITE_HIT) \
__PMC_EV(BERI, DCACHE_WRITE_MISS) \
__PMC_EV(BERI, DCACHE_READ_HIT) \
__PMC_EV(BERI, DCACHE_READ_MISS) \
__PMC_EV(BERI, DCACHE_EVICT) \
__PMC_EV(BERI, DCACHE_SET_TAG_WRITE) \
__PMC_EV(BERI, DCACHE_SET_TAG_READ) \
__PMC_EV(BERI, L2CACHE_WRITE_HIT) \
__PMC_EV(BERI, L2CACHE_WRITE_MISS) \
__PMC_EV(BERI, L2CACHE_READ_HIT) \
__PMC_EV(BERI, L2CACHE_READ_MISS) \
__PMC_EV(BERI, L2CACHE_EVICT) \
__PMC_EV(BERI, L2CACHE_SET_TAG_WRITE) \
__PMC_EV(BERI, L2CACHE_SET_TAG_READ) \
__PMC_EV(BERI, MEM_BYTE_READ) \
__PMC_EV(BERI, MEM_BYTE_WRITE) \
__PMC_EV(BERI, MEM_HWORD_READ) \
__PMC_EV(BERI, MEM_HWORD_WRITE) \
__PMC_EV(BERI, MEM_WORD_READ) \
__PMC_EV(BERI, MEM_WORD_WRITE) \
__PMC_EV(BERI, MEM_DWORD_READ) \
__PMC_EV(BERI, MEM_DWORD_WRITE) \
__PMC_EV(BERI, MEM_CAP_READ) \
__PMC_EV(BERI, MEM_CAP_WRITE) \
__PMC_EV(BERI, MEM_CAP_READ_TAG_SET) \
__PMC_EV(BERI, MEM_CAP_WRITE_TAG_SET) \
__PMC_EV(BERI, TAGCACHE_WRITE_HIT) \
__PMC_EV(BERI, TAGCACHE_WRITE_MISS) \
__PMC_EV(BERI, TAGCACHE_READ_HIT) \
__PMC_EV(BERI, TAGCACHE_READ_MISS) \
__PMC_EV(BERI, TAGCACHE_EVICT) \
__PMC_EV(BERI, L2CACHEMASTER_READ_REQ) \
__PMC_EV(BERI, L2CACHEMASTER_WRITE_REQ) \
__PMC_EV(BERI, L2CACHEMASTER_WRITE_REQ_FLIT) \
__PMC_EV(BERI, L2CACHEMASTER_READ_RSP) \
__PMC_EV(BERI, L2CACHEMASTER_READ_RSP_FLIT) \
__PMC_EV(BERI, L2CACHEMASTER_WRITE_RSP) \
__PMC_EV(BERI, TAGCACHEMASTER_READ_REQ) \
__PMC_EV(BERI, TAGCACHEMASTER_WRITE_REQ) \
__PMC_EV(BERI, TAGCACHEMASTER_WRITE_REQ_FLIT) \
__PMC_EV(BERI, TAGCACHEMASTER_READ_RSP) \
__PMC_EV(BERI, TAGCACHEMASTER_READ_RSP_FLIT) \
__PMC_EV(BERI, TAGCACHEMASTER_WRITE_RSP)
#define PMC_EV_BERI_FIRST PMC_EV_BERI_CYCLE
#define PMC_EV_BERI_LAST PMC_EV_BERI_TAGCACHEMASTER_WRITE_RSP
/*
* Cavium Octeon counters. Obtained from cvmx-core.h
*/
#define __PMC_EV_OCTEON() \
__PMC_EV(OCTEON, CLK) \
__PMC_EV(OCTEON, ISSUE) \
__PMC_EV(OCTEON, RET) \
__PMC_EV(OCTEON, NISSUE) \
__PMC_EV(OCTEON, SISSUE) \
__PMC_EV(OCTEON, DISSUE) \
__PMC_EV(OCTEON, IFI) \
__PMC_EV(OCTEON, BR) \
__PMC_EV(OCTEON, BRMIS) \
__PMC_EV(OCTEON, J) \
__PMC_EV(OCTEON, JMIS) \
__PMC_EV(OCTEON, REPLAY) \
__PMC_EV(OCTEON, IUNA) \
__PMC_EV(OCTEON, TRAP) \
__PMC_EV(OCTEON, UULOAD) \
__PMC_EV(OCTEON, UUSTORE) \
__PMC_EV(OCTEON, ULOAD) \
__PMC_EV(OCTEON, USTORE) \
__PMC_EV(OCTEON, EC) \
__PMC_EV(OCTEON, MC) \
__PMC_EV(OCTEON, CC) \
__PMC_EV(OCTEON, CSRC) \
__PMC_EV(OCTEON, CFETCH) \
__PMC_EV(OCTEON, CPREF) \
__PMC_EV(OCTEON, ICA) \
__PMC_EV(OCTEON, II) \
__PMC_EV(OCTEON, IP) \
__PMC_EV(OCTEON, CIMISS) \
__PMC_EV(OCTEON, WBUF) \
__PMC_EV(OCTEON, WDAT) \
__PMC_EV(OCTEON, WBUFLD) \
__PMC_EV(OCTEON, WBUFFL) \
__PMC_EV(OCTEON, WBUFTR) \
__PMC_EV(OCTEON, BADD) \
__PMC_EV(OCTEON, BADDL2) \
__PMC_EV(OCTEON, BFILL) \
__PMC_EV(OCTEON, DDIDS) \
__PMC_EV(OCTEON, IDIDS) \
__PMC_EV(OCTEON, DIDNA) \
__PMC_EV(OCTEON, LDS) \
__PMC_EV(OCTEON, LMLDS) \
__PMC_EV(OCTEON, IOLDS) \
__PMC_EV(OCTEON, DMLDS) \
__PMC_EV(OCTEON, STS) \
__PMC_EV(OCTEON, LMSTS) \
__PMC_EV(OCTEON, IOSTS) \
__PMC_EV(OCTEON, IOBDMA) \
__PMC_EV(OCTEON, DTLB) \
__PMC_EV(OCTEON, DTLBAD) \
__PMC_EV(OCTEON, ITLB) \
__PMC_EV(OCTEON, SYNC) \
__PMC_EV(OCTEON, SYNCIOB) \
__PMC_EV(OCTEON, SYNCW)
#define PMC_EV_OCTEON_FIRST PMC_EV_OCTEON_CLK
#define PMC_EV_OCTEON_LAST PMC_EV_OCTEON_SYNCW
#define __PMC_EV_PPC7450() \
__PMC_EV(PPC7450, CYCLE) \
__PMC_EV(PPC7450, INSTR_COMPLETED) \
@ -1822,10 +1468,10 @@ __PMC_EV_ALIAS("unhalted-core-cycles", IAP_ARCH_UNH_COR_CYC)
* 0x11080 0x0080 INTEL Pentium MMX events
* 0x11100 0x0100 INTEL Pentium Pro/P-II/P-III/Pentium-M events
* 0x11200 0x00FF free (was INTEL XScale events)
* 0x11300 0x00FF MIPS 24K events
* 0x11400 0x00FF Octeon events
* 0x11500 0x00FF MIPS 74K events
* 0x11600 0x00FF BERI statcounters
* 0x11300 0x00FF free (was MIPS 24K events)
* 0x11400 0x00FF free (was Octeon events)
* 0x11500 0x00FF free (was MIPS 74K events)
* 0x11600 0x00FF free (was BERI statcounters)
* 0x13000 0x00FF MPC7450 events
* 0x13100 0x00FF IBM PPC970 events
* 0x13200 0x00FF free (was IBM POWER8 events)
@ -1843,14 +1489,6 @@ __PMC_EV_ALIAS("unhalted-core-cycles", IAP_ARCH_UNH_COR_CYC)
__PMC_EV_K7() \
__PMC_EV_BLOCK(K8, 0x2080) \
__PMC_EV_K8() \
__PMC_EV_BLOCK(MIPS24K, 0x11300) \
__PMC_EV_MIPS24K() \
__PMC_EV_BLOCK(OCTEON, 0x11400) \
__PMC_EV_OCTEON() \
__PMC_EV_BLOCK(MIPS74K, 0x11500) \
__PMC_EV_MIPS74K() \
__PMC_EV_BLOCK(BERI, 0x11600) \
__PMC_EV_BERI() \
__PMC_EV_BLOCK(UCP, 0x12080) \
__PMC_EV_UCP() \
__PMC_EV_BLOCK(PPC7450, 0x13000) \