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- Fix a bug where the faulting address for an mmu miss could sometimes be

clobbered due to some debug code.  This was harmless and just superfluous
  soft faults.
- Update some comments.
This commit is contained in:
Jake Burkholder 2002-12-23 02:18:45 +00:00
parent 950002bf92
commit dcedf26597
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=108195

View File

@ -1334,7 +1334,7 @@ END(tl1_immu_miss_trap)
/*
* Extract the context from the contents of the tag access register.
* If its non-zero this is a fault on a user address. Note that the
* faulting address is passed in %g2.
* faulting address is passed in %g1.
*/
sllx %g5, 64 - TAR_VPN_SHIFT, %g6
brnz,a,pn %g6, tl1_dmmu_miss_user
@ -1430,10 +1430,10 @@ ENTRY(tl1_dmmu_miss_trap)
*/
wrpr %g0, PSTATE_ALT, %pstate
KSTACK_CHECK
ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
KSTACK_CHECK
tl1_split
clr %o1
set trap, %o2
@ -1524,8 +1524,8 @@ ENTRY(tl1_dmmu_prot_1)
/*
* Extract the context from the contents of the tag access register.
* If its non-zero this is a fault on a user address, otherwise get
* the virtual page number.
* If its non-zero this is a fault on a user address. Note that the
* faulting address is passed in %g1.
*/
sllx %g5, 64 - TAR_VPN_SHIFT, %g6
brnz,a,pn %g6, tl1_dmmu_prot_user