wrong, since we don't want the variable changed, but since we assign
it to variables that may also refer to other non-const strings,
warnings were generated that could break LINT.
Approved by: re
Spotted by: sam
The correct range is [1...7] with Sunday=1, but we have been writing
[0...6] with Sunday=0.
The Soekris computers flagged the zero, zapped the date, so if you
rebooted your soekris on a sunday, it would come up with a wrong
date.
Bruce has a more extensive rework of this code, but we will stick with
the minimalist fix for now.
Spotted by: Soren Kristensen <soren@soekris.com>
Thanks to: Michael Sierchio <kudzu@tenebras.com>.
Confirmed by: bde
Approved by: re
This mostly consists of functionality to serialize accesses to
the two ATA channels (which can also be used to "fix" certain
PCI based controllers).
Add support for Acard controllers.
Enable the ATA driver in PC98 GENERIC, and add device hints.
Update man page with latest support.
The PC98 core team has kindly provided me with a PC98
machine that made this all possible, thanks to all that
contributed to that effort, without that this would
probably newer have been possible..
Approved by: re@
previously allocated block as the previous use of the block may
have fallen out of the cache. Failure to reread its contents cause
zeroed results to be written instead of the proper contents.
Conversely, when the block is going to be entirely filled in, it
is not necessary reread the old contents.
Sponsored by: DARPA & NAI Labs.
Approved by: re
We allow the request to go through if it matches either a prefetchable
or a non-prefetchable part of the bridge. We do not check to make
sure it is the right kind of memory because most drivers to not yet
properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not
entirely sure it does it right). RF_PREFETCHABLE was invented for
cardbus, so hasn't been properly documented yet.
This is still overridable by hw.pci.allow_unsupported_io_ranges, but
the need for that is greatly reduced, especially for the nvida driver.
Approved by: re
Reviewed by: jhb and many testers
Submitted by: Matt Emmerton (although this has been reworked somewhat)
could already exist, and this triggers a booby trap panic in make_dev.
remove_plex_entry: Don't remove the stripe mutex here, it gets done in
free_plex.
Approved by: re (rwatson)
to accomodate the new SSE/XMM floating point save/restore
instructions.
This commit is mostly from bde and includes some style nits.
Approved by: re (jhb)
import, as it breaks the relocation kernel modules built with the new
binutils.
Note that this, together with the binutils import, marks a kernel module
flag day on sparc64: modules built with the old binutils will not work
with new kernels and vice versa. Mismatches will result in panics.
Approved by: re
pmap_remove_pte(). Use vm_page_sleep_if_busy() in
_pmap_unwire_pte_hold() so that the page queues lock is released
when sleeping.
Approved by: re (blanket)
register to the one of the processor doing the interrupt setup. This
is required since this field is preinitialized to 0, but there exist
machines which have no processor with a MID of 0 (e.g. e450s with 1 or 2
processors).
Add some more macros for handle the interrupt mapping registers, and
rename some existing ones for consistency.
Approved by: re
are nevers used for PCI interrupts, but can cause false matches since
they are fully programmable.
2.) Skip the mapping registers for slot a2 and a3 on "psycho" bridges,
since they are not present there. Again, this could cause false matches,
which would result in the interrupt being delivered at most once.
Submitted by: jake (2)
Approved by: re
this is now done on all machines except for some known problematic ones.
Add an additional guard to make sure that the interrupt numbers are
in the correct range before swizzling. This should catch any remaining
models for which the swizzle is inappropriate.
Correct the swizzle calculation to account for the fact that the parent
interrupt numbers to be swizzled are 1-based.
Approved by: re
are the output of AES/128/CBC or ARC4RANDOM. Encrypt the random data with which
we wipe when we get a BIO_DELETE to make such an algorithm useful.
Sponsored by: DARPA & NAI Labs
Approved by: re (blanket)
the device is not actually present), clear the corresponding bit in
the ch->devices bitmap. This resolves a panic that occurred with ATAPI/CAM
after an APM suspend/resume, when the ATA hardware would erroneously
report an extra ATAPI device.
Approved by: re, sos
Reviewed by: roberto
MFC after: 7 days
version, plus add support for the new features found in the Rev B
version of the chip. The changelog is quite long and can be provided
on request. Major features include vastly improved protocol violation
handling, full support for the 7902 Rev B, better parity error
handling, and better packetized overrun handling, to name a few.
Approved by: re (blanket)
HP -> CPQ
Rearrange IDs to better match which chips they use.
Convert to uniform product description strings.
Simplify 7901A setup function.
Add the NONPACKFIFO_BUG and PACED_NEGTABLE_BUG entries
for the A.
Add rev B bugs and features.
The double write workaround for CURRSCB is only required if
abort pending is set. Remove this work around and set the
abort pending bug bit on the B at least until we have better
confirmation that the double write is always safe.
Add updated H2B identifiers
Move IOCell paramters into softc and add a hook for the
OSM to modify these as well as other settings prior to
committing them to the chip.
SLEW -> SLEWRATE
PREQDIS in DEVCONFIG1 went away after the A2.
Remove all code that references this bit. This
is especially important since this bit was reused
in the B for a different HW fix workaround.
Properly set the AHD_NEW_IOCELL_OPTS and
AHD_NEW_DFCNTRL_OPTS features for the B.
Remove stray/random extra 7901A generic PCI
table entry. Also switch the correct 7901A
generic entry to use ID_ALL_MASK since we
can only differentiate the 7901A from the
7902 by checking for a "type field" of 0xE.
Set AHD_INTCOLLISIONT_BUG for the Rev B.
Set the PREQDIS bit in DEVCONFIG1 for the B. The
bit is misnamed, but seems to disable a work-around
that breaks on the B on PCI busses.
Add a routine for testing memory mapped register access.
This will hopefully detect things like buggy via chipsets
so that the OSM can fallback to using I/O mapped access
when memory mapped I/O simply will not work.
Approved by: re (blanket)
diagnostic "Setting Mode" messages.
Use a read of HCNTRL to flush our write to CLRCMDCMPLT
on the RevB. This allows us to check to see if the sequencer
is paused and to initiate the interrupt collision workaround
without incuring an extra read.
Approved by: re (blanket)
PCI-X only workarounds are automatically masked out
if we are operating in PCI mode.
Make use of ahd_pci_test_register_access()
Approved by: re (blanket)
Move IOCell paramters into softc and add a hook for the
OSM to modify these as well as other settings prior to
committing them to the chip.
Approved by: re (blanket)
in the per-device kthread. This ensures that synchronisation with
mddestroy() succeeds even if the kthread was not waiting in tsleep()
at the time of the wakeup(). Among other things, this fixes the
problem of mdconfig getting stuck when an attempt is made to use a
zero-length file as a vnode-type backing store.
Approved by: re
aic7xxx.c:
aic7xxx.h:
aic7xxx.reg:
aic7xxx.seq:
Bring in the protocol violation handler from the U320
driver and replace the NO_IDENT sequencer interrupt code
with the PROTO_VIOLATION code. Support for this code
required the following changes:
SEQ_FLAGS:
IDENTIFY_SEEN -> NOT_IDENTIFIED
Added NO_CDB_SENT
SCB_CONTROL:
TARGET_SCB == STATUS_RCVD for initiator mode
scb->flags:
Added SCB_TARGET_SCB since we cannot rely on
TARGET_SCB as a target/initiator differentiator
due to it being overloaded in initiator mode to
indicate that status has been received.
aic7xxx.seq:
Move data fifo CLRCHN to mesgin_rdptrs which is a safer
location for doing this operation. This also saves a
sequencer instruction.
aic7xxx.c:
aic7xxx.h:
Change ahc/ahd_upate_neg_request() to take a "negotiation
type" enum that allows us to negotiate:
o only if the goal and current parameters differ.
o only if the goal is non-async
o always - even if the negotiation will be for async.
aic7xxx.seq:
Reset the FIFO whenever a short CDB transfer occurs
so that the FIFO contents do not corrupt a future CDB
transfer retry.
Add support for catching the various protocol violations
handled by ahc_handle_protocol_violation.
Reformat some comments.
aic7xxx.c:
aic7xxx.h:
Just for safety, have the aic7xxx driver probe
the stack depth.
aic7xxx.c:
aic7xxx.h:
Save and restore stack contents during diagnostics.
Some chip variants overwrite stale entries on a
stack "pop".
Don't use 0 to probe the stack depth. 0 is the typical
value used to backfill the stack if entries are overwritten
on a "pop".
aic7xxx.h:
Add a missing typedef.
Collapse SCB flag entries so they are bit contiguous.
Add AHD_ULTRA2_XFER_PERIOD for narrow fallback calculations
aic7xxx.c:
Don't panic (as a diagnostic to catch bugs) if we decided to
force the renegotiation of async even if we believe we are
already async. This should allow us to negotiate async instead
of the full user goal rate during startup if bus resets are
disabled.
Add a space to the end of the ahc/ahd_print_devinfo routines
so that it behaves as expected by the code that uses it.
Only force a renegotiation on a selection timeout
if the SCB was valid. Doing otherwise may be dangerous
as the connection was not valid for an unknown reason.
Add additional diagnostic output to ahc_dump_card_state(),
and have it use the register pretty printing functions.
Update ahc_reg_print() to handle a NULL cur_col.
Add a newline to ahc_dump_card_state() output.
Bring back "use_ppr". We need to use_ppr anytime
doppr is true or we have non-zero protocol options.
The later case was not handled in the recent removal
of use_ppr.
Move a comment and remove a useless clearing of use_ppr.
Don't disable ENBUSFREE when single stepping on
a DT capable controller. We cannot re-enable unexpected
busfree detection, so we must clear BUSFREE on each
step instead.
Correct the lookup of the SCB ID in ahc_handle_proto_error.
Remove a diagnostic printf.
Remove unecessary restoration of the STACK for older
chips.
Approved by: re (blanket)
This will hopefully detect things like buggy via chipsets
so that the OSM can fallback to using I/O mapped access
when memory mapped I/O simply will not work.
Approved by: re (blanket)
AHC_ALLOW_MEMIO is set, or the hint hint.ahc.N.allow_memio=1 is
set in the bootloader.
Make use of ah?_pci_test_register_access().
Approved by: re (blanket)
