Konstantin Belousov 3c700e2e4c Enhance qpi.c to make it usable on all Core-microarchitecture Xeons. ... Scan all buses for CSR bus, not stopping on the first failed match. Scan all slots for function 0 on the found bus, for instance on IvyBridge the slot 0 is not decoded at all. Since the scan is quite unsafe, and access to the buses is mostly useful for developers, enable the csr buses scan with the tunable. Current qpi.c makes too many assumptions about the uncore configuration buses location and about slots occupied. Also it restricts itself only to Nehalem CPUs. It is needed on all Core-based Xeons. On the 2600 v2 (IvyBridge) machine I have access to, the CSR buses have numbers 31 (BSP socket) and 63 (second socket), and there is no functions pci0.31.0.0 or pci0.63.0.0. According to the CPU datasheet, all devices on the uncore bus occupy slots >= 8. Practically, the attach to config buses is required for the intel-pcm pcm-memory.x tool to work, for instance. Reviewed by: jhb (previous version) Sponsored by: Mellanox Technologies MFC after: 1 week Differential revision: https://reviews.freebsd.org/D12268		2017-09-08 19:51:03 +00:00
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acpica	acpi/srat: zero the SRAT cpu array	2017-09-04 10:08:42 +00:00
bios
cpufreq	cpufreq(4) hwpstate: Yield CPU awaiting frequency change	2017-09-07 20:20:12 +00:00
include	Add an ioapic_get_rid() function to obtain PCIe TLP requester-id for	2017-09-08 19:39:20 +00:00
iommu	Use IOAPIC PCI rid as the interrupt TLP source id for DMAR interrupt	2017-09-08 19:45:37 +00:00
isa	Stop calling atrtc_set() from the xen timer clock_settime() method. That	2017-08-11 19:02:11 +00:00
pci	Enhance qpi.c to make it usable on all Core-microarchitecture Xeons.	2017-09-08 19:51:03 +00:00
x86	Add an ioapic_get_rid() function to obtain PCIe TLP requester-id for	2017-09-08 19:39:20 +00:00
xen	apic_enumerator: only set mp_ncpus and mp_maxid at probe cpus phase	2017-08-10 09:15:18 +00:00