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ce4946daa5
and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
476 lines
12 KiB
C
476 lines
12 KiB
C
/*
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* Copyright (c) 2001 Wind River Systems
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* Copyright (c) 2001
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* Bill Paul <wpaul@bsdi.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Driver for the National Semiconductor DP83891 and DP83861
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* 10/100/1000 PHYs.
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* Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
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*
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* The DP83891 is the older NatSemi gigE PHY which isn't being sold
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* anymore. The DP83861 is its replacement, which is an 'enhanced'
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* firmware driven component. The major difference between the
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* two is that the 83891 can't generate interrupts, while the
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* 83861 can. (I think it wasn't originally designed to do this, but
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* it can now thanks to firmware updates.) The 83861 also allows
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* access to its internal RAM via indirect register access.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/socket.h>
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#include <sys/bus.h>
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#include <machine/clock.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/nsgphyreg.h>
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#include "miibus_if.h"
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#if !defined(lint)
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static const char rcsid[] =
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"$FreeBSD$";
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#endif
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static int nsgphy_probe __P((device_t));
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static int nsgphy_attach __P((device_t));
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static int nsgphy_detach __P((device_t));
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static device_method_t nsgphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, nsgphy_probe),
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DEVMETHOD(device_attach, nsgphy_attach),
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DEVMETHOD(device_detach, nsgphy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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{ 0, 0 }
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};
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static devclass_t nsgphy_devclass;
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static driver_t nsgphy_driver = {
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"nsgphy",
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nsgphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
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int nsgphy_service __P((struct mii_softc *, struct mii_data *, int));
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void nsgphy_status __P((struct mii_softc *));
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static int nsgphy_mii_phy_auto __P((struct mii_softc *, int));
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extern void mii_phy_auto_timeout __P((void *));
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static int nsgphy_probe(dev)
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device_t dev;
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{
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struct mii_attach_args *ma;
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ma = device_get_ivars(dev);
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if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI) {
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if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83891) {
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device_set_desc(dev, MII_STR_NATSEMI_DP83891);
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return(0);
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}
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if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83861) {
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device_set_desc(dev, MII_STR_NATSEMI_DP83861);
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return(0);
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}
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}
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return(ENXIO);
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}
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static int nsgphy_attach(dev)
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device_t dev;
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{
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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const char *sep = "";
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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sc->mii_dev = device_get_parent(dev);
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mii = device_get_softc(sc->mii_dev);
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LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_service = nsgphy_service;
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sc->mii_pdata = mii;
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sc->mii_flags |= MIIF_NOISOLATE;
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mii->mii_instance++;
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#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
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#define PRINT(s) printf("%s%s", sep, s); sep = ", "
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
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BMCR_ISO);
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#if 0
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
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BMCR_LOOP|BMCR_S100);
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#endif
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mii_phy_reset(sc);
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device_printf(dev, " ");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst),
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NSGPHY_S1000|NSGPHY_BMCR_FDX);
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PRINT("1000baseTX-FDX");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst),
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NSGPHY_S1000);
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PRINT("1000baseTX");
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sc->mii_capabilities =
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(PHY_READ(sc, MII_BMSR) |
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(BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
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NSGPHY_S100|NSGPHY_BMCR_FDX);
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PRINT("100baseTX-FDX");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), NSGPHY_S100);
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PRINT("100baseTX");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
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NSGPHY_S10|NSGPHY_BMCR_FDX);
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PRINT("10baseT-FDX");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), NSGPHY_S10);
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PRINT("10baseT");
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
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PRINT("auto");
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printf("\n");
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#undef ADD
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#undef PRINT
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return(0);
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}
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static int nsgphy_detach(dev)
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device_t dev;
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{
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struct mii_softc *sc;
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struct mii_data *mii;
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sc = device_get_softc(dev);
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mii = device_get_softc(device_get_parent(dev));
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if (sc->mii_flags & MIIF_DOINGAUTO)
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untimeout(mii_phy_auto_timeout, sc, sc->mii_auto_ch);
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sc->mii_dev = NULL;
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LIST_REMOVE(sc, mii_list);
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return(0);
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}
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int
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nsgphy_service(sc, mii, cmd)
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struct mii_softc *sc;
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struct mii_data *mii;
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int cmd;
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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reg = PHY_READ(sc, MII_BMCR);
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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return (0);
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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#ifdef foo
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/*
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* If we're already in auto mode, just return.
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*/
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if (PHY_READ(sc, NSGPHY_MII_BMCR) & NSGPHY_BMCR_AUTOEN)
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return (0);
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#endif
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(void) nsgphy_mii_phy_auto(sc, 0);
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break;
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case IFM_1000_TX:
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
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PHY_WRITE(sc, NSGPHY_MII_BMCR,
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NSGPHY_BMCR_FDX|NSGPHY_BMCR_SPD1);
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} else {
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PHY_WRITE(sc, NSGPHY_MII_BMCR,
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NSGPHY_BMCR_SPD1);
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}
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PHY_WRITE(sc, NSGPHY_MII_ANAR, NSGPHY_SEL_TYPE);
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/*
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* When setting the link manually, one side must
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* be the master and the other the slave. However
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* ifmedia doesn't give us a good way to specify
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* this, so we fake it by using one of the LINK
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* flags. If LINK0 is set, we program the PHY to
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* be a master, otherwise it's a slave.
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*/
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if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
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PHY_WRITE(sc, NSGPHY_MII_1000CTL,
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NSGPHY_1000CTL_MSE|NSGPHY_1000CTL_MSC);
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} else {
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PHY_WRITE(sc, NSGPHY_MII_1000CTL,
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NSGPHY_1000CTL_MSE);
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}
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break;
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case IFM_100_T4:
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/*
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* XXX Not supported as a manual setting right now.
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*/
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return (EINVAL);
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case IFM_NONE:
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PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
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break;
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default:
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/*
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* BMCR data is stored in the ifmedia entry.
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*/
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PHY_WRITE(sc, MII_ANAR,
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mii_anar(ife->ifm_media));
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PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
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break;
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}
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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/*
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* Only used for autonegotiation.
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*/
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
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return (0);
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/*
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* Is the interface even up?
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return (0);
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/*
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* Only retry autonegotiation every 5 seconds.
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* Actually, for gigE PHYs, we should wait longer, since
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* 5 seconds is the mimimum time the documentation
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* says to wait for a 1000mbps link to be established.
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*/
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if (++sc->mii_ticks != 10)
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return (0);
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sc->mii_ticks = 0;
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/*
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* Check to see if we have link.
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*/
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reg = PHY_READ(sc, NSGPHY_MII_PHYSUP);
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if (reg & NSGPHY_PHYSUP_LNKSTS)
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break;
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mii_phy_reset(sc);
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if (nsgphy_mii_phy_auto(sc, 0) == EJUSTRETURN)
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return(0);
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break;
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}
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/* Update the media status. */
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nsgphy_status(sc);
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/* Callback if something changed. */
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if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
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MIIBUS_STATCHG(sc->mii_dev);
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sc->mii_active = mii->mii_media_active;
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}
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return (0);
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}
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void
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nsgphy_status(sc)
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struct mii_softc *sc;
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{
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struct mii_data *mii = sc->mii_pdata;
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int bmsr, bmcr, physup, anlpar, gstat;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, NSGPHY_MII_BMSR);
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physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
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if (physup & NSGPHY_PHYSUP_LNKSTS)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, NSGPHY_MII_BMCR);
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if (bmcr & NSGPHY_BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & NSGPHY_BMCR_AUTOEN) {
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if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR);
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gstat = PHY_READ(sc, NSGPHY_MII_1000STS);
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if (gstat & NSGPHY_1000STS_LPFD)
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mii->mii_media_active |= IFM_1000_TX|IFM_FDX;
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else if (gstat & NSGPHY_1000STS_LPHD)
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mii->mii_media_active |= IFM_1000_TX|IFM_HDX;
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else if (anlpar & NSGPHY_ANLPAR_100T4)
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mii->mii_media_active |= IFM_100_T4;
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else if (anlpar & NSGPHY_ANLPAR_100FDX)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (anlpar & NSGPHY_ANLPAR_100HDX)
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mii->mii_media_active |= IFM_100_TX;
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else if (anlpar & NSGPHY_ANLPAR_10FDX)
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mii->mii_media_active |= IFM_10_T|IFM_FDX;
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else if (anlpar & NSGPHY_ANLPAR_10HDX)
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mii->mii_media_active |= IFM_10_T|IFM_HDX;
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else
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) {
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case NSGPHY_S1000:
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mii->mii_media_active |= IFM_1000_TX;
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break;
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case NSGPHY_S100:
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mii->mii_media_active |= IFM_100_TX;
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break;
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case NSGPHY_S10:
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mii->mii_media_active |= IFM_10_T;
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break;
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default:
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break;
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}
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if (bmcr & NSGPHY_BMCR_FDX)
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mii->mii_media_active |= IFM_FDX;
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else
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mii->mii_media_active |= IFM_HDX;
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return;
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}
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static int
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nsgphy_mii_phy_auto(mii, waitfor)
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struct mii_softc *mii;
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int waitfor;
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{
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int bmsr, ktcr = 0, i;
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if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
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mii_phy_reset(mii);
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PHY_WRITE(mii, NSGPHY_MII_BMCR, 0);
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DELAY(1000);
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ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
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PHY_WRITE(mii, NSGPHY_MII_1000CTL, ktcr |
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(NSGPHY_1000CTL_AFD|NSGPHY_1000CTL_AHD));
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ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
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DELAY(1000);
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PHY_WRITE(mii, NSGPHY_MII_ANAR,
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BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
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DELAY(1000);
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PHY_WRITE(mii, NSGPHY_MII_BMCR,
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NSGPHY_BMCR_AUTOEN | NSGPHY_BMCR_STARTNEG);
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}
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if (waitfor) {
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/* Wait 500ms for it to complete. */
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for (i = 0; i < 500; i++) {
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if ((bmsr = PHY_READ(mii, NSGPHY_MII_BMSR)) &
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NSGPHY_BMSR_ACOMP)
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return (0);
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DELAY(1000);
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#if 0
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if ((bmsr & BMSR_ACOMP) == 0)
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printf("%s: autonegotiation failed to complete\n",
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|
mii->mii_dev.dv_xname);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Don't need to worry about clearing MIIF_DOINGAUTO.
|
|
* If that's set, a timeout is pending, and it will
|
|
* clear the flag.
|
|
*/
|
|
return (EIO);
|
|
}
|
|
|
|
/*
|
|
* Just let it finish asynchronously. This is for the benefit of
|
|
* the tick handler driving autonegotiation. Don't want 500ms
|
|
* delays all the time while the system is running!
|
|
*/
|
|
if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
|
|
mii->mii_flags |= MIIF_DOINGAUTO;
|
|
mii->mii_auto_ch = timeout(mii_phy_auto_timeout, mii, hz >> 1);
|
|
}
|
|
return (EJUSTRETURN);
|
|
}
|