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dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
199 lines
5.6 KiB
C
199 lines
5.6 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* This is file defines ASM primitives for sim magic functions.
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* <hr>$Revision: 70030 $<hr>
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*
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*
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*/
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#ifndef __CVMX_SIM_MAGIC_H__
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#define __CVMX_SIM_MAGIC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Note, the following Magic function are only useful in the simulator
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* environment. Typical simple executive application should not use
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* these functions. Their access functions are defined and implemented in
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* the newlib
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* SIM_MAGIC_PUTS
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* SIM_MAGIC_WRITE
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* SIM_MAGIC_READ
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* SIM_MAGIC_OPEN
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* SIM_MAGIC_CLOSE
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* SIM_MAGIC_STAT
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* SIM_MAGIC_FSTAT
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* SIM_MAGIC_LSEEK
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* SIM_MAGIC_ALLOC_MEM
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*/
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/* Assembler macros for accessing simulator magic functions */
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#define OCTEON_SIM_MAGIC_TRAP_ADDRESS 0x8000000feffe0000ull
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/* Reg t9 (r25) specifies the actual magic function*/
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#define SIM_MAGIC_PUTS 0x05
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#define SIM_MAGIC_SIMPRINTF 0x06
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#define SIM_MAGIC_WRITE 0x07
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#define SIM_MAGIC_READ 0x08
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#define SIM_MAGIC_OPEN 0x09
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#define SIM_MAGIC_CLOSE 0x0A
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#define SIM_MAGIC_STAT 0x0B
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#define SIM_MAGIC_FSTAT 0x0C
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#define SIM_MAGIC_LSEEK 0x0D
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#define SIM_MAGIC_ALLOC_MEM 0x20
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#define SIM_MAGIC_GET_CPUFREQ 0x31 /* SDK 1.9 release and after */
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#define SIM_MAGIC_GET_MEMFREQ 0x32 /* SDK 1.9 release and after */
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#define SIM_MAGIC_GET_IOFREQ 0x33 /* SDK 2.0 release and after, only set in Octeon2 */
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/**
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* @INTERNAL
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* sim_magci implementation function with return code.
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*
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* @param func_no SIM magic function to invoke
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*
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* @return Result of the SIM magic function
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*/
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static inline int __cvmx_sim_magic_return(unsigned long long func_no)
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{
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register unsigned long long magic_addr asm ("$15");
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register unsigned long long magic_func asm ("$25"); /* t9 */
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int ret;
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magic_addr = OCTEON_SIM_MAGIC_TRAP_ADDRESS;
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magic_func = func_no;
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asm volatile (
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"dadd $24, $31, $0 \n"
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"jalr $15 \n"
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"dadd $31, $24, $0 \n"
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"move %0, $2"
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: "=r" (ret)
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: "r" (magic_addr), "r" (magic_func)
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: "$2", "$24" );
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return ret;
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}
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/**
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* @INTERNAL
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* sim_magci implementation function without return code.
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*
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* @param func_no SIM magic function to invoke
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*/
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static inline void __cvmx_sim_magic_no_return(unsigned long long func_no)
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{
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register unsigned long long magic_addr asm ("$15");
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register unsigned long long magic_func asm ("$25"); /* t9 */
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magic_addr = OCTEON_SIM_MAGIC_TRAP_ADDRESS;
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magic_func = func_no;
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asm volatile (
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"dadd $24, $31, $0 \n"
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"jalr $15 \n"
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"dadd $31, $24, $0 \n"
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:
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: "r" (magic_addr), "r" (magic_func)
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: "$24" );
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}
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/**
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* @INTERNAL
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* SIM magic printf function, only support up to 8 parameters
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*
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* @param format
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*/
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static inline void __cvmx_sim_magic_simprintf(const char *format, ...)
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{
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CVMX_SYNC;
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__cvmx_sim_magic_no_return( SIM_MAGIC_SIMPRINTF);
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}
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/**
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* Retrive cpu core clock frequency from the simulator
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*
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* @return simulating core frequency
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*/
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static inline int cvmx_sim_magic_get_cpufreq(void)
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{
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CVMX_SYNC;
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return __cvmx_sim_magic_return(SIM_MAGIC_GET_CPUFREQ);
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}
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/**
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* Retrive DDR clock frequency from the simulator
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*
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* @return simulating DDR frequency
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*/
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static inline int cvmx_sim_magic_get_memfreq(void)
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{
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CVMX_SYNC;
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return __cvmx_sim_magic_return(SIM_MAGIC_GET_MEMFREQ);
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}
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/**
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* Retrive io core clock frequency from the simulator
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*
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* @return simulating core frequency
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*/
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static inline int cvmx_sim_magic_get_iofreq(void)
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{
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CVMX_SYNC;
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF7XXX))
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return __cvmx_sim_magic_return(SIM_MAGIC_GET_IOFREQ);
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else
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_SIM_MAGIC_H__ */
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