From 1d40e2f2c501a0fe9a5ca2b86b931aae3682486d Mon Sep 17 00:00:00 2001
From: "Justin T. Gibbs" <gibbs@FreeBSD.org>
Date: Sat, 8 Jun 1996 06:54:06 +0000
Subject: [PATCH] Hopefully fix the parity problem and the hang on message
 reject for good.

---
 sys/dev/aic7xxx/aic7xxx.seq | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/sys/dev/aic7xxx/aic7xxx.seq b/sys/dev/aic7xxx/aic7xxx.seq
index ccd88b45674..4613d9fc645 100644
--- a/sys/dev/aic7xxx/aic7xxx.seq
+++ b/sys/dev/aic7xxx/aic7xxx.seq
@@ -39,7 +39,7 @@
  *
  *-M************************************************************************/
 
-VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.39 1996/05/30 14:31:08 gibbs Exp $"
+VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.40 1996/05/31 06:30:15 gibbs Exp $"
 
 #if defined(__NetBSD__)
 #include "../../../../dev/ic/aic7xxxreg.h"
@@ -83,6 +83,11 @@ reset:
 start:
 	and	FLAGS,0x0f		/* clear target specific flags */
 	mvi	SCSISEQ,ENRSELI		/* Always allow reselection */
+	clr	SCSIRATE		/*
+					 * We don't know the target we will
+					 * connect to, so default to narrow
+					 * transfers to avoid parity problems.
+					 */
 poll_for_work:
 	/*
 	 * Are we a twin channel device?
@@ -274,9 +279,9 @@ ultra_b:
 set_sxfrctl0:
 	mov	SXFRCTL0,SINDEX
 
-	mov	SCSISEQ,ALLZEROS		/*
-						 * Don't allow (re)selections
-						 * until after the next busfree.
+	mvi	SCSISEQ,ENAUTOATNP		/*
+						 * ATN on parity errors
+						 * for "in" phases
 						 */
 	mvi	CLRSINT1,CLRBUSFREE
 	mvi	CLRSINT0,0x60			/* CLRSELDI|CLRSELDO */
@@ -499,10 +504,11 @@ p_mesgout_start:
  * a MESSAGE REJECT.
  */
 p_mesgout_loop:
+	test	SSTAT1,PHASEMIS	jnz p_mesgout_phasemis
 	test	SSTAT0,SPIORDY	jz p_mesgout_loop
+	test	SSTAT1,PHASEMIS	jnz p_mesgout_phasemis
 	cmp	DINDEX,1	jne p_mesgout_outb	/* last byte? */
 	mvi	CLRSINT1,CLRATNO			/* drop ATN */
-	test	SSTAT1,PHASEMIS	jnz p_mesgout_phasemis
 p_mesgout_outb:
 	dec	DINDEX
 	or	CLRSINT0, CLRSPIORDY
@@ -866,6 +872,7 @@ inb_next:
 	or	CLRSINT0, CLRSPIORDY
 	mov	NONE,SCSIDATL			/*dummy read from latch to ACK*/
 inb_next_wait:
+	test	SSTAT1,PHASEMIS	jnz mesgin_phasemis
 	test	SSTAT0,SPIORDY	jz inb_next_wait /* wait for next byte */
 inb_first:
 	mov	DINDEX,SINDEX