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290 lines
8.2 KiB
C
290 lines
8.2 KiB
C
/* Program execution for Emacs.
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Copyright (C) 2023-2024 Free Software Foundation, Inc.
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This file is part of GNU Emacs.
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GNU Emacs is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or (at
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your option) any later version.
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GNU Emacs is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU Emacs. If not, see <https://www.gnu.org/licenses/>. */
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#include <config.h>
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#include <errno.h>
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#include "mipsfpu.h"
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/* OABI MIPS systems support several different modes of execution.
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Each mode differs in the size and utilization of the hardware
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floating-point registers.
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Linux normally sets the floating point mode to one appropriate for
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execution, taking into account the floating point modes of the
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interpreter and executable binaries. However, this logic is
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forsaken when the `execve' system call is overwritten.
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Thus, the correct floating point mode must be determined and set
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within the loader binary. */
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/* Various constants used throughout this code. */
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#define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */
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#define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */
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#define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */
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#define MIPS_ABI_FP_SOFT 3 /* -msoft-float */
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#define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */
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#define MIPS_ABI_FP_XX 5 /* -mfpxx */
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#define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */
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#define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */
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#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used. */
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#define EF_MIPS_PIC 2 /* Contains PIC code. */
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#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence. */
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#define EF_MIPS_XGOT 8
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#define EF_MIPS_64BIT_WHIRL 16
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#define EF_MIPS_ABI2 32
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#define EF_MIPS_ABI_ON32 64
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#define EF_MIPS_FP64 512 /* Uses FP64 (12 callee-saved). */
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#define EF_MIPS_NAN2008 1024 /* Uses IEEE 754-2008 NaN encoding. */
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#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level. */
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/* Structure describing the requirements of a single floating-point
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ABI. */
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struct mode_description
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{
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/* Whether or not the ABI only executes single precision
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instructions, and can operate in both 32-bit or 64-bit floating
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point mode. */
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bool single;
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/* Whether or not the ABI performs floating point operations in
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software, using integer registers. */
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bool soft;
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/* Whether or not the ABI requires the use of 64-bit floating point
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registers. */
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bool fr1;
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/* Whether or not the ABI requires the use of 64-bit floating point
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registers on NABI systems, and 32-bit ones on OABI systems. */
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bool frdefault;
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/* Whether or not this ABI requires single precision floating point
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emulation. */
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bool fre;
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};
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static struct mode_description fpu_reqs[] =
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{
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[MIPS_ABI_FP_ANY] = { true, true, true, true, true, },
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[MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true, },
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[MIPS_ABI_FP_SINGLE] = { true, false, false, false, false, },
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[MIPS_ABI_FP_SOFT] = { false, true, false, false, false, },
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[MIPS_ABI_FP_OLD_64] = { false, false, false, false, false, },
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[MIPS_ABI_FP_XX] = { false, false, true, true, true, },
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[MIPS_ABI_FP_64] = { false, false, true, false, false, },
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[MIPS_ABI_FP_64A] = { false, false, true, false, true, },
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};
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/* Return whether or not the given floating-point ABI is valid. */
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static bool
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valid_abi_p (int abi)
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{
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switch (abi)
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{
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case MIPS_ABI_FP_ANY:
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case MIPS_ABI_FP_DOUBLE:
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case MIPS_ABI_FP_SINGLE:
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case MIPS_ABI_FP_SOFT:
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case MIPS_ABI_FP_OLD_64:
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case MIPS_ABI_FP_XX:
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case MIPS_ABI_FP_64:
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case MIPS_ABI_FP_64A:
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return true;
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default:
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return false;
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}
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}
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/* Return the floating point mode appropriate for the specified
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floating point ABI. */
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static int
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fp_mode_for_abi (int abi)
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{
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struct mode_description *desc;
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desc = &fpu_reqs[abi];
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if (desc->fre)
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return FP_FRE;
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else if (desc->fr1)
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return FP_FR1;
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return FP_FR0;
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}
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/* Determine whether or not the CPU is capable of operating in FR0
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floating point mode. */
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bool
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cpu_supports_fr0_p (void)
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{
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#if defined __mips_isa_rev && __mips_isa_rev >= 6
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return true;
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#else /* !defined __mips_isa_rev | mips_isa_rev < 6 */
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return false;
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#endif /* defined __mips_isa_rev && mips_isa_rev >= 6 */
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}
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/* Determine the FPU mode for the executable whose ELF header is
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HEADER. If INTERPRETER is non-NULL, also take an interpreter whose
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header is INTERPRETER into account.
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ABIFLAGS should be HEADER's corresponding PT_MIPS_ABIFLAGS program
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header, and ABIFLAGS1 should be that of INTERPRETER, if set. Both
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fields may be NULL if no PT_MIPS_ABIFLAGS header is present; in
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that case, use HEADER->e_flags to determine the ABI instead.
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Return the FPU mode in *MODE. Value is 0 upon success, 1
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otherwise, with errno set. */
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int
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determine_fpu_mode (elf_header *header, elf_header *interpreter,
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int *mode, struct mips_elf_abi_flags *abiflags,
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struct mips_elf_abi_flags *abiflags1)
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{
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int exec_abi, interpreter_abi;
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struct mode_description *exec_desc, *interpreter_desc, common;
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/* Figure out the executable's floating point ABI. First, consult
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header->e_flags, and use the old 64-bit floating point ABI if it
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is specified. */
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exec_abi = MIPS_ABI_FP_ANY;
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/* First, check HEADER->e_flags. */
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if (header->e_flags & EF_MIPS_FP64)
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exec_abi = MIPS_ABI_FP_OLD_64;
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/* Next, use ABIFLAGS if it exists. */
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if (abiflags && valid_abi_p (abiflags->fp_abi))
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exec_abi = abiflags->fp_abi;
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else if (abiflags)
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{
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errno = ENOEXEC;
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return 1;
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}
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/* Now determine that of the interpreter. */
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interpreter_abi = MIPS_ABI_FP_ANY;
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if (interpreter)
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{
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if (interpreter->e_flags & EF_MIPS_FP64)
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interpreter_abi = MIPS_ABI_FP_OLD_64;
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if (abiflags1 && valid_abi_p (abiflags->fp_abi))
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interpreter_abi = abiflags->fp_abi;
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else if (abiflags1)
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{
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errno = ELIBBAD;
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return 1;
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}
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}
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/* If no interpreter flag is set, just return that of the
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executable. */
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if (!interpreter)
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{
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*mode = fp_mode_for_abi (exec_abi);
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return 0;
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}
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/* Otherwise, compare both ABIs and try to find one which will run
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both kinds of code.
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First, see if there's an easy way out: both ABIs are identical,
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or one ABI is MIPS_ABI_FP_ANY. */
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if (exec_abi == interpreter_abi)
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{
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*mode = fp_mode_for_abi (exec_abi);
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return 0;
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}
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else if (exec_abi == MIPS_ABI_FP_ANY)
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{
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*mode = fp_mode_for_abi (interpreter_abi);
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return 0;
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}
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else if (interpreter_abi == MIPS_ABI_FP_ANY)
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{
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*mode = fp_mode_for_abi (exec_abi);
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return 0;
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}
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/* If that doesn't work, compare various characteristics of both
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ABIs and select an appropriate floating point mode. */
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exec_desc = &fpu_reqs[exec_abi];
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interpreter_desc = &fpu_reqs[interpreter_abi];
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/* Merge both sets of requirements. */
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common.single = exec_desc->single && interpreter_desc->single;
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common.soft = exec_desc->soft && interpreter_desc->soft;
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common.fr1 = exec_desc->fr1 && interpreter_desc->fr1;
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common.frdefault = exec_desc->frdefault && interpreter_desc->frdefault;
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common.fre = exec_desc->fre && interpreter_desc->fre;
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/* Default to a mode capable of running code expecting 32-bit
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registers. */
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if (!(header->e_flags & EF_MIPS_ABI2))
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*mode = FP_FR0;
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else
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/* But in this case, use FR1. */
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*mode = FP_FR1;
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if (common.fre && !common.frdefault && !common.fr1)
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/* Floating point emulation mode is required. */
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*mode = FP_FRE;
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else if ((common.fr1 && common.frdefault)
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|| (common.single && !common.frdefault)
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|| common.fr1)
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/* 64-bit mode is required. */
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*mode = FP_FR1;
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else if (!common.fre && !common.frdefault
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&& !common.fr1 && !common.single
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&& !common.soft)
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{
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/* The floating point modes specified are incompatible. */
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errno = ELIBBAD;
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return -1;
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}
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return 0;
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}
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