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security/nss: unbreak aarch64 on -CURRENT

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blinit.c:159:24: error: expected readable system register
        id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
                       ^
/usr/include/machine/armreg.h:61:19: note: expanded from macro 'READ_SPECIALREG'
        __asm __volatile("mrs   %0, " __STRING(reg) : "=&r" (_val));    \
                         ^
<inline asm>:1:10: note: instantiated into assembly here
        mrs     x8, (((3) << 19) | ((0) << 16) | ((0) << 12) | ((6) << 8) | ((0) << 5))
                    ^
blinit.c:160:28: error: implicit declaration of function 'ID_AA64ISAR0_AES' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
        arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
                           ^
blinit.c:162:29: error: implicit declaration of function 'ID_AA64ISAR0_SHA1' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
        arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
                            ^
blinit.c:162:29: note: did you mean 'ID_AA64ISAR0_AES'?
blinit.c:160:28: note: 'ID_AA64ISAR0_AES' declared here
        arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
                           ^
blinit.c:163:29: error: implicit declaration of function 'ID_AA64ISAR0_SHA2' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
        arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
                            ^
blinit.c:163:29: note: did you mean 'ID_AA64ISAR0_SHA1'?
blinit.c:162:29: note: 'ID_AA64ISAR0_SHA1' declared here
        arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
                            ^

PR:		242104
Reported by:	pkg-fallout
Submitted by:	Mikaël Urankar
This commit is contained in:
Jan Beich 2019-11-24 00:51:28 +00:00
parent 4d47e02860
commit 0d4bb2247e
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=518282
2 changed files with 29 additions and 20 deletions
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21
security/nss/files/patch-bug1575843
View File

@ -44,17 +44,26 @@ elf_aux_info is similar to getauxval but is nop on aarch64.
if (getauxval) {
long hwcaps = getauxval(AT_HWCAP);
arm_aes_support_ = hwcaps & HWCAP_AES && disable_hw_aes == NULL;
@@ -145,6 +153,14 @@ CheckARMSupport()
@@ -145,6 +153,23 @@ CheckARMSupport()
arm_sha1_support_ = hwcaps & HWCAP_SHA1;
arm_sha2_support_ = hwcaps & HWCAP_SHA2;
}
+#elif defined(__FreeBSD__)
+#ifndef ID_AA64ISAR0_AES_VAL
+#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
+#endif
+#ifndef ID_AA64ISAR0_SHA1_VAL
+#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1
+#endif
+#ifndef ID_AA64ISAR0_SHA2_VAL
+#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2
+#endif
+ uint64_t id_aa64isar0;
+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
+ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
+ arm_aes_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
+ arm_sha2_support_ = ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+#endif /* defined(__linux__) */
/* aarch64 must support NEON. */
arm_neon_support_ = disable_arm_neon == NULL;

28
security/nss/files/patch-lib_freebl_blinit.c
View File

@ -4,23 +4,23 @@ https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=240037
--- lib/freebl/blinit.c.orig 2019-08-30 15:46:32 UTC
+++ lib/freebl/blinit.c
@@ -154,12 +154,14 @@ CheckARMSupport()
arm_sha2_support_ = hwcaps & HWCAP_SHA2;
}
#elif defined(__FreeBSD__)
@@ -163,12 +163,14 @@ CheckARMSupport()
#ifndef ID_AA64ISAR0_SHA2_VAL
#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2
#endif
- uint64_t id_aa64isar0;
- id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
- arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
- arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
- arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
- arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
- id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
- arm_aes_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
- arm_pmull_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
- arm_sha1_support_ = ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
- arm_sha2_support_ = ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ if (!PR_GetEnvSecure("QEMU_EMULATING")) {
+ uint64_t id_aa64isar0;
+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+ arm_aes_support_ = ID_AA64ISAR0_AES(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
+ arm_sha2_support_ = ID_AA64ISAR0_SHA2(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
+ arm_aes_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE && disable_hw_aes == NULL;
+ arm_pmull_support_ = ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL && disable_pmull == NULL;
+ arm_sha1_support_ = ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE;
+ arm_sha2_support_ = ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE;
+ }
#endif /* defined(__linux__) */
/* aarch64 must support NEON. */