1
0
mirror of https://git.FreeBSD.org/ports.git synced 2024-12-23 04:23:08 +00:00

Update to LLVM 6.0.1 release.

Sponsored by:	DARPA, AFRL
This commit is contained in:
Brooks Davis 2018-06-27 20:18:04 +00:00
parent 8d6b4fce53
commit 18a4681633
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=473455
6 changed files with 97 additions and 1961 deletions

View File

@ -1,8 +1,8 @@
# $FreeBSD$
PORTNAME= llvm
DISTVERSION= 6.0.0
PORTREVISION= 4
DISTVERSION= 6.0.1
PORTREVISION= 0
CATEGORIES= devel lang
MASTER_SITES= http://${PRE_}releases.llvm.org/${LLVM_RELEASE}/${RCDIR}
PKGNAMESUFFIX= ${LLVM_SUFFIX}
@ -423,7 +423,6 @@ post-install-LLD-on:
${RMDIR} ${STAGEDIR}${LLVM_PREFIX}/include/llvm/BinaryFormat/WasmRelocs
post-install-LLDB-on:
${RMDIR} ${STAGEDIR}${LLVM_PREFIX}/include/lldb/API
${RMDIR} ${STAGEDIR}${LLVM_PREFIX}/include/lldb/Host/windows/getopt
${RMDIR} ${STAGEDIR}${LLVM_PREFIX}/include/lldb/Host/mingw
${RMDIR} ${STAGEDIR}${LLVM_PREFIX}/include/lldb/Host/msvc

View File

@ -1,15 +1,15 @@
TIMESTAMP = 1520529470
SHA256 (llvm-6.0.0.src.tar.xz) = 1ff53c915b4e761ef400b803f07261ade637b0c269d99569f18040f3dcee4408
SIZE (llvm-6.0.0.src.tar.xz) = 25296048
SHA256 (cfe-6.0.0.src.tar.xz) = e07d6dd8d9ef196cfc8e8bb131cbd6a2ed0b1caf1715f9d05b0f0eeaddb6df32
SIZE (cfe-6.0.0.src.tar.xz) = 11959224
SHA256 (compiler-rt-6.0.0.src.tar.xz) = d0cc1342cf57e9a8d52f5498da47a3b28d24ac0d39cbc92308781b3ee0cea79a
SIZE (compiler-rt-6.0.0.src.tar.xz) = 1633096
SHA256 (clang-tools-extra-6.0.0.src.tar.xz) = 053b424a4cd34c9335d8918734dd802a8da612d13a26bbb88fcdf524b2d989d2
SIZE (clang-tools-extra-6.0.0.src.tar.xz) = 757680
SHA256 (lld-6.0.0.src.tar.xz) = 6b8c4a833cf30230c0213d78dbac01af21387b298225de90ab56032ca79c0e0b
SIZE (lld-6.0.0.src.tar.xz) = 790532
SHA256 (lldb-6.0.0.src.tar.xz) = 46f54c1d7adcd047d87c0179f7b6fa751614f339f4f87e60abceaa45f414d454
SIZE (lldb-6.0.0.src.tar.xz) = 19317956
SHA256 (openmp-6.0.0.src.tar.xz) = 7c0e050d5f7da3b057579fb3ea79ed7dc657c765011b402eb5bbe5663a7c38fc
SIZE (openmp-6.0.0.src.tar.xz) = 2272360
TIMESTAMP = 1530117803
SHA256 (llvm-6.0.1.src.tar.xz) = b6d6c324f9c71494c0ccaf3dac1f16236d970002b42bb24a6c9e1634f7d0f4e2
SIZE (llvm-6.0.1.src.tar.xz) = 25306628
SHA256 (cfe-6.0.1.src.tar.xz) = 7c243f1485bddfdfedada3cd402ff4792ea82362ff91fbdac2dae67c6026b667
SIZE (cfe-6.0.1.src.tar.xz) = 11905772
SHA256 (compiler-rt-6.0.1.src.tar.xz) = f4cd1e15e7d5cb708f9931d4844524e4904867240c306b06a4287b22ac1c99b9
SIZE (compiler-rt-6.0.1.src.tar.xz) = 1686820
SHA256 (clang-tools-extra-6.0.1.src.tar.xz) = 0d2e3727786437574835b75135f9e36f861932a958d8547ced7e13ebdda115f1
SIZE (clang-tools-extra-6.0.1.src.tar.xz) = 757256
SHA256 (lld-6.0.1.src.tar.xz) = e706745806921cea5c45700e13ebe16d834b5e3c0b7ad83bf6da1f28b0634e11
SIZE (lld-6.0.1.src.tar.xz) = 787804
SHA256 (lldb-6.0.1.src.tar.xz) = 6b8573841f2f7b60ffab9715c55dceff4f2a44e5a6d590ac189d20e8e7472714
SIZE (lldb-6.0.1.src.tar.xz) = 19292420
SHA256 (openmp-6.0.1.src.tar.xz) = 66afca2b308351b180136cf899a3b22865af1a775efaf74dc8a10c96d4721c5a
SIZE (openmp-6.0.1.src.tar.xz) = 2048320

View File

@ -1,258 +0,0 @@
commit f13397cb22ae77e9b18e29273e2920bd63c17ef1
Author: dim <dim@FreeBSD.org>
Date: Fri Apr 20 18:20:55 2018 +0000
Recommit r332501, with an additional upstream fix for "Cannot lower
EFLAGS copy that lives out of a basic block!" errors on i386.
Pull in r325446 from upstream clang trunk (by me):
[X86] Add 'sahf' CPU feature to frontend
Summary:
Make clang accept `-msahf` (and `-mno-sahf`) flags to activate the
`+sahf` feature for the backend, for bug 36028 (Incorrect use of
pushf/popf enables/disables interrupts on amd64 kernels). This was
originally submitted in bug 36037 by Jonathan Looney
<jonlooney@gmail.com>.
As described there, GCC also uses `-msahf` for this feature, and the
backend already recognizes the `+sahf` feature. All that is needed is
to teach clang to pass this on to the backend.
The mapping of feature support onto CPUs may not be complete; rather,
it was chosen to match LLVM's idea of which CPUs support this feature
(see lib/Target/X86/X86.td).
I also updated the affected test case (CodeGen/attr-target-x86.c) to
match the emitted output.
Reviewers: craig.topper, coby, efriedma, rsmith
Reviewed By: craig.topper
Subscribers: emaste, cfe-commits
Differential Revision: https://reviews.llvm.org/D43394
Pull in r328944 from upstream llvm trunk (by Chandler Carruth):
[x86] Expose more of the condition conversion routines in the public
API for X86's instruction information. I've now got a second patch
under review that needs these same APIs. This bit is nicely
orthogonal and obvious, so landing it. NFC.
Pull in r329414 from upstream llvm trunk (by Craig Topper):
[X86] Merge itineraries for CLC, CMC, and STC.
These are very simple flag setting instructions that appear to only
be a single uop. They're unlikely to need this separation.
Pull in r329657 from upstream llvm trunk (by Chandler Carruth):
[x86] Introduce a pass to begin more systematically fixing PR36028
and similar issues.
The key idea is to lower COPY nodes populating EFLAGS by scanning the
uses of EFLAGS and introducing dedicated code to preserve the
necessary state in a GPR. In the vast majority of cases, these uses
are cmovCC and jCC instructions. For such cases, we can very easily
save and restore the necessary information by simply inserting a
setCC into a GPR where the original flags are live, and then testing
that GPR directly to feed the cmov or conditional branch.
However, things are a bit more tricky if arithmetic is using the
flags. This patch handles the vast majority of cases that seem to
come up in practice: adc, adcx, adox, rcl, and rcr; all without
taking advantage of partially preserved EFLAGS as LLVM doesn't
currently model that at all.
There are a large number of operations that techinaclly observe
EFLAGS currently but shouldn't in this case -- they typically are
using DF. Currently, they will not be handled by this approach.
However, I have never seen this issue come up in practice. It is
already pretty rare to have these patterns come up in practical code
with LLVM. I had to resort to writing MIR tests to cover most of the
logic in this pass already. I suspect even with its current amount
of coverage of arithmetic users of EFLAGS it will be a significant
improvement over the current use of pushf/popf. It will also produce
substantially faster code in most of the common patterns.
This patch also removes all of the old lowering for EFLAGS copies,
and the hack that forced us to use a frame pointer when EFLAGS copies
were found anywhere in a function so that the dynamic stack
adjustment wasn't a problem. None of this is needed as we now lower
all of these copies directly in MI and without require stack
adjustments.
Lots of thanks to Reid who came up with several aspects of this
approach, and Craig who helped me work out a couple of things
tripping me up while working on this.
Differential Revision: https://reviews.llvm.org/D45146
Pull in r329673 from upstream llvm trunk (by Chandler Carruth):
[x86] Model the direction flag (DF) separately from the rest of
EFLAGS.
This cleans up a number of operations that only claimed te use EFLAGS
due to using DF. But no instructions which we think of us setting
EFLAGS actually modify DF (other than things like popf) and so this
needlessly creates uses of EFLAGS that aren't really there.
In fact, DF is so restrictive it is pretty easy to model. Only STD,
CLD, and the whole-flags writes (WRFLAGS and POPF) need to model
this.
I've also somewhat cleaned up some of the flag management instruction
definitions to be in the correct .td file.
Adding this extra register also uncovered a failure to use the
correct datatype to hold X86 registers, and I've corrected that as
necessary here.
Differential Revision: https://reviews.llvm.org/D45154
Pull in r330264 from upstream llvm trunk (by Chandler Carruth):
[x86] Fix PR37100 by teaching the EFLAGS copy lowering to rewrite
uses across basic blocks in the limited cases where it is very
straight forward to do so.
This will also be useful for other places where we do some limited
EFLAGS propagation across CFG edges and need to handle copy rewrites
afterward. I think this is rapidly approaching the maximum we can and
should be doing here. Everything else begins to require either heroic
analysis to prove how to do PHI insertion manually, or somehow
managing arbitrary PHI-ing of EFLAGS with general PHI insertion.
Neither of these seem at all promising so if those cases come up,
we'll almost certainly need to rewrite the parts of LLVM that produce
those patterns.
We do now require dominator trees in order to reliably diagnose
patterns that would require PHI nodes. This is a bit unfortunate but
it seems better than the completely mysterious crash we would get
otherwise.
Differential Revision: https://reviews.llvm.org/D45673
Together, these should ensure clang does not use pushf/popf sequences to
save and restore flags, avoiding problems with unrelated flags (such as
the interrupt flag) being restored unexpectedly.
Requested by: jtl
PR: 225330
MFC after: 1 week
diff --git llvm/tools/clang/include/clang/Driver/Options.td llvm/tools/clang/include/clang/Driver/Options.td
index ad72aef3fc9..cab450042e6 100644
--- tools/clang/include/clang/Driver/Options.td
+++ tools/clang/include/clang/Driver/Options.td
@@ -2559,6 +2559,8 @@ def mrtm : Flag<["-"], "mrtm">, Group<m_x86_Features_Group>;
def mno_rtm : Flag<["-"], "mno-rtm">, Group<m_x86_Features_Group>;
def mrdseed : Flag<["-"], "mrdseed">, Group<m_x86_Features_Group>;
def mno_rdseed : Flag<["-"], "mno-rdseed">, Group<m_x86_Features_Group>;
+def msahf : Flag<["-"], "msahf">, Group<m_x86_Features_Group>;
+def mno_sahf : Flag<["-"], "mno-sahf">, Group<m_x86_Features_Group>;
def msgx : Flag<["-"], "msgx">, Group<m_x86_Features_Group>;
def mno_sgx : Flag<["-"], "mno-sgx">, Group<m_x86_Features_Group>;
def msha : Flag<["-"], "msha">, Group<m_x86_Features_Group>;
diff --git llvm/tools/clang/lib/Basic/Targets/X86.cpp llvm/tools/clang/lib/Basic/Targets/X86.cpp
index cfa6c571d6e..8251e6abd64 100644
--- tools/clang/lib/Basic/Targets/X86.cpp
+++ tools/clang/lib/Basic/Targets/X86.cpp
@@ -198,6 +198,7 @@ bool X86TargetInfo::initFeatureMap(
LLVM_FALLTHROUGH;
case CK_Core2:
setFeatureEnabledImpl(Features, "ssse3", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
LLVM_FALLTHROUGH;
case CK_Yonah:
case CK_Prescott:
@@ -239,6 +240,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "ssse3", true);
setFeatureEnabledImpl(Features, "fxsr", true);
setFeatureEnabledImpl(Features, "cx16", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
break;
case CK_KNM:
@@ -269,6 +271,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "xsaveopt", true);
setFeatureEnabledImpl(Features, "xsave", true);
setFeatureEnabledImpl(Features, "movbe", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
break;
case CK_K6_2:
@@ -282,6 +285,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "sse4a", true);
setFeatureEnabledImpl(Features, "lzcnt", true);
setFeatureEnabledImpl(Features, "popcnt", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
LLVM_FALLTHROUGH;
case CK_K8SSE3:
setFeatureEnabledImpl(Features, "sse3", true);
@@ -315,6 +319,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "prfchw", true);
setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "fxsr", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
break;
case CK_ZNVER1:
@@ -338,6 +343,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "prfchw", true);
setFeatureEnabledImpl(Features, "rdrnd", true);
setFeatureEnabledImpl(Features, "rdseed", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
setFeatureEnabledImpl(Features, "sha", true);
setFeatureEnabledImpl(Features, "sse4a", true);
setFeatureEnabledImpl(Features, "xsave", true);
@@ -372,6 +378,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "fxsr", true);
setFeatureEnabledImpl(Features, "xsave", true);
+ setFeatureEnabledImpl(Features, "sahf", true);
break;
}
if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec))
@@ -768,6 +775,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasRetpoline = true;
} else if (Feature == "+retpoline-external-thunk") {
HasRetpolineExternalThunk = true;
+ } else if (Feature == "+sahf") {
+ HasLAHFSAHF = true;
}
X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
@@ -1240,6 +1249,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
.Case("rdrnd", true)
.Case("rdseed", true)
.Case("rtm", true)
+ .Case("sahf", true)
.Case("sgx", true)
.Case("sha", true)
.Case("shstk", true)
@@ -1313,6 +1323,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Case("retpoline", HasRetpoline)
.Case("retpoline-external-thunk", HasRetpolineExternalThunk)
.Case("rtm", HasRTM)
+ .Case("sahf", HasLAHFSAHF)
.Case("sgx", HasSGX)
.Case("sha", HasSHA)
.Case("shstk", HasSHSTK)
diff --git llvm/tools/clang/lib/Basic/Targets/X86.h llvm/tools/clang/lib/Basic/Targets/X86.h
index 590531c1785..fa2fbee387b 100644
--- tools/clang/lib/Basic/Targets/X86.h
+++ tools/clang/lib/Basic/Targets/X86.h
@@ -98,6 +98,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
bool HasPREFETCHWT1 = false;
bool HasRetpoline = false;
bool HasRetpolineExternalThunk = false;
+ bool HasLAHFSAHF = false;
/// \brief Enumeration of all of the X86 CPUs supported by Clang.
///

File diff suppressed because it is too large Load Diff

View File

@ -1,62 +0,0 @@
commit de8877900af2a4af25465be5fde7e460ffee08a2
Author: dim <dim@FreeBSD.org>
Date: Mon Apr 23 23:07:57 2018 +0000
Pull in r329771 from upstream llvm trunk (by Craig Topper):
[X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need
to emit an explicit MOV8mr instruction.
Previously the code only knew how to handle setcc to a register.
This should fix a crash in the chromium build.
This fixes various assertion failures while building ports targeting
i386:
* www/firefox: isReg() && "This is not a register operand!"
* www/iridium, www/qt5-webengine: (I.atEnd() || std::next(I) ==
def_instr_end()) && "getVRegDef assumes a single definition or no
definition"
* devel/powerpc64-gcc: FromReg != ToReg && "Cannot replace a reg with
itself"
Reported by: jbeich
PR: 225330, 227686, 227698, 227699
MFC after: 1 week
X-MFC-With: r332833
diff --git lib/Target/X86/X86FlagsCopyLowering.cpp lib/Target/X86/X86FlagsCopyLowering.cpp
index 1b6369b7bfd9..1fd1c704d79a 100644
--- lib/Target/X86/X86FlagsCopyLowering.cpp
+++ lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -770,8 +770,27 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB,
if (!CondReg)
CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond);
- // Rewriting this is trivial: we just replace the register and remove the
- // setcc.
- MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
+ // Rewriting a register def is trivial: we just replace the register and
+ // remove the setcc.
+ if (!SetCCI.mayStore()) {
+ assert(SetCCI.getOperand(0).isReg() &&
+ "Cannot have a non-register defined operand to SETcc!");
+ MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
+ SetCCI.eraseFromParent();
+ return;
+ }
+
+ // Otherwise, we need to emit a store.
+ auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(),
+ SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));
+ // Copy the address operands.
+ for (int i = 0; i < X86::AddrNumOperands; ++i)
+ MIB.add(SetCCI.getOperand(i));
+
+ MIB.addReg(CondReg);
+
+ MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end());
+
SetCCI.eraseFromParent();
+ return;
}

View File

@ -744,6 +744,74 @@ llvm%%LLVM_LIB_VER%%/bin/yaml2obj
%%LLD%%llvm%%LLVM_LIB_VER%%/include/lld/Core/Writer.h
%%LLD%%llvm%%LLVM_LIB_VER%%/include/lld/ReaderWriter/MachOLinkingContext.h
%%LLD%%llvm%%LLVM_LIB_VER%%/include/lld/ReaderWriter/YamlContext.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/LLDB.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBAddress.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBAttachInfo.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBBlock.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBBreakpoint.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBBreakpointLocation.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBBreakpointName.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBBroadcaster.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBCommandInterpreter.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBCommandReturnObject.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBCommunication.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBCompileUnit.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBData.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBDebugger.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBDeclaration.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBDefines.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBError.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBEvent.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBExecutionContext.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBExpressionOptions.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBFileSpec.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBFileSpecList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBFrame.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBFunction.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBHostOS.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBInstruction.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBInstructionList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBLanguageRuntime.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBLaunchInfo.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBLineEntry.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBListener.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBMemoryRegionInfo.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBMemoryRegionInfoList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBModule.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBModuleSpec.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBPlatform.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBProcess.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBProcessInfo.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBQueue.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBQueueItem.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBSection.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBSourceManager.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBStream.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBStringList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBStructuredData.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBSymbol.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBSymbolContext.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBSymbolContextList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTarget.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBThread.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBThreadCollection.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBThreadPlan.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTrace.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTraceOptions.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBType.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeCategory.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeEnumMember.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeFilter.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeFormat.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeNameSpecifier.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeSummary.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBTypeSynthetic.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBUnixSignals.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBValue.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBValueList.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBVariablesOptions.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SBWatchpoint.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/API/SystemInitializerFull.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Breakpoint/Breakpoint.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Breakpoint/BreakpointID.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Breakpoint/BreakpointIDList.h
@ -1151,6 +1219,18 @@ llvm%%LLVM_LIB_VER%%/bin/yaml2obj
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Utility/UserID.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Utility/VASPrintf.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/Utility/VMRange.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-defines.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-enumerations.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-forward.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private-defines.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private-enumerations.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private-forward.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private-interfaces.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private-types.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-private.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-public.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-types.h
%%LLDB%%llvm%%LLVM_LIB_VER%%/include/lldb/lldb-versioning.h
llvm%%LLVM_LIB_VER%%/include/llvm-c/Analysis.h
llvm%%LLVM_LIB_VER%%/include/llvm-c/BitReader.h
llvm%%LLVM_LIB_VER%%/include/llvm-c/BitWriter.h