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Upgrade to 4.0.1rc1.
Fix build on powerpc.[0] Submitted by: rezny[0] Differential Revision: https://reviews.freebsd.org/D10630
This commit is contained in:
Brooks Davis
parent
ab8a50e067
commit
18d96a45bb
Notes:
svn2git
2021-03-31 03:12:20 +00:00
svn path=/head/; revision=440459
@ -1,7 +1,7 @@
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# $FreeBSD$
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PORTNAME= llvm
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DISTVERSION= 4.0.0
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DISTVERSION= 4.0.1rc1
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PORTREVISION= 4
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CATEGORIES= devel lang
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MASTER_SITES= http://llvm.org/${PRE_}releases/${LLVM_RELEASE}/${RCDIR}
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@ -90,6 +90,7 @@ LLD_DISTFILES= lld-${DISTVERSION}.src${EXTRACT_SUFX}
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LLDB_BUILD_DEPENDS= swig:devel/swig13
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LLDB_DESC= Install lldb, the LLVM debugger
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LLDB_DISTFILES= lldb-${DISTVERSION}.src${EXTRACT_SUFX}
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LLDB_EXTRA_PATCHES= ${PATCHDIR}/lldb-patch-tools_lldb_source_Host_common_FileSpec.cpp
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LLDB_IMPLIES= CLANG
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LLDB_USES= execinfo
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LLDB_VARS= _USES_PYTHON=python
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@ -1,15 +1,15 @@
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TIMESTAMP = 1490044553
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SHA256 (llvm-4.0.0.src.tar.xz) = 8d10511df96e73b8ff9e7abbfb4d4d432edbdbe965f1f4f07afaf370b8a533be
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SIZE (llvm-4.0.0.src.tar.xz) = 21016340
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SHA256 (cfe-4.0.0.src.tar.xz) = cea5f88ebddb30e296ca89130c83b9d46c2d833685e2912303c828054c4dc98a
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SIZE (cfe-4.0.0.src.tar.xz) = 10900916
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SHA256 (compiler-rt-4.0.0.src.tar.xz) = d3f25b23bef24c305137e6b44f7e81c51bbec764c119e01512a9bd2330be3115
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SIZE (compiler-rt-4.0.0.src.tar.xz) = 1435104
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SHA256 (clang-tools-extra-4.0.0.src.tar.xz) = 41b7d37eb128fd362ab3431be5244cf50325bb3bb153895735c5bacede647c99
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SIZE (clang-tools-extra-4.0.0.src.tar.xz) = 583088
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SHA256 (lld-4.0.0.src.tar.xz) = 33e06457b9ce0563c89b11ccc7ccabf9cff71b83571985a5bf8684c9150e7502
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SIZE (lld-4.0.0.src.tar.xz) = 592728
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SHA256 (lldb-4.0.0.src.tar.xz) = 2dbd8f05c662c1c9f11270fc9d0c63b419ddc988095e0ad107ed911cf882033d
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SIZE (lldb-4.0.0.src.tar.xz) = 19122324
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SHA256 (openmp-4.0.0.src.tar.xz) = db55d85a7bb289804dc42fc5c8e35ca24dfc3885782261b675a194fd7e206e26
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SIZE (openmp-4.0.0.src.tar.xz) = 2040104
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TIMESTAMP = 1494028453
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SHA256 (llvm-4.0.1rc1.src.tar.xz) = e07bde6275d862642ec640d146358c2bd4cc99513d74f7b897364c5ff14bb5ec
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SIZE (llvm-4.0.1rc1.src.tar.xz) = 21065084
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SHA256 (cfe-4.0.1rc1.src.tar.xz) = 82148c2ccd7e59eb631dd2f1941097ef96154f251b7aa09a3191ebd7788e3f94
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SIZE (cfe-4.0.1rc1.src.tar.xz) = 10933060
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SHA256 (compiler-rt-4.0.1rc1.src.tar.xz) = bf7dc6abe0be57a3d2600033c873021058a11cb96517984e0f7c6cd1ea06a2d7
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SIZE (compiler-rt-4.0.1rc1.src.tar.xz) = 1428764
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SHA256 (clang-tools-extra-4.0.1rc1.src.tar.xz) = a80f4f24f779755bdd25b4fd62a50391a303823a09cc629061e73e795f1c92c1
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SIZE (clang-tools-extra-4.0.1rc1.src.tar.xz) = 581696
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SHA256 (lld-4.0.1rc1.src.tar.xz) = 5439ee1556a7572a28d0bfe7a391dd9918c6d75f4501bb5e04c4bc50314b2e25
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SIZE (lld-4.0.1rc1.src.tar.xz) = 593192
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SHA256 (lldb-4.0.1rc1.src.tar.xz) = e4b328173bd6493be8669648dc82f337a560c63ac7ade66ee2fdcabaac03553f
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SIZE (lldb-4.0.1rc1.src.tar.xz) = 19089272
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SHA256 (openmp-4.0.1rc1.src.tar.xz) = 0bda10d7fca817ba19d2fc63170621567b10da7bf52988f7d3cef09a5e50bfb0
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SIZE (openmp-4.0.1rc1.src.tar.xz) = 2275312
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@ -0,0 +1,10 @@
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--- tools/lldb/source/Host/common/FileSpec.cpp.orig 2017-04-03 04:25:09 UTC
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+++ tools/lldb/source/Host/common/FileSpec.cpp
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@@ -17,6 +17,7 @@
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#include <libgen.h>
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#endif
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#include <fstream>
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+#include <limits.h>
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#include <set>
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#include <string.h>
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@ -1,110 +0,0 @@
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------------------------------------------------------------------------
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r300404 | dim | 2017-04-15 22:15:01 +0000 (Sat, 15 Apr 2017) | 22 lines
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Use correct registers for "A" inline asm constraint
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Summary:
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In PR32594, inline assembly using the 'A' constraint on x86_64 causes
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llvm to crash with a "Cannot select" stack trace. This is because
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`X86TargetLowering::getRegForInlineAsmConstraint` hardcodes that 'A'
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means the EAX and EDX registers.
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However, on x86_64 it means the RAX and RDX registers, and on 16-bit x86
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(ia16?) it means the old AX and DX registers.
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Add new register classes in `X86RegisterInfo.td` to support these cases,
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and amend the logic in `getRegForInlineAsmConstraint` to cope with
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different subtargets. Also add a test case, derived from PR32594.
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Reviewers: craig.topper, qcolombet, RKSimon, ab
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Reviewed By: ab
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Subscribers: ab, emaste, royger, llvm-commits
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Differential Revision: https://reviews.llvm.org/D31902
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------------------------------------------------------------------------
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Index: test/CodeGen/X86/inline-asm-A-constraint.ll
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===================================================================
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--- test/CodeGen/X86/inline-asm-A-constraint.ll (nonexistent)
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+++ test/CodeGen/X86/inline-asm-A-constraint.ll (revision 300404)
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@@ -0,0 +1,35 @@
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+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
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+
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+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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+target triple = "x86_64--"
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+
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+; Function Attrs: nounwind uwtable
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+define { i64, i64 } @foo(i8* %ptr, i128* nocapture readonly %src, i128* nocapture readonly %dst) local_unnamed_addr #0 {
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+entry:
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+ %0 = load i128, i128* %dst, align 16, !tbaa !1
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+ %shr = lshr i128 %0, 64
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+ %conv = trunc i128 %shr to i64
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+ %conv1 = trunc i128 %0 to i64
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+ %1 = load i128, i128* %src, align 16, !tbaa !1
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+ %2 = tail call i128 asm sideeffect "lock; cmpxchg16b $1", "=A,=*m,{cx},{bx},0,*m,~{dirflag},~{fpsr},~{flags}"(i8* %ptr, i64 %conv, i64 %conv1, i128 %1, i8* %ptr) #1, !srcloc !5
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+ %retval.sroa.0.0.extract.trunc = trunc i128 %2 to i64
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+ %retval.sroa.2.0.extract.shift = lshr i128 %2, 64
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+ %retval.sroa.2.0.extract.trunc = trunc i128 %retval.sroa.2.0.extract.shift to i64
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+ %.fca.0.insert = insertvalue { i64, i64 } undef, i64 %retval.sroa.0.0.extract.trunc, 0
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+ %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %retval.sroa.2.0.extract.trunc, 1
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+ ret { i64, i64 } %.fca.1.insert
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+}
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+; CHECK: lock
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+; CHECK-NEXT: cmpxchg16b
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+
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+attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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+attributes #1 = { nounwind }
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+
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+!llvm.ident = !{!0}
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+
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+!0 = !{!"clang version 5.0.0 (trunk 300088)"}
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+!1 = !{!2, !2, i64 0}
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+!2 = !{!"__int128", !3, i64 0}
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+!3 = !{!"omnipotent char", !4, i64 0}
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+!4 = !{!"Simple C/C++ TBAA"}
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+!5 = !{i32 269}
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Index: lib/Target/X86/X86RegisterInfo.td
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===================================================================
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--- lib/Target/X86/X86RegisterInfo.td (revision 300403)
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+++ lib/Target/X86/X86RegisterInfo.td (revision 300404)
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@@ -437,8 +437,10 @@
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def LOW32_ADDR_ACCESS_RBP : RegisterClass<"X86", [i32], 32,
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(add LOW32_ADDR_ACCESS, RBP)>;
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-// A class to support the 'A' assembler constraint: EAX then EDX.
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+// A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
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+def GR16_AD : RegisterClass<"X86", [i16], 16, (add AX, DX)>;
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def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;
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+def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;
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// Scalar SSE2 floating point registers.
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def FR32 : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 15)>;
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Index: lib/Target/X86/X86ISelLowering.cpp
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===================================================================
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--- lib/Target/X86/X86ISelLowering.cpp (revision 300403)
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+++ lib/Target/X86/X86ISelLowering.cpp (revision 300404)
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@@ -35917,10 +35917,20 @@
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return Res;
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}
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- // 'A' means EAX + EDX.
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+ // 'A' means [ER]AX + [ER]DX.
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if (Constraint == "A") {
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- Res.first = X86::EAX;
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- Res.second = &X86::GR32_ADRegClass;
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+ if (Subtarget.is64Bit()) {
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+ Res.first = X86::RAX;
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+ Res.second = &X86::GR64_ADRegClass;
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+ } else if (Subtarget.is32Bit()) {
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+ Res.first = X86::EAX;
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+ Res.second = &X86::GR32_ADRegClass;
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+ } else if (Subtarget.is16Bit()) {
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+ Res.first = X86::AX;
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+ Res.second = &X86::GR16_ADRegClass;
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+ } else {
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+ llvm_unreachable("Expecting 64, 32 or 16 bit subtarget");
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+ }
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return Res;
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}
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return Res;
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