mirror of
https://git.FreeBSD.org/ports.git
synced 2025-01-30 10:38:37 +00:00
Remove abandonware blocking decomissioning imlib
This commit is contained in:
Baptiste Daroussin
parent
7d66907fc5
commit
3c2b9fc324
Notes:
svn2git
2021-03-31 03:12:20 +00:00
svn path=/head/; revision=375567
1
MOVED
1
MOVED
@ -7336,3 +7336,4 @@ games/hex||2014-12-25|Abandonware, no support for moden graphics libraries
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graphics/bbrb||2014-12-25|Abandonware, depends on imlib
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graphics/gtkgraph||2014-12-25|Abandonware, depends on imlib
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graphics/imagesort||2014-12-25|Abandonware, depends on imlib
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grahpics/picturebook||2014-12-25|Abandonware, depends on imlib
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@ -760,7 +760,6 @@
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SUBDIR += php56-gd
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SUBDIR += phplot
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SUBDIR += picpuz
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SUBDIR += picturebook
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SUBDIR += picviz
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SUBDIR += piddle
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SUBDIR += pinpoint
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@ -1,38 +0,0 @@
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# Created by: Takanori Watanabe <takawata@FreeBSD.org>
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# $FreeBSD$
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PORTNAME= picturebook
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PORTVERSION= 20010422
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PORTREVISION= 11
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CATEGORIES= graphics
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MASTER_SITES= http://samba.org/picturebook/
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DISTNAME= capture
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MAINTAINER= ports@FreeBSD.org
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COMMENT= SONY VAIO camera capture utility
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ONLY_FOR_ARCHS= i386
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WRKSRC= ${WRKDIR}/${PORTNAME}
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USE_GNOME= imlib
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USES= tar:tgz
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PLIST_FILES= bin/capture sbin/setbrightness sbin/vaiobat
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PORTDOCS= README README.FreeBSD
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OPTIONS_DEFINE= DOCS
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post-build:
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cd ${WRKSRC}; \
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${CC} ${CFLAGS} -o setbrightness setbrightness.c; \
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${CC} ${CFLAGS} -o vaiobat vaiobat.c
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do-install:
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${INSTALL_PROGRAM} ${WRKSRC}/capture ${STAGEDIR}${PREFIX}/bin
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(cd ${WRKSRC} && ${INSTALL_PROGRAM} setbrightness vaiobat \
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${STAGEDIR}${PREFIX}/sbin)
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@${MKDIR} ${STAGEDIR}${DOCSDIR}
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${INSTALL_MAN} ${WRKSRC}/README ${STAGEDIR}${DOCSDIR}
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${INSTALL_MAN} ${PATCHDIR}/README.FreeBSD ${STAGEDIR}${DOCSDIR}
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.include <bsd.port.mk>
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@ -1,2 +0,0 @@
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SHA256 (capture.tgz) = eb59139b41d0905ec88a0736a2ddb0717f0286858fd199b61ca6df7c7658c28b
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SIZE (capture.tgz) = 124296
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@ -1,39 +0,0 @@
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Work memo
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Modified File:
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sonypi.c: Add OUT[BW] function. the order of the argument of these function
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is different between in Linux and in FreeBSD.Replaced out[bw] into
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OUT[BW].
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Add iopl compatibility shim.(by open/close /dev/io)
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capture.c: Delete getopt_long and use getopt instead.
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Change type of signal handler.
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ptable.c: Change memalign to malloc.Because memalign(PAGE_SIZE,size)==
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valloc(size) and valloc is obsoleted in FreeBSD by malloc(3).
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Added File:
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pci.h: From Linux kernel. and removed needless description.All I need is
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register definition.
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pci_freebsd.c: Substantially rewrtten version of pci.c
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***************************IMPORTANT********************************
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*I don't recieve question about this code. All I can say is *
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*that this can be compiled and pci device probe routine and 32 bit *
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*configuration space reading routine is working. *
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* Takanori Watanabe *
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***************************IMPORTANT********************************
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----
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Original code was designed for Linux by Andrew Tridgell <tridge@linuxcare.com>.
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See README file for details.
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Port for FreeBSD was done by Takanori Watanabe of Kobe Univ, in July 2000,
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as described in README.fbsdport. Since then, original Linux code has been
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revised.
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I, Noriyuki Takahashi <nrt@exa.onlab.ntt.co.jp>, merged Watanabe's
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modification for FreeBSD into newer code (of 30 Octover 2000 version or like)
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for Linux. The merged code is O.K. on my VAIO PCS-C1VJ running
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FreeBSD 5.0-current.
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Noriyuki Takahashi <nrt@exa.onlab.ntt.co.jp>
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2 November 2000
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@ -1,14 +0,0 @@
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--- Makefile.old Tue Jan 16 04:15:11 2001
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+++ Makefile Thu Oct 16 07:27:02 2003
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@@ -1,5 +1,9 @@
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-CFLAGS = -DWITH_DISPLAY=1 -Wall -O2 -g -I/usr/X11R6/include -I/usr/local/include
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-SRC = mchip.c capture.c dump.c sonypi.c pci.c yuv.c timer.c avi.c command.c display.c ptable.c jpeg.c
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+CFLAGS += -DWITH_DISPLAY=1 -I${LOCALBASE}/include
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+SRCMI = mchip.c capture.c dump.c sonypi.c yuv.c timer.c avi.c command.c display.c ptable.c jpeg.c
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+#LINUX
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+#SRCMD = pci.c
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+SRCMD = pci_freebsd.c
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+SRC = ${SRCMI} ${SRCMD}
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OBJ = $(SRC:.c=.o)
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LIBS = `imlib-config --libs`
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@ -1,106 +0,0 @@
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--- capture.c.old Thu Jul 27 02:15:05 2000
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+++ capture.c Thu Oct 16 07:21:39 2003
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@@ -39,7 +39,7 @@
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}
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}
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-static void sigint(void)
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+static void sigint(int dummy)
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{
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spic_shutdown(0);
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_exit(1);
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@@ -47,31 +47,31 @@
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static void usage(void)
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{
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- printf("
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-VAIO PCG-C1XS capture program
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-Copyright 2000 tridge@linuxcare.com
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-For the latest version see http://samba.org/picturebook/
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-
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-capture <options>
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- -o outfile set output filename
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- -q quality set compressed image quality (1-10 default 8)
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- -P capture as a PPM file
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- -V captime capture an avi video for the specified number of seconds
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- -O turn off camera afterwards
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- -4 use 1:4 sub-sampling
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- -s go into \"snap\" mode
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- -r rate set framerate in frames per second
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- -j display input from jogger/buttons etc
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- --brightness=n set brightness
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- --contrast=n set contrast
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- --hue=n set hue
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- --color=n set color
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- --sharpness=n set sharpness
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- --agc=n set agc
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- --picture=n set picture
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- --explode=fname explode a AVI file into frame.*
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- -h show usage
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-
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+ printf("\n\
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+VAIO PCG-C1XS capture program\n\
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+Copyright 2000 tridge@linuxcare.com\n\
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+For the latest version see http://samba.org/picturebook/\n\
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+\n\
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+capture <options>\n\
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+ -o outfile set output filename\n\
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+ -q quality set compressed image quality (1-10 default 8)\n\
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+ -P capture as a PPM file\n\
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+ -V captime capture an avi video for the specified number of seconds\n\
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+ -O turn off camera afterwards\n\
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+ -4 use 1:4 sub-sampling\n\
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+ -s go into \"snap\" mode\n\
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+ -r rate set framerate in frames per second\n\
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+ -j display input from jogger/buttons etc\n\
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+ --brightness=n set brightness\n\
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+ --contrast=n set contrast\n\
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+ --hue=n set hue\n\
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+ --color=n set color\n\
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+ --sharpness=n set sharpness\n\
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+ --agc=n set agc\n\
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+ --picture=n set picture\n\
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+ --explode=fname explode a AVI file into frame.*\n\
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+ -h show usage\n\
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+\n\
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");
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}
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@@ -81,6 +81,7 @@
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static char *short_options = "to:hPV:4Odvr:sjq:";
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+#ifdef HAVE_GETOPT_LONG_H
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static struct option long_options[] = {
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{"help", 0, 0, 'h'},
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{"version", 0, 0, OPT_VERSION},
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@@ -93,6 +94,7 @@
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{"agc", 1, 0, OPT_AGC},
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{"explode", 1, 0, OPT_EXPLODE},
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{0, 0, 0, 0}};
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+#endif
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int main(int argc, char *argv[])
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{
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@@ -108,15 +110,20 @@
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int snap=0;
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int subsample=0;
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int test=0;
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+#ifdef HAVE_GETOPT_LONG_H
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int option_index;
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+#endif
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int spic_brightness=32, spic_contrast=32, spic_hue=32, spic_color=32, spic_sharpness=32;
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int spic_agc=48, spic_picture=0;
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double framerate=0;
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setlinebuf(stdout);
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-
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+#ifdef HAVE_GETOPT_LONG_H
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while ((c = getopt_long(argc, argv,
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short_options, long_options, &option_index)) != -1) {
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+#else
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+ while ((c = getopt(argc, argv, short_options)) != -1) {
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+#endif
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switch (c) {
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default:
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case OPT_VERSION:
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@ -1,40 +0,0 @@
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--- capture.h.orig Thu Jul 27 02:15:05 2000
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+++ capture.h Thu Oct 16 10:58:38 2003
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@@ -16,20 +16,37 @@
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#define _XOPEN_SOURCE 500
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+#define __BSD_VISIBLE 1
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <errno.h>
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+#ifdef LINUX
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#include <sys/io.h>
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+#endif
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#include <sys/mman.h>
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#include <dirent.h>
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#include <ctype.h>
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+#ifdef LINUX
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#include <malloc.h>
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+#endif
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#include <string.h>
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#include <signal.h>
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+#ifdef HAVE_GETOPT_H
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#include <getopt.h>
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+#endif
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+#ifdef LINUX
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#include <linux/pci.h>
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+#else
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+#include <sys/pciio.h>
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+#include "pci.h" /*This is taken from Linux kernel*/
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+#include <osreldate.h>
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+#if __FreeBSD_version <= 500041
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+#define O_SYNC O_FSYNC
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+#endif
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+#include <sys/stat.h>
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+#endif
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#include <sys/time.h>
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#include "mchip.h"
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@ -1,66 +0,0 @@
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--- command.c.old Wed Aug 2 01:15:04 2000
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+++ command.c Thu Oct 16 07:21:39 2003
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@@ -112,7 +112,7 @@
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avi_start(fd);
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- printf("capturing %3.1f seconds to %s\n", captime, fname);
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+ fprintf(stderr, "capturing %3.1f seconds to %s\n", captime, fname);
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mchip_set_framerate(framerate);
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@@ -123,11 +123,11 @@
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double t1 = timer_end();
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n = mchip_cont_compression_read(buf, sizeof(buf));
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avi_add(fd, buf, n);
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- printf("."); fflush(stdout);
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+ fprintf(stderr, "."); fflush(stdout);
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frame_delay(framerate, t1);
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}
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avi_end(fd, mchip_hsize(), mchip_vsize(), i/timer_end());
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- printf("\ncaptured %d frames\n", i);
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+ fprintf(stderr, "\ncaptured %d frames\n", i);
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close(fd);
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}
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@@ -146,7 +146,7 @@
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f = find_next_file("snap.%d.jpg");
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write_file(f, img, n);
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display_image(f);
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- printf("captured to %s\n", f);
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+ fprintf(stderr, "captured to %s\n", f);
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while (spic_capture_pressed()) sdelay(1);
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} else {
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char *f;
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@@ -171,12 +171,12 @@
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timer_start();
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}
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frames++;
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- printf("."); fflush(stdout);
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+ fprintf(stderr, "."); fflush(stdout);
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} while (spic_capture_pressed());
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avi_end(fd, mchip_hsize(), mchip_vsize(),
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frames/timer_end());
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close(fd);
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- printf("\ncaptured %d frames to %s\n", frames, f);
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+ fprintf(stderr, "\ncaptured %d frames to %s\n", frames, f);
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display_image(NULL);
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}
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}
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@@ -197,11 +197,11 @@
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mchip_continuous_start();
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- printf("
|
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-started snap mode
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- press capture button to take photo
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- rotate jogger to change mode
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- press jogger to exit
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+ printf("\n\
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+started snap mode\n\
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+ press capture button to take photo\n\
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+ rotate jogger to change mode\n\
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+ press jogger to exit\n\
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\n");
|
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|
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sdelay(100);
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||||
@ -1,38 +0,0 @@
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--- mchip.c.orig Wed Aug 2 01:15:04 2000
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+++ mchip.c Wed Aug 18 21:11:26 2004
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@@ -174,7 +174,7 @@
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sdelay(1);
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}
|
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if (debug) {
|
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- printf(__FUNCTION__ " timeout\n");
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||||
+ printf("mchip_wait_frame timeout\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
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@@ -377,7 +377,7 @@
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delay1(MCHIP_HIC_CMD);
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|
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- printf("continuous compressed capture started\n");
|
||||
+ fprintf(stderr, "continuous compressed capture started\n");
|
||||
}
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||||
|
||||
/* read one compressed frame from the framebuffer */
|
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@@ -390,7 +390,7 @@
|
||||
void mchip_subsample(int sub)
|
||||
{
|
||||
if (debug) {
|
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- printf(__FUNCTION__ " sub=%d\n", sub);
|
||||
+ printf("mchip_subsample sub=%d\n", sub);
|
||||
}
|
||||
subsample = sub;
|
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mchip_set(MCHIP_MCC_R_SAMPLING, subsample);
|
||||
@@ -399,7 +399,7 @@
|
||||
mchip_set(MCHIP_MCC_B_XRANGE, mchip_hsize());
|
||||
mchip_set(MCHIP_MCC_B_YRANGE, mchip_vsize());
|
||||
if (debug) {
|
||||
- printf(__FUNCTION__ " done\n");
|
||||
+ printf("mchip_subsample done\n");
|
||||
}
|
||||
delay2(MCHIP_HIC_STATUS, MCHIP_HIC_STATUS_IDLE);
|
||||
}
|
||||
@ -1,268 +0,0 @@
|
||||
--- ../picturebook.old/pci.h Mon Dec 25 19:08:54 2000
|
||||
+++ pci.h Mon Dec 25 19:03:17 2000
|
||||
@@ -0,0 +1,265 @@
|
||||
+/*
|
||||
+ * $Id: pci.h,v 1.87 1998/10/11 15:13:12 mj Exp $
|
||||
+ *
|
||||
+ * PCI defines and function prototypes
|
||||
+ * Copyright 1994, Drew Eckhardt
|
||||
+ * Copyright 1997--1999 Martin Mares <mj@suse.cz>
|
||||
+ *
|
||||
+ * For more information, please consult the following manuals (look at
|
||||
+ * http://www.pcisig.com/ for how to get them):
|
||||
+ *
|
||||
+ * PCI BIOS Specification
|
||||
+ * PCI Local Bus Specification
|
||||
+ * PCI to PCI Bridge Specification
|
||||
+ * PCI System Design Guide
|
||||
+ */
|
||||
+
|
||||
+#ifndef LINUX_PCI_H
|
||||
+#define LINUX_PCI_H
|
||||
+
|
||||
+/*
|
||||
+ * Under PCI, each device has 256 bytes of configuration address space,
|
||||
+ * of which the first 64 bytes are standardized as follows:
|
||||
+ */
|
||||
+#define PCI_VENDOR_ID 0x00 /* 16 bits */
|
||||
+#define PCI_DEVICE_ID 0x02 /* 16 bits */
|
||||
+#define PCI_COMMAND 0x04 /* 16 bits */
|
||||
+#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
|
||||
+#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
|
||||
+#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
|
||||
+#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
|
||||
+#define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */
|
||||
+#define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
|
||||
+#define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
|
||||
+#define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */
|
||||
+#define PCI_COMMAND_SERR 0x100 /* Enable SERR */
|
||||
+#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
|
||||
+
|
||||
+#define PCI_STATUS 0x06 /* 16 bits */
|
||||
+#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
|
||||
+#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */
|
||||
+#define PCI_STATUS_UDF 0x40 /* Support User Definable Features [obsolete] */
|
||||
+#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
|
||||
+#define PCI_STATUS_PARITY 0x100 /* Detected parity error */
|
||||
+#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */
|
||||
+#define PCI_STATUS_DEVSEL_FAST 0x000
|
||||
+#define PCI_STATUS_DEVSEL_MEDIUM 0x200
|
||||
+#define PCI_STATUS_DEVSEL_SLOW 0x400
|
||||
+#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
|
||||
+#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
|
||||
+#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
|
||||
+#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
|
||||
+#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
|
||||
+
|
||||
+#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8
|
||||
+ revision */
|
||||
+#define PCI_REVISION_ID 0x08 /* Revision ID */
|
||||
+#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
|
||||
+#define PCI_CLASS_DEVICE 0x0a /* Device class */
|
||||
+
|
||||
+#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
|
||||
+#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
|
||||
+#define PCI_HEADER_TYPE 0x0e /* 8 bits */
|
||||
+#define PCI_HEADER_TYPE_NORMAL 0
|
||||
+#define PCI_HEADER_TYPE_BRIDGE 1
|
||||
+#define PCI_HEADER_TYPE_CARDBUS 2
|
||||
+
|
||||
+#define PCI_BIST 0x0f /* 8 bits */
|
||||
+#define PCI_BIST_CODE_MASK 0x0f /* Return result */
|
||||
+#define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */
|
||||
+#define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */
|
||||
+
|
||||
+/*
|
||||
+ * Base addresses specify locations in memory or I/O space.
|
||||
+ * Decoded size can be determined by writing a value of
|
||||
+ * 0xffffffff to the register, and reading it back. Only
|
||||
+ * 1 bits are decoded.
|
||||
+ */
|
||||
+#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
|
||||
+#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
|
||||
+#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
|
||||
+#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
|
||||
+#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
|
||||
+#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
|
||||
+#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
|
||||
+#define PCI_BASE_ADDRESS_SPACE_IO 0x01
|
||||
+#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
|
||||
+#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
|
||||
+#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */
|
||||
+#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */
|
||||
+#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
|
||||
+#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
|
||||
+#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
|
||||
+#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL)
|
||||
+/* bit 1 is reserved if address_space = 1 */
|
||||
+
|
||||
+/* Header type 0 (normal devices) */
|
||||
+#define PCI_CARDBUS_CIS 0x28
|
||||
+#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
|
||||
+#define PCI_SUBSYSTEM_ID 0x2e
|
||||
+#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
|
||||
+#define PCI_ROM_ADDRESS_ENABLE 0x01
|
||||
+#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
|
||||
+
|
||||
+#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
|
||||
+
|
||||
+/* 0x35-0x3b are reserved */
|
||||
+#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
|
||||
+#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
|
||||
+#define PCI_MIN_GNT 0x3e /* 8 bits */
|
||||
+#define PCI_MAX_LAT 0x3f /* 8 bits */
|
||||
+
|
||||
+/* Header type 1 (PCI-to-PCI bridges) */
|
||||
+#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
|
||||
+#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
|
||||
+#define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */
|
||||
+#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */
|
||||
+#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */
|
||||
+#define PCI_IO_LIMIT 0x1d
|
||||
+#define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */
|
||||
+#define PCI_IO_RANGE_TYPE_16 0x00
|
||||
+#define PCI_IO_RANGE_TYPE_32 0x01
|
||||
+#define PCI_IO_RANGE_MASK ~0x0f
|
||||
+#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
|
||||
+#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
|
||||
+#define PCI_MEMORY_LIMIT 0x22
|
||||
+#define PCI_MEMORY_RANGE_TYPE_MASK 0x0f
|
||||
+#define PCI_MEMORY_RANGE_MASK ~0x0f
|
||||
+#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
|
||||
+#define PCI_PREF_MEMORY_LIMIT 0x26
|
||||
+#define PCI_PREF_RANGE_TYPE_MASK 0x0f
|
||||
+#define PCI_PREF_RANGE_TYPE_32 0x00
|
||||
+#define PCI_PREF_RANGE_TYPE_64 0x01
|
||||
+#define PCI_PREF_RANGE_MASK ~0x0f
|
||||
+#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */
|
||||
+#define PCI_PREF_LIMIT_UPPER32 0x2c
|
||||
+#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */
|
||||
+#define PCI_IO_LIMIT_UPPER16 0x32
|
||||
+/* 0x34 same as for htype 0 */
|
||||
+/* 0x35-0x3b is reserved */
|
||||
+#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */
|
||||
+/* 0x3c-0x3d are same as for htype 0 */
|
||||
+#define PCI_BRIDGE_CONTROL 0x3e
|
||||
+#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */
|
||||
+#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */
|
||||
+#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */
|
||||
+#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */
|
||||
+#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */
|
||||
+#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
|
||||
+#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */
|
||||
+
|
||||
+/* Header type 2 (CardBus bridges) */
|
||||
+/* 0x14-0x15 reserved */
|
||||
+#define PCI_CB_SEC_STATUS 0x16 /* Secondary status */
|
||||
+#define PCI_CB_PRIMARY_BUS 0x18 /* PCI bus number */
|
||||
+#define PCI_CB_CARD_BUS 0x19 /* CardBus bus number */
|
||||
+#define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
|
||||
+#define PCI_CB_LATENCY_TIMER 0x1b /* CardBus latency timer */
|
||||
+#define PCI_CB_MEMORY_BASE_0 0x1c
|
||||
+#define PCI_CB_MEMORY_LIMIT_0 0x20
|
||||
+#define PCI_CB_MEMORY_BASE_1 0x24
|
||||
+#define PCI_CB_MEMORY_LIMIT_1 0x28
|
||||
+#define PCI_CB_IO_BASE_0 0x2c
|
||||
+#define PCI_CB_IO_BASE_0_HI 0x2e
|
||||
+#define PCI_CB_IO_LIMIT_0 0x30
|
||||
+#define PCI_CB_IO_LIMIT_0_HI 0x32
|
||||
+#define PCI_CB_IO_BASE_1 0x34
|
||||
+#define PCI_CB_IO_BASE_1_HI 0x36
|
||||
+#define PCI_CB_IO_LIMIT_1 0x38
|
||||
+#define PCI_CB_IO_LIMIT_1_HI 0x3a
|
||||
+#define PCI_CB_IO_RANGE_MASK ~0x03
|
||||
+/* 0x3c-0x3d are same as for htype 0 */
|
||||
+#define PCI_CB_BRIDGE_CONTROL 0x3e
|
||||
+#define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */
|
||||
+#define PCI_CB_BRIDGE_CTL_SERR 0x02
|
||||
+#define PCI_CB_BRIDGE_CTL_ISA 0x04
|
||||
+#define PCI_CB_BRIDGE_CTL_VGA 0x08
|
||||
+#define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
|
||||
+#define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */
|
||||
+#define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */
|
||||
+#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for both memory regions */
|
||||
+#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
||||
+#define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400
|
||||
+#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
|
||||
+#define PCI_CB_SUBSYSTEM_ID 0x42
|
||||
+#define PCI_CB_LEGACY_MODE_BASE 0x44 /* 16-bit PC Card legacy mode base address (ExCa) */
|
||||
+/* 0x48-0x7f reserved */
|
||||
+
|
||||
+/* Capability lists */
|
||||
+
|
||||
+#define PCI_CAP_LIST_ID 0 /* Capability ID */
|
||||
+#define PCI_CAP_ID_PM 0x01 /* Power Management */
|
||||
+#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */
|
||||
+#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */
|
||||
+#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */
|
||||
+#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */
|
||||
+#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
|
||||
+#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
|
||||
+#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
|
||||
+#define PCI_CAP_SIZEOF 4
|
||||
+
|
||||
+/* Power Management Registers */
|
||||
+
|
||||
+#define PCI_PM_CAP_VER_MASK 0x0007 /* Version */
|
||||
+#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */
|
||||
+#define PCI_PM_CAP_AUX_POWER 0x0010 /* Auxilliary power support */
|
||||
+#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */
|
||||
+#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */
|
||||
+#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */
|
||||
+#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */
|
||||
+#define PCI_PM_CTRL 4 /* PM control and status register */
|
||||
+#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
|
||||
+#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
|
||||
+#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */
|
||||
+#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */
|
||||
+#define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */
|
||||
+#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) */
|
||||
+#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */
|
||||
+#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */
|
||||
+#define PCI_PM_DATA_REGISTER 7 /* (??) */
|
||||
+#define PCI_PM_SIZEOF 8
|
||||
+
|
||||
+/* AGP registers */
|
||||
+
|
||||
+#define PCI_AGP_VERSION 2 /* BCD version number */
|
||||
+#define PCI_AGP_RFU 3 /* Rest of capability flags */
|
||||
+#define PCI_AGP_STATUS 4 /* Status register */
|
||||
+#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */
|
||||
+#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */
|
||||
+#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */
|
||||
+#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */
|
||||
+#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */
|
||||
+#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */
|
||||
+#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */
|
||||
+#define PCI_AGP_COMMAND 8 /* Control register */
|
||||
+#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */
|
||||
+#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */
|
||||
+#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */
|
||||
+#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */
|
||||
+#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */
|
||||
+#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */
|
||||
+#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 4x rate */
|
||||
+#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 4x rate */
|
||||
+#define PCI_AGP_SIZEOF 12
|
||||
+
|
||||
+/* Slot Identification */
|
||||
+
|
||||
+#define PCI_SID_ESR 2 /* Expansion Slot Register */
|
||||
+#define PCI_SID_ESR_NSLOTS 0x1f /* Number of expansion slots available */
|
||||
+#define PCI_SID_ESR_FIC 0x20 /* First In Chassis Flag */
|
||||
+#define PCI_SID_CHASSIS_NR 3 /* Chassis Number */
|
||||
+
|
||||
+/* Message Signalled Interrupts registers */
|
||||
+
|
||||
+#define PCI_MSI_FLAGS 2 /* Various flags */
|
||||
+#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */
|
||||
+#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */
|
||||
+#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */
|
||||
+#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */
|
||||
+#define PCI_MSI_RFU 3 /* Rest of capability flags */
|
||||
+#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */
|
||||
+#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
|
||||
+#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */
|
||||
+#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */
|
||||
+
|
||||
+#endif
|
||||
@ -1,151 +0,0 @@
|
||||
--- ../picturebook.old/pci_freebsd.c Mon Dec 25 19:09:23 2000
|
||||
+++ pci_freebsd.c Mon Dec 25 19:03:20 2000
|
||||
@@ -0,0 +1,148 @@
|
||||
+/* manipulate PCI devices from user space
|
||||
+
|
||||
+ Tridge, July 2000
|
||||
+*/
|
||||
+/*
|
||||
+ Copyright (C) Andrew Tridgell 2000
|
||||
+ Copyright (C) Takanori Watanabe 2000
|
||||
+
|
||||
+ This program is free software; you can redistribute it and/or modify
|
||||
+ it under the terms of the GNU General Public License as published by
|
||||
+ the Free Software Foundation; either version 2 of the License, or
|
||||
+ (at your option) any later version.
|
||||
+
|
||||
+ This program is distributed in the hope that it will be useful,
|
||||
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ GNU General Public License for more details.
|
||||
+
|
||||
+ You should have received a copy of the GNU General Public License
|
||||
+ along with this program; if not, write to the Free Software
|
||||
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
+*/
|
||||
+#include "capture.h"
|
||||
+#include <sys/types.h>
|
||||
+#include <sys/pciio.h>
|
||||
+#include <sys/fcntl.h>
|
||||
+#define MAX_BUS 8
|
||||
+
|
||||
+#define PCI_GETCONF_MATCH_VENDDEV (PCI_GETCONF_MATCH_VENDOR|PCI_GETCONF_MATCH_DEVICE)
|
||||
+#define MAXHANDLE 32
|
||||
+
|
||||
+static struct pci_io pio[MAXHANDLE];
|
||||
+static u_int32_t handlebmp=0;
|
||||
+static int pci_fd=-1;
|
||||
+static int pcifd_internal_init();
|
||||
+int pcifd_internal_init()
|
||||
+{
|
||||
+ return pci_fd=open("/dev/pci",O_RDWR,0);
|
||||
+}
|
||||
+/* find a PCI device and return a handle to it */
|
||||
+int pci_find_device(u32 vendor, u32 device)
|
||||
+{
|
||||
+
|
||||
+ struct pci_conf pc[4];/*I think only one is enough*/
|
||||
+ struct pci_conf_io pcfi;
|
||||
+ struct pci_match_conf pmc={{0,0,0},"",0,0xffff,0xffff,0,
|
||||
+ PCI_GETCONF_MATCH_VENDDEV};
|
||||
+ int handle;
|
||||
+ if(pci_fd==-1){
|
||||
+ if(pcifd_internal_init()==-1)
|
||||
+ return -1;
|
||||
+ }
|
||||
+ pmc.pc_vendor=vendor;
|
||||
+ pmc.pc_device=device;
|
||||
+ pcfi.pat_buf_len=sizeof(pmc);
|
||||
+ pcfi.num_patterns=1;
|
||||
+ pcfi.patterns=&pmc;
|
||||
+ pcfi.match_buf_len=sizeof(pc);
|
||||
+ pcfi.num_matches=0;
|
||||
+ pcfi.matches=pc;
|
||||
+ pcfi.offset=0;
|
||||
+ pcfi.generation=0;
|
||||
+ ioctl(pci_fd,PCIOCGETCONF,&pcfi);
|
||||
+ if(pcfi.num_matches==0){
|
||||
+ goto error;
|
||||
+ }
|
||||
+ for(handle=0;handle<32;handle++){
|
||||
+ if(!(handlebmp&(1<<handle))){
|
||||
+ pio[handle].pi_sel=pc[0].pc_sel;
|
||||
+ handlebmp|=(1<<handle);
|
||||
+ return handle;
|
||||
+ }
|
||||
+ }
|
||||
+ error:
|
||||
+ close(pci_fd);
|
||||
+ return -1;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/* routines to read and write PCI config space */
|
||||
+#define PCICFGWACCESSOR(bsize) \
|
||||
+int pci_config_write_u##bsize(int fd, int ofs, u##bsize v)\
|
||||
+{\
|
||||
+ int result;\
|
||||
+ if(fd==-1){\
|
||||
+ return -1;\
|
||||
+ }\
|
||||
+ if(pci_fd==-1){\
|
||||
+ if(pcifd_internal_init()==-1)\
|
||||
+ return -1;\
|
||||
+ }\
|
||||
+ pio[fd].pi_reg=ofs;\
|
||||
+ pio[fd].pi_width=bsize/8;\
|
||||
+ pio[fd].pi_data=v;\
|
||||
+ result=ioctl(pci_fd,PCIOCWRITE,&pio[fd]);\
|
||||
+ return result;\
|
||||
+}
|
||||
+PCICFGWACCESSOR(8)
|
||||
+PCICFGWACCESSOR(16)
|
||||
+PCICFGWACCESSOR(32)
|
||||
+#undef PCICFGWACCESSOR
|
||||
+/*Acctually define
|
||||
+ pci_config_write_u8();
|
||||
+ pci_config_write_u16();
|
||||
+ pci_config_write_u32();
|
||||
+*/
|
||||
+#define PCICFGRACCESSOR(bsize) \
|
||||
+int pci_config_read_u##bsize(int fd, int ofs, u##bsize *v)\
|
||||
+{\
|
||||
+ int result;\
|
||||
+ if(fd==-1){\
|
||||
+ return -1;\
|
||||
+ }\
|
||||
+ if(pci_fd==-1){\
|
||||
+ if(pcifd_internal_init()==-1)\
|
||||
+ return -1;\
|
||||
+ }\
|
||||
+ pio[fd].pi_reg=ofs;\
|
||||
+ pio[fd].pi_width=bsize/8;\
|
||||
+ result=ioctl(pci_fd,PCIOCREAD,&pio[fd]);\
|
||||
+ *v=pio[fd].pi_data&((bsize==32)? 0xffffffff: (1<<bsize)-1);\
|
||||
+ return result;\
|
||||
+}
|
||||
+/*Acctually define
|
||||
+ pci_config_read_u8();
|
||||
+ pci_config_read_u16();
|
||||
+ pci_config_read_u32();
|
||||
+*/
|
||||
+PCICFGRACCESSOR(8)
|
||||
+PCICFGRACCESSOR(16)
|
||||
+PCICFGRACCESSOR(32)
|
||||
+#undef PCICFGRACCESSOR
|
||||
+
|
||||
+/* find a pci base address via /proc/bus/pci/devices. This seems to be
|
||||
+ needed on some boxes. Why? */
|
||||
+u_int32_t pci_read_base_address(u32 vendor, u32 device)
|
||||
+{
|
||||
+ return 0;/* In FreeBSD???*/
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
@ -1,15 +0,0 @@
|
||||
--- ../picturebook.old/ptable.c Mon Dec 25 19:01:43 2000
|
||||
+++ ptable.c Mon Dec 25 19:03:21 2000
|
||||
@@ -38,8 +38,11 @@
|
||||
perror("virt_to_phys: open(/dev/mem)");
|
||||
exit(1);
|
||||
}
|
||||
-
|
||||
+#ifdef LINUX
|
||||
vmem = memalign(PAGE_SIZE, (npages+1)*PAGE_SIZE);
|
||||
+#else __FreeBSD__
|
||||
+ vmem = malloc((npages+1)*PAGE_SIZE);/*Never mind!PAGESIZE aligned memalign is equivalent to valloc and see valloc(3).*/
|
||||
+#endif
|
||||
if (!vmem) {
|
||||
printf("failed to allocate ptable\n");
|
||||
exit(1);
|
||||
@ -1,96 +0,0 @@
|
||||
--- setbrightness.c.orig Tue Dec 12 01:42:20 2000
|
||||
+++ setbrightness.c Sun Mar 9 18:20:58 2003
|
||||
@@ -1,20 +1,51 @@
|
||||
#define _XOPEN_SOURCE 500
|
||||
+#define __BSD_VISIBLE 1
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
#include <errno.h>
|
||||
+#ifdef LINUX
|
||||
#include <sys/io.h>
|
||||
+#endif
|
||||
#include <sys/mman.h>
|
||||
#include <dirent.h>
|
||||
#include <ctype.h>
|
||||
+#ifdef LINUX
|
||||
#include <malloc.h>
|
||||
+#endif
|
||||
#include <string.h>
|
||||
#include <signal.h>
|
||||
+#ifdef HAVE_GETOPT_H
|
||||
#include <getopt.h>
|
||||
+#endif
|
||||
+#ifdef LINUX
|
||||
#include <linux/pci.h>
|
||||
+#endif
|
||||
#include <sys/time.h>
|
||||
|
||||
+#ifdef __FreeBSD__
|
||||
+#include <machine/cpufunc.h>
|
||||
+static int deviofd=-1;
|
||||
+static int iopl(int lvl)
|
||||
+{
|
||||
+ if(lvl==0){
|
||||
+ if(deviofd!=-1){
|
||||
+ close(deviofd);
|
||||
+ deviofd=-1;
|
||||
+ }
|
||||
+ return 0;
|
||||
+ }else if(lvl==3){
|
||||
+ if(deviofd==-1){
|
||||
+ deviofd=open("/dev/io",0);
|
||||
+ }
|
||||
+ return deviofd;
|
||||
+ }
|
||||
+ return -1;
|
||||
+}
|
||||
+
|
||||
+#endif
|
||||
+
|
||||
|
||||
#define DATA_REG 0x62
|
||||
#define CST_REG 0x66
|
||||
@@ -24,28 +55,35 @@
|
||||
static void ecr_set(u16 addr, u16 value)
|
||||
{
|
||||
while (inw(CST_REG) & 3) usleep(1);
|
||||
- outw(0x81, CST_REG);
|
||||
+ outw(CST_REG, 0x81);
|
||||
while (inw(CST_REG) & 2) usleep(1);
|
||||
- outw(addr, DATA_REG);
|
||||
+ outw(DATA_REG, addr);
|
||||
while (inw(CST_REG) & 2) usleep(1);
|
||||
- outw(value, DATA_REG);
|
||||
+ outw(DATA_REG, value);
|
||||
while (inw(CST_REG) & 2) usleep(1);
|
||||
}
|
||||
|
||||
static u16 ecr_get(u16 addr)
|
||||
{
|
||||
while (inw(CST_REG) & 3) usleep(1);
|
||||
- outb(0x80, CST_REG);
|
||||
+ outb(CST_REG, 0x80);
|
||||
while (inw(CST_REG) & 2) usleep(1);
|
||||
- outb(addr, DATA_REG);
|
||||
+ outb(DATA_REG, addr);
|
||||
while (inw(CST_REG) & 2) usleep(1);
|
||||
return inw(DATA_REG);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
+ if(open("/dev/io", O_RDWR, 0) < 0)
|
||||
+ {
|
||||
+ perror("/dev/io");
|
||||
+ return 1;
|
||||
+ }
|
||||
iopl(3);
|
||||
printf("currently %x\n", ecr_get(0x96));
|
||||
- ecr_set(0x96, atoi(argv[1]));
|
||||
+ if ( argv[1] != NULL ){
|
||||
+ ecr_set(0x96, atoi(argv[1]));
|
||||
+ }
|
||||
return 0;
|
||||
}
|
||||
@ -1,278 +0,0 @@
|
||||
--- ../picturebook.old/sonypi.c Mon Dec 25 19:01:43 2000
|
||||
+++ sonypi.c Mon Dec 25 19:03:23 2000
|
||||
@@ -72,7 +72,7 @@
|
||||
#define MUTE_V2 0x29
|
||||
|
||||
static int spic_fd;
|
||||
-
|
||||
+#ifdef LINUX
|
||||
static void OUTB(u8 v, int port)
|
||||
{
|
||||
outb(v, port);
|
||||
@@ -83,7 +83,42 @@
|
||||
usleep(10);
|
||||
return inb(port);
|
||||
}
|
||||
+#define OUTW outw
|
||||
+#else ifdef __FreeBSD__
|
||||
+#include <machine/cpufunc.h>
|
||||
+static void OUTB(u8 v, unsigned int port)
|
||||
+{
|
||||
+ outb(port,v);
|
||||
+}
|
||||
+static void OUTW(u16 v, unsigned int port)
|
||||
+{
|
||||
+ outw(port,v);
|
||||
+}
|
||||
+
|
||||
+static u8 INB(unsigned int port)
|
||||
+{
|
||||
+ usleep(10);
|
||||
+ return inb(port);
|
||||
+}
|
||||
+static int deviofd=-1;
|
||||
+static int iopl(int lvl)
|
||||
+{
|
||||
+ if(lvl==0){
|
||||
+ if(deviofd!=-1){
|
||||
+ close(deviofd);
|
||||
+ deviofd=-1;
|
||||
+ }
|
||||
+ return 0;
|
||||
+ }else if(lvl==3){
|
||||
+ if(deviofd==-1){
|
||||
+ deviofd=open("/dev/io",0);
|
||||
+ }
|
||||
+ return deviofd;
|
||||
+ }
|
||||
+ return -1;
|
||||
+}
|
||||
|
||||
+#endif
|
||||
/* initialise the SPIC - this comes from the AML code in the ACPI bios */
|
||||
static void spic_srs(int fd, u16 port1, u16 port2, u8 irq)
|
||||
{
|
||||
@@ -98,7 +133,7 @@
|
||||
v2 = inw(SPI_IRQ_PORT);
|
||||
v2 &= ~(0x3 << SPI_IRQ_SHIFT);
|
||||
v2 |= (irq << SPI_IRQ_SHIFT);
|
||||
- outw(v2, SPI_IRQ_PORT);
|
||||
+ OUTW(v2, SPI_IRQ_PORT);
|
||||
|
||||
pci_config_read_u8(fd, SPI_G10L, &v);
|
||||
v = (v & 0x1F) | 0xC0;
|
||||
@@ -116,7 +151,7 @@
|
||||
|
||||
v = inw(SPI_IRQ_PORT);
|
||||
v |= (0x3 << SPI_IRQ_SHIFT);
|
||||
- outw(v, SPI_IRQ_PORT);
|
||||
+ OUTW(v, SPI_IRQ_PORT);
|
||||
close(spic_fd);
|
||||
}
|
||||
|
||||
@@ -144,10 +179,10 @@
|
||||
u8 v1;
|
||||
|
||||
while (INB(SPIC_PORT2) & 2) ;
|
||||
- outb(dev, SPIC_PORT2);
|
||||
+ OUTB(dev, SPIC_PORT2);
|
||||
|
||||
while (INB(SPIC_PORT2) & 2) ;
|
||||
- outb(fn, SPIC_PORT1);
|
||||
+ OUTB(fn, SPIC_PORT1);
|
||||
|
||||
v1 = INB(SPIC_PORT1);
|
||||
if (debug)
|
||||
@@ -160,13 +195,13 @@
|
||||
u8 v1;
|
||||
|
||||
while (INB(SPIC_PORT2) & 2) ;
|
||||
- outb(dev, SPIC_PORT2);
|
||||
+ OUTB(dev, SPIC_PORT2);
|
||||
|
||||
while (INB(SPIC_PORT2) & 2) ;
|
||||
- outb(fn, SPIC_PORT1);
|
||||
+ OUTB(fn, SPIC_PORT1);
|
||||
|
||||
while (INB(SPIC_PORT2) & 2) ;
|
||||
- outb(v, SPIC_PORT1);
|
||||
+ OUTB(v, SPIC_PORT1);
|
||||
|
||||
v1 = INB(SPIC_PORT1);
|
||||
if (debug)
|
||||
@@ -259,7 +294,7 @@
|
||||
v1 = inb(SPIC_PORT1);
|
||||
v2 = inb(SPIC_PORT2);
|
||||
if ((v2 & 0x10) == 0 || v1 == 0) return 0;
|
||||
- /* the following clears the event bits */
|
||||
+ /* the following clears the evnet bits */
|
||||
spic_call2(0x81, 0xff);
|
||||
return (signed char)v1;
|
||||
}
|
||||
@@ -292,96 +327,96 @@
|
||||
void spic_setup_vga(void)
|
||||
{
|
||||
/* :about to start capture again
*/
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000021 */
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000020 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000000F3 */
|
||||
-outw(0x2008, 0x03C4); usleep(10);
|
||||
-outw(0xF309, 0x03C4); usleep(10);
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTW(0x2008, 0x03C4); usleep(10);
|
||||
+OUTW(0xF309, 0x03C4); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000021 */
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000020 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000000F3 */
|
||||
-outw(0xF109, 0x03C4); usleep(10);
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTW(0xF109, 0x03C4); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000021 */
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000020 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 0000001F */
|
||||
-outw(0x1D09, 0x03C4); usleep(10);
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x1D09, 0x03C4); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00002621 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000026E9 */
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00002621 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000026F9 */
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
-outb(0x26, 0x03CF); usleep(10);
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
+OUTB(0x26, 0x03CF); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000021 */
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
-outb(0x21, 0x03CF); usleep(10);
|
||||
-outb(0x0F, 0x03C4); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
+OUTB(0x21, 0x03CF); usleep(10);
|
||||
+OUTB(0x0F, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000001 */
|
||||
-outb(0x0F, 0x03C4); usleep(10);
|
||||
-outb(0x01, 0x03C5); usleep(10);
|
||||
-outb(0x0F, 0x03C4); usleep(10);
|
||||
+OUTB(0x0F, 0x03C4); usleep(10);
|
||||
+OUTB(0x01, 0x03C5); usleep(10);
|
||||
+OUTB(0x0F, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000001 */
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
-outb(0x21, 0x03CF); usleep(10);
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
-outb(0x26, 0x03CF); usleep(10);
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
+OUTB(0x21, 0x03CF); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
+OUTB(0x26, 0x03CF); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outb(0xBF, 0x03CE); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTB(0xBF, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000000 */
|
||||
-outb(0xA3, 0x03CE); usleep(10);
|
||||
+OUTB(0xA3, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 0000000C */
|
||||
-outw(0xBF, 0x03CE); usleep(10);
|
||||
-outw(0x0CA3, 0x03CE); usleep(10);
|
||||
-outb(0x09, 0x03CE); usleep(10);
|
||||
+OUTW(0xBF, 0x03CE); usleep(10);
|
||||
+OUTW(0x0CA3, 0x03CE); usleep(10);
|
||||
+OUTB(0x09, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000026 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outb(0x0A, 0x03CE); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTB(0x0A, 0x03CE); usleep(10);
|
||||
inb(0x03CF); usleep(10); /* -> 00000021 */
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00000021 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000000F9 */
|
||||
-outw(0x2609, 0x03CE); usleep(10);
|
||||
-outw(0x210A, 0x03CE); usleep(10);
|
||||
-outb(0x08, 0x03C4); usleep(10);
|
||||
+OUTW(0x2609, 0x03CE); usleep(10);
|
||||
+OUTW(0x210A, 0x03CE); usleep(10);
|
||||
+OUTB(0x08, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 00002621 */
|
||||
-outb(0x09, 0x03C4); usleep(10);
|
||||
+OUTB(0x09, 0x03C4); usleep(10);
|
||||
inb(0x03C5); usleep(10); /* -> 000026F9 */
|
||||
}
|
||||
|
||||
@@ -434,3 +469,7 @@
|
||||
}
|
||||
spic_dis();
|
||||
}
|
||||
+
|
||||
+
|
||||
+
|
||||
+
|
||||
@ -1,83 +0,0 @@
|
||||
--- vaiobat.c.orig Thu Feb 8 09:15:07 2001
|
||||
+++ vaiobat.c Sun Mar 9 18:22:57 2003
|
||||
@@ -1,21 +1,54 @@
|
||||
#define _XOPEN_SOURCE 500
|
||||
+#define __BSD_VISIBLE 1
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
#include <errno.h>
|
||||
+#ifdef LINUX
|
||||
#include <sys/io.h>
|
||||
+#endif
|
||||
#include <sys/mman.h>
|
||||
#include <dirent.h>
|
||||
#include <ctype.h>
|
||||
+#ifdef LINUX
|
||||
#include <malloc.h>
|
||||
+#endif
|
||||
#include <string.h>
|
||||
#include <signal.h>
|
||||
+#ifdef HAVE_GETOPT_H
|
||||
#include <getopt.h>
|
||||
+#endif
|
||||
+#ifdef LINUX
|
||||
#include <linux/pci.h>
|
||||
+#endif
|
||||
#include <sys/time.h>
|
||||
|
||||
|
||||
+
|
||||
+#ifdef __FreeBSD__
|
||||
+#include <machine/cpufunc.h>
|
||||
+static int deviofd=-1;
|
||||
+static int iopl(int lvl)
|
||||
+{
|
||||
+ if(lvl==0){
|
||||
+ if(deviofd!=-1){
|
||||
+ close(deviofd);
|
||||
+ deviofd=-1;
|
||||
+ }
|
||||
+ return 0;
|
||||
+ }else if(lvl==3){
|
||||
+ if(deviofd==-1){
|
||||
+ deviofd=open("/dev/io",0);
|
||||
+ }
|
||||
+ return deviofd;
|
||||
+ }
|
||||
+ return -1;
|
||||
+}
|
||||
+
|
||||
+#endif
|
||||
+
|
||||
+
|
||||
#define DATA_REG 0x62
|
||||
#define CST_REG 0x66
|
||||
|
||||
@@ -25,20 +58,20 @@
|
||||
static void ecr_set(u8 addr, u8 value)
|
||||
{
|
||||
while (inb(CST_REG) & 3) usleep(1);
|
||||
- outb(0x81, CST_REG);
|
||||
+ outb(CST_REG, 0x81);
|
||||
while (inb(CST_REG) & 2) usleep(1);
|
||||
- outb(addr, DATA_REG);
|
||||
+ outb(DATA_REG, addr);
|
||||
while (inb(CST_REG) & 2) usleep(1);
|
||||
- outb(value, DATA_REG);
|
||||
+ outb(DATA_REG, value);
|
||||
while (inb(CST_REG) & 2) usleep(1);
|
||||
}
|
||||
|
||||
static u8 ecr_get(u8 addr)
|
||||
{
|
||||
while (inb(CST_REG) & 3) usleep(1);
|
||||
- outb(0x80, CST_REG);
|
||||
+ outb(CST_REG, 0x80);
|
||||
while (inb(CST_REG) & 2) usleep(1);
|
||||
- outb(addr, DATA_REG);
|
||||
+ outb(DATA_REG, addr);
|
||||
while (inb(CST_REG) & 2) usleep(1);
|
||||
return inb(DATA_REG);
|
||||
}
|
||||
@ -1,8 +0,0 @@
|
||||
Picturebook is an experimental utility for capturing from SONY VAIO camera.
|
||||
This port includes following binaries
|
||||
capture / capture utility for VAIO camera
|
||||
setbrightness / LCD brightness control tool
|
||||
(usage: setbrightness [0-255])
|
||||
vaiobat / get battery status
|
||||
|
||||
WWW: http://samba.org/picturebook/
|
||||
Loading…
Reference in New Issue
Block a user