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mirror of https://git.FreeBSD.org/ports.git synced 2025-01-06 06:30:19 +00:00

Improve cpuid() implementation:

- Correctly denote register use: for CPUID, %eax and %ecx are input/output
  and %ebx and %edx are output only
- Do not insist on using %esi and %edi, let the compiler choose a register
- Always preserve %ebx/%rbx because ABI defines them as callee-saved
- Use xchg[lq] instead of mov[lq] to restore %ebx/%rbx
- Use separate implementation for x86-64 to preserve %rbx because 32-bit
  operations would set the upper 32 bits to zero

Submitted by:	tijl
This commit is contained in:
Alexey Dokuchaev 2015-09-17 14:10:12 +00:00
parent accbd48fdd
commit 3f37100262
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=397114
2 changed files with 23 additions and 18 deletions

View File

@ -3,6 +3,7 @@
PORTNAME= appleseed
DISTVERSION= 1.2.0-beta
PORTREVISION= 1
CATEGORIES= graphics
MAINTAINER= danfe@FreeBSD.org

View File

@ -15,7 +15,7 @@
// Other platforms.
#else
@@ -421,6 +429,386 @@ uint64 System::get_process_virtual_memor
@@ -421,6 +429,390 @@ uint64 System::get_process_virtual_memor
return static_cast<uint64>(rss) * sysconf(_SC_PAGESIZE);
}
@ -43,26 +43,30 @@
+ size_t linesize;
+} mycaches[3];
+
+// %ebx is used to point to GOT (Global Offset Table) for PIC (Position
+// Independent Code) on 32-bit x86, so use %edi to preserve %ebx across
+// the call and %esi when passing CPUID arguments and return values.
+// %ebx may be used to point to GOT (Global Offset Table) for PIC (Position
+// Independent Code) on 32-bit x86, so it must be preserved. Normally
+// compilers handle this implicitly because %ebx is also callee saved, but
+// GCC before 5.0 forbids any use of %ebx with PIC, so it must be performed
+// explicitly. Unfortunately, we need a separate implementation for x86-64
+// to preserve %rbx because 32-bit operations would set the upper 32 bits
+// to zero.
+static inline void
+cpuid(uint32_t* data)
+cpuid(uint32_t* regs)
+{
+ asm("movl %%ebx, %%edi\n\t"
+ "movl %%esi, %%ebx\n\t"
+ asm(
+#if __x86_64__
+ "movq %%rbx, %q1\n\t"
+ "cpuid\n\t"
+ "movl %%ebx, %%esi\n\t"
+ "movl %%edi, %%ebx"
+ : "=a" (data[eax]),
+ "=S" (data[ebx]),
+ "=c" (data[ecx]),
+ "=d" (data[edx])
+ : "a" (data[eax]),
+ "S" (data[ebx]),
+ "c" (data[ecx]),
+ "d" (data[edx])
+ : "%edi");
+ "xchgq %%rbx, %q1"
+#else
+ "movl %%ebx, %1\n\t"
+ "cpuid\n\t"
+ "xchgl %%ebx, %1"
+#endif
+ : "+a" (regs[eax]),
+ "=r" (regs[ebx]),
+ "+c" (regs[ecx]),
+ "=d" (regs[edx]));
+}
+
+// For modern CPUs, we use Deterministic Cache Parameters (Function 04h) to