sysutils/u-boot-bhyve-riscv: New port

Configuration of u-boot for bhyve hypervisor (RISC-V architecture). This intended to run in RISC-V supervisor ("S") mode as a guest OS. Reviewed By: arrowd, manu Differential Revision: https://reviews.freebsd.org/D46257
2024-11-18 00:10:04 +00:00 · 2024-09-02 15:47:12 +01:00 · 2024-09-02 15:47:12 +01:00 · 5838f13ec0
commit 5838f13ec0
parent 5fed0aee82
12 changed files with 324 additions and 0 deletions
--- a/sysutils/Makefile
+++ b/sysutils/Makefile
@ -1510,6 +1510,7 @@
    SUBDIR += u-boot-bananapim2
    SUBDIR += u-boot-beaglebone
    SUBDIR += u-boot-bhyve-arm64
+    SUBDIR += u-boot-bhyve-riscv
    SUBDIR += u-boot-chip
    SUBDIR += u-boot-clearfog
    SUBDIR += u-boot-cubieboard
--- a/sysutils/u-boot-bhyve-riscv/Makefile
+++ b/sysutils/u-boot-bhyve-riscv/Makefile
@ -0,0 +1,12 @@
+MASTERDIR=	${.CURDIR}/../u-boot-master
+
+MODEL=		bhyve-riscv
+BOARD_CONFIG=	bhyve-riscv64_smode_defconfig
+FAMILY=		bhyve
+UBOOT_ARCH=	riscv64
+
+UBOOT_PLIST=	u-boot.bin
+
+EXTRA_PATCHES=	${.CURDIR}/files/
+
+.include "${MASTERDIR}/Makefile"
--- a/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_Kconfig
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_Kconfig
@ -0,0 +1,21 @@
+--- arch/riscv/Kconfig.orig
+++ arch/riscv/Kconfig
+@@ -24,6 +24,10 @@ config TARGET_QEMU_VIRT
+ 	bool "Support QEMU Virt Board"
+ 	select BOARD_LATE_INIT
+ 
+config TARGET_BHYVE
+	bool "FreeBSD bhyve"
+	select DM
+
+ config TARGET_SIFIVE_UNLEASHED
+ 	bool "Support SiFive Unleashed Board"
+ 
+@@ -82,6 +86,7 @@ config SPL_ZERO_MEM_BEFORE_USE
+ # board-specific options below
+ source "board/andestech/ae350/Kconfig"
+ source "board/emulation/qemu-riscv/Kconfig"
+source "board/emulation/bhyve-riscv/Kconfig"
+ source "board/microchip/mpfs_icicle/Kconfig"
+ source "board/openpiton/riscv64/Kconfig"
+ source "board/sifive/unleashed/Kconfig"
--- a/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_dts_Makefile
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_dts_Makefile
@ -0,0 +1,10 @@
+--- arch/riscv/dts/Makefile.orig
+++ arch/riscv/dts/Makefile
+@@ -11,6 +11,7 @@ dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
+ dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
+ dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
+ dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
+dtb-$(CONFIG_TARGET_BHYVE) += bhyve-riscv.dtb
+ 
+ include $(srctree)/scripts/Makefile.dts
+ 
--- a/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_dts_bhyve-riscv.dts
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-arch_riscv_dts_bhyve-riscv.dts
@ -0,0 +1,14 @@
+--- arch/riscv/dts/bhyve-riscv.dts
+++ arch/riscv/dts/bhyve-riscv.dts
+@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Empty device tree for bhyve_riscv
+
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+
+/ {
+};
--- a/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_Kconfig
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_Kconfig
@ -0,0 +1,94 @@
+--- board/emulation/bhyve-riscv/Kconfig.orig
+++ board/emulation/bhyve-riscv/Kconfig
+@@ -0,0 +1,91 @@
+if TARGET_BHYVE
+
+config SYS_BOARD
+	default "bhyve-riscv"
+
+config SYS_VENDOR
+	default "emulation"
+
+config SYS_CPU
+	default "generic"
+
+config SYS_CONFIG_NAME
+	default "bhyve-riscv"
+
+config TEXT_BASE
+	default 0x81200000 if SPL
+	default 0x80000000 if !RISCV_SMODE
+	default 0x100000000 if RISCV_SMODE && ARCH_RV64I
+	default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+
+config SPL_TEXT_BASE
+	default 0x80000000
+
+config SPL_OPENSBI_LOAD_ADDR
+	hex
+	default 0x80100000
+
+config PRE_CON_BUF_ADDR
+	hex
+	default 0x81000000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select GENERIC_RISCV
+	select SUPPORT_SPL
+	select QFW if ACPI
+	select QFW_MMIO if QFW
+	imply AHCI
+	imply SMP
+	imply BOARD_LATE_INIT
+	imply PCI_INIT_R
+	imply SPL_RAM_SUPPORT
+	imply SPL_RAM_DEVICE
+	imply CMD_PCI
+	imply CMD_POWEROFF
+	imply CMD_SBI
+	imply CMD_SCSI
+	imply CMD_PING
+	imply CMD_EXT2
+	imply CMD_EXT4
+	imply CMD_FAT
+	imply CMD_FS_GENERIC
+	imply DOS_PARTITION
+	imply ISO_PARTITION
+	imply EFI_PARTITION
+	imply SCSI_AHCI
+	imply AHCI_PCI
+	imply E1000
+	imply PCI
+	imply NVME_PCI
+	imply PCIE_ECAM_GENERIC
+	imply DM_RNG
+	imply DM_RTC
+	imply RTC_GOLDFISH
+	imply SCSI
+	imply SYS_NS16550
+	imply SIFIVE_SERIAL
+	imply HTIF_CONSOLE if 64BIT
+	imply SYSRESET
+	imply SYSRESET_CMD_POWEROFF
+	imply SYSRESET_SYSCON
+	imply VIRTIO_MMIO
+	imply VIRTIO_PCI
+	imply VIRTIO_NET
+	imply VIRTIO_BLK
+	imply MTD_NOR_FLASH
+	imply CFI_FLASH
+	imply OF_HAS_PRIOR_STAGE
+	imply VIDEO
+	imply VIDEO_BOCHS
+	imply SYS_WHITE_ON_BLACK
+	imply PRE_CONSOLE_BUFFER
+	imply USB
+	imply USB_XHCI_HCD
+	imply USB_XHCI_PCI
+	imply USB_KEYBOARD
+	imply CMD_USB
+	imply UFS
+	imply UFS_PCI
+
+endif
--- a/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_MAINTAINERS
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_MAINTAINERS
@ -0,0 +1,9 @@
+--- board/emulation/bhyve-riscv/MAINTAINERS.orig
+++ board/emulation/bhyve-riscv/MAINTAINERS
+@@ -0,0 +1,6 @@
+RISCV 'BHYVE' BOARD
+M:	Ruslan Bukin <br@bsdpad.com>
+S:	Maintained
+F:	board/emulation/bhyve-riscv/
+F:	include/configs/bhyve-riscv.h
+F:	configs/bhyve-riscv64_smode_defconfig
--- a/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_Makefile
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_Makefile
@ -0,0 +1,6 @@
+--- board/emulation/bhyve-riscv/Makefile.orig
+++ board/emulation/bhyve-riscv/Makefile
+@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y	+= bhyve-riscv.o
--- a/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_bhyve-riscv.c
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-board_emulation_bhyve-riscv_bhyve-riscv.c
@ -0,0 +1,75 @@
+++ board/emulation/bhyve-riscv/bhyve-riscv.c.orig
+++ board/emulation/bhyve-riscv/bhyve-riscv.c
+@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <env.h>
+#include <fdtdec.h>
+#include <image.h>
+#include <log.h>
+#include <spl.h>
+#include <init.h>
+#include <usb.h>
+#include <virtio_types.h>
+#include <virtio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if IS_ENABLED(CONFIG_MTD_NOR_FLASH)
+int is_flash_available(void)
+{
+	if (!ofnode_equal(ofnode_by_compatible(ofnode_null(), "cfi-flash"),
+			 ofnode_null()))
+		return 1;
+
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+	/* start usb so that usb keyboard can be used as input device */
+	if (CONFIG_IS_ENABLED(USB_KEYBOARD))
+		usb_init();
+
+	/*
+	* Make sure virtio bus is enumerated so that peripherals
+	* on the virtio bus can be discovered by their drivers
+	*/
+	virtio_init();
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL
+u32 spl_boot_device(void)
+{
+	/* RISC-V QEMU only supports RAM as SPL boot device */
+	return BOOT_DEVICE_RAM;
+}
+#endif
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* boot using first FIT config */
+	return 0;
+}
+#endif
+
+void *board_fdt_blob_setup(int *err)
+{
+	*err = 0;
+	/* Stored the DTB address there during our init */
+	return (void *)(ulong)gd->arch.firmware_fdt_addr;
+}
--- a/sysutils/u-boot-bhyve-riscv/files/patch-configs_bhyve-riscv64_smode_defconfig
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-configs_bhyve-riscv64_smode_defconfig
@ -0,0 +1,44 @@
+--- configs/bhyve-riscv64_smode_defconfig.orig
+++ configs/bhyve-riscv64_smode_defconfig
+@@ -0,0 +1,41 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100200000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="bhyve-riscv"
+CONFIG_SYS_LOAD_ADDR=0x100000000
+CONFIG_TARGET_BHYVE=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_NVEDIT_EFI=y
+# CONFIG_CMD_MII is not set
+# CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_MTD=y
+CONFIG_FLASH_SHOW_PROGRESS=0
+CONFIG_SYS_MAX_FLASH_BANKS=2
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x10000
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_DEBUG_UART_CLOCK=3686400
+CONFIG_DEBUG_SBI_CONSOLE=n
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_SERIAL_PRESENT=y
+CONFIG_CONS_INDEX=1
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SERIAL_SEARCH_ALL=y
+CONFIG_DM_DEBUG=n
--- a/sysutils/u-boot-bhyve-riscv/files/patch-include_configs_bhyve-riscv.h
+++ b/sysutils/u-boot-bhyve-riscv/files/patch-include_configs_bhyve-riscv.h
@ -0,0 +1,29 @@
+--- include/configs/bhyve-riscv.h.orig
+++ include/configs/bhyve-riscv.h
+@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2017 Tuomas Tynkkynen
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <linux/sizes.h>
+
+#define CFG_SYS_SDRAM_BASE	0x100000000
+#define CFG_SYS_SERIAL0	0x10000
+#define CFG_SYS_NS16550_CLK	1000000
+
+#define BOOT_TARGET_DEVICES(func)	\
+	func(VIRTIO, virtio, 0)
+
+#include <config_distro_bootcmd.h>
+
+#define CFG_EXTRA_ENV_SETTINGS	\
+	"fdtfile=bhyve-riscv.dst\0"	\
+	"fdt_addr_r=0x100100000\0"	\
+	"kernel_addr_r=0x100200000\0"	\
+	BOOTENV
+
+#endif /* __CONFIG_H */
--- a/sysutils/u-boot-bhyve-riscv/pkg-descr
+++ b/sysutils/u-boot-bhyve-riscv/pkg-descr
@ -0,0 +1,9 @@
+U-Boot loader for riscv bhyve
+
+The loader is configured to boot automatically from the first VirtIO block
+device.  Specify
+
+  -o bootrom=$LOCALBASE/share/u-boot/u-boot-bhyve-riscv/u-boot.bin
+
+in bhyve(8) parameters.  Note that this loader is experimental as the riscv
+bhyve port is still under development.