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Add uisp 1.0b, a versatile programmer for atmel AVR microcontrollers.

Browse Source 
PR:		25145
Submitted by:	Bruno Schwander <bruno@tinkerbox.org>
This commit is contained in:
Will Andrews 2001-03-11 02:11:17 +00:00
parent 150a3bf8a5
commit 591d1fab89
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=39517
12 changed files with 716 additions and 0 deletions
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1
devel/Makefile
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@ -421,6 +421,7 @@
SUBDIR += uclmmbase
SUBDIR += ucpp
SUBDIR += uds
SUBDIR += uisp
SUBDIR += understand_c
SUBDIR += ups-debug
SUBDIR += veepee

25
devel/uisp/Makefile Normal file
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@ -0,0 +1,25 @@
# New ports collection makefile for: uisp
# Date created: 17 Feb 2001
# Whom: Bruno Schwander<bruno@tinkerbox.org>
#
# $FreeBSD$
#
PORTNAME= uisp
PORTVERSION= 1.0b
PORTREVISION= 1
CATEGORIES= devel
MASTER_SITES= http://medo.fov.uni-mb.si/mapp/uTools/
EXTRACT_SUFX= .src.tar.gz
MAINTAINER= ports@FreeBSD.org
WRKSRC= ${WRKDIR}/${PORTNAME}-${PORTVERSION}/src
USE_GMAKE= yes
post-patch:
${PERL} -pi -e "s@-O3@${CFLAGS}@g; \
s@g\+\+@${CXX}@g" ${WRKSRC}/Makefile
.include <bsd.port.mk>

1
devel/uisp/distinfo Normal file
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@ -0,0 +1 @@
MD5 (uisp-1.0b.src.tar.gz) = 3945498181030e6c000f705ac53b920f

295
devel/uisp/files/patch-DAPA.C Normal file
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@ -0,0 +1,295 @@
diff -urN DAPA.C.orig DAPA.C
--- DAPA.C.orig Tue Aug 29 17:08:28 2000
+++ DAPA.C Fri Feb 16 20:57:23 2001
@@ -20,6 +20,7 @@
#include <stdio.h>
#include <stdlib.h>
+#if !defined (__FreeBSD__)
#include <linux/serial_reg.h>
/* sys/io.h is the correct file. If your system doesn't have that
@@ -35,8 +36,20 @@
#endif
*/
#include "io_uisp.h"
+#endif
#include <unistd.h>
+
+#if defined(__FreeBSD__)
+#define __KERNEL__
+#define LP_STATS
+#include "linux_lp.h"
+#undef __KERNEL__
+#undef LP_STATS
+#include "linux_serial_reg.h"
+#endif
+
+#if !defined (__FreeBSD__)
#ifdef DIRTYHACK
#define __KERNEL__
#endif
@@ -44,6 +57,14 @@
#ifdef DIRTYHACK
#undef __KERNEL__
#endif
+#else
+#include <sys/fcntl.h>
+#include <machine/cpufunc.h>
+#include <machine/sysarch.h>
+#define ioperm i386_set_ioperm
+#define _outb(a,b) outb(b,a)
+#endif
+
#include <signal.h>
#include <sys/time.h>
#include "Global.h"
@@ -133,51 +154,51 @@
void TDAPA::Reset(){
switch(pa_type){
case PAT_DAPA:
- outb(DAPA_SCK, BASE+2); usleep(1000); /* sck = 0, reset = 0 */
- outb(DAPA_SCK | DAPA_RESET, BASE+2); /* sck = 0, reset = 1 */
+ _outb(DAPA_SCK, BASE+2); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(DAPA_SCK | DAPA_RESET, BASE+2); /* sck = 0, reset = 1 */
usleep(1000);
- outb(DAPA_SCK, BASE+2); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(DAPA_SCK, BASE+2); usleep(1000); /* sck = 0, reset = 0 */
break;
case PAT_DASA:
- outb(UART_LCR_WLEN8 | UART_LCR_SBC, UART_LCR+BASE); /* select IER and FCR */
- outb(UART_MCR_DTR | UART_MCR_RTS, UART_MCR+BASE); /* enable port, no int. */
- outb(0, UART_IER+BASE); /* disable int */
- outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, UART_FCR+BASE); /* disable fifo */
+ _outb(UART_LCR_WLEN8 | UART_LCR_SBC, UART_LCR+BASE); /* select IER and FCR */
+ _outb(UART_MCR_DTR | UART_MCR_RTS, UART_MCR+BASE); /* enable port, no int. */
+ _outb(0, UART_IER+BASE); /* disable int */
+ _outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, UART_FCR+BASE); /* disable fifo */
inb(UART_LSR+BASE); /* read int flags to clear them for good */
inb(UART_RX+BASE); /* read int flags to clear them for good */
inb(UART_IIR+BASE); /* read int flags to clear them for good */
inb(UART_MSR+BASE); /* read int flags to clear them for good */
usleep(100000); /* clk = sck = reset = 1 */
- outb(0, UART_LCR+BASE); usleep(1000); /* clk = 0, sck = 1, reset = 1 */
- outb(DASA_RESET, UART_MCR+BASE); usleep(1000); /* clk = 0, sck = 0, reset = 1 */
- outb(0, UART_MCR+BASE); usleep(1000); /* clk = 0, sck = 0, reset = 0 */
+ _outb(0, UART_LCR+BASE); usleep(1000); /* clk = 0, sck = 1, reset = 1 */
+ _outb(DASA_RESET, UART_MCR+BASE); usleep(1000); /* clk = 0, sck = 0, reset = 1 */
+ _outb(0, UART_MCR+BASE); usleep(1000); /* clk = 0, sck = 0, reset = 0 */
break;
case PAT_STK200:
- outb(STK2_ENA1 | STK2_ENA2, BASE); /* leave MCU */
+ _outb(STK2_ENA1 | STK2_ENA2, BASE); /* leave MCU */
usleep(30000);
- outb(STK2_ENA2, BASE); usleep(1000); /* sck = Z, reset = 0 */
- outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
- outb(STK2_RESET, BASE); usleep(1000); /* sck = 0, reset = 1 */
- outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(STK2_ENA2, BASE); usleep(1000); /* sck = Z, reset = 0 */
+ _outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(STK2_RESET, BASE); usleep(1000); /* sck = 0, reset = 1 */
+ _outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
break;
case PAT_ABB:
- outb(0,BASE+2); usleep(30000); /* leave MCU */
- outb(0,BASE); /* reset=sck=0 */
- outb(ABB_EN,BASE+2); usleep(30000); /* enable 244 driver */
- outb(ABB_RESET,BASE); usleep(30000); /* reset=1 */
- outb(0,BASE); usleep(30000); /* reset=0*/
+ _outb(0,BASE+2); usleep(30000); /* leave MCU */
+ _outb(0,BASE); /* reset=sck=0 */
+ _outb(ABB_EN,BASE+2); usleep(30000); /* enable 244 driver */
+ _outb(ABB_RESET,BASE); usleep(30000); /* reset=1 */
+ _outb(0,BASE); usleep(30000); /* reset=0*/
// fprintf(stderr, "quiting ... test\n"); exit(1);
break;
case PAT_AVRISP:
- outb(AVRISP_ENA, BASE); /* leave MCU */
+ _outb(AVRISP_ENA, BASE); /* leave MCU */
usleep(30000);
- outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
- outb(AVRISP_RESET, BASE); usleep(1000); /* sck = 0, reset = 1 */
- outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
+ _outb(AVRISP_RESET, BASE); usleep(1000); /* sck = 0, reset = 1 */
+ _outb(0, BASE); usleep(1000); /* sck = 0, reset = 0 */
break;
}
@@ -188,7 +209,7 @@
void TDAPA::JustReset(){
switch(pa_type){
case PAT_DAPA:
- outb(DAPA_SCK | DAPA_RESET, BASE+2); /* sck = 0, reset = 1 */
+ _outb(DAPA_SCK | DAPA_RESET, BASE+2); /* sck = 0, reset = 1 */
break;
case PAT_DASA:
@@ -196,16 +217,16 @@
break;
case PAT_STK200:
- outb(STK2_ENA2 | STK2_RESET, BASE); /* sck = Z, reset = 1 */
+ _outb(STK2_ENA2 | STK2_RESET, BASE); /* sck = Z, reset = 1 */
break;
case PAT_ABB:
- outb(ABB_EN,BASE+2); /* enable 244 driver */
- outb(ABB_RESET,BASE); /* reset=1 */
+ _outb(ABB_EN,BASE+2); /* enable 244 driver */
+ _outb(ABB_RESET,BASE); /* reset=1 */
break;
case PAT_AVRISP:
- outb(AVRISP_ENA | AVRISP_RESET, BASE); /* Leave MCU, reset = 1 */
+ _outb(AVRISP_ENA | AVRISP_RESET, BASE); /* Leave MCU, reset = 1 */
break;
}
usleep(20000);
@@ -214,28 +235,28 @@
void TDAPA::SCKtoRetryEnable(){
switch(pa_type){
case PAT_DAPA:
- outb(0, BASE+2); BigDelay();
- outb(DAPA_SCK, BASE+2); BigDelay();
+ _outb(0, BASE+2); BigDelay();
+ _outb(DAPA_SCK, BASE+2); BigDelay();
break;
case PAT_DASA:
- outb (DASA_SCK, UART_MCR+BASE); BigDelay (); /* sck = 1 */
- outb (0, UART_MCR+BASE); BigDelay (); /* sck = 0 */
+ _outb (DASA_SCK, UART_MCR+BASE); BigDelay (); /* sck = 1 */
+ _outb (0, UART_MCR+BASE); BigDelay (); /* sck = 0 */
break;
case PAT_STK200:
- outb(STK2_SCK, BASE); BigDelay(); /* sck = 1 */
- outb(0, BASE); BigDelay(); /* sck = 0 */
+ _outb(STK2_SCK, BASE); BigDelay(); /* sck = 1 */
+ _outb(0, BASE); BigDelay(); /* sck = 0 */
break;
case PAT_ABB:
- outb(ABB_SCK, BASE); BigDelay();
- outb(0, BASE); BigDelay();
+ _outb(ABB_SCK, BASE); BigDelay();
+ _outb(0, BASE); BigDelay();
break;
case PAT_AVRISP:
- outb(AVRISP_SCK, BASE); BigDelay(); /* sck = 1 */
- outb(0, BASE); BigDelay(); /* sck = 0 */
+ _outb(AVRISP_SCK, BASE); BigDelay(); /* sck = 1 */
+ _outb(0, BASE); BigDelay(); /* sck = 0 */
break;
}
}
@@ -246,56 +267,56 @@
for (i=0, mask = 0x80; i<8; i++, mask >>= 1){
switch(pa_type){
case PAT_DAPA:
- outb(b & mask ? DAPA_DOUT : 0, BASE); BigDelay();
- outb(0, BASE+2); BigDelay ();
+ _outb(b & mask ? DAPA_DOUT : 0, BASE); BigDelay();
+ _outb(0, BASE+2); BigDelay ();
if (!(inb (BASE+1) & DAPA_DIN)){received |= mask;}
- outb(DAPA_SCK, BASE+2); BigDelay();
+ _outb(DAPA_SCK, BASE+2); BigDelay();
break;
case PAT_DASA:
- outb((b & mask) ? DASA_MOSI : 0, UART_LCR+BASE); /* send data bit, sck = 0 */
- outb(DASA_SCK, UART_MCR+BASE); /* send data bit, sck = 1 */
+ _outb((b & mask) ? DASA_MOSI : 0, UART_LCR+BASE); /* send data bit, sck = 0 */
+ _outb(DASA_SCK, UART_MCR+BASE); /* send data bit, sck = 1 */
if(longsck > -2)
BigDelay();
if(i == 0 && longsck > 5) usleep(longsck); /* allow recharging of the capacitor */
if (inb(UART_MSR+BASE) & DASA_MISO){received |= mask;} /* read data bit */
- outb(0, UART_MCR+BASE); /* send data bit, sck = 0 */
- outb(DASA_MOSI, UART_LCR+BASE); /* power it up */
+ _outb(0, UART_MCR+BASE); /* send data bit, sck = 0 */
+ _outb(DASA_MOSI, UART_LCR+BASE); /* power it up */
if(longsck > -1)
BigDelay();
break;
case PAT_STK200:
- outb((b & mask) ? STK2_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? STK2_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
if (inb(BASE + 1) & STK2_DIN){received |= mask;} /* read data bit */
/* send data bit, sck = 1 */
- outb(STK2_SCK | ((b & mask) ? STK2_DOUT : 0), BASE);
+ _outb(STK2_SCK | ((b & mask) ? STK2_DOUT : 0), BASE);
BigDelay();
- outb((b & mask) ? STK2_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? STK2_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
break;
case PAT_ABB:
- outb((b & mask) ? ABB_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? ABB_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
if (!(inb(BASE + 1) & ABB_DIN)){received |= mask;} /* read data bit */
/* send data bit, sck = 1 */
- outb(ABB_SCK | ((b & mask) ? ABB_DOUT : 0), BASE);
+ _outb(ABB_SCK | ((b & mask) ? ABB_DOUT : 0), BASE);
BigDelay();
- outb((b & mask) ? ABB_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? ABB_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
break;
case PAT_AVRISP:
- outb((b & mask) ? AVRISP_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? AVRISP_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
if (inb(BASE + 1) & AVRISP_DIN){received |= mask;} /* read data bit */
/* send data bit, sck = 1 */
- outb(AVRISP_SCK | ((b & mask) ? AVRISP_DOUT : 0), BASE);
+ _outb(AVRISP_SCK | ((b & mask) ? AVRISP_DOUT : 0), BASE);
BigDelay();
- outb((b & mask) ? AVRISP_DOUT : 0, BASE); /* send data bit, sck = 0 */
+ _outb((b & mask) ? AVRISP_DOUT : 0, BASE); /* send data bit, sck = 0 */
BigDelay();
break;
}
@@ -397,9 +418,9 @@
if (pa_type == PAT_AVRISP) { /* Check if dongle is present */
unsigned char avrisp_present=1;
- outb(AVRISP_DNG_OUT | AVRISP_ENA, BASE);
+ _outb(AVRISP_DNG_OUT | AVRISP_ENA, BASE);
if (!(inb(BASE+1)&AVRISP_DNG_IN)) avrisp_present=0;
- outb(AVRISP_ENA, BASE);
+ _outb(AVRISP_ENA, BASE);
if (inb(BASE+1)&AVRISP_DNG_IN) avrisp_present=0;
if (!(inb(BASE+1)&AVRISP_DNG_IN1)) avrisp_present=0;
if (!avrisp_present) {
@@ -410,12 +431,12 @@
TDAPA::~TDAPA(){
switch(pa_type){
- case PAT_DAPA: outb(DAPA_SCK | DAPA_RESET, BASE+2); break;
- case PAT_DASA: outb(DASA_RESET | DASA_SCK, UART_MCR+BASE);
- outb(DASA_MOSI, UART_LCR+BASE); break;
- case PAT_STK200: outb(STK2_ENA1 | STK2_ENA2 | STK2_RESET, BASE); break;
- case PAT_ABB: outb(0, BASE+2); outb(ABB_RESET, BASE); break;
- case PAT_AVRISP: outb(AVRISP_ENA | AVRISP_RESET, BASE); break;
+ case PAT_DAPA: _outb(DAPA_SCK | DAPA_RESET, BASE+2); break;
+ case PAT_DASA: _outb(DASA_RESET | DASA_SCK, UART_MCR+BASE);
+ _outb(DASA_MOSI, UART_LCR+BASE); break;
+ case PAT_STK200: _outb(STK2_ENA1 | STK2_ENA2 | STK2_RESET, BASE); break;
+ case PAT_ABB: _outb(0, BASE+2); _outb(ABB_RESET, BASE); break;
+ case PAT_AVRISP: _outb(AVRISP_ENA | AVRISP_RESET, BASE); break;
}
}

13
devel/uisp/files/patch-DAPA.h Normal file
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@ -0,0 +1,13 @@
diff -urN DAPA.h.orig DAPA.h
--- DAPA.h.orig Tue Aug 29 17:08:28 2000
+++ DAPA.h Fri Feb 16 19:58:33 2001
@@ -12,7 +12,9 @@
#include <sys/types.h>
#include <time.h>
#include <unistd.h>
+#if !defined (__FreeBSD__)
#include <string>
+#endif
#include "Error.h"
class TDAPA {

15
devel/uisp/files/patch-Serial.C Normal file
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@ -0,0 +1,15 @@
diff -urN Serial.C.orig Serial.C
--- Serial.C.orig Tue Aug 29 17:08:28 2000
+++ Serial.C Fri Feb 16 19:33:18 2001
@@ -10,7 +10,11 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#if defined (__FreeBSD__)
+#include <termios.h>
+#else
#include <termio.h>
+#endif
#include <fcntl.h>
#include "Global.h"
#include "Serial.h"

192
devel/uisp/files/patch-linux_lp.h Normal file
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@ -0,0 +1,192 @@
diff -urN linux_lp.h.orig linux_lp.h
--- linux_lp.h.orig Thu Jan 1 00:00:00 1970
+++ linux_lp.h Fri Feb 16 19:44:52 2001
@@ -0,0 +1,188 @@
+#ifndef _LINUX_LP_H
+#define _LINUX_LP_H
+
+/*
+ * usr/include/linux/lp.h c.1991-1992 James Wiegand
+ * many modifications copyright (C) 1992 Michael K. Johnson
+ * Interrupt support added 1993 Nigel Gamble
+ */
+
+/*
+ * Per POSIX guidelines, this module reserves the LP and lp prefixes
+ * These are the lp_table[minor].flags flags...
+ */
+#define LP_EXIST 0x0001
+#define LP_SELEC 0x0002
+#define LP_BUSY 0x0004
+#define LP_BUSY_BIT_POS 2
+#define LP_OFFL 0x0008
+#define LP_NOPA 0x0010
+#define LP_ERR 0x0020
+#define LP_ABORT 0x0040
+#define LP_CAREFUL 0x0080 /* obsoleted -arca */
+#define LP_ABORTOPEN 0x0100
+#define LP_TRUST_IRQ 0x0200
+
+/* timeout for each character. This is relative to bus cycles -- it
+ * is the count in a busy loop. THIS IS THE VALUE TO CHANGE if you
+ * have extremely slow printing, or if the machine seems to slow down
+ * a lot when you print. If you have slow printing, increase this
+ * number and recompile, and if your system gets bogged down, decrease
+ * this number. This can be changed with the tunelp(8) command as well.
+ */
+
+#define LP_INIT_CHAR 1000
+
+/* The parallel port specs apparently say that there needs to be
+ * a .5usec wait before and after the strobe.
+ */
+
+#define LP_INIT_WAIT 1
+
+/* This is the amount of time that the driver waits for the printer to
+ * catch up when the printer's buffer appears to be filled. If you
+ * want to tune this and have a fast printer (i.e. HPIIIP), decrease
+ * this number, and if you have a slow printer, increase this number.
+ * This is in hundredths of a second, the default 2 being .05 second.
+ * Or use the tunelp(8) command, which is especially nice if you want
+ * change back and forth between character and graphics printing, which
+ * are wildly different...
+ */
+
+#define LP_INIT_TIME 2
+
+/* IOCTL numbers */
+#define LPCHAR 0x0601 /* corresponds to LP_INIT_CHAR */
+#define LPTIME 0x0602 /* corresponds to LP_INIT_TIME */
+#define LPABORT 0x0604 /* call with TRUE arg to abort on error,
+ FALSE to retry. Default is retry. */
+#define LPSETIRQ 0x0605 /* call with new IRQ number,
+ or 0 for polling (no IRQ) */
+#define LPGETIRQ 0x0606 /* get the current IRQ number */
+#define LPWAIT 0x0608 /* corresponds to LP_INIT_WAIT */
+/* NOTE: LPCAREFUL is obsoleted and it' s always the default right now -arca */
+#define LPCAREFUL 0x0609 /* call with TRUE arg to require out-of-paper, off-
+ line, and error indicators good on all writes,
+ FALSE to ignore them. Default is ignore. */
+#define LPABORTOPEN 0x060a /* call with TRUE arg to abort open() on error,
+ FALSE to ignore error. Default is ignore. */
+#define LPGETSTATUS 0x060b /* return LP_S(minor) */
+#define LPRESET 0x060c /* reset printer */
+#ifdef LP_STATS
+#define LPGETSTATS 0x060d /* get statistics (struct lp_stats) */
+#endif
+#define LPGETFLAGS 0x060e /* get status flags */
+#define LPTRUSTIRQ 0x060f /* set/unset the LP_TRUST_IRQ flag */
+
+/* timeout for printk'ing a timeout, in jiffies (100ths of a second).
+ This is also used for re-checking error conditions if LP_ABORT is
+ not set. This is the default behavior. */
+
+#define LP_TIMEOUT_INTERRUPT (60 * HZ)
+#define LP_TIMEOUT_POLLED (10 * HZ)
+
+#ifdef __KERNEL__
+
+/* Magic numbers for defining port-device mappings */
+#define LP_PARPORT_UNSPEC -4
+#define LP_PARPORT_AUTO -3
+#define LP_PARPORT_OFF -2
+#define LP_PARPORT_NONE -1
+
+#define LP_F(minor) lp_table[(minor)].flags /* flags for busy, etc. */
+#define LP_CHAR(minor) lp_table[(minor)].chars /* busy timeout */
+#define LP_TIME(minor) lp_table[(minor)].time /* wait time */
+#define LP_WAIT(minor) lp_table[(minor)].wait /* strobe wait */
+#define LP_IRQ(minor) lp_table[(minor)].dev->port->irq /* interrupt # */
+ /* PARPORT_IRQ_NONE means polled */
+#ifdef LP_STATS
+#define LP_STAT(minor) lp_table[(minor)].stats /* statistics area */
+#endif
+#define LP_BUFFER_SIZE 256
+
+#define LP_BASE(x) lp_table[(x)].dev->port->base
+
+#ifdef LP_STATS
+struct lp_stats {
+ unsigned long chars;
+ unsigned long sleeps;
+ unsigned int maxrun;
+ unsigned int maxwait;
+ unsigned int meanwait;
+ unsigned int mdev;
+};
+#endif
+
+struct lp_struct {
+ struct pardevice *dev;
+ unsigned long flags;
+ unsigned int chars;
+ unsigned int time;
+ unsigned int wait;
+ char *lp_buffer;
+#ifdef LP_STATS
+ unsigned int lastcall;
+ unsigned int runchars;
+ struct lp_stats stats;
+#endif
+ struct wait_queue *wait_q;
+ unsigned int last_error;
+ volatile unsigned int irq_detected:1;
+ volatile unsigned int irq_missed:1;
+};
+
+/*
+ * The following constants describe the various signals of the printer port
+ * hardware. Note that the hardware inverts some signals and that some
+ * signals are active low. An example is LP_STROBE, which must be programmed
+ * with 1 for being active and 0 for being inactive, because the strobe signal
+ * gets inverted, but it is also active low.
+ */
+
+/*
+ * bit defines for 8255 status port
+ * base + 1
+ * accessed with LP_S(minor), which gets the byte...
+ */
+#define LP_PBUSY 0x80 /* inverted input, active high */
+#define LP_PACK 0x40 /* unchanged input, active low */
+#define LP_POUTPA 0x20 /* unchanged input, active high */
+#define LP_PSELECD 0x10 /* unchanged input, active high */
+#define LP_PERRORP 0x08 /* unchanged input, active low */
+
+/*
+ * defines for 8255 control port
+ * base + 2
+ * accessed with LP_C(minor)
+ */
+#define LP_PINTEN 0x10 /* high to read data in or-ed with data out */
+#define LP_PSELECP 0x08 /* inverted output, active low */
+#define LP_PINITP 0x04 /* unchanged output, active low */
+#define LP_PAUTOLF 0x02 /* inverted output, active low */
+#define LP_PSTROBE 0x01 /* short high output on raising edge */
+
+/*
+ * the value written to ports to test existence. PC-style ports will
+ * return the value written. AT-style ports will return 0. so why not
+ * make them the same ?
+ */
+#define LP_DUMMY 0x00
+
+/*
+ * This is the port delay time, in microseconds.
+ * It is used only in the lp_init() and lp_reset() routine.
+ */
+#define LP_DELAY 50
+
+#define LP_POLLED(minor) (lp_table[(minor)].dev->port->irq == PARPORT_IRQ_NONE)
+#define LP_PREEMPTED(minor) (lp_table[(minor)].dev->port->waithead != NULL)
+
+/*
+ * function prototypes
+ */
+
+extern int lp_init(void);
+
+#endif
+
+#endif

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devel/uisp/files/patch-linux_serial_reg.h Normal file
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diff -urN linux_serial_reg.h.orig linux_serial_reg.h
--- linux_serial_reg.h.orig Thu Jan 1 00:00:00 1970
+++ linux_serial_reg.h Fri Feb 16 20:04:51 2001
@@ -0,0 +1,144 @@
+/*
+ * include/linux/serial_reg.h
+ *
+ * Copyright (C) 1992, 1994 by Theodore Ts'o.
+ *
+ * Redistribution of this file is permitted under the terms of the GNU
+ * Public License (GPL)
+ *
+ * These are the UART port assignments, expressed as offsets from the base
+ * register. These assignments should hold for any serial port based on
+ * a 8250, 16450, or 16550(A).
+ */
+
+#ifndef _LINUX_SERIAL_REG_H
+#define _LINUX_SERIAL_REG_H
+
+#define UART_RX 0 /* In: Receive buffer (DLAB=0) */
+#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */
+#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */
+#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */
+#define UART_IER 1 /* Out: Interrupt Enable Register */
+#define UART_IIR 2 /* In: Interrupt ID Register */
+#define UART_FCR 2 /* Out: FIFO Control Register */
+#define UART_EFR 2 /* I/O: Extended Features Register */
+ /* (DLAB=1, 16C660 only) */
+#define UART_LCR 3 /* Out: Line Control Register */
+#define UART_MCR 4 /* Out: Modem Control Register */
+#define UART_LSR 5 /* In: Line Status Register */
+#define UART_MSR 6 /* In: Modem Status Register */
+#define UART_SCR 7 /* I/O: Scratch Register */
+
+/*
+ * These are the definitions for the FIFO Control Register
+ * (16650 only)
+ */
+#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
+#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
+#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
+#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */
+#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */
+#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */
+#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */
+#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */
+/* 16650 redefinitions */
+#define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */
+#define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */
+#define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */
+#define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */
+#define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */
+#define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */
+#define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */
+#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */
+/* TI 16750 definitions */
+#define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode */
+
+/*
+ * These are the definitions for the Line Control Register
+ *
+ * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
+ * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
+ */
+#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
+#define UART_LCR_SBC 0x40 /* Set break control */
+#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
+#define UART_LCR_EPAR 0x10 /* Even parity select */
+#define UART_LCR_PARITY 0x08 /* Parity Enable */
+#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
+#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
+#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
+#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
+#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
+
+/*
+ * These are the definitions for the Line Status Register
+ */
+#define UART_LSR_TEMT 0x40 /* Transmitter empty */
+#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
+#define UART_LSR_BI 0x10 /* Break interrupt indicator */
+#define UART_LSR_FE 0x08 /* Frame error indicator */
+#define UART_LSR_PE 0x04 /* Parity error indicator */
+#define UART_LSR_OE 0x02 /* Overrun error indicator */
+#define UART_LSR_DR 0x01 /* Receiver data ready */
+
+/*
+ * These are the definitions for the Interrupt Identification Register
+ */
+#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
+#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
+
+#define UART_IIR_MSI 0x00 /* Modem status interrupt */
+#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
+#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
+#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
+
+/*
+ * These are the definitions for the Interrupt Enable Register
+ */
+#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
+#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
+#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
+#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
+/*
+ * Sleep mode for ST16650 and TI16750.
+ * Note that for 16650, EFR-bit 4 must be selected as well.
+ */
+#define UART_IERX_SLEEP 0x10 /* Enable sleep mode */
+
+/*
+ * These are the definitions for the Modem Control Register
+ */
+#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
+#define UART_MCR_OUT2 0x08 /* Out2 complement */
+#define UART_MCR_OUT1 0x04 /* Out1 complement */
+#define UART_MCR_RTS 0x02 /* RTS complement */
+#define UART_MCR_DTR 0x01 /* DTR complement */
+
+/*
+ * These are the definitions for the Modem Status Register
+ */
+#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
+#define UART_MSR_RI 0x40 /* Ring Indicator */
+#define UART_MSR_DSR 0x20 /* Data Set Ready */
+#define UART_MSR_CTS 0x10 /* Clear to Send */
+#define UART_MSR_DDCD 0x08 /* Delta DCD */
+#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
+#define UART_MSR_DDSR 0x02 /* Delta DSR */
+#define UART_MSR_DCTS 0x01 /* Delta CTS */
+#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
+
+/*
+ * These are the definitions for the Extended Features Register
+ * (StarTech 16C660 only, when DLAB=1)
+ */
+#define UART_EFR_CTS 0x80 /* CTS flow control */
+#define UART_EFR_RTS 0x40 /* RTS flow control */
+#define UART_EFR_SCD 0x20 /* Special character detect */
+#define UART_EFR_ECB 0x10 /* Enhanced control bit */
+/*
+ * the low four bits control software flow control
+ */
+
+#endif /* _LINUX_SERIAL_REG_H */
+

14
devel/uisp/patch-af Normal file
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@ -0,0 +1,14 @@
--- Makefile.orig Sat Feb 17 09:32:42 2001
+++ Makefile Sat Feb 17 09:30:12 2001
@@ -0,0 +1,11 @@
+all:
+ $(MAKE) -C src all
+
+clean:
+ $(MAKE) -C src clean
+
+install:
+ $(MAKE) -C src install
+
+
+

1
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@ -0,0 +1 @@
A versatile programmer for atmel AVR microcontrollers

10
devel/uisp/pkg-descr Normal file
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@ -0,0 +1,10 @@
This is aport of uisp, a tool to program an atmel AVR microcontroller
through your parallel or serial port. Several programming hardware are
supported, the only one I have tested and the simplest one (no component)
is the in-circuit parallel programmer. Schematics are available online.
WWW: http://medo.fov.uni-mb.si/mapp/uTools/index.html
- Bruno
bruno@tinkerbox.org

1
devel/uisp/pkg-plist Normal file
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@ -0,0 +1 @@
bin/uisp