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mirror of https://git.FreeBSD.org/ports.git synced 2025-01-27 10:03:20 +00:00

Add new port for Silq

Silq is a high-level programming language for quantum computing with a
strong static type system.

The compiler is accompanied by a large collection of example files, some of
them implementing solutions to Microsoft's Q# Summer 2018 and Winter 2019
coding contest on Codeforces.

The port version is based on the date of the latest commit to the project
repository, aince there have been no regular releases, yet. (Only one tag
has been created to mark the state presented on a conference.)

Approved by:	antoine (mentor)
This commit is contained in:
Stefan Eßer 2020-06-18 06:55:33 +00:00
parent 36b536a29c
commit 87390b7440
Notes: svn2git 2021-03-31 03:12:20 +00:00
svn path=/head/; revision=539528
5 changed files with 409 additions and 0 deletions

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@ -319,6 +319,7 @@
SUBDIR += sdcc
SUBDIR += see
SUBDIR += seed7
SUBDIR += silq
SUBDIR += siod
SUBDIR += sisc
SUBDIR += sketchy

34
lang/silq/Makefile Normal file
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@ -0,0 +1,34 @@
# $FreeBSD$
PORTNAME= silq
PORTVERSION= 20200617
CATEGORIES= lang math science
MAINTAINER= se@FreeBSD.org
COMMENT= Silq from ETH Zürich
LICENSE= BSL
LICENSE_FILE= ${WRKSRC}/LICENSE
ONLY_FOR_ARCHS= amd64
ONLY_FOR_ARCHS_REASON= unknown status of the D language compiler (lang/ldc) on ${ARCH}
BUILD_DEPENDS= ldmd2:lang/ldc
USE_GITHUB= yes
GH_TUPLE= eth-sri:silq:27c399d \
tgehr:ast:2812b33:ast/ast \
tgehr:util:27168af:util/util
OPTIONS_DEFINE= EXAMPLES
do-build:
cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -of=silq
do-install:
${INSTALL_PROGRAM} ${WRKSRC}/silq ${STAGEDIR}${PREFIX}/bin/
${MKDIR} ${STAGEDIR}${EXAMPLESDIR}
cd ${WRKSRC}/test && ${COPYTREE_SHARE} . ${STAGEDIR}${EXAMPLESDIR} "-name *\.slq"
.include <bsd.port.mk>

7
lang/silq/distinfo Normal file
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@ -0,0 +1,7 @@
TIMESTAMP = 1592393472
SHA256 (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 6d6a287bc4e956414cecc0d4984b106d33f9da0b3825af4f9e638a83dd780361
SIZE (eth-sri-silq-20200617-27c399d_GH0.tar.gz) = 264879
SHA256 (tgehr-ast-2812b33_GH0.tar.gz) = 5dc2763272cd32b7dec0be08ede2155593b45795464615620658ddfe87b99580
SIZE (tgehr-ast-2812b33_GH0.tar.gz) = 72161
SHA256 (tgehr-util-27168af_GH0.tar.gz) = 78363e2ec4942698f66c798fff03ac652ed30173fc8759369709032295aa221a
SIZE (tgehr-util-27168af_GH0.tar.gz) = 9449

11
lang/silq/pkg-descr Normal file
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@ -0,0 +1,11 @@
Silq is a high-level programming language for quantum computing with a strong
static type system.
The compiler is accompanied by a large collection of example files, some of
them implementing solutions to Microsoft's Q# Summer 2018 and Winter 2019
coding contest on Codeforces.
The project web-site provides detailed information on the language and its
concepts and use.
WWW: https://silq.ethz.ch/

356
lang/silq/pkg-plist Normal file
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@ -0,0 +1,356 @@
bin/silq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayAddAssign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayConcatReassign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayElements.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayEntryDup.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assertTypeError.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignFromArray.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQcontrol.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQuantumArray.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badIndexReplacement.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badReverse.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badTypes.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolVectorLength.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bug.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/builtInToPrelude.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureConst.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureShadow.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureTwice.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalArrayAliasing.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalHadamard.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQuantumSuperposition.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closure.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureArrayTest.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A2/2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A2/2_incorrect.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/B1/4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/C2/8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/c1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/c2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/e1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/e2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/a.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/b.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/c.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/d.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/e.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/f.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/f2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/g.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/h.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/i.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c3_2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceAssign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceFunction.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceInt.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceIntToNat.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceNegativeNatural.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceReal.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceVector.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/communicationGame.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumingVector.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conv.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertIntToZ.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertNatToInt.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertTuple.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depType.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/detectZero.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0_2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishGHZandW.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishStates.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dump.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dump2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dumpExit.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dumpExit2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupConvertForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnQuantumIf.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/flipAll.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/for.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetChain.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetClassical.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetConst.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetConstInvalid.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetDup.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetDup2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElse.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElseInvalid.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIndexSlice.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetNonReconstructableInvalid.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetRedefine.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSpecialPatterns.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetWhile.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/fromW.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionBodyParseError.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericAddition.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/groverDiffusion.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/hIndex.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifError.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifFalseReassign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDup.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds9.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/intUintBoolConversion.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/integerPhase.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/invQ.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/invalidReturnTypeInference.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthMismatch.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedAssign.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConstArg.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/majorityOracle.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/map1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/map2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/matchCoerce.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureArray.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureHadamard.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureReversePhase.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureUint.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureVector.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mfreeImplicitForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiReplace.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiResultIndexReplace.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedClosure.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedGlobal.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedMeasure.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedTupleMatch.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/newForLoopRangeSyntax.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/noImplicitForget.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/opAssignReverse.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterizedSimulation.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseArrayOfVectorReturn.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseError.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseError2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch10.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch11.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch12.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch6.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch7.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch8.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch9.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseEstimation.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseQ.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/piToRat.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/print.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qft.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumControlClassicalAssignment.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quid-updates.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/rationalPhase.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignArrayLength.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignConst.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDepVar.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDependentTypeParameter.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursion.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/renatoCommunicationGameV1.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat100.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeatUntil.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndex.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/ret2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/retClosure.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/retPi.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reuseCapturedName.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseArithmetic.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseEarlyReturn.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseFlatten.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH0.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH2.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH3.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH4.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH5.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapDiffArrays.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testParamSameName.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFTNorm.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFTPretty2.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeError.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeFunCallCoerce.slq
%%PORTEXAMPLES%%%%EXAMPLESDIR%%/uncomputeOnArrayAssignment.slq
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%%PORTEXAMPLES%%%%EXAMPLESDIR%%/xwing.slq