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sysutils/bhyve+: remove unused patch
This commit is contained in:
parent
1edfb96d8f
commit
93566bfca3
@ -1,132 +0,0 @@
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--- usr.sbin/bhyve/pci_emul.h.orig 2021-08-19 23:00:57 UTC
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+++ usr.sbin/bhyve/pci_emul.h
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@@ -146,6 +146,7 @@ struct pci_devinst {
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struct msix_table_entry *table; /* allocated at runtime */
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void *pba_page;
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int pba_page_offset;
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+ void *table_page;
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} pi_msix;
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void *pi_arg; /* devemu-private data */
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--- usr.sbin/bhyve/pci_passthru.c.orig 2021-08-19 23:00:57 UTC
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+++ usr.sbin/bhyve/pci_passthru.c
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@@ -324,13 +324,14 @@ msix_table_read(struct passthru_softc *sc, uint64_t of
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return (data);
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}
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+ /* Should make this an assert. */
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if (offset < pi->pi_msix.table_offset)
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return (-1);
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offset -= pi->pi_msix.table_offset;
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index = offset / MSIX_TABLE_ENTRY_SIZE;
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if (index >= pi->pi_msix.table_count)
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- return (-1);
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+ goto readbar;
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entry = &pi->pi_msix.table[index];
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entry_offset = offset % MSIX_TABLE_ENTRY_SIZE;
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@@ -357,6 +358,33 @@ msix_table_read(struct passthru_softc *sc, uint64_t of
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}
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return (data);
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+
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+readbar:
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+ if (pi->pi_msix.table_page != NULL && offset < 4096) {
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+ switch(size) {
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+ case 1:
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+ src8 = (uint8_t *)(pi->pi_msix.table_page + offset);
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+ data = *src8;
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+ break;
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+ case 2:
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+ src16 = (uint16_t *)(pi->pi_msix.table_page + offset);
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+ data = *src16;
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+ break;
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+ case 4:
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+ src32 = (uint32_t *)(pi->pi_msix.table_page + offset);
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+ data = *src32;
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+ break;
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+ case 8:
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+ src64 = (uint64_t *)(pi->pi_msix.table_page + offset);
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+ data = *src64;
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+ break;
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+ default:
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+ return (-1);
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+ }
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+ return (data);
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+ }
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+
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+ return (-1);
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}
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static void
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@@ -403,13 +431,14 @@ msix_table_write(struct vmctx *ctx, int vcpu, struct p
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return;
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}
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+ /* Should make this an assert. */
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if (offset < pi->pi_msix.table_offset)
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return;
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offset -= pi->pi_msix.table_offset;
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index = offset / MSIX_TABLE_ENTRY_SIZE;
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if (index >= pi->pi_msix.table_count)
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- return;
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+ goto writebar;
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entry = &pi->pi_msix.table[index];
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entry_offset = offset % MSIX_TABLE_ENTRY_SIZE;
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@@ -432,6 +461,31 @@ msix_table_write(struct vmctx *ctx, int vcpu, struct p
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entry->msg_data, entry->vector_control);
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}
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}
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+
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+writebar:
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+ if (pi->pi_msix.table_page != NULL && offset < 4096) {
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+ switch(size) {
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+ case 1:
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+ dest8 = (uint8_t *)(pi->pi_msix.table_page + offset);
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+ *dest8 = data;
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+ break;
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+ case 2:
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+ dest16 = (uint16_t *)(pi->pi_msix.table_page + offset);
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+ *dest16 = data;
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+ break;
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+ case 4:
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+ dest32 = (uint32_t *)(pi->pi_msix.table_page + offset);
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+ *dest32 = data;
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+ break;
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+ case 8:
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+ dest64 = (uint64_t *)(pi->pi_msix.table_page + offset);
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+ *dest64 = data;
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+ break;
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+ default:
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+ break;
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+ }
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+ return;
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+ }
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}
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static int
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@@ -466,6 +520,21 @@ init_msix_table(struct vmctx *ctx, struct passthru_sof
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idx = pi->pi_msix.table_bar;
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start = pi->pi_bar[idx].addr;
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remaining = pi->pi_bar[idx].size;
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+
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+ /*
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+ * Some device (against better documentation of the spec)
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+ * are mapping other usable address space into the same page
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+ * as the end of the MSI-X tables.
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+ * At least Intel AX200 being one of them apparently.
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+ * Map the page and fall back to it for any reads/writes outside
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+ * the MSI-X table in msix_table_{read,write}.
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+ */
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+ pi->pi_msix.table_page = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
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+ MAP_SHARED, memfd, sc->psc_bar[idx].addr + table_offset);
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+ if (pi->pi_msix.table_page == MAP_FAILED) {
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+ warn("Failed to map table page for MSI-X on %d/%d/%d", b, s, f);
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+ return (-1);
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+ }
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if (pi->pi_msix.pba_bar == pi->pi_msix.table_bar) {
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pba_offset = pi->pi_msix.pba_offset;
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