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cad/yosys: update 0.43 → 0.44
Reported by: portscout
This commit is contained in:
parent
d4a4ba3070
commit
a6386b2152
@ -1,6 +1,6 @@
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PORTNAME= yosys
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PORTNAME= yosys
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DISTVERSIONPREFIX= yosys-
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DISTVERSIONPREFIX= yosys-
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DISTVERSION= 0.43
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DISTVERSION= 0.44
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CATEGORIES= cad
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CATEGORIES= cad
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MAINTAINER= yuri@FreeBSD.org
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MAINTAINER= yuri@FreeBSD.org
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@ -1,3 +1,3 @@
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TIMESTAMP = 1720600290
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TIMESTAMP = 1723002938
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SHA256 (YosysHQ-yosys-yosys-0.43_GH0.tar.gz) = e341d7c3712f58787554c28c12c9f4cb5e102f9ff154f5a5e49238c1adfb309f
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SHA256 (YosysHQ-yosys-yosys-0.44_GH0.tar.gz) = 3394b1fdb1c67c362513518d6049ef7db72ba45cca629af22bd52bf46b405ed2
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SIZE (YosysHQ-yosys-yosys-0.43_GH0.tar.gz) = 2808745
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SIZE (YosysHQ-yosys-yosys-0.44_GH0.tar.gz) = 2840442
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@ -109,6 +109,7 @@ bin/yosys-witness
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%%DATADIR%%/include/frontends/ast/ast_binding.h
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%%DATADIR%%/include/frontends/ast/ast_binding.h
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%%DATADIR%%/include/frontends/blif/blifparse.h
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%%DATADIR%%/include/frontends/blif/blifparse.h
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%%DATADIR%%/include/kernel/binding.h
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%%DATADIR%%/include/kernel/binding.h
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%%DATADIR%%/include/kernel/bitpattern.h
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%%DATADIR%%/include/kernel/cellaigs.h
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%%DATADIR%%/include/kernel/cellaigs.h
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%%DATADIR%%/include/kernel/celledges.h
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%%DATADIR%%/include/kernel/celledges.h
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%%DATADIR%%/include/kernel/celltypes.h
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%%DATADIR%%/include/kernel/celltypes.h
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@ -197,6 +198,15 @@ bin/yosys-witness
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%%DATADIR%%/lattice/latches_map.v
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%%DATADIR%%/lattice/latches_map.v
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%%DATADIR%%/lattice/lutrams.txt
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%%DATADIR%%/lattice/lutrams.txt
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%%DATADIR%%/lattice/lutrams_map.v
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%%DATADIR%%/lattice/lutrams_map.v
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%%DATADIR%%/microchip/LSRAM.txt
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%%DATADIR%%/microchip/LSRAM_map.v
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%%DATADIR%%/microchip/arith_map.v
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%%DATADIR%%/microchip/brams_defs.vh
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%%DATADIR%%/microchip/cells_map.v
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%%DATADIR%%/microchip/cells_sim.v
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%%DATADIR%%/microchip/polarfire_dsp_map.v
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%%DATADIR%%/microchip/uSRAM.txt
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%%DATADIR%%/microchip/uSRAM_map.v
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%%DATADIR%%/mul2dsp.v
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%%DATADIR%%/mul2dsp.v
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%%DATADIR%%/nexus/arith_map.v
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%%DATADIR%%/nexus/arith_map.v
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%%DATADIR%%/nexus/brams.txt
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%%DATADIR%%/nexus/brams.txt
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