-Update libtool and libltdl to 2.2.6a.
-Remove devel/libtool15 and devel/libltdl15.
-Fix ports build with libtool22/libltdl22.
-Bump ports that depend on libltdl22 due to shared library version change.
-Explain what to do update in the UPDATING.
It has been tested with GNOME2, XFCE4, KDE3, KDE4 and other many wm/desktop
and applications in the runtime.
With help: marcus and kwm
Pointyhat-exp: a few times by pav
Tested by: pgollucci, "Romain Tartière" <romain@blogreen.org>, and
a few MarcusCom CVS users. Also, I might have missed a few.
Repocopy by: marcus
Approved by: portmgr
- Split boost port to separate components, with boost-all metaport
PR: ports/137054
Submitted by: Alexander Churanov <churanov.port.maintainer@gmail.com> (maintainer)
- pkg-message --> files/pkg-message.in; [2]
- don't hardcode DOCSDIR to default in it
- display it only when NOPORTDOCS it's not defined
- rework PORTDOCS installation a little [3]
- bump PORTREVISION [3]
Submitted by: Sahil Tandon [1][3], itetcu@ [2]
Reported by: QATty [1]
Approved by: maintainer
language. It includes:
* Verilog::Getopt which parses command line options similar to C++ and VCS.
* Verilog::Language which knows the language keywords and parses numbers.
* Verilog::Netlist which builds netlists out of Verilog files. This allows
easy scripts to determine things such as the hierarchy of modules.
* Verilog::Parser invokes callbacks for language tokens.
* Verilog::Preproc preprocesses the language, and allows reading
post-processed files right from Perl without temporary files.
* vpassert inserts PLIish warnings and assertions for any simulator.
* vppreproc preprocesses the complete Verilog 2001 and SystemVerilog language.
* vrename renames and cross-references Verilog symbols. Vrename creates Verilog
cross references and makes it easy to rename signal and module names across
multiple files. Vrename uses a simple and efficient three step process.
First, you run vrename to create a list of signals in the design. You then
edit this list, changing as many symbols as you wish. Vrename is then run a
second time to apply the changes.
WWW: http://www.veripool.org/wiki/verilog-perl
PR: ports/134124
Submitted by: Otacílio de Araújo Ramos Neto <otacilio.neto at ee.ufcg.edu.br>
