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mirror of https://git.FreeBSD.org/ports.git synced 2024-12-25 04:43:33 +00:00
freebsd-ports/cad
Akinori MUSHA 0aaeab888e Add oregano, schematic capture and simulation of electrical circuits.
PR:		ports/25202
Submitted by:	Anders Andersson <anders@codefactory.se>
2001-03-07 11:00:31 +00:00
..
acs Upgrade to 0.28. 2000-12-15 12:15:37 +00:00
chipmunk Make the share files' installation permission safe. 2001-02-20 17:28:29 +00:00
cider - Prevent possible buffer overflow 2000-10-28 16:13:06 +00:00
electric Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
felt
geda Implement USE_GTK, part 1. 2000-10-05 06:36:23 +00:00
irsim Update to 9.4 and update homepage 2001-02-13 13:30:17 +00:00
iverilog forgot bison dependence 2001-02-22 04:58:04 +00:00
kaskade Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
magic Update to version 6.5.1 and homepage 2001-02-13 13:25:26 +00:00
mars Massive style enforcement - use ^I instead of spaces for variables identation. 2001-01-16 17:33:20 +00:00
oregano Add oregano, schematic capture and simulation of electrical circuits. 2001-03-07 11:00:31 +00:00
pcb fix X manpage error with XFree86-4 2001-01-09 19:35:23 +00:00
pisces Better handling for the imake dependency when XFREE86_VERSION != 3. The 2000-11-08 22:55:29 +00:00
pkg
qcad Update to version 1.4.6 2001-02-28 14:20:01 +00:00
qcad2 Update to version 1.4.6 2001-02-28 14:20:01 +00:00
sceptre SCEPTRE (System for Circuit Evaluation and Prediction of Transient 2001-02-11 06:58:11 +00:00
sis typo clean up police: \s -> \t 2001-02-14 05:43:00 +00:00
spice Default hardcopy prints to Postscript format instead of plot(5) which we 2001-03-06 11:08:56 +00:00
tkgate Update to version 1.6e 2000-11-18 15:46:14 +00:00
xcircuit Update to version 2.2.1 2001-02-14 12:41:38 +00:00
Makefile Add oregano, schematic capture and simulation of electrical circuits. 2001-03-07 11:00:31 +00:00