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(Capability Hardware Enhanced RISC Instructions) ISA. It also has enhanced support for MIPS CPUs, particularly MIPS64. Sponsored by: DARPA, AFRL
7 lines
256 B
Plaintext
7 lines
256 B
Plaintext
CHERI-Clang is a fork of the Clang compiler with support for the CHERI
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(Capability Hardware Enhanced RISC Instructions) ISA.
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It also has enhanced support for MIPS CPUs, particularly MIPS64.
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WWW: http://www.cl.cam.ac.uk/research/security/ctsrd/cheri.html
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