mirror of
https://git.FreeBSD.org/ports.git
synced 2024-12-27 05:10:36 +00:00
133 lines
3.0 KiB
Makefile
133 lines
3.0 KiB
Makefile
# $FreeBSD$
|
|
#
|
|
|
|
COMMENT = CAD tools
|
|
|
|
SUBDIR += NASTRAN-95
|
|
SUBDIR += PrusaSlicer
|
|
SUBDIR += abc
|
|
SUBDIR += admesh
|
|
SUBDIR += adms
|
|
SUBDIR += alliance
|
|
SUBDIR += astk-client
|
|
SUBDIR += astk-serveur
|
|
SUBDIR += atlc
|
|
SUBDIR += basicdsp
|
|
SUBDIR += brlcad
|
|
SUBDIR += calculix
|
|
SUBDIR += calculix-ccx
|
|
SUBDIR += caneda
|
|
SUBDIR += cascade
|
|
SUBDIR += cascade-compiler
|
|
SUBDIR += chipvault
|
|
SUBDIR += cura
|
|
SUBDIR += cura-engine
|
|
SUBDIR += digital
|
|
SUBDIR += dinotrace
|
|
SUBDIR += ecpprog
|
|
SUBDIR += electric
|
|
SUBDIR += electric-ng
|
|
SUBDIR += fasm
|
|
SUBDIR += fdm_materials
|
|
SUBDIR += feappv
|
|
SUBDIR += fidocadj
|
|
SUBDIR += freecad
|
|
SUBDIR += freehdl
|
|
SUBDIR += fritzing
|
|
SUBDIR += gdsreader
|
|
SUBDIR += gdt
|
|
SUBDIR += geda
|
|
SUBDIR += gerbv
|
|
SUBDIR += ghdl
|
|
SUBDIR += gmsh
|
|
SUBDIR += gnucap
|
|
SUBDIR += gplcver
|
|
SUBDIR += graywolf
|
|
SUBDIR += gspiceui
|
|
SUBDIR += gtkwave
|
|
SUBDIR += horizon-eda
|
|
SUBDIR += ifcopenshell
|
|
SUBDIR += impact
|
|
SUBDIR += irsim
|
|
SUBDIR += iverilog
|
|
SUBDIR += jspice3
|
|
SUBDIR += k40-whisperer
|
|
SUBDIR += kicad
|
|
SUBDIR += kicad-devel
|
|
SUBDIR += kicad-doc
|
|
SUBDIR += kicad-library-footprints
|
|
SUBDIR += kicad-library-footprints-devel
|
|
SUBDIR += kicad-library-packages3d
|
|
SUBDIR += kicad-library-packages3d-devel
|
|
SUBDIR += kicad-library-symbols
|
|
SUBDIR += kicad-library-symbols-devel
|
|
SUBDIR += kicad-library-templates
|
|
SUBDIR += kicad-library-templates-devel
|
|
SUBDIR += klayout
|
|
SUBDIR += ktechlab
|
|
SUBDIR += ldraw
|
|
SUBDIR += leocad
|
|
SUBDIR += lepton-eda
|
|
SUBDIR += libopencad
|
|
SUBDIR += librecad
|
|
SUBDIR += libredwg
|
|
SUBDIR += librepcb
|
|
SUBDIR += linux-eagle5
|
|
SUBDIR += logisim
|
|
SUBDIR += magic
|
|
SUBDIR += meshdev
|
|
SUBDIR += meshlab
|
|
SUBDIR += netgen
|
|
SUBDIR += netgen-lvs
|
|
SUBDIR += ngspice_rework
|
|
SUBDIR += nvc
|
|
SUBDIR += opencascade
|
|
SUBDIR += openctm
|
|
SUBDIR += openfpgaloader
|
|
SUBDIR += openroad
|
|
SUBDIR += openscad
|
|
SUBDIR += openscad-devel
|
|
SUBDIR += openvsp
|
|
SUBDIR += oregano
|
|
SUBDIR += p5-GDS2
|
|
SUBDIR += p5-Verilog-Perl
|
|
SUBDIR += pcb
|
|
SUBDIR += pdnmesh
|
|
SUBDIR += py-cadquery
|
|
SUBDIR += py-cq-editor
|
|
SUBDIR += py-ezdxf
|
|
SUBDIR += py-gdspy
|
|
SUBDIR += py-lcapy
|
|
SUBDIR += py-ocp
|
|
SUBDIR += py-phidl
|
|
SUBDIR += py-pyfda
|
|
SUBDIR += python-gdsii
|
|
SUBDIR += qcad
|
|
SUBDIR += qelectrotech
|
|
SUBDIR += qflow
|
|
SUBDIR += qmls
|
|
SUBDIR += qrouter
|
|
SUBDIR += repsnapper
|
|
SUBDIR += rubygem-gdsii
|
|
SUBDIR += scotch
|
|
SUBDIR += solvespace
|
|
SUBDIR += sp2sp
|
|
SUBDIR += spice
|
|
SUBDIR += stepcode
|
|
SUBDIR += sumo
|
|
SUBDIR += sweethome3d
|
|
SUBDIR += tkgate
|
|
SUBDIR += tochnog
|
|
SUBDIR += transcalc
|
|
SUBDIR += uranium
|
|
SUBDIR += varkon
|
|
SUBDIR += verilator
|
|
SUBDIR += verilog-mode.el
|
|
SUBDIR += veroroute
|
|
SUBDIR += xcircuit
|
|
SUBDIR += yosys
|
|
SUBDIR += z88
|
|
SUBDIR += zcad
|
|
|
|
.include <bsd.port.subdir.mk>
|