mirror of
https://git.FreeBSD.org/ports.git
synced 2025-01-08 06:48:28 +00:00
dbd39ca660
PR: 117086 Tested by: -exp runs
28 lines
607 B
Makefile
28 lines
607 B
Makefile
# ex:ts=8
|
|
# New ports collection makefile for: iverilog
|
|
# Date created: Feb 13, 2001
|
|
# Whom: Ying-Chieh Liao <ijliao@FreeBSD.org>
|
|
#
|
|
# $FreeBSD$
|
|
#
|
|
|
|
PORTNAME= iverilog
|
|
PORTVERSION= 0.8.5
|
|
PORTREVISION= 1
|
|
CATEGORIES= cad
|
|
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \
|
|
ftp://ftp.geda.seul.org/pub/geda/dist/
|
|
DISTNAME= verilog-${PORTVERSION}
|
|
|
|
MAINTAINER= stas@FreeBSD.org
|
|
COMMENT= A Verilog simulation and synthesis tool
|
|
|
|
GNU_CONFIGURE= yes
|
|
USE_BISON= build
|
|
USE_GMAKE= yes
|
|
USE_GNOME= gnometarget
|
|
|
|
MAN1= iverilog-vpi.1 iverilog.1 vvp.1 iverilog-fpga.1
|
|
|
|
.include <bsd.port.mk>
|