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37e782dfbc
minor COMMENT typos and surrounding whitespace fixes. Categories A-C. CR: D196 Approved by: portmgr (bapt)
24 lines
488 B
Makefile
24 lines
488 B
Makefile
# Created by: ijliao
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# $FreeBSD$
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PORTNAME= gplcver
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PORTVERSION= 2.12.a
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CATEGORIES= cad
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MASTER_SITES= SF/${PORTNAME}/${PORTNAME}/${PORTVERSION:R}${PORTVERSION:E}/
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DISTNAME= ${PORTNAME}-${PORTVERSION:R}${PORTVERSION:E}.src
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MAINTAINER= ports@FreeBSD.org
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COMMENT= Verilog HDL simulator
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USES= tar:bzip2 gmake
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BUILD_WRKSRC= ${WRKSRC}/src
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MAKEFILE= makefile.freebsd
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PLIST_FILES= bin/cver
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do-install:
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${INSTALL_PROGRAM} ${WRKSRC}/bin/cver ${STAGEDIR}${PREFIX}/bin
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.include <bsd.port.mk>
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