Tobias Kortkamp 310623bb97 *: Clean up some things ... - Fix typos - Remove duplicate variables - Remove nop or unreferenced variables - Add missing ports to the build - Clean up commented PORTREVISION - Add missing USES Reported by: portscan		2021-09-03 15:01:58 +02:00
..
abc
admesh
adms
alliance
appcsxcad
archimedes
astk-client
astk-serveur
atlc
basicdsp
brlcad
calculix
calculix-ccx
caneda
cascade
cascade-compiler
chipvault
csxcad	math/cgal: Update to 5.3	2021-09-02 20:47:50 +02:00
cura
cura-engine
digital
dinotrace
ecpprog
electric
electric-ng
fasm
fdm_materials
feappv
fidocadj
freecad
freehdl
fritzing
gdsreader
gdt
geda
gerbv
ghdl
gmsh
gnucap
gplcver
graywolf
gspiceui
gtkwave
horizon-eda
ifcopenshell
impact
irsim
iverilog
jspice3
k40-whisperer
kicad
kicad-devel	*: Clean up some things	2021-09-03 15:01:58 +02:00
kicad-doc
kicad-library-footprints
kicad-library-footprints-devel
kicad-library-packages3d
kicad-library-packages3d-devel
kicad-library-symbols
kicad-library-symbols-devel
kicad-library-templates
kicad-library-templates-devel
klayout
ktechlab
ldraw
ldview
leocad	cad/leocad: Add CPE information	2021-08-31 12:07:27 +00:00
lepton-eda
libopencad
librecad
libredwg
librepcb
linux-eagle5
logisim
magic
meshdev
meshlab
NASTRAN-95
netgen
netgen-lvs
ngspice_rework
nvc
opencascade
openctm
openfpgaloader
openroad
openscad	cad/openscad*: Fix build against CGAL 5.3	2021-09-02 20:44:59 +02:00
openscad-devel	cad/openscad*: Fix build against CGAL 5.3	2021-09-02 20:44:59 +02:00
openvsp
oregano
p5-GDS2
p5-Verilog-Perl
pcb
pdnmesh
PrusaSlicer	math/cgal: Update to 5.3	2021-09-02 20:47:50 +02:00
py-cadquery
py-cq-editor
py-ezdxf
py-gdspy
py-lcapy
py-ocp
py-phidl
py-pyfda
python-gdsii
qcad
qcsxcad
qelectrotech
qflow
qmls
qrouter
repsnapper
rubygem-gdsii
scotch
solvespace
sp2sp
spice
stepcode
stm32flash
sumo
sweethome3d
tkgate
tochnog
uranium
verilator
verilog-mode.el
veroroute
xcircuit
yosys
z88
zcad
Makefile