2019-11-28 17:01:31 +00:00
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/*-
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2023-05-10 15:40:58 +00:00
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* SPDX-License-Identifier: BSD-2-Clause
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2019-11-28 17:01:31 +00:00
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*
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* Copyright (c) 2019 Michal Meloun <mmel@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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/*
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* Thermometer and thermal zones driver for RockChip SoCs.
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* Calibration data are taken from Linux, because this part of SoC
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* is undocumented in TRM.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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2023-12-26 17:43:48 +00:00
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#include <dev/clk/clk.h>
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2023-12-26 17:49:19 +00:00
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#include <dev/hwreset/hwreset.h>
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2023-12-26 17:58:15 +00:00
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#include <dev/syscon/syscon.h>
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2019-11-28 17:01:31 +00:00
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "syscon_if.h"
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#include "rk_tsadc_if.h"
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2022-08-11 08:26:39 +00:00
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/* Version of HW */
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#define TSADC_V2 1
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#define TSADC_V3 2
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#define TSADC_V7 3
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2019-11-28 17:01:31 +00:00
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/* Global registers */
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#define TSADC_USER_CON 0x000
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#define TSADC_AUTO_CON 0x004
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#define TSADC_AUTO_CON_POL_HI (1 << 8)
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#define TSADC_AUTO_SRC_EN(x) (1 << (4 + (x)))
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#define TSADC_AUTO_Q_SEL (1 << 1) /* V3 only */
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#define TSADC_AUTO_CON_AUTO (1 << 0)
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#define TSADC_INT_EN 0x008
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#define TSADC_INT_EN_2CRU_EN_SRC(x) (1 << (8 + (x)))
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#define TSADC_INT_EN_2GPIO_EN_SRC(x) (1 << (4 + (x)))
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#define TSADC_INT_PD 0x00c
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#define TSADC_DATA(x) (0x20 + (x) * 0x04)
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#define TSADC_COMP_INT(x) (0x30 + (x) * 0x04)
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#define TSADC_COMP_INT_SRC_EN(x) (1 << (0 + (x)))
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#define TSADC_COMP_SHUT(x) (0x40 + (x) * 0x04)
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#define TSADC_HIGHT_INT_DEBOUNCE 0x060
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#define TSADC_HIGHT_TSHUT_DEBOUNCE 0x064
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#define TSADC_AUTO_PERIOD 0x068
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#define TSADC_AUTO_PERIOD_HT 0x06c
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#define TSADC_COMP0_LOW_INT 0x080 /* V3 only */
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#define TSADC_COMP1_LOW_INT 0x084 /* V3 only */
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2022-08-11 08:26:39 +00:00
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/* V3 GFR registers */
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2019-11-28 17:01:31 +00:00
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#define GRF_SARADC_TESTBIT 0x0e644
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#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
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#define GRF_TSADC_TESTBIT_L 0x0e648
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#define GRF_TSADC_VCM_EN_L (0x10001 << 7)
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#define GRF_TSADC_TESTBIT_H 0x0e64c
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#define GRF_TSADC_VCM_EN_H (0x10001 << 7)
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#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
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2022-08-11 08:26:39 +00:00
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/* V7 GRF register */
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#define GRF_TSADC_CON 0x0600
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#define GRF_TSADC_ANA_REG0 (0x10001 << 0)
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#define GRF_TSADC_ANA_REG1 (0x10001 << 1)
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#define GRF_TSADC_ANA_REG2 (0x10001 << 2)
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#define GRF_TSADC_TSEN (0x10001 << 8)
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2019-11-28 17:01:31 +00:00
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#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
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#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
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static struct sysctl_ctx_list tsadc_sysctl_ctx;
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struct tsensor {
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char *name;
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int id;
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int channel;
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};
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struct rk_calib_entry {
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uint32_t raw;
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int temp;
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};
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struct tsadc_calib_info {
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struct rk_calib_entry *table;
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int nentries;
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};
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struct tsadc_conf {
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2022-08-11 08:26:39 +00:00
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int version;
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2020-04-23 19:16:20 +00:00
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int q_sel_ntc;
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2019-11-28 17:01:31 +00:00
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int shutdown_temp;
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int shutdown_mode;
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int shutdown_pol;
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struct tsensor *tsensors;
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int ntsensors;
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struct tsadc_calib_info calib_info;
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};
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struct tsadc_softc {
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device_t dev;
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struct resource *mem_res;
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struct resource *irq_res;
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void *irq_ih;
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clk_t tsadc_clk;
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clk_t apb_pclk_clk;
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2022-11-11 08:58:34 +00:00
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hwreset_array_t hwreset;
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2019-11-28 17:01:31 +00:00
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struct syscon *grf;
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struct tsadc_conf *conf;
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int shutdown_temp;
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int shutdown_mode;
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int shutdown_pol;
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int alarm_temp;
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};
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static struct rk_calib_entry rk3288_calib_data[] = {
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{3800, -40000},
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{3792, -35000},
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{3783, -30000},
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{3774, -25000},
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{3765, -20000},
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{3756, -15000},
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{3747, -10000},
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{3737, -5000},
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{3728, 0},
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{3718, 5000},
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{3708, 10000},
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{3698, 15000},
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{3688, 20000},
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{3678, 25000},
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{3667, 30000},
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{3656, 35000},
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{3645, 40000},
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{3634, 45000},
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{3623, 50000},
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{3611, 55000},
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{3600, 60000},
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{3588, 65000},
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{3575, 70000},
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{3563, 75000},
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{3550, 80000},
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{3537, 85000},
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{3524, 90000},
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{3510, 95000},
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{3496, 100000},
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{3482, 105000},
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{3467, 110000},
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{3452, 115000},
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{3437, 120000},
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{3421, 125000},
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};
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struct tsensor rk3288_tsensors[] = {
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{ .channel = 0, .id = 2, .name = "reserved"},
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{ .channel = 1, .id = 0, .name = "CPU"},
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{ .channel = 2, .id = 1, .name = "GPU"},
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};
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struct tsadc_conf rk3288_tsadc_conf = {
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2022-08-11 08:26:39 +00:00
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.version = TSADC_V2,
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2020-04-23 19:16:20 +00:00
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.q_sel_ntc = 0,
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2019-11-28 17:01:31 +00:00
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.shutdown_temp = 95000,
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.shutdown_mode = 1, /* GPIO */
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.shutdown_pol = 0, /* Low */
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.tsensors = rk3288_tsensors,
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.ntsensors = nitems(rk3288_tsensors),
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.calib_info = {
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.table = rk3288_calib_data,
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.nentries = nitems(rk3288_calib_data),
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}
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};
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static struct rk_calib_entry rk3328_calib_data[] = {
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{296, -40000},
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{304, -35000},
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{313, -30000},
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{331, -20000},
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{340, -15000},
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{349, -10000},
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{359, -5000},
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{368, 0},
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{378, 5000},
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{388, 10000},
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{398, 15000},
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{408, 20000},
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{418, 25000},
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{429, 30000},
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{440, 35000},
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{451, 40000},
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{462, 45000},
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{473, 50000},
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{485, 55000},
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{496, 60000},
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{508, 65000},
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{521, 70000},
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{533, 75000},
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{546, 80000},
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{559, 85000},
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{572, 90000},
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{586, 95000},
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{600, 100000},
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{614, 105000},
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{629, 110000},
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{644, 115000},
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{659, 120000},
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{675, 125000},
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};
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static struct tsensor rk3328_tsensors[] = {
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{ .channel = 0, .id = 0, .name = "CPU"},
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};
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static struct tsadc_conf rk3328_tsadc_conf = {
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2022-08-11 08:26:39 +00:00
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.version = TSADC_V2,
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2020-04-23 19:16:20 +00:00
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.q_sel_ntc = 1,
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2019-11-28 17:01:31 +00:00
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.shutdown_temp = 95000,
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.shutdown_mode = 0, /* CRU */
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.shutdown_pol = 0, /* Low */
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.tsensors = rk3328_tsensors,
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.ntsensors = nitems(rk3328_tsensors),
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.calib_info = {
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.table = rk3328_calib_data,
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.nentries = nitems(rk3328_calib_data),
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}
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};
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static struct rk_calib_entry rk3399_calib_data[] = {
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{402, -40000},
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{410, -35000},
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{419, -30000},
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{427, -25000},
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{436, -20000},
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{444, -15000},
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{453, -10000},
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{461, -5000},
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{470, 0},
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{478, 5000},
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{487, 10000},
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{496, 15000},
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{504, 20000},
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{513, 25000},
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{521, 30000},
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{530, 35000},
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{538, 40000},
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{547, 45000},
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{555, 50000},
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{564, 55000},
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{573, 60000},
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{581, 65000},
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{590, 70000},
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{599, 75000},
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{607, 80000},
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{616, 85000},
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{624, 90000},
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{633, 95000},
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{642, 100000},
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{650, 105000},
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{659, 110000},
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{668, 115000},
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{677, 120000},
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{685, 125000},
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};
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static struct tsensor rk3399_tsensors[] = {
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{ .channel = 0, .id = 0, .name = "CPU"},
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{ .channel = 1, .id = 1, .name = "GPU"},
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};
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static struct tsadc_conf rk3399_tsadc_conf = {
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2022-08-11 08:26:39 +00:00
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.version = TSADC_V3,
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2020-04-23 19:16:20 +00:00
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.q_sel_ntc = 1,
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2019-11-28 17:01:31 +00:00
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.shutdown_temp = 95000,
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.shutdown_mode = 1, /* GPIO */
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.shutdown_pol = 0, /* Low */
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.tsensors = rk3399_tsensors,
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.ntsensors = nitems(rk3399_tsensors),
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.calib_info = {
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.table = rk3399_calib_data,
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.nentries = nitems(rk3399_calib_data),
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}
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};
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2022-08-11 08:26:39 +00:00
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static struct rk_calib_entry rk3568_calib_data[] = {
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{0, -40000},
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{1584, -40000},
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{1620, -35000},
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{1652, -30000},
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{1688, -25000},
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{1720, -20000},
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{1756, -15000},
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{1788, -10000},
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{1824, -5000},
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{1856, 0},
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{1892, 5000},
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{1924, 10000},
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{1956, 15000},
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{1992, 20000},
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{2024, 25000},
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{2060, 30000},
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{2092, 35000},
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{2128, 40000},
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{2160, 45000},
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{2196, 50000},
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{2228, 55000},
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{2264, 60000},
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{2300, 65000},
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{2332, 70000},
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{2368, 75000},
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{2400, 80000},
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|
{2436, 85000},
|
|
|
|
{2468, 90000},
|
|
|
|
{2500, 95000},
|
|
|
|
{2536, 100000},
|
|
|
|
{2572, 105000},
|
|
|
|
{2604, 110000},
|
|
|
|
{2636, 115000},
|
|
|
|
{2672, 120000},
|
|
|
|
{2704, 125000},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct tsensor rk3568_tsensors[] = {
|
|
|
|
{ .channel = 0, .id = 0, .name = "CPU"},
|
|
|
|
{ .channel = 1, .id = 1, .name = "GPU"},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct tsadc_conf rk3568_tsadc_conf = {
|
|
|
|
.version = TSADC_V7,
|
|
|
|
.q_sel_ntc = 1,
|
|
|
|
.shutdown_temp = 95000,
|
|
|
|
.shutdown_mode = 1, /* GPIO */
|
|
|
|
.shutdown_pol = 0, /* Low */
|
|
|
|
.tsensors = rk3568_tsensors,
|
|
|
|
.ntsensors = nitems(rk3568_tsensors),
|
|
|
|
.calib_info = {
|
|
|
|
.table = rk3568_calib_data,
|
|
|
|
.nentries = nitems(rk3568_calib_data),
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2019-11-28 17:01:31 +00:00
|
|
|
static struct ofw_compat_data compat_data[] = {
|
|
|
|
{"rockchip,rk3288-tsadc", (uintptr_t)&rk3288_tsadc_conf},
|
|
|
|
{"rockchip,rk3328-tsadc", (uintptr_t)&rk3328_tsadc_conf},
|
|
|
|
{"rockchip,rk3399-tsadc", (uintptr_t)&rk3399_tsadc_conf},
|
2022-08-11 08:26:39 +00:00
|
|
|
{"rockchip,rk3568-tsadc", (uintptr_t)&rk3568_tsadc_conf},
|
2019-11-28 17:01:31 +00:00
|
|
|
{NULL, 0}
|
|
|
|
};
|
|
|
|
|
|
|
|
static uint32_t
|
|
|
|
tsadc_temp_to_raw(struct tsadc_softc *sc, int temp)
|
|
|
|
{
|
|
|
|
struct rk_calib_entry *tbl;
|
|
|
|
int denom, ntbl, raw, i;
|
|
|
|
|
|
|
|
tbl = sc->conf->calib_info.table;
|
|
|
|
ntbl = sc->conf->calib_info.nentries;
|
|
|
|
|
|
|
|
if (temp <= tbl[0].temp)
|
|
|
|
return (tbl[0].raw);
|
|
|
|
|
|
|
|
if (temp >= tbl[ntbl - 1].temp)
|
|
|
|
return (tbl[ntbl - 1].raw);
|
|
|
|
|
|
|
|
for (i = 1; i < (ntbl - 1); i++) {
|
|
|
|
/* Exact match */
|
|
|
|
if (temp == tbl[i].temp)
|
|
|
|
return (tbl[i].raw);
|
|
|
|
if (temp < tbl[i].temp)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Translated value is between i and i - 1 table entries.
|
|
|
|
* Do linear interpolation for it.
|
|
|
|
*/
|
|
|
|
raw = (int)tbl[i - 1].raw - (int)tbl[i].raw;
|
|
|
|
raw *= temp - tbl[i - 1].temp;
|
|
|
|
denom = tbl[i - 1].temp - tbl[i].temp;
|
|
|
|
raw = tbl[i - 1].raw + raw / denom;
|
|
|
|
return (raw);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_raw_to_temp(struct tsadc_softc *sc, uint32_t raw)
|
|
|
|
{
|
|
|
|
struct rk_calib_entry *tbl;
|
|
|
|
int denom, ntbl, temp, i;
|
|
|
|
bool descending;
|
|
|
|
|
|
|
|
tbl = sc->conf->calib_info.table;
|
|
|
|
ntbl = sc->conf->calib_info.nentries;
|
|
|
|
descending = tbl[0].raw > tbl[1].raw;
|
|
|
|
|
|
|
|
if (descending) {
|
|
|
|
/* Raw column is in descending order. */
|
|
|
|
if (raw >= tbl[0].raw)
|
|
|
|
return (tbl[0].temp);
|
|
|
|
if (raw <= tbl[ntbl - 1].raw)
|
|
|
|
return (tbl[ntbl - 1].temp);
|
|
|
|
|
|
|
|
for (i = ntbl - 2; i > 0; i--) {
|
|
|
|
/* Exact match */
|
|
|
|
if (raw == tbl[i].raw)
|
|
|
|
return (tbl[i].temp);
|
|
|
|
if (raw < tbl[i].raw)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* Raw column is in ascending order. */
|
|
|
|
if (raw <= tbl[0].raw)
|
|
|
|
return (tbl[0].temp);
|
|
|
|
if (raw >= tbl[ntbl - 1].raw)
|
|
|
|
return (tbl[ntbl - 1].temp);
|
|
|
|
for (i = 1; i < (ntbl - 1); i++) {
|
|
|
|
/* Exact match */
|
|
|
|
if (raw == tbl[i].raw)
|
|
|
|
return (tbl[i].temp);
|
|
|
|
if (raw < tbl[i].raw)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Translated value is between i and i - 1 table entries.
|
|
|
|
* Do linear interpolation for it.
|
|
|
|
*/
|
|
|
|
temp = (int)tbl[i - 1].temp - (int)tbl[i].temp;
|
|
|
|
temp *= raw - tbl[i - 1].raw;
|
|
|
|
denom = tbl[i - 1].raw - tbl[i].raw;
|
|
|
|
temp = tbl[i - 1].temp + temp / denom;
|
|
|
|
return (temp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
tsadc_init_tsensor(struct tsadc_softc *sc, struct tsensor *sensor)
|
|
|
|
{
|
|
|
|
uint32_t val;
|
|
|
|
|
|
|
|
/* Shutdown mode */
|
|
|
|
val = RD4(sc, TSADC_INT_EN);
|
|
|
|
if (sc->shutdown_mode != 0) {
|
|
|
|
/* Signal shutdown of GPIO pin */
|
|
|
|
val &= ~TSADC_INT_EN_2CRU_EN_SRC(sensor->channel);
|
|
|
|
val |= TSADC_INT_EN_2GPIO_EN_SRC(sensor->channel);
|
|
|
|
} else {
|
|
|
|
val |= TSADC_INT_EN_2CRU_EN_SRC(sensor->channel);
|
|
|
|
val &= ~TSADC_INT_EN_2GPIO_EN_SRC(sensor->channel);
|
|
|
|
}
|
|
|
|
WR4(sc, TSADC_INT_EN, val);
|
|
|
|
|
|
|
|
/* Shutdown temperature */
|
|
|
|
val = tsadc_raw_to_temp(sc, sc->shutdown_temp);
|
|
|
|
WR4(sc, TSADC_COMP_SHUT(sensor->channel), val);
|
|
|
|
val = RD4(sc, TSADC_AUTO_CON);
|
|
|
|
val |= TSADC_AUTO_SRC_EN(sensor->channel);
|
|
|
|
WR4(sc, TSADC_AUTO_CON, val);
|
|
|
|
|
|
|
|
/* Alarm temperature */
|
|
|
|
val = tsadc_temp_to_raw(sc, sc->alarm_temp);
|
|
|
|
WR4(sc, TSADC_COMP_INT(sensor->channel), val);
|
|
|
|
val = RD4(sc, TSADC_INT_EN);
|
|
|
|
val |= TSADC_COMP_INT_SRC_EN(sensor->channel);
|
|
|
|
WR4(sc, TSADC_INT_EN, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
tsadc_init(struct tsadc_softc *sc)
|
|
|
|
{
|
|
|
|
uint32_t val;
|
|
|
|
|
|
|
|
/* Common part */
|
|
|
|
val = 0; /* XXX Is this right? */
|
|
|
|
if (sc->shutdown_pol != 0)
|
|
|
|
val |= TSADC_AUTO_CON_POL_HI;
|
|
|
|
else
|
|
|
|
val &= ~TSADC_AUTO_CON_POL_HI;
|
2020-04-23 19:16:20 +00:00
|
|
|
if (sc->conf->q_sel_ntc)
|
2019-11-28 17:01:31 +00:00
|
|
|
val |= TSADC_AUTO_Q_SEL;
|
|
|
|
WR4(sc, TSADC_AUTO_CON, val);
|
|
|
|
|
2022-08-11 08:26:39 +00:00
|
|
|
switch (sc->conf->version) {
|
|
|
|
case TSADC_V2:
|
2019-11-28 17:01:31 +00:00
|
|
|
/* V2 init */
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD, 250); /* 250 ms */
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD_HT, 50); /* 50 ms */
|
|
|
|
WR4(sc, TSADC_HIGHT_INT_DEBOUNCE, 4);
|
|
|
|
WR4(sc, TSADC_HIGHT_TSHUT_DEBOUNCE, 4);
|
2022-08-11 08:26:39 +00:00
|
|
|
break;
|
|
|
|
case TSADC_V3:
|
2019-11-28 17:01:31 +00:00
|
|
|
/* V3 init */
|
|
|
|
if (sc->grf == NULL) {
|
|
|
|
/* Errata: adjust interleave to working value */
|
|
|
|
WR4(sc, TSADC_USER_CON, 13 << 6); /* 13 clks */
|
|
|
|
} else {
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_L,
|
|
|
|
GRF_TSADC_VCM_EN_L);
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_H,
|
|
|
|
GRF_TSADC_VCM_EN_H);
|
|
|
|
DELAY(30); /* 15 usec min */
|
|
|
|
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_SARADC_TESTBIT,
|
|
|
|
GRF_SARADC_TESTBIT_ON);
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_H,
|
|
|
|
GRF_TSADC_TESTBIT_H_ON);
|
|
|
|
DELAY(180); /* 90 usec min */
|
|
|
|
}
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD, 1875); /* 2.5 ms */
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD_HT, 1875); /* 2.5 ms */
|
|
|
|
WR4(sc, TSADC_HIGHT_INT_DEBOUNCE, 4);
|
|
|
|
WR4(sc, TSADC_HIGHT_TSHUT_DEBOUNCE, 4);
|
2022-08-11 08:26:39 +00:00
|
|
|
break;
|
|
|
|
case TSADC_V7:
|
|
|
|
/* V7 init */
|
|
|
|
WR4(sc, TSADC_USER_CON, 0xfc0); /* 97us, at least 90us */
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD, 1622); /* 2.5ms */
|
|
|
|
WR4(sc, TSADC_HIGHT_INT_DEBOUNCE, 4);
|
|
|
|
WR4(sc, TSADC_AUTO_PERIOD_HT, 1622); /* 2.5ms */
|
|
|
|
WR4(sc, TSADC_HIGHT_TSHUT_DEBOUNCE, 4);
|
|
|
|
if (sc->grf) {
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_CON, GRF_TSADC_TSEN);
|
|
|
|
DELAY(15); /* 10 usec min */
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_CON,
|
|
|
|
GRF_TSADC_ANA_REG0);
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_CON,
|
|
|
|
GRF_TSADC_ANA_REG1);
|
|
|
|
SYSCON_WRITE_4(sc->grf, GRF_TSADC_CON,
|
|
|
|
GRF_TSADC_ANA_REG2);
|
|
|
|
DELAY(100); /* 90 usec min */
|
|
|
|
}
|
|
|
|
break;
|
2019-11-28 17:01:31 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_read_temp(struct tsadc_softc *sc, struct tsensor *sensor, int *temp)
|
|
|
|
{
|
|
|
|
uint32_t val;
|
|
|
|
|
|
|
|
val = RD4(sc, TSADC_DATA(sensor->channel));
|
|
|
|
*temp = tsadc_raw_to_temp(sc, val);
|
|
|
|
|
|
|
|
#ifdef DEBUG
|
2022-08-11 08:26:39 +00:00
|
|
|
device_printf(sc->dev, "%s: Sensor(id: %d, ch: %d), val: %d temp: %d\n",
|
|
|
|
__func__, sensor->id, sensor->channel, val, *temp);
|
|
|
|
device_printf(sc->dev, "%s: user_con=0x%08x auto_con=0x%08x "
|
|
|
|
"comp_int=0x%08x comp_shut=0x%08x\n",
|
|
|
|
__func__, RD4(sc, TSADC_USER_CON), RD4(sc, TSADC_AUTO_CON),
|
2019-11-28 17:01:31 +00:00
|
|
|
RD4(sc, TSADC_COMP_INT(sensor->channel)),
|
|
|
|
RD4(sc, TSADC_COMP_SHUT(sensor->channel)));
|
|
|
|
#endif
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_get_temp(device_t dev, device_t cdev, uintptr_t id, int *val)
|
|
|
|
{
|
|
|
|
struct tsadc_softc *sc;
|
|
|
|
int i, rv;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
if (id >= sc->conf->ntsensors)
|
|
|
|
return (ERANGE);
|
|
|
|
|
|
|
|
for (i = 0; i < sc->conf->ntsensors; i++) {
|
|
|
|
if (sc->conf->tsensors->id == id) {
|
|
|
|
rv =tsadc_read_temp(sc, sc->conf->tsensors + id, val);
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return (ERANGE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_sysctl_temperature(SYSCTL_HANDLER_ARGS)
|
|
|
|
{
|
|
|
|
struct tsadc_softc *sc;
|
|
|
|
int val;
|
|
|
|
int rv;
|
|
|
|
int id;
|
|
|
|
|
|
|
|
/* Write request */
|
|
|
|
if (req->newptr != NULL)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
sc = arg1;
|
|
|
|
id = arg2;
|
|
|
|
|
|
|
|
if (id >= sc->conf->ntsensors)
|
|
|
|
return (ERANGE);
|
|
|
|
rv = tsadc_read_temp(sc, sc->conf->tsensors + id, &val);
|
|
|
|
if (rv != 0)
|
|
|
|
return (rv);
|
|
|
|
|
|
|
|
val = val / 100;
|
|
|
|
val += 2731;
|
|
|
|
rv = sysctl_handle_int(oidp, &val, 0, req);
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_init_sysctl(struct tsadc_softc *sc)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct sysctl_oid *oid, *tmp;
|
|
|
|
|
|
|
|
sysctl_ctx_init(&tsadc_sysctl_ctx);
|
|
|
|
/* create node for hw.temp */
|
|
|
|
oid = SYSCTL_ADD_NODE(&tsadc_sysctl_ctx,
|
|
|
|
SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "temperature",
|
2020-02-24 10:45:22 +00:00
|
|
|
CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "");
|
2019-11-28 17:01:31 +00:00
|
|
|
if (oid == NULL)
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
/* Add sensors */
|
|
|
|
for (i = sc->conf->ntsensors - 1; i >= 0; i--) {
|
|
|
|
tmp = SYSCTL_ADD_PROC(&tsadc_sysctl_ctx,
|
|
|
|
SYSCTL_CHILDREN(oid), OID_AUTO, sc->conf->tsensors[i].name,
|
2020-02-24 10:45:22 +00:00
|
|
|
CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, i,
|
2019-11-28 17:01:31 +00:00
|
|
|
tsadc_sysctl_temperature, "IK", "SoC Temperature");
|
|
|
|
if (tmp == NULL)
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct tsadc_softc *sc;
|
|
|
|
uint32_t val;
|
|
|
|
|
|
|
|
sc = (struct tsadc_softc *)arg;
|
|
|
|
|
|
|
|
val = RD4(sc, TSADC_INT_PD);
|
|
|
|
WR4(sc, TSADC_INT_PD, val);
|
|
|
|
|
|
|
|
/* XXX Handle shutdown and alarm interrupts. */
|
|
|
|
if (val & 0x00F0) {
|
|
|
|
device_printf(sc->dev, "Alarm: device temperature "
|
|
|
|
"is above of shutdown level.\n");
|
|
|
|
} else if (val & 0x000F) {
|
|
|
|
device_printf(sc->dev, "Alarm: device temperature "
|
|
|
|
"is above of alarm level.\n");
|
|
|
|
}
|
|
|
|
return (FILTER_HANDLED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_probe(device_t dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
device_set_desc(dev, "RockChip temperature sensors");
|
|
|
|
return (BUS_PROBE_DEFAULT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_attach(device_t dev)
|
|
|
|
{
|
|
|
|
struct tsadc_softc *sc;
|
|
|
|
phandle_t node;
|
|
|
|
uint32_t val;
|
|
|
|
int i, rid, rv;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
sc->dev = dev;
|
|
|
|
node = ofw_bus_get_node(sc->dev);
|
|
|
|
sc->conf = (struct tsadc_conf *)
|
|
|
|
ofw_bus_search_compatible(dev, compat_data)->ocd_data;
|
|
|
|
sc->alarm_temp = 90000;
|
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
|
|
|
RF_ACTIVE);
|
|
|
|
if (sc->mem_res == NULL) {
|
|
|
|
device_printf(dev, "Cannot allocate memory resources\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
|
|
|
|
if (sc->irq_res == NULL) {
|
|
|
|
device_printf(dev, "Cannot allocate IRQ resources\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
|
|
|
|
tsadc_intr, NULL, sc, &sc->irq_ih))) {
|
|
|
|
device_printf(dev,
|
|
|
|
"WARNING: unable to register interrupt handler\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FDT resources */
|
2022-11-11 08:58:34 +00:00
|
|
|
rv = hwreset_array_get_ofw(dev, 0, &sc->hwreset);
|
2019-11-28 17:01:31 +00:00
|
|
|
if (rv != 0) {
|
2022-11-11 08:58:34 +00:00
|
|
|
device_printf(dev, "Cannot get resets\n");
|
2019-11-28 17:01:31 +00:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
rv = clk_get_by_ofw_name(dev, 0, "tsadc", &sc->tsadc_clk);
|
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot get 'tsadc' clock: %d\n", rv);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
rv = clk_get_by_ofw_name(dev, 0, "apb_pclk", &sc->apb_pclk_clk);
|
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot get 'apb_pclk' clock: %d\n", rv);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* grf is optional */
|
|
|
|
rv = syscon_get_by_ofw_property(dev, node, "rockchip,grf", &sc->grf);
|
|
|
|
if (rv != 0 && rv != ENOENT) {
|
|
|
|
device_printf(dev, "Cannot get 'grf' syscon: %d\n", rv);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = OF_getencprop(node, "rockchip,hw-tshut-temp",
|
|
|
|
&sc->shutdown_temp, sizeof(sc->shutdown_temp));
|
|
|
|
if (rv <= 0)
|
|
|
|
sc->shutdown_temp = sc->conf->shutdown_temp;
|
|
|
|
|
|
|
|
rv = OF_getencprop(node, "rockchip,hw-tshut-mode",
|
|
|
|
&sc->shutdown_mode, sizeof(sc->shutdown_mode));
|
|
|
|
if (rv <= 0)
|
|
|
|
sc->shutdown_mode = sc->conf->shutdown_mode;
|
|
|
|
|
|
|
|
rv = OF_getencprop(node, "rockchip,hw-tshut-polarity",
|
|
|
|
&sc->shutdown_pol, sizeof(sc->shutdown_pol));
|
|
|
|
if (rv <= 0)
|
|
|
|
sc->shutdown_pol = sc->conf->shutdown_pol;
|
|
|
|
|
|
|
|
/* Wakeup controller */
|
2022-11-11 08:58:34 +00:00
|
|
|
rv = hwreset_array_assert(sc->hwreset);
|
2019-11-28 17:01:31 +00:00
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot assert reset\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the assigned clocks parent and freq */
|
2020-12-04 16:24:44 +00:00
|
|
|
rv = clk_set_assigned(sc->dev, node);
|
|
|
|
if (rv != 0 && rv != ENOENT) {
|
2019-11-28 17:01:31 +00:00
|
|
|
device_printf(dev, "clk_set_assigned failed\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = clk_enable(sc->tsadc_clk);
|
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot enable 'tsadc_clk' clock: %d\n", rv);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
rv = clk_enable(sc->apb_pclk_clk);
|
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot enable 'apb_pclk' clock: %d\n", rv);
|
|
|
|
goto fail;
|
|
|
|
}
|
2022-11-11 08:58:34 +00:00
|
|
|
rv = hwreset_array_deassert(sc->hwreset);
|
2019-11-28 17:01:31 +00:00
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(dev, "Cannot deassert reset\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
tsadc_init(sc);
|
|
|
|
for (i = 0; i < sc->conf->ntsensors; i++)
|
|
|
|
tsadc_init_tsensor(sc, sc->conf->tsensors + i);
|
|
|
|
|
|
|
|
/* Enable auto mode */
|
|
|
|
val = RD4(sc, TSADC_AUTO_CON);
|
|
|
|
val |= TSADC_AUTO_CON_AUTO;
|
|
|
|
WR4(sc, TSADC_AUTO_CON, val);
|
|
|
|
|
|
|
|
rv = tsadc_init_sysctl(sc);
|
|
|
|
if (rv != 0) {
|
|
|
|
device_printf(sc->dev, "Cannot initialize sysctls\n");
|
2019-11-28 20:17:03 +00:00
|
|
|
goto fail_sysctl;
|
2019-11-28 17:01:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
OF_device_register_xref(OF_xref_from_node(node), dev);
|
|
|
|
return (bus_generic_attach(dev));
|
|
|
|
|
2019-11-28 20:17:03 +00:00
|
|
|
fail_sysctl:
|
|
|
|
sysctl_ctx_free(&tsadc_sysctl_ctx);
|
2019-11-28 17:01:31 +00:00
|
|
|
fail:
|
|
|
|
if (sc->irq_ih != NULL)
|
|
|
|
bus_teardown_intr(dev, sc->irq_res, sc->irq_ih);
|
|
|
|
if (sc->tsadc_clk != NULL)
|
|
|
|
clk_release(sc->tsadc_clk);
|
|
|
|
if (sc->apb_pclk_clk != NULL)
|
|
|
|
clk_release(sc->apb_pclk_clk);
|
|
|
|
if (sc->hwreset != NULL)
|
2022-11-11 08:58:34 +00:00
|
|
|
hwreset_array_release(sc->hwreset);
|
2019-11-28 17:01:31 +00:00
|
|
|
if (sc->irq_res != NULL)
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
|
|
|
|
if (sc->mem_res != NULL)
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
|
|
|
|
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tsadc_detach(device_t dev)
|
|
|
|
{
|
|
|
|
struct tsadc_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
if (sc->irq_ih != NULL)
|
|
|
|
bus_teardown_intr(dev, sc->irq_res, sc->irq_ih);
|
|
|
|
sysctl_ctx_free(&tsadc_sysctl_ctx);
|
|
|
|
if (sc->tsadc_clk != NULL)
|
|
|
|
clk_release(sc->tsadc_clk);
|
|
|
|
if (sc->apb_pclk_clk != NULL)
|
|
|
|
clk_release(sc->apb_pclk_clk);
|
|
|
|
if (sc->hwreset != NULL)
|
2022-11-11 08:58:34 +00:00
|
|
|
hwreset_array_release(sc->hwreset);
|
2019-11-28 17:01:31 +00:00
|
|
|
if (sc->irq_res != NULL)
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
|
|
|
|
if (sc->mem_res != NULL)
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
|
|
|
|
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t rk_tsadc_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, tsadc_probe),
|
|
|
|
DEVMETHOD(device_attach, tsadc_attach),
|
|
|
|
DEVMETHOD(device_detach, tsadc_detach),
|
|
|
|
|
|
|
|
/* TSADC interface */
|
|
|
|
DEVMETHOD(rk_tsadc_get_temperature, tsadc_get_temp),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static DEFINE_CLASS_0(rk_tsadc, rk_tsadc_driver, rk_tsadc_methods,
|
|
|
|
sizeof(struct tsadc_softc));
|
2022-05-09 21:26:45 +00:00
|
|
|
EARLY_DRIVER_MODULE(rk_tsadc, simplebus, rk_tsadc_driver, NULL, NULL,
|
|
|
|
BUS_PASS_TIMER + BUS_PASS_ORDER_LAST);
|