1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Intel PCIC or compatible Controller driver
|
|
|
|
*-------------------------------------------------------------------------
|
|
|
|
*
|
|
|
|
* Copyright (c) 1995 Andrew McRae. All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
* 3. The name of the author may not be used to endorse or promote products
|
|
|
|
* derived from this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|
|
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|
|
|
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|
|
|
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
|
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|
|
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
1999-09-26 21:52:43 +00:00
|
|
|
*
|
|
|
|
* $FreeBSD$
|
1995-08-24 08:56:20 +00:00
|
|
|
*/
|
|
|
|
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef PC98
|
|
|
|
#define MECIA_SUPPORT
|
|
|
|
#endif
|
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
#include <sys/param.h>
|
2000-09-13 18:33:25 +00:00
|
|
|
#include <sys/bus.h>
|
1995-08-24 08:56:20 +00:00
|
|
|
#include <sys/systm.h>
|
|
|
|
#include <sys/kernel.h>
|
1999-01-19 00:18:28 +00:00
|
|
|
#include <sys/module.h>
|
1995-08-24 08:56:20 +00:00
|
|
|
|
1995-11-21 08:27:00 +00:00
|
|
|
#include <pccard/i82365.h>
|
1997-11-18 21:04:01 +00:00
|
|
|
#include <pccard/cardinfo.h>
|
1995-11-21 08:27:00 +00:00
|
|
|
#include <pccard/slot.h>
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
#include <pccard/pcic98reg.h>
|
|
|
|
#ifndef PCIC98_IOBASE
|
|
|
|
#define PCIC98_IOBASE 0x80d0
|
|
|
|
#endif
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
1999-03-10 15:00:54 +00:00
|
|
|
|
2000-03-10 05:43:29 +00:00
|
|
|
/* Get pnp IDs */
|
|
|
|
#include <isa/isavar.h>
|
|
|
|
#include <dev/pcic/i82365reg.h>
|
|
|
|
|
2001-05-08 23:59:13 +00:00
|
|
|
#include <dev/pccard/pccardvar.h>
|
2000-04-20 08:37:46 +00:00
|
|
|
#include "card_if.h"
|
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Prototypes for interrupt handler.
|
|
|
|
*/
|
2000-09-13 18:33:25 +00:00
|
|
|
static driver_intr_t pcicintr;
|
2001-05-14 21:08:20 +00:00
|
|
|
static int pcicintr1(void *);
|
2001-03-22 05:49:18 +00:00
|
|
|
static int pcic_ioctl(struct slot *, int, caddr_t);
|
|
|
|
static int pcic_power(struct slot *);
|
2001-04-19 00:04:08 +00:00
|
|
|
static void pcic_mapirq(struct slot *, int);
|
1995-11-13 08:39:44 +00:00
|
|
|
static timeout_t pcic_reset;
|
1997-01-08 00:22:58 +00:00
|
|
|
static void pcic_resume(struct slot *);
|
2001-03-22 05:49:18 +00:00
|
|
|
static void pcic_disable(struct slot *);
|
1995-11-09 20:44:36 +00:00
|
|
|
static timeout_t pcictimeout;
|
1997-09-21 22:02:25 +00:00
|
|
|
static struct callout_handle pcictimeout_ch
|
|
|
|
= CALLOUT_HANDLE_INITIALIZER(&pcictimeout_ch);
|
1995-11-09 20:44:36 +00:00
|
|
|
static int pcic_memory(struct slot *, int);
|
|
|
|
static int pcic_io(struct slot *, int);
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
/* local functions for PC-98 Original PC-Card controller */
|
|
|
|
static int pcic98_power(struct slot *);
|
|
|
|
static void pcic98_mapirq(struct slot *, int);
|
|
|
|
static int pcic98_memory(struct slot *, int);
|
|
|
|
static int pcic98_io(struct slot *, int);
|
|
|
|
static timeout_t pcic98_reset;
|
|
|
|
static void pcic98_disable(struct slot *);
|
|
|
|
static void pcic98_resume(struct slot *);
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
1995-08-24 08:56:20 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Per-slot data table.
|
|
|
|
*/
|
2001-05-14 23:08:58 +00:00
|
|
|
struct pcic_slot {
|
1995-08-24 08:56:20 +00:00
|
|
|
int index; /* Index register */
|
|
|
|
int data; /* Data register */
|
|
|
|
int offset; /* Offset value for index */
|
1995-11-09 20:44:36 +00:00
|
|
|
char controller; /* Device type */
|
|
|
|
char revision; /* Device Revision */
|
1997-10-26 04:36:24 +00:00
|
|
|
struct slot *slt; /* Back ptr to slot */
|
|
|
|
u_char (*getb)(struct pcic_slot *, int);
|
|
|
|
void (*putb)(struct pcic_slot *, int, u_char);
|
1997-04-20 07:21:12 +00:00
|
|
|
u_char *regs; /* Pointer to regs in mem */
|
2001-05-14 23:08:58 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
struct pcic_softc
|
|
|
|
{
|
|
|
|
int unit;
|
|
|
|
struct pcic_slot slots[PCIC_MAX_SLOTS];
|
|
|
|
};
|
1995-11-09 20:44:36 +00:00
|
|
|
|
|
|
|
static struct slot_ctrl cinfo;
|
|
|
|
|
2000-03-10 05:43:29 +00:00
|
|
|
static struct isa_pnp_id pcic_ids[] = {
|
2001-04-11 20:18:29 +00:00
|
|
|
{PCIC_PNP_ACTIONTEC, NULL}, /* AEI0218 */
|
|
|
|
{PCIC_PNP_IBM3765, NULL}, /* IBM3765 */
|
2000-03-10 05:43:29 +00:00
|
|
|
{PCIC_PNP_82365, NULL}, /* PNP0E00 */
|
|
|
|
{PCIC_PNP_CL_PD6720, NULL}, /* PNP0E01 */
|
|
|
|
{PCIC_PNP_VLSI_82C146, NULL}, /* PNP0E02 */
|
|
|
|
{PCIC_PNP_82365_CARDBUS, NULL}, /* PNP0E03 */
|
2000-10-12 03:51:16 +00:00
|
|
|
{PCIC_PNP_SCM_SWAPBOX, NULL}, /* SCM0469 */
|
2000-03-10 05:43:29 +00:00
|
|
|
{0}
|
|
|
|
};
|
|
|
|
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
static u_char pcic98_last_reg1;
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
2000-03-10 05:43:29 +00:00
|
|
|
|
2001-03-19 07:10:38 +00:00
|
|
|
static char *bridges[] =
|
|
|
|
{
|
|
|
|
"Intel i82365",
|
|
|
|
"IBM PCIC",
|
|
|
|
"VLSI 82C146",
|
|
|
|
"Cirrus logic 672x",
|
|
|
|
"Cirrus logic 6710",
|
|
|
|
"Vadem 365",
|
|
|
|
"Vadem 465",
|
|
|
|
"Vadem 468",
|
|
|
|
"Vadem 469",
|
|
|
|
"Ricoh RF5C396",
|
2001-04-19 00:04:08 +00:00
|
|
|
"IBM KING PCMCIA Controller",
|
2001-05-13 01:44:27 +00:00
|
|
|
"PC-98 MECIA Controller"
|
2001-03-19 07:10:38 +00:00
|
|
|
};
|
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Read a register from the PCIC.
|
|
|
|
*/
|
2001-05-13 01:44:27 +00:00
|
|
|
static unsigned char
|
1997-10-06 02:46:38 +00:00
|
|
|
getb1(struct pcic_slot *sp, int reg)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-06 02:46:38 +00:00
|
|
|
outb(sp->index, sp->offset + reg);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (inb(sp->data));
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a register on the PCIC
|
|
|
|
*/
|
2001-05-13 01:44:27 +00:00
|
|
|
static void
|
1997-10-06 02:46:38 +00:00
|
|
|
putb1(struct pcic_slot *sp, int reg, unsigned char val)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-06 02:46:38 +00:00
|
|
|
outb(sp->index, sp->offset + reg);
|
|
|
|
outb(sp->data, val);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1997-01-08 00:22:58 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Clear bit(s) of a register.
|
|
|
|
*/
|
1998-04-15 17:47:40 +00:00
|
|
|
static __inline void
|
1995-08-24 08:56:20 +00:00
|
|
|
clrb(struct pcic_slot *sp, int reg, unsigned char mask)
|
|
|
|
{
|
1997-10-06 02:46:38 +00:00
|
|
|
sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1997-01-08 00:22:58 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Set bit(s) of a register
|
|
|
|
*/
|
1998-04-15 17:47:40 +00:00
|
|
|
static __inline void
|
1995-08-24 08:56:20 +00:00
|
|
|
setb(struct pcic_slot *sp, int reg, unsigned char mask)
|
|
|
|
{
|
1997-10-06 02:46:38 +00:00
|
|
|
sp->putb(sp, reg, sp->getb(sp, reg) | mask);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a 16 bit value to 2 adjacent PCIC registers
|
|
|
|
*/
|
1998-04-15 17:47:40 +00:00
|
|
|
static __inline void
|
1997-10-06 03:17:36 +00:00
|
|
|
putw(struct pcic_slot *sp, int reg, unsigned short word)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-06 02:46:38 +00:00
|
|
|
sp->putb(sp, reg, word & 0xFF);
|
|
|
|
sp->putb(sp, reg + 1, (word >> 8) & 0xff);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* entry point from main code to map/unmap memory context.
|
|
|
|
*/
|
|
|
|
static int
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_memory(struct slot *slt, int win)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
struct mem_desc *mp = &slt->mem[win];
|
2001-01-09 23:39:32 +00:00
|
|
|
int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
2001-05-08 23:59:13 +00:00
|
|
|
if (win < 0 || win >= slt->ctrl->maxmem) {
|
|
|
|
printf("Illegal PCIC MEMORY window request %d\n", win);
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
1997-01-08 00:22:58 +00:00
|
|
|
if (mp->flags & MDF_ACTIVE) {
|
1998-08-16 01:21:52 +00:00
|
|
|
unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Write the addresses, card offsets and length.
|
|
|
|
* The values are all stored as the upper 12 bits of the
|
|
|
|
* 24 bit address i.e everything is allocated as 4 Kb chunks.
|
|
|
|
*/
|
1997-10-06 03:17:36 +00:00
|
|
|
putw(sp, reg, sys_addr & 0xFFF);
|
|
|
|
putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
|
|
|
|
putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Each 16 bit register has some flags in the upper bits.
|
|
|
|
*/
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_16BITS)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+1, PCIC_DATA16);
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_ZEROWS)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+1, PCIC_ZEROWS);
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_WS0)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+3, PCIC_MW0);
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_WS1)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+3, PCIC_MW1);
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_ATTR)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+5, PCIC_REG);
|
1995-08-24 08:56:20 +00:00
|
|
|
if (mp->flags & MDF_WP)
|
1995-11-09 20:44:36 +00:00
|
|
|
setb(sp, reg+5, PCIC_WP);
|
|
|
|
/*
|
|
|
|
* Enable the memory window. By experiment, we need a delay.
|
|
|
|
*/
|
1997-10-06 03:17:36 +00:00
|
|
|
setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
|
1995-08-24 08:56:20 +00:00
|
|
|
DELAY(50);
|
1997-01-08 00:22:58 +00:00
|
|
|
} else {
|
1997-10-06 03:17:36 +00:00
|
|
|
clrb(sp, PCIC_ADDRWINE, 1<<win);
|
|
|
|
putw(sp, reg, 0);
|
|
|
|
putw(sp, reg+2, 0);
|
|
|
|
putw(sp, reg+4, 0);
|
1997-01-08 00:22:58 +00:00
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* pcic_io - map or unmap I/O context
|
|
|
|
*/
|
|
|
|
static int
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_io(struct slot *slt, int win)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1995-11-09 20:44:36 +00:00
|
|
|
int mask, reg;
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
struct io_desc *ip = &slt->io[win];
|
2000-02-21 06:52:20 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags,
|
|
|
|
ip->start, ip->start+ip->size-1);
|
|
|
|
}
|
|
|
|
|
1996-02-21 23:20:21 +00:00
|
|
|
switch (win) {
|
|
|
|
case 0:
|
1995-08-24 08:56:20 +00:00
|
|
|
mask = PCIC_IO0_EN;
|
|
|
|
reg = PCIC_IO0;
|
1996-02-21 23:20:21 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
1995-08-24 08:56:20 +00:00
|
|
|
mask = PCIC_IO1_EN;
|
|
|
|
reg = PCIC_IO1;
|
1996-02-21 23:20:21 +00:00
|
|
|
break;
|
|
|
|
default:
|
2001-05-08 23:59:13 +00:00
|
|
|
printf("Illegal PCIC I/O window request %d\n", win);
|
|
|
|
return (ENXIO);
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
|
|
|
if (ip->flags & IODF_ACTIVE) {
|
1996-02-21 23:20:21 +00:00
|
|
|
unsigned char x, ioctlv;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
1997-10-06 03:17:36 +00:00
|
|
|
putw(sp, reg, ip->start);
|
|
|
|
putw(sp, reg+2, ip->start+ip->size-1);
|
1996-02-21 23:20:21 +00:00
|
|
|
x = 0;
|
1995-08-24 08:56:20 +00:00
|
|
|
if (ip->flags & IODF_ZEROWS)
|
1996-02-21 23:20:21 +00:00
|
|
|
x |= PCIC_IO_0WS;
|
1995-08-24 08:56:20 +00:00
|
|
|
if (ip->flags & IODF_WS)
|
|
|
|
x |= PCIC_IO_WS;
|
|
|
|
if (ip->flags & IODF_CS16)
|
|
|
|
x |= PCIC_IO_CS16;
|
1996-02-21 23:20:21 +00:00
|
|
|
if (ip->flags & IODF_16BIT)
|
1995-08-24 08:56:20 +00:00
|
|
|
x |= PCIC_IO_16BIT;
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Extract the current flags and merge with new flags.
|
|
|
|
* Flags for window 0 in lower nybble, and in upper nybble
|
|
|
|
* for window 1.
|
|
|
|
*/
|
1997-04-20 07:21:12 +00:00
|
|
|
ioctlv = sp->getb(sp, PCIC_IOCTL);
|
1996-02-21 23:20:21 +00:00
|
|
|
DELAY(100);
|
|
|
|
switch (win) {
|
|
|
|
case 0:
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
|
1996-02-21 23:20:21 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
|
1996-02-21 23:20:21 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
DELAY(100);
|
1997-10-06 03:17:36 +00:00
|
|
|
setb(sp, PCIC_ADDRWINE, mask);
|
1995-08-24 08:56:20 +00:00
|
|
|
DELAY(100);
|
1995-11-09 20:44:36 +00:00
|
|
|
} else {
|
1997-10-06 03:17:36 +00:00
|
|
|
clrb(sp, PCIC_ADDRWINE, mask);
|
1996-02-21 23:20:21 +00:00
|
|
|
DELAY(100);
|
1997-10-06 03:17:36 +00:00
|
|
|
putw(sp, reg, 0);
|
|
|
|
putw(sp, reg + 2, 0);
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* Look for an Intel PCIC (or compatible).
|
|
|
|
* For each available slot, allocate a PC-CARD slot.
|
|
|
|
*/
|
|
|
|
|
1996-02-21 23:20:21 +00:00
|
|
|
/*
|
2000-04-25 06:07:27 +00:00
|
|
|
* VLSI 82C146 has incompatibilities about the I/O address of slot 1.
|
|
|
|
* Assume it's the only PCIC whose vendor ID is 0x84,
|
|
|
|
* contact Warner Losh <imp@freebsd.org> if correct.
|
1996-02-21 23:20:21 +00:00
|
|
|
*/
|
1999-10-15 17:29:21 +00:00
|
|
|
static int
|
|
|
|
pcic_probe(device_t dev)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1998-12-07 21:58:50 +00:00
|
|
|
int slotnum, validslots = 0;
|
1995-11-09 20:44:36 +00:00
|
|
|
struct pcic_slot *sp;
|
|
|
|
unsigned char c;
|
1999-10-16 05:11:46 +00:00
|
|
|
int error;
|
2000-03-10 05:43:29 +00:00
|
|
|
struct resource *r;
|
1999-10-16 05:11:46 +00:00
|
|
|
int rid;
|
1997-02-21 05:46:57 +00:00
|
|
|
static int maybe_vlsi = 0;
|
2001-05-14 23:08:58 +00:00
|
|
|
struct pcic_softc *sc;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
2000-03-10 05:43:29 +00:00
|
|
|
/* Check isapnp ids */
|
|
|
|
error = ISA_PNP_PROBE(device_get_parent(dev), dev, pcic_ids);
|
|
|
|
if (error == ENXIO)
|
|
|
|
return (ENXIO);
|
1999-10-15 17:29:21 +00:00
|
|
|
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Initialise controller information structure.
|
|
|
|
*/
|
2001-04-19 00:04:08 +00:00
|
|
|
cinfo.mapirq = pcic_mapirq;
|
1995-08-24 08:56:20 +00:00
|
|
|
cinfo.mapmem = pcic_memory;
|
|
|
|
cinfo.mapio = pcic_io;
|
|
|
|
cinfo.ioctl = pcic_ioctl;
|
|
|
|
cinfo.power = pcic_power;
|
|
|
|
cinfo.reset = pcic_reset;
|
|
|
|
cinfo.disable = pcic_disable;
|
1997-01-08 00:22:58 +00:00
|
|
|
cinfo.resume = pcic_resume;
|
1995-08-24 08:56:20 +00:00
|
|
|
cinfo.maxmem = PCIC_MEM_WIN;
|
|
|
|
cinfo.maxio = PCIC_IO_WIN;
|
|
|
|
|
2000-03-10 05:43:29 +00:00
|
|
|
if (bus_get_resource_start(dev, SYS_RES_IOPORT, 0) == 0)
|
|
|
|
bus_set_resource(dev, SYS_RES_IOPORT, 0, PCIC_INDEX0, 2);
|
|
|
|
rid = 0;
|
|
|
|
r = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
|
|
|
|
if (!r) {
|
|
|
|
if (bootverbose)
|
|
|
|
device_printf(dev, "Cannot get I/O range\n");
|
2001-05-13 01:44:27 +00:00
|
|
|
return (ENOMEM);
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
|
2001-05-14 23:08:58 +00:00
|
|
|
sc = (struct pcic_softc *) device_get_softc(dev);
|
|
|
|
sc->unit = device_get_unit(dev);
|
|
|
|
sp = &sc->slots[0];
|
2000-03-10 05:43:29 +00:00
|
|
|
for (slotnum = 0; slotnum < PCIC_CARD_SLOTS; slotnum++, sp++) {
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Initialise the PCIC slot table.
|
|
|
|
*/
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->getb = getb1;
|
|
|
|
sp->putb = putb1;
|
2000-03-10 05:43:29 +00:00
|
|
|
sp->index = rman_get_start(r);
|
|
|
|
sp->data = sp->index + 1;
|
|
|
|
sp->offset = slotnum * PCIC_SLOT_SIZE;
|
2000-04-25 06:07:27 +00:00
|
|
|
/*
|
1997-02-18 19:20:52 +00:00
|
|
|
* XXX - Screwed up slot 1 on the VLSI chips. According to
|
|
|
|
* the Linux PCMCIA code from David Hinds, working chipsets
|
|
|
|
* return 0x84 from their (correct) ID ports, while the broken
|
|
|
|
* ones would need to be probed at the new offset we set after
|
|
|
|
* we assume it's broken.
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
if (slotnum == 1 && maybe_vlsi &&
|
|
|
|
sp->getb(sp, PCIC_ID_REV) != PCIC_VLSI82C146) {
|
1997-01-08 00:22:58 +00:00
|
|
|
sp->index += 4;
|
|
|
|
sp->data += 4;
|
|
|
|
sp->offset = PCIC_SLOT_SIZE << 1;
|
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* see if there's a PCMCIA controller here
|
|
|
|
* Intel PCMCIA controllers use 0x82 and 0x83
|
|
|
|
* IBM clone chips use 0x88 and 0x89, apparently
|
|
|
|
*/
|
1997-10-06 02:46:38 +00:00
|
|
|
c = sp->getb(sp, PCIC_ID_REV);
|
1995-11-09 20:44:36 +00:00
|
|
|
sp->revision = -1;
|
|
|
|
switch(c) {
|
|
|
|
/*
|
|
|
|
* 82365 or clones.
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
case PCIC_INTEL0:
|
|
|
|
case PCIC_INTEL1:
|
1995-11-09 20:44:36 +00:00
|
|
|
sp->controller = PCIC_I82365;
|
|
|
|
sp->revision = c & 1;
|
|
|
|
/*
|
|
|
|
* Now check for VADEM chips.
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
outb(sp->index, 0x0E); /* Unlock VADEM's extra regs */
|
1995-11-09 20:44:36 +00:00
|
|
|
outb(sp->index, 0x37);
|
2001-03-19 07:10:38 +00:00
|
|
|
setb(sp, PCIC_VMISC, PCIC_VADEMREV);
|
1997-10-06 02:46:38 +00:00
|
|
|
c = sp->getb(sp, PCIC_ID_REV);
|
1995-11-09 20:44:36 +00:00
|
|
|
if (c & 0x08) {
|
1998-08-25 22:46:44 +00:00
|
|
|
switch (sp->revision = c & 7) {
|
|
|
|
case 1:
|
|
|
|
sp->controller = PCIC_VG365;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
sp->controller = PCIC_VG465;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
sp->controller = PCIC_VG468;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
sp->controller = PCIC_VG469;
|
|
|
|
break;
|
|
|
|
}
|
2001-03-19 07:10:38 +00:00
|
|
|
clrb(sp, PCIC_VMISC, PCIC_VADEMREV);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1996-02-21 23:20:21 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Check for RICOH RF5C396 PCMCIA Controller
|
|
|
|
*/
|
1997-10-06 02:46:38 +00:00
|
|
|
c = sp->getb(sp, 0x3a);
|
1996-02-21 23:20:21 +00:00
|
|
|
if (c == 0xb2) {
|
|
|
|
sp->controller = PCIC_RF5C396;
|
|
|
|
}
|
|
|
|
|
1995-11-09 20:44:36 +00:00
|
|
|
break;
|
|
|
|
/*
|
|
|
|
* VLSI chips.
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
case PCIC_VLSI82C146:
|
1995-11-09 20:44:36 +00:00
|
|
|
sp->controller = PCIC_VLSI;
|
1997-02-21 05:46:57 +00:00
|
|
|
maybe_vlsi = 1;
|
1995-11-09 20:44:36 +00:00
|
|
|
break;
|
2001-03-19 07:10:38 +00:00
|
|
|
case PCIC_IBM1:
|
|
|
|
case PCIC_IBM2:
|
1995-11-09 20:44:36 +00:00
|
|
|
sp->controller = PCIC_IBM;
|
|
|
|
sp->revision = c & 1;
|
|
|
|
break;
|
2001-03-19 07:10:38 +00:00
|
|
|
case PCIC_IBM3:
|
1996-02-21 23:20:21 +00:00
|
|
|
sp->controller = PCIC_IBM_KING;
|
|
|
|
sp->revision = c & 1;
|
|
|
|
break;
|
1995-11-09 20:44:36 +00:00
|
|
|
default:
|
|
|
|
continue;
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Check for Cirrus logic chips.
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
sp->putb(sp, PCIC_CLCHIP, 0);
|
|
|
|
c = sp->getb(sp, PCIC_CLCHIP);
|
|
|
|
if ((c & PCIC_CLC_TOGGLE) == PCIC_CLC_TOGGLE) {
|
|
|
|
c = sp->getb(sp, PCIC_CLCHIP);
|
|
|
|
if ((c & PCIC_CLC_TOGGLE) == 0) {
|
|
|
|
if (c & PCIC_CLC_DUAL)
|
1995-11-09 20:44:36 +00:00
|
|
|
sp->controller = PCIC_PD672X;
|
|
|
|
else
|
|
|
|
sp->controller = PCIC_PD6710;
|
|
|
|
sp->revision = 8 - ((c & 0x1F) >> 2);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
}
|
2001-03-19 07:10:38 +00:00
|
|
|
device_set_desc(dev, bridges[(int) sp->controller]);
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* OK it seems we have a PCIC or lookalike.
|
|
|
|
* Allocate a slot and initialise the data structures.
|
|
|
|
*/
|
|
|
|
validslots++;
|
2001-05-13 01:44:27 +00:00
|
|
|
sp->slt = (struct slot *) 1;
|
1997-10-06 03:17:36 +00:00
|
|
|
/*
|
|
|
|
* Modem cards send the speaker audio (dialing noises)
|
|
|
|
* to the host's speaker. Cirrus Logic PCIC chips must
|
|
|
|
* enable this. There is also a Low Power Dynamic Mode bit
|
|
|
|
* that claims to reduce power consumption by 30%, so
|
|
|
|
* enable it and hope for the best.
|
|
|
|
*/
|
|
|
|
if (sp->controller == PCIC_PD672X) {
|
2001-03-19 07:10:38 +00:00
|
|
|
setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
|
1997-10-06 03:17:36 +00:00
|
|
|
setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
1997-10-06 04:02:42 +00:00
|
|
|
}
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
bus_release_resource(dev, SYS_RES_IOPORT, rid, r);
|
2001-04-21 07:08:03 +00:00
|
|
|
if (validslots != 0)
|
|
|
|
return (0);
|
2001-04-19 00:04:08 +00:00
|
|
|
#ifdef PC98
|
2001-05-14 23:08:58 +00:00
|
|
|
sp = &sc->slots[0];
|
2001-04-21 07:08:03 +00:00
|
|
|
if (inb(PCIC98_REG0) != 0xff) {
|
|
|
|
sp->controller = PCIC_PC98;
|
|
|
|
sp->revision = 0;
|
|
|
|
cinfo.mapmem = pcic98_memory;
|
|
|
|
cinfo.mapio = pcic98_io;
|
|
|
|
cinfo.power = pcic98_power;
|
|
|
|
cinfo.mapirq = pcic98_mapirq;
|
|
|
|
cinfo.reset = pcic98_reset;
|
|
|
|
cinfo.disable = pcic98_disable;
|
|
|
|
cinfo.resume = pcic98_resume;
|
|
|
|
cinfo.maxmem = 1;
|
2001-04-19 00:04:08 +00:00
|
|
|
#if 0
|
2001-04-21 07:08:03 +00:00
|
|
|
cinfo.maxio = 1;
|
2001-04-19 00:04:08 +00:00
|
|
|
#else
|
2001-04-21 07:08:03 +00:00
|
|
|
cinfo.maxio = 2; /* fake for UE2212 LAN card */
|
2001-04-19 00:04:08 +00:00
|
|
|
#endif
|
2001-04-21 07:08:03 +00:00
|
|
|
validslots++;
|
2001-05-13 01:44:27 +00:00
|
|
|
sp->slt = (struct slot *) 1;
|
2001-05-07 22:28:05 +00:00
|
|
|
/* XXX need to allocated the port resources */
|
|
|
|
device_set_desc(dev, "MECIA PC98 Original PCMCIA Controller");
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
2001-05-13 01:44:27 +00:00
|
|
|
return (validslots ? 0 : ENXIO);
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
|
2001-03-19 07:10:38 +00:00
|
|
|
static void
|
|
|
|
do_mgt_irq(struct pcic_slot *sp, int irq)
|
|
|
|
{
|
|
|
|
/* Management IRQ changes */
|
|
|
|
clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
|
|
|
|
sp->putb(sp, PCIC_STAT_INT, (irq << 4) | 0xF);
|
|
|
|
}
|
|
|
|
|
2000-03-10 05:43:29 +00:00
|
|
|
static int
|
|
|
|
pcic_attach(device_t dev)
|
|
|
|
{
|
2001-05-13 01:44:27 +00:00
|
|
|
int error;
|
|
|
|
int irq;
|
|
|
|
int i;
|
|
|
|
void *ih;
|
|
|
|
device_t kid;
|
2000-03-10 05:43:29 +00:00
|
|
|
struct resource *r;
|
2001-05-13 01:44:27 +00:00
|
|
|
int rid;
|
2001-05-14 23:08:58 +00:00
|
|
|
struct pcic_softc *sc;
|
2001-05-13 01:44:27 +00:00
|
|
|
struct slot *slt;
|
2000-03-10 05:43:29 +00:00
|
|
|
struct pcic_slot *sp;
|
2001-05-13 01:44:27 +00:00
|
|
|
int stat;
|
2000-03-10 05:43:29 +00:00
|
|
|
|
2001-05-14 23:08:58 +00:00
|
|
|
sc = (struct pcic_softc *) device_get_softc(dev);
|
|
|
|
sp = &sc->slots[0];
|
2000-03-10 05:43:29 +00:00
|
|
|
for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
|
2001-05-13 01:44:27 +00:00
|
|
|
if (!sp->slt)
|
|
|
|
continue;
|
|
|
|
sp->slt = 0;
|
|
|
|
kid = device_add_child(dev, NULL, -1);
|
|
|
|
if (kid == NULL) {
|
|
|
|
device_printf(dev, "Can't add pccard bus slot %d", i);
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
device_probe_and_attach(kid);
|
|
|
|
slt = pccard_init_slot(kid, &cinfo);
|
|
|
|
if (slt == 0) {
|
|
|
|
device_printf(dev, "Can't get pccard info slot %d", i);
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
slt->cdata = sp;
|
|
|
|
sp->slt = slt;
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
r = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
|
2001-05-13 01:44:27 +00:00
|
|
|
if (!r)
|
|
|
|
return (ENXIO);
|
2000-03-10 05:43:29 +00:00
|
|
|
|
|
|
|
irq = bus_get_resource_start(dev, SYS_RES_IRQ, 0);
|
|
|
|
if (irq == 0) {
|
|
|
|
/* See if the user has requested a specific IRQ */
|
|
|
|
if (!getenv_int("machdep.pccard.pcic_irq", &irq))
|
|
|
|
irq = 0;
|
|
|
|
}
|
|
|
|
rid = 0;
|
|
|
|
r = 0;
|
2001-03-19 07:10:38 +00:00
|
|
|
if (irq > 0) {
|
2000-04-25 06:07:27 +00:00
|
|
|
r = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, irq,
|
2001-03-19 07:10:38 +00:00
|
|
|
irq, 1, RF_ACTIVE);
|
|
|
|
}
|
|
|
|
if (r && ((1 << (rman_get_start(r))) & PCIC_INT_MASK_ALLOWED) == 0) {
|
|
|
|
device_printf(dev,
|
|
|
|
"Hardware does not support irq %d, trying polling.\n",
|
|
|
|
irq);
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, rid, r);
|
|
|
|
r = 0;
|
|
|
|
irq = 0;
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
if (r) {
|
|
|
|
error = bus_setup_intr(dev, r, INTR_TYPE_MISC,
|
2001-05-14 23:08:58 +00:00
|
|
|
pcicintr, (void *) sc, &ih);
|
2000-03-10 05:43:29 +00:00
|
|
|
if (error) {
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, rid, r);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (error);
|
2000-03-10 05:43:29 +00:00
|
|
|
}
|
|
|
|
irq = rman_get_start(r);
|
|
|
|
device_printf(dev, "management irq %d\n", irq);
|
|
|
|
} else {
|
|
|
|
irq = 0;
|
|
|
|
}
|
|
|
|
if (irq == 0) {
|
2001-05-14 23:08:58 +00:00
|
|
|
pcictimeout_ch = timeout(pcictimeout, (void *) sc, hz/2);
|
2000-03-10 05:43:29 +00:00
|
|
|
device_printf(dev, "Polling mode\n");
|
|
|
|
}
|
|
|
|
|
2001-05-14 23:08:58 +00:00
|
|
|
sp = &sc->slots[0];
|
2000-03-10 05:43:29 +00:00
|
|
|
for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
|
2001-03-19 07:10:38 +00:00
|
|
|
if (sp->slt == NULL)
|
|
|
|
continue;
|
|
|
|
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
if (sp->controller == PCIC_PC98) {
|
|
|
|
pcic98_last_reg1 = inb(PCIC98_REG1);
|
|
|
|
if (pcic98_last_reg1 & PCIC98_CARDEXIST) {
|
|
|
|
/* PCMCIA card exist */
|
|
|
|
sp->slt->laststate = sp->slt->state = filled;
|
|
|
|
pccard_event(sp->slt, card_inserted);
|
|
|
|
} else {
|
|
|
|
sp->slt->laststate = sp->slt->state = empty;
|
|
|
|
}
|
|
|
|
} else
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
2001-04-19 00:04:08 +00:00
|
|
|
{
|
|
|
|
do_mgt_irq(sp, irq);
|
2000-03-10 05:43:29 +00:00
|
|
|
|
2001-04-19 00:04:08 +00:00
|
|
|
/* Check for changes */
|
|
|
|
setb(sp, PCIC_POWER, PCIC_PCPWRE| PCIC_DISRST);
|
|
|
|
stat = sp->getb(sp, PCIC_STATUS);
|
|
|
|
if (bootverbose)
|
|
|
|
printf("stat is %x\n", stat);
|
|
|
|
if ((stat & PCIC_CD) != PCIC_CD) {
|
|
|
|
sp->slt->laststate = sp->slt->state = empty;
|
|
|
|
} else {
|
|
|
|
sp->slt->laststate = sp->slt->state = filled;
|
|
|
|
pccard_event(sp->slt, card_inserted);
|
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
2000-03-10 05:43:29 +00:00
|
|
|
sp->slt->irq = irq;
|
1999-10-15 17:29:21 +00:00
|
|
|
}
|
2000-03-10 05:43:29 +00:00
|
|
|
|
|
|
|
return (bus_generic_attach(dev));
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* ioctl calls - Controller specific ioctls
|
|
|
|
*/
|
|
|
|
static int
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
1995-11-09 20:44:36 +00:00
|
|
|
switch(cmd) {
|
1995-08-24 08:56:20 +00:00
|
|
|
default:
|
2001-05-13 01:44:27 +00:00
|
|
|
return (ENOTTY);
|
1995-11-09 20:44:36 +00:00
|
|
|
/*
|
|
|
|
* Get/set PCIC registers
|
|
|
|
*/
|
1995-08-24 08:56:20 +00:00
|
|
|
case PIOCGREG:
|
|
|
|
((struct pcic_reg *)data)->value =
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->getb(sp, ((struct pcic_reg *)data)->reg);
|
1995-08-24 08:56:20 +00:00
|
|
|
break;
|
|
|
|
case PIOCSREG:
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->putb(sp, ((struct pcic_reg *)data)->reg,
|
1995-08-24 08:56:20 +00:00
|
|
|
((struct pcic_reg *)data)->value);
|
|
|
|
break;
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* pcic_power - Enable the power of the slot according to
|
|
|
|
* the parameters in the power structure(s).
|
|
|
|
*/
|
|
|
|
static int
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_power(struct slot *slt)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1996-01-06 07:49:43 +00:00
|
|
|
unsigned char reg = PCIC_DISRST|PCIC_PCPWRE;
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
1995-11-09 20:44:36 +00:00
|
|
|
switch(sp->controller) {
|
1995-08-24 08:56:20 +00:00
|
|
|
case PCIC_PD672X:
|
|
|
|
case PCIC_PD6710:
|
1998-08-25 22:46:44 +00:00
|
|
|
case PCIC_VG365:
|
|
|
|
case PCIC_VG465:
|
1996-02-21 23:20:21 +00:00
|
|
|
case PCIC_VG468:
|
1995-11-09 20:44:36 +00:00
|
|
|
case PCIC_VG469:
|
1996-02-21 23:20:21 +00:00
|
|
|
case PCIC_RF5C396:
|
|
|
|
case PCIC_VLSI:
|
|
|
|
case PCIC_IBM_KING:
|
2001-03-19 07:10:38 +00:00
|
|
|
case PCIC_I82365:
|
1997-10-26 04:36:24 +00:00
|
|
|
switch(slt->pwr.vpp) {
|
1995-08-24 08:56:20 +00:00
|
|
|
default:
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
1995-08-24 08:56:20 +00:00
|
|
|
case 0:
|
|
|
|
break;
|
|
|
|
case 50:
|
|
|
|
case 33:
|
|
|
|
reg |= PCIC_VPP_5V;
|
|
|
|
break;
|
|
|
|
case 120:
|
|
|
|
reg |= PCIC_VPP_12V;
|
|
|
|
break;
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
1997-10-26 04:36:24 +00:00
|
|
|
switch(slt->pwr.vcc) {
|
1995-08-24 08:56:20 +00:00
|
|
|
default:
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
1995-08-24 08:56:20 +00:00
|
|
|
case 0:
|
|
|
|
break;
|
|
|
|
case 33:
|
1996-02-21 23:20:21 +00:00
|
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
|
|
reg |= PCIC_VCC_5V_KING;
|
|
|
|
break;
|
|
|
|
}
|
1997-05-22 07:29:24 +00:00
|
|
|
reg |= PCIC_VCC_3V;
|
1998-08-25 22:46:44 +00:00
|
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
|
|
(sp->controller == PCIC_VG469) ||
|
|
|
|
(sp->controller == PCIC_VG465) ||
|
|
|
|
(sp->controller == PCIC_VG365))
|
2001-03-19 07:10:38 +00:00
|
|
|
setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
|
1995-11-09 20:44:36 +00:00
|
|
|
else
|
2001-03-19 07:10:38 +00:00
|
|
|
setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
|
1995-08-24 08:56:20 +00:00
|
|
|
break;
|
|
|
|
case 50:
|
1996-02-21 23:20:21 +00:00
|
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
|
|
reg |= PCIC_VCC_5V_KING;
|
|
|
|
break;
|
|
|
|
}
|
1995-08-24 08:56:20 +00:00
|
|
|
reg |= PCIC_VCC_5V;
|
1998-08-25 22:46:44 +00:00
|
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
|
|
(sp->controller == PCIC_VG469) ||
|
|
|
|
(sp->controller == PCIC_VG465) ||
|
|
|
|
(sp->controller == PCIC_VG365))
|
2001-03-19 07:10:38 +00:00
|
|
|
clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
|
1995-11-09 20:44:36 +00:00
|
|
|
else
|
2001-03-19 07:10:38 +00:00
|
|
|
clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
|
1995-08-24 08:56:20 +00:00
|
|
|
break;
|
|
|
|
}
|
1996-02-21 23:20:21 +00:00
|
|
|
break;
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
1997-10-06 02:46:38 +00:00
|
|
|
sp->putb(sp, PCIC_POWER, reg);
|
1995-08-24 08:56:20 +00:00
|
|
|
DELAY(300*1000);
|
1997-10-26 04:36:24 +00:00
|
|
|
if (slt->pwr.vcc) {
|
1995-08-24 08:56:20 +00:00
|
|
|
reg |= PCIC_OUTENA;
|
1997-10-06 02:46:38 +00:00
|
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
|
|
DELAY(100*1000);
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
1997-05-22 07:29:24 +00:00
|
|
|
/* Some chips are smarter than us it seems, so if we weren't
|
|
|
|
* allowed to use 5V, try 3.3 instead
|
|
|
|
*/
|
2001-03-19 07:10:38 +00:00
|
|
|
if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && slt->pwr.vcc == 50) {
|
1997-10-26 04:36:24 +00:00
|
|
|
slt->pwr.vcc = 33;
|
|
|
|
slt->pwr.vpp = 0;
|
|
|
|
return (pcic_power(slt));
|
1997-05-22 07:29:24 +00:00
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* tell the PCIC which irq we want to use. only the following are legal:
|
2001-03-19 07:10:38 +00:00
|
|
|
* 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this
|
|
|
|
* routine to do the check for legality.
|
1995-08-24 08:56:20 +00:00
|
|
|
*/
|
|
|
|
static void
|
1997-10-28 20:58:53 +00:00
|
|
|
pcic_mapirq(struct slot *slt, int irq)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1995-08-24 08:56:20 +00:00
|
|
|
if (irq == 0)
|
|
|
|
clrb(sp, PCIC_INT_GEN, 0xF);
|
|
|
|
else
|
2001-03-19 07:10:38 +00:00
|
|
|
sp->putb(sp, PCIC_INT_GEN,
|
|
|
|
(sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* pcic_reset - Reset the card and enable initial power.
|
|
|
|
*/
|
|
|
|
static void
|
1995-11-13 08:39:44 +00:00
|
|
|
pcic_reset(void *chan)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct slot *slt = chan;
|
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1997-10-26 04:36:24 +00:00
|
|
|
switch (slt->insert_seq) {
|
1995-11-09 20:44:36 +00:00
|
|
|
case 0: /* Something funny happended on the way to the pub... */
|
|
|
|
return;
|
|
|
|
case 1: /* Assert reset */
|
1997-10-06 03:17:36 +00:00
|
|
|
clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
|
1997-10-26 04:36:24 +00:00
|
|
|
slt->insert_seq = 2;
|
2001-04-19 05:45:51 +00:00
|
|
|
timeout(cinfo.reset, (void *)slt, hz/4);
|
1995-11-09 20:44:36 +00:00
|
|
|
return;
|
|
|
|
case 2: /* Deassert it again */
|
1997-10-06 03:17:36 +00:00
|
|
|
setb(sp, PCIC_INT_GEN, PCIC_CARDRESET|PCIC_IOCARD);
|
1997-10-26 04:36:24 +00:00
|
|
|
slt->insert_seq = 3;
|
2001-04-19 05:45:51 +00:00
|
|
|
timeout(cinfo.reset, (void *)slt, hz/4);
|
1995-11-09 20:44:36 +00:00
|
|
|
return;
|
|
|
|
case 3: /* Wait if card needs more time */
|
1997-04-20 07:21:12 +00:00
|
|
|
if (!sp->getb(sp, PCIC_STATUS) & PCIC_READY) {
|
2001-04-19 05:45:51 +00:00
|
|
|
timeout(cinfo.reset, (void *)slt, hz/10);
|
1995-11-09 20:44:36 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
1997-10-26 04:36:24 +00:00
|
|
|
slt->insert_seq = 0;
|
1995-11-09 20:44:36 +00:00
|
|
|
if (sp->controller == PCIC_PD672X || sp->controller == PCIC_PD6710) {
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
|
|
|
|
sp->putb(sp, PCIC_TIME_CMD0, 0x6);
|
|
|
|
sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
|
|
|
|
sp->putb(sp, PCIC_TIME_SETUP1, 1);
|
|
|
|
sp->putb(sp, PCIC_TIME_CMD1, 0xf);
|
|
|
|
sp->putb(sp, PCIC_TIME_RECOV1, 0);
|
1995-11-09 20:44:36 +00:00
|
|
|
}
|
1997-10-26 04:36:24 +00:00
|
|
|
selwakeup(&slt->selp);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1995-11-09 20:44:36 +00:00
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* pcic_disable - Disable the slot.
|
|
|
|
*/
|
|
|
|
static void
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_disable(struct slot *slt)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1995-08-24 08:56:20 +00:00
|
|
|
|
1997-04-20 07:21:12 +00:00
|
|
|
sp->putb(sp, PCIC_INT_GEN, 0);
|
|
|
|
sp->putb(sp, PCIC_POWER, 0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
|
|
|
|
2001-05-14 21:08:20 +00:00
|
|
|
/*
|
|
|
|
* Wrapper function for pcicintr so that signatures match.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
pcicintr(void *arg)
|
|
|
|
{
|
|
|
|
pcicintr1(arg);
|
|
|
|
}
|
|
|
|
|
1995-10-21 00:55:36 +00:00
|
|
|
/*
|
1998-04-20 15:15:20 +00:00
|
|
|
* PCIC timer. If the controller doesn't have a free IRQ to use
|
|
|
|
* or if interrupt steering doesn't work, poll the controller for
|
|
|
|
* insertion/removal events.
|
1995-10-21 00:55:36 +00:00
|
|
|
*/
|
|
|
|
static void
|
1995-11-09 08:58:20 +00:00
|
|
|
pcictimeout(void *chan)
|
1995-10-21 00:55:36 +00:00
|
|
|
{
|
2001-05-14 21:08:20 +00:00
|
|
|
if (pcicintr1(chan) != 0) {
|
|
|
|
printf("pcic%d: Static bug detected, ignoring hardware.\n",
|
2001-05-14 23:08:58 +00:00
|
|
|
((struct pcic_softc *)chan)->unit);
|
2001-05-14 21:08:20 +00:00
|
|
|
return;
|
|
|
|
}
|
2000-03-10 05:43:29 +00:00
|
|
|
pcictimeout_ch = timeout(pcictimeout, chan, hz/2);
|
1995-10-21 00:55:36 +00:00
|
|
|
}
|
|
|
|
|
1995-08-24 08:56:20 +00:00
|
|
|
/*
|
|
|
|
* PCIC Interrupt handler.
|
|
|
|
* Check each slot in turn, and read the card status change
|
|
|
|
* register. If this is non-zero, then a change has occurred
|
|
|
|
* on this card, so send an event to the main code.
|
|
|
|
*/
|
2001-05-14 21:08:20 +00:00
|
|
|
static int
|
|
|
|
pcicintr1(void *arg)
|
1995-08-24 08:56:20 +00:00
|
|
|
{
|
1995-11-09 20:44:36 +00:00
|
|
|
int slot, s;
|
|
|
|
unsigned char chg;
|
2001-05-14 23:08:58 +00:00
|
|
|
struct pcic_softc *sc = (struct pcic_softc *) arg;
|
|
|
|
struct pcic_slot *sp = &sc->slots[0];
|
1995-08-24 08:56:20 +00:00
|
|
|
|
|
|
|
s = splhigh();
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
if (sp->controller == PCIC_PC98) {
|
|
|
|
u_char reg1;
|
|
|
|
/* Check for a card in this slot */
|
|
|
|
reg1 = inb(PCIC98_REG1);
|
|
|
|
if ((pcic98_last_reg1 ^ reg1) & PCIC98_CARDEXIST) {
|
|
|
|
pcic98_last_reg1 = reg1;
|
|
|
|
if (reg1 & PCIC98_CARDEXIST)
|
|
|
|
pccard_event(sp->slt, card_inserted);
|
|
|
|
else
|
|
|
|
pccard_event(sp->slt, card_removed);
|
|
|
|
}
|
|
|
|
} else
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
2001-04-19 00:04:08 +00:00
|
|
|
{
|
|
|
|
for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) {
|
|
|
|
if (sp->slt &&
|
|
|
|
(chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) {
|
2001-05-14 21:08:20 +00:00
|
|
|
/*
|
|
|
|
* if chg is 0xff, then we know that
|
|
|
|
* we've hit the famous "static bug" for
|
|
|
|
* some desktop pcmcia cards. This is
|
|
|
|
* caused by static discharge frying the
|
|
|
|
* poor card's mind and it starts return 0xff
|
|
|
|
* forever. We return an error and stop
|
|
|
|
* polling the card. When we're interrupt
|
|
|
|
* based, we never see this. The card just
|
|
|
|
* goes away silently.
|
|
|
|
*/
|
|
|
|
if (chg == 0xff) {
|
|
|
|
splx(s);
|
|
|
|
return (EIO);
|
|
|
|
}
|
2001-04-19 00:04:08 +00:00
|
|
|
if (chg & PCIC_CDTCH) {
|
|
|
|
if ((sp->getb(sp, PCIC_STATUS) &
|
|
|
|
PCIC_CD) == PCIC_CD) {
|
|
|
|
pccard_event(sp->slt,
|
|
|
|
card_inserted);
|
|
|
|
} else {
|
|
|
|
pccard_event(sp->slt,
|
|
|
|
card_removed);
|
2001-05-07 16:50:34 +00:00
|
|
|
cinfo.disable(sp->slt);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
1995-10-21 00:55:36 +00:00
|
|
|
}
|
|
|
|
}
|
1999-10-25 23:17:24 +00:00
|
|
|
}
|
|
|
|
}
|
1995-08-24 08:56:20 +00:00
|
|
|
splx(s);
|
2001-05-14 21:08:20 +00:00
|
|
|
return (0);
|
1995-08-24 08:56:20 +00:00
|
|
|
}
|
1997-01-08 00:22:58 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* pcic_resume - Suspend/resume support for PCIC
|
|
|
|
*/
|
|
|
|
static void
|
1997-10-26 04:36:24 +00:00
|
|
|
pcic_resume(struct slot *slt)
|
1997-01-08 00:22:58 +00:00
|
|
|
{
|
1997-10-26 04:36:24 +00:00
|
|
|
struct pcic_slot *sp = slt->cdata;
|
1999-10-25 02:41:58 +00:00
|
|
|
|
2001-03-19 07:10:38 +00:00
|
|
|
do_mgt_irq(sp, slt->irq);
|
1997-10-06 03:17:36 +00:00
|
|
|
if (sp->controller == PCIC_PD672X) {
|
2001-03-19 07:10:38 +00:00
|
|
|
setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
|
1997-10-06 04:02:42 +00:00
|
|
|
setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
1997-10-06 03:17:36 +00:00
|
|
|
}
|
1997-01-08 00:22:58 +00:00
|
|
|
}
|
1999-10-15 17:29:21 +00:00
|
|
|
|
2001-05-13 04:16:09 +00:00
|
|
|
#ifdef MECIA_SUPPORT
|
2001-04-19 00:04:08 +00:00
|
|
|
/*
|
|
|
|
* local functions for PC-98 Original PC-Card controller
|
|
|
|
*/
|
|
|
|
#define PCIC98_ALWAYS_128MAPPING 1 /* trick for using UE2212 */
|
|
|
|
|
|
|
|
int pcic98_mode = 0; /* almost the same as the value in PCIC98_REG2 */
|
|
|
|
|
|
|
|
static unsigned char reg_winsel = PCIC98_UNMAPWIN;
|
|
|
|
static unsigned short reg_pagofs = 0;
|
|
|
|
|
|
|
|
static int
|
|
|
|
pcic98_memory(struct slot *slt, int win)
|
|
|
|
{
|
|
|
|
struct mem_desc *mp = &slt->mem[win];
|
|
|
|
unsigned char x;
|
|
|
|
|
|
|
|
if (mp->flags & MDF_ACTIVE) {
|
|
|
|
/* slot = 0, window = 0, sys_addr = 0xda000, length = 8KB */
|
|
|
|
if ((unsigned long)mp->start != 0xda000) {
|
|
|
|
printf(
|
|
|
|
"sys_addr must be 0xda000. requested address = %p\n",
|
|
|
|
mp->start);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* omajinai ??? */
|
|
|
|
outb(PCIC98_REG0, 0);
|
|
|
|
x = inb(PCIC98_REG1);
|
|
|
|
x &= 0xfc;
|
|
|
|
x |= 0x02;
|
|
|
|
outb(PCIC98_REG1, x);
|
|
|
|
reg_winsel = inb(PCIC98_REG_WINSEL);
|
|
|
|
reg_pagofs = inw(PCIC98_REG_PAGOFS);
|
|
|
|
outb(PCIC98_REG_WINSEL, PCIC98_MAPWIN);
|
|
|
|
outw(PCIC98_REG_PAGOFS, (mp->card >> 13)); /* 8KB */
|
|
|
|
|
|
|
|
if (mp->flags & MDF_ATTR) {
|
|
|
|
outb(PCIC98_REG7, inb(PCIC98_REG7) | PCIC98_ATTRMEM);
|
|
|
|
}else{
|
|
|
|
outb(PCIC98_REG7, inb(PCIC98_REG7) & (~PCIC98_ATTRMEM));
|
|
|
|
}
|
|
|
|
|
|
|
|
outb(PCIC98_REG_WINSEL, PCIC98_MAPWIN);
|
|
|
|
#if 0
|
|
|
|
if ((mp->flags & MDF_16BITS) == 1) { /* 16bit */
|
|
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_8BIT));
|
|
|
|
}else{ /* 8bit */
|
|
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) | PCIC98_8BIT);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
} else { /* !(mp->flags & MDF_ACTIVE) */
|
|
|
|
outb(PCIC98_REG0, 0);
|
|
|
|
x = inb(PCIC98_REG1);
|
|
|
|
x &= 0xfc;
|
|
|
|
x |= 0x02;
|
|
|
|
outb(PCIC98_REG1, x);
|
|
|
|
#if 0
|
|
|
|
outb(PCIC98_REG_WINSEL, PCIC98_UNMAPWIN);
|
|
|
|
outw(PCIC98_REG_PAGOFS, 0);
|
|
|
|
#else
|
|
|
|
outb(PCIC98_REG_WINSEL, reg_winsel);
|
|
|
|
outw(PCIC98_REG_PAGOFS, reg_pagofs);
|
|
|
|
#endif
|
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pcic98_io(struct slot *slt, int win)
|
|
|
|
{
|
|
|
|
struct io_desc *ip = &slt->io[win];
|
|
|
|
unsigned char x;
|
|
|
|
unsigned short cardbase;
|
|
|
|
u_short ofst;
|
|
|
|
|
|
|
|
if (win != 0) {
|
|
|
|
/* ignore for UE2212 */
|
|
|
|
printf(
|
|
|
|
"pcic98:Illegal PCIC I/O window(%d) request! Ignored.\n", win);
|
2001-05-13 01:44:27 +00:00
|
|
|
/* return (EINVAL);*/
|
|
|
|
return (0);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ip->flags & IODF_ACTIVE) {
|
|
|
|
x = inb(PCIC98_REG2) & 0x0f;
|
|
|
|
#if 0
|
|
|
|
if (! (ip->flags & IODF_CS16))
|
|
|
|
x |= PCIC98_8BIT;
|
|
|
|
#else
|
|
|
|
if (! (ip->flags & IODF_16BIT)) {
|
|
|
|
x |= PCIC98_8BIT;
|
|
|
|
pcic98_mode |= PCIC98_8BIT;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
ofst = ip->start & 0xf;
|
|
|
|
cardbase = ip->start & ~0xf;
|
|
|
|
#ifndef PCIC98_ALWAYS_128MAPPING
|
|
|
|
if (ip->size + ofst > 16)
|
|
|
|
#endif
|
|
|
|
{ /* 128bytes mapping */
|
|
|
|
x |= PCIC98_MAP128;
|
|
|
|
pcic98_mode |= PCIC98_MAP128;
|
|
|
|
ofst |= ((cardbase & 0x70) << 4);
|
|
|
|
cardbase &= ~0x70;
|
|
|
|
}
|
|
|
|
|
|
|
|
x |= PCIC98_MAPIO;
|
|
|
|
outb(PCIC98_REG2, x);
|
|
|
|
|
|
|
|
outw(PCIC98_REG4, PCIC98_IOBASE); /* 98side I/O base */
|
|
|
|
outw(PCIC98_REG5, cardbase); /* card side I/O base */
|
|
|
|
|
|
|
|
if (bootverbose) {
|
|
|
|
printf("pcic98: I/O mapped 0x%04x(98) -> "
|
|
|
|
"0x%04x(Card) and width %d bytes\n",
|
|
|
|
PCIC98_IOBASE+ofst, ip->start, ip->size);
|
|
|
|
printf("pcic98: reg2=0x%02x reg3=0x%02x reg7=0x%02x\n",
|
|
|
|
inb(PCIC98_REG2), inb(PCIC98_REG3),
|
|
|
|
inb(PCIC98_REG7));
|
|
|
|
printf("pcic98: mode=%d\n", pcic98_mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
ip->start = PCIC98_IOBASE + ofst;
|
|
|
|
} else {
|
|
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_MAPIO));
|
|
|
|
pcic98_mode = 0;
|
|
|
|
}
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pcic98_power(struct slot *slt)
|
|
|
|
{
|
|
|
|
unsigned char reg;
|
|
|
|
|
|
|
|
reg = inb(PCIC98_REG7) & (~PCIC98_VPP12V);
|
|
|
|
switch(slt->pwr.vpp) {
|
|
|
|
default:
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
2001-04-19 00:04:08 +00:00
|
|
|
case 50:
|
|
|
|
break;
|
|
|
|
case 120:
|
|
|
|
reg |= PCIC98_VPP12V;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
outb(PCIC98_REG7, reg);
|
|
|
|
DELAY(100*1000);
|
|
|
|
|
|
|
|
reg = inb(PCIC98_REG2) & (~PCIC98_VCC3P3V);
|
|
|
|
switch(slt->pwr.vcc) {
|
|
|
|
default:
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
2001-04-19 00:04:08 +00:00
|
|
|
case 33:
|
|
|
|
reg |= PCIC98_VCC3P3V;
|
|
|
|
break;
|
|
|
|
case 50:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
outb(PCIC98_REG2, reg);
|
|
|
|
DELAY(100*1000);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (0);
|
2001-04-19 00:04:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pcic98_mapirq(struct slot *slt, int irq)
|
|
|
|
{
|
|
|
|
u_char x;
|
|
|
|
|
|
|
|
switch (irq) {
|
|
|
|
case 3:
|
|
|
|
x = PCIC98_INT0;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
x = PCIC98_INT1;
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
x = PCIC98_INT2;
|
|
|
|
break;
|
|
|
|
case 10:
|
|
|
|
x = PCIC98_INT4;
|
|
|
|
break;
|
|
|
|
case 12:
|
|
|
|
x = PCIC98_INT5;
|
|
|
|
break;
|
|
|
|
case 0: /* disable */
|
|
|
|
x = PCIC98_INTDISABLE;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("pcic98: illegal irq %d\n", irq);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#ifdef PCIC_DEBUG
|
|
|
|
printf("pcic98: irq=%d mapped.\n", irq);
|
|
|
|
#endif
|
|
|
|
outb(PCIC98_REG3, x);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pcic98_reset(void *chan)
|
|
|
|
{
|
|
|
|
struct slot *slt = chan;
|
|
|
|
|
|
|
|
outb(PCIC98_REG0, 0);
|
|
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_MAPIO));
|
|
|
|
outb(PCIC98_REG3, PCIC98_INTDISABLE);
|
|
|
|
#if 0
|
|
|
|
/* pcic98_reset() is called after pcic98_power() */
|
|
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_VCC3P3V));
|
|
|
|
outb(PCIC98_REG7, inb(PCIC98_REG7) & (~PCIC98_VPP12V));
|
|
|
|
#endif
|
|
|
|
outb(PCIC98_REG1, 0);
|
|
|
|
|
|
|
|
selwakeup(&slt->selp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pcic98_disable(struct slot *slt)
|
|
|
|
{
|
|
|
|
/* null function */
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pcic98_resume(struct slot *slt)
|
|
|
|
{
|
|
|
|
/* XXX PCIC98 How ? */
|
|
|
|
}
|
2001-05-13 04:16:09 +00:00
|
|
|
#endif /* MECIA_SUPPORT */
|
2001-04-19 00:04:08 +00:00
|
|
|
/* end of local functions for PC-98 Original PC-Card controller */
|
|
|
|
|
1999-10-25 02:41:58 +00:00
|
|
|
static int
|
|
|
|
pcic_activate_resource(device_t dev, device_t child, int type, int rid,
|
|
|
|
struct resource *r)
|
|
|
|
{
|
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
int err;
|
|
|
|
|
2001-05-14 04:53:02 +00:00
|
|
|
if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
|
|
|
|
return (bus_generic_activate_resource(dev, child, type,
|
|
|
|
rid, r));
|
|
|
|
|
1999-10-25 02:41:58 +00:00
|
|
|
switch (type) {
|
2000-04-20 08:37:46 +00:00
|
|
|
case SYS_RES_IOPORT: {
|
2000-02-21 06:52:20 +00:00
|
|
|
struct io_desc *ip;
|
|
|
|
ip = &devi->slt->io[rid];
|
|
|
|
if (ip->flags == 0) {
|
|
|
|
if (rid == 0)
|
|
|
|
ip->flags = IODF_WS | IODF_16BIT | IODF_CS16;
|
|
|
|
else
|
|
|
|
ip->flags = devi->slt->io[0].flags;
|
|
|
|
}
|
1999-10-25 02:41:58 +00:00
|
|
|
ip->flags |= IODF_ACTIVE;
|
|
|
|
ip->start = rman_get_start(r);
|
|
|
|
ip->size = rman_get_end(r) - rman_get_start(r) + 1;
|
2001-04-19 05:45:51 +00:00
|
|
|
err = cinfo.mapio(devi->slt, rid);
|
1999-10-25 23:17:24 +00:00
|
|
|
if (err)
|
2001-05-13 01:44:27 +00:00
|
|
|
return (err);
|
1999-10-25 02:41:58 +00:00
|
|
|
break;
|
1999-10-25 23:17:24 +00:00
|
|
|
}
|
1999-10-25 02:41:58 +00:00
|
|
|
case SYS_RES_IRQ:
|
2000-02-21 06:52:20 +00:00
|
|
|
/*
|
|
|
|
* We actually defer the activation of the IRQ resource
|
|
|
|
* until the interrupt is registered to avoid stray
|
|
|
|
* interrupt messages.
|
|
|
|
*/
|
1999-10-25 02:41:58 +00:00
|
|
|
break;
|
2000-04-20 08:37:46 +00:00
|
|
|
case SYS_RES_MEMORY: {
|
2000-02-21 06:52:20 +00:00
|
|
|
struct mem_desc *mp;
|
|
|
|
if (rid >= NUM_MEM_WINDOWS)
|
2001-05-13 01:44:27 +00:00
|
|
|
return (EINVAL);
|
2000-02-21 06:52:20 +00:00
|
|
|
mp = &devi->slt->mem[rid];
|
|
|
|
mp->flags |= MDF_ACTIVE;
|
1999-10-28 04:51:39 +00:00
|
|
|
mp->start = (caddr_t) rman_get_start(r);
|
1999-10-25 23:17:24 +00:00
|
|
|
mp->size = rman_get_end(r) - rman_get_start(r) + 1;
|
2001-04-19 05:45:51 +00:00
|
|
|
err = cinfo.mapmem(devi->slt, rid);
|
1999-10-25 23:17:24 +00:00
|
|
|
if (err)
|
2001-05-13 01:44:27 +00:00
|
|
|
return (err);
|
1999-10-25 23:17:24 +00:00
|
|
|
break;
|
|
|
|
}
|
1999-10-25 02:41:58 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
err = bus_generic_activate_resource(dev, child, type, rid, r);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (err);
|
1999-10-25 02:41:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
|
|
|
|
struct resource *r)
|
|
|
|
{
|
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
int err;
|
|
|
|
|
2001-05-14 04:53:02 +00:00
|
|
|
if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
|
|
|
|
return (bus_generic_deactivate_resource(dev, child, type,
|
|
|
|
rid, r));
|
|
|
|
|
1999-10-25 02:41:58 +00:00
|
|
|
switch (type) {
|
2000-04-20 08:37:46 +00:00
|
|
|
case SYS_RES_IOPORT: {
|
1999-10-25 23:17:24 +00:00
|
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
1999-10-25 02:41:58 +00:00
|
|
|
ip->flags &= ~IODF_ACTIVE;
|
2001-04-19 05:45:51 +00:00
|
|
|
err = cinfo.mapio(devi->slt, rid);
|
2001-05-13 01:44:27 +00:00
|
|
|
if (err)
|
|
|
|
return (err);
|
1999-10-25 02:41:58 +00:00
|
|
|
break;
|
1999-10-25 23:17:24 +00:00
|
|
|
}
|
1999-10-25 02:41:58 +00:00
|
|
|
case SYS_RES_IRQ:
|
|
|
|
break;
|
2000-04-20 08:37:46 +00:00
|
|
|
case SYS_RES_MEMORY: {
|
1999-10-25 23:17:24 +00:00
|
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
2000-02-21 06:52:20 +00:00
|
|
|
mp->flags &= ~(MDF_ACTIVE | MDF_ATTR);
|
2001-04-19 05:45:51 +00:00
|
|
|
err = cinfo.mapmem(devi->slt, rid);
|
2001-05-13 01:44:27 +00:00
|
|
|
if (err)
|
|
|
|
return (err);
|
1999-10-25 23:17:24 +00:00
|
|
|
break;
|
|
|
|
}
|
1999-10-25 02:41:58 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
err = bus_generic_deactivate_resource(dev, child, type, rid, r);
|
2001-05-13 01:44:27 +00:00
|
|
|
return (err);
|
1999-10-25 02:41:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2000-04-25 06:07:27 +00:00
|
|
|
pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
|
1999-10-25 02:41:58 +00:00
|
|
|
int flags, driver_intr_t *intr, void *arg, void **cookiep)
|
|
|
|
{
|
1999-12-10 07:02:41 +00:00
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
int err;
|
|
|
|
|
2001-03-19 07:10:38 +00:00
|
|
|
if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) {
|
|
|
|
device_printf(dev, "Hardware does not support irq %ld.\n",
|
|
|
|
rman_get_start(irq));
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
2000-04-25 06:07:27 +00:00
|
|
|
err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
|
1999-12-10 07:02:41 +00:00
|
|
|
cookiep);
|
|
|
|
if (err == 0)
|
2001-04-19 05:45:51 +00:00
|
|
|
cinfo.mapirq(devi->slt, rman_get_start(irq));
|
1999-12-10 07:02:41 +00:00
|
|
|
else
|
|
|
|
device_printf(dev, "Error %d irq %ld\n", err,
|
|
|
|
rman_get_start(irq));
|
|
|
|
return (err);
|
1999-10-25 02:41:58 +00:00
|
|
|
}
|
2000-04-25 06:07:27 +00:00
|
|
|
|
1999-10-25 02:41:58 +00:00
|
|
|
static int
|
|
|
|
pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
|
|
|
|
void *cookie)
|
|
|
|
{
|
1999-12-10 07:02:41 +00:00
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
|
2001-04-19 05:45:51 +00:00
|
|
|
cinfo.mapirq(devi->slt, 0);
|
1999-10-25 02:41:58 +00:00
|
|
|
return (bus_generic_teardown_intr(dev, child, irq, cookie));
|
|
|
|
}
|
|
|
|
|
2000-04-20 08:37:46 +00:00
|
|
|
static int
|
|
|
|
pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
|
|
u_long value)
|
|
|
|
{
|
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
switch (restype) {
|
|
|
|
case SYS_RES_MEMORY: {
|
|
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
2000-08-10 17:35:11 +00:00
|
|
|
switch (value) {
|
2001-05-08 23:59:13 +00:00
|
|
|
case PCCARD_A_MEM_COM:
|
2000-04-20 08:37:46 +00:00
|
|
|
mp->flags &= ~MDF_ATTR;
|
2000-08-10 17:35:11 +00:00
|
|
|
break;
|
2001-05-08 23:59:13 +00:00
|
|
|
case PCCARD_A_MEM_ATTR:
|
2000-08-10 17:35:11 +00:00
|
|
|
mp->flags |= MDF_ATTR;
|
|
|
|
break;
|
2001-05-08 23:59:13 +00:00
|
|
|
case PCCARD_A_MEM_8BIT:
|
2000-08-10 17:35:11 +00:00
|
|
|
mp->flags &= ~MDF_16BITS;
|
|
|
|
break;
|
2001-05-08 23:59:13 +00:00
|
|
|
case PCCARD_A_MEM_16BIT:
|
|
|
|
mp->flags |= MDF_16BITS;
|
|
|
|
break;
|
2000-08-10 17:35:11 +00:00
|
|
|
}
|
2001-04-19 05:45:51 +00:00
|
|
|
err = cinfo.mapmem(devi->slt, rid);
|
2000-04-20 08:37:46 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
err = EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
return (err);
|
|
|
|
}
|
|
|
|
|
2000-04-25 06:07:27 +00:00
|
|
|
static int
|
|
|
|
pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
|
|
u_long *value)
|
2000-04-20 08:37:46 +00:00
|
|
|
{
|
2000-08-10 17:35:11 +00:00
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
if (value == 0)
|
|
|
|
return (ENOMEM);
|
|
|
|
|
|
|
|
switch (restype) {
|
|
|
|
case SYS_RES_IOPORT: {
|
|
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
|
|
|
*value = ip->flags;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SYS_RES_MEMORY: {
|
|
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
*value = mp->flags;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
err = EOPNOTSUPP;
|
|
|
|
}
|
2001-05-13 04:44:45 +00:00
|
|
|
return (err);
|
2000-04-25 06:07:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2001-01-07 16:31:09 +00:00
|
|
|
pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset,
|
|
|
|
u_int32_t *deltap)
|
2000-04-25 06:07:27 +00:00
|
|
|
{
|
2000-08-10 17:35:11 +00:00
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
|
|
|
|
mp->card = offset;
|
2001-01-07 16:31:09 +00:00
|
|
|
if (deltap)
|
|
|
|
*deltap = 0; /* XXX BAD XXX */
|
2001-04-19 05:45:51 +00:00
|
|
|
return (cinfo.mapmem(devi->slt, rid));
|
2000-08-10 17:35:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset)
|
|
|
|
{
|
|
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
|
|
|
|
if (offset == 0)
|
|
|
|
return (ENOMEM);
|
|
|
|
|
|
|
|
*offset = mp->card;
|
|
|
|
|
|
|
|
return (0);
|
2000-04-20 08:37:46 +00:00
|
|
|
}
|
|
|
|
|
1999-10-15 17:29:21 +00:00
|
|
|
static device_method_t pcic_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, pcic_probe),
|
2000-03-10 05:43:29 +00:00
|
|
|
DEVMETHOD(device_attach, pcic_attach),
|
1999-10-15 17:29:21 +00:00
|
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
|
|
|
|
/* Bus interface */
|
|
|
|
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
2000-04-25 06:07:27 +00:00
|
|
|
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
|
1999-10-15 17:29:21 +00:00
|
|
|
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
1999-10-25 02:41:58 +00:00
|
|
|
DEVMETHOD(bus_activate_resource, pcic_activate_resource),
|
|
|
|
DEVMETHOD(bus_deactivate_resource, pcic_deactivate_resource),
|
|
|
|
DEVMETHOD(bus_setup_intr, pcic_setup_intr),
|
|
|
|
DEVMETHOD(bus_teardown_intr, pcic_teardown_intr),
|
1999-10-15 17:29:21 +00:00
|
|
|
|
2000-04-25 06:07:27 +00:00
|
|
|
/* Card interface */
|
|
|
|
DEVMETHOD(card_set_res_flags, pcic_set_res_flags),
|
|
|
|
DEVMETHOD(card_get_res_flags, pcic_get_res_flags),
|
|
|
|
DEVMETHOD(card_set_memory_offset, pcic_set_memory_offset),
|
2000-08-10 17:35:11 +00:00
|
|
|
DEVMETHOD(card_get_memory_offset, pcic_get_memory_offset),
|
2000-04-25 06:07:27 +00:00
|
|
|
|
1999-10-15 17:29:21 +00:00
|
|
|
{ 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
devclass_t pcic_devclass;
|
|
|
|
|
|
|
|
static driver_t pcic_driver = {
|
|
|
|
"pcic",
|
|
|
|
pcic_methods,
|
2001-05-14 23:08:58 +00:00
|
|
|
sizeof(struct pcic_softc)
|
1999-10-15 17:29:21 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
DRIVER_MODULE(pcic, isa, pcic_driver, pcic_devclass, 0, 0);
|