2014-09-23 12:37:01 +00:00
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/*
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* Copyright (c) 2014 Mellanox Technologies Ltd. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _MLX4_STATS_
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#define _MLX4_STATS_
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#define NUM_PRIORITIES 9
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#define NUM_PRIORITY_STATS 2
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struct mlx4_en_pkt_stats {
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2017-11-15 11:14:39 +00:00
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u64 rx_packets;
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u64 rx_bytes;
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u64 rx_multicast_packets;
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u64 rx_broadcast_packets;
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u64 rx_errors;
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u64 rx_dropped;
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u64 rx_length_errors;
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u64 rx_over_errors;
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u64 rx_crc_errors;
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u64 rx_jabbers;
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u64 rx_in_range_length_error;
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u64 rx_out_range_length_error;
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u64 rx_lt_64_bytes_packets;
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u64 rx_127_bytes_packets;
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u64 rx_255_bytes_packets;
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u64 rx_511_bytes_packets;
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u64 rx_1023_bytes_packets;
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u64 rx_1518_bytes_packets;
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u64 rx_1522_bytes_packets;
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u64 rx_1548_bytes_packets;
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u64 rx_gt_1548_bytes_packets;
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u64 tx_packets;
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u64 tx_bytes;
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u64 tx_multicast_packets;
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u64 tx_broadcast_packets;
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u64 tx_errors;
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u64 tx_dropped;
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u64 tx_lt_64_bytes_packets;
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u64 tx_127_bytes_packets;
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u64 tx_255_bytes_packets;
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u64 tx_511_bytes_packets;
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u64 tx_1023_bytes_packets;
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u64 tx_1518_bytes_packets;
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u64 tx_1522_bytes_packets;
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u64 tx_1548_bytes_packets;
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u64 tx_gt_1548_bytes_packets;
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u64 rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];
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u64 tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];
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2014-09-23 12:37:01 +00:00
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};
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struct mlx4_en_vf_stats {
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2017-11-15 11:14:39 +00:00
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u64 rx_frames;
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u64 rx_bytes;
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u64 tx_frames;
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u64 tx_bytes;
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2014-09-23 12:37:01 +00:00
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};
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struct mlx4_en_vport_stats {
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2017-11-15 11:14:39 +00:00
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u64 rx_frames;
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u64 rx_bytes;
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u64 tx_frames;
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u64 tx_bytes;
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2014-09-23 12:37:01 +00:00
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};
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struct mlx4_en_port_stats {
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2017-11-15 11:14:39 +00:00
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u64 tso_packets;
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u64 queue_stopped;
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u64 wake_queue;
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u64 tx_timeout;
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u64 oversized_packets;
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u64 rx_alloc_failed;
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u64 rx_chksum_good;
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u64 rx_chksum_none;
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u64 tx_chksum_offload;
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u64 defrag_attempts;
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2014-09-23 12:37:01 +00:00
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};
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struct mlx4_en_perf_stats {
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u32 tx_poll;
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u64 tx_pktsz_avg;
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u32 inflight_avg;
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u16 tx_coal_avg;
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u16 rx_coal_avg;
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u32 napi_quota;
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};
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2017-11-15 11:14:39 +00:00
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#define MLX4_NUM_PRIORITIES 8
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struct mlx4_en_flow_stats_rx {
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2014-09-23 12:37:01 +00:00
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u64 rx_pause;
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u64 rx_pause_duration;
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u64 rx_pause_transition;
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2017-11-15 11:14:39 +00:00
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};
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struct mlx4_en_flow_stats_tx {
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2014-09-23 12:37:01 +00:00
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u64 tx_pause;
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u64 tx_pause_duration;
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u64 tx_pause_transition;
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};
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struct mlx4_en_stat_out_flow_control_mbox {
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/* Total number of PAUSE frames received from the far-end port */
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__be64 rx_pause;
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/* Total number of microseconds that far-end port requested to pause
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* transmission of packets
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*/
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__be64 rx_pause_duration;
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/* Number of received transmission from XOFF state to XON state */
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__be64 rx_pause_transition;
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/* Total number of PAUSE frames sent from the far-end port */
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__be64 tx_pause;
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/* Total time in microseconds that transmission of packets has been
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* paused
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*/
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__be64 tx_pause_duration;
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/* Number of transmitter transitions from XOFF state to XON state */
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__be64 tx_pause_transition;
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/* Reserverd */
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__be64 reserved[2];
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};
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2017-11-15 11:14:39 +00:00
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enum {
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MLX4_DUMP_ETH_STATS_FLOW_CONTROL = 1 << 12
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};
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2014-09-23 12:37:01 +00:00
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int mlx4_get_vport_ethtool_stats(struct mlx4_dev *dev, int port,
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2017-11-15 11:14:39 +00:00
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struct mlx4_en_vport_stats *vport_stats,
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int reset, int *read_counters);
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2014-09-23 12:37:01 +00:00
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#endif
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