2013-03-28 20:48:58 +00:00
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#
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# This file adds to the values in AR91XX_BASE.hints.
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#
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# $FreeBSD$
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2013-04-05 01:38:13 +00:00
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# mdiobus on arge1
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x1a000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# Embedded Atheros Switch
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hint.arswitch.0.at="mdio0"
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hint.arswitch.0.is_7240=1
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hint.arswitch.0.numphys=4
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hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge0 - MII, autoneg, phy(4)
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hint.arge.0.phymask=0x10 # PHY4
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hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
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# arge1 - GMII, 1000/full
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hint.arge.1.phymask=0x0 # No directly mapped PHYs
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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2013-03-28 20:48:58 +00:00
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# The AP121 4MB flash layout:
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#
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# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
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# init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
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# 2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
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#
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# So:
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# 256k: uboot
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# 64: uboot-env
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# 2752k: rootfs
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# 896k: kernel
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# 64k: config
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# 64k: ART
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x000040000
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00040000
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hint.map.1.end=0x00050000
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hint.map.1.name="uboot-env"
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hint.map.1.readonly=0
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00050000
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hint.map.2.end=0x00300000
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hint.map.2.name="rootfs"
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hint.map.2.readonly=0
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hint.map.3.at="flash/spi0"
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hint.map.3.start=0x00300000
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hint.map.3.end=0x003e0000
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hint.map.3.name="kernel"
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hint.map.3.readonly=0
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x003e0000
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hint.map.4.end=0x003f0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# This is radio calibration section. It is (or should be!) unique
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# for each board, to take into account thermal and electrical differences
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# as well as the regulatory compliance data.
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#
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x003f0000
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hint.map.5.end=0x00400000
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hint.map.5.name="art"
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hint.map.5.readonly=1
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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hint.gpio.0.function_set=0x00002000
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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#hint.gpio.0.pinmask=0x001c02ae
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hint.gpio.0.pinmask=0x0
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# pin 1 - USB (LED)
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# pin 2 - System (LED)
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# Pin 3 - Reset (input)
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# Pin 5 - QSS (LED)
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# Pin 7 - QSS Button (input)
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# Pin 8 - wired into the chip reset line
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# Pin 9 - WLAN
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# Pin 10 - UART TX (not GPIO)
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# Pin 13 - UART RX (not GPIO)
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# Pin 18 - RTL8366RB switch data line
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# Pin 19 - RTL8366RB switch clock line
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# Pin 20 - "GPIO20"
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# LEDs are configured separately and driven by the LED device
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#hint.gpioled.0.at="gpiobus0"
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#hint.gpioled.0.name="usb"
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#hint.gpioled.0.pins=0x0002
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#hint.gpioled.1.at="gpiobus0"
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#hint.gpioled.1.name="system"
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#hint.gpioled.1.pins=0x0004
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#hint.gpioled.2.at="gpiobus0"
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#hint.gpioled.2.name="qss"
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#hint.gpioled.2.pins=0x0020
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#hint.gpioled.3.at="gpiobus0"
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#hint.gpioled.3.name="wlan"
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#hint.gpioled.3.pins=0x0200
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