2006-03-25 06:14:32 +00:00
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/*-
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* Copyright (c) 2006 IronPort Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2007-08-25 23:58:45 +00:00
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/*-
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* Copyright (c) 2007 LSI Corp.
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* Copyright (c) 2007 Rajesh Prabhakaran.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2006-03-25 06:14:32 +00:00
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#ifndef _MFIVAR_H
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#define _MFIVAR_H
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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2007-08-13 19:29:17 +00:00
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#include <sys/lock.h>
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#include <sys/sx.h>
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2011-11-04 02:34:52 +00:00
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#include <sys/types.h>
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2012-03-30 23:05:48 +00:00
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#include <sys/taskqueue.h>
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2012-07-11 19:08:23 +00:00
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#include "opt_mfi.h"
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2011-11-04 02:34:52 +00:00
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2006-03-25 06:14:32 +00:00
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/*
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* SCSI structures and definitions are used from here, but no linking
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* requirements are made to CAM.
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*/
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#include <cam/scsi/scsi_all.h>
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struct mfi_hwcomms {
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uint32_t hw_pi;
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uint32_t hw_ci;
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uint32_t hw_reply_q[1];
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};
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2012-03-30 23:05:48 +00:00
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#define MEGASAS_MAX_NAME 32
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#define MEGASAS_VERSION "4.23"
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2006-03-25 06:14:32 +00:00
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struct mfi_softc;
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2007-05-10 15:33:41 +00:00
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struct disk;
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2007-05-16 17:23:36 +00:00
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struct ccb_hdr;
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2006-03-25 06:14:32 +00:00
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struct mfi_command {
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TAILQ_ENTRY(mfi_command) cm_link;
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2006-09-25 11:35:34 +00:00
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time_t cm_timestamp;
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2006-03-25 06:14:32 +00:00
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struct mfi_softc *cm_sc;
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union mfi_frame *cm_frame;
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2011-11-04 02:34:52 +00:00
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bus_addr_t cm_frame_busaddr;
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2006-03-25 06:14:32 +00:00
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struct mfi_sense *cm_sense;
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2011-11-04 02:34:52 +00:00
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bus_addr_t cm_sense_busaddr;
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2006-03-25 06:14:32 +00:00
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bus_dmamap_t cm_dmamap;
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union mfi_sgl *cm_sg;
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void *cm_data;
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int cm_len;
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2011-09-29 08:37:53 +00:00
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int cm_stp_len;
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2006-03-25 06:14:32 +00:00
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int cm_total_frame_size;
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int cm_extra_frames;
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int cm_flags;
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#define MFI_CMD_MAPPED (1<<0)
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#define MFI_CMD_DATAIN (1<<1)
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#define MFI_CMD_DATAOUT (1<<2)
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#define MFI_CMD_COMPLETED (1<<3)
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#define MFI_CMD_POLLED (1<<4)
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2013-02-27 02:21:10 +00:00
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#define MFI_CMD_SCSI (1<<5)
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#define MFI_CMD_CCB (1<<6)
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#define MFI_CMD_TBOLT (1<<7)
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#define MFI_ON_MFIQ_FREE (1<<8)
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#define MFI_ON_MFIQ_READY (1<<9)
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#define MFI_ON_MFIQ_BUSY (1<<10)
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#define MFI_ON_MFIQ_MASK (MFI_ON_MFIQ_FREE | MFI_ON_MFIQ_READY| \
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MFI_ON_MFIQ_BUSY)
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#define MFI_CMD_FLAGS_FMT "\20" \
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"\1MAPPED" \
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"\2DATAIN" \
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"\3DATAOUT" \
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"\4COMPLETED" \
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"\5POLLED" \
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"\6SCSI" \
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"\7TBOLT" \
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"\10Q_FREE" \
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"\11Q_READY" \
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"\12Q_BUSY"
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2011-11-04 02:34:52 +00:00
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uint8_t retry_for_fw_reset;
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2006-03-25 06:14:32 +00:00
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void (* cm_complete)(struct mfi_command *cm);
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void *cm_private;
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2006-09-25 11:35:34 +00:00
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int cm_index;
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2007-06-04 16:39:22 +00:00
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int cm_error;
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2006-03-25 06:14:32 +00:00
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};
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2007-05-10 15:33:41 +00:00
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struct mfi_disk {
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TAILQ_ENTRY(mfi_disk) ld_link;
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device_t ld_dev;
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int ld_id;
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int ld_unit;
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struct mfi_softc *ld_controller;
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2006-06-20 22:41:44 +00:00
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struct mfi_ld_info *ld_info;
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2007-05-10 15:33:41 +00:00
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struct disk *ld_disk;
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int ld_flags;
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#define MFI_DISK_FLAGS_OPEN 0x01
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2007-08-13 19:29:17 +00:00
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#define MFI_DISK_FLAGS_DISABLED 0x02
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2006-03-25 06:14:32 +00:00
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};
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2012-11-06 23:25:06 +00:00
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struct mfi_disk_pending {
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TAILQ_ENTRY(mfi_disk_pending) ld_link;
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int ld_id;
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};
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2011-11-04 02:34:52 +00:00
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struct mfi_system_pd {
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2012-03-30 23:05:48 +00:00
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TAILQ_ENTRY(mfi_system_pd) pd_link;
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2011-11-04 02:34:52 +00:00
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device_t pd_dev;
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int pd_id;
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int pd_unit;
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struct mfi_softc *pd_controller;
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2012-03-30 23:05:48 +00:00
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struct mfi_pd_info *pd_info;
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2011-11-04 02:34:52 +00:00
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struct disk *pd_disk;
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int pd_flags;
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};
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2012-03-30 23:05:48 +00:00
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2012-11-06 23:25:06 +00:00
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struct mfi_system_pending {
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TAILQ_ENTRY(mfi_system_pending) pd_link;
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int pd_id;
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};
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2012-03-30 23:05:48 +00:00
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struct mfi_evt_queue_elm {
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TAILQ_ENTRY(mfi_evt_queue_elm) link;
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struct mfi_evt_detail detail;
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};
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2006-05-18 23:30:48 +00:00
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struct mfi_aen {
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TAILQ_ENTRY(mfi_aen) aen_link;
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struct proc *p;
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};
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2011-11-04 02:34:52 +00:00
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struct mfi_skinny_dma_info {
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2012-04-02 02:22:22 +00:00
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bus_dma_tag_t dmat[514];
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bus_dmamap_t dmamap[514];
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uint32_t mem[514];
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int noofmaps;
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2011-11-04 02:34:52 +00:00
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};
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2012-04-02 19:13:02 +00:00
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struct megasas_sge
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{
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bus_addr_t phys_addr;
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uint32_t length;
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};
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2011-11-04 02:34:52 +00:00
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struct mfi_cmd_tbolt;
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2006-03-25 06:14:32 +00:00
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struct mfi_softc {
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device_t mfi_dev;
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int mfi_flags;
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#define MFI_FLAGS_SG64 (1<<0)
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#define MFI_FLAGS_QFRZN (1<<1)
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#define MFI_FLAGS_OPEN (1<<2)
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2006-10-16 04:18:38 +00:00
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#define MFI_FLAGS_STOP (1<<3)
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2007-08-25 23:58:45 +00:00
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#define MFI_FLAGS_1064R (1<<4)
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#define MFI_FLAGS_1078 (1<<5)
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2008-11-12 22:44:50 +00:00
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#define MFI_FLAGS_GEN2 (1<<6)
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2011-11-04 02:34:52 +00:00
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#define MFI_FLAGS_SKINNY (1<<7)
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#define MFI_FLAGS_TBOLT (1<<8)
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2014-02-04 17:35:41 +00:00
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#define MFI_FLAGS_MRSAS (1<<9)
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2011-11-04 02:34:52 +00:00
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// Start: LSIP200113393
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bus_dma_tag_t verbuf_h_dmat;
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bus_dmamap_t verbuf_h_dmamap;
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2012-05-12 05:05:22 +00:00
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bus_addr_t verbuf_h_busaddr;
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2012-03-30 23:05:48 +00:00
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uint32_t *verbuf;
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void *kbuff_arr[MAX_IOCTL_SGE];
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2011-11-04 02:34:52 +00:00
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bus_dma_tag_t mfi_kbuff_arr_dmat[2];
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bus_dmamap_t mfi_kbuff_arr_dmamap[2];
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2012-03-30 23:05:48 +00:00
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bus_addr_t mfi_kbuff_arr_busaddr[2];
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2006-03-25 06:14:32 +00:00
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struct mfi_hwcomms *mfi_comms;
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TAILQ_HEAD(,mfi_command) mfi_free;
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TAILQ_HEAD(,mfi_command) mfi_ready;
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2011-11-04 02:34:52 +00:00
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TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy;
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2006-03-25 06:14:32 +00:00
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struct bio_queue_head mfi_bioq;
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struct mfi_qstat mfi_qstat[MFIQ_COUNT];
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struct resource *mfi_regs_resource;
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bus_space_handle_t mfi_bhandle;
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bus_space_tag_t mfi_btag;
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int mfi_regs_rid;
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bus_dma_tag_t mfi_parent_dmat;
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bus_dma_tag_t mfi_buffer_dmat;
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bus_dma_tag_t mfi_comms_dmat;
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bus_dmamap_t mfi_comms_dmamap;
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2012-03-30 23:05:48 +00:00
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bus_addr_t mfi_comms_busaddr;
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2006-03-25 06:14:32 +00:00
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bus_dma_tag_t mfi_frames_dmat;
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bus_dmamap_t mfi_frames_dmamap;
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2012-03-30 23:05:48 +00:00
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bus_addr_t mfi_frames_busaddr;
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2006-03-25 06:14:32 +00:00
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union mfi_frame *mfi_frames;
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2011-11-04 02:34:52 +00:00
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bus_dma_tag_t mfi_tb_init_dmat;
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bus_dmamap_t mfi_tb_init_dmamap;
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2012-03-30 23:05:48 +00:00
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bus_addr_t mfi_tb_init_busaddr;
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bus_addr_t mfi_tb_ioc_init_busaddr;
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2011-11-04 02:34:52 +00:00
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union mfi_frame *mfi_tb_init;
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2012-03-30 23:05:48 +00:00
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TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue;
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struct task mfi_evt_task;
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2012-05-04 16:00:39 +00:00
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struct task mfi_map_sync_task;
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2006-05-18 23:30:48 +00:00
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TAILQ_HEAD(,mfi_aen) mfi_aen_pids;
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struct mfi_command *mfi_aen_cm;
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2011-11-04 02:34:52 +00:00
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struct mfi_command *mfi_skinny_cm;
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2012-05-04 16:00:39 +00:00
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struct mfi_command *mfi_map_sync_cm;
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int cm_aen_abort;
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int cm_map_abort;
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2006-05-18 23:30:48 +00:00
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uint32_t mfi_aen_triggered;
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uint32_t mfi_poll_waiting;
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2012-03-30 23:05:48 +00:00
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uint32_t mfi_boot_seq_num;
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2006-05-18 23:30:48 +00:00
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struct selinfo mfi_select;
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2007-08-13 19:29:17 +00:00
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int mfi_delete_busy_volumes;
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int mfi_keep_deleted_volumes;
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int mfi_detaching;
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2006-05-18 23:30:48 +00:00
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2006-03-25 06:14:32 +00:00
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bus_dma_tag_t mfi_sense_dmat;
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bus_dmamap_t mfi_sense_dmamap;
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2012-05-12 05:05:22 +00:00
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bus_addr_t mfi_sense_busaddr;
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2006-03-25 06:14:32 +00:00
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struct mfi_sense *mfi_sense;
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struct resource *mfi_irq;
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void *mfi_intr;
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int mfi_irq_rid;
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struct intr_config_hook mfi_ich;
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eventhandler_tag eh;
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2012-03-30 23:05:48 +00:00
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/* OCR flags */
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2011-11-04 02:34:52 +00:00
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uint8_t adpreset;
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uint8_t issuepend_done;
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uint8_t disableOnlineCtrlReset;
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uint32_t mfiStatus;
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uint32_t last_seq_num;
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uint32_t volatile hw_crit_error;
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2006-03-25 06:14:32 +00:00
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/*
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* Allocation for the command array. Used as an indexable array to
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* recover completed commands.
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*/
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struct mfi_command *mfi_commands;
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/*
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* How many commands the firmware can handle. Also how big the reply
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* queue is, minus 1.
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*/
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int mfi_max_fw_cmds;
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/*
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2012-03-30 23:05:48 +00:00
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* How many S/G elements we'll ever actually use
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2006-03-25 06:14:32 +00:00
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*/
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2006-09-20 06:58:02 +00:00
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|
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int mfi_max_sge;
|
2006-03-25 06:14:32 +00:00
|
|
|
/*
|
|
|
|
* How many bytes a compound frame is, including all of the extra frames
|
|
|
|
* that are used for S/G elements.
|
|
|
|
*/
|
2006-09-20 06:58:02 +00:00
|
|
|
int mfi_cmd_size;
|
2006-03-25 06:14:32 +00:00
|
|
|
/*
|
|
|
|
* How large an S/G element is. Used to calculate the number of single
|
|
|
|
* frames in a command.
|
|
|
|
*/
|
2006-09-20 06:58:02 +00:00
|
|
|
int mfi_sge_size;
|
2006-03-25 06:14:32 +00:00
|
|
|
/*
|
|
|
|
* Max number of sectors that the firmware allows
|
|
|
|
*/
|
|
|
|
uint32_t mfi_max_io;
|
|
|
|
|
2007-05-10 15:33:41 +00:00
|
|
|
TAILQ_HEAD(,mfi_disk) mfi_ld_tqh;
|
2011-11-04 02:34:52 +00:00
|
|
|
TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh;
|
2012-11-06 23:25:06 +00:00
|
|
|
TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh;
|
|
|
|
TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh;
|
2006-03-25 06:14:32 +00:00
|
|
|
eventhandler_tag mfi_eh;
|
|
|
|
struct cdev *mfi_cdev;
|
|
|
|
|
2007-05-16 17:23:36 +00:00
|
|
|
TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq;
|
|
|
|
struct mfi_command * (* mfi_cam_start)(void *);
|
2012-11-08 00:32:36 +00:00
|
|
|
void (*mfi_cam_rescan_cb)(struct mfi_softc *,
|
|
|
|
uint32_t);
|
2006-09-25 11:35:34 +00:00
|
|
|
struct callout mfi_watchdog_callout;
|
2006-03-25 06:14:32 +00:00
|
|
|
struct mtx mfi_io_lock;
|
2007-08-13 19:29:17 +00:00
|
|
|
struct sx mfi_config_lock;
|
2007-08-25 23:58:45 +00:00
|
|
|
|
|
|
|
/* Controller type specific interfaces */
|
|
|
|
void (*mfi_enable_intr)(struct mfi_softc *sc);
|
2011-11-04 02:34:52 +00:00
|
|
|
void (*mfi_disable_intr)(struct mfi_softc *sc);
|
2007-08-25 23:58:45 +00:00
|
|
|
int32_t (*mfi_read_fw_status)(struct mfi_softc *sc);
|
|
|
|
int (*mfi_check_clear_intr)(struct mfi_softc *sc);
|
2012-03-30 23:05:48 +00:00
|
|
|
void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add,
|
|
|
|
uint32_t frame_cnt);
|
|
|
|
int (*mfi_adp_reset)(struct mfi_softc *sc);
|
|
|
|
int (*mfi_adp_check_reset)(struct mfi_softc *sc);
|
2012-11-06 23:25:06 +00:00
|
|
|
void (*mfi_intr_ptr)(void *sc);
|
2011-11-04 02:34:52 +00:00
|
|
|
|
|
|
|
/* ThunderBolt */
|
|
|
|
uint32_t mfi_tbolt;
|
|
|
|
uint32_t MFA_enabled;
|
2012-03-30 23:05:48 +00:00
|
|
|
/* Single Reply structure size */
|
|
|
|
uint16_t reply_size;
|
|
|
|
/* Singler message size. */
|
|
|
|
uint16_t raid_io_msg_size;
|
2011-11-04 02:34:52 +00:00
|
|
|
TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh;
|
2012-03-30 23:05:48 +00:00
|
|
|
/* ThunderBolt base contiguous memory mapping. */
|
|
|
|
bus_dma_tag_t mfi_tb_dmat;
|
2011-11-04 02:34:52 +00:00
|
|
|
bus_dmamap_t mfi_tb_dmamap;
|
2012-03-30 23:05:48 +00:00
|
|
|
bus_addr_t mfi_tb_busaddr;
|
|
|
|
/* ThunderBolt Contiguous DMA memory Mapping */
|
|
|
|
uint8_t * request_message_pool;
|
2011-11-04 02:34:52 +00:00
|
|
|
uint8_t * request_message_pool_align;
|
|
|
|
uint8_t * request_desc_pool;
|
2012-03-30 23:05:48 +00:00
|
|
|
bus_addr_t request_msg_busaddr;
|
|
|
|
bus_addr_t reply_frame_busaddr;
|
|
|
|
bus_addr_t sg_frame_busaddr;
|
|
|
|
/* ThunderBolt IOC Init Descriptor */
|
|
|
|
bus_dma_tag_t mfi_tb_ioc_init_dmat;
|
2011-11-04 02:34:52 +00:00
|
|
|
bus_dmamap_t mfi_tb_ioc_init_dmamap;
|
|
|
|
uint8_t * mfi_tb_ioc_init_desc;
|
|
|
|
struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt;
|
2012-03-30 23:05:48 +00:00
|
|
|
/* Virtual address of reply Frame Pool */
|
|
|
|
struct mfi_mpi2_reply_header* reply_frame_pool;
|
2011-11-04 02:34:52 +00:00
|
|
|
struct mfi_mpi2_reply_header* reply_frame_pool_align;
|
|
|
|
|
2012-03-30 23:05:48 +00:00
|
|
|
/* Last reply frame address */
|
|
|
|
uint8_t * reply_pool_limit;
|
2011-11-04 02:34:52 +00:00
|
|
|
uint16_t last_reply_idx;
|
|
|
|
uint8_t max_SGEs_in_chain_message;
|
|
|
|
uint8_t max_SGEs_in_main_message;
|
|
|
|
uint8_t chain_offset_value_for_main_message;
|
|
|
|
uint8_t chain_offset_value_for_mpt_ptmsg;
|
|
|
|
};
|
|
|
|
|
|
|
|
union desc_value {
|
2012-03-30 23:05:48 +00:00
|
|
|
uint64_t word;
|
2011-11-04 02:34:52 +00:00
|
|
|
struct {
|
2012-03-30 23:05:48 +00:00
|
|
|
uint32_t low;
|
|
|
|
uint32_t high;
|
|
|
|
}u;
|
2011-11-04 02:34:52 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
// TODO find the right definition
|
|
|
|
#define XXX_MFI_CMD_OP_INIT2 0x9
|
|
|
|
/*
|
|
|
|
* Request descriptor types
|
|
|
|
*/
|
|
|
|
#define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7
|
|
|
|
#define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1
|
|
|
|
#define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1
|
|
|
|
#define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14
|
|
|
|
#define MFI_LOAD_BALANCE_FLAG 0x1
|
|
|
|
#define MFI_DCMD_MBOX_PEND_FLAG 0x1
|
|
|
|
|
|
|
|
//#define MR_PROT_INFO_TYPE_CONTROLLER 0x08
|
|
|
|
#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f
|
|
|
|
#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9
|
|
|
|
#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB
|
|
|
|
#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18
|
|
|
|
#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20
|
|
|
|
#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60
|
|
|
|
#define MEGASAS_EEDPBLOCKSIZE 512
|
|
|
|
struct mfi_cmd_tbolt {
|
2012-03-30 23:05:48 +00:00
|
|
|
union mfi_mpi2_request_descriptor *request_desc;
|
|
|
|
struct mfi_mpi2_request_raid_scsi_io *io_request;
|
|
|
|
bus_addr_t io_request_phys_addr;
|
|
|
|
bus_addr_t sg_frame_phys_addr;
|
|
|
|
bus_addr_t sense_phys_addr;
|
|
|
|
MPI2_SGE_IO_UNION *sg_frame;
|
|
|
|
uint8_t *sense;
|
2011-11-04 02:34:52 +00:00
|
|
|
TAILQ_ENTRY(mfi_cmd_tbolt) next;
|
|
|
|
/*
|
|
|
|
* Context for a MFI frame.
|
|
|
|
* Used to get the mfi cmd from list when a MFI cmd is completed
|
|
|
|
*/
|
2012-03-30 23:05:48 +00:00
|
|
|
uint32_t sync_cmd_idx;
|
|
|
|
uint16_t index;
|
|
|
|
uint8_t status;
|
2006-03-25 06:14:32 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
extern int mfi_attach(struct mfi_softc *);
|
|
|
|
extern void mfi_free(struct mfi_softc *);
|
|
|
|
extern int mfi_shutdown(struct mfi_softc *);
|
|
|
|
extern void mfi_startio(struct mfi_softc *);
|
|
|
|
extern void mfi_disk_complete(struct bio *);
|
2007-08-13 19:29:17 +00:00
|
|
|
extern int mfi_disk_disable(struct mfi_disk *);
|
|
|
|
extern void mfi_disk_enable(struct mfi_disk *);
|
2006-03-25 06:14:32 +00:00
|
|
|
extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int);
|
2011-11-04 02:34:52 +00:00
|
|
|
extern int mfi_syspd_disable(struct mfi_system_pd *);
|
|
|
|
extern void mfi_syspd_enable(struct mfi_system_pd *);
|
|
|
|
extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *,
|
|
|
|
int);
|
|
|
|
extern int mfi_transition_firmware(struct mfi_softc *sc);
|
|
|
|
extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start);
|
|
|
|
extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm);
|
|
|
|
extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm);
|
|
|
|
extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm);
|
|
|
|
extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *);
|
|
|
|
extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *);
|
|
|
|
extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *);
|
|
|
|
extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *);
|
2012-03-30 23:05:48 +00:00
|
|
|
extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t);
|
2011-11-04 02:34:52 +00:00
|
|
|
extern void mfi_tbolt_init_globals(struct mfi_softc*);
|
|
|
|
extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *);
|
|
|
|
extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t);
|
|
|
|
extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *);
|
|
|
|
extern void mfi_intr_tbolt(void *arg);
|
|
|
|
extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc);
|
|
|
|
extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm);
|
|
|
|
extern int mfi_tbolt_adp_reset(struct mfi_softc *sc);
|
|
|
|
extern int mfi_tbolt_reset(struct mfi_softc *sc);
|
2012-05-04 16:00:39 +00:00
|
|
|
extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc);
|
|
|
|
extern void mfi_handle_map_sync(void *context, int pending);
|
|
|
|
extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **,
|
2012-11-06 23:25:06 +00:00
|
|
|
uint32_t, void **, size_t);
|
|
|
|
extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *);
|
2006-03-25 06:14:32 +00:00
|
|
|
|
|
|
|
#define MFIQ_ADD(sc, qname) \
|
|
|
|
do { \
|
|
|
|
struct mfi_qstat *qs; \
|
|
|
|
\
|
|
|
|
qs = &(sc)->mfi_qstat[qname]; \
|
|
|
|
qs->q_length++; \
|
|
|
|
if (qs->q_length > qs->q_max) \
|
|
|
|
qs->q_max = qs->q_length; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length--
|
|
|
|
|
|
|
|
#define MFIQ_INIT(sc, qname) \
|
|
|
|
do { \
|
|
|
|
sc->mfi_qstat[qname].q_length = 0; \
|
|
|
|
sc->mfi_qstat[qname].q_max = 0; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define MFIQ_COMMAND_QUEUE(name, index) \
|
|
|
|
static __inline void \
|
|
|
|
mfi_initq_ ## name (struct mfi_softc *sc) \
|
|
|
|
{ \
|
|
|
|
TAILQ_INIT(&sc->mfi_ ## name); \
|
|
|
|
MFIQ_INIT(sc, index); \
|
|
|
|
} \
|
|
|
|
static __inline void \
|
|
|
|
mfi_enqueue_ ## name (struct mfi_command *cm) \
|
|
|
|
{ \
|
|
|
|
if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
|
2013-02-27 02:21:10 +00:00
|
|
|
panic("command %p is on another queue, " \
|
2006-03-25 06:14:32 +00:00
|
|
|
"flags = %#x\n", cm, cm->cm_flags); \
|
|
|
|
} \
|
|
|
|
TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
|
|
|
|
cm->cm_flags |= MFI_ON_ ## index; \
|
|
|
|
MFIQ_ADD(cm->cm_sc, index); \
|
|
|
|
} \
|
|
|
|
static __inline void \
|
|
|
|
mfi_requeue_ ## name (struct mfi_command *cm) \
|
|
|
|
{ \
|
|
|
|
if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
|
2013-02-27 02:21:10 +00:00
|
|
|
panic("command %p is on another queue, " \
|
2006-03-25 06:14:32 +00:00
|
|
|
"flags = %#x\n", cm, cm->cm_flags); \
|
|
|
|
} \
|
|
|
|
TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
|
|
|
|
cm->cm_flags |= MFI_ON_ ## index; \
|
|
|
|
MFIQ_ADD(cm->cm_sc, index); \
|
|
|
|
} \
|
|
|
|
static __inline struct mfi_command * \
|
|
|
|
mfi_dequeue_ ## name (struct mfi_softc *sc) \
|
|
|
|
{ \
|
|
|
|
struct mfi_command *cm; \
|
|
|
|
\
|
|
|
|
if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \
|
|
|
|
if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
|
2013-02-27 02:21:10 +00:00
|
|
|
panic("command %p not in queue, " \
|
2006-03-25 06:14:32 +00:00
|
|
|
"flags = %#x, bit = %#x\n", cm, \
|
|
|
|
cm->cm_flags, MFI_ON_ ## index); \
|
|
|
|
} \
|
|
|
|
TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \
|
|
|
|
cm->cm_flags &= ~MFI_ON_ ## index; \
|
|
|
|
MFIQ_REMOVE(sc, index); \
|
|
|
|
} \
|
|
|
|
return (cm); \
|
|
|
|
} \
|
|
|
|
static __inline void \
|
|
|
|
mfi_remove_ ## name (struct mfi_command *cm) \
|
|
|
|
{ \
|
|
|
|
if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
|
2013-02-27 02:21:10 +00:00
|
|
|
panic("command %p not in queue, flags = %#x, " \
|
2006-03-25 06:14:32 +00:00
|
|
|
"bit = %#x\n", cm, cm->cm_flags, \
|
|
|
|
MFI_ON_ ## index); \
|
|
|
|
} \
|
|
|
|
TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
|
|
|
|
cm->cm_flags &= ~MFI_ON_ ## index; \
|
|
|
|
MFIQ_REMOVE(cm->cm_sc, index); \
|
|
|
|
} \
|
|
|
|
struct hack
|
|
|
|
|
|
|
|
MFIQ_COMMAND_QUEUE(free, MFIQ_FREE);
|
|
|
|
MFIQ_COMMAND_QUEUE(ready, MFIQ_READY);
|
|
|
|
MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY);
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
mfi_initq_bio(struct mfi_softc *sc)
|
|
|
|
{
|
|
|
|
bioq_init(&sc->mfi_bioq);
|
|
|
|
MFIQ_INIT(sc, MFIQ_BIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp)
|
|
|
|
{
|
|
|
|
bioq_insert_tail(&sc->mfi_bioq, bp);
|
|
|
|
MFIQ_ADD(sc, MFIQ_BIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline struct bio *
|
|
|
|
mfi_dequeue_bio(struct mfi_softc *sc)
|
|
|
|
{
|
|
|
|
struct bio *bp;
|
|
|
|
|
|
|
|
if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) {
|
|
|
|
bioq_remove(&sc->mfi_bioq, bp);
|
|
|
|
MFIQ_REMOVE(sc, MFIQ_BIO);
|
|
|
|
}
|
|
|
|
return (bp);
|
|
|
|
}
|
|
|
|
|
2011-10-29 06:26:49 +00:00
|
|
|
/*
|
|
|
|
* This is from the original scsi_extract_sense() in CAM. It's copied
|
|
|
|
* here because CAM now uses a non-inline version that follows more complex
|
|
|
|
* additions to the SPC spec, and we don't want to force a dependency on
|
|
|
|
* the CAM module for such a trivial action.
|
|
|
|
*/
|
|
|
|
static __inline void
|
|
|
|
mfi_extract_sense(struct scsi_sense_data_fixed *sense,
|
|
|
|
int *error_code, int *sense_key, int *asc, int *ascq)
|
|
|
|
{
|
|
|
|
|
|
|
|
*error_code = sense->error_code & SSD_ERRCODE;
|
|
|
|
*sense_key = sense->flags & SSD_KEY;
|
|
|
|
*asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0;
|
|
|
|
*ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0;
|
|
|
|
}
|
|
|
|
|
2006-03-25 06:14:32 +00:00
|
|
|
static __inline void
|
|
|
|
mfi_print_sense(struct mfi_softc *sc, void *sense)
|
|
|
|
{
|
|
|
|
int error, key, asc, ascq;
|
|
|
|
|
2011-10-29 06:26:49 +00:00
|
|
|
mfi_extract_sense((struct scsi_sense_data_fixed *)sense,
|
2006-03-25 06:14:32 +00:00
|
|
|
&error, &key, &asc, &ascq);
|
|
|
|
device_printf(sc->mfi_dev, "sense error %d, sense_key %d, "
|
|
|
|
"asc %d, ascq %d\n", error, key, asc, ascq);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \
|
|
|
|
sc->mfi_bhandle, (reg), (val))
|
|
|
|
#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \
|
|
|
|
(sc)->mfi_bhandle, (reg))
|
|
|
|
#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
|
|
|
|
sc->mfi_bhandle, (reg), (val))
|
|
|
|
#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \
|
|
|
|
(sc)->mfi_bhandle, (reg))
|
|
|
|
#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \
|
|
|
|
sc->mfi_bhandle, (reg), (val))
|
|
|
|
#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \
|
|
|
|
(sc)->mfi_bhandle, (reg))
|
|
|
|
|
|
|
|
MALLOC_DECLARE(M_MFIBUF);
|
2011-11-16 15:39:27 +00:00
|
|
|
SYSCTL_DECL(_hw_mfi);
|
2006-03-25 06:14:32 +00:00
|
|
|
|
2011-11-04 02:34:52 +00:00
|
|
|
#define MFI_RESET_WAIT_TIME 180
|
2006-09-25 11:35:34 +00:00
|
|
|
#define MFI_CMD_TIMEOUT 30
|
2011-11-04 02:34:52 +00:00
|
|
|
#define MFI_SYS_PD_IO 0
|
|
|
|
#define MFI_LD_IO 1
|
2012-04-02 19:13:02 +00:00
|
|
|
#define MFI_SKINNY_MEMORY 0x02000000
|
Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.
Add a transport for SATA
Add a periph+protocol layer for ATA
Add a driver for AHCI-compliant hardware.
Add a maxio field to CAM so that drivers can advertise their max
I/O capability. Modify various drivers so that they are insulated
from the value of MAXPHYS.
The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel. The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives. It also supports port multipliers.
ATA drives are accessed via 'ada' device nodes. ATAPI drives are
accessed via 'cd' device nodes. They can all be enumerated and manipulated
via camcontrol, just like SCSI drives. SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol. See the camcontrol manpage for further
details. Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.
This code is very experimental at the moment. The userland ABI/API has
changed, so applications will need to be recompiled. It may change
further in the near future. The 'ada' device name may also change as
more infrastructure is completed in this project. The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.
Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed. In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.
The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols. It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware. While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged. Help with new transports is also encouraged.
Submitted by: scottl, mav
Approved by: re
2009-07-10 08:18:08 +00:00
|
|
|
#define MFI_MAXPHYS (128 * 1024)
|
2006-09-25 11:35:34 +00:00
|
|
|
|
|
|
|
#ifdef MFI_DEBUG
|
|
|
|
extern void mfi_print_cmd(struct mfi_command *cm);
|
|
|
|
extern void mfi_dump_cmds(struct mfi_softc *sc);
|
2013-02-27 02:21:10 +00:00
|
|
|
extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *,
|
|
|
|
const char *, int);
|
2006-09-25 11:35:34 +00:00
|
|
|
#define MFI_PRINT_CMD(cm) mfi_print_cmd(cm)
|
2006-10-16 04:18:38 +00:00
|
|
|
#define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc)
|
|
|
|
#define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__)
|
2006-09-25 11:35:34 +00:00
|
|
|
#else
|
|
|
|
#define MFI_PRINT_CMD(cm)
|
|
|
|
#define MFI_DUMP_CMDS(sc)
|
2006-10-16 04:18:38 +00:00
|
|
|
#define MFI_VALIDATE_CMD(sc, cm)
|
2006-09-25 11:35:34 +00:00
|
|
|
#endif
|
|
|
|
|
2013-02-27 02:21:10 +00:00
|
|
|
extern void mfi_release_command(struct mfi_command *);
|
|
|
|
extern void mfi_tbolt_return_cmd(struct mfi_softc *,
|
|
|
|
struct mfi_cmd_tbolt *, struct mfi_command *);
|
2007-05-16 17:23:36 +00:00
|
|
|
|
2006-03-25 06:14:32 +00:00
|
|
|
#endif /* _MFIVAR_H */
|