freebsd/sys/dev/ed/ax88x90reg.h

/*-
 * Copyright (c) 2005, M. Warner Losh.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice unmodified, this list of conditions, and the following
 *    disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

/* AX88x90 based miibus defines */
#define ED_AX88X90_MIIBUS	0x04	/* MII bus register on ASIC */
#define ED_AX88X90_MII_CLK	    0x01
#define ED_AX88X90_MII_DIRIN	    0x02
#define ED_AX88X90_MII_DATAIN	    0x04
#define ED_AX88X90_MII_DATAOUT	    0x08
#define	ED_AX88X90_TEST		0x05	/* "test" register on asic */
#define ED_AX88X90_GPIO		0x07	/* GPIO pins */
#define ED_AX88X90_GPIO_INT_PHY	    0x10
MFp4: o Add support for Tamarack TC5299J + MII found on SMC 8041TX V.2 and corega PCCCCTXD o Add support for ISA/PCI RTL80[12]9 chips o Improve support for the ax88790 based o minor code movement Submitted by: (#2) David Madole 2005-10-05 05:21:07 +00:00			`/*-`
			`* Copyright (c) 2005, M. Warner Losh.`
			`* All rights reserved.`
			`*`
			`* Redistribution and use in source and binary forms, with or without`
			`* modification, are permitted provided that the following conditions`
			`* are met:`
			`* 1. Redistributions of source code must retain the above copyright`
			`* notice unmodified, this list of conditions, and the following`
			`* disclaimer.`
			`* 2. Redistributions in binary form must reproduce the above copyright`
			`* notice, this list of conditions and the following disclaimer in the`
			`* documentation and/or other materials provided with the distribution.`
			`*`
			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
			`* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE`
			`* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE`
			`* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE`
			`* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
			`* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS`
			`* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)`
			`* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT`
			`* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY`
			`* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF`
			`* SUCH DAMAGE.`
			`*`
			`* $FreeBSD$`
			`*/`

			`/* AX88x90 based miibus defines */`
			`#define ED_AX88X90_MIIBUS 0x04 /* MII bus register on ASIC */`
			`#define ED_AX88X90_MII_CLK 0x01`
This is a major reworking of the AX88x90 support. o Introduce new chip_type AX88790. There's a few places we need to know the exact chip for workaronds. o Explain the AX88190 workaround for the ISR bits being stuck, and don't apply them to the AX88790. The datasheet says the bits are fixed, and experience confirms. o Fix mii bit-bang read code to read and discard the 'floating' bit. o Remove empty ed_pccard_ax88x90_mii_reset routine o Report error from mii_phy_probe o Don't use ed_probe_Novel_generic for ax88x90 chips. It puts them into an odd state sometimes. Instead, use a more stream-lined version that avoids the trouble spots. This was copied and tweaked from the original. o Move chip reset into its own routine. o Minor code optimiation on getting MAC address o Add code for coping with AX88790 cards that are in power down state and need to be kicked before the PHY registers for the internal phy read right. o Remove ugly cap of PHYs at 17. o For AX88790, we need to set a special bit for accessig phy 16 (the internal phy) and clear it for all others according to a chip erratum. o streamline the bit-bang code for AX88x90: the delays aren't needed according to the datasheet timing diagrams and also the Linux driver o Fix minor bit definition for direction bit. o Generally: Some comments reformatted o Only try the toshiba probe on cards labelled as toshiba # From another Akihabara card (this one from a few years ago from a # friend in Japan). Fix the Corega FEther II PCC-TXD. This one is # still on sale new, as of a few weeks ago. should fix all other AX88x90 # based cards, but I have some testing left to finish on my collection... 2009-03-30 16:15:06 +00:00			`#define ED_AX88X90_MII_DIRIN 0x02`
MFp4: o Add support for Tamarack TC5299J + MII found on SMC 8041TX V.2 and corega PCCCCTXD o Add support for ISA/PCI RTL80[12]9 chips o Improve support for the ax88790 based o minor code movement Submitted by: (#2) David Madole 2005-10-05 05:21:07 +00:00			`#define ED_AX88X90_MII_DATAIN 0x04`
			`#define ED_AX88X90_MII_DATAOUT 0x08`
			`#define ED_AX88X90_TEST 0x05 /* "test" register on asic */`
			`#define ED_AX88X90_GPIO 0x07 /* GPIO pins */`
			`#define ED_AX88X90_GPIO_INT_PHY 0x10`