2000-09-16 20:02:28 +00:00
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/*
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* Product specific probe and attach routines for:
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* 27/284X and aic7770 motherboard SCSI controllers
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*
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2001-01-27 20:54:24 +00:00
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* Copyright (c) 1994-1998, 2000, 2001 Justin T. Gibbs.
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2000-09-16 20:02:28 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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2001-01-27 20:54:24 +00:00
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* Alternatively, this software may be distributed under the terms of the
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* GNU Public License ("GPL").
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*
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2000-09-16 20:02:28 +00:00
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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2001-05-15 19:41:12 +00:00
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* $Id: //depot/src/aic7xxx/aic7770.c#11 $
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2000-09-16 20:02:28 +00:00
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*
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* $FreeBSD$
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*/
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#include <dev/aic7xxx/aic7xxx_freebsd.h>
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#include <dev/aic7xxx/aic7xxx_inline.h>
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#include <dev/aic7xxx/aic7xxx_93cx6.h>
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#define ID_AIC7770 0x04907770
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#define ID_AHA_274x 0x04907771
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#define ID_AHA_284xB 0x04907756 /* BIOS enabled */
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#define ID_AHA_284x 0x04907757 /* BIOS disabled*/
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static void aha2840_load_seeprom(struct ahc_softc *ahc);
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static ahc_device_setup_t ahc_aic7770_VL_setup;
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static ahc_device_setup_t ahc_aic7770_EISA_setup;;
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static ahc_device_setup_t ahc_aic7770_setup;
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struct aic7770_identity aic7770_ident_table [] =
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{
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{
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ID_AHA_274x,
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0xFFFFFFFF,
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"Adaptec 274X SCSI adapter",
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ahc_aic7770_EISA_setup
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},
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{
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ID_AHA_284xB,
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0xFFFFFFFE,
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"Adaptec 284X SCSI adapter",
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ahc_aic7770_VL_setup
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},
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/* Generic chip probes for devices we don't know 'exactly' */
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{
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ID_AIC7770,
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0xFFFFFFFF,
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"Adaptec aic7770 SCSI adapter",
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ahc_aic7770_EISA_setup
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}
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};
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const int ahc_num_aic7770_devs = NUM_ELEMENTS(aic7770_ident_table);
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struct aic7770_identity *
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aic7770_find_device(uint32_t id)
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{
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struct aic7770_identity *entry;
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int i;
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for (i = 0; i < ahc_num_aic7770_devs; i++) {
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entry = &aic7770_ident_table[i];
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if (entry->full_id == (id & entry->id_mask))
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return (entry);
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}
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return (NULL);
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}
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int
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aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry)
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{
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struct ahc_probe_config probe_config;
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int error;
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u_int hostconf;
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This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
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u_int irq;
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u_int intdef;
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2000-09-16 20:02:28 +00:00
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ahc_init_probe_config(&probe_config);
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error = entry->setup(ahc->dev_softc, &probe_config);
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if (error != 0)
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return (error);
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error = aic7770_map_registers(ahc);
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if (error != 0)
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return (error);
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probe_config.description = entry->name;
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error = ahc_softc_init(ahc, &probe_config);
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This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
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error = ahc_reset(ahc);
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2000-09-16 20:02:28 +00:00
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if (error != 0)
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return (error);
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|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
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|
|
/* Make sure we have a valid interrupt vector */
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intdef = ahc_inb(ahc, INTDEF);
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irq = intdef & VECTOR;
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switch (irq) {
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case 9:
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case 10:
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case 11:
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case 12:
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case 14:
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case 15:
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break;
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default:
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printf("aic7770_config: illegal irq setting %d\n", intdef);
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return (ENXIO);
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|
}
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|
if ((intdef & EDGE_TRIG) != 0)
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|
ahc->flags |= AHC_EDGE_INTERRUPT;
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|
2000-09-16 20:02:28 +00:00
|
|
|
switch (probe_config.chip & (AHC_EISA|AHC_VL)) {
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|
|
case AHC_EISA:
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|
{
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|
|
u_int biosctrl;
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|
|
u_int scsiconf;
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|
|
u_int scsiconf1;
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|
biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
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|
scsiconf = ahc_inb(ahc, SCSICONF);
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|
|
scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
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|
|
|
|
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|
|
/* Get the primary channel information */
|
|
|
|
|
if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc->flags |= 1;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
|
if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
|
|
|
|
|
ahc->flags |= AHC_USEDEFAULTS;
|
|
|
|
|
} else {
|
|
|
|
|
if ((ahc->features & AHC_WIDE) != 0) {
|
|
|
|
|
ahc->our_id = scsiconf1 & HWSCSIID;
|
|
|
|
|
if (scsiconf & TERM_ENB)
|
|
|
|
|
ahc->flags |= AHC_TERM_ENB_A;
|
|
|
|
|
} else {
|
|
|
|
|
ahc->our_id = scsiconf & HSCSIID;
|
|
|
|
|
ahc->our_id_b = scsiconf1 & HSCSIID;
|
|
|
|
|
if (scsiconf & TERM_ENB)
|
|
|
|
|
ahc->flags |= AHC_TERM_ENB_A;
|
|
|
|
|
if (scsiconf1 & TERM_ENB)
|
|
|
|
|
ahc->flags |= AHC_TERM_ENB_B;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/*
|
|
|
|
|
* We have no way to tell, so assume extended
|
|
|
|
|
* translation is enabled.
|
|
|
|
|
*/
|
|
|
|
|
ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
case AHC_VL:
|
|
|
|
|
{
|
|
|
|
|
aha2840_load_seeprom(ahc);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ensure autoflush is enabled
|
|
|
|
|
*/
|
|
|
|
|
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
|
|
|
|
|
|
|
|
|
|
/* Setup the FIFO threshold and the bus off time */
|
|
|
|
|
hostconf = ahc_inb(ahc, HOSTCONF);
|
|
|
|
|
ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
|
|
|
|
|
ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Generic aic7xxx initialization.
|
|
|
|
|
*/
|
|
|
|
|
error = ahc_init(ahc);
|
|
|
|
|
if (error != 0)
|
|
|
|
|
return (error);
|
|
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
/*
|
|
|
|
|
* Link this softc in with all other ahc instances.
|
|
|
|
|
*/
|
|
|
|
|
ahc_softc_insert(ahc);
|
|
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
error = aic7770_map_int(ahc, irq);
|
|
|
|
|
if (error != 0)
|
|
|
|
|
return (error);
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
|
* Enable the board's BUS drivers
|
|
|
|
|
*/
|
|
|
|
|
ahc_outb(ahc, BCTL, ENABLE);
|
|
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
/*
|
|
|
|
|
* Allow interrupts.
|
|
|
|
|
*/
|
|
|
|
|
ahc_intr_enable(ahc, TRUE);
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Read the 284x SEEPROM.
|
|
|
|
|
*/
|
|
|
|
|
static void
|
|
|
|
|
aha2840_load_seeprom(struct ahc_softc *ahc)
|
|
|
|
|
{
|
|
|
|
|
struct seeprom_descriptor sd;
|
|
|
|
|
struct seeprom_config sc;
|
|
|
|
|
uint16_t checksum = 0;
|
|
|
|
|
uint8_t scsi_conf;
|
|
|
|
|
int have_seeprom;
|
|
|
|
|
|
|
|
|
|
sd.sd_ahc = ahc;
|
|
|
|
|
sd.sd_control_offset = SEECTL_2840;
|
|
|
|
|
sd.sd_status_offset = STATUS_2840;
|
|
|
|
|
sd.sd_dataout_offset = STATUS_2840;
|
|
|
|
|
sd.sd_chip = C46;
|
|
|
|
|
sd.sd_MS = 0;
|
|
|
|
|
sd.sd_RDY = EEPROM_TF;
|
|
|
|
|
sd.sd_CS = CS_2840;
|
|
|
|
|
sd.sd_CK = CK_2840;
|
|
|
|
|
sd.sd_DO = DO_2840;
|
|
|
|
|
sd.sd_DI = DI_2840;
|
|
|
|
|
|
|
|
|
|
if (bootverbose)
|
|
|
|
|
printf("%s: Reading SEEPROM...", ahc_name(ahc));
|
|
|
|
|
have_seeprom = read_seeprom(&sd,
|
|
|
|
|
(uint16_t *)&sc,
|
|
|
|
|
/*start_addr*/0,
|
|
|
|
|
sizeof(sc)/2);
|
|
|
|
|
|
|
|
|
|
if (have_seeprom) {
|
|
|
|
|
/* Check checksum */
|
|
|
|
|
int i;
|
|
|
|
|
int maxaddr = (sizeof(sc)/2) - 1;
|
|
|
|
|
uint16_t *scarray = (uint16_t *)≻
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < maxaddr; i++)
|
|
|
|
|
checksum = checksum + scarray[i];
|
|
|
|
|
if (checksum != sc.checksum) {
|
|
|
|
|
if(bootverbose)
|
|
|
|
|
printf ("checksum error\n");
|
|
|
|
|
have_seeprom = 0;
|
|
|
|
|
} else if (bootverbose) {
|
|
|
|
|
printf("done.\n");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!have_seeprom) {
|
|
|
|
|
if (bootverbose)
|
|
|
|
|
printf("%s: No SEEPROM available\n", ahc_name(ahc));
|
|
|
|
|
ahc->flags |= AHC_USEDEFAULTS;
|
|
|
|
|
} else {
|
|
|
|
|
/*
|
|
|
|
|
* Put the data we've collected down into SRAM
|
|
|
|
|
* where ahc_init will find it.
|
|
|
|
|
*/
|
|
|
|
|
int i;
|
|
|
|
|
int max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
|
|
|
|
|
uint16_t discenable;
|
|
|
|
|
|
|
|
|
|
discenable = 0;
|
|
|
|
|
for (i = 0; i < max_targ; i++){
|
|
|
|
|
uint8_t target_settings;
|
|
|
|
|
target_settings = (sc.device_flags[i] & CFXFER) << 4;
|
|
|
|
|
if (sc.device_flags[i] & CFSYNCH)
|
|
|
|
|
target_settings |= SOFS;
|
|
|
|
|
if (sc.device_flags[i] & CFWIDEB)
|
|
|
|
|
target_settings |= WIDEXFER;
|
|
|
|
|
if (sc.device_flags[i] & CFDISC)
|
|
|
|
|
discenable |= (0x01 << i);
|
|
|
|
|
ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
|
|
|
|
|
}
|
|
|
|
|
ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
|
|
|
|
|
ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
|
|
|
|
|
|
|
|
|
|
ahc->our_id = sc.brtime_id & CFSCSIID;
|
|
|
|
|
|
|
|
|
|
scsi_conf = (ahc->our_id & 0x7);
|
|
|
|
|
if (sc.adapter_control & CFSPARITY)
|
|
|
|
|
scsi_conf |= ENSPCHK;
|
|
|
|
|
if (sc.adapter_control & CFRESETB)
|
|
|
|
|
scsi_conf |= RESET_SCSI;
|
|
|
|
|
|
|
|
|
|
if (sc.bios_control & CF284XEXTEND)
|
|
|
|
|
ahc->flags |= AHC_EXTENDED_TRANS_A;
|
|
|
|
|
/* Set SCSICONF info */
|
|
|
|
|
ahc_outb(ahc, SCSICONF, scsi_conf);
|
|
|
|
|
|
|
|
|
|
if (sc.adapter_control & CF284XSTERM)
|
|
|
|
|
ahc->flags |= AHC_TERM_ENB_A;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ahc_aic7770_VL_setup(ahc_dev_softc_t dev, struct ahc_probe_config *probe_config)
|
|
|
|
|
{
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
error = ahc_aic7770_setup(dev, probe_config);
|
|
|
|
|
probe_config->chip |= AHC_VL;
|
|
|
|
|
return (error);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ahc_aic7770_EISA_setup(ahc_dev_softc_t dev,
|
|
|
|
|
struct ahc_probe_config *probe_config)
|
|
|
|
|
{
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
error = ahc_aic7770_setup(dev, probe_config);
|
|
|
|
|
probe_config->chip |= AHC_EISA;
|
|
|
|
|
return (error);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ahc_aic7770_setup(ahc_dev_softc_t dev, struct ahc_probe_config *probe_config)
|
|
|
|
|
{
|
|
|
|
|
probe_config->channel = 'A';
|
|
|
|
|
probe_config->channel_b = 'B';
|
|
|
|
|
probe_config->chip = AHC_AIC7770;
|
|
|
|
|
probe_config->features = AHC_AIC7770_FE;
|
|
|
|
|
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
|
|
|
|
|
probe_config->flags |= AHC_PAGESCBS;
|
|
|
|
|
return (0);
|
|
|
|
|
}
|