2004-05-14 11:46:45 +00:00
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/* $NetBSD: machdep.h,v 1.7 2002/02/21 02:52:21 thorpej Exp $ */
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/* $FreeBSD$ */
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#ifndef _MACHDEP_BOOT_MACHDEP_H_
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#define _MACHDEP_BOOT_MACHDEP_H_
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/* misc prototypes used by the many arm machdeps */
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Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.
Suggested by: davidxu
2005-02-26 18:59:01 +00:00
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void arm_lock_cache_line(vm_offset_t);
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2008-04-03 16:44:50 +00:00
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vm_offset_t fake_preload_metadata(void);
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2012-06-10 01:13:04 +00:00
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void init_proc0(vm_offset_t kstack);
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2008-04-03 16:44:50 +00:00
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void halt(void);
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void data_abort_handler(trapframe_t *);
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void prefetch_abort_handler(trapframe_t *);
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void undefinedinstruction_bounce(trapframe_t *);
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Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.
Suggested by: davidxu
2005-02-26 18:59:01 +00:00
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2004-05-14 11:46:45 +00:00
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#endif /* !_MACHINE_MACHDEP_H_ */
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