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Add two tunables to ignore certain firmware-assigned resources. These
are mostly useful for debugging. - hw.pci.clear_bars ignores all firmware-assigned ranges for BARs when set. - hw.pci.clear_pcib ignores all firmware-assigned ranges for PCI-PCI bridge I/O windows when set. MFC after: 1 week
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commit
0070c94be9
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=261527
@ -332,6 +332,11 @@ SYSCTL_INT(_hw_pci, OID_AUTO, usb_early_takeover, CTLFLAG_RDTUN,
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Disable this if you depend on BIOS emulation of USB devices, that is\n\
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you use USB devices (like keyboard or mouse) but do not load USB drivers");
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static int pci_clear_bars;
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TUNABLE_INT("hw.pci.clear_bars", &pci_clear_bars);
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SYSCTL_INT(_hw_pci, OID_AUTO, clear_bars, CTLFLAG_RDTUN, &pci_clear_bars, 0,
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"Ignore firmware-assigned resources for BARs.");
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static int
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pci_has_quirk(uint32_t devid, int quirk)
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{
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@ -2851,7 +2856,7 @@ pci_add_map(device_t bus, device_t dev, int reg, struct resource_list *rl,
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flags = RF_ALIGNMENT_LOG2(mapsize);
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if (prefetch)
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flags |= RF_PREFETCHABLE;
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if (basezero || base == pci_mapbase(testval)) {
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if (basezero || base == pci_mapbase(testval) || pci_clear_bars) {
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start = 0; /* Let the parent decide. */
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end = ~0ul;
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} else {
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@ -103,6 +103,12 @@ DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
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DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL);
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#ifdef NEW_PCIB
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SYSCTL_DECL(_hw_pci);
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static int pci_clear_pcib;
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TUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib);
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SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0,
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"Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
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/*
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* Is a resource from a child device sub-allocated from one of our
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@ -416,6 +422,19 @@ pcib_probe_windows(struct pcib_softc *sc)
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dev = sc->dev;
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if (pci_clear_pcib) {
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pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
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pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
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pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
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pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
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pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
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pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
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pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
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pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
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pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
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pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
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}
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/* Determine if the I/O port window is implemented. */
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val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
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if (val == 0) {
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