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Rename busdma_sync() to busdma_sync_range() and rename the
base and size parameters to ofs and len (resp). Add a new busdma_sync() that makes the entire MD coherent.
This commit is contained in:
parent
16f3fdf55f
commit
015b858345
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=286176
@ -227,8 +227,15 @@ busdma_seg_get_size(busdma_seg_t seg)
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}
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int
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busdma_sync(busdma_md_t md, int op, bus_addr_t base, bus_size_t size)
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busdma_sync(busdma_md_t md, int op)
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{
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return (bd_sync(md, op, base, size));
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return (bd_sync(md, op, 0UL, ~0UL));
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}
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int
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busdma_sync_range(busdma_md_t md, int op, bus_size_t ofs, bus_size_t len)
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{
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return (bd_sync(md, op, ofs, len));
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}
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@ -78,6 +78,7 @@ bus_size_t busdma_seg_get_size(busdma_seg_t seg);
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#define BUSDMA_SYNC_PREWRITE 4
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#define BUSDMA_SYNC_POSTWRITE 8
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int busdma_sync(busdma_md_t md, int op, bus_addr_t, bus_size_t);
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int busdma_sync(busdma_md_t md, int op);
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int busdma_sync_range(busdma_md_t md, int op, bus_size_t, bus_size_t);
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#endif /* _LIBBUS_SPACE_H_ */
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@ -384,12 +384,27 @@ busdma_seg_get_size(PyObject *self, PyObject *args)
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static PyObject *
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busdma_sync(PyObject *self, PyObject *args)
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{
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u_long base, size;
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int error, mdid, op;
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if (!PyArg_ParseTuple(args, "iikk", &mdid, &op, &base, &size))
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if (!PyArg_ParseTuple(args, "ii", &mdid, &op))
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return (NULL);
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error = bd_sync(mdid, op, base, size);
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error = bd_sync(mdid, op, 0UL, ~0UL);
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if (error) {
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PyErr_SetString(PyExc_IOError, strerror(error));
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return (NULL);
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}
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Py_RETURN_NONE;
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}
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static PyObject *
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busdma_sync_range(PyObject *self, PyObject *args)
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{
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u_long ofs, len;
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int error, mdid, op;
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if (!PyArg_ParseTuple(args, "iikk", &mdid, &op, &ofs, &len))
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return (NULL);
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error = bd_sync(mdid, op, ofs, len);
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if (error) {
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PyErr_SetString(PyExc_IOError, strerror(error));
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return (NULL);
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@ -448,7 +463,9 @@ static PyMethodDef busdma_methods[] = {
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"Return the size of the segment." },
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{ "sync", busdma_sync, METH_VARARGS,
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"Keep memory/caches coherent WRT to DMA." },
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"Make the entire memory descriptor coherent WRT to DMA." },
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{ "sync_range", busdma_sync_range, METH_VARARGS,
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"Make part of the memory descriptor coherent WRT to DMA." },
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{ NULL, NULL, 0, NULL }
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};
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@ -536,7 +536,7 @@ bd_seg_get_size(int sid, u_long *size_p)
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}
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int
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bd_sync(int mdid, u_int op, u_long base, u_long size)
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bd_sync(int mdid, u_int op, u_long ofs, u_long len)
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{
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struct proto_ioc_busdma ioc;
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struct obj *md;
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@ -549,8 +549,8 @@ bd_sync(int mdid, u_int op, u_long base, u_long size)
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ioc.request = PROTO_IOC_BUSDMA_SYNC;
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ioc.key = md->key;
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ioc.u.sync.op = op;
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ioc.u.sync.base = base;
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ioc.u.sync.size = size;
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ioc.u.sync.base = ofs;
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ioc.u.sync.size = len;
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if (ioctl(md->fd, PROTO_IOC_BUSDMA, &ioc) == -1)
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return (errno);
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@ -51,6 +51,6 @@ int bd_md_next_seg(int mdid, int sid);
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int bd_seg_get_addr(int sid, u_long *);
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int bd_seg_get_size(int sid, u_long *);
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int bd_sync(int mdid, u_int op, u_long base, u_long size);
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int bd_sync(int mdid, u_int op, u_long ofs, u_long len);
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#endif /* _TOOLS_BUS_DMA_H_ */
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