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Add atomic_testandset_acq_* on arm64
We only need to include sys/_atomic_subword.h on arm64 to provide atomic_testandset_acq_long. Add an implementation in the arm64 atomic.h based on the existing atomic_testandset macro. Reviewed by: kib Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D33587
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@ -399,19 +399,19 @@ _ATOMIC_READANDCLEAR_PROTO(t, ) \
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_ATOMIC_SWAP_IMPL(32, w, wzr)
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_ATOMIC_SWAP_IMPL(64, , xzr)
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#define _ATOMIC_TEST_OP_PROTO(t, op, flav) \
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#define _ATOMIC_TEST_OP_PROTO(t, op, bar, flav) \
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static __inline int \
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atomic_testand##op##_##t##flav(volatile uint##t##_t *p, u_int val)
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atomic_testand##op##_##bar##t##flav(volatile uint##t##_t *p, u_int val)
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#define _ATOMIC_TEST_OP_IMPL(t, w, op, llsc_asm_op, lse_asm_op) \
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_ATOMIC_TEST_OP_PROTO(t, op, _llsc) \
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#define _ATOMIC_TEST_OP_IMPL(t, w, op, llsc_asm_op, lse_asm_op, bar, a) \
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_ATOMIC_TEST_OP_PROTO(t, op, bar, _llsc) \
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{ \
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uint##t##_t mask, old, tmp; \
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int res; \
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\
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mask = ((uint##t##_t)1) << (val & (t - 1)); \
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__asm __volatile( \
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"1: ldxr %"#w"2, [%3]\n" \
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"1: ld"#a"xr %"#w"2, [%3]\n" \
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" "#llsc_asm_op" %"#w"0, %"#w"2, %"#w"4\n" \
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" stxr %w1, %"#w"0, [%3]\n" \
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" cbnz %w1, 1b\n" \
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@ -423,14 +423,14 @@ _ATOMIC_TEST_OP_PROTO(t, op, _llsc) \
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return ((old & mask) != 0); \
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} \
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\
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_ATOMIC_TEST_OP_PROTO(t, op, _lse) \
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_ATOMIC_TEST_OP_PROTO(t, op, bar, _lse) \
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{ \
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uint##t##_t mask, old; \
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\
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mask = ((uint##t##_t)1) << (val & (t - 1)); \
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__asm __volatile( \
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".arch_extension lse\n" \
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"ld"#lse_asm_op" %"#w"2, %"#w"0, [%1]\n" \
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"ld"#lse_asm_op#a" %"#w"2, %"#w"0, [%1]\n" \
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".arch_extension nolse\n" \
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: "=r" (old) \
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: "r" (p), "r" (mask) \
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@ -440,17 +440,19 @@ _ATOMIC_TEST_OP_PROTO(t, op, _lse) \
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return ((old & mask) != 0); \
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} \
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\
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_ATOMIC_TEST_OP_PROTO(t, op, ) \
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_ATOMIC_TEST_OP_PROTO(t, op, bar, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_testand##op##_##t##_lse(p, val)); \
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return (atomic_testand##op##_##bar##t##_lse(p, val)); \
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else \
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return (atomic_testand##op##_##t##_llsc(p, val)); \
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return (atomic_testand##op##_##bar##t##_llsc(p, val)); \
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}
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#define _ATOMIC_TEST_OP(op, llsc_asm_op, lse_asm_op) \
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_ATOMIC_TEST_OP_IMPL(32, w, op, llsc_asm_op, lse_asm_op) \
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_ATOMIC_TEST_OP_IMPL(64, , op, llsc_asm_op, lse_asm_op)
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_ATOMIC_TEST_OP_IMPL(32, w, op, llsc_asm_op, lse_asm_op, , ) \
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_ATOMIC_TEST_OP_IMPL(32, w, op, llsc_asm_op, lse_asm_op, acq_, a) \
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_ATOMIC_TEST_OP_IMPL(64, , op, llsc_asm_op, lse_asm_op, , ) \
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_ATOMIC_TEST_OP_IMPL(64, , op, llsc_asm_op, lse_asm_op, acq_, a)
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_ATOMIC_TEST_OP(clear, bic, clr)
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_ATOMIC_TEST_OP(set, orr, set)
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@ -512,6 +514,7 @@ _ATOMIC_STORE_REL_IMPL(64, , )
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#define atomic_load_acq_int atomic_load_acq_32
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#define atomic_set_acq_int atomic_set_acq_32
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#define atomic_subtract_acq_int atomic_subtract_acq_32
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#define atomic_testandset_acq_int atomic_testandset_acq_32
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#define atomic_add_rel_int atomic_add_rel_32
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#define atomic_fcmpset_rel_int atomic_fcmpset_rel_32
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@ -550,6 +553,7 @@ _ATOMIC_STORE_REL_IMPL(64, , )
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#define atomic_load_acq_long atomic_load_acq_64
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#define atomic_set_acq_long atomic_set_acq_64
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#define atomic_subtract_acq_long atomic_subtract_acq_64
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#define atomic_testandset_acq_long atomic_testandset_acq_64
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#define atomic_add_acq_ptr atomic_add_acq_64
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#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_64
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@ -603,7 +607,5 @@ atomic_thread_fence_seq_cst(void)
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dmb(sy);
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}
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#include <sys/_atomic_subword.h>
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#endif /* KCSAN && !KCSAN_RUNTIME */
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#endif /* _MACHINE_ATOMIC_H_ */
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