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Relocate direct map specs into struct alpha_chipset.
Prepare for PCI Scatter-Gather map. Panic if driver tries alpha_XXX_dmamap() out of range.
This commit is contained in:
parent
6ed0b39d28
commit
0444d5b59a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=150323
@ -472,8 +472,6 @@ bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
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* Map the buffer buf into bus space using the dmamap map.
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*/
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vm_offset_t alpha_XXX_dmamap_or = 1024UL*1024UL*1024UL; /*XXX */
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int
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bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
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bus_size_t buflen, bus_dmamap_callback_t *callback,
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@ -581,7 +579,7 @@ bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
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}
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if (sg->ds_len == 0) {
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sg->ds_addr = paddr | alpha_XXX_dmamap_or;
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sg->ds_addr = paddr + chipset.dmoffset;
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sg->ds_len = size;
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} else if (paddr == nextpaddr) {
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sg->ds_len += size;
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@ -591,7 +589,7 @@ bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
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seg++;
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if (seg > dmat->nsegments)
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break;
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sg->ds_addr = paddr | alpha_XXX_dmamap_or;
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sg->ds_addr = paddr + chipset.dmoffset;
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sg->ds_len = size;
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}
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vaddr += size;
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@ -671,7 +669,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat,
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* previous segment if possible.
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*/
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if (first) {
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segs[seg].ds_addr = curaddr | alpha_XXX_dmamap_or;
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segs[seg].ds_addr = curaddr + chipset.dmoffset;
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segs[seg].ds_len = sgsize;
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first = 0;
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} else {
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@ -683,7 +681,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat,
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else {
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if (++seg >= dmat->nsegments)
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break;
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segs[seg].ds_addr = curaddr | alpha_XXX_dmamap_or;
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segs[seg].ds_addr = curaddr + chipset.dmoffset;;
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segs[seg].ds_len = sgsize;
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}
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}
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@ -45,6 +45,17 @@ typedef struct alpha_chipset {
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* Scatter-Gather map for ISA dma.
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*/
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struct sgmap* sgmap;
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/*
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* Scatter-Gather map for PCI dma.
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*/
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struct sgmap* pci_sgmap;
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/*
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* direct map
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*/
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long dmsize;
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long dmoffset;
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} alpha_chipset_t;
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extern alpha_chipset_t chipset;
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@ -45,6 +45,9 @@
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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#include <machine/chipset.h>
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#include <sys/systm.h>
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/*
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* Define meanings for a few software bits in the pte
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*/
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@ -142,12 +145,16 @@ pmap_kextract(vm_offset_t va)
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#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
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extern vm_offset_t alpha_XXX_dmamap_or;
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static __inline vm_offset_t
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alpha_XXX_dmamap(vm_offset_t va)
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{
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return (pmap_kextract(va) | alpha_XXX_dmamap_or);
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vm_offset_t pa = pmap_kextract(va);
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if (pa >= chipset.dmsize)
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panic ("driver uses alpha_XXX_dmamap() for an address that"
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"is not within direct map");
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if (chipset.pci_sgmap != NULL)
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panic ("driver uses alpha_XXX_dmamap() on largemem system");
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return (pa + chipset.dmoffset);
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}
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#endif /* _KERNEL */
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@ -172,6 +172,7 @@ mcpcia_probe(device_t dev)
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}
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sc->mcpcia_inst = unit;
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if ((xc = mcpcia_root) == NULL) {
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chipset.pci_sgmap = NULL;
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mcpcia_root = sc;
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} else {
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while (xc->next)
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@ -633,10 +634,12 @@ mcbus_get_mid(dev), bus , slot, func, sz, off, paddr, data, new_data);
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static void
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mcpcia_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
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{
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struct mcpcia_softc *sc;
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u_int64_t *sgtable = arg;
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int index = alpha_btop(ba - MCPCIA_ISA_SG_MAPPED_BASE);
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if (pa) {
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/* XXX */
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if (pa > (1L<<32))
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panic("mcpcia_sgmap_map: can't map address 0x%lx", pa);
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sgtable[index] = ((pa >> 13) << 1) | 1;
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@ -644,12 +647,18 @@ mcpcia_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
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sgtable[index] = 0;
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}
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alpha_mb();
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MCPCIA_SGTLB_INVALIDATE(mcpcia_eisa);
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if ((struct sgmap*)sgtable == chipset.sgmap)
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MCPCIA_SGTLB_INVALIDATE(mcpcia_eisa);
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else {
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for (sc = mcpcia_root; sc != NULL; sc = sc->next)
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MCPCIA_SGTLB_INVALIDATE(sc);
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}
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}
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static void
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mcpcia_dma_init(struct mcpcia_softc *sc)
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{
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void *sgtable;
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/*
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* Disable all windows first.
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@ -672,7 +681,6 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
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*/
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if (sc == mcpcia_eisa) {
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void *sgtable;
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REGVAL(MCPCIA_W0_MASK(sc)) = MCPCIA_WMASK_8M;
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sgtable = contigmalloc(8192, M_DEVBUF,
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@ -699,6 +707,8 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
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* Set up window 1 as a 2 GB Direct-mapped window starting at 2GB.
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*/
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chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = MCPCIA_DIRECT_MAPPED_BASE;
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REGVAL(MCPCIA_W1_MASK(sc)) = MCPCIA_WMASK_2G;
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REGVAL(MCPCIA_T1_BASE(sc)) = 0;
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alpha_mb();
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@ -706,30 +716,33 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
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MCPCIA_DIRECT_MAPPED_BASE | MCPCIA_WBASE_EN;
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alpha_mb();
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/*
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* When we get around to redoing the 'chipset' stuff to have more
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* than one sgmap handler...
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*/
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if (alpha_ptob(Maxmem) <= chipset.dmsize)
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return;
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#if 0
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/*
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* Set up window 2 as a 1G SGMAP-mapped window starting at 1G.
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*/
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if (chipset.pci_sgmap == NULL) {
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sgtable = contigmalloc(1048576, M_DEVBUF,
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M_NOWAIT, 0, 1L<<34, 32<<10, 1L<<34);
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if (sgtable == NULL) {
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panic("mcpcia_dma_init: cannot allocate pci_sgmap");
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/* NOTREACHED */
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}
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chipset.pci_sgmap = sgmap_map_create(MCPCIA_PCI_SG_MAPPED_BASE,
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MCPCIA_PCI_SG_MAPPED_BASE + MCPCIA_PCI_SG_MAPPED_SIZE - 1,
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mcpcia_sgmap_map, sgtable);
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}
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REGVAL(MCPCIA_W2_MASK(sc)) = MCPCIA_WMASK_1G;
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REGVAL(MCPCIA_T2_BASE(sc)) =
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ccp->cc_pci_sgmap.aps_ptpa >> MCPCIA_TBASEX_SHIFT;
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pmap_kextract((vm_offset_t)chipset.pci_sgmap) >>
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MCPCIA_TBASEX_SHIFT;
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alpha_mb();
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REGVAL(MCPCIA_W2_BASE(sc)) =
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MCPCIA_WBASE_EN | MCPCIA_WBASE_SG | MCPCIA_PCI_SG_MAPPED_BASE;
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alpha_mb();
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#endif
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/* XXX XXX BEGIN XXX XXX */
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{ /* XXX */
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alpha_XXX_dmamap_or = MCPCIA_DIRECT_MAPPED_BASE;/* XXX */
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} /* XXX */
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/* XXX XXX END XXX XXX */
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MCPCIA_SGTLB_INVALIDATE(sc);
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}
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/*
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@ -235,6 +235,9 @@ apecs_init_sgmap(void)
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chipset.sgmap = sgmap_map_create(APECS_SGMAP_BASE,
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APECS_SGMAP_BASE + APECS_SGMAP_SIZE,
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apecs_sgmap_map, sgtable);
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
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}
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void
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@ -314,6 +314,9 @@ cia_init_sgmap(void)
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chipset.sgmap = sgmap_map_create(CIA_SGMAP_BASE,
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CIA_SGMAP_BASE + CIA_SGMAP_SIZE - 1,
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cia_sgmap_map, sgtable);
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
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if (cia_ispyxis) {
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/*
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@ -123,7 +123,6 @@ irongate_init()
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initted = 1;
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chipset = irongate_chipset;
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alpha_XXX_dmamap_or = 0UL;
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bwx_init_space(&io_space, KV(IRONGATE_IO));
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bwx_init_space(&mem_space, KV(IRONGATE_MEM));
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@ -166,6 +165,9 @@ irongate_attach(device_t dev)
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chipset_dense = IRONGATE_MEM;
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/* no s/g support in this chipset, must use bounce-buffers */
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chipset.sgmap = NULL;
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 4UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 0;
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bus_generic_attach(dev);
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@ -186,7 +186,9 @@ lca_init_sgmap(void)
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chipset.sgmap = sgmap_map_create(LCA_SGMAP_BASE,
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LCA_SGMAP_BASE + LCA_SGMAP_SIZE,
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lca_sgmap_map, sgtable);
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
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REGVAL64(LCA_IOC_W_T_BASE0) = pmap_kextract((vm_offset_t) sgtable);
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alpha_mb();
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@ -252,6 +252,9 @@ t2_init_sgmap(int h)
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chipset.sgmap = sgmap_map_create(T2_SGMAP_BASE,
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T2_SGMAP_BASE + T2_SGMAP_SIZE,
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t2_sgmap_map, sgtable);
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
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}
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static void
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@ -234,6 +234,7 @@ tsunami_init_sgmap(void)
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chipset.sgmap = sgmap_map_create(TSUNAMI_SGMAP_BASE,
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TSUNAMI_SGMAP_BASE + TSUNAMI_SGMAP_SIZE,
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tsunami_sgmap_map, sgtable);
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chipset.pci_sgmap = NULL;
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}
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void
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@ -258,7 +259,8 @@ tsunami_init()
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chipset = tsunami_chipset;
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platform.pci_intr_enable = tsunami_intr_enable;
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platform.pci_intr_disable = tsunami_intr_disable;
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alpha_XXX_dmamap_or = 2UL * 1024UL * 1024UL * 1024UL;
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chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = 2UL * 1024UL * 1024UL * 1024UL;
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if (platform.pci_intr_init)
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platform.pci_intr_init();
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@ -707,7 +707,12 @@ dwlpx_dma_init(struct dwlpx_softc *sc)
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* SGVA base: 0
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*/
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chipset.sgmap = sgmap_map_create(sgwbase, sgwend, dwlpx_sgmap_map, tbl);
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#else
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chipset.sgmap = NULL;
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#endif
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chipset.pci_sgmap = NULL;
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chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
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chipset.dmoffset = DWLPx_DIRECT_MAPPED_BASE;
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/*
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* Set up DMA windows for this DWLPx.
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@ -729,12 +734,6 @@ dwlpx_dma_init(struct dwlpx_softc *sc)
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sgwbase | PCIA_WBASE_W_EN | PCIA_WBASE_SG_EN;
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}
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alpha_mb();
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/* XXX XXX BEGIN XXX XXX */
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{ /* XXX */
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alpha_XXX_dmamap_or = DWLPx_DIRECT_MAPPED_BASE; /* XXX */
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} /* XXX */
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/* XXX XXX END XXX XXX */
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}
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/*
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