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mirror of https://git.FreeBSD.org/src.git synced 2024-12-20 11:11:24 +00:00

- Remove stale comments

- Replace a1 with k1 to while restoring context. a1 was there by mistake,
    interrupts are disabled at this point and it's safe to use k0, k1.
    This code never was reached beacasue current Status register handling
    prevented interrupta from user mode.
This commit is contained in:
Oleksandr Tymoshenko 2009-05-23 18:00:20 +00:00
parent 41917f9933
commit 070f07e3de
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/projects/mips/; revision=192655

View File

@ -689,36 +689,27 @@ NNON_LEAF(MipsUserIntr, STAND_FRAME_SIZE, ra)
/*
* Call the interrupt handler.
*/
break
la k0, _C_LABEL(cpu_intr)
jalr k0
sw a3, STAND_RA_OFFSET(sp) # for debugging
/*
* Since interrupts are enabled at this point, we use a1 instead of
* k0 or k1 to store the PCB pointer. This is because k0 and k1
* are not preserved across interrupts. ** RRS - And how did the
* get enabled? cpu_intr clears the cause register but it does
* not touch the sr as far as I can see thus intr are still
* disabled.
* DO_AST enabled interrupts
*/
DO_AST
/*
* Restore user registers and return. NOTE: interrupts are enabled.
* Restore user registers and return.
*/
/*
* Since interrupts are enabled at this point, we use a1 instead of
* k0 or k1 to store the PCB pointer. This is because k0 and k1
* are not preserved across interrupts.
*/
mtc0 zero, COP_0_STATUS_REG
mtc0 zero, COP_0_STATUS_REG # re-disable interrupts
ITLBNOPFIX
li v0, SR_EXL
mtc0 v0, COP_0_STATUS_REG # set exeption level bit.
ITLBNOPFIX
GET_CPU_PCPU(k1)
lw a1, PC_CURPCB(k1)
lw k1, PC_CURPCB(k1)
RESTORE_U_PCB_REG(s0, S0, k1)
RESTORE_U_PCB_REG(s1, S1, k1)
RESTORE_U_PCB_REG(s2, S2, k1)