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mirror of https://git.FreeBSD.org/src.git synced 2025-01-02 12:20:51 +00:00

Use bus_*() rather than bus_space_*().

This commit is contained in:
John Baldwin 2009-11-24 16:54:54 +00:00
parent 32e7052ed0
commit 08f85872d3
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=199756
5 changed files with 12 additions and 39 deletions

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@ -349,9 +349,6 @@ an_probe(device_t dev)
* to be able to issue commands and call some of the
* other routines.
*/
sc->an_bhandle = rman_get_bushandle(sc->port_res);
sc->an_btag = rman_get_bustag(sc->port_res);
ssid.an_len = sizeof(ssid);
ssid.an_type = AN_RID_SSIDLIST;

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@ -111,8 +111,6 @@ an_attach_isa(device_t dev)
an_alloc_port(dev, sc->port_rid, 1);
an_alloc_irq(dev, sc->irq_rid, 0);
sc->an_bhandle = rman_get_bushandle(sc->port_res);
sc->an_btag = rman_get_bustag(sc->port_res);
sc->an_dev = dev;
error = an_attach(sc, flags);

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@ -141,8 +141,6 @@ an_pccard_attach(device_t dev)
an_alloc_irq(dev, sc->irq_rid, 0);
sc->an_bhandle = rman_get_bushandle(sc->port_res);
sc->an_btag = rman_get_bustag(sc->port_res);
sc->an_dev = dev;
error = an_attach(sc, flags);

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@ -175,9 +175,6 @@ an_attach_pci(dev)
goto fail;
}
sc->an_btag = rman_get_bustag(sc->port_res);
sc->an_bhandle = rman_get_bushandle(sc->port_res);
/* Allocate memory for MPI350 */
if (sc->mpi350) {
/* Allocate memory */
@ -187,8 +184,6 @@ an_attach_pci(dev)
device_printf(dev, "couldn't map memory\n");
goto fail;
}
sc->an_mem_btag = rman_get_bustag(sc->mem_res);
sc->an_mem_bhandle = rman_get_bushandle(sc->mem_res);
/* Allocate aux. memory */
sc->mem_aux_rid = PCIR_BAR(2);
@ -198,8 +193,6 @@ an_attach_pci(dev)
device_printf(dev, "couldn't map aux memory\n");
goto fail;
}
sc->an_mem_aux_btag = rman_get_bustag(sc->mem_aux_res);
sc->an_mem_aux_bhandle = rman_get_bushandle(sc->mem_aux_res);
/* Allocate DMA region */
error = bus_dma_tag_create(NULL, /* parent */

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@ -45,47 +45,39 @@
/*
* register space access macros
*/
#define CSR_WRITE_2(sc, reg, val) \
bus_space_write_2(sc->an_btag, sc->an_bhandle, reg, val)
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->port_res, reg, val)
#define CSR_READ_2(sc, reg) \
bus_space_read_2(sc->an_btag, sc->an_bhandle, reg)
#define CSR_READ_2(sc, reg) bus_read_2(sc->port_res, reg)
#define CSR_WRITE_1(sc, reg, val) \
bus_space_write_1(sc->an_btag, sc->an_bhandle, reg, val)
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->port_res, reg, val)
#define CSR_READ_1(sc, reg) \
bus_space_read_1(sc->an_btag, sc->an_bhandle, reg)
#define CSR_READ_1(sc, reg) bus_read_1(sc->port_res, reg)
/*
* memory space access macros
*/
#define CSR_MEM_WRITE_2(sc, reg, val) \
bus_space_write_2(sc->an_mem_btag, sc->an_mem_bhandle, reg, val)
#define CSR_MEM_WRITE_2(sc, reg, val) bus_write_2(sc->mem_res, reg, val)
#define CSR_MEM_READ_2(sc, reg) \
bus_space_read_2(sc->an_mem_btag, sc->an_mem_bhandle, reg)
#define CSR_MEM_READ_2(sc, reg) bus_read_2(sc->mem_res, reg)
#define CSR_MEM_WRITE_1(sc, reg, val) \
bus_space_write_1(sc->an_mem_btag, sc->an_mem_bhandle, reg, val)
#define CSR_MEM_WRITE_1(sc, reg, val) bus_write_1(sc->mem_res, reg, val)
#define CSR_MEM_READ_1(sc, reg) \
bus_space_read_1(sc->an_mem_btag, sc->an_mem_bhandle, reg)
#define CSR_MEM_READ_1(sc, reg) bus_read_1(sc->mem_res, reg)
/*
* aux. memory space access macros
*/
#define CSR_MEM_AUX_WRITE_4(sc, reg, val) \
bus_space_write_4(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg, val)
bus_write_4(sc->mem_aux_res, reg, val)
#define CSR_MEM_AUX_READ_4(sc, reg) \
bus_space_read_4(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg)
bus_read_4(sc->mem_aux_res, reg)
#define CSR_MEM_AUX_WRITE_1(sc, reg, val) \
bus_space_write_1(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg, val)
bus_write_1(sc->mem_aux_res, reg, val)
#define CSR_MEM_AUX_READ_1(sc, reg) \
bus_space_read_1(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg)
bus_read_1(sc->mem_aux_res, reg)
/*
* Size of Aironet I/O space.
@ -454,11 +446,6 @@ struct an_softc {
void* irq_handle; /* handle for irq handler */
struct resource* irq_res; /* resource for irq */
bus_space_handle_t an_bhandle_p;
bus_space_handle_t an_bhandle;
bus_space_tag_t an_btag;
bus_space_handle_t an_mem_bhandle;
bus_space_tag_t an_mem_btag;
bus_space_handle_t an_mem_aux_bhandle;
bus_space_tag_t an_mem_aux_btag;
bus_dma_tag_t an_dtag;