Initial import of driver for the Stallion EasyIO and EasyConnection 8/32

boards by Greg Ungerer (gerg@stallion.oz.au).  (v0.0.1 alpha)

This is a multiple import of all revisions available to build up
a history.

This driver supports only some of the Stallion range, in particular, not
the highly intelligent cards.  That comes in shortly.

Submitted by: Greg Ungerer (gerg@stallion.oz.au)

sys/i386/isa/README.stl

@@ -0,0 +1,241 @@
+
+Stallion Multiport Serial Driver Readme
+---------------------------------------
+
+Version: 0.0.1 alpha
+Date:    21DEC95
+Author:  Greg Ungerer (gerg@stallion.oz.au)
+
+
+
+1. INTRODUCTION
+
+This is a FreeBSD driver for some of the Stallion Technologies range of
+multiport serial boards. This is the very first release of this driver, so
+it should be considered to be of very alpha quality.
+
+This driver has not been developed by Stallion Technologies. I developed it
+in my spare time in the hope that it would be useful. As such there is no
+warranty or support of any form.
+
+What this means is that this driver is not officially supported by Stallion
+Technologies, so don't ring their support if you can't get it working. They
+will probably not be able to help you. Instead email me if you have problems
+or bug reports and I will do what I can... (Sorry to sound so heavy handed,
+but I need to stress that this driver is not officially supported in any way.)
+
+This driver supports the EasyIO and EasyConnection 8/32 range of boards.
+All of these boards are not classical intelligent multiport boards, but are
+host based multiport boards that use high performance Cirrus Logic CL-CD1400
+RISC UART's (they have built in FIFO's, automatic flow control, and some
+other good stuff).
+
+The EasyIO range of cards comes in 3 forms, the EasyIO-4, EasyIO-8 and the
+EasyIO-8M. All of these are non-expandable, low cost, ISA, multiport boards
+with 4, 8 and 8 RS-232C ports respectively. The EasyIO-8M is not currently
+supported by this driver. Though it is pretty easy to support so I'll do
+that when I get a chance. Each EasyIO board requires 8 bytes of IO address
+space and 1 interrupt. On an EISA system it is possible to share 1 interrupt
+between multiple boards. The EasyIO-4 has 10 pin RJ connectors, and the
+EasyIO-8 comes with a dongle cable that can be either 10 pin RJ connectors or
+DB-25 connectors. The EasyIO-8M has 6 pin RJ connectors.
+
+The EasyConnection 8/32 family of boards is a relatively low cost modular
+range of multiport serial boards. The EasyConnection 8/32 boards can be
+configured to have from 8 to 32 serial ports by plugging in external serial
+port modules that contain from 8 to 16 ports each. There is a wide range of
+external modules available that offer: DB-25 connectors, RJ-45 connectors
+(both with RS-232 D and E compatible drivers), and also RS-422 ports. The
+EasyConnection 8/32 boards come in ISA and MCA bus versions. The board takes
+the form of a host adapter card, with an external connector cable that plugs
+into the external modules. The external modules just clip together to add
+ports (BTW they are not hot pluggable). Each EasyConnection 8/32 board
+requires 2 separate IO address ranges, one 2 bytes in size and a secondary
+region of 32 bytes. Each board also requires 1 interrupt, on EISA systems
+multiple boards can share 1 interrupt. The secondary IO range (the 32 byte
+range) can be shared between multiple boards on any bus type.
+
+So thats the hardware supported (sounds like a marketing spiel doesn't it!).
+I am working on drivers for other boards in the Stallion range, so look
+out for those some time soon...
+
+
+
+2. INSTALLATION
+
+This driver was developed on a FreeBSD 2.0.5 system. I have not tryed it
+on a 2.1 system yet, so I don't know if it will go in painlessly or not...
+
+You will need to build a new kernel to use this driver. So the first thing
+you need is to have the full kernel source. Most people will have this
+(I hope!). The following assumes that the kernel source is in /usr/src/sys.
+
+The driver can support up to 8 boards (any combination of EasyIO and
+EasyConnection 8/32 boards). So there is a theoretical maximum of 256 ports.
+(Off-course I have not tested a system with this many!)
+
+Instructions to install:
+
+1. Copy the driver source files into the kernel source tree.
+
+        cp stallion.c /usr/src/sys/i386/isa
+        cp scd1400.h /usr/src/sys/i386/ic
+
+2. Add a character device switch table entry for the driver into the cdevsw
+   table structure. This involves adding some code into the kernel conf.c
+   file:
+
+        cd /usr/src/sys/i386/i386
+        vi conf.c
+            - add the following lines (in 2.0.5 I put them at line 1019):
+
+/* Stallion Multiport Serial Driver */
+#include "stl.h"
+#if	NSTL > 0
+d_open_t        stlopen;
+d_close_t       stlclose;
+d_read_t        stlread;
+d_write_t       stlwrite;
+d_ioctl_t	stlioctl;
+d_stop_t        stlstop;
+d_ttycv_t	stldevtotty;
+#define stlreset	nxreset
+#define	stlmmap		nxmmap
+#define stlstrategy	nxstrategy
+#else
+#define	stlopen		nxopen
+#define stlclose	nxclose
+#define stlread		nxread
+#define stlwrite	nxwrite
+#define stlioctl	nxioctl
+#define stlstop		nxstop
+#define stlreset	nxreset
+#define stlmmap		nxmmap
+#define stlstrategy	nxstrategy
+#define	stldevtotty	nxdevtotty
+#endif
+
+
+            - and then inside the actual cdevsw structure definition, at the
+              last entry add (this is now line 1259 in the 2.0.5 conf.c):
+
+	{ stlopen,	stlclose,	stlread,	stlwrite,	/*67*/
+	  stlioctl,	stlstop,	stlreset,	stldevtotty,/*stallion*/
+	  ttselect,	stlmmap,	stlstrategy },
+
+            - the line above used major number 67, but this may be different
+              on your system. Take note of what major number you are using.
+              
+            - save the file and exit vi.
+
+3. Add the driver source files to the kernel files list:
+
+        cd /usr/src/sys/i386/conf
+        vi files.i386
+            - add the following definition line into the list (it is stored
+              alphabetically, so insert it appropriately):
+
+i386/isa/stallion.c		optional	stl	device-driver
+
+            - save the file and exit vi.
+
+4. Add board probe entries into the kernel configuration file:
+
+        cd /usr/src/sys/i386/conf
+        cp GENERIC MYKERNEL
+            - if you already have a kernel config that you use then you
+              could just use that (instead of MYKERNEL)
+        vi MYKERNEL
+            - enter a line for each board that you want to use, eg:
+
+device		stl0	at isa? port 0x2a0 tty irq 10 vector stlintr
+
+            - change the io address and irq in this line as required
+            - save the file and exit
+
+5. Build a new kernel using this configuration.
+
+        cd /usr/src/sys/i386/conf
+        config MYKERNEL
+        cd ../../compile/MYKERNEL
+        make depend
+        make all
+        make install
+
+
+And there you have it!  It is a little bit of effort to get it in there...
+
+So once you have a new kernel built, reboot to start it up. On startup the
+Stallion board probes will report on whether the boards were found or not.
+For each board found the driver will print out the type of board found,
+and how many panels and ports it has. 
+
+If a board is not found by the driver but is actually in the system then the
+most likely problem is that the IO address is wrong. The easiest thing to do
+is change the DIP switches on the board to the desired address and reboot.
+On EasyIO and EasyConnection 8/32 boards the IRQ is software programmable,
+so if there is a conflict you may need to change the IRQ used for a board in
+the MYKERNEL configuration file and rebuild the kernel.
+
+Note that the secondary IO address of the EasyConnection 8/32 boards is hard
+wired into the stallion.c driver code. It is currently set to IO address
+0x280. If you need to use a different address then you will need to edit this
+file and change the variable named stl_ioshared.
+
+
+
+3. USING THE DRIVER
+
+Once the driver is installed you will need to setup some device nodes to
+access the serial ports. Use the supplied "mkdevnods" script to automatically
+create all required device entries for your boards. To make device nodes for
+more than 1 board then just supply the number of boards you are using as a
+command line parameter to mkdevnods and it will create nodes for that number
+of boards. By default it will create device nodes for 1 board only.
+
+Note that if the driver is not installed at character major number 67 then
+you will need to edit the mkdevnods script and modify the STL_SERIALMAJOR
+variable to the major number you are using.
+
+Device nodes created for the normal serial port devices are named /dev/ttyEX
+where X is the port number. (The second boards ports will start from ttyE32,
+the third boards from ttyE64, etc). It will also create a set of modem call
+out devices named cueX where again X is the port number.
+
+For the most part the Stallion driver tries to emulate the standard PC system
+com ports and the standard sio serial driver. The idea is that you should
+be able to use Stallion board ports and com ports inter-changeably without
+modifying anything but the device name. Anything that doesn't work like that
+should be considered a bug in this driver!
+
+Since this driver tries to emulate the standard serial ports as much as
+possible then most system utilities should work as they do for the standard
+com ports. Most importantly "stty" works as expected and "comcontrol" can be
+used just like for the serial ports.
+
+This driver should work with anything that works on standard com serial ports.
+Having said that, I have used it on at least the following types of "things"
+under FreeBSD:
+    a) standard dumb terminals (using getty)
+    b) modems (using cu, etc)
+
+
+
+4. NOTES
+
+Be aware that this is the first release of this driver, so there is sure to
+be some bugs in it. Please email me any feedback on bugs, problems, or even
+good experiences with this driver!
+
+There is no real smart line discipline bypass code yet (like in the sio
+driver). I will add this for the next driver release.
+
+I will probably also add LKM support for the next driver release.
+
+
+
+5. ACKNOWLEDGEMENTS
+
+This driver is loosely based on the code of the FreeBSD sio serial driver.
+A big thanks to Stallion Technologies for the use of their equipment.
+

sys/i386/isa/ic/scd1400.h

@@ -0,0 +1,307 @@
+/*****************************************************************************/
+
+/*
+ *	cd1400.h  -- cd1400 UART hardware info.
+ *
+ * Copyright (c) 1995 Greg Ungerer (gerg@stallion.oz.au).
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Greg Ungerer.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*****************************************************************************/
+
+#ifndef	_CD1400_H
+#define	_CD1400_H
+/*****************************************************************************/
+
+/*
+ *	Define the number of async ports per cd1400 uart chip.
+ */
+#define	CD1400_PORTS		4
+
+#define	CD1400_CLKHZ		25000000
+
+/*
+ *	Define the cd1400 uarts internal FIFO sizes.
+ */
+#define	CD1400_TXFIFOSIZE	12
+#define	CD1400_RXFIFOSIZE	12
+
+/*
+ *	Local RX FIFO thresh hold level. Also define the RTS thresh hold
+ *	based on the RX thresh hold.
+ */
+#define	FIFO_RXTHRESHOLD	6
+#define	FIFO_RTSTHRESHOLD	7
+
+/*****************************************************************************/
+
+/*
+ *	Define the cd1400 register addresses. These are all the valid
+ *	registers with the cd1400. Some are global, some virtual, some
+ *	per port.
+ */
+#define	GFRCR		0x40
+#define	CAR		0x68
+#define	GCR		0x4b
+#define	SVRR		0x67
+#define	RICR		0x44
+#define	TICR		0x45
+#define	MICR		0x46
+#define	RIR		0x6b
+#define	TIR		0x6a
+#define	MIR		0x69
+#define	PPR		0x7e
+
+#define	RIVR		0x43
+#define	TIVR		0x42
+#define	MIVR		0x41
+#define	TDR		0x63
+#define	RDSR		0x62
+#define	MISR		0x4c
+#define	EOSRR		0x60
+
+#define	LIVR		0x18
+#define	CCR		0x05
+#define	SRER		0x06
+#define	COR1		0x08
+#define	COR2		0x09
+#define	COR3		0x0a
+#define	COR4		0x1e
+#define	COR5		0x1f
+#define	CCSR		0x0b
+#define	RDCR		0x0e
+#define	SCHR1		0x1a
+#define	SCHR2		0x1b
+#define	SCHR3		0x1c
+#define	SCHR4		0x1d
+#define	SCRL		0x22
+#define	SCRH		0x23
+#define	LNC		0x24
+#define	MCOR1		0x15
+#define	MCOR2		0x16
+#define	RTPR		0x21
+#define	MSVR1		0x6c
+#define	MSVR2		0x6d
+#define	PSVR		0x6f
+#define	RBPR		0x78
+#define	RCOR		0x7c
+#define	TBPR		0x72
+#define	TCOR		0x76
+
+/*****************************************************************************/
+
+/*
+ *	Define the set of baud rate clock divisors.
+ */
+#define	CD1400_CLK0	8
+#define	CD1400_CLK1	32
+#define	CD1400_CLK2	128
+#define	CD1400_CLK3	512
+#define	CD1400_CLK4	2048
+
+#define	CD1400_NUMCLKS	5
+
+/*****************************************************************************/
+
+/*
+ *	Define the clock pre-scalar value to be a 5 ms clock. This should be
+ *	OK for now. It would probably be better to make it 10 ms, but we
+ *	can't fit that divisor into 8 bits!
+ */
+#define	PPR_SCALAR	244
+
+/*****************************************************************************/
+
+/*
+ *	Define values used to set character size options.
+ */
+#define	COR1_CHL5	0x00
+#define	COR1_CHL6	0x01
+#define	COR1_CHL7	0x02
+#define	COR1_CHL8	0x03
+
+/*
+ *	Define values used to set the number of stop bits.
+ */
+#define	COR1_STOP1	0x00
+#define	COR1_STOP15	0x04
+#define	COR1_STOP2	0x08
+
+/*
+ *	Define values used to set the parity scheme in use.
+ */
+#define	COR1_PARNONE	0x00
+#define	COR1_PARFORCE	0x20
+#define	COR1_PARENB	0x40
+#define	COR1_PARIGNORE	0x10
+
+#define	COR1_PARODD	0x80
+#define	COR1_PAREVEN	0x00
+
+#define	COR2_IXM	0x80
+#define	COR2_TXIBE	0x40
+#define	COR2_ETC	0x20
+#define	COR2_LLM	0x10
+#define	COR2_RLM	0x08
+#define	COR2_RTSAO	0x04
+#define	COR2_CTSAE	0x02
+
+#define	COR3_SCDRNG	0x80
+#define	COR3_SCD34	0x40
+#define	COR3_FCT	0x20
+#define	COR3_SCD12	0x10
+
+/*
+ *	Define values used by COR4.
+ */
+#define	COR4_BRKINT	0x08
+#define	COR4_IGNBRK	0x18
+
+/*****************************************************************************/
+
+/*
+ *	Define the modem control register values.
+ *	Note that the actual hardware is a little different to the conventional
+ *	pin names on the cd1400.
+ */
+#define	MSVR1_DTR	0x01
+#define	MSVR1_DSR	0x10
+#define	MSVR1_RI	0x20
+#define	MSVR1_CTS	0x40
+#define	MSVR1_DCD	0x80
+
+#define	MSVR2_RTS	0x02
+#define	MSVR2_DSR	0x10
+#define	MSVR2_RI	0x20
+#define	MSVR2_CTS	0x40
+#define	MSVR2_DCD	0x80
+
+#define	MCOR1_DCD	0x80
+#define	MCOR1_CTS	0x40
+#define	MCOR1_RI	0x20
+#define	MCOR1_DSR	0x10
+
+#define	MCOR2_DCD	0x80
+#define	MCOR2_CTS	0x40
+#define	MCOR2_RI	0x20
+#define	MCOR2_DSR	0x10
+
+/*****************************************************************************/
+
+/*
+ *	Define the bits used with the service (interrupt) enable register.
+ */
+#define	SRER_NNDT	0x01
+#define	SRER_TXEMPTY	0x02
+#define	SRER_TXDATA	0x04
+#define	SRER_RXDATA	0x10
+#define	SRER_MODEM	0x80
+
+/*****************************************************************************/
+
+/*
+ *	Define operational commands for the command register.
+ */
+#define	CCR_RESET	0x80
+#define	CCR_CORCHANGE	0x4e
+#define	CCR_SENDCH	0x20
+#define	CCR_CHANCTRL	0x10
+
+#define	CCR_TXENABLE	(CCR_CHANCTRL | 0x08)
+#define	CCR_TXDISABLE	(CCR_CHANCTRL | 0x04)
+#define	CCR_RXENABLE	(CCR_CHANCTRL | 0x02)
+#define	CCR_RXDISABLE	(CCR_CHANCTRL | 0x01)
+
+#define	CCR_SENDSCHR1	(CCR_SENDCH | 0x01)
+#define	CCR_SENDSCHR2	(CCR_SENDCH | 0x02)
+#define	CCR_SENDSCHR3	(CCR_SENDCH | 0x03)
+#define	CCR_SENDSCHR4	(CCR_SENDCH | 0x04)
+
+#define	CCR_RESETCHAN	(CCR_RESET | 0x00)
+#define	CCR_RESETFULL	(CCR_RESET | 0x01)
+#define	CCR_TXFLUSHFIFO	(CCR_RESET | 0x02)
+
+#define	CCR_MAXWAIT	10000
+
+/*****************************************************************************/
+
+/*
+ *	Define the valid acknowledgement types (for hw ack cycle).
+ */
+#define	ACK_TYPMASK	0x07
+#define	ACK_TYPTX	0x02
+#define	ACK_TYPMDM	0x01
+#define	ACK_TYPRXGOOD	0x03
+#define	ACK_TYPRXBAD	0x07
+
+#define	SVRR_RX		0x01
+#define	SVRR_TX		0x02
+#define	SVRR_MDM	0x04
+
+#define	ST_OVERRUN	0x01
+#define	ST_FRAMING	0x02
+#define	ST_PARITY	0x04
+#define	ST_BREAK	0x08
+#define	ST_SCHAR1	0x10
+#define	ST_SCHAR2	0x20
+#define	ST_SCHAR3	0x30
+#define	ST_SCHAR4	0x40
+#define	ST_RANGE	0x70
+#define	ST_TIMEOUT	0x80
+
+#define	MISR_DCD	0x80
+#define	MISR_CTS	0x40
+#define	MISR_RI		0x20
+#define	MISR_DSR	0x10
+
+/*****************************************************************************/
+
+/*
+ *	Defines for the CCSR status register.
+ */
+#define	CCSR_RXENABLED	0x80
+#define	CCSR_RXFLOWON	0x40
+#define	CCSR_RXFLOWOFF	0x20
+#define	CCSR_TXENABLED	0x08
+#define	CCSR_TXFLOWON	0x04
+#define	CCSR_TXFLOWOFF	0x02
+
+/*****************************************************************************/
+
+/*
+ *	Define the embedded commands.
+ */
+#define	ETC_CMD		0x00
+#define	ETC_STARTBREAK	0x81
+#define	ETC_DELAY	0x82
+#define	ETC_STOPBREAK	0x83
+
+/*****************************************************************************/
+#endif